Magnetic disk device

Abstract

To reduce read error incidence of servo data.SOLUTION: According to an embodiment, a magnetic disk device includes a magnetic disk formed with a servo sector in which first servo data is recorded, a magnetic head configured to write and read data to and from the magnetic disk, a first memory configured to store write target data and data read from the magnetic disk, a second memory configured to store second servo data, and a controller that acquires the second servo data corresponding to the first servo data from the second memory based on the first servo data read by the magnetic head when passing over the servo sector and that executes positioning control of the magnetic head by using the first servo data and the second servo data.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] An embodiment of the present invention relates to a magnetic disk drive. [Background technology]

[0002] Conventionally, in magnetic disk drives, the magnetic head is positioned by reading servo data stored on the magnetic disk. If an error occurs in reading the servo data by the magnetic head, a retry process occurs in which the magnetic disk makes one rotation and attempts to read the servo data again from the same position, which can result in waiting time. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-047914 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment is to provide a magnetic disk drive that can reduce the frequency of servo data read errors. [Means for solving the problem]

[0005] The magnetic disk device of the embodiment comprises a magnetic disk on which servo sectors in which first servo data are recorded are formed, a magnetic head that writes and reads data to the magnetic disk, a first memory that can store data to be written and data read from the magnetic disk, a second memory that stores second servo data, and a controller that obtains the second servo data corresponding to the first servo data from the second memory based on the first servo data read by the magnetic head when it passes over the servo sector, and performs positioning control of the magnetic head using the first servo data and the second servo data. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic diagram showing an example of the configuration of a magnetic disk device according to the first embodiment. [Figure 2] FIG. 2 is a schematic diagram showing an example of the configuration of the magnetic disk according to the first embodiment. [Figure 3] FIG. 3 is a block diagram illustrating an example of the configuration of an SoC according to the first embodiment. [Figure 4] FIG. 4 is a flowchart showing an example of the flow of the servo data acquisition process according to the first embodiment. [Figure 5] FIG. 5 is a block diagram illustrating an example of the configuration of an SoC according to the second embodiment. [Figure 6] FIG. 6 is a flowchart showing an example of the flow of the servo data acquisition process according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] The magnetic disk drive according to the embodiment will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments.

[0008] (Embodiment 1) FIG. 1 is a schematic diagram showing an example of the configuration of a magnetic disk device 1a according to the first embodiment.

[0009] The magnetic disk device 1a is connected to a host 2. The magnetic disk device 1a can receive access commands from the host 2. The access commands are, for example, write commands and read commands.

[0010] The magnetic disk device 1a includes a magnetic disk 11 having a magnetic layer formed on its surface. The magnetic disk device 1a accesses the magnetic disk 11 in response to an access command. The access includes writing data and reading data. Specifically, writing and reading data is performed by a magnetic head 22.

[0011] In addition to the magnetic disk 11, the magnetic disk device 1a includes a spindle motor (SPM) 12, a ramp 13, an actuator arm 15, a voice coil motor (VCM) 16, a magnetic head 22, a preamplifier 23, a FROM (Flash Read Only Memory) 24, a DRAM (Dynamic Random Access Memory) 25, a NAND-type flash memory (hereinafter, NAND) 26, and an SoC (System-On-a-Chip) 31a.

[0012] The magnetic disk 11 is rotated at a predetermined rotational speed by the SPM 12 attached coaxially.

[0013] The magnetic head 22 writes and reads data to and from the magnetic disk 11 using a write head 22w and a read head 22r provided therein. The magnetic head 22 is attached to the tip of an actuator arm 15. The magnetic head 22 is moved in the radial direction of the magnetic disk 11 by a VCM 16. Note that a single magnetic head 22 may be provided with a plurality of write heads 22w and / or a plurality of read heads 22r.

[0014] When the magnetic disk 11 is not rotating, the magnetic head 22 is moved onto the ramp 13. The ramp 13 holds the magnetic head 22 at a position spaced apart from the magnetic disk 11.

[0015] The preamplifier 23 is an integrated circuit that controls writing and reading of data by the magnetic head 22. During a read operation, the preamplifier 23 amplifies a signal read from the magnetic disk 11 by the magnetic head 22 and supplies the amplified signal to the SoC 31a. During a write operation, the preamplifier 23 amplifies a signal corresponding to the data to be written that is supplied from the SoC 31a and supplies the amplified signal to the magnetic head 22.

[0016] The FROM 24 stores a firmware program and various setting information. The firmware program may be stored on the magnetic disk 11.

[0017] The DRAM 25a is a volatile memory. The DRAM 25a is used as a buffer for data transmitted and received between each unit. The DRAM 25a is also used as a memory for operation by the SoC 31a. The DRAM 25a is used as an area into which firmware programs are loaded and an area in which various management data are temporarily stored. The DRAM 25a is an example of a first memory.

[0018] The NAND 26 stores servo data for positioning control to move the magnetic head 22 to a target position on the magnetic disk 11. The servo data is stored in a distributed manner in the NAND 26 and the above-mentioned magnetic disk 11. Details of the servo data will be described later. The NAND 26 is an example of a second memory.

[0019] The SoC 31a is an integrated circuit that performs overall control of the magnetic disk device 1a. The SoC 31a controls each component in accordance with a firmware program stored in the FROM 24 or the magnetic disk 11. Specifically, for example, the SoC 31a acquires servo data stored in the NAND 26 and the magnetic disk 11 and performs servo processing to position the magnetic head 22 based on the acquired servo data. The servo processing includes processing to acquire the servo data and processing to control the positioning of the magnetic head 22 based on the servo data. The positioning control involves the SoC 31a estimating the current position of the magnetic head 22 based on the servo data and moving the magnetic head 22 closer to a target position based on the estimated current position. The positioning control includes control of a seek operation to move the magnetic head 22 toward a target track and control of a tracking operation to keep the magnetic head 22 on the target track. The SoC 31a is an example of a controller.

[0020] 2 is a schematic diagram showing an example of the configuration of the magnetic disk 11 according to the first embodiment. Note that this diagram shows an example of the rotation direction of the magnetic disk 11. The magnetic head 22 moves relative to the magnetic disk 11 as the magnetic disk 11 rotates. Therefore, the write / read direction, i.e., the direction in which data is written or read by the magnetic head 22 along the circumferential direction, is opposite to the rotation direction of the magnetic disk 11.

[0021] In the radial direction, the direction from the edge of the magnetic disk 11 toward the center is the inner circumferential direction, and the direction from the center of the magnetic disk 11 toward the edge is the outer circumferential direction.

[0022] During the manufacturing process, servo data used to position the magnetic head 22 is written on the magnetic disk 11 by, for example, a servo writer or self-servo writing. As an example of the arrangement of servo areas where servo data is written, a plurality of servo areas SV are depicted, arranged radially in the radial direction and at predetermined intervals in the circumferential direction. The space between two consecutive servo areas SV in the circumferential direction is used as a data area DA where data is written.

[0023] A plurality of concentric servo tracks 41 are provided in the radial direction of the magnetic disk 11. Hereinafter, an area on the servo track 41 divided by the servo areas SV will be referred to as a servo sector SV.

[0024] In the servo sector SV, a preamble, servo mark, gray code, and burst pattern are recorded in this order along the write / read direction. The preamble, servo mark, gray code, and burst pattern are examples of first servo data. Hereinafter, the preamble, servo mark, gray code, and burst pattern may be collectively referred to as first servo data. The first servo data is read when the magnetic head 22 passes over the servo sector SV.

[0025] The preamble is pattern data of a single period that changes periodically in the circumferential direction.

[0026] The servo marks are pattern data for specifying the read timing of the first servo data, and the read timing of various servo data can be determined based on the detection timing of the servo marks.

[0027] The Gray code includes a cylinder address for identifying each servo track 41 provided on the magnetic disk 11 and a sector address for identifying each servo sector SV on the servo track 41 .

[0028] The burst pattern is pattern data used to detect the offset of the position of the magnetic head 22 from the track center of a certain servo track 41 (more precisely, the servo track 41 indicated by the cylinder address). The offset from the track center of the servo track 41 is called the burst offset.

[0029] The Gray code and burst pattern are used to calculate the amount of deviation of the magnetic head 22 from the track center of the servo track 41. The estimated radial position of the magnetic head 22 can be calculated based on the cylinder address and the amount of deviation obtained from each burst pattern.

[0030] 3 is a block diagram showing an example of the configuration of an SoC 31a according to embodiment 1. As shown in FIG. 3, the SoC 31a includes a servo controller (SVC) 21, a NAND interface 32a, a DRAM controller 33, a hard disk controller (HDC) 34, a read / write channel (RWC) 35, a CPU (Central Processing Unit) 36, a bus 37, and a line cache controller 38.

[0031] Some or all of the operations of the components of the SoC 31a described below can be realized by the CPU 36 executing a firmware program.

[0032] The NAND 26 is connected to the NAND interface 32a.

[0033] The NAND 26 stores postcodes. The postcodes are an example of second servo data. Hereinafter, the postcodes may be referred to as second servo data.

[0034] The postcode is data indicating the amount of RRO (Repeatable RunOut) correction. More specifically, the postcode is data for correcting the positional deviation from the track center of the servo track 41, which is defined by the gray code and burst pattern. The degree of this positional deviation varies in synchronization with the rotation of the magnetic disk 11.

[0035] In the manufacturing process of the magnetic disk device 1a, the RRO is measured. Specifically, in the manufacturing process of the magnetic disk device 1a, the RRO is learned for each servo track 41, and the learned value of the RRO for each servo track 41 is stored as a postcode in the NAND 26. That is, the postcode is configured to include the learned value of the RRO defined for each servo track 41. An address is assigned to each of the postcodes stored in the NAND 26.

[0036] When the magnetic disk device 1a is in use, the positioning of the magnetic head 22 is controlled using the first servo data read from the magnetic disk 11 and the second servo data read from the NAND 26. Specifically, the estimated radial position of the magnetic head 22, calculated based on the cylinder address and burst offset, is corrected using the RRO correction value. In this way, the estimated radial position of the magnetic head 22 is corrected. Based on the corrected estimated position, the magnetic head 22 can be moved to the target data track.

[0037] Here, the technical significance of storing the second servo data in the NAND 26 in this embodiment will be explained in light of a comparative example.

[0038] In the magnetic disk drive of the comparative example, the second servo data is recorded on the magnetic disk. Specifically, in the magnetic disk drive of the comparative example, the second servo data is recorded on the servo sector of the magnetic disk in the order following the first servo data. The first servo data and the second servo data are read by the magnetic head when passing over the servo sector and are used for positioning control.

[0039] However, in magnetic disk drives, read errors can occur on the magnetic disk. For example, if a read error occurs in servo data, the magnetic disk rotates once and a retry process is performed to attempt to read the servo data again from the same position. This waiting time for the magnetic disk to rotate reduces the access performance to the magnetic disk. In the magnetic disk drive of the comparative example, all servo data is recorded on the servo sector, so read errors occur quite frequently.

[0040] In contrast, in the magnetic disk device 1a of the first embodiment, second servo data, which is part of the servo data, is stored in the NAND 26. This makes it possible to avoid read errors relating to at least the second servo data. This reduces the frequency of read errors compared to the magnetic disk device of the comparative example, thereby improving the performance of accessing the magnetic disk.

[0041] Note that data other than the second servo data may be stored in the NAND 26. For example, when the power supplied from the host 2 is cut off due to a power outage or the like, the data stored in the DRAM 25a may be saved in the NAND 26.

[0042] The NAND interface 32a is an interface circuit that controls the operation of the NAND 26. The NAND interface 32a performs a read process of the second servo data from the NAND 26 in accordance with a read request from the CPU 36, for example, and transfers the read second servo data to the DRAM 25a.

[0043] Specifically, the NAND interface 32 a includes a register 321 a, a buffer memory 322, a buffer management unit 323 a, and a DMA controller 324.

[0044] The register 321a holds the start address value of the second servo data to be read, the size of one track, and the address of the DRAM 25a to which the second servo data is to be transferred.

[0045] The buffer memory 322 temporarily stores the second servo data read from the NAND 26 .

[0046] The buffer management 323a manages the buffer memory 322. When the buffer management 323a detects that the second servo data to be read is held in the buffer memory 322, the buffer management 323a outputs a data transfer request to the DMA controller 324.

[0047] The DMA controller 324 obtains from the register 321a the start address value of the second servo data, the size of one track of the second servo data, and the address of the DRAM 25a to which the second servo data is to be transferred. The DMA controller 324 executes a read request for the second servo data to the NAND 26. Furthermore, upon receiving a data transfer request from the buffer management 323a, the DMA controller 324 starts transferring the second servo data from the buffer memory 322 to the DRAM 25a. When the transfer of the second servo data is completed, the DMA controller 324 notifies the CPU 36 of the end of the transfer.

[0048] The DRAM controller 33 is an interface circuit that controls the operation of the DRAM 25a, and performs read / write processing on the DRAM 25a in accordance with a read request / write request from the CPU .

[0049] The DRAM controller 33 includes an arbiter 331. When there is a conflict in access to the DRAM 25a from each unit, the arbiter 331 arbitrates the access rights to the DRAM 25a using a specified method, thereby controlling the order of access to the DRAM 25a.

[0050] The DRAM controller 33 is connected to the DRAM 25a.

[0051] The DRAM 25 a includes a user data buffer 251 and a second servo data buffer 253 .

[0052] The user data buffer 251 is used as a buffer for data etc. sent and received between the host 2. Specifically, the user data buffer 251 is configured to be able to temporarily store data to be written, data read from the magnetic disk 11, etc.

[0053] The second servo data buffer 253 is configured to be able to temporarily store the second servo data transferred from the NAND 26 .

[0054] The HDC 34 controls the transmission and reception of data to and from the host 2 (see FIG. 1) via the I / F bus, and controls the DRAM 25a.

[0055] The RWC 35 modulates the data to be written, which is supplied from the HDC 34, and supplies the modulated data to the preamplifier 23 (see FIG. 1). The RWC 35 also demodulates the signal read from the magnetic disk 11 and supplied from the preamplifier 23, and outputs the demodulated data to the HDC 34 as digital data. The RWC 35 also outputs the signal read from the magnetic disk 11 and supplied from the preamplifier 23 to the CPU 36 via the SVC 21. Specifically, for example, the RWC 35 receives first servo data read from the magnetic disk 11 from the preamplifier 23, and outputs the data to the CPU 36.

[0056] The HDC 34 and RWC 35 are communicably connected to the DRAM controller 33 using a communication protocol conforming to the SATA (Serial ATA) or SAS (Serial Attached SCSI) standard, for example.

[0057] The SVC 21 is an integrated circuit that functions as a driver for driving the SPM 12 and the VCM 16. The SVC 21 controls the rotation of the SPM 12 and the VCM 16. The SVC 21 also outputs the first servo data and the like output from the RWC 35 to the CPU 36.

[0058] The CPU 36 performs overall control of the SoC 31a in accordance with a firmware program. The CPU 36 has a Tightly-Coupled Memory (TCM) 361, which is a dedicated storage area, and can access various commands and data stored in the TCM 361. For example, the CPU 36 controls the positioning of the magnetic head 22 using first servo data read from the magnetic disk 11 and stored in the TCM 361 via the RWC 35, and second servo data read from the NAND 26 and stored in the TCM 361 via the DRAM 25a.

[0059] The CPU 36 is communicably connected to each unit via a bus 37 using a communication protocol such as AXI (Advanced eXtensible Interface).

[0060] The line cache controller 38 is provided between the bus 37 and the DRAM controller 33. The line cache controller 38 has a line cache function that temporarily stores addresses corresponding to various commands from the CPU 36 to the DRAM 25a, such as reading servo data. The servo data read from the DRAM 25a is transferred to the TCM 361 via the line cache controller 38 and the bus 37.

[0061] 3 is an example, and does not necessarily include all of the components shown in Fig. 3, or may include other components. For example, the SoC 31a may have a DMA controller (not shown) between the DRAM controller 33 and the CPU 36, and the DMA controller (not shown) may read the second servo data from the DRAM 25a instead of the CPU 36.

[0062] Next, the flow of the servo data acquisition process in the first embodiment will be described with reference to Fig. 4. The servo data acquisition process is performed as part of the servo process.

[0063] FIG. 4 is a flowchart showing an example of the flow of the servo data acquisition process according to the first embodiment.

[0064] Prior to the processing of step 11, the magnetic head 22 starts a seek operation. As described above, servo sectors SV are arranged at predetermined intervals in the circumferential direction of the magnetic disk 11. When the magnetic head 22 passes over one servo sector SV, it reads the first servo data recorded in that servo sector SV. The read first servo data is stored in the TCM 361 of the CPU 36 via the RWC 35 and the SVC 21.

[0065] The CPU 36 acquires the first servo data from the TCM 361 (step S11).

[0066] In the subsequent processing from step S12 onwards, the CPU 36 acquires second servo data corresponding to the first servo data from the NAND 26 based on the first servo data.

[0067] Specifically, the CPU 36 identifies the servo track 41 to be subjected to RRO correction based on the first servo data (step S12). More specifically, the CPU 36 identifies the servo track 41 to be subjected to RRO correction based on the Gray code.

[0068] The servo track 41 may be identified, for example, at the timing when the access command received from the host 2 is reordered.

[0069] The CPU 36 specifies the start address value, the size of one track, and the address of the DRAM 25a to be transferred of the second servo data corresponding to the servo track 41 to be corrected, in the register 321a of the NAND interface 32a (step S13).

[0070] The CPU 36 activates the DMA controller 324 (step S14).

[0071] The DMA controller 324 issues a read request for the second servo data to the NAND 26 (step S15).

[0072] The buffer memory 322 temporarily stores the read second servo data (step S16).

[0073] When the buffer management 323a detects that the second servo data to be read is held in the buffer memory 322, it outputs a data transfer request to the DMA controller 324 (step S17).

[0074] When the DMA controller 324 receives the data transfer request, it transfers the second servo data from the buffer memory 322 to the DRAM 25a (step S18). When the transfer of the second servo data is completed, the DMA controller 324 notifies the CPU 36 of the end of the transfer.

[0075] The CPU 36 receives the notification of the transfer completion and detects an interrupt to the DRAM 25a (step S19). The CPU 36 issues a read request to the DRAM 25a using the line cache function (step S20). As a result, the second servo data read from the DRAM 25a is transferred to the TCM 361 (step S21). The CPU 36 acquires the second servo data (step S22).

[0076] The above processing completes the servo data acquisition processing according to embodiment 1. The CPU 36 controls the positioning of the magnetic head 22 using the acquired first servo data and second servo data.

[0077] (Overview) The magnetic disk device 1a of the first embodiment includes a magnetic disk 11 that stores first servo data in servo sectors SV, a NAND 26 that stores second servo data, a magnetic head 22 that writes and reads data to and from the magnetic disk 11, a DRAM 25a that can store data to be written and data read from the magnetic disk, and an SoC 31a. When the magnetic head 22 passes over a servo sector SV, the SoC 31a reads the first servo data and obtains second servo data corresponding to the first servo data from the NAND 26. The SoC 31a controls the positioning of the magnetic head 22 using the first servo data and the second servo data.

[0078] In this way, by storing the second servo data in the NAND 26, the SoC 31a can acquire the second servo data without accessing the magnetic disk 11. This reduces the amount of servo data read from the magnetic disk 11, thereby reducing the frequency of read errors. As a result, stable servo processing can be achieved.

[0079] (Embodiment 2) A magnetic disk device 1b of the second embodiment will be described below with reference to Fig. 5. The magnetic disk device 1a of the first embodiment executes servo processing by storing second servo data read from the NAND 26 in the DRAM 25a and transferring the second servo data from the DRAM 25a to the TCM 361. The magnetic disk device 1b of the second embodiment differs from the first embodiment in that the second servo data read from the NAND 26 is transferred directly to the TCM 361 without going through the DRAM.

[0080] 5 is a block diagram showing an example of the configuration of an SoC 31b according to embodiment 2. In the following, when the configuration and functions are similar to those of embodiment 1, the description thereof may be omitted.

[0081] 5, in the SoC 31b of the second embodiment, the DRAM 25b does not have a second servo data buffer. As described above, the user data buffer 251 stores data to be read / written.

[0082] The NAND interface 32b reads the second servo data from the NAND 26 and transfers the read second servo data to the TCM 361 without passing through the DRAM 25a.

[0083] Specifically, the register 321b of the NAND interface 32b holds the start address value of the second servo data to be read, the size of one track, and the address of the TCM 361 to which the second servo data is to be transferred.

[0084] When the buffer management 323 b detects that the second servo data to be read is held in the buffer memory 322 , it outputs a data transfer request to the DMA controller 324 .

[0085] The DMA controller 324 obtains from the register 321b the start address value of the second servo data, the size of one track of the second servo data, and the address of the TCM 361 to which the second servo data is to be transferred. The DMA controller 324 executes a read request for the second servo data to the NAND 26. Furthermore, upon receiving a data transfer request from the buffer management 323b, the DMA controller 324 starts transferring the second servo data from the buffer memory 322 to the TCM 361. When the transfer of the second servo data is completed, the DMA controller 324 notifies the CPU 36 of the end of the transfer.

[0086] Next, the flow of the servo data acquisition process in the second embodiment will be described with reference to FIG.

[0087] FIG. 6 is a flowchart showing an example of the flow of the servo data acquisition process according to the second embodiment.

[0088] The magnetic head 22 starts a seek operation prior to the processing of step 31. The first servo data read by the magnetic head 22 is stored in the TCM 361 of the CPU .

[0089] The CPU 36 acquires the first servo data from the TCM 361 (step S31).

[0090] In the subsequent processing from step S22 onwards, the CPU 36 acquires second servo data corresponding to the first servo data from the NAND 26 based on the first servo data.

[0091] Specifically, the CPU 36 identifies the servo track 41 to be subjected to RRO correction based on the first servo data (step S32).

[0092] The CPU 36 specifies the start address value, the size of one track, and the address of the TCM 361 to be stored in the register 321a of the NAND interface 32a of the second servo data corresponding to the servo track 41 to be corrected (step S33).

[0093] The subsequent processing from steps S34 to S37 corresponds to the processing from steps S14 to S17 in FIG. 4, and therefore a description thereof will be omitted.

[0094] After step S37, when the DMA controller 324 receives a data transfer request from the buffer management 323b, it transfers the second servo data from the buffer memory 322 to the TCM 361 without passing through the DRAM 25b (step S38). When the transfer of the second servo data is completed, the DMA controller 324 notifies the CPU 36 of the end of the transfer.

[0095] Upon receiving the notification of the end of transfer, the CPU 36 detects an interrupt to the TCM 361 (step S39). The CPU 36 acquires the second servo data (step S40).

[0096] The above processing completes the servo data acquisition processing according to embodiment 2. The CPU 36 controls the positioning of the magnetic head 22 using the acquired first servo data and second servo data.

[0097] (Overview) When multiple modules access the DRAM, wait times for read / write operations can occur. DRAM itself also has latency as a characteristic. Therefore, if access to obtain servo data in the DRAM overlaps with access for normal operations other than obtaining servo data, the processing speed of servo processing can decrease.

[0098] The magnetic disk device 1b of the second embodiment acquires the second servo data read from the NAND 26 without going through the DRAM 25b, and uses the data to control the positioning of the magnetic head 22. This avoids the occurrence of waiting time in the DRAM 25b, and enables high-speed servo processing.

[0099] (Other embodiments) In the above embodiment, the second servo data is described as being stored in the NAND 26, but the storage location of the second servo data is not limited to the NAND 26, and the second servo data may be stored in another nonvolatile memory.

[0100] In the above-described embodiment, the magnetic disk device may be provided with a cache memory such as an SRAM (Static Random Access Memory). For example, if the storage capacity of the TCM 361 is insufficient, the SRAM may be used as a secondary cache.

[0101] Although the embodiments of the present invention have been described above, they are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the inventions and their equivalents as defined in the claims. [Explanation of symbols]

[0102] 1a, 1b magnetic disk device, 2 host, 11 magnetic disk, 12 spindle motor, 15 actuator arm, 16 VCM, 21 SVC, 22 magnetic head, 23 preamplifier, 24 FROM, 25a, 25b DRAM, 26 NAND, 31a, 31b SoC, 32a, 32b NAND interface, 33 DRAM controller, 34 HDC, 35 RWC, 36 CPU, 41 servo track, SV servo sector.

Claims

1. a magnetic disk on which servo sectors in which first servo data are recorded are formed; a magnetic head for writing and reading data to and from the magnetic disk; a first memory capable of storing data to be written and data read from the magnetic disk; a second memory for storing second servo data; acquiring, from the second memory, the second servo data corresponding to the first servo data based on the first servo data read by the magnetic head when passing over the servo sector; a controller that performs positioning control of the magnetic head using the first servo data and the second servo data; A magnetic disk device comprising:

2. The controller storing the second servo data acquired from the second memory in the first memory; performing positioning control of the magnetic head using the first servo data and the second servo data stored in the first memory; 2. The magnetic disk drive according to claim 1.

3. The controller The second servo data obtained from the second memory is obtained without going through the first memory, and positioning control of the magnetic head is performed.

2. The magnetic disk drive according to claim 1.

4. The controller an interface circuit for controlling the operation of the second memory; causing the interface circuit to read the second servo data; acquiring the second servo data from the interface circuit without passing through the first memory; 4. The magnetic disk drive according to claim 3.

5. The second servo data is Data indicating the amount of RRO correction.

2. The magnetic disk drive according to claim 1.

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