Light detection device

Abstract

To provide a light detection device capable of preventing decrease in a saturation charge amount and reducing or suppressing parasitic light sensitivity.SOLUTION: A light detection device includes: a plurality of photoelectric conversion units that are arranged adjacent to each other along a light incident surface for each pixel and accumulate charges photoelectrically converted according to a light amount of incident light from the light incident surface; a light shielding unit that is arranged substantially parallel to the light incident surface inside the plurality of photoelectric conversion units; and a charge holding unit that is arranged on a side opposite to the light incident surface of the plurality of photoelectric conversion units, being arranged at a place at least partially overlapping the light shielding unit in a plan view, and holds the charges.SELECTED DRAWING: Figure 2A

Description

[Technical Field]

[0001] The present disclosure relates to a light detection device. [Background technology]

[0002] There is known a global shutter imaging device that starts exposure for all pixels simultaneously, stores the charge generated by the exposure in a charge storage unit, and then transfers the charge from the charge storage unit to a floating diffusion region for each pixel row to generate a pixel signal (see Patent Documents 1 and 2).

[0003] Advances in microfabrication technology have led to an increase in the number of pixels in imaging devices, resulting in a corresponding decrease in pixel size. For example, Patent Document 1 discloses a structure in which two photoelectric conversion units and two charge storage units are provided within one pixel. Providing two photoelectric conversion units in each pixel also makes it possible to detect a phase difference signal.

[0004] Furthermore, Patent Document 2 discloses a configuration in which two photoelectric conversion units and one charge holding unit are provided within one pixel. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2021-117648 [Patent Document 2] Japanese Patent Application Laid-Open No. 2013-172210 Summary of the Invention [Problem to be solved by the invention]

[0006] When two photoelectric conversion units and two charge storage units are provided in each pixel as in Patent Document 1, the size of the charge storage units becomes small, making it difficult to efficiently store the charges photoelectrically converted by the photoelectric conversion units in the charge storage units. In particular, a horizontal light-shielding member may be disposed on the photoelectric conversion unit of each pixel, closer to the light incident surface than the charge storage unit and approximately parallel to the light incident surface, to prevent incident light from the light incident surface from being directly incident on the charge storage unit without being photoelectrically converted by the photoelectric conversion unit. The horizontal light-shielding member makes it difficult for the charges photoelectrically converted by the photoelectric conversion units to reach the charge storage unit. Therefore, when the size of the charge storage unit is halved as in Patent Document 1, the charge stored in the charge storage unit decreases, resulting in a decrease in the saturation charge Qs and a deterioration in parasitic light sensitivity (PLS), which may degrade the quality of the captured image.

[0007] Furthermore, Patent Document 2 does not disclose the horizontal shading member described above, does not recognize the above-mentioned problems that may arise when a horizontal shading member is provided, and does not disclose any measures to solve these problems.

[0008] Therefore, the present disclosure provides a photodetector that can prevent a decrease in the amount of saturated charge and reduce or suppress parasitic photosensitivity. [Means for solving the problem]

[0009] In order to solve the above problems, according to the present disclosure, there is provided a pixel pixel including: a plurality of photoelectric conversion units that are arranged adjacent to each other along a light incident surface, and that respectively accumulate charges photoelectrically converted in accordance with the amount of light incident from the light incident surface; a light-shielding portion disposed substantially parallel to the light incident surface inside the plurality of photoelectric conversion portions; a charge retention unit that is disposed on the opposite side of the light incident surface of the plurality of photoelectric conversion units and that is disposed at a location that at least partially overlaps with the light blocking unit in a plan view, and that retains the charges; A light detection device is provided.

[0010] The charge holding section may hold charges photoelectrically converted by each of the plurality of photoelectric conversion sections.

[0011] The charge holding portion may be disposed across the plurality of photoelectric conversion portions.

[0012] The light-shielding portion may be disposed directly below the charge-holding portion when viewed from the light-incident surface side.

[0013] The light-shielding portion may be arranged along a crystal plane represented by a plane index (111).

[0014] A plurality of the light-shielding portions may be disposed at different depths of the plurality of photoelectric conversion portions.

[0015] the plurality of photoelectric conversion units include a first photoelectric conversion unit and a second photoelectric conversion unit, The light-shielding portion may be disposed substantially parallel to the light incident surface inside the first photoelectric conversion portion and the second photoelectric conversion portion, and may be disposed across the first photoelectric conversion portion and the second photoelectric conversion portion.

[0016] a pixel separating section disposed along a boundary between the light-shielding section, the first photoelectric conversion section, and the second photoelectric conversion section; The light blocking portion may be joined to the pixel separating portion.

[0017] The pixel separator may include a light-shielding material.

[0018] The pixel separating portion may be made of a material having at least one of a light absorptance and a light reflectance lower than that of the light blocking portion.

[0019] The material may include an insulating material, a metallic material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material.

[0020] The first photoelectric conversion section and the second photoelectric conversion section may have the same volume.

[0021] The first photoelectric conversion section may have a larger volume than the second photoelectric conversion section.

[0022] The device may also include a floating diffusion region in which charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred, and charges photoelectrically converted in the second photoelectric conversion unit are transferred without being held in the charge holding unit.

[0023] a plurality of pixels each including the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; an exposure period of the first photoelectric conversion unit in each of the plurality of pixels is longer than an exposure period of the second photoelectric conversion unit; the charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred to the floating diffusion region; The charges photoelectrically converted in the second photoelectric conversion unit may be transferred to the floating diffusion region without being held in the charge holding unit.

[0024] an amplifying transistor that generates a pixel signal according to the charge transferred to the floating diffusion region; a selection transistor that selects whether or not the pixel signal is to be output to a signal line; a reset transistor that switches whether or not the voltage level of the signal line is fed back to the gate of the amplifying transistor; The amplifier may further include a switching circuit that switches between connecting a first current source to the signal line, the first current source supplying a first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line to a second reference voltage node, and connecting a second current source to the signal line, the second current source supplying a second reference voltage having a voltage level lower than the first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line between the drain and source of the reset transistor.

[0025] When the reset transistor is turned on, a second reference voltage having a voltage level lower than the first reference voltage is supplied to the drain of the amplifier transistor, and the second current source is connected to the signal line; When the reset transistor is turned off, the first reference voltage may be supplied to the drain of the amplifier transistor, and the first current source may be connected to the signal line.

[0026] a plurality of the pixels, each of which has the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; The device may include a control unit that alternatively selects between a first mode in which a global shutter operation is performed in which exposure is started simultaneously in the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels and the resulting charge is held in the charge holding unit, and a second mode in which a global shutter operation is performed in which exposure is started in the first photoelectric conversion unit in each of the plurality of pixels and the resulting charge is held in the charge holding unit, and then a global shutter operation is performed in which exposure is started in the second photoelectric conversion unit and the resulting charge is held in the charge holding unit.

[0027] a floating diffusion region to which the charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred, and to which the charges photoelectrically converted in the second photoelectric conversion unit are held in the charge holding unit and then transferred; a plurality of the pixels, each of which has the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; a control unit that alternatively selects either a first mode in which a global shutter operation is performed in which the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels simultaneously start exposure and the resulting charge is held in the charge holding unit, or a second mode in which the first photoelectric conversion unit in each of the plurality of pixels starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit, and then the second photoelectric conversion unit starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit; The image pickup device may further include a defocus amount calculation unit that, in the second mode, detects an image plane phase difference signal based on a pixel signal corresponding to the charge photoelectrically converted by the first photoelectric conversion unit and transferred to the floating diffusion region, and a pixel signal corresponding to the charge photoelectrically converted by the second photoelectric conversion unit and transferred to the floating diffusion region. [Brief explanation of the drawings]

[0028] [Figure 1] 1 is a block diagram showing the overall configuration of a photodetector according to a first embodiment of the present disclosure. [Figure 2A] FIG. 2 is a cross-sectional view of one pixel of the photodetector according to the first embodiment. [Figure 2B] FIG. 2B is a cross-sectional view according to a modification of FIG. 2A. [Figure 3] FIG. 10 is a cross-sectional view of one pixel of a photodetector according to a comparative example. [Figure 4] FIG. 2 is a circuit diagram of one pixel of the photodetector according to the first embodiment. [Figure 5] FIG. 2 is a diagram schematically illustrating charge transfer within a pixel according to the first embodiment. [Figure 6A] FIG. 6 is a diagram explaining the charge transfer procedure using the same schematic diagram as FIG. 5. [Figure 6B] FIG. 6B is a diagram illustrating the procedure following FIG. 6A. [Figure 6C] FIG. 6B is a diagram illustrating the procedure following FIG. 6B. [Figure 6D] FIG. 6B is a diagram illustrating the procedure following FIG. 6C. [Figure 6E] FIG. 6B is a diagram illustrating the procedure following FIG. 6D. [Figure 6F] FIG. 6B is a diagram illustrating the procedure following FIG. 6E. [Figure 7] FIG. 10 is a timing chart showing the timing of transferring accumulated charges in the long-term accumulation PD and short-term accumulation PD of each pixel. [Figure 8] FIG. 7 is a timing chart showing the readout timing of pixel signals for one frame corresponding to the charge transfer procedure shown in FIGS. 6A to 6F. [Figure 9] FIG. 6 is a circuit diagram of each pixel included in a photodetector according to a second embodiment. [Figure 10]FIG. 10 is a diagram showing the correspondence relationship between the voltage of the vertical signal line and the voltage of the floating diffusion region FD. [Figure 11] 11A to 11C are diagrams for explaining a first mode and a second mode. [Figure 12] 12A to 12C are diagrams for explaining the alternative selection of either the first mode or the third mode in which image plane phase difference detection is performed. [Figure 13] FIG. 10 is a circuit diagram of a pixel for realizing the third mode. [Figure 14] FIG. 10 is a circuit diagram of a pixel according to a modified example for realizing the third mode. [Figure 15] 15A to 15C are diagrams for explaining charge transfer in first to third modes. [Figure 16] FIG. 10 is a diagram illustrating a photodetector according to a third embodiment. [Figure 17] 17A and 17B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a fourth embodiment. [Figure 18] 18A and 18B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a first modified example of the fourth embodiment. [Figure 19] 19A and 19B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a second modified example of the fourth embodiment. [Figure 20] 20A and 20B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a third modified example of the fourth embodiment. [Figure 21] 21A and 21B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a fourth modified example of the fourth embodiment. [Figure 22] 22A and 22B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a fifth modified example of the fourth embodiment. [Figure 23] 23A and 23B are a longitudinal sectional view and a transverse sectional view of a photodetector according to a sixth modified example of the fourth embodiment. [Figure 24] 24A and 24B are a longitudinal sectional view and a planar layout view of a photodetector according to a comparative example of FIG. 23; [Figure 25A] 3A to 3C are manufacturing process diagrams sequentially explaining the manufacturing process of each pixel of the photodetector device according to the first embodiment. [Figure 25B] A manufacturing process diagram following FIG. 25A. [Figure 25C] A manufacturing process diagram following Figure 25B. [Figure 25D] Manufacturing process diagram following Figure 25C. [Figure 25E] A manufacturing process diagram following Figure 25D. [Figure 25F] Manufacturing process diagram following Figure 25E. [Figure 25G] Manufacturing process diagram following Figure 25F. [Figure 25H] Manufacturing process diagram following Figure 25G. [Figure 25I] Manufacturing process diagram continuing from Figure 25H. [Figure 25J] Manufacturing process diagram following Figure 25I. [Figure 25K] Manufacturing process diagram following Figure 25J. [Figure 25L] Manufacturing process diagram following Figure 25K. [Figure 25M] Manufacturing process diagram continuing from Figure 25L. [Figure 25N] Manufacturing process diagram continuing from Figure 25M. [Figure 25O] Manufacturing process diagram following Figure 25N. [Figure 25P] Manufacturing process diagram following Figure 25O. [Figure 26] FIG. 1 is a block diagram showing an example of a schematic configuration of a vehicle control system. [Figure 27] FIG. 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, an embodiment of the photodetector of the present disclosure will be described with reference to the drawings. The following description will focus on the main components of the photodetector of the present disclosure, but the photodetector of the present disclosure may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0030] (First embodiment) (Overall configuration of the photodetector) FIG. 1 is a block diagram showing the overall configuration of a photodetector 1 according to a first embodiment of the present disclosure.

[0031] The photodetector 1 according to the first embodiment is a back-illuminated image sensor of a so-called global shutter type. The photodetector 1 captures an image by receiving light from a subject, photoelectrically converting the light, and generating an image signal.

[0032] The global shutter method is a method of performing global exposure in which exposure of all pixels is basically started and finished at the same time. Here, "all pixels" means all pixels that appear in an image, excluding dummy pixels and the like. Furthermore, if the time difference and image distortion are small enough to not be a problem, the global shutter method also includes a method in which global exposure is performed in units of multiple rows (for example, several tens of rows) rather than all pixels simultaneously, while the area in which global exposure is performed is moved. Furthermore, the global shutter method also includes a method in which global exposure is performed on pixels in a predetermined area, rather than on all pixels that appear in an image.

[0033] A back-illuminated image sensor is an image sensor configured such that a photoelectric conversion unit, such as a photoelectric conversion unit that receives light from a subject and converts it into an electrical signal, is located between a light incident surface onto which the light from the subject is incident and a wiring layer on which wiring such as transistors that drive each pixel is provided.

[0034] The photodetector 1 includes, for example, a pixel array section 2, a vertical drive section 3, a column processing section 4, a data storage section 5, a horizontal drive section 6, a system control section 7, and a signal processing section 8.

[0035] In the photodetector 1, a pixel array section 2 is formed on a semiconductor substrate. Peripheral circuits such as a vertical drive section 3, a column processing section 4, a data storage section 5, a horizontal drive section 6, a system control section 7, and a signal processing section 8 are formed on the same semiconductor substrate as the pixel array section 2, for example.

[0036] The pixel array section 2 has a plurality of sensor pixels 10, each including a photoelectric conversion section 11 that generates and accumulates electric charges according to the amount of light incident from a subject. Hereinafter, the sensor pixels 10 will be simply referred to as pixels 10.

[0037] 1, the pixels 10 are arranged in a first direction (e.g., row direction) X and a second direction (e.g., column direction) Y. In the pixel array section 2, for each pixel row made up of the pixels 10 arranged in a line in the first direction (e.g., row direction) X, a pixel 10 drive line 9 is wired along the first direction (e.g., row direction) X, and for each pixel column made up of the pixels 10 arranged in a line in the second direction (e.g., column direction) Y, a vertical signal line VSL is wired along the second direction (e.g., column direction) Y.

[0038] The vertical drive unit 3 includes a shift register, an address decoder, etc. The vertical drive unit 3 supplies signals etc. to the plurality of pixels 10 via the plurality of pixel 10 drive lines 9, thereby driving all of the plurality of pixels 10 in the pixel array unit 2 simultaneously or driving them on a pixel row basis.

[0039] The signals output from each unit pixel 10 in a pixel row selected and scanned by the vertical drive section 3 are supplied through each vertical signal line VSL to the column processing section 4. The column processing section 4 performs predetermined signal processing on the signals output from each unit pixel 10 in the selected row through the vertical signal line VSL for each pixel column in the pixel array section 2, and temporarily stores the pixel signals after the signal processing.

[0040] Specifically, the column processing unit 4 is composed of, for example, a shift register and an address decoder, and performs noise removal processing, correlated double sampling processing, A / D (Analog / Digital) conversion processing of analog pixel signals, etc. to generate digital pixel signals. The column processing unit 4 supplies the generated pixel signals to the signal processing unit 8.

[0041] The horizontal driving unit 6 is configured with a shift register, an address decoder, etc., and is configured to sequentially select unit circuits corresponding to pixel columns in the column processing unit 4. By selective scanning by this horizontal driving unit 6, pixel signals that have been signal-processed for each unit circuit in the column processing unit 4 are output to the signal processing unit 8 in sequence.

[0042] The system control unit 7 includes a timing generator that generates various timing signals, etc. The system control unit 7 controls the driving of the vertical driving unit 3, the column processing unit 4, and the horizontal driving unit 6 based on the timing signals generated by the timing generator.

[0043] The signal processing unit 8 performs signal processing such as arithmetic processing on the pixel signals supplied from the column processing unit 4 while temporarily storing data in the data storage unit 5 as necessary, and outputs an image signal made up of each pixel signal. As will be described later, the signal processing unit 8 may include a built-in defocus amount calculation unit that calculates a defocus amount based on an image plane phase difference signal detected at each pixel 10. Alternatively, a defocus amount calculation unit may be provided separately from the signal processing unit 8.

[0044] The data storage unit 5 temporarily stores data necessary for signal processing in the signal processing unit 8.

[0045] (Cross-sectional structure of the photodetector 1) FIG. 2A is a cross-sectional view of one pixel of the photodetector 1 according to the first embodiment. FIG. 2A illustrates the cross-sectional structure of the main components of one pixel. The photodetector 1 according to the first embodiment has a plurality of photoelectric conversion units 11 for each pixel 10. In this specification, an example in which two photoelectric conversion units 11 are provided for each pixel 10 will be described, but three or more photoelectric conversion units 11 may be provided for each pixel 10. In this specification, the two photoelectric conversion units 11 provided for each pixel 10 will be referred to as a first photoelectric conversion unit PD1 and a second photoelectric conversion unit PD2.

[0046] Each pixel 10 of the photodetector 1 according to this embodiment has a stacked structure, for example, in which a first substrate and a second substrate are stacked. The first substrate is disposed in the light incident direction, and the second substrate is disposed in the opposite direction to the light incident direction. FIG. 2A shows the cross-sectional structure of the first substrate. In this specification, the light incident surface of the first substrate is referred to as the back surface, and the surface of the second substrate opposite the contact surface with the first substrate is referred to as the front surface. The pixel array section 2 of FIG. 1 is primarily disposed on the first substrate. Peripheral circuits other than the pixel array section 2 of FIG. 1 are disposed on the second substrate. In this specification, the circuits disposed on the second substrate are collectively referred to as the logic circuit, the first substrate is sometimes referred to as the sensor chip, and the second substrate is sometimes referred to as the logic chip. The first substrate and the second substrate are bonded, for example, by a CCC (Coupler Connection), via, or bump.

[0047] The first substrate is, for example, a P-type silicon substrate 12, and each pixel includes two photoelectric conversion units 11 and a charge holding unit MEM. The photoelectric conversion units 11 and the charge holding unit MEM are, for example, semiconductor regions containing N-type impurities.

[0048] A plurality of pixels 10 in the pixel array section 2 are arranged on the first substrate, a color filter 14 is arranged on the light incident surface of the photoelectric conversion section 11 of each pixel 10, and an on-chip lens 15 is arranged on the color filter 14.

[0049] A pixel separating section 16 is provided along the boundary between the two photoelectric conversion sections 11. The pixel separating section 16 is formed of a light-shielding material such as tungsten. The pixel separating section 16 has a vertical light-shielding section 16V extending in the depth direction of the photoelectric conversion section 11 and a horizontal light-shielding section 16H extending in a direction substantially parallel to the light incident surface of the photoelectric conversion section 11. The horizontal light-shielding section 16H is joined to one end of the vertical light-shielding section 16V, so that the vertical cross section of the pixel separating section 16 has a T-shape. The horizontal light-shielding section 16H is disposed along a crystal plane of a silicon layer expressed, for example, by a plane index (111). The vertical light-shielding section 16V and the horizontal light-shielding section 16H each have a layered structure of an inner layer section 16a and an outer layer section 16b, for example. The inner layer section 16a is composed of a material containing at least one of a light-shielding elemental metal, a metal alloy, a metal nitride, and a metal silicide. More specifically, the inner layer 16a may be made of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum-iridium, titanium nitride (TiN), or a tungsten-silicon compound. Among these, aluminum (Al) is the most optically preferable material. The inner layer 16a may be made of graphite or an organic material. The outer layer 16b is made of an insulating material such as silicon oxide (SiOx). The outer layer 16b ensures electrical insulation between the inner layer 16a and the silicon substrate 12.

[0050] The surface of the boundary of the pixel 10 may be covered with a fixed charge film 17. The fixed charge film 17 has a negative fixed charge to suppress the generation of dark current due to the interface state of the back surface 12B, which is the light incident surface of the silicon substrate 12. An electric field induced by the fixed charge film 17 forms a hole accumulation layer near the back surface 12B of the silicon substrate 12. This hole accumulation layer suppresses the generation of electrons from the back surface 12B. The fixed charge film 17 is made of an insulating material such as HfO.

[0051] The charge holding unit MEM is disposed closer to the surface 12S than the horizontal light-shielding unit 16H. The charge holding unit MEM is disposed so as to straddle the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2, but the size of the charge holding unit MEM is arbitrary. The charge holding unit MEM is preferably disposed directly below the horizontal light-shielding unit 16H.

[0052] Both the charge holding unit MEM and the photoelectric conversion unit 11 are N-type semiconductor regions, and a semiconductor region containing P-type impurities is arranged around the photoelectric conversion unit 11. The charge holding unit MEM according to this embodiment is arranged on the opposite side of the light incident surface of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2, and is arranged in a location where it at least partially overlaps with the horizontal light-shielding unit 16H in plan view, and holds the accumulated charges of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2.

[0053] The charge storage unit MEM is connected to the wiring layer 19 through a contact or a via. The pixel transistor 36 is arranged around the wiring layer 19. The TRZ transistor, which is part of the pixel transistor, has a vertical gate electrode that extends to the photoelectric conversion unit 11. The wiring layer 19 and the pixel transistor are covered with an insulating layer 20. The second substrate described above is joined by CCC via Cu wiring (not shown) that is arranged on the insulating layer 20 (the bottom surface in FIG. 2A ).

[0054] FIG. 2B is a cross-sectional view of a modified example of FIG. 2A. In FIG. 2B, the size of the charge holding unit MEM is smaller than that of FIG. 2A. By reducing the size of the charge holding unit MEM, the upper surface of the charge holding unit MEM can be completely covered by the horizontal light-shielding portion 16H, and parasitic photosensitivity (PLS) can be further reduced or suppressed. Furthermore, even if the size of the charge holding unit MEM is reduced, the charge holding unit MEM has a sufficient size to be disposed across the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2, so that a saturation charge amount Qs sufficient to maintain imaging quality can be secured.

[0055] FIG. 3 is a cross-sectional view of one pixel of a photodetector 1 according to a comparative example. In the comparative example shown in FIG. 3, each pixel 10 has two photoelectric conversion units 11 and two charge holding units MEM. Pixel separation units 16 are disposed between the two photoelectric conversion units 11 and between the two charge holding units MEM. Therefore, each charge holding unit MEM can only hold the charge photoelectrically converted by the corresponding photoelectric conversion unit 11. Therefore, when the size of the charge holding unit MEM is reduced, the amount of charge held in the charge holding unit MEM decreases, and the saturation charge amount Qs decreases.

[0056] One way to increase the saturated charge amount Qs is to reduce the area of ​​the horizontal light-shielding portion 16H, but reducing the size of the horizontal light-shielding portion 16H increases the likelihood that incident light will be directly incident on the charge holding portion MEM, which increases noise and also increases or worsens parasitic light sensitivity.

[0057] In the first embodiment, as shown in Figures 2A and 2B, one charge holding unit MEM is provided to span two photoelectric conversion units 11, so there is no need to perform processing to divide the charge holding unit MEM into two, and the saturated charge amount Qs can be increased and parasitic photosensitivity can be reduced or suppressed.

[0058] (Circuit configuration of pixel 10) 4 is a circuit diagram of one pixel of the photodetector 1 according to the first embodiment. In this specification, at least a part of the pixel 10 may be referred to as a pixel circuit. Furthermore, a plurality of transistors included in the pixel circuit may be collectively referred to as pixel transistors.

[0059] As shown in FIG. 4, the pixel 10 according to the first embodiment has two photoelectric conversion units 11 (hereinafter referred to as the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2) corresponding to the first and second photoelectric conversion units PD1 and PD2, two TRZ transistors 21 (hereinafter referred to as the first TRZ transistor 21a and the second TRZ transistor 21b), an OFG transistor 22, a TRX transistor 23, a TRG transistor 24, a RST transistor 25, an AMP transistor 26, a SEL transistor 27, a charge holding unit MEM, and a floating diffusion region FD.

[0060] The first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are, for example, photodiodes. Charges photoelectrically converted by the first photoelectric conversion unit PD1 are sent to the TRX transistor 23 via the first TRZ transistor 21a. Charges photoelectrically converted by the second photoelectric conversion unit PD2 are sent to the TRX transistor 23 via the second TRZ transistor 21b. The OFG transistor 22 switches whether or not to discharge accumulated charges in at least one of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 to an overflow drain region (hereinafter, OFD).

[0061] The TRX transistor 23 switches whether or not the charges photoelectrically converted by the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are to be held in the charge holding unit MEM. The TRG transistor 24 switches whether or not the charges held in the charge holding unit MEM are to be transferred to the floating diffusion region FD. The RST transistor 25 switches whether or not the charges accumulated in the floating diffusion region FD are to be discharged to the power supply voltage VDD node. The AMP transistor 26 and the SEL transistor 27 form a source follower circuit, which generates a pixel signal at a voltage level corresponding to the charges accumulated in the floating diffusion region FD and outputs it to a vertical signal line.

[0062] The first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 may have the same exposure time or different exposure times. Depending on the situation, it is also possible to switch between long and short exposure times for the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2. Below, an example will be described in which the exposure time of the first photoelectric conversion unit PD1 is longer than the exposure time of the second photoelectric conversion unit PD2. In this specification, the first photoelectric conversion unit PD1 may be referred to as a long-accumulation PD, and the second photoelectric conversion unit PD2 may be referred to as a short-accumulation PD. The accumulated charges of the long-accumulation PD are held in the charge holding unit MEM and then transferred to the floating diffusion region FD, whereas the accumulated charges of the short-accumulation PD are transferred to the floating diffusion region FD without being held in the charge holding unit MEM.

[0063] (Procedure for transferring charge within pixel 10) Fig. 5 is a diagram schematically illustrating charge transfer within a pixel 10 according to the first embodiment. The cubes in Fig. 5 indicate the on or off state of each pixel transistor, with a high cube representing an off state and a low cube representing an on state. PD short in Fig. 5 indicates a short-accumulation PD, and PD long indicates a long-accumulation PD.

[0064] 6A to 6F are diagrams for explaining the procedure for charge transfer using the same schematic diagram as in Fig. 5, and Fig. 7 is a timing diagram showing the timing for transferring accumulated charges in the long-term accumulation PD and short-term accumulation PD of each pixel 10. Fig. 7 illustrates the timing at which the voltages of the gate of the first TRZ transistor 21a (called TRZ short), the gate of the second TRZ transistor 21b (called TRZ long), the gate OFG of the OFG transistor 22, the gate TRX of the TRX transistor 23, the gate TRG of the TRG transistor 24, the gate RST of the RST transistor 25, and the gate SEL of the SEL transistor 27 change.

[0065] As shown in Figure 7, in the initial state before exposure of each pixel 10 begins, the first TRZ transistor 21a, the second TRZ transistor 21b, the OFG transistor 22, and the RST transistor 25 are on, and the TRX transistor 23, the TRG transistor 24, and the SEL transistor 27 are off.

[0066] When the first TRZ transistor 21a is turned off at time t1, exposure of the long-term accumulation PD (first photoelectric conversion unit PD1) starts, as shown in Fig. 6A. On the other hand, the accumulated charge of the short-term accumulation PD (second photoelectric conversion unit PD2) is discharged to the OFD via the second TRZ transistor 21b and the OFG transistor 22. Therefore, at this point in time, exposure of the short-term accumulation PD does not start.

[0067] After that, when the second TRZ transistor 21b turns off at time t2, exposure of the short-term accumulation PD (second photoelectric conversion unit PD2) begins, as shown in Fig. 6B. In this state, the first TRZ transistor 21a, the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24 are all turned off, and the OFG transistor 22 and the RST transistor 25 are turned on. After that, at time t3, the OFG transistor 22 turns off.

[0068] After that, at time t4, the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24 are turned on. As a result, as shown in FIG. 6C, the accumulated charges in the short-term accumulation PD (second photoelectric conversion unit PD2) are transferred to the floating diffusion region FD via the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24.

[0069] After that, at time t5, the second TRZ transistor 21b and the TRG transistor 24 are turned off, thereby completing the charge transfer from the short-term charge accumulation PD to the floating diffusion region FD.

[0070] After that, at time t6, the first TRZ transistor 21a is turned on. As a result, as shown in FIG. 6D, the accumulated charge in the long-term accumulation PD (first photoelectric conversion unit PD1) is transferred to the charge holding unit MEM via the first TRZ transistor 21a and the TRX transistor 23. After that, at time t7, the first TRZ transistor 21a and the TRX transistor 23 are turned off. As a result, the transfer of charge from the long-term accumulation PD to the charge holding unit MEM ends.

[0071] After that, at time t8, the SEL transistor 27 is turned on. As a result, as shown in FIG. 6E, a pixel signal corresponding to the accumulated charge of the short-term accumulation PD held in the floating diffusion region FD is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. After that, at time t9, the RST transistor 25 is turned on. As a result, the accumulated charge in the floating diffusion region FD is discharged to the power supply voltage VDD node via the RST transistor 25, and the potential of the floating diffusion region FD becomes the reset level. At this time, since the SEL transistor 27 is on, a pixel signal of the reset level is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. After that, at time t10, the RST transistor 25 is turned off.

[0072] Then, at time t11, the TRG transistor 24 is turned on. As a result, the accumulated charge of the long-term accumulation PD held in the charge holding unit MEM is transferred to the floating diffusion region FD, as shown in FIG. 6F. At this time, the SEL transistor 27 is turned on, so a pixel signal corresponding to the accumulated charge of the long-term accumulation PD transferred to the floating diffusion region FD is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. Then, at time t12, the TRG transistor 24 is turned off, and the charge transfer from the charge holding unit MEM to the floating diffusion region FD ends. Then, at time t13, the SEL transistor 27 is turned off.

[0073] (Readout timing of pixel signals for one frame) FIG. 8 is a timing diagram of reading out pixel signals for one frame corresponding to the charge transfer procedures shown in FIGS. 6A to 6F. FIG. 8A is a plan view of the pixel array section 2, and FIG. 8B is a timing diagram for one frame. In FIG. 8A, for simplicity, the pixel array section 2 has 8 rows and 8 columns, but the pixel array section 2 may have any number of rows and columns. In the timing diagram of FIG. 8, each pixel 10 is divided into two, upper and lower, with the upper divided area being the second photoelectric conversion section PD2 (short-term accumulation PD) and the lower divided area being the first photoelectric conversion section PD1 (long-term accumulation PD).

[0074] When a new frame starts at time t21, the long-time accumulation PDs located in the divided region on the lower side of each pixel 10 start exposure all at once. At time t22, the short-time accumulation PDs located in the divided region on the upper side of each pixel 10 start exposure all at once.

[0075] At time t23, the short-term accumulation PDs located in the upper divided regions of the pixels 10 simultaneously transfer the accumulated charges of the short-term accumulation PDs to the floating diffusion region FD.

[0076] At time t24, the long-term accumulation PDs located in the divided regions on the lower side of each pixel 10 simultaneously transfer the accumulated charges of the long-term accumulation PDs to the charge holding units MEM.

[0077] At time t25, a pixel signal corresponding to the accumulated charge of the short-term accumulation PD on the first row is output from the floating diffusion region FD to the vertical signal line. Subsequently, at time t26, a pixel signal corresponding to the accumulated charge of the long-term accumulation PD on the first row is transferred from the charge holding unit MEM to the floating diffusion region FD, and a pixel signal corresponding to the accumulated charge of the floating diffusion region FD is output to the vertical signal line.

[0078] Thereafter, pixel signals according to the accumulated charges of the short-term accumulation PD are output to the vertical signal lines sequentially for each pixel row, and then pixel signals according to the accumulated charges of the long-term accumulation PD are output to the vertical signal lines.

[0079] As described above, in the first embodiment, two photoelectric conversion units 11 and one charge retention unit MEM are provided for each pixel 10, and the charge retention unit MEM is disposed directly below the horizontal light-shielding unit 16H, so that it is possible to reduce or suppress parasitic photosensitivity while increasing the saturated charge amount Qs. Furthermore, by setting one of the two photoelectric conversion units 11 as a long-accumulation PD and the other as a short-accumulation PD, it is possible to perform a global shutter operation for the long-accumulation PD and a rolling shutter operation for the short-accumulation PD for each pixel 10. Furthermore, since the long-accumulation PD has a longer exposure time than the short-accumulation PD, it is possible to realize HDR (High Dynamic Range) by reading out pixel signals by the long-accumulation PD and reading out pixel signals by the short-accumulation PD for each pixel 10.

[0080] (Second embodiment) At times t8 to t10 in FIG. 7, pixel signals corresponding to the accumulated charges of the short-term accumulation PD are read out, and then the reset level of the floating diffusion region FD is read out. The pixel signals of the signal levels read out during the period from times t8 to t9 contain kTC noise of the previous frame. On the other hand, the pixel signals of the reset level read out during the period from times t9 to t10 contain kTC noise of the current frame. Because these kTC noises are not necessarily the same, the kTC noises cannot be completely canceled out when CDS (Correlated Double Sampling) processing is performed in the signal processing unit 8 at the subsequent stage. Therefore, the second embodiment is characterized in that the kTC noise contained in the pixel signals of the signal levels read out during times t8 to t9 is fed back to the floating diffusion region FD.

[0081] Fig. 9 is a circuit diagram of each pixel 10 included in the photodetector 1 according to the second embodiment. In Fig. 9, components that are common to Fig. 4 are assigned the same reference numerals, and the following description will focus on the differences.

[0082] The pixel 10 according to the second embodiment shown in FIG. 9 has an RST transistor 25, a reference voltage switching circuit 28, and a current source switching circuit 29 that are connected in different locations from those in FIG.

[0083] One of the drain and source of the RST transistor 25 is connected to the floating diffusion region FD, and the other is connected to the vertical signal line. In the following, an example will be described in which the drain of the RST transistor 25 is connected to the vertical signal line, and the source is connected to the floating diffusion region FD.

[0084] The reference voltage switching circuit 28 switches whether the drain of the AMP transistor 26 is connected to the power supply voltage VDD node or to the ground voltage node. More specifically, the reference voltage switching circuit 28 has a first switch SW1 that switches whether the power supply voltage VDD node and the drain of the AMP transistor 26 are connected or not, and a second switch SW2 that switches whether the ground voltage node and the drain of the AMP transistor 26 are connected or not.

[0085] The current source switching circuit 29 switches the direction of current flowing through the vertical signal line. More specifically, the current source switching circuit 29 has a third switch SW3 that switches whether or not the current of the vertical signal line is to flow to the first current source 30a, and a fourth switch SW4 that switches whether or not the current from the second current source 30b is to flow to the vertical signal line.

[0086] The on / off of the RST transistor 25 and the on / off of the first to fourth switches SW1 to SW4 are linked. For example, when the RST transistor 25 is turned on, the second switch SW2 and the fourth switch SW4 are turned on, and the first switch SW1 and the third switch SW3 are turned off. When the RST transistor 25 is turned off, the second switch SW2 and the fourth switch SW4 are turned off, and the first switch SW1 and the third switch SW3 are turned on.

[0087] In this way, while the RST transistor 25 is off, the AMP transistor 26 and the SEL transistor 27 form a source follower circuit, and the vertical signal line has a voltage level corresponding to the voltage level of the floating diffusion region FD. On the other hand, when the RST transistor 25 is on, the AMP transistor 26 and the SEL transistor 27 form a common-source circuit, and the direction of change in the voltage level of the vertical signal line and the direction of change in the voltage level of the floating diffusion region FD are opposite to each other.

[0088] Figure 10 shows the voltage V VSL and the voltage V of the floating diffusion region FD FD 10 shows the characteristics of the common-source circuit, and the straight line w2 shows the input / output characteristics when the RST transistor 25 is turned on and the input / output of the common-source circuit is shorted. FD =V VSL By turning the RST transistor 25 on and then off, the voltage level of the floating diffusion region FD becomes the voltage level at the intersection of the curve w1 and the line w2, and the kTC noise contained in the pixel signal corresponding to the signal level can be reduced to 1 / (the gain of the common-source circuit).

[0089] As described above, in the second embodiment, the AMP transistor 26 and the SEL transistor 27, which are the final stage of the pixel circuit, are switched between a source follower circuit and a source-grounded circuit depending on the timing at which the RST transistor 25 is turned on or off, so that kTC noise contained in the pixel signal at the signal level can be removed with high precision.

[0090] (Third embodiment) The photodetector 1 according to the third embodiment has a circuit configuration similar to that of the pixel 10 in FIG. 4 or FIG.

[0091] The photodetector 1 according to the third embodiment is characterized in that it alternatively selects either a first mode in which exposure is started simultaneously in all pixels 10 to perform a global shutter operation for the same exposure period, or a second mode in which exposure is started simultaneously in the first photoelectric conversion units PD1 of each pixel 10 to perform a global shutter operation for the same exposure period, and then exposure is started simultaneously in the second photoelectric conversion units PD2 of each pixel 10 to perform a global shutter operation. The selection between the first mode and the second mode is performed, for example, by the system control unit 7 in FIG. 1.

[0092] FIG. 11 is a diagram illustrating the first mode and the second mode. More specifically, FIG. 11A is a diagram illustrating the first mode. When the first mode is selected, the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10 simultaneously start exposure and perform exposure for the same exposure period. The charges photoelectrically converted by the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10 are held in the charge holding unit MEM. In FIG. 11A, the charges held in the charge holding unit MEM and transferred simultaneously from the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are denoted as "A" for convenience.

[0093] The charge holding unit MEM holds the charges photoelectrically converted by the first photoelectric conversion unit PD1 and the charges photoelectrically converted by the second photoelectric conversion unit PD2. After that, for each pixel row, the charges held in the charge holding unit MEM are transferred to the floating diffusion region FD, and pixel signals corresponding to the charges held in the floating diffusion region FD are output to the vertical signal line in sequence for each pixel row.

[0094] Fig. 11B is a diagram illustrating a first example of the second mode, and Fig. 11C is a diagram illustrating a second example of the second mode. When the second mode is selected, either the first example or the second example is further selected.

[0095] In the first example, the readout order of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 is reversed between odd-numbered pixel rows and even-numbered pixel rows. In FIGS. 11B and 11C, the transfer of accumulated charges in the first photoelectric conversion unit PD1 to the charge storage unit MEM is denoted as "A," and the transfer of accumulated charges in the second photoelectric conversion unit PD2 to the charge storage unit MEM is denoted as "B." "AB" means that the accumulated charges in the first photoelectric conversion unit PD1 are transferred to the charge storage unit MEM, and then the accumulated charges in the second photoelectric conversion unit PD2 are transferred to the charge storage unit MEM. Similarly, "BA" means that the accumulated charges in the second photoelectric conversion unit PD2 are transferred to the charge storage unit MEM, and then the accumulated charges in the first photoelectric conversion unit PD1 are transferred to the charge storage unit MEM.

[0096] In odd-numbered pixel rows, the charges photoelectrically converted by the first photoelectric conversion unit PD1 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD, and then the charges photoelectrically converted by the second photoelectric conversion unit PD2 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD. In even-numbered pixel rows, the charges photoelectrically converted by the second photoelectric conversion unit PD2 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD, and then the charges photoelectrically converted by the first photoelectric conversion unit PD1 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD.

[0097] In the second example, in both odd-numbered and even-numbered pixel rows, the charges photoelectrically converted by the first photoelectric conversion unit PD1 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD, and then the charges photoelectrically converted by the second photoelectric conversion unit PD2 of each pixel 10 are held in the charge holding unit MEM and then transferred to the floating diffusion region FD.

[0098] In the second example, the charges photoelectrically converted by the second photoelectric conversion unit PD2 of each pixel 10 may be held in the charge holding unit MEM and then transferred to the floating diffusion region FD, and then the charges photoelectrically converted by the first photoelectric conversion unit PD1 of each pixel 10 may be held in the charge holding unit MEM and then transferred to the floating diffusion region FD.

[0099] In this way, in FIG. 11, when the first mode is selected, one global shutter operation is performed for each pixel 10, whereas when the second mode is selected, two global shutter operations are performed for each pixel 10.

[0100] Instead of the second mode, a third mode in which image plane phase difference detection is performed may be selectable.

[0101] Fig. 12 is a diagram illustrating the alternative selection of either the first mode described above or the third mode in which image plane phase difference detection is performed. More specifically, Fig. 12A is a diagram illustrating the first mode, which is the same as the first mode in Fig. 11A. Fig. 12B is a diagram illustrating a first example of the third mode, and Fig. 12C is a diagram illustrating a second example of the third mode.

[0102] In the first example of the third mode shown in Figure 12B, the accumulated charges are read out from the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 in the same order as in the first example of the second mode shown in Figure 11B, but the accumulated charges are not held in the charge holding unit MEM but are transferred to the floating diffusion region FD.

[0103] In the second example of the third mode shown in Figure 12B, the accumulated charges are read out from the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 in the same order as in the second example of the second mode shown in Figure 11C, but the accumulated charges are not held in the charge holding unit MEM but are transferred to the floating diffusion region FD.

[0104] In the third mode, in both the first and second examples, the charge obtained by starting exposure in the first photoelectric conversion unit PD1 in each of the multiple pixels is transferred to the floating diffusion region FD without being held in the charge holding unit MEM, and then the charge obtained by starting exposure in the second photoelectric conversion unit PD2 is transferred to the floating diffusion region FD without being held in the charge holding unit MEM. In the second mode, the signal processing unit 8 or the defocus amount calculation unit in Figure 1 detects an image plane phase difference signal based on a pixel signal corresponding to the charge photoelectrically converted in the first photoelectric conversion unit PD1 and transferred to the floating diffusion region FD, and a pixel signal corresponding to the charge photoelectrically converted in the second photoelectric conversion unit PD2 and transferred to the floating diffusion region FD.

[0105] Fig. 12 shows an example in which the first mode or the third mode is alternatively selected, but Fig. 11 and Fig. 12 may be combined to allow the second mode or the third mode to be alternatively selected, or alternatively, any one of the first to third modes may be alternatively selected.

[0106] Fig. 13 is a circuit diagram of a pixel 10 for realizing the third mode. Unlike the pixel 10 of Fig. 2, the pixel 10 of Fig. 13 has a first TRG transistor 24a, a first RST transistor 25a, a first AMP transistor 26a, a first SEL transistor 27a, and a first floating diffusion region FD1 for the first photoelectric conversion unit PD1, and a second TRG transistor 24b, a second RST transistor 25b, a second AMP transistor 26b, a second SEL transistor 27b, and a second floating diffusion region FD for the second photoelectric conversion unit PD2.

[0107] When the first TRZ transistor 21a, the TRX transistor 23, and the first TRG transistor 24a are all turned on, the accumulated charge in the first photoelectric conversion unit PD1 is transferred to the first floating diffusion region FD1 via the first TRZ transistor 21a, the first TRG transistor 24a, and the charge holding unit MEM.

[0108] When the second TRZ transistor 21b, the TRX transistor 23, and the second TRG transistor 24b are all turned on, the accumulated charge in the second photoelectric conversion unit PD2 is transferred to the second floating diffusion region FD via the second TRZ transistor 21b, the second TRG transistor 24b, and the charge holding unit MEM.

[0109] Fig. 14 is a circuit diagram of a pixel 10 according to a modified example for realizing the third mode. Unlike the pixel 10 of Fig. 2, the pixel 10 of Fig. 14 has a first RST transistor 25a, a first floating diffusion region FD1, and a first switching transistor 18a for the first photoelectric conversion unit PD1, and a second RST transistor 25b, a second floating diffusion region FD, and a second switching transistor 18b for the second photoelectric conversion unit PD2.

[0110] When the first TRZ transistor 21a, the TRX transistor 23, and the TRG transistor 24a are all turned on, the accumulated charge in the first photoelectric conversion unit PD1 is held in the first floating diffusion region FD1 via the first TRZ transistor 21a, the TRX transistor 23, the charge holding unit MEM, and the TRG transistor 24a. By turning on the first switching transistor 18a, the held charge in the first floating diffusion region FD1 is output to the vertical signal line VSL from a source follower circuit composed of the AMP transistor 26 and the SEL transistor 27.

[0111] When the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24b are all turned on, the accumulated charges in the second photoelectric conversion unit PD2 are held in the second floating diffusion region FD via the second TRZ transistor 21b, the TRX transistor 23, the charge holding unit MEM, and the TRG transistor 24b. By turning on the second switching transistor 18b, the held charges in the second floating diffusion region FD2 are output to the vertical signal line VSL from a source follower circuit composed of the AMP transistor 26 and the SEL transistor 27.

[0112] 15A and 15B are diagrams illustrating charge transfer in the first to third modes described above. FIG. 15A is a diagram illustrating charge transfer in the first mode. In the first mode, the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 in each pixel 10 simultaneously start and end exposure. The accumulated charges in the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are transferred to the charge storage unit MEM and then to the floating diffusion region FD.

[0113] 15B is a diagram illustrating the second mode. In the second mode, the accumulated charges in the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 in each pixel 10 are alternately transferred to the charge storage unit MEM and then transferred to the floating diffusion region FD.

[0114] 15C is a diagram illustrating the third mode. In the third mode, the accumulated charges in the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 in each pixel 10 are alternately transferred to the floating diffusion region FD. In the third mode, the charge storage unit MEM is not used.

[0115] As described above, in the second embodiment, a first mode in which a global shutter operation is performed by aligning the exposure start time and exposure period of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10, and a second mode in which a global shutter operation is performed by alternately exposing the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10, can be alternatively selected. Alternatively, in the second embodiment, a third mode in which phase difference detection is performed by alternately exposing the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10 is provided, allowing either the first mode or the third mode to be alternatively selected. Alternatively, any one of the first to third modes can be alternatively selected. This makes it possible to switch between global shutter operations with different resolutions and to perform image-plane phase difference detection as necessary, thereby realizing a highly useful photodetector 1.

[0116] (Third embodiment) 16 is a diagram illustrating a photodetector 1 according to a third embodiment. The photodetector 1 according to the third embodiment includes pixels 10 having a circuit configuration shown in FIG. 4, for example. In the third embodiment, similar to the second mode shown in FIG. 15B, an operation of transferring accumulated charges in the first photoelectric conversion unit PD1 in each pixel 10 to the charge holding unit MEM and an operation of transferring accumulated charges in the second photoelectric conversion unit PD2 to the charge holding unit MEM are performed alternately.

[0117] After the accumulated charge in the first photoelectric conversion unit PD1 is transferred to the charge holding unit MEM, the held charge in the charge holding unit MEM is transferred to the floating diffusion region FD, and exposure can be performed in the second photoelectric conversion unit PD2 while the pixel signals are read out for each pixel row.

[0118] In low illuminance situations, it is necessary to extend the exposure period as long as possible. According to the third embodiment, as shown in Fig. 16, exposure and charge readout of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are performed alternately, so that the exposure period of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 can be extended to 1 / 30 seconds, double the normal period, while the frame rate is set to 1 / 60 seconds, the same as normal.

[0119] This makes it possible to generate images captured with twice the exposure period without changing the frame rate, even in low-light conditions, thereby improving the image quality of images captured in low-light conditions without changing the frame rate.

[0120] (Fourth embodiment) Various variations are possible for the structure of the photodetector 1 according to the first to third embodiments. Fig. 17 shows a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetector 1 according to the fourth embodiment. Fig. 17A is a longitudinal cross-sectional view of the photodetector 1 according to the fourth embodiment, and Fig. 17B is a transverse cross-sectional view taken along lines AA, BB, and CC in Fig. 17A.

[0121] 1B, an example is shown in which horizontal light-shielding portion 16H has a diamond-shaped cross-sectional shape, but the cross-sectional shape of horizontal light-shielding portion 16H is arbitrary. The cross-sectional shape of horizontal light-shielding portion 16H depends on the crystal plane direction of photoelectric conversion portion 11, the etching time when forming the trench for horizontal light-shielding portion 16H, the location of the etch stop layer, etc.

[0122] As shown in the cross-sectional view of line CC in Fig. 17B, the first TRZ transistor 21a, the second TRZ transistor 21b, the TRX transistor 23, the TRG transistor 24, the floating diffusion region FD, etc. are arranged directly below the charge holding unit MEM. A wiring layer not shown in Fig. 17A is arranged directly below the line CC in Fig. 17B.

[0123] In FIG. 17, a plurality of horizontal light-shielding portions 16H may be provided at different depths in the first and second photoelectric conversion portions PD1 and PD2.

[0124] Fig. 18 shows a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetector 1 according to a first modified example of the fourth embodiment. Fig. 18A is a longitudinal cross-sectional view of the photodetector 1 according to the first modified example, and Fig. 18B is a transverse cross-sectional view taken along lines AA, BB, CC, and DD in Fig. 18A.

[0125] In FIG. 18, two horizontal light-shielding portions 16H are provided at different depths of the first and second photoelectric conversion units PD1 and PD2. Three or more horizontal light-shielding portions 16H may be provided. Furthermore, the shape and size of each horizontal light-shielding portion 16H are arbitrary. In FIG. 18, since two horizontal light-shielding portions 16H are provided, the possibility that incident light will be directly incident on the charge holding unit MEM is further reduced.

[0126] FIG. 19 shows longitudinal and transverse cross-sectional views of a photodetector 1 according to a second modification of the fourth embodiment. FIG. 19A shows a longitudinal cross-sectional view of the photodetector 1 according to the second modification, and FIG. 19B shows transverse cross-sectional views taken along lines AA, BB, and CC in FIG. 19A. The photodetector 1 according to the second modification has a vertical support 16V1 that supports the horizontal light-shielding portion 16H instead of the vertical light-shielding portion 16V shown in FIG. 17 or 18. The material of the vertical support 16V1 includes oxide or polysilicon, which has at least one of a lower optical absorptance and a lower optical reflectance than a light-shielding material such as tungsten (W). Since the vertical support 16V1 does not include a light-shielding material, light absorption by the vertical support 16V1 can be suppressed, improving sensitivity, and light reflection can be suppressed, thereby suppressing flare.

[0127] FIG. 20 shows longitudinal and transverse cross-sectional views of a photodetector 1 according to a third modification of the fourth embodiment. FIG. 20A shows a longitudinal cross-sectional view of the photodetector 1 according to the third modification, and FIG. 20B shows transverse cross-sectional views taken along lines AA, BB, CC, and DD in FIG. 20A. In the photodetector 1 according to the third modification, two horizontal light-shielding portions 16H are disposed at different depths of the first and second photoelectric conversion units PD1 and PD2. The photodetector 1 according to the third modification has a vertical support portion 16V1 that does not include a light-shielding member, as in FIG. 19. This achieves the same effects as the second modification. Furthermore, the presence of two horizontal light-shielding portions 16H further reduces the likelihood of incident light being directly incident on the charge storage unit MEM. The vertical support portion 16V1 includes, for example, an insulating material, a metal material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material.

[0128] Fig. 21 shows a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetector 1 according to a fourth modified example of the fourth embodiment. Fig. 21A is a longitudinal cross-sectional view of the photodetector 1 according to the fourth modified example, and Fig. 21B is a transverse cross-sectional view taken along lines AA, BB, and CC in Fig. 21A.

[0129] 17 to 20 described above show an example in which the volumes of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 of each pixel 10 are the same, but in the photodetector 1 according to the fourth modification, the volume of the first photoelectric conversion unit PD1 and the volume of the second photoelectric conversion unit PD2 of each pixel 10 are made different. Specifically, by shifting the position of the vertical light-shielding unit 16V extending in the depth direction within the pixel 10 from the center of the pixel 10, the respective volumes of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 can be adjusted to any volume ratio.

[0130] FIG. 21 shows an example in which the volume of the first photoelectric conversion unit PD1 is larger than the volume of the second photoelectric conversion unit PD2, but the volume of the second photoelectric conversion unit PD2 may be larger than the volume of the first photoelectric conversion unit PD1.

[0131] The first photoelectric conversion unit PD1, which has a large volume, can store more charges than the second photoelectric conversion unit PD2, which has a small volume, and is therefore convenient for use as, for example, a long-term storage PD.

[0132] In this way, when a long-term accumulation PD and a short-term accumulation PD are provided for each pixel 10, the volume of the long-term accumulation PD is made larger and the volume of the short-term accumulation PD is made smaller, so that electric charges do not overflow from each photoelectric conversion unit 11 even at high illuminance, and the image quality of a captured image can be improved.

[0133] Fig. 22 shows a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetector 1 according to a fifth modified example of the fourth embodiment. Fig. 22A is a longitudinal cross-sectional view of the photodetector 1 according to the fifth modified example, and Fig. 22B is a transverse cross-sectional view taken along lines AA, BB, CC, and DD in Fig. 21A.

[0134] In the fifth variant, like the fourth variant, the volumes of the first photoelectric conversion unit PD1 and the second photoelectric conversion unit PD2 are different from each other, and in addition, the first and second photoelectric conversion units PD1 and PD2 have two horizontal shading units 16H at different depths from each other.

[0135] 23A and 23B are a longitudinal sectional view and a planar layout view of a photodetector 1 according to a sixth modified example of the fourth embodiment. Fig. 23A is a longitudinal sectional view of two pixels of the photodetector 1 according to the sixth modified example, and Fig. 23B is a planar layout view of four pixels.

[0136] The photodetector 1 according to the sixth modification is a back-illuminated type and includes a pixel separator 16 along the boundary between pixels 10. The photoelectric conversion unit 11 of each pixel 10 is divided into two photoelectric conversion units 11 (hereinafter referred to as a first photoelectric conversion unit PD1 and a second photoelectric conversion unit PD2) by the pixel separator 16. The pixel separator 16 includes a vertical light-shielding unit 16V and a horizontal light-shielding unit 16H. A charge storage unit MEM is disposed between two adjacent pixels 10. The periphery of the charge storage unit MEM is covered by the horizontal light-shielding unit 16H and the vertical light-shielding unit 16V.

[0137] As shown in FIG. 23A, the charge holding unit MEM is shared by the first photoelectric conversion unit PD1 of one pixel 10 and the second photoelectric conversion unit PD2 of the other pixel 10 of two pixels 10 adjacent to each other in one direction.

[0138] Fig. 24 is a longitudinal sectional view and a planar layout diagram of the photodetector 1 according to the comparative example shown in Fig. 23. Fig. 24A is a longitudinal sectional view of two pixels of the photodetector 1 according to the comparative example, and Fig. 24B is a planar layout diagram of four pixels.

[0139] In each pixel 10 according to the comparative example, the photoelectric conversion unit 11 is not divided into two, and a charge holding unit MEM is provided for each photoelectric conversion unit 11.

[0140] In this way, the photodetector 1 according to the first to third embodiments can be applied to pixels 10 having various cross-sectional structures. Note that the photodetector 1 according to the first to third embodiments can also be applied to pixels 10 having cross-sectional structures other than those shown in FIGS. 17 to 23.

[0141] (manufacturing process) Although the pixels 10 of the photodetector 1 according to the first to fourth embodiments described above have slightly different cross-sectional structures, they can be fabricated using similar manufacturing processes. Below, as a representative example, the manufacturing processes for the pixels 10 of the photodetector 1 according to the first embodiment will be described in order.

[0142] 25A to 25P are manufacturing process diagrams sequentially explaining the manufacturing process of each pixel 10 of the photodetector 1 according to the first embodiment. In Fig. 25A to 25P, the light incident surface is referred to as the upper surface, and the upper surface is referred to as the back surface, and the lower surface is referred to as the front surface.

[0143] First, as shown in Fig. 25A, a photoelectric conversion section 11 made of an N-type silicon layer 11S is formed on a P-type silicon substrate 12. In Fig. 25A, the silicon layer 11S formed on the silicon substrate 12 is shown on the lower side.

[0144] Next, as shown in FIG. 25B, a P-type silicon layer 31 is epitaxially grown on the silicon layer 11S (on the lower surface of the silicon layer 11S in FIG. 25B).

[0145] Next, as shown in FIG. 25C, trenches 32 are formed from the P-type silicon layer 31 toward the depth direction of the photoelectric conversion unit 11. The trenches 32 are arranged along the boundary of the pixel 10. The trenches 32 are formed to a depth that penetrates the photoelectric conversion unit 11, for example. The trenches 32 are formed by dry etching using a hard mask, for example. The hard mask is made of an insulating material such as SiN (silicon nitride) or SiO2 (silicon oxide).

[0146] 25D, an impurity element such as boron (B) or hydrogen ions is implanted into the trench 32, or an insulating material such as an oxide is filled in the trench 32 to form a sacrificial layer 33. This sacrificial layer 33 functions as an etching stopper for the horizontal light-shielding portion 16H.

[0147] Next, as shown in FIG. 25E, a charge holding portion MEM made of an N-type semiconductor region is formed in the P-type silicon layer 31.

[0148] 25F, a deep trench 34 is formed that penetrates the P-type silicon layer 31 and reaches the photoelectric conversion unit 11, and a shallow trench 35 is formed. The deep trench 34 is for forming a vertical gate electrode 21V for the TRZ transistor 21. The shallow trench 35 is for forming a floating diffusion region FD.

[0149] 25G, a floating diffusion region FD made of an N-type semiconductor region is formed in the shallow trench 35. Furthermore, the deep trench 34 is filled with, for example, polysilicon to form a vertical gate electrode 21V.

[0150] Next, as shown in FIG. 25H, the pixel transistor 36, the wiring layer 19, and the insulating layer 20 are formed on the P-type silicon layer 31.

[0151] 25I, the back surface of silicon substrate 12 is polished and thinned by CMP (Chemical Mechanical Polishing) or the like, thereby exposing photoelectric conversion section 11 on the back surface.

[0152] Next, as shown in FIG. 25J, trenches 39 are formed in the depth direction from the photoelectric conversion portion 11 on the back surface side of the silicon substrate 12. The trenches 39 are arranged along the boundary positions of the pixels 10. The trenches 39 are used to form the pixel separating portions 16. The method of forming the trenches 39 is the same as the method of forming the trenches 32 formed in FIG. 25C.

[0153] 25K, sidewalls 39S are formed to cover the side and bottom surfaces of trench 39. Sidewalls 39S are formed of an insulating film made of, for example, SiN or SiO2. Next, as shown in FIG. 25L, the insulating film on the bottom surface of trench 39 is removed by, for example, dry etching while leaving the insulating film on the side surfaces.

[0154] Next, as shown in FIG. 25M, a predetermined alkaline aqueous solution is poured into trench 39 to perform anisotropic etching, thereby forming space 39Z that extends horizontally. This space 39Z has two crystal planes with a plane index of (111). As a result, the shape of space 39Z becomes a rhombic shape when viewed from above, as shown in FIG. 17B.

[0155] 25N, the hard mask and sidewalls used to form the trenches 39 are removed by, for example, wet etching. Also, the sacrificial layer 33 is removed to form trenches 32 for element isolation along the boundary portions of the pixels 10.

[0156] Next, as shown in Figure 25O, vertical shading portions 16V and horizontal shading portions 16H, each consisting of an outer layer portion 16b made of an insulating material and an inner layer portion 16a made of a metal material, are formed on the side surfaces of trenches 32 and 39 and on the inner surfaces of the space.

[0157] Next, as shown in FIG. 25P, a color filter 14 is disposed on the back surface side of the photoelectric conversion section 11, and then an on-chip lens 15 is disposed thereon.

[0158] <Application to moving objects> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0159] FIG. 26 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0160] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 26, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0161] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0162] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0163] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc., based on the received images.

[0164] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0165] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0166] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drivetrain control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating collisions between vehicles, following based on the distance between vehicles, maintaining vehicle speed, warning of vehicle collisions, or warning of vehicle lane departure.

[0167] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0168] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0169] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to passengers in the vehicle or to the outside of the vehicle. In the example of Fig. 26, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0170] FIG. 27 is a diagram showing an example of the installation position of the imaging unit 12031.

[0171] In FIG. 27, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0172] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0173] 27 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0174] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0175] For example, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on driver operation.

[0176] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0177] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. The pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0178] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 and the like among the components described above. Specifically, the photodetector 1 according to the present disclosure can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031 and the like, it is possible to obtain a captured image with higher image quality that is easier to see, thereby reducing driver fatigue.

[0179] The present disclosure can be configured as follows. (1) a plurality of photoelectric conversion units arranged adjacent to each other along a light incident surface for each pixel, each of which accumulates charges photoelectrically converted in accordance with the amount of light incident from the light incident surface; a light-shielding portion disposed substantially parallel to the light incident surface inside the plurality of photoelectric conversion portions; a charge retention unit that is disposed on the opposite side of the light incident surface of the plurality of photoelectric conversion units and that is disposed at a location that at least partially overlaps with the light blocking unit in a plan view, and that retains the charges; Light detection device. (2) the charge holding unit holds charges photoelectrically converted by each of the plurality of photoelectric conversion units; The photodetector according to (1). (3) The charge holding portion is disposed across the plurality of photoelectric conversion portions. The photodetector according to (1) or (2). (4) The light-shielding portion is disposed directly below the charge-holding portion when viewed from the light-incident surface side. A photodetector according to any one of (1) to (3). (5) The light-shielding portion is arranged along a crystal plane represented by a plane index (111). A photodetector according to any one of (1) to (4). (6) A plurality of the light-shielding portions are arranged at different depths of the plurality of photoelectric conversion portions. A photodetector according to any one of (1) to (5). (7) The plurality of photoelectric conversion units include a first photoelectric conversion unit and a second photoelectric conversion unit, the light-shielding portion is disposed substantially parallel to the light incident surface inside the first photoelectric conversion portion and the second photoelectric conversion portion, and straddles the first photoelectric conversion portion and the second photoelectric conversion portion. A photodetector according to any one of (1) to (6). (8) A pixel separating section is provided along a boundary between the light-shielding section, the first photoelectric conversion section, and the second photoelectric conversion section, the light-shielding portion is joined to the pixel separating portion; (7) The photodetector according to (7). (9) The pixel separating portion includes a light-shielding material. (8) The photodetector according to (8). (10) The pixel separating portion is made of a material having at least one of a light absorptance and a light reflectance lower than that of the light blocking portion. (8) The photodetector according to (8). (11) The material includes an insulating material, a metallic material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material. The photodetector according to (10). (12) The first photoelectric conversion unit and the second photoelectric conversion unit have the same volume. The photodetector according to any one of (7) to (11). (13) The first photoelectric conversion section has a larger volume than the second photoelectric conversion section. The photodetector according to any one of (7) to (11). (14) The semiconductor device further includes a floating diffusion region to which the charges photoelectrically converted in the first photoelectric conversion unit are transferred after being held in the charge holding unit, and the charges photoelectrically converted in the second photoelectric conversion unit are transferred without being held in the charge holding unit. The photodetector according to any one of (8) to (13). (15) A plurality of pixels each including the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge storage unit; an exposure period of the first photoelectric conversion unit in each of the plurality of pixels is longer than an exposure period of the second photoelectric conversion unit; the charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred to the floating diffusion region; The charges photoelectrically converted in the second photoelectric conversion unit are transferred to the floating diffusion region without being held in the charge holding unit. The photodetector according to (14). (16) an amplifying transistor that generates a pixel signal according to the charge transferred to the floating diffusion region; a selection transistor that selects whether or not the pixel signal is to be output to a signal line; a reset transistor that switches whether or not the voltage level of the signal line is fed back to the gate of the amplifying transistor; a switching circuit that switches between connecting a first current source to the signal line, the first current source supplying a first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line to a second reference voltage node, and connecting a second current source to the signal line, the second current source supplying a second reference voltage having a voltage level lower than the first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line between the drain and source of the reset transistor, The photodetector according to (14) or (15). (17) When the reset transistor is turned on, a second reference voltage having a voltage level lower than the first reference voltage is supplied to the drain of the amplification transistor, and the second current source is connected to the signal line; When the reset transistor is turned off, the first reference voltage is supplied to the drain of the amplification transistor, and the first current source is connected to the signal line. The photodetector according to (16). (18) A plurality of the pixels, each of which has the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge storage unit, a control unit that alternatively selects either a first mode in which a global shutter operation is performed in which exposure is started simultaneously in the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels, and the resulting charge is held in the charge holding unit; or a second mode in which a global shutter operation is performed in which exposure is started in the first photoelectric conversion unit in each of the plurality of pixels, and the resulting charge is held in the charge holding unit, and then exposure is started in the second photoelectric conversion unit, and the resulting charge is held in the charge holding unit. The photodetector according to any one of (7) to (17). (19) A floating diffusion region to which charges photoelectrically converted in the first photoelectric conversion unit are held in the charge storage unit and then transferred, and to which charges photoelectrically converted in the second photoelectric conversion unit are held in the charge storage unit and then transferred; a plurality of the pixels, each of which has the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; a control unit that alternatively selects either a first mode in which a global shutter operation is performed in which the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels simultaneously start exposure and the resulting charge is held in the charge holding unit, or a second mode in which the first photoelectric conversion unit in each of the plurality of pixels starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit, and then the second photoelectric conversion unit starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit; and a defocus amount calculation unit that, in the second mode, detects an image plane phase difference signal based on a pixel signal corresponding to the charge photoelectrically converted by the first photoelectric conversion unit and transferred to the floating diffusion region, and a pixel signal corresponding to the charge photoelectrically converted by the second photoelectric conversion unit and transferred to the floating diffusion region. The photodetector according to any one of (7) to (13).

[0180] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents. [Explanation of symbols]

[0181] 1 photodetector, 2 pixel array section, 3 vertical drive section, 4 column processing section, 5 data storage section, 6 horizontal drive section, 7 system control section, 8 signal processing section, 9 drive line, 10 pixel, 11 photoelectric conversion section, 11S silicon layer, 12 silicon substrate, 12B back surface, 12S front surface, 14 color filter, 15 on-chip lens, 16 pixel separation section, 16a inner layer section, 16b outer layer section, 16H horizontal light shielding section, 16V vertical light shielding section, 16V1 vertical support section, 17 fixed charge film, 18a first switching transistor, 18b second switching transistor, 19 wiring layer, 20 insulating layer, 21 TRZ transistor, 21a first TRZ transistor, 21b second TRZ transistor, 21V vertical gate electrode, 22 OFG transistor, 23 TRX transistor, 24 TRG transistor, 24a first TRG transistor, 24b Second TRG transistor, 25 RST transistor, 25a First RST transistor, 25b Second RST transistor, 26 AMP transistor, 26 Second AMP transistor, 26a First AMP transistor, 26b Second AMP transistor, 27 SEL transistor, 27a First SEL transistor, 27b Second SEL transistor, 28 Reference voltage switching circuit, 29 Current source switching circuit, 30a First current source, 30b Second current source, 31 Silicon layer, 32 Trench, 33 Sacrificial layer, 34 Trench, 35 Trench, 36 Pixel transistor, 39 Trench, 39S Sidewall, 39Z Space

Claims

1. a plurality of photoelectric conversion units arranged adjacent to each other along the light incident surface for each pixel, each of which accumulates charges photoelectrically converted in accordance with the amount of light incident from the light incident surface; a light-shielding portion disposed substantially parallel to the light incident surface inside the plurality of photoelectric conversion portions; a charge retention unit that is disposed on the opposite side of the light incident surface of the plurality of photoelectric conversion units and that is disposed at a location that at least partially overlaps with the light blocking unit in a plan view, and that retains the charges; Light detection device.

2. the charge holding unit holds charges photoelectrically converted by each of the plurality of photoelectric conversion units. The photodetector device according to claim 1 .

3. the charge holding portion is disposed across the plurality of photoelectric conversion portions; The photodetector device according to claim 1 .

4. the light-shielding portion is disposed directly below the charge-holding portion when viewed from the light-incident surface side. The photodetector device according to claim 1 .

5. The light-shielding portion is arranged along a crystal plane represented by a plane index (111). The photodetector device according to claim 1 .

6. a plurality of the light-shielding portions are disposed at different depths of the plurality of photoelectric conversion portions, The photodetector device according to claim 1 .

7. the plurality of photoelectric conversion units include a first photoelectric conversion unit and a second photoelectric conversion unit, the light-shielding portion is disposed substantially parallel to the light incident surface inside the first photoelectric conversion portion and the second photoelectric conversion portion, and straddles the first photoelectric conversion portion and the second photoelectric conversion portion. The photodetector device according to claim 1 .

8. a pixel separating section disposed along a boundary between the light-shielding section, the first photoelectric conversion section, and the second photoelectric conversion section; the light-shielding portion is joined to the pixel separating portion; The photodetector device according to claim 7 .

9. the pixel separating portion includes a light-shielding material; The photodetector device according to claim 8 .

10. the pixel separating portion is made of a material having at least one of a light absorptance and a light reflectance lower than that of the light blocking portion, The photodetector device according to claim 8 .

11. The material comprises an insulating material, a metallic material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material. The optical detection device according to claim 10.

12. the first photoelectric conversion unit and the second photoelectric conversion unit have the same volume; The photodetector device according to claim 7 .

13. The first photoelectric conversion unit has a larger volume than the second photoelectric conversion unit. The photodetector device according to claim 7 .

14. a floating diffusion region to which charges photoelectrically converted in the first photoelectric conversion unit are transferred after being held in the charge holding unit, and to which charges photoelectrically converted in the second photoelectric conversion unit are transferred without being held in the charge holding unit; The photodetector device according to claim 8 .

15. a plurality of pixels each including the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; an exposure period of the first photoelectric conversion unit in each of the plurality of pixels is longer than an exposure period of the second photoelectric conversion unit; the charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred to the floating diffusion region; The charges photoelectrically converted in the second photoelectric conversion unit are transferred to the floating diffusion region without being held in the charge holding unit.

15. The optical detection device of claim 14.

16. an amplifying transistor that generates a pixel signal according to the charge transferred to the floating diffusion region; a selection transistor that selects whether or not the pixel signal is to be output to a signal line; a reset transistor that switches whether or not the voltage level of the signal line is fed back to the gate of the amplifying transistor; a switching circuit that switches between connecting a first current source to the signal line, the first current source supplying a first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line to a second reference voltage node, and connecting a second current source to the signal line, the second current source supplying a second reference voltage having a voltage level lower than the first reference voltage to the drain of the amplifier transistor and generating a current flowing from the signal line between the drain and source of the reset transistor, 15. The optical detection device of claim 14.

17. When the reset transistor is turned on, a second reference voltage having a voltage level lower than the first reference voltage is supplied to the drain of the amplifier transistor, and the second current source is connected to the signal line; When the reset transistor is turned off, the first reference voltage is supplied to the drain of the amplifier transistor, and the first current source is connected to the signal line.

17. The optical detection device of claim 16.

18. a plurality of pixels each including the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; a control unit that alternatively selects either a first mode in which a global shutter operation is performed in which exposure is started simultaneously in the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels, and the resulting charge is held in the charge holding unit; or a second mode in which a global shutter operation is performed in which exposure is started in the first photoelectric conversion unit in each of the plurality of pixels, and the resulting charge is held in the charge holding unit, and then exposure is started in the second photoelectric conversion unit, and the resulting charge is held in the charge holding unit. The photodetector device according to claim 7 .

19. a floating diffusion region to which the charges photoelectrically converted in the first photoelectric conversion unit are held in the charge holding unit and then transferred, and to which the charges photoelectrically converted in the second photoelectric conversion unit are held in the charge holding unit and then transferred; a plurality of the pixels, each of which has the first photoelectric conversion unit, the second photoelectric conversion unit, the light-shielding unit, and the charge retention unit; a control unit that alternatively selects either a first mode in which a global shutter operation is performed in which the first photoelectric conversion unit and the second photoelectric conversion unit in each of the plurality of pixels simultaneously start exposure and the resulting charge is held in the charge holding unit, or a second mode in which the first photoelectric conversion unit in each of the plurality of pixels starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit, and then the second photoelectric conversion unit starts exposure and the resulting charge is transferred to the floating diffusion region without being held in the charge holding unit; a defocus amount calculation unit that, in the second mode, detects an image plane phase difference signal based on a pixel signal corresponding to the charge photoelectrically converted by the first photoelectric conversion unit and transferred to the floating diffusion region, and a pixel signal corresponding to the charge photoelectrically converted by the second photoelectric conversion unit and transferred to the floating diffusion region. The photodetector device according to claim 7 .

Images