Display device, and source driver
The display device addresses the challenge of performing local dimming control by supplying each driver IC with image data for its entire display area and adjacent regions, enabling accurate local dimming without data correction and supporting complex algorithms.
Patent Information
- Application Number
- JP2024046728
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-22
- Publication Date
- 2025-10-03
AI Technical Summary
In display devices with multiple driver IC chips, performing simple local dimming control is hindered by the inability to accurately calculate image data at the boundaries between adjacent driver IC areas due to the PtoP method supplying only image data for the driven display area, leading to incomplete data calculations and misaligned control areas.
A display device configuration where each source driver receives image data for an enlarged display area including adjacent regions, allowing local dimming calculations to be performed within each driver IC, using a display control unit to supply image data for both the primary and adjacent areas, and an illumination drive unit to control backlight dimming based on these expanded areas.
Enables accurate local dimming control without correcting image data, even when using complex algorithms, by ensuring each driver IC has the necessary data for its entire display area and adjacent regions, thus improving control accuracy and reducing the need for centralized data calculations.
Smart Images

Figure 2025146117000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a display device and a source driver. [Background technology]
[0002] Active matrix driving is used as a driving method for display devices such as liquid crystal display devices and organic electroluminescence (EL) devices. In active matrix driving display devices, the display panel is composed of a semiconductor substrate on which pixel sections and pixel switches are arranged in a matrix. The pixel switches are controlled to be turned on and off by gate pulses, and when the pixel switches are turned on, a grayscale voltage signal corresponding to a video data signal is supplied to the pixel sections to control the brightness of each pixel section, thereby producing a display. The driving circuit of the display device includes, for example, a gate driver that outputs gate pulses to gate lines, a source driver that outputs grayscale voltage signals to data lines, and a timing controller that supplies image data and timing signals to the source driver.
[0003] In such display devices, a backlight drive control called local dimming is performed to increase the contrast ratio between different areas on the same screen. As a display device that performs local dimming, an image display device has been proposed that calculates the luminance distribution of an image signal, controls the illumination light for each area based on the calculation result, and corrects the image signal (for example, Patent Document 1).
[0004] In addition, general local dimming controls the drive of the backlight and also corrects the brightness of image data. This requires a dedicated IC or FPGA (Field Programmable Gate Array) for local dimming, which increases the device scale. To prevent this increase in device scale, a display device has been proposed in which the source driver has a so-called simple local dimming function that only controls the illumination light without correcting the image data (for example, Patent Document 2). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-258403 [Patent Document 2] Patent Publication No. 2021-182070 Summary of the Invention [Problem to be solved by the invention]
[0006] When a source driver is composed of multiple driver IC chips and image data is supplied using the PtoP (Point to Point) method, each driver IC is supplied with only image data corresponding to the area of the display panel it drives (i.e., the area where the pixel units on the data lines to be driven are arranged).
[0007] On the other hand, in a display device having such a source driver consisting of multiple driver IC chips, when simple local dimming as in the above-mentioned conventional technology is performed, data calculation for local dimming control is performed in each driver IC. In this case, image data of an area surrounding the target control area is required to perform data calculation for local dimming control.
[0008] However, when image data is supplied using the PtoP method as described above, each driver IC is only supplied with image data for the display area it drives, so at the boundary between the display areas of adjacent driver ICs, image data from the surrounding area cannot be used, resulting in the problem that data calculations for local dimming control cannot be performed accurately.
[0009] Furthermore, there are cases where the boundary of the display area of each driver IC does not coincide with the boundary of the local dimming control area, which causes a problem that local dimming control cannot be performed appropriately in the boundary portion.
[0010] The present invention has been made in consideration of the above-mentioned problems, and aims to provide a display device that is capable of performing simple local dimming control without correcting image data when a source driver is composed of driver ICs on multiple chips and image data is supplied to each driver IC using the PtoP method. [Means for solving the problem]
[0011] a first source driver that outputs a first gradation voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a first display area of the display panel; a second source driver that outputs a second gradation voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a second display area of the display panel; a display control unit that supplies a first image data signal to the first source driver via a first data supply line and a second image data signal to the second source driver via a second data supply line; and an illumination drive unit that controls the amount of light of a backlight that illuminates each of a plurality of sub-areas obtained by dividing a display screen of the display panel, wherein the display control unit supplies image data corresponding to a first enlarged display area that includes the first display area and a display area of a predetermined range adjacent to the first display area to the first source driver as the first image data signal. supplying image data corresponding to a second enlarged display area including the second display area and a display area of a predetermined range adjacent to the first display area as the second image data signal to the second source driver, the first source driver generating the first gradation voltage signal based on image data corresponding to the first display area among the first image data signal, and generating first dimming data indicating a dimming amount of a backlight corresponding to each of a first group of sub-areas included in the first enlarged display area among the plurality of sub-areas, based on the image data corresponding to the first enlarged display area, the second source driver generating the second gradation voltage signal based on image data corresponding to the second display area among the second image data signal, and generating second dimming data indicating a dimming amount of a backlight corresponding to each of a second group of sub-areas included in the second enlarged display area among the plurality of sub-areas, based on the image data corresponding to the second enlarged display area, the first source driver obtaining the second dimming data from the second source driver,The first dimming data and the second dimming data are supplied to the lighting driver.
[0012] Furthermore, a source driver according to the present invention is connected to a display panel having a plurality of pixel units arranged in a matrix at each intersection of a plurality of data lines and a plurality of gate lines, and an illumination drive unit that controls the amount of light of a backlight that illuminates each of a plurality of sub-areas obtained by dividing a display screen of the display panel, and outputs a first gradation voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a first display area of the display panel, the source driver comprising: a gradation voltage generation unit that receives first image data signals consisting of image data corresponding to a first enlarged display area that includes the first display area and a display area of a predetermined range adjacent to the first display area, and generates the first gradation voltage signal based on image data among the first image data signals that corresponds to the first display area; a local dimming calculation unit that generates first dimming data that indicates a dimming amount of a backlight corresponding to each of a first group of sub-areas included in the first enlarged display area among the plurality of sub-areas, based on the image data corresponding to the first enlarged display area; and a communication unit that supplies the first dimming data to the illumination drive unit. [Effects of the Invention]
[0013] According to the display device of the present invention, when the source driver is composed of driver ICs on multiple chips and image data is supplied to each driver IC using the PtoP method, it is possible to perform simple local dimming control without correcting the image data. [Brief explanation of the drawings]
[0014] [Figure 1] 1 is a block diagram showing a configuration of a display device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a diagram schematically illustrating the positional relationship between a display panel and an illumination unit. [Figure 3]2 is a diagram schematically illustrating the configuration of an SoC circuit and image data supplied to each driver IC. FIG. [Figure 4] FIG. 2 is a block diagram showing a configuration of a source driver. [Figure 5] FIG. 10 is a diagram illustrating a change in the signal level of a data enable signal. DETAILED DESCRIPTION OF THE INVENTION
[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will now be described in detail. In the following description of the embodiments and the accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.
[0016] 1 is a block diagram showing the configuration of a display device 100 according to a first embodiment of the present invention. The display device 100 is an active matrix liquid crystal display device. The display device 100 includes a display panel 11, an SoC circuit 12, a gate driver 13, source drivers 14A, 14B, and 14C, and an LED driver 15.
[0017] The display panel 11 is composed of a semiconductor substrate on which a plurality of pixel units P11 to Pnm and pixel switches M11 to Mnm (n is an integer of 2 or greater, and m is an integer of 2 or greater and a multiple of 3) are arranged in a matrix of n rows and m columns. The display panel 11 has n gate lines GL1 to GLn which are horizontal scanning lines, and m data lines DL1 to DLm which are arranged orthogonally to intersect the gate lines GL1 to GLn. The pixel units P11 to Pnm and pixel switches M11 to Mnm are provided at the intersections of the gate lines GL1 to GLn and the data lines DL1 to DLm, and are arranged in a matrix.
[0018] The pixel switches M11 to Mnm are controlled to be on or off in response to gate signals Vg1 to Vgn supplied from the gate driver 13. The pixel units P11 to Pnm are supplied with grayscale voltage signals Gv1 to Gvm corresponding to video data from the source drivers 14A, 14B, and 14C. When the pixel switches M11 to Mnm are respectively on, the grayscale voltage signals Gv1 to Gvm are applied to the pixel electrodes of the pixel units P11 to Pnm, and each pixel electrode is charged. The brightness of the pixel units P11 to Pnm is controlled in response to the grayscale voltage signals Gv1 to Gvm at each pixel electrode of the pixel units P11 to Pnm, and display is performed.
[0019] In other words, the gate driver 13 operates to select m pixel units arranged along the extension direction of the gate lines (i.e., in a horizontal row) as targets to which the gradation voltage signals Gv1 to Gvm are to be supplied. The source drivers 14A, 14B, and 14C apply the gradation voltage signals Gv1 to Gvm to the selected pixel units in the horizontal row, causing them to display a color corresponding to the voltage. One frame of screen display is performed by selectively switching the pixel units in the horizontal row selected as targets to which the gradation voltage signals Gv1 to Gvm are to be supplied, and repeating this process in the extension direction of the data lines (i.e., the vertical direction).
[0020] Each of the pixel units P11 to Pnm includes a transparent electrode connected to a data line via a pixel switch M11 to Mnm, and a liquid crystal sealed between the transparent electrode and a counter substrate that is disposed opposite the semiconductor substrate and has a single transparent electrode formed over the entire surface. Display is achieved by changing the transmittance of the liquid crystal in response to the voltage difference between the grayscale voltage signals Gv1 to Gvm supplied to the pixel units P11 to Pnm and the counter substrate voltage, relative to the backlight inside the display device.
[0021] The SoC (System On a Chip) circuit 12 is a display control circuit that supplies image data to source drivers 14A, 14B, and 14C and controls their operation. In this embodiment, the SoC circuit 12 receives a video signal VSS and a register setting signal SS, generates image data signals VD1, VD2, and VD3 based on the received signals, and supplies the image data signals VD1, VD2, and VD3 to the source drivers 14A, 14B, and 14C. The SoC circuit 12 also supplies a frame synchronization signal to the source drivers 14A, 14B, and 14C along with the image data signals VD1, VD2, and VD3.
[0022] The SoC circuit 12 transmits image data signals VD1, VD2, and VD3 using a PtoP (Point to Point) method. Specifically, the SoC circuit 12 supplies the image data signal VD1 to the source driver 14A via a data supply line L1. The SoC circuit 12 also supplies the image data signal VD2 to the source driver 14B via a data supply line L2. The SoC circuit 12 also supplies the image data signal VD3 to the source driver 14C via a data supply line L3. The data supply lines L1, L2, and L3 are different from one another.
[0023] The gate driver 13 receives a gate control signal GS from the source driver 14A, and sequentially supplies gate signals Vg1 to Vgn to the gate lines GL1 to GLn based on the clock timing included in the gate control signal GS.
[0024] The source drivers 14A, 14B, and 14C are arranged adjacent to each other along the horizontal direction (i.e., the extension direction of the gate lines GL1 to GLn). The source driver 14A is a source driver that drives the data lines DL1 to DLi, which are arranged on the left side of the data lines DL1 to DLm and close to the gate driver 13, among the data lines DL1 to DLm. The source driver 14B is arranged in the center of the three source drivers and is a source driver that drives the data lines DLi+1 to DLk. The source driver 14C is a source driver that drives the data lines DLk+1 to DLm, which are arranged on the right side and far from the gate driver 13.
[0025] The source drivers 14A, 14B, and 14C are each configured as a separate semiconductor IC (Integrated Circuit) chip. In this embodiment, the source driver 14A is configured as a master chip, and the source drivers 14B and 14C are configured as slave chips, with adjacent drivers (14A and 14B, 14B and 14C) cascade-connected via signal transmission lines.
[0026] As described above, the source drivers 14A, 14B, and 14C receive image data from the SoC circuit 12 via different data supply lines in a PtoP manner. Specifically, an image data signal VD1 is supplied to the source driver 14A, an image data signal VD2 is supplied to the source driver 14B, and an image data signal VD3 is supplied to the source driver 14C. The image data signals VD1 to VD3 are data signals consisting of a series of pixel data fragments that represent the luminance level of each pixel, for example, in 256 8-bit luminance gradations.
[0027] Unlike the supply of image data in the normal PtoP method, in this embodiment, not only image data corresponding to the display area of the display panel 11 that each source driver is responsible for driving, but also image data corresponding to the display area (enlarged display area) including a predetermined range of adjacent areas are supplied to source drivers 14A, 14B, and 14C.
[0028] The source drivers 14A, 14B, and 14C also receive a register setting signal SS via a common data supply line DSL. The register setting signal SS includes calculation range information indicating the range of image data used for local dimming calculation in each source driver, and display resolution information indicating the resolution at which an image is displayed on the display panel 11 by the operation of each source driver.
[0029] The source driver 14A generates grayscale voltage signals Gv1 to Gvi based on the image data signal VD1 and the register setting signal SS and outputs them to the data lines DL1 to DLi. The source driver 14B generates grayscale voltage signals Gvi+1 to Gvk based on the image data signal VD2 and the register setting signal SS and outputs them to the data lines DLi+1 to DLk. The source driver 14C generates grayscale voltage signals Gvk+1 to Gvm based on the image data signal VD3 and the register setting signal SS and outputs them to the data lines DLk+1 to DLm.
[0030] The source driver 14A, which is a master chip, is located closer to the gate driver 13 than the other source drivers (14B, 14C), and supplies a gate control signal GS to the gate driver 13. The source driver 14A also supplies a dimming data signal LD, which indicates the light emission brightness of the LED, to the LED driver 15.
[0031] The LED driver 15 is an illumination driving unit that controls the amount of light of the backlight that illuminates the display panel 11 by driving an illumination unit (not shown in FIG. 1) made up of LEDs (Light Emitting Diodes). The illumination unit is made up of multiple light sources, and the LED driver 15 controls the light emission of each light source, thereby controlling the brightness of the backlight for each of the multiple areas into which the display panel 11 is divided. The LED driver 15 receives a dimming data signal LD from the source driver 14A, and controls the brightness of the backlight by driving the light source of the illumination unit to achieve the corresponding light emission brightness.
[0032] 2 is a diagram schematically illustrating the positional relationship between the display panel 11 and the illumination unit 16. The illumination unit 16 is composed of a plurality of light sources LS arranged corresponding to each of the areas (sub-areas) into which the display screen of the display panel 11 is divided. Each of the plurality of light sources LS is composed of an emitter such as an LED. The light emission brightness of each light source LS is controlled independently by an LED driver 15, and the illumination unit 16 is configured to be switchable between a plurality of levels.
[0033] 3 is a diagram schematically showing the configuration of the SoC circuit 12 and image data supplied to each source driver. The SoC circuit 12 includes an image processing unit 21, a control register 22, and an LVDS transmission unit 23.
[0034] Based on the video signal VSS, the image processing unit 21 generates an image data signal VD consisting of a series of pixel data pieces that represent the luminance level of each pixel in, for example, 256 8-bit luminance gradations.
[0035] The control register 22 is a register that stores transmission range setting information that indicates the range of the image data signal VD to be transmitted to the source drivers 14A, 14B, and 14C. The content of the transmission range setting information stored in the control register 22 is updated appropriately in response to a register setting signal SS supplied from the outside.
[0036] In this embodiment, not only the range corresponding to the data lines driven by each source driver but also the range of image data necessary for performing local dimming calculations in each source driver is set as the transmission range. Transmission range setting information SD1 for source driver 14A, transmission range setting information SD2 for source driver 14B, and transmission range setting information SD3 for source driver 14C are each read from the control register 22 and supplied to the LVDS transmitter 23.
[0037] The LVDS transmitter 23 generates image data signals VD1, VD2, and VD3 according to the transmission ranges indicated in the transmission range setting information SD1, SD2, and SD3, based on the image data signal VD supplied from the image processor 21. The LVDS transmitter 23 supplies the generated image data signals VD1, VD2, and VD3 to the source drivers 14A, 14B, and 14C by a PtoP method using LVDS (Low Voltage Differential Signaling) transmission.
[0038] As described above, each of the image data signals VD1, VD2, and VD3 includes not only image data corresponding to the area of the display panel 11 to be driven by each source driver, but also image data for the area required for local dimming calculation. For example, in the example shown in FIG. 3, the display area of the display panel 11 is divided into eight columns, columns A through H, and the area from the left end of column A to the dashed-line portion midway through column C is the display area to be driven by the source driver 14A. However, the SoC circuit 12 supplies, as the image data signal VD1, not only image data corresponding to this display area but also image data corresponding to an enlarged display area including a peripheral area required for local dimming calculation to the source driver 14A. That is, in the example shown in FIG. 3, image data corresponding to the display area (enlarged display area) ranging from the left end of column A to the right end of column D, which is the display area to be driven plus the hatched portion in the figure, is supplied to the source driver 14A as the image data signal VD1.
[0039] Similarly, the display area of the display panel 11 that is the target of driving by the source driver 14B ranges from the dashed line portion midway through column C to the dashed line portion midway through column F, but the SoC circuit 12 supplies image data corresponding to the display area beyond this range from the left end of column C to the right end of column F (i.e., the enlarged display area including the diagonally shaded portion) to the source driver 14B as the image data signal VD2.
[0040] The display area of the display panel 11 to be driven by the source driver 14C ranges from the dashed line portion in the middle of column F to the right end of column H, but the SoC circuit 12 supplies image data corresponding to the display area beyond this, ranging from the left end of column E to the right end of column F (i.e., the enlarged display area including the diagonally shaded portion), as the image data signal VD3 to the source driver 14C.
[0041] 4 is a block diagram showing the configuration of the source driver 14A. The source driver 14A includes a receiving unit (PLL) 31, a first data processing unit 32, a setting register 33, a second data processing unit 34, a source control unit 35, a data latch group 36, a DAC 37, a gate control unit 38, an IDE generation circuit 41, a local dimming calculation unit 42, and an LED driver communication unit 43.
[0042] The receiving unit 31 receives the image data signal VD1 and the frame synchronization signal FS transmitted by LVDS transmission from the SoC circuit 12. The receiving unit 31 includes a PLL (Phase Locked Loop) circuit and generates a clock signal CLK based on the image data signal VD1 and the frame synchronization signal FS. The receiving unit 31 also generates a serial data signal DS synchronized with the clock signal CLK and supplies it to the first data processing unit 32.
[0043] The first data processing unit 32 is a data processing unit that performs serial-parallel conversion of data. The first data processing unit 32 performs serial-parallel conversion on the data signal DS to generate parallel data PD. The first data processing unit 32 also generates a horizontal synchronization signal HS and a vertical synchronization signal VS based on the data signal DS and the clock signal CLK. The first data processing unit 32 supplies the parallel data PD and the synchronization signals (HS / VS) to the second data processing unit 34.
[0044] Furthermore, the first data processing unit 32 generates a data enable signal DE based on the data signal DS and the clock signal CLK. In this embodiment, the data enable signal DE is an enable signal for local dimming calculation. The first data processing unit 32 supplies the data enable signal DE to the IDE generation circuit 41 and the local dimming calculation unit 42.
[0045] The setting register 33 is a register that stores source control data SSD, which is setting data for controlling the operation of the source driver 14A, and gate control data GSD, which is setting data for controlling the operation of the gate driver 13. The source control data SSD and gate control data GSD are written to the setting register 33 and read from the setting register 33 based on a register setting signal SS (setting communication signal) supplied from the outside.
[0046] The setting register 33 also stores area setting data AS1 including setting data such as the display range and resolution of the image display, and area setting data AS2 which is setting data indicating the calculation range of the local dimming calculation.
[0047] The second data processing unit 34 receives the parallel data PD and synchronization signals (HS / VS) from the first data processing unit 32, and also receives the data enable signal IDE from the IDE generation circuit 41. The second data processing unit 34 generates a latch timing signal LTS based on these signals and supplies it to the source control unit 35 together with the parallel data PD. The second data processing unit 34 also generates a timing signal TS used to control the gate driver 13 and supplies it to the gate control unit 38.
[0048] The source control unit 35 , the data latch group 36 , the DAC 37 and the gate control unit 38 constitute the LCD driver 20 .
[0049] The source control unit 35 supplies the parallel data PD supplied from the second data processing unit 34 to the data latch group 36. The source control unit 35 also supplies a latch timing signal LTS to the data latch group 36, causing the pixel data pieces constituting the parallel data PD to be sequentially stored in each of the data latches included in the data latch group 36. The source control unit 35 performs these operations based on the source control data SSD read from the setting register 33.
[0050] The data latch group 36 is made up of a plurality of latch circuits, and receives pixel data pieces that make up the parallel data PD under the control of the source control unit 24, and outputs them sequentially.
[0051] A DA converter (DAC) 37 selects and digitally converts the grayscale voltages corresponding to the pixel data pieces output from the data latch group 36 to generate an analog grayscale voltage signal Vd. The generated analog grayscale voltage signal Vd is amplified by an output amplifier (not shown) and output to the data lines DL1 to DLi.
[0052] The gate control unit 38 generates a gate control signal GS based on the timing signal TS supplied from the second data processing unit 34, and controls the gate driver 13. The gate control unit 38 controls the gate driver 13 based on the gate control data GSD read from the setting register 33.
[0053] The IDE generation circuit 41 generates a data enable signal IDE for the display operation (i.e., the driving operation of the data lines) based on the data enable signal DE supplied from the first data processing unit 32 and the area setting data AS1 of the display area read from the setting register 33. The IDE generation circuit 41 supplies the data enable signal IDE to the second data processing unit 34.
[0054] The local dimming calculation unit 42 includes a pixel data processing unit and a data calculation unit, and performs calculations (hereinafter referred to as local dimming calculations) to calculate dimming amount data DD used for simple local dimming that does not involve image data correction. The local dimming calculation unit 42 performs local dimming calculations based on the data enable signal DE, parallel data PD, and synchronization signals (HS / VS) supplied from the first data processing unit 32, and the local dimming area setting data AS2 read from the setting register 33.
[0055] For example, the local dimming calculation unit 42 acquires, as a feature, the gradation of pixels when an image is displayed in a display area determined by the data enable signal DE and the area setting data AS2, based on the pixel data pieces constituting the parallel data PD. Then, the local dimming calculation unit 42 calculates, for each of a plurality of sub-areas included in the display area, a dimming amount indicating the emission brightness of the backlight (LED), based on the acquired feature. The local dimming calculation unit 42 supplies the calculated dimming amount to the LED driver communication unit 43 as dimming amount data DD.
[0056] The LED driver communication unit 43 is connected to the LED driver 15 and supplies a dimming data signal LD to the LED driver 15 via serial data communication. The LED driver communication unit 43 sequentially supplies the dimming amount data DD calculated by the local dimming calculation unit 42 and the dimming amount data DD supplied from other driver ICs via cascade connection wiring (i.e., connection wiring between driver ICs) to the LED driver 15 as the dimming data signal LD.
[0057] The source drivers 14B and 14C have the same basic configuration as the source driver 14A shown in FIG. 4, but differ from the source driver 14A in that the LED driver communication unit 43 supplies the dimming amount data DD calculated by the local dimming calculation unit 42 to the adjacent source driver (the source driver 14C supplies it to the source driver 14B, and the source driver 14B supplies it to the source driver 14A) instead of supplying it to the LED driver 15 as a dimming data signal LD.
[0058] FIG. 5 is a diagram showing changes in the signal levels of the data enable signal DE and the data enable signal IDE.
[0059] The data enable signal DE is a signal whose signal level changes between logic level 0 (L level) and logic level 1 (H level), and turns on the operation of the local dimming calculation unit 42 during the period of logic level 1. That is, during the period when the data enable signal DE is at the H level, the local dimming calculation unit 42 calculates the dimming amount data DD.
[0060] The data enable signal IDE is a signal whose signal level changes between logic level 0 (L level) and logic level 1 (H level), and turns on the operation of the second data processing unit 34 during the period when the data enable signal DE is at logic level 1. That is, during the period when the data enable signal DE is at H level, the second data processing unit 34 supplies parallel data PD to the source control unit 35. As a result, during this period, pixel data pieces are latched in the data latch group 36, and the grayscale voltage signal Vd is output.
[0061] 5, the display area of the display panel 11 that is the target of driving by the source driver 14A extends from the left end of column A to the dashed line portion halfway through column C, so the data enable signal IDE goes high during the period corresponding to that display area, and the grayscale voltage signal Vd is generated and output to the data lines using image data corresponding to that display area. On the other hand, the display area required for local dimming calculations in the source driver 14A extends from the left end of column A to the right end of column D, so the data enable signal DE goes high during the period corresponding to that display area, and the local dimming calculations are performed using image data corresponding to that display area.
[0062] Similarly, the display area of the display panel 11 that is the target of driving by the source driver 14B extends from the dashed line portion midway through column C to the dashed line portion midway through column F, so the data enable signal IDE goes high during the period corresponding to that display area, and the grayscale voltage signal Vd is generated and output to the data lines using image data corresponding to that display area. On the other hand, the display area required for local dimming calculations in the source driver 14B extends from the left end of column C to the right end of column F, so the data enable signal DE goes high during the period corresponding to that display area, and the local dimming calculations are performed using image data corresponding to that display area.
[0063] Similarly, the display area of the display panel 11 that is the target of driving by the source driver 14C extends from the dashed line portion midway through column F to the right end of column H, so the data enable signal IDE goes high during the period corresponding to that display area, and the grayscale voltage signal Vd is generated and output to the data lines using image data corresponding to that display area. On the other hand, the display area required for local dimming calculations in the source driver 14B extends from the left end of column E to the right end of column H, so the data enable signal DE goes high during the period corresponding to that display area, and the local dimming calculations are performed using image data corresponding to that display area.
[0064] As described above, in the display device 100 of this embodiment, when the SoC circuit 12 supplies image data to the source drivers 14A, 14B, and 14C in the PtoP system, each source driver supplies not only image data corresponding to the display area for which the data lines are to be driven, but also image data corresponding to an enlarged display area including a predetermined range of the display area adjacent to the display area as the image data signals VD1, VD2, and VD3. The source drivers 14A, 14B, and 14C perform local dimming calculations based on the supplied image data signals (VD1, VD2, VD3), and also control the driving of the data lines based on image data from the supplied image data signals corresponding to the display area for which they are to be driven, based on the display area setting set in the setting register 33.
[0065] With this configuration, each source driver can perform local dimming calculations using not only image data for the display area for which it drives its data lines, but also image data for an enlarged display area that includes the adjacent display areas. Therefore, even in a display device in which image data is supplied to each of multiple source drivers using the PtoP system, each source driver can appropriately perform local dimming calculations, making it possible to perform simple local dimming control without correcting the image data.
[0066] Furthermore, because local dimming calculations can be performed within each source driver, there is no need to perform calculations for overall local dimming in the source driver 14A, which is the master chip, unlike a configuration in which data such as the maximum gradation of each display area is calculated in each driver and then collected in a master chip to perform local dimming calculations anew. Therefore, the configuration of this embodiment can be applied even when a complex algorithm is used to calculate local dimming, such as determining the brightness of LEDs by balancing the number of gradations GS0 to 127 and the number of gradations G128 to 255.
[0067] It should be noted that the present invention is not limited to the above-described embodiments. For example, in the above-described embodiments, the display device 100 is described as having source drivers 14A, 14B, and 14C, each of which is configured from a separate semiconductor IC chip, but the number of source drivers is not limited to this, and the configurations of the above-described embodiments can be applied to a display device having at least two or more source drivers. [Explanation of symbols]
[0068] 100 display device 11 Display panel 12 SoC circuit 13 Gate Driver 14A, 14B, 14C source drivers 15 LED drivers 16 Lighting Department 20 LCD drive unit 21 Image processing section 22 Control Registers 23 LVDS transmitter 31 Receiving unit 32 First Data Processing Unit 33 Configuration Register 34 Second Data Processing Section 35 Source control section 36 Data Latches 37 DAC 38 Gate control section 41 IDE generation circuit 42 Local dimming calculation unit 43 LED driver communication unit
Claims
1. a display panel including a plurality of data lines and a plurality of gate lines, and a plurality of pixel units arranged in a matrix at each of the intersections of the plurality of data lines and the plurality of gate lines; a first source driver that outputs a first gradation voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a first display area of the display panel; a second source driver that outputs a second gradation voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a second display area of the display panel; a display control unit that supplies a first image data signal to the first source driver via a first data supply line and a second image data signal to the second source driver via a second data supply line; an illumination driver that controls the amount of light from a backlight that illuminates each of a plurality of sub-areas obtained by dividing the display screen of the display panel; and the display control unit supplies, as the first image data signal, image data corresponding to a first enlarged display area including the first display area and a display area of a predetermined range adjacent to the first display area to the first source driver, and supplies, as the second image data signal, image data corresponding to a second enlarged display area including the second display area and a display area of a predetermined range adjacent to the first display area to the second source driver; the first source driver generates the first gradation voltage signal based on image data corresponding to the first display area among the first image data signals, and generates first dimming data indicating a dimming amount of a backlight corresponding to each of a first group of sub-areas included in the first enlarged display area among the plurality of sub-areas based on image data corresponding to the first enlarged display area; the second source driver generates the second gradation voltage signal based on image data corresponding to the second display area among the second image data signals, and generates second dimming data indicating a dimming amount of a backlight corresponding to each of a second group of sub-areas included in the second enlarged display area among the plurality of sub-areas based on image data corresponding to the second enlarged display area; the first source driver acquires the second dimming data from the second source driver, and supplies the first dimming data and the second dimming data to the illumination driver; A display device characterized by:
2. The first source driver a local dimming calculation unit that generates the first dimming data; a grayscale voltage generating unit that generates the first grayscale voltage signal; a data processing unit that generates a first data enable signal indicating a period during which the local dimming calculation unit is to operate, based on the first image data signal; a data enable signal generation unit that generates a second data enable signal indicating a period during which the gradation voltage generation unit is to operate, based on setting data for the first display area and the first data enable signal; 2. The display device according to claim 1, further comprising:
3. 3. The display device according to claim 2, wherein the first source driver and the second source driver have registers that store setting data indicating the range of the first display area and setting data indicating the range of the first enlarged display area.
4. the first display area and the second display area are display areas obtained by dividing a display region of the display panel in an extension direction of the data lines, 2. The display device according to claim 1, wherein the first enlarged display area and the second enlarged display area include regions that overlap each other in a direction intersecting the extension direction of the data lines.
5. a source driver connected to a display panel having a plurality of pixel units arranged in a matrix at each intersection of a plurality of data lines and a plurality of gate lines, and an illumination driving unit that controls the amount of light of a backlight that illuminates each of a plurality of sub-areas obtained by dividing a display screen of the display panel, and that outputs a first grayscale voltage signal to a data line among the plurality of data lines that is arranged at a position corresponding to a first display area of the display panel, a gradation voltage generating section that receives a first image data signal consisting of image data corresponding to a first enlarged display area including the first display area and a display area of a predetermined range adjacent to the first display area, and generates the first gradation voltage signal based on image data corresponding to the first display area in the first image data signal; a local dimming calculation unit that generates first dimming data indicating a dimming amount of a backlight corresponding to each of a first group of sub-areas included in the first enlarged display area among the plurality of sub-areas based on image data corresponding to the first enlarged display area; a communication unit that supplies the first dimming data to the lighting driver; A source driver comprising:
Citation Information
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