Display device

Abstract

To reduce defects in an oxide semiconductor film in a semiconductor device using an oxide semiconductor film, improves the electrical characteristics in the semiconductor device using the oxide semiconductor film, and improves the reliability in the semiconductor device using the oxide semiconductor film.SOLUTION: A manufacture method of a semiconductor device includes forming a gate electrode and a gate insulating film on a substrate, forming an oxide semiconductor film on the gate insulating film, forming a pair of electrodes in contact with the oxide semiconductor film, forming a first oxide insulating film on the oxide semiconductor film and the pair of electrodes by a plasma CVD method using film formation conditions of 280°C or higher and 400°C or lower, forming a second oxide insulating film on the first oxide insulating film, and performing heat-treatment at 150°C or higher and 400°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, , manufacture, or composition of matter. In particular, The present invention relates to, for example, a semiconductor device, a display device, a light-emitting device, a power storage device, a driving method thereof, or In particular, the present invention relates to a semiconductor having, for example, an oxide semiconductor. In particular, the present invention relates to a device, a display device, or a light-emitting device, for example, having a transistor. The present invention relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single-crystal silicon formed on a glass substrate. It is made of silicon semiconductor such as silicon or polycrystalline silicon. Transistors using semiconductors are also used in integrated circuits (ICs).

[0003] In recent years, metal oxides that exhibit semiconductor properties have been used in transistors instead of silicon semiconductors. In this specification, metal oxides that exhibit semiconductor properties are referred to as oxides. We will call it a semiconductor.

[0004] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor may be used. A transistor is fabricated and used as a switching element for a pixel of a display device. Techniques have been disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0006] In a transistor using an oxide semiconductor film, the oxide semiconductor film contains a large number of defects. This leads to poor electrical characteristics of the transistor and also to deterioration over time and stress testing (e.g. For example, in a BT (Bias-Temperature) stress test, This causes an increase in the amount of variation in the electrical characteristics of the capacitor, typically the threshold voltage.

[0007] In addition to defects, impurities contained in the oxide semiconductor film, typically, constituent elements of the insulating film, If there are a lot of impurities such as silicon and carbon, the electrical characteristics of the transistor will be poor. .

[0008] In view of this, one embodiment of the present invention is to provide a semiconductor device or the like including an oxide semiconductor film. Another object of the present invention is to reduce defects in a semiconductor film. In a semiconductor device using a conductor film, the impurity concentration of an oxide semiconductor film is reduced. Another object of one embodiment of the present invention is to provide a semiconductor device including an oxide semiconductor film. Another object of one embodiment of the present invention is to improve electrical characteristics of the oxide semiconductor layer. One of the objectives is to improve the reliability of semiconductor devices using semiconductor films. Another object of one embodiment of the present invention is to provide a semiconductor device or the like with low off-state current. Another object of one embodiment of the present invention is to provide a semiconductor device or the like with low power consumption. Another embodiment of the present invention provides a display device or the like that can reduce eye fatigue. Another object of one embodiment of the present invention is to provide a semiconductor device using a transparent semiconductor film. Another object of one embodiment of the present invention is to provide a novel semiconductor device, etc. Another object of one embodiment of the present invention is to provide a semiconductor device having excellent characteristics. The objective of this paper is to provide the following. The description of these objectives does not preclude the existence of other objectives. It is to be noted that one embodiment of the present invention does not necessarily solve all of these problems. Problems other than these will be obvious from the description, drawings, claims, etc. Other issues can be identified from the description, drawings, claims, etc. It is possible to do this. [Means for solving the problem]

[0009] One aspect of the present invention is to form a gate electrode and a gate insulating film on a substrate, After the oxide semiconductor film is formed, a pair of insulating films in contact with the oxide semiconductor film is formed without performing a heat treatment step. and forming electrodes on the oxide semiconductor film and the pair of electrodes at a temperature of 280° C. or higher and 400° C. or lower. A first oxide insulating film is formed by a plasma CVD method under the film forming conditions, and the first oxide insulating film is A second oxide insulating film is formed on the insulating film, and the insulating film is heated at a temperature of 150°C to 400°C, preferably 300°C. A semiconductor device that is subjected to heat treatment at a temperature of 320°C to 370°C is preferably used. This is how to make the device.

[0010] The pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less by introducing the raw material gas into the processing chamber. The first oxide is formed by supplying high frequency power to an electrode provided in the processing chamber. An insulating film can be formed.

[0011] The substrate placed in the evacuated processing chamber is kept at a temperature of 180°C or higher and 280°C or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or more and 250 Pa or less. The electrode installed in the processing chamber is 0.17 W / cm 2 More than 0.5W / cm 2 High frequency below By supplying power, the second oxide insulating film can be formed.

[0012] The first oxide insulating film and the second oxide insulating film are formed by deposition using a deposition gas containing silicon. and an oxidizing gas is used as a raw material gas to form a silicon oxide film or a silicon oxynitride film. do. [Effects of the Invention]

[0013] According to one embodiment of the present invention, in a semiconductor device including an oxide semiconductor film, Alternatively, one embodiment of the present invention is a semiconductor device using an oxide semiconductor film. In a semiconductor device or the like, impurities in an oxide semiconductor film can be reduced. According to one embodiment, electrical characteristics of a semiconductor device including an oxide semiconductor film can be improved. According to one embodiment of the present invention, a semiconductor device including an oxide semiconductor film can be According to one embodiment of the present invention, the off-state current can be reduced, and the reliability can be improved. According to one embodiment of the present invention, a semiconductor device or the like having low power consumption can be provided. According to one embodiment of the present invention, a semiconductor device or the like having low eye fatigue can be provided. It is possible to provide a display device or the like that can reduce the above-mentioned problem. This makes it possible to provide a semiconductor device using a transparent semiconductor film. According to one embodiment of the present invention, a novel semiconductor device or the like can be provided. According to this embodiment, a semiconductor device or the like having excellent characteristics can be provided. [Brief explanation of the drawings]

[0014] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 2] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 3] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 4] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 5] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 6] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 7] FIG. 1 illustrates a band structure of a transistor. [Figure 8] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 9] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 10] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 11] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 12] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 13] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 15]1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. [Figure 16] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 17] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 18] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 19] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 20] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 22] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 23] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 24] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 25] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 26] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 27] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 28] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 29] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 30] FIG. 1 is a diagram showing an electron microbeam diffraction pattern of an oxide semiconductor. [Figure 31] FIG. 1 is a diagram showing an electron microbeam diffraction pattern of an oxide semiconductor. [Figure 32] 1A and 1B are diagrams illustrating a touch sensor according to an embodiment. [Figure 33] 1A to 1C are diagrams illustrating examples of the configuration of a touch panel and an electronic device according to an embodiment. [Figure 34] 1A and 1B are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 35] 1A to 1C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment. [Figure 36] FIG. 1 is a block diagram showing an example of the configuration of a liquid crystal display device. [Figure 37] 1 is a timing chart illustrating an example of a method for driving a liquid crystal display device. [Figure 38] 1A to 1C illustrate electronic devices using a semiconductor device which is one embodiment of the present invention. [Figure 39] 1A to 1C illustrate electronic devices using a semiconductor device which is one embodiment of the present invention. [Figure 40] FIG. 10 is a diagram showing the Vg-Id characteristics of a transistor. [Figure 41] 10A and 10B are diagrams showing the amount of change in the threshold voltage and shift value of a transistor after a BT stress test and a light BT stress test. [Figure 42] FIG. 2 is a diagram illustrating the definitions of a threshold voltage and a shift value. [Figure 43] FIG. 10 is a diagram showing the results of a BT stress test. [Figure 44] FIG. 1 shows the results of TDS measurement. [Figure 45] FIG. 1 is a diagram illustrating the results of ESR measurements. [Figure 46] FIG. 1 is a diagram illustrating the results of SIMS measurements. [Figure 47] 1 is a model diagram for calculations of the H2O desorption process. [Figure 48] 1 is a model diagram for calculations of the H2O desorption process. [Figure 49] Energy diagram and schematic diagram for the H2O desorption process. [Figure 50] FIG. 1 is a diagram illustrating the results of SIMS measurements. [Figure 51] FIG. 1 is a diagram illustrating the results of SIMS measurements. [Figure 52] FIG. 1 shows the results of TDS measurement. [Figure 53] FIG. 10 is a diagram showing the Vg-Id characteristics of a transistor. DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and methods thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the design and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the embodiments and examples described below, the same parts or parts having similar functions In the case of parts, the same symbols or the same hatch patterns are used in common among different drawings, and the repetition The explanation of repetition will be omitted.

[0016] In each figure described in this specification, the size of each component, the thickness of the film, or the area is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0017] In addition, terms such as first, second, and third used in this specification are used interchangeably to avoid confusion of components. It is not intended to limit the number of items. The terms "second" or "third" can be used interchangeably to explain the present invention.

[0018] The functions of the "source" and "drain" are also different when the direction of the current changes during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0019] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) of a unit charge in a particle. However, in general, the potential difference between the potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, the term "potential" may be read as "voltage." , voltage may be read as potential.

[0020] In this specification, when an etching step is performed after a photolithography step, The mask formed in the photolithography process is removed.

[0021] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings. Please refer to the following for explanation.

[0022] In a transistor including an oxide semiconductor film, An example of such defects is oxygen vacancies. The threshold voltage of a transistor using a thin film is easily shifted in the negative direction, and the This is because charges are generated due to oxygen vacancies in the oxide semiconductor film. This is because the resistance is lowered when the transistor has normally-on characteristics. Various problems may occur, such as malfunctions becoming more likely to occur or power consumption increasing when not in operation. In addition, the electrical characteristics of transistors, typically There is a problem in that the amount of fluctuation in the threshold voltage increases.

[0023] One of the causes of oxygen vacancies is damage that occurs during the transistor manufacturing process. For example, an insulating film or a conductive film is formed on an oxide semiconductor film by plasma CVD or sputtering. When forming an oxide semiconductor film, the oxide semiconductor film may be damaged depending on the forming conditions. This sometimes happens.

[0024] One of the causes of oxygen vacancies is oxygen desorption from an oxide semiconductor film due to heat treatment. For example, in order to remove impurities such as hydrogen and water contained in the oxide semiconductor film, However, when heat treatment is performed in a state where the oxide semiconductor film is exposed, the oxide Oxygen is released from the semiconductor film, forming oxygen vacancies.

[0025] In addition to oxygen deficiency, impurities such as silicon and carbon, which are constituent elements of the insulating film, also affect the Therefore, the impurities are mixed into the oxide semiconductor film, which causes poor electrical characteristics of the transistor. As a result, the resistance of the oxide semiconductor film is reduced, and the oxide semiconductor film is susceptible to deterioration over time and stress testing. This leads to a problem of an increase in the amount of fluctuation in the electrical characteristics of the transistor, typically the threshold voltage. There is.

[0026] In view of this, in this embodiment, a semiconductor device including a transistor having an oxide semiconductor film In the present invention, oxygen vacancies in an oxide semiconductor film having a channel region and defects in the oxide semiconductor film are generated. One of the objectives is to reduce the concentration of impurities.

[0027] On the other hand, display devices on the market are becoming larger, with screen sizes of 60 inches or more diagonally. Furthermore, development is being carried out with a view to screen sizes of 120 inches or more diagonally. For this reason, the glass substrates used in display devices are large, 8th generation and above. However, when using a large-area substrate, high-temperature processing, for example, 450 Heating at temperatures above 100°C requires large and expensive heating equipment, which increases production costs. Furthermore, high temperature processing can cause warping and shrinkage of the substrate, resulting in a lower yield. is reduced.

[0028] Therefore, in this embodiment, the number of heat treatment steps is small and it is possible to use a large-area substrate. An object of the present invention is to manufacture a semiconductor device by using heat treatment at a low temperature.

[0029] 1A to 1C are top views and cross-sectional views of a transistor 50 included in a semiconductor device. The transistor 50 shown in FIG. 1 is a channel-etched transistor. 1(A) is a top view of the transistor 50, and FIG. 1(B) is a diagram of the transistor 50 along the dashed line A- in FIG. 1(A). FIG. 1(C) is a cross-sectional view taken along the dashed line CD in FIG. 1(A). In FIG. 1A, for clarity, the substrate 11 and some of the components of the transistor 50 (e.g., For example, gate insulating film 17), oxide insulating film 23, oxide insulating film 24, nitride insulating film 25, etc. etc. are omitted.

[0030] The transistor 50 shown in FIGS. 1B and 1C has a gate electrode provided on a substrate 11. The gate electrode 15 is formed on the substrate 11 and the gate electrode 15. an oxide semiconductor film 18 overlapping the gate electrode 15 via a gate insulating film 17; The semiconductor film 18 has a pair of electrodes 21 and 22 in contact with it. On the compound semiconductor film 18 and the pair of electrodes 21 and 22, an oxide insulating film 23 and an oxide insulating film 22 are formed. 4 and a protective film 26 made of a nitride insulating film 25 is formed.

[0031] The transistor 50 described in this embodiment includes the oxide semiconductor film 18. A part of the oxide semiconductor film 18 functions as a channel region. The oxide insulating film 23 is formed so as to contact the insulating film 23. A compound insulating film 24 is formed.

[0032] The oxide semiconductor film 18 is typically an In—Ga oxide film, an In—Zn oxide film, or an In -M-Zn oxide film (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf ) is available.

[0033] When the oxide semiconductor film 18 is an In-M-Zn oxide film, the sum of In and M is When the atomic percentage is 100 atomic %, the atomic ratio of In to M is preferably 25 atomic %. atomic % or more, M is less than 75 atomic %, and more preferably In is 34 atomic % ic% or more, and M must be less than 66 atomic%.

[0034] The oxide semiconductor film 18 has an energy gap of 2 eV or more, preferably 2.5 eV or more. More preferably, it is 3 eV or more. By using such a material, the off-state current of the transistor 50 can be reduced.

[0035] The thickness of the oxide semiconductor film 18 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 0 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0036] The oxide semiconductor film 18 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr, L a, Ce, Nd or Hf), the spatula used to deposit the In-M-Zn oxide film The atomic ratio of the metal elements in the target preferably satisfies In≧M, Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Z. Preferably, n=1:1:1, and In:M:Zn=3:1:2. The atomic ratio of the film 18 is included in the sputtering target as an error. This includes a variation of plus or minus 20% in the atomic ratio of metal elements.

[0037] The oxide semiconductor film 18 is an oxide semiconductor film with low carrier density. For example, The oxide semiconductor film 18 has a carrier density of 1×10 17 pieces / cm 3 Below, preferably 1 x 1 0 15 pieces / cm 3 or less, more preferably 1 × 10 13 pieces / cm 3 Below, more preferably 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0038] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the carrier density and impurity of the oxide semiconductor film 18 are controlled. By appropriately adjusting the concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. It is preferable that:

[0039] The oxide semiconductor film 18 is formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a thin film, it is possible to fabricate transistors with even better electrical properties. Here, it is preferable that the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). High purity authentic or substantially high purity authentic. Some oxide semiconductors have a small number of carrier generation sources, so the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may In this case, the threshold voltage is rarely negative (also called normally-on). In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film may not be obtained. Since the defect level density is low, the trap level density may also be low. The oxide semiconductor film, which is substantially intrinsic or highly purified, has a significantly small off-state current and a large channel width. is 1×10 6 Even if the device has a channel length L of 10 μm, the source and drain electrodes When the voltage between electrodes (drain voltage) is in the range of 1V to 10V, the off-state current is Below the measurement limit of the meter analyzer, i.e., 1×10 -13 Obtaining a characteristic of A or below Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can The fluctuation of the electrical characteristics is small, and the transistor may become highly reliable. The charges trapped in the trap levels of the membrane take a long time to disappear, and they act as if they are solid. Therefore, the oxide semiconductor film with a high density of trap states may behave like a constant charge. A transistor in which a channel region is formed may have unstable electrical characteristics. The element may be hydrogen, nitrogen, an alkali metal, or an alkaline earth metal.

[0040] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the part from which oxygen has been desorbed). When hydrogen enters the gap, electrons, which act as carriers, are generated. When bonded to oxygen, which bonds to metal atoms, electrons, which act as carriers, may be generated. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It is easy to become.

[0041] Therefore, it is preferable that the amount of hydrogen in the oxide semiconductor film 18 be reduced as much as possible. Specifically, the oxide semiconductor film 18 is subjected to secondary ion mass spectrometry (SIMS). The hydrogen concentration obtained by Daily Ion Mass Spectrometry (DISA) was 5×10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 Below, more preferably 1 × 1 0 16 atoms / cm 3 The following applies.

[0042] When the oxide semiconductor film 18 contains silicon or carbon, which is one of the group 14 elements, As a result, oxygen vacancies increase in the oxide semiconductor film 18, causing it to become n-type. The concentration of silicon and carbon in the semiconductor film 18 (concentration obtained by secondary ion mass spectrometry) ) to 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0043] In addition, in the oxide semiconductor film 18, alkali metals obtained by secondary ion mass spectrometry The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 Alkali metals and alkaline earth metals are When bonded to a carbide semiconductor, carriers may be generated, increasing the off-state current of the transistor. For this reason, the alkali metal or alkaline earth metal in the oxide semiconductor film 18 may It is preferable to reduce the concentration of metalloids.

[0044] Furthermore, when nitrogen is contained in the oxide semiconductor film 18, electrons serving as carriers are generated. As a result, the nitride semiconductor containing nitrogen is used. Therefore, the transistor having the oxide semiconductor film tends to be normally on. Therefore, it is preferable that nitrogen is reduced as much as possible. For example, in secondary ion mass spectrometry, The resulting nitrogen concentration is 5 x 10 18 atoms / cm 3 It is preferable to do the following:

[0045] The oxide semiconductor film 18 may have a non-single crystal structure, for example. , CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described below), or Among non-single crystal structures, the amorphous structure has the highest defect level density and CA AC-OS has the lowest defect level density.

[0046] The oxide semiconductor film 18 may have, for example, an amorphous structure. For example, the atomic arrangement is disordered and does not have crystalline components. Alternatively, the oxide film has an amorphous structure. For example, the amorphous structure of the crystalline silicon film is completely amorphous and does not have any crystalline portions.

[0047] The oxide semiconductor film 18 may have an amorphous structure, a microcrystalline structure, or a polycrystalline structure. The film may be a mixed film having two or more of the following: a CAAC-OS region, a single crystal structure region, and a single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA region, or the like. It may have two or more regions, either a C-OS region or a single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA It may have a layered structure of two or more regions, either a C-OS region or a single crystal structure region. be.

[0048] In the transistor 50 described in this embodiment, As shown in FIG. 1, the oxide insulating film 23 is formed, and the oxide insulating film 24 is in contact with the oxide insulating film 23. is formed.

[0049] The oxide insulating film 23 is an oxygen-permeable oxide insulating film. 2. Reducing damage to the oxide semiconductor film 18 when forming the oxide insulating film 24 to be formed later. It also functions as a membrane.

[0050] The oxide insulating film 23 has a thickness of 5 nm to 150 nm, preferably 5 nm or more. A silicon oxide film, silicon oxynitride film, or the like having a thickness of 50 nm or less can be used. In the specification, a silicon oxynitride film is a film having a higher oxygen content than nitrogen content. A silicon nitride oxide film is a film that contains more nitrogen than oxygen. Refers to a large membrane.

[0051] Furthermore, it is preferable that the oxide insulating film 23 has a small number of defects. The spin of the signal appearing at g=2.001 originating from the silicon dangling bond is Density is 3×10 17 spins / cm 3 This is because the oxide insulation If the density of defects in the film 23 is high, oxygen bonds to the defects, and the oxide insulating film 2 This is because the amount of oxygen that passes through 3 decreases.

[0052] In addition, the number of defects at the interface between the oxide insulating film 23 and the oxide semiconductor film 18 is small. Preferably, typically, the ESR measurement shows that the oxide semiconductor film 18 has a defect-induced g=1 The spin density of the signal appearing at .93 is 1×10 17 spins / cm 3 Further detection It is preferably equal to or lower than the lower limit.

[0053] Note that in the oxide insulating film 23, all of the oxygen that has entered the oxide insulating film 23 from the outside is Some oxygen does not move to the outside of the oxide insulating film 23 and remains in the oxide insulating film 23. Oxygen enters the oxide insulating film 23, and the oxygen contained in the oxide insulating film 23 When oxygen moves to the outside, oxygen may move in the oxide insulating film 23.

[0054] When an oxygen-permeable oxide insulating film is formed as the oxide insulating film 23, the oxide insulating film 23 The oxide insulating film 23 is formed on the surface of the insulating film 23. The compound semiconductor film 18 can be transported to the compound semiconductor film 18.

[0055] An oxide insulating film 24 is formed so as to be in contact with the oxide insulating film 23. 4 is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. An oxide insulating film that contains more oxygen than the oxygen required for the stoichiometric composition is subject to oxidation by heating. The oxide insulating film contains more oxygen than the oxygen required for the stoichiometric composition. In TDS analysis, the amount of oxygen released, converted to oxygen atoms, was 1.0 x 10 18 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 The oxide insulating film is.

[0056] The oxide insulating film 24 has a thickness of 30 nm to 500 nm, preferably 50 nm. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 400 nm or more can be used.

[0057] Furthermore, it is preferable that the oxide insulating film 24 has a small number of defects. The spin of the signal appearing at g=2.001 originating from the silicon dangling bond is Density is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the oxide insulating film 24 has a thickness of 100 nm or less compared to the oxide insulating film 23. Since the oxide insulating film 23 is far from the oxide semiconductor film 18, the defect density may be higher than that of the oxide insulating film 23. stomach.

[0058] Other configuration details of transistor 50 are described below.

[0059] There is no particular restriction on the material of the substrate 11, but it should be strong enough to withstand the subsequent heat treatment. It must be heat resistant. For example, glass substrates, ceramic substrates, quartz substrates, and surface treatment substrates are A fiber substrate or the like may be used as the substrate 11. Alternatively, a single material such as silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to use a semiconductor substrate, etc., and a semiconductor element is provided on such a substrate. It is also possible to use a glass substrate as the substrate 11. When a glass substrate is used as the substrate 11, Generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm), 8th generation Generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 1st By using large area substrates such as the 2950mm x 3400mm generation, large display devices can be produced. can be produced.

[0060] In addition, a flexible substrate is used as the substrate 11, and the transistor 50 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 11 and the transistor 50. The delamination is performed by separating the semiconductor device from the substrate 11 after completing a part or all of the semiconductor device thereon. In this case, the transistor 50 is mounted on a substrate with poor heat resistance. It can also be transferred to plates and flexible substrates.

[0061] The gate electrode 15 is made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or titanium. or an alloy containing the above-mentioned metal elements, or It can be formed by using an alloy of a combination of metal elements. Alternatively, a metal element selected from one or more of the following may be used: The electrode 15 may have a single layer structure or a laminated structure of two or more layers. Single layer aluminum film structure, double layer titanium film laminated on aluminum film, titanium nitride Two-layer structure in which a titanium film is laminated on a titanium nitride film, and two-layer structure in which a tungsten film is laminated on a titanium nitride film. Two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film; A titanium film is layered on top of an aluminum film, and then another titanium film is formed on top of that. There are also three-layer structures that use aluminum, titanium, tantalum, tungsten, molybdenum, etc. A combination of one or more elements selected from the group consisting of buten, chromium, neodymium, and scandium Alternatively, an alloy film or a nitride film may be used.

[0062] The gate electrode 15 is made of indium tin oxide or indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide containing titanium oxide A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element may also be used.

[0063] In addition, an In-Ga-Zn-based oxynitride film is formed between the gate electrode 15 and the gate insulating film 17. , In-Sn based oxynitride film, In-Ga based oxynitride film, In-Zn based oxynitride film, Sn-based oxynitride film, In-based oxynitride film, metal nitride film (InN, ZnN, etc.) These films have a work function of 5 eV or more, preferably 5.5 eV or more, and are made of oxides. Since this value is larger than the electron affinity of a semiconductor, the The threshold voltage can be shifted to the positive side, making it a switching element with so-called normally-off characteristics. For example, when an In-Ga-Zn oxynitride film is used, at least the oxide The nitrogen concentration is higher than that of the oxide semiconductor film 18, specifically, 7 atomic % or more of In-Ga-Zn oxide. A nitride film is used.

[0064] The gate insulating film 17 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn based metals An oxide or the like may be used, and the layer may be a laminated layer or a single layer.

[0065] The gate insulating film 17 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium Laminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of k-materials can reduce gate leakage of transistors.

[0066] The thickness of the gate insulating film 17 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. It is preferable to set the thickness to 300 nm or less, and more preferably to set the thickness to 50 nm or more and 250 nm or less.

[0067] The pair of electrodes 21 and 22 are made of a conductive material such as aluminum, titanium, chromium, or nickel. , copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten The metal or alloy containing it as the main component is used as a single layer structure or a laminated structure. For example, a single layer structure of aluminum film containing silicon, a titanium film stacked on an aluminum film, Two-layer structure with a titanium film on a tungsten film, two-layer structure with a copper-magnesium- A two-layer structure in which a copper film is laminated on an aluminum alloy film, a titanium film or titanium nitride film, and An aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and then the aluminum film or the copper film is laminated on the titanium film or the titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top, a molybdenum film or molybdenum nitride film A molybdenum film or molybdenum nitride film is overlaid with an aluminum film or copper film. A three-layer structure is formed by laminating a layer of a molybdenum film or a molybdenum nitride film on top of that. It is also possible to use a transparent conductive material containing indium oxide, tin oxide, or zinc oxide. .

[0068] Furthermore, oxygen, hydrogen, water, alkali metal, alkaline earth metal, etc. are deposited on the oxide insulating film 24. By providing the nitride insulating film 25 having the blocking effect, Diffusion of oxygen to the outside and intrusion of hydrogen, water, etc. into the oxide semiconductor film 18 from the outside are prevented. The nitride insulating film can be silicon nitride, silicon nitride oxide, or aluminum nitride. , aluminum oxide nitride, etc. In addition, oxygen, hydrogen, water, alkali metals, alkaline earth metals Instead of a nitride insulating film that has a blocking effect on metals, etc., a blocking film that blocks oxygen, hydrogen, water, etc. An oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be provided. Examples of the oxide insulating film having such a structure include aluminum oxide, aluminum oxynitride, and gallium oxide. gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, Hafnium nitride and the like.

[0069] Next, a manufacturing method of the transistor 50 shown in FIGS.

[0070] As shown in FIG. 2(A), a gate electrode 15 is formed on a substrate 11. The gate insulating film 17 is formed.

[0071] Here, a glass substrate is used as the substrate 11.

[0072] The gate electrode 15 is formed by the following methods. First, the gate electrode 15 is formed by sputtering, CVD, or evaporation. A conductive film is formed by deposition or the like, and a mask is formed on the conductive film by a photolithography process. Next, the conductive film is partially etched using the mask to form the gate electrode 15. After this, the mask is removed.

[0073] The gate electrode 15 may be formed by electrolytic plating, printing, inkjet printing, or the like instead of the above-mentioned method. It may also be formed by a jet method or the like.

[0074] Here, a tungsten film having a thickness of 100 nm is formed by sputtering. A mask is formed by a photolithography process, and a tungsten film is formed using the mask. A gate electrode 15 is formed by dry etching.

[0075] The gate insulating film 17 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0076] The gate insulating film 17 is a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. When forming a silicon film, a deposition gas containing silicon and an oxidizing gas are used as source gases. Representative examples of silicon-containing deposition gases include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0077] When a gallium oxide film is formed as the gate insulating film 17, MOCVD (Metal Organic Chemical Vapor Deposition (OCVD) method It can be formed by

[0078] Next, as shown in FIG. 2B, an oxide semiconductor film 18 is formed on the gate insulating film 17. .

[0079] The method for forming the oxide semiconductor film 18 will be described below. Then, a photolithography is performed on the oxide semiconductor film. After forming a mask by a lithography process, part of the oxide semiconductor film is etched using the mask. By etching, an oxide semiconductor film 18 with element isolation as shown in FIG. 2(B) is formed. After this, the mask is removed.

[0080] The oxide semiconductor film that will later become the oxide semiconductor film 18 can be formed by sputtering, coating, pulse The layer can be formed by using a laser deposition method, a laser ablation method, or the like.

[0081] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma is used. The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like.

[0082] The sputtering gas is a rare gas (typically argon), oxygen gas, or a mixture of rare gas and oxygen. In the case of a mixed gas of rare gas and oxygen, the ratio of oxygen to rare gas is It is preferable to increase the gas ratio.

[0083] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0084] In order to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film, a chamber It is necessary not only to evacuate the inside of the chamber to a high vacuum, but also to highly purify the sputtering gas. The oxygen gas and argon gas used have a dew point of -40°C or less, preferably -80°C or less. Gas that has been highly purified to -100°C or below, and more preferably -120°C or below By using the above, it is possible to prevent moisture and the like from being taken into the oxide semiconductor film as much as possible. do.

[0085] Here, an In-Ga-Zn oxide target (In:Ga:Zn=1:1:1) was used. A 35-nm-thick In-Ga-Zn oxide film was deposited as an oxide semiconductor film by sputtering. Next, a mask is formed over the oxide semiconductor film, and a part of the oxide semiconductor film is removed. By selectively etching, the oxide semiconductor film 18 is formed.

[0086] Next, as shown in FIG. 2C, after the oxide semiconductor film 18 is formed, the oxide semiconductor film 18 is , a pair of electrodes 21 and 22 are formed.

[0087] The method for forming the pair of electrodes 21 and 22 will be described below. First, the sputtering method and the CVD method are used. A conductive film is formed on the conductive film by a photolithography process, a deposition method, or the like. Next, the conductive film is etched using the mask to form a pair of electrodes 21 and 22. 2 is formed. After this, the mask is removed.

[0088] Here, a tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a A titanium film having a thickness of 100 nm is then laminated on the titanium film by sputtering. A mask is formed by a photolithography process, and a tungsten film and an aluminum film are formed using the mask. The aluminum film and the titanium film are dry etched to form a pair of electrodes 21 and 22 .

[0089] Next, as shown in FIG. 2(D), the following is formed on the oxide semiconductor film 18 and the pair of electrodes 21 and 22: The oxide insulating film 23 is formed. Next, the oxide insulating film 24 is formed over the oxide insulating film 23. .

[0090] After the oxide insulating film 23 is formed, the oxide insulating film 2 is continuously formed without being exposed to the air. After the oxide insulating film 23 is formed, the source gas The oxide insulating film 24 is continuously formed by adjusting one or more of the flow rate, pressure, high frequency power, and substrate temperature. By forming the oxide insulating film 23 and the oxide insulating film 24 in the In addition, the impurity concentration of the oxide insulating film 24 can be reduced. The oxygen vacancies in the oxide semiconductor film 18 can be reduced. It is possible.

[0091] The oxide insulating film 23 is made of a silicon dioxide film placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280°C or higher and 400°C or lower, and raw material gas is introduced into the processing chamber. The pressure in the air is set to 20 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 250 Pa or less. Under the condition that high frequency power is supplied to an electrode provided in the processing chamber, oxide insulating film 2 As the film 3, a silicon oxide film or a silicon oxynitride film can be formed.

[0092] As a source gas for the oxide insulating film 23, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of silicon-containing deposition gases include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0093] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 23. In addition, by providing the oxide film 19 and the oxide insulating film 23, it is possible to In the process of forming the oxide insulating film 24, damage to the oxide semiconductor film 18 can be reduced. is.

[0094] The oxide insulating film 23 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280°C or higher and 400°C or lower, and raw material gas is introduced into the processing chamber. The pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, and high frequency power is applied to the electrode installed in the processing chamber. Depending on the conditions for supplying the oxygen, the oxide insulating film 23 may be a silicon oxide film or a silicon oxynitride film. A silicon film can be formed.

[0095] Under the film formation conditions, by setting the substrate temperature to the above temperature, the bonding strength between silicon and oxygen As a result, the oxide insulating film 23 becomes oxygen-permeable, dense, and hard. Oxide insulating film, typically, etching rate for 0.5 wt % hydrofluoric acid at 25°C A silicon oxide film or an oxynitride film having a viscosity of 10 nm / min or less, preferably 8 nm / min or less. A silicon film can be formed.

[0096] In addition, since the oxide insulating film 23 is formed while heating, the oxide semiconductor The hydrogen, water, etc. contained in the oxide semiconductor film 18 can be desorbed. The hydrogen reacts with oxygen radicals generated in the plasma to form water. Since the substrate is heated during the film formation process, the water generated by the combination of oxygen and hydrogen That is, the oxide insulating film 23 is formed by the plasma CVD method. By forming the oxide semiconductor film, the amount of water and hydrogen contained in the oxide semiconductor film can be reduced.

[0097] In addition, since heating is performed in the process of forming the oxide insulating film 23, the oxide semiconductor film 18 The heating time in an exposed state is short, and oxygen is released from the oxide semiconductor film by heat treatment. That is, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. This can be done.

[0098] Furthermore, by setting the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film The water content in the 23 is reduced, which reduces the variation in the electrical characteristics of the transistor 50. This can reduce the capacitance and suppress fluctuations in the threshold voltage.

[0099] In addition, by setting the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film 23 When forming the oxide semiconductor film 18, damage to the oxide semiconductor film 18 can be reduced. The amount of oxygen vacancies in the semiconductor film 18 can be reduced. Alternatively, the temperature at which the oxide insulating film 24 is formed later is increased, typically to a temperature higher than 220° C. By setting the temperature at a low level, part of oxygen contained in the oxide semiconductor film 18 is released, and oxygen vacancies are formed. In addition, in order to improve the reliability of the transistor, the oxide insulating film 2 to be formed later is By using the film formation conditions for reducing the defect amount in 4, the amount of oxygen desorption is easily reduced. As a result, it may be difficult to reduce oxygen vacancies in the oxide semiconductor film 18. The pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less during the formation of the oxide insulating film 23. By reducing damage to the oxide semiconductor film 18 due to the oxidation of the oxide insulating film 24, the oxide semiconductor film 18 can be easily oxidized. The oxygen vacancies in the oxide semiconductor film 18 can be reduced by the amount of oxygen desorption.

[0100] In addition, by increasing the amount of oxidizing gas to the amount of silicon-containing deposition gas by 100 times or more, The hydrogen content in the oxide insulating film 23 can be reduced. Since the amount of hydrogen mixed into the semiconductor film 18 can be reduced, the threshold voltage of the transistor can be reduced. The shift can be suppressed.

[0101] Here, the oxide insulating film 23 is formed by using silane at a flow rate of 30 sccm and silane at a flow rate of 4000 sccm. The source gas was dinitrogen monoxide (NO) of 2.0 cm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power supply was used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method under the following conditions. In this way, a silicon oxynitride film that is permeable to oxygen can be formed.

[0102] The oxide insulating film 24 is made of a silicon dioxide film placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at 180°C or higher and 280°C or lower, more preferably 200°C or higher and 240°C or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. , more preferably 100 Pa or more and 200 Pa or less, and .17W / cm2 More than 0.5W / cm 2 or less, more preferably 0.25 W / cm 2 End 0.35W / cm 2 Under the following conditions of high frequency power supply, silicon oxide film or oxide A silicon nitride film is formed.

[0103] As a source gas for the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of silicon-containing deposition gases include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0104] The oxide insulating film 24 is formed under the conditions of a high frequency of the above power density in a processing chamber under the above pressure. By supplying wave power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. As the source gas is added, oxidation of the source gas progresses, and the oxygen content in the oxide insulating film 24 becomes stoichiometric. On the other hand, in the film formed at the substrate temperature, the silicon and oxygen Because the bonding strength is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. , which contains more oxygen than the stoichiometric composition, and some of the oxygen is released by heating. In addition, the oxide insulating film 2 can be formed on the oxide semiconductor film 18. Therefore, in the step of forming the oxide insulating film 24, the oxide insulating film 2 3 serves as a protective film for the oxide semiconductor film 18. As a result, damage to the oxide semiconductor film 18 is prevented. Therefore, the oxide insulating film 24 can be formed using high frequency power with a high power density while reducing the Cut.

[0105] In addition, under the film forming conditions of the oxide insulating film 24, the deposition gas containing silicon is By increasing the flow rate of the reactive gas, the number of defects in the oxide insulating film 24 can be reduced. Typically, ESR measurements reveal that the g value is 2.0, which is due to the dangling bond of silicon. The spin density of the signal appearing in 01 is 6×10 17 spins / cm 3 Less than 3x, preferably 10 17 spins / cm 3 Less than or equal to 1.5 × 10 17 spins / cm 3 below As a result, the signal quality of the transistor can be improved. It can increase reliability.

[0106] Here, the oxide insulating film 24 is formed by silane at a flow rate of 200 sccm and silane at a flow rate of 4000 s ccm of dinitrogen monoxide was used as the source gas, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 27.12MHz high frequency power source was used to apply 1500W of high frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the supplied plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 Parallel plate type plasma CVD The power supplied is converted to power per unit area (power density) of 0.25W. / cm 2 is.

[0107] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 400° C. or lower. The temperature is preferably 300°C or higher and 400°C or lower, more preferably 320°C or higher and 370°C or lower.

[0108] The heat treatment can be carried out using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. The processing time can be reduced.

[0109] The heat treatment is carried out in a nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) The above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0110] By this heat treatment, part of oxygen contained in the oxide insulating film 24 is transferred to the oxide semiconductor film 18. By moving the oxygen atoms, the amount of oxygen vacancies in the oxide semiconductor film 18 can be further reduced.

[0111] In addition, when the oxide insulating film 23 and the oxide insulating film 24 contain water, hydrogen, or the like, When a nitride insulating film 25 having a blocking function is subsequently formed and subjected to heat treatment, the oxide Water, hydrogen, and the like contained in the oxide insulating film 23 and the oxide insulating film 24 are transferred to the oxide semiconductor film 18. However, the heating causes the oxide semiconductor film 18 to move and defects are generated. It is possible to remove water, hydrogen, etc. contained in the oxide insulating film 23 and the oxide insulating film 24. , the variation in the electrical characteristics of the transistor 50 is reduced, and the fluctuation in the threshold voltage is suppressed. It is possible.

[0112] Note that the oxide insulating film 24 is formed over the oxide insulating film 23 while heating. Oxygen is transferred to the oxide semiconductor film 18 to compensate for oxygen vacancies contained in the oxide semiconductor film 18. Therefore, the heat treatment does not have to be performed.

[0113] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0114] In addition, when forming the pair of electrodes 21 and 22, the conductive film is etched to remove the oxide semiconductor. The oxide semiconductor film 18 is damaged, and the back channel of the oxide semiconductor film 18 (oxide semiconductor film 18 In this case, oxygen vacancies occur on the surface opposite to the surface facing the gate electrode 15. The oxide insulating film 24 contains more oxygen than the oxygen that satisfies the stoichiometric composition. By applying this, oxygen vacancies that occur on the back channel side due to heat treatment can be repaired. This can reduce defects contained in the oxide semiconductor film 18. Therefore, the reliability of the transistor 50 can be improved.

[0115] Next, the nitride insulating film 25 is formed by sputtering, CVD, or the like.

[0116] When the nitride insulating film 25 is formed by the plasma CVD method, the real The substrate placed in the evacuated processing chamber is heated to 300°C or higher and 400°C or lower, more preferably A temperature of 320°C or higher and 370°C or lower is preferable because a dense nitride insulating film can be formed. .

[0117] When a silicon nitride film is formed as the nitride insulating film 25 by the plasma CVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia as a source gas compared to nitrogen, The silicon dissociates and generates active species. This breaks the silicon-hydrogen bond and the nitrogen triple bond. Bonding is promoted, silicon and hydrogen bonding is reduced, defects are reduced, and dense silicon nitride is obtained On the other hand, if the amount of ammonia relative to nitrogen in the source gas is high, If the temperature is too low, the decomposition of the silicon-containing deposition gas and nitrogen will not proceed, and silicon and hydrogen bonds will form. As a result, defects increase and a rough silicon nitride film is formed. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw material gas is preferably 5 to 50. It is preferably 10 or more and 50 or less.

[0118] Here, silane at a flow rate of 50 sccm and HCl at a flow rate of 5000 The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the processing chamber was The substrate temperature was set at 350°C under 100 Pa, and a 27.12 MHz high frequency power supply was used for 1000 A 50 nm thick nitride film was formed by plasma CVD using a 1000 W high frequency power supplied to parallel plate electrodes. A silicon film is formed. The plasma CVD device has an electrode area of ​​6000 cm. 2 It is flat It is a horizontal and flat type plasma CVD device, and the supplied power is measured as the power per unit area (power density ) is converted to 1.7 × 10 -1 W / cm 2 is.

[0119] Through the above steps, a film consisting of the oxide insulating film 23, the oxide insulating film 24, and the nitride insulating film 25 is formed. A protective film 26 can be formed.

[0120] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower Let's say.

[0121] Through the above steps, the transistor 50 can be manufactured.

[0122] In this embodiment, the plasma CVD method is performed while heating at 280° C. or more and 400° C. or less. In order to form the oxide insulating film using the above-mentioned method, hydrogen, water, and the like contained in the oxide semiconductor film 18 are released. In this step, the oxide semiconductor film is heated in an exposed state. The heating time is short, and even if the temperature of the oxide semiconductor due to the heat treatment is 400°C or less, the A transistor with the same amount of variation in threshold voltage as the heat-treated transistor is manufactured. As a result, the cost of the semiconductor device can be reduced.

[0123] In addition, the oxide semiconductor film overlaps with the oxide semiconductor film serving as a channel region, and has a stoichiometric composition. By forming an oxide insulating film containing more oxygen than the oxygen contained in the oxide insulating film, As a result, oxygen contained in the oxide semiconductor film can be transferred to the oxide semiconductor film. The content of defects can be reduced.

[0124] In particular, the oxide semiconductor film that functions as a channel region and the oxygen-rich film that satisfies the stoichiometric composition an oxide insulating film that is permeable to oxygen between the insulating film and the oxide insulating film containing more oxygen than the insulating film; When forming an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition, Damage to the oxide semiconductor film can be suppressed. The amount of oxygen vacancies can be reduced.

[0125] As described above, in a semiconductor device using an oxide semiconductor film, the amount of defects is reduced. Furthermore, the electrical characteristics of a semiconductor device using an oxide semiconductor film can be improved. The above semiconductor device can be obtained.

[0126] <Reaction between hydrogen and excess oxygen contained in oxide semiconductor film> Here, we consider oxygen radicals and oxygen generated when forming an oxide insulating film by plasma CVD. The reaction of hydrogen contained in the compound semiconductor film will be described below.

[0127] First, the source gas for generating oxygen radicals will be described.

[0128] Typical examples of atmospheres that can generate oxygen radicals include nitrous oxide atmospheres and There is an oxygen atmosphere.

[0129] Reaction in which oxygen radicals are generated in a plasma generated in a dinitrogen monoxide atmosphere The reaction enthalpy was calculated using Gaussian 09. The calculation method is , Moller-Plesset second-order perturbation (MP2) is used, and the basis functions are The calculation results are shown in Equation 1.

[0130]

number

[0131] In addition, the reaction in which oxygen radicals are generated in the plasma generated in an oxygen atmosphere The reaction enthalpy was calculated using Gaussian 09. The calculation method was as follows: Moller-Plesset quadratic perturbation (MP2) is used, and the basis functions are The calculation results are shown in Equation 2.

[0132]

number

[0133] From the calculation results shown in Equation 1 and Equation 2, it can be seen that the amount of carbon dioxide generated in a nitrous oxide atmosphere is greater than that in an oxygen atmosphere. It can be seen that oxygen radicals are easily generated in the plasma.

[0134] Next, using InGaZnO4 as the oxide semiconductor film, The excess oxygen (hereinafter referred to as exO) bonds with the Ga atom or oxygen atom. The separation process was investigated.

[0135] Here, the basic unit cell of the InGaZnO4 crystal is doubled in both the a-axis and b-axis. The (Ga,Zn)O layer is the outermost layer of the structure, and the (Ga,Zn)O layer and the InO2 layer The crystal structure was adjusted to the (001) plane to have three layers: (Ga,Zn)O, and (Ga,Zn)O. A surface model (number of atoms: 112) with a vacuum region in the c-axis direction was used to measure H2 The calculation of the O desorption process was carried out. The model used for the calculation is shown in Figure 47(A). In A), the excess oxygen bonded to the surface of InGaZnO4 is shown as exO. Two H atoms were placed at positions separated from O atoms. 4. The exO on the surface is energetically stable when it forms Ga-exO-O. For this reason, the structure shown in Figure 47(A) was used as the initial structure for the reaction path. Shown below.

[0136] [Table 1]

[0137] Figure 48 shows the structure of InGaZnO4 from step (0) to step (8). The two H atoms are represented as H1 and H2 in the order of their proximity to the exO.

[0138] From step (0) to step (1), H1 diffuses near exO.

[0139] In steps (1) and (2), H1 binds to exO and O(O1 ) and combines with

[0140] From step (2) to step (3), H1 moves outside O1.

[0141] In steps (3) and (4), H1 binds to exO to form Ga-exO -H1 is formed.

[0142] In steps (4) and (5), H2 binds to O1.

[0143] In steps (5) and (6), H2 moves outside O1.

[0144] In steps (6) and (7), H2 combines with exO.

[0145] In steps (7) and (8), H consisting of H1, exO, and H2 2O is eliminated.

[0146] Next, the structure of step (0) is set as the energy standard (0.00 eV) of the reaction path. The energy diagram calculated from step (1) to step (8) and each The reaction scheme of Ga, O, and H in the step is shown in FIG.

[0147] As can be seen from FIG. 49, when exO is bonded to the surface of InGaZnO4, the exO and InGaZn The reaction of H in O4 to generate H2O and the reaction of H2O elimination generate large amounts of energy. That is, it is clear that the reaction is an exothermic reaction.

[0148] This indicates that oxygen radicals contained in the plasma are bound to the surface of the In-Ga-Zn oxide. When the In-Ga-Zn oxide is combined with the In-Ga-Zn oxide and exists as exO, oxygen vacancies are not formed in the In-Ga-Zn oxide. It is possible that H in the n-Ga-Zn oxide reacts with exO to produce HO. In addition, the H2O can be released. As a result, the hydrogen contained in the oxide semiconductor film can be released. The concentration is reduced.

[0149] <Modification 1, Regarding the Undercoat Insulating Film> In the transistor 50 described in this embodiment, the substrate 11 and the gate electrode 12 may be formed as needed. An underlying insulating film can be provided between the electrodes 15. The underlying insulating film can be made of silicon oxide. Silicon oxide nitride, silicon nitride, silicon nitride oxide, gallium oxide, hafnium oxide Examples include aluminum oxide, yttrium oxide, aluminum oxide, and aluminum oxynitride. The insulating film materials are silicon nitride, gallium oxide, hafnium oxide, and yttrium oxide. By using aluminum oxide or the like, impurities, typically alkali metals, The diffusion of water, hydrogen, and the like into the oxide semiconductor film 18 can be suppressed.

[0150] The base insulating film can be formed by a sputtering method, a CVD method, or the like.

[0151] <Modification 2: Gate insulating film> In the transistor 50 according to this embodiment, a gate insulating film 17 may be stacked as needed. The structure of the gate insulating film 17 will be described below with reference to FIG. explain.

[0152] As shown in FIG. 3A, the gate insulating film 17 is made of a nitride insulating film 17a and an oxide insulating film. 17b may be laminated in order from the gate electrode 15 side. By providing the nitride insulating film 17a on the electrode 15 side, impurities from the gate electrode 15, typically hydrogen, nitrogen, alkali metal, alkaline earth metal, etc. move to the oxide semiconductor film 18. This can prevent this from happening.

[0153] In addition, by providing the oxide insulating film 17b on the oxide semiconductor film 18 side, the gate insulating film 17 In addition, it is possible to reduce the defect state density at the interface of the oxide semiconductor film 18. As a result, a transistor with little deterioration in electrical characteristics can be obtained. b is a film containing more oxygen than that satisfying the stoichiometric composition, similarly to the oxide insulating film 24. When the oxide insulating film 17 is formed using the oxide insulating film containing the This is more preferable because it is possible to further reduce the defect state density in the silicon dioxide.

[0154] As shown in FIG. 3B, the gate insulating film 17 is made of a nitride insulating film 17c with few defects, The nitride insulating film 17d having high hydrogen blocking properties and the oxide insulating film 17b form a gate electrode. The gate insulating film 17 can have a laminated structure in which the layers are laminated in order from the side of the gate insulating film 15. By providing the nitride insulating film 17c with less oxide, the dielectric strength of the gate insulating film 17 is improved. Furthermore, by providing the nitride insulating film 17d having high hydrogen blocking properties, The hydrogen from the gate electrode 15 and the nitride insulating film 17c moves to the oxide semiconductor film 18. It can be prevented.

[0155] An example of a method for forming the nitride insulating films 17c and 17d shown in FIG. 3(B) will be described below. The plasma CVD method uses a mixture of silane, nitrogen, and ammonia as raw material gas. As a result, a silicon nitride film with few defects is formed as the nitride insulating film 17c. The gas was switched to a mixture of silane and nitrogen, which had a low hydrogen concentration and was able to block hydrogen. A silicon nitride film that can be coated is formed as the nitride insulating film 17d. By using this method, a nitride insulating film having few defects and having hydrogen blocking properties is deposited. A layered gate insulating film 17 can be formed.

[0156] As shown in FIG. 3C, the gate insulating film 17 is made of a nitride having a high blocking property against impurities. The insulating film 17e, the nitride insulating film 17c with few defects, and the nitride insulating film 17c with high hydrogen blocking properties The insulating film 17d and the oxide insulating film 17b are stacked in this order from the gate electrode 15 side. The gate insulating film 17 may be made of a nitride having a high impurity blocking property. By providing the insulating film 17e, impurities from the gate electrode 15, typically hydrogen, nitrogen, The alkali metal, alkaline earth metal, or the like is prevented from migrating to the oxide semiconductor film 18. This can be done.

[0157] An example of a method for manufacturing the nitride insulating films 17e, 17c, and 17d shown in FIG. 3(C) is as follows. First, a plasma was generated using a mixture of silane, nitrogen, and ammonia as the source gas. By the CVD method, a silicon nitride film with high impurity blocking properties is formed as the nitride insulating film 17e. Next, the flow rate of ammonia is increased to form silicon nitride with fewer defects. The resulting film is formed as a nitride insulating film 17c. Next, the source gas is a mixed gas of silane and nitrogen. By switching to silicon nitride, which has a low hydrogen concentration and can block hydrogen, By using such a forming method, the nitride insulating film 17d can be formed with few defects. The gate insulating film 17 is formed by laminating a nitride insulating film having an impurity blocking property. It is possible.

[0158] <Modification 3, Pair of Electrodes> The pair of electrodes 21 and 22 provided in the transistor 50 in this embodiment are elemental or non-elementary metals such as tantalum, titanium, aluminum, copper, molybdenum, chromium, or tantalum It is preferable to use a conductive material that easily bonds with oxygen, such as an alloy. The oxygen contained in the membrane 18 is bonded to the conductive material contained in the pair of electrodes 21 and 22 to form an oxide. An oxygen vacancy region is formed in the semiconductor film 18. In addition, a pair of oxygen vacancies is formed in the oxide semiconductor film 18. In some cases, some of the constituent elements of the conductive material that forms the electrodes 21 and 22 may be mixed in. As a result, as shown in FIG. 4, in the oxide semiconductor film 18, the area in contact with the pair of electrodes 21 and 22 The low resistance regions 20a and 20b are formed in the vicinity of the low resistance region. The gate insulating film 17 is formed between the pair of electrodes 21 and 22 and the gate insulating film 17. The low resistance regions 20a and 20b have high conductivity and therefore form a pair of electrodes with the oxide semiconductor film 18. It is possible to reduce the contact resistance with the electrodes 21 and 22, thereby increasing the on-current of the transistor. It is possible to do this.

[0159] The pair of electrodes 21 and 22 are made of the conductive material that easily bonds with oxygen, titanium nitride, and nitride. It may also be a laminated structure with conductive materials that are difficult to bond with oxygen, such as tantalum chloride and ruthenium. By using such a stacked structure, the oxide insulating film 23 is In this case, it is possible to prevent oxidation of the pair of electrodes 21 and 22, and the pair of electrodes 21 and 22 can be highly It is possible to suppress the development of resistance.

[0160] <Modification 4: Oxide Semiconductor Film> In the method for manufacturing the transistor 50 described in this embodiment, In this case, a compound produced by a reaction of the oxide semiconductor film 18 can be provided. 5 is an enlarged view of the oxide semiconductor film 18 and its vicinity in the transistor 50 in FIG. 1(B). do.

[0161] For example, as shown in FIG. 5A, an oxide semiconductor film 18 is formed on the back channel side. A compound 18c can be provided by reacting the semiconductor film 18. The compound 18c is After forming a pair of electrodes 21 and 22, TMAH (Tetramethylammonium hydroxide) Alkaline solutions such as (Iron Hydroxide) solutions, phosphoric acid, nitric acid, hydrofluoric acid, The oxide semiconductor film 18 is exposed to an acidic solution such as hydrochloric acid, sulfuric acid, acetic acid, or oxalic acid. It is possible.

[0162] In this step, a part of the oxide semiconductor film 18 is etched and the upper The oxide semiconductor film 18 reacts with the alkaline solution and the acidic solution, and a reaction product remains. In-Ga oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, C In the case where the oxide semiconductor film 18 is formed of Nd, Hf, or Nd-based oxide, the oxide semiconductor film 18 In (indium oxide) contained in the In this case, a compound 18c is formed in which the proportion of M is higher than that in the oxide semiconductor film 18.

[0163] Compound 18c, which has a high proportion of Ga or M compared to In, is characterized by Al, Ti, and Ga , Y, Zr, La, Ce, Nd or Hf in a higher atomic ratio than In. Since it is possible to block impurities from the outside, the impurities can be prevented from moving from the outside to the oxide semiconductor film 18. As a result, it is possible to reduce the amount of impurities that cause threshold voltage fluctuations. A transistor can be fabricated.

[0164] Furthermore, this treatment removes etching residue between the pair of electrodes 21 and 22. As a result, the occurrence of leakage current flowing between the pair of electrodes 21 and 22 can be suppressed. It is possible.

[0165] Furthermore, as shown in FIG. 5B, a compound 18d is provided on the side surface of the oxide semiconductor film 18. The compound 18d can be obtained by adding a solution such as a TMAH solution when forming the oxide semiconductor film 18. Alkaline solutions, acids such as phosphoric acid, nitric acid, hydrofluoric acid, hydrochloric acid, sulfuric acid, acetic acid, and oxalic acid The insulating layer can be formed by wet etching using a non-ionic solution. Dry etching is performed using boron trichloride gas and chlorine gas as etching gas. Alternatively, the oxide semiconductor film 18 can be formed by After that, the oxide semiconductor film 18 is exposed to the solution, whereby a compound 18d can be formed. do.

[0166] Compound 18d, like compound 18c, has a higher proportion of Ga or M compared to In. Therefore, compound 18d can shield impurities from the outside, and thus This can reduce the amount of impurities that move from the oxide semiconductor film 18 to the oxide semiconductor film 18. Therefore, a transistor with small fluctuations in voltage can be manufactured.

[0167] <Modification 5: Oxide Semiconductor Film> In the method for manufacturing the transistor 50 described in this embodiment, After the oxide semiconductor film 18 is formed, the oxide semiconductor film 18 is exposed to plasma generated in an oxygen atmosphere. Oxygen can be supplied to the film 18. The oxidizing atmosphere can be oxygen, ozone, dinitrogen monoxide, or the like. In the plasma treatment, the atmosphere is oxygen, nitrogen dioxide, etc. It is preferable to expose the oxide semiconductor film 18 to plasma generated without applying a bias. As a result, oxygen can be supplied without damaging the oxide semiconductor film 18. As a result, the amount of oxygen vacancies in the oxide semiconductor film 18 can be reduced. The etching treatment removes impurities, such as fluorine and chlorine, remaining on the surface of the oxide semiconductor film 18. It can remove halogens, etc. Also, the plasma treatment is not heated to 300°C or higher. It is preferable to perform the treatment while the oxygen in the plasma is bonded to the hydrogen contained in the oxide semiconductor film 18. Since the substrate is heated, the water is released from the oxide semiconductor film 18. As a result, the amount of hydrogen and water contained in the oxide semiconductor film 18 can be reduced.

[0168] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0169] (Embodiment 2) In this embodiment, the number of defects in the oxide semiconductor film is further reduced compared to that in Embodiment 1. A semiconductor device having a transistor capable of performing this function will be described with reference to the drawings. The transistor described in this embodiment has a structure in which an oxide semiconductor film and an oxide semiconductor film are formed, as compared with that in Embodiment 1. The difference is that it has a multilayer film having an oxide in contact with an oxide semiconductor film.

[0170] 6A and 6B show a top view and a cross-sectional view of a transistor 60 included in the semiconductor device. 6(B) is a cross-sectional view of the transistor 60 taken along the dashed line AB in FIG. 6(A). 6A, for clarity, the configuration of the substrate 11 and the transistor 60 is shown. A part of the element (for example, the gate insulating film 17), the oxide insulating film 23, the oxide insulating film 24, the nitride The insulating film 25 and the like are omitted.

[0171] The transistor 60 shown in FIGS. 6A and 6B has a gate electrode provided on a substrate 11. The multilayer film 2 overlaps the gate electrode 15 via the gate insulating film 17. 0 and a pair of electrodes 21 and 22 in contact with the multilayer film 20. Also, a gate insulating film 17, On the multilayer film 20 and the pair of electrodes 21 and 22, an oxide insulating film 23, an oxide insulating film 24, A protective film 26 made of a nitride insulating film 25 is formed.

[0172] In the transistor 60 described in this embodiment, the multilayer film 20 includes the oxide semiconductor film 18 and The multilayer film 20 has a two-layer structure. A part of the oxide insulating film 8 functions as a channel region. The oxide insulating film 24 is formed in contact with the oxide insulating film 23. That is, the oxide film 19 is provided between the oxide semiconductor film 18 and the oxide insulating film 23. It is being done.

[0173] The oxide film 19 is an oxide composed of one or more elements that constitute the oxide semiconductor film 18. The oxide film 19 is composed of one or more elements that constitute the oxide semiconductor film 18. Therefore, interface scattering occurs at the interface between the oxide semiconductor film 18 and the oxide film 19. Therefore, the movement of carriers is not hindered at the interface, and the transistor The field effect mobility is increased.

[0174] The oxide film 19 is typically made of In-Ga oxide, In-Zn oxide, In-M-Zn oxides (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf), and The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 18. The energy of the lower end of the conduction band of the oxide semiconductor film 19 is The difference from the energy level is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less That is, the difference between the electron affinity of the oxide film 19 and the electron affinity of the oxide semiconductor film 18 is 0. 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 e V or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.

[0175] As the oxide film 19, Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf is used. By having a higher atomic ratio than n, the following effects may be obtained: (1) Oxide film 19 (2) increasing the energy gap of the oxide film 19; (3) decreasing the electron affinity of the oxide film 19; (4) It has higher insulating properties compared to the oxide semiconductor film 18. 5) Al, Ti, Ga, Y, Zr, La, Ce, Nd, and Hf have strong bonding strength with oxygen. Because they are metallic elements, Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf can be used as In By having a higher atomic ratio, oxygen deficiency is less likely to occur.

[0176] When the oxide film 19 is an In-M-Zn oxide film, the sum of In and M is 100 atom. When expressed as mic%, the atomic ratio of In to M is preferably 50 atomic % In. less than 50 atomic %; M is 50 atomic % or more; more preferably, In is less than 25 atomic % , M is 75 atomic % or more.

[0177] The oxide semiconductor film 18 and the oxide film 19 are In-M-Zn oxide films (M is Al, In the case of Ti, Ga, Y, Zr, La, Ce, Nd or Hf, the oxide semiconductor film 18 In comparison, M (Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) is large, and typically, the atomic ratio of the above atoms contained in the oxide semiconductor film 18 is The number of atoms is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher than that It is a ratio.

[0178] The oxide semiconductor film 18 and the oxide film 19 are In-M-Zn oxide films (M is Al, In the case of In:M Zn=x1:y1:z1 [atomic ratio], and the oxide semiconductor film 18 was In:M:Zn=x2: When y2:z2 is the atomic ratio, y1 / x1 is greater than y2 / x2, and preferably, y1 / x1 is 1.5 times or more than y2 / x2. More preferably, y1 / x1 is y 2 / x2, and more preferably, y1 / x1 is at least three times larger than y2 / x2. In this case, when y2 is equal to or larger than x2 in the oxide semiconductor film, the oxide semiconductor This is preferable because it can provide stable electrical characteristics to a transistor using a conductive film. When 2 is three times or more of x2, the field-effect mobility of the transistor using the oxide semiconductor film is Therefore, it is preferable that y2 is less than three times x2.

[0179] The oxide semiconductor film 18 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr, L In the case of In-Mn-Zn oxide films, the thickness of the film is 100 μm. The atomic ratio of the metal elements in the sputtering target preferably satisfies In≧M, Zn≧M. The atomic ratio of the metal elements in such a sputtering target is preferably In:M: Preferably, Zn=1:1:1 and In:M:Zn=3:1:2.

[0180] The oxide film 19 is an In-M-Zn oxide film (M is Al, Ti, Ga, Y, Zr, La, C e, Nd or Hf), the sputtering method used to deposit the In-M-Zn oxide film The atomic ratio of the metal elements in the target is M>In, Zn>0.5×M, and further Zn>M. It is preferable that the atomic ratio of the metal elements in such a sputtering target and Then, In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:4, In:Ga:Z n=1:3:5, In:Ga:Zn=1:3:6, In:Ga:Zn=1:3:7, In :Ga:Zn=1:3:8, In:Ga:Zn=1:3:9, In:Ga:Zn=1:3 :10, In:Ga:Zn=1:6:4, In:Ga:Zn=1:6:5, In:Ga: Zn=1:6:6, In:Ga:Zn=1:6:7, In:Ga:Zn=1:6:8, I Preferably, n:Ga:Zn=1:6:9, In:Ga:Zn=1:6:10.

[0181] The atomic ratios of the oxide semiconductor film 18 and the oxide film 19 are each calculated by subtracting the above error. This includes a variation of plus or minus 20% in the atomic ratio.

[0182] The oxide film 19 is formed by removing the oxide semiconductor film 18 when forming the oxide insulating film 24 to be formed later. It also functions as a membrane to mitigate damage to the skin.

[0183] The thickness of the oxide film 19 is 3 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less. Below.

[0184] Similarly to the oxide semiconductor film 18, the oxide film 19 may have, for example, a non-single crystal structure. The non-single crystal structure is, for example, CAAC-OS (C Axis Aligned C Crystalline Oxide Semiconductor), polycrystalline structure, see below It includes a microcrystalline structure or an amorphous structure.

[0185] The oxide film 19 may have an amorphous structure. The amorphous oxide semiconductor film may have a structure such as The atomic arrangement is disordered and does not have crystalline components. Alternatively, an oxide film with an amorphous structure is, for example, For example, it has a completely amorphous structure and does not have any crystalline parts.

[0186] The oxide semiconductor film 18 and the oxide film 19 form an amorphous structure region and a microcrystalline structure region. A mixture of two or more of the following structures: a polycrystalline structure region, a CAAC-OS region, and a single-crystal structure region The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, or the like. It has two or more regions of either a region of a structure, a region of a CAAC-OS structure, or a region of a single crystal structure. In addition, the mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, and the like. A stack of two or more regions of either a region of a structure, a region of a CAAC-OS, or a region of a single crystal structure It may have a structure.

[0187] Here, the oxide film 19 is provided between the oxide semiconductor film 18 and the oxide insulating film 23. Therefore, the oxide film 19 and the oxide insulating film 23 are separated by impurities and defects. Even if a trap state is formed by the oxide semiconductor film 18, there is no distance between the trap state and the oxide semiconductor film 18. As a result, electrons flowing through the oxide semiconductor film 18 are less likely to be captured by the trap levels. It is possible to increase the on-current of the transistor and also to enhance the field effect mobility. In addition, when an electron is captured in the trap level, the electron is transferred to a negative fixed charge. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the oxide semiconductor film 18 and the trap states, It is possible to reduce the trapping of electrons in the semiconductor, and thus to reduce the fluctuation of the threshold voltage. do.

[0188] Furthermore, the oxide film 19 can block impurities from the outside. It is possible to reduce the amount of impurities that move to the oxide semiconductor film 18. Therefore, the impurity concentration in the oxide semiconductor film 18 is It is also possible to reduce the amount of oxygen vacancies.

[0189] The oxide semiconductor film 18 and the oxide film 19 are not simply stacked but are continuously connected. In this case, a structure in which the energy of the bottom of the conduction band changes continuously between the layers is formed. In other words, defects such as trap centers and recombination centers are formed at the interfaces of each film. The stacked structure is such that there are no impurities that form levels. If impurities are present between the compound semiconductor film 18 and the oxide film 19, the energy bands may become disjointed. Continuity is lost, and carriers are trapped or recombined at the interface and disappear.

[0190] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without being exposed to the atmosphere. Each chamber in the sputtering device is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pumping (5×10 -7 Pa~1×10 -4 It is preferable to Alternatively, a turbomolecular pump and a cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases, especially gases containing carbon or hydrogen, into the bar. stomach.

[0191] As in the transistor 65 shown in FIGS. 6C and 6D, The multilayer film 34 overlaps the gate electrode 15, and the pair of electrodes 21 and 22 contact the multilayer film 34. may have

[0192] The multilayer film 34 includes an oxide film 31, an oxide semiconductor film 18, and an oxide film 19. That is, The multilayer film 34 has a three-layer structure. The oxide semiconductor film 18 functions as a channel region. do.

[0193] In addition, the gate insulating film 17 and the oxide film 31 are in contact with each other. An oxide film 31 is provided between the semiconductor film 18 and the oxide film 31 .

[0194] The multilayer film 34 and the oxide insulating film 23 are in contact with each other. That is, the oxide semiconductor film 18 and the oxide insulating film 23 are in contact with each other. 19 are provided.

[0195] The oxide film 31 may be formed using a material and a method similar to those of the oxide film 19 shown in Embodiment 1. You can be there.

[0196] The oxide film 31 is preferably thinner than the oxide semiconductor film 18. By making the thickness 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, the transistor This makes it possible to reduce the amount of variation in the threshold voltage of the transistor.

[0197] When the oxide film 19 is an In-M-Zn oxide, the sum of In and M is 100a. When the atomic percentage is 50 atomic %, the atomic ratio of In to M is preferably 50 atomic %. c% or less, M is 50 atomic % or more, and more preferably In is 25 atomic % less than, and M is 75 atomic % or more.

[0198] The transistor described in this embodiment has a structure in which a thin film is formed between the oxide semiconductor film 18 and the oxide insulating film 23. Therefore, the oxide film 19 is provided between the oxide film 19 and the oxide insulating film 23. In this case, even if trap levels are formed by impurities and defects, the trap levels and the oxide semiconductor There is a gap between the oxide semiconductor film 18 and the conductive film 18. As a result, the electrons flowing through the oxide semiconductor film 18 This makes it possible to increase the on-state current of the transistor. Furthermore, when electrons are captured in the trap level, The electrons become negative fixed charges. As a result, the threshold voltage of the transistor However, there is a gap between the oxide semiconductor film 18 and the trap level. Therefore, it is possible to reduce the capture of electrons in the trap level, and the threshold voltage Fluctuations can be reduced.

[0199] Furthermore, the oxide film 19 can block impurities from the outside. It is possible to reduce the amount of impurities that move to the oxide semiconductor film 18. Therefore, the impurity concentration in the oxide semiconductor film 18 is It is also possible to reduce the amount of oxygen vacancies.

[0200] In addition, an oxide film 31 is provided between the gate insulating film 17 and the oxide semiconductor film 18. Therefore, the oxide film 19 is provided between the oxide semiconductor film 18 and the oxide insulating film 23. Therefore, the concentration of silicon and carbon in the vicinity of the interface between the oxide film 31 and the oxide semiconductor film 18, and the concentration of oxygen The concentration of silicon or carbon in the oxide semiconductor film 18, or the concentration of the oxide film 19 and the oxide semiconductor film As a result, the concentration of silicon and carbon near the interface with 18 can be reduced. In the multilayer film 34, the absorption coefficient derived by the constant photocurrent measurement method is 1×10 -3 / cm Less than 1 x 10 -4 / cm or less, resulting in extremely few localized levels.

[0201] The transistor 65 having such a structure is formed by a multilayer film 34 including an oxide semiconductor film 32. Since there are very few defects in the Typically, it is possible to increase the on-current and improve the field effect mobility. Threshold voltage fluctuations in BT stress tests and optical BT stress tests, which are examples of tests Low volume and high reliability.

[0202] <Transistor band structure> Next, the band structure of the multilayer film 20 provided in the transistor 60 shown in FIG. 6(B) will be described. This will be explained with reference to FIG.

[0203] Here, for example, the oxide semiconductor film 18 has an energy gap of 3.15 eV. An In-Ga-Zn oxide with an energy gap of 3.5e was used as the oxide film 19. The energy gap is measured using a spectroscopic ellipsometer. (HORIBA JOBIN YVON UT-300) do.

[0204] The energy difference between the vacuum level and the top of the valence band of the oxide semiconductor film 18 and the oxide film 19 (ion The electron potentials (also called electron densification potentials) are 8 eV and 8.2 eV, respectively. The energy difference between the potential and the top of the valence band was determined by ultraviolet photoelectron spectroscopy (UPS). Photoelectron Spectroscopy (PHI V Measurements can be performed using the ersaProbe.

[0205] Therefore, the vacuum level and the energy of the bottom of the conduction band of the oxide semiconductor film 18 and the oxide film 19 are The electron affinity difference (also called electron affinity) is 4.85 eV and 4.7 eV, respectively.

[0206] FIG. 7(A) shows a schematic diagram of a part of the band structure of the multilayer film 20. The case where a silicon oxide film is provided in contact with the film 20 will be described. EcI1 indicates the energy of the bottom of the conduction band of the silicon oxide film, and EcS1 indicates the energy of the bottom of the conduction band of the oxide semiconductor film. EcS2 is the energy of the bottom of the conduction band of the oxide film 19. EcI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. corresponds to the gate insulating film 17 in FIG. 1(B), and EcI2 corresponds to , which corresponds to the oxide insulating film 23.

[0207] As shown in FIG. 7A, in the oxide semiconductor film 18 and the oxide film 19, The energy of changes smoothly without any barriers. In other words, it changes continuously. This is because the multilayer film 20 contains elements common to the oxide semiconductor film 18 and the oxide Oxygen moves between the semiconductor film 18 and the oxide film 19, forming a mixed layer. It can be said that this is for the purpose.

[0208] As shown in FIG. 7A, the oxide semiconductor film 18 of the multilayer film 20 serves as a well. In the transistor using 0, a channel region is formed in the oxide semiconductor film 18. In addition, since the energy of the conduction band minimum changes continuously in the multilayer film 20, It can also be said that the oxide semiconductor film 18 and the oxide film 19 are in continuous junction.

[0209] As shown in FIG. 7A, the oxide film 19 and the oxide insulating film 23 are adjacent to each other. Although trap levels due to impurities or defects may be formed, the oxide film 19 is This can distance the oxide semiconductor film 18 from the trap levels. When the energy difference between EcS1 and EcS2 is small, the electrons in the oxide semiconductor film 18 The electron can reach the trap level beyond the energy difference. This generates a negative charge at the insulating film interface, and the threshold voltage of the transistor increases in the positive direction. Therefore, the energy difference between EcS1 and EcS2 is 0.1 eV. If the value is set to 0.15 eV or more, preferably 0.15 eV or more, the fluctuation of the threshold voltage of the transistor is reduced. This is preferable because it results in stable electrical properties.

[0210] FIG. 7B is a schematic diagram showing a part of the band structure of the multilayer film 20, which is similar to that shown in FIG. Here, a silicon oxide film is provided in contact with the multilayer film 20. The case where EcI1 shown in FIG. 7(B) is the minimum conduction band of the silicon oxide film. EcS1 denotes the energy of the bottom of the conduction band of the oxide semiconductor film 18, and E cI2 indicates the energy of the bottom of the conduction band of the silicon oxide film. ) corresponds to the gate insulating film 17, and EcI2 corresponds to the oxide insulating film It corresponds to the membrane 23.

[0211] In the transistor shown in FIG. 6B, the multilayer film 20 is formed when the pair of electrodes 21 and 22 are formed. On the other hand, the oxide semiconductor film 1 may be etched upward, i.e., the oxide film 19 may be etched. On the upper surface of the substrate 8, a mixed layer of the oxide semiconductor film 18 and the oxide film 19 is formed during the formation of the oxide film 19. This may be the case.

[0212] For example, the oxide semiconductor film 18 is an In- Ga-Zn oxide, or In-Ga-Z with an atomic ratio of In:Ga:Zn=3:1:2 n oxide as a sputtering target, and The film 19 is an In-Ga-Zn oxide having an atomic ratio of In:Ga:Zn=1:3:2, In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:6:4 was sputtered. In the case where the oxide film is formed using a fluorine-containing target, the oxide semiconductor film 18 is more likely to be formed by the fluorine-containing target than by the oxide semiconductor film 18. Since the Ga content of the film 19 is high, a GaOx layer or an oxide layer is formed on the top surface of the oxide semiconductor film 18. A mixed layer containing more Ga than the compound semiconductor film 18 can be formed.

[0213] Therefore, even when the oxide film 19 is etched, the EcI2 side of EcS1 The energy of the bottom of the conduction band becomes high, resulting in a band structure like that shown in Figure 7(B). be.

[0214] When the band structure shown in FIG. 7B is obtained, when observing the cross section of the channel region, The multilayer film 20 may appear to be composed of only the oxide semiconductor film 18. In reality, a mixture containing more Ga than the oxide semiconductor film 18 is formed on the oxide semiconductor film 18. Since a mixed layer is formed, the mixed layer can be regarded as a 1.5 layer. When the elements contained in the multilayer film 20 are measured by, for example, EDX analysis, the mixed layer is This can be confirmed by analyzing the composition above the oxide semiconductor film 18. For example, The composition in the upper portion of the oxide semiconductor film 18 has a higher Ga content than the composition in the oxide semiconductor film 18. This can be confirmed by the configuration.

[0215] (Embodiment 3) In this embodiment, defects in an oxide semiconductor film are reduced compared to those in Embodiments 1 and 2. We have developed a transistor that can further reduce the amount of A semiconductor device according to the present invention will be described with reference to the drawings. In comparison with the first embodiment, an oxide insulating film 23 is formed between the pair of electrodes 21 and 22. The difference is that the present embodiment will be described using the first embodiment, but This is preferably applicable to the second embodiment.

[0216] 9A and 9B show a top view and a cross-sectional view of a transistor 70 included in the semiconductor device. A top view of the rotor 70 is shown in FIG. 9(A). In FIG. 9(A), a cross-sectional view between the dashed line AB is shown. 9(B) and the cross section between the dashed lines CD is shown in FIG. 9(C). For clarity, the substrate 11, some of the components of the transistor 70 (e.g., gate insulator) film 17), oxide insulating film 23, oxide insulating film 24, nitride insulating film 25, etc. are omitted. .

[0217] The transistor 70 differs from the transistor 50 in that the pair of electrodes 21 and 22 are made of oxide semiconductor. The difference is that it is surrounded by a conductor film 18a and an oxide film 19a. 70 is a film formed by stacking an oxide semiconductor film 18a on the gate insulating film 17 and an oxide semiconductor film 18 a pair of electrodes 21 and 22 provided on the oxide semiconductor film 18a; 22 and an oxide film 19a provided thereon.

[0218] The transistor 70 has a pair of electrodes 21 and 22 in contact with the oxide semiconductor film 18a. Therefore, compared with the transistor 60, the oxide semiconductor film 18a and the pair of electrodes 21 and 22 This transistor has low contact resistance and an improved on-state current compared to the transistor 60.

[0219] In addition, the transistor 70 has a pair of electrodes 21 and 22 in contact with the oxide semiconductor film 18a. Therefore, the contact resistance between the oxide semiconductor film 18a and the pair of electrodes 21 and 22 is not increased. In this way, the oxide film 19a can be made thicker. The trap level is generated by plasma damage during the process or by contamination of the constituent elements of the protective film 26. Therefore, it is possible to prevent the oxide semiconductor film 18a from being formed in the vicinity of the interface between the oxide semiconductor film 18a and the oxide film 19a. That is, the transistor 70 achieves both an improvement in on-state current and a reduction in the amount of variation in threshold voltage. It is possible.

[0220] A method for manufacturing the transistor 70 will be described with reference to FIG. 10. First, Then, a gate electrode and a gate insulating film 17 are formed on the substrate 11 .

[0221] Next, an oxide semiconductor film 28 that will later become the oxide semiconductor film 18a is formed. Electrodes 21 and 22 are formed. Next, an oxide film 29 that will later become an oxide film 19a is formed ( See Figure 10(A).

[0222] The oxide semiconductor film 28 is formed using the same material as the oxide semiconductor film 18 described in Embodiment 1. The pair of electrodes 21 and 22 may be formed in the same manner as in FIG. The pair of electrodes 21 and 22 are formed on the oxide semiconductor film 28. The oxide film 29 is formed using the same material and method as the oxide film 19 described in Embodiment 1. It can be used as appropriate.

[0223] Next, the oxide semiconductor film 28 and the oxide film 29 are each partially etched to form oxide films. A multilayer film 20 having an oxide semiconductor film 18a and an oxide film 19a is formed (see FIG. 10(B)). (See FIG. 1). Note that the etching is performed by photolithography on the oxide film that will become the oxide film 29. This can be achieved by forming a mask in a process and then performing etching using the mask. In addition, since the oxide semiconductor film 28 and the oxide film 29 are simultaneously etched, The ends of the solid film 18a and the oxide film 19a are substantially aligned.

[0224] Next, a protective film is formed so as to cover the gate insulating film 17, the multilayer film 20, and the pair of electrodes 21 and 22. A protective film 26 is formed (see FIG. 10(C)). The protective film 26 is formed in the same manner as in the first embodiment. In addition, in the manufacturing method of the transistor 70, Heat treatment can be carried out by referring to the above as appropriate.

[0225] In addition, by etching to form the pair of electrodes 21 and 22, the oxide semiconductor film 18a Defects such as oxygen vacancies may occur, which may increase the carrier density, so an oxide film29 is formed. Before the formation of the oxide semiconductor film 18a, the oxide semiconductor film 18a is exposed to plasma generated in an oxygen atmosphere. It is preferable to supply oxygen to the oxide semiconductor film 18a. In the transistor 70, a trap level is formed near the interface between the oxide semiconductor film 18a and the oxide film 19a. The formation of potentials can be suppressed, and the amount of variation in the threshold voltage can be reduced. In the transistor 70, the multilayer film 20 flows near the side surface of the oxide semiconductor film 18a. This can reduce the leakage current and suppress an increase in the off-state current.

[0226] Furthermore, the multilayer film 20 is not damaged by the etching process for forming the pair of electrodes 21 and 22. As a result, oxygen vacancies occur on the back channel side of the multilayer film 20. A part of the oxygen contained in the oxide semiconductor film 18a is moved to the oxide semiconductor film 18a. This makes it possible to compensate for the defect, thereby improving the reliability of the transistor 70. It is possible.

[0227] <Variation 1> In the transistor 70 described in this embodiment, the multilayer film 20 and the pair of electrodes 21 and 22 The laminated structure can be changed as appropriate. For example, a modified example of the laminated structure shown in FIG. The resistor may be a resistor.

[0228] The transistor illustrated in FIG. 11 has a structure in which the oxide semiconductor film 18b and the The difference is that the oxide film 19b is formed in a different process from the edge of the oxide semiconductor film 18b. The difference is that the portion is covered with a pair of electrodes 21 and 22 and is not in contact with the oxide film 19b.

[0229] The transistor shown in FIG. 11 has a pair of electrodes 21 and 22 and a The oxide semiconductor film 18b is in direct contact with the multilayer film 20, and therefore the contact between the multilayer film 20 and the pair of electrodes 21 and 22 is This transistor has low contact resistance and an improved on-state current compared to the transistor 50.

[0230] 11, the pair of electrodes 21 and 22 is the oxide semiconductor film 18b. Since the multilayer film 20 is in direct contact with the pair of electrodes 21 and 22, the contact resistance between the multilayer film 20 and the pair of electrodes 21 and 22 is not increased. In this way, the oxide film 19b can be made thicker. Traps that occur due to plasma damage during the etching or due to the inclusion of constituent elements of the protective film 26. The formation of the level near the interface between the oxide semiconductor film 18b and the oxide film 19b can be suppressed. In other words, it is possible to improve the on-state current and reduce the fluctuation in the threshold voltage at the same time.

[0231] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0232] (Fourth embodiment) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 3 will be described. 12. The transistor 80 described in this embodiment includes an oxide semiconductor film The semiconductor device is characterized by having a plurality of gate electrodes opposed to each other with a gate electrode interposed therebetween.

[0233] The transistor 80 shown in FIG. 12 has a gate electrode 15 provided on a substrate 11 . Also, a gate insulating film 17 formed on the substrate 11 and the gate electrode 15 and a gate insulating film 1 The oxide semiconductor film 18 overlapping the gate electrode 15 through the gate electrode 7 and the oxide semiconductor film 18 contacting the gate electrode 15 are connected to the gate electrode 7 through the gate electrode 7. The gate insulating film 17, the oxide semiconductor film 18, and the pair of electrodes 21 and 22 are connected to each other. On the pair of electrodes 21 and 22, an oxide insulating film 23, an oxide insulating film 24, and a nitride insulating film are formed. A protective film 26 made of the insulating film 25 is formed. It has a gate electrode 61 that overlaps the film 18 .

[0234] The gate electrode 61 can be formed in the same manner as the gate electrode 15 .

[0235] The transistor 80 in this embodiment has a gate electrode facing the oxide semiconductor film 18 therebetween. The gate electrode 15 and the gate electrode 61 are applied with different potentials. By applying this voltage, the threshold voltage of the transistor 80 can be controlled.

[0236] Furthermore, by including the oxide semiconductor film 18 in which the amount of oxygen vacancies is reduced, the electric potential of the transistor can be improved. It is possible to improve the thermal characteristics. In addition, the fluctuation of the threshold voltage is small, and reliability is high. This results in a high-performance transistor.

[0237] In addition, the structures and methods shown in this embodiment may be used in conjunction with structures shown in other embodiments and examples. and methods can be used in appropriate combination.

[0238] (Embodiment 5) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 4 will be described. This will be explained with reference to FIG.

[0239] In this embodiment, compared with Embodiments 1 to 4, defects in an oxide semiconductor film are A semiconductor device having a transistor capable of further reducing the amount of The transistor described in this embodiment is the same as that described in Embodiments 1 to 4. In contrast, the back channel side of the oxide semiconductor film 18 is covered with a protective film, and the pair of electrodes The difference is that the film is not exposed to the plasma generated in the etching process for forming the film.

[0240] FIG. 13 shows a top view and a cross-sectional view of a transistor 90 included in the semiconductor device. 13(A) is a top view of the transistor 90, and FIG. 13(B) is a view of the transistor 90 along the dashed line A- 13(C) is a cross-sectional view taken along the dashed line CD in FIG. 13(A). In FIG. 13A, for clarity, the substrate 11 and some of the components of the transistor 90 are shown. portion (for example, gate insulating film 17), oxide insulating film 23, oxide insulating film 24, nitride insulating film 25 etc. are omitted.

[0241] The transistor 90 shown in FIG. 13 has a gate electrode 15 provided on a substrate 11 . Also, a gate insulating film 17 formed on the substrate 11 and the gate electrode 15 and a gate insulating film 1 The gate electrode 15 is overlapped with the oxide semiconductor film 18 via the gate insulating film 7. On the oxide semiconductor film 17 and the oxide insulating film 18, an oxide insulating film 23, an oxide insulating film 24, and a nitride insulating film are formed. A protective film 26 is formed by an insulating film 25, and a film is formed on the protective film 26. The gate electrode 21 has a pair of electrodes 21 b and 22 b connected to the oxide semiconductor film 18 .

[0242] Next, a method for manufacturing the transistor 90 will be described.

[0243] As in the first embodiment, a gate electrode 15 is formed on a substrate 11. A gate insulating film 17 is formed on the electrode 15. Next, an oxide semiconductor film 1 Form 8.

[0244] Next, in the same manner as in the first embodiment, 280 After forming the oxide insulating film 23 while heating at a temperature of 0.degree. C. or higher and 400.degree. C. or lower, the oxide insulating film 24, and a nitride insulating film 25. After the oxide insulating film 24 is formed, a heat treatment is performed. In addition, part of the oxygen contained in the oxide insulating film 24 is supplied to the oxide semiconductor film 18.

[0245] Next, a part of each of the oxide insulating film 23, the oxide insulating film 24, and the nitride insulating film 25 is removed. Etching is performed to form an opening that exposes a part of the oxide semiconductor film 18. A pair of electrodes 21b and 22b in contact with the compound semiconductor film 18 are formed in the same manner as in the first embodiment.

[0246] In this embodiment, when the pair of electrodes 21b and 22b are etched, the oxide semiconductor Since the membrane 18 is covered with the protective film 26, the etching for forming the pair of electrodes 21b and 22b is As a result of this, the oxide semiconductor film 18, particularly the back channel region of the oxide semiconductor film 18, is damaged. Furthermore, the oxide insulating film 24 contains more oxygen than the stoichiometric composition. Therefore, the oxide insulating film 24 is formed of an oxide insulating film containing a large amount of oxygen. A part of the oxygen vacancies in the oxide semiconductor film 18 is transferred to the oxide semiconductor film 18. As a result, the amount of oxygen vacancies in the oxide semiconductor film 18 can be reduced. It is possible.

[0247] Through the above steps, defects contained in the oxide semiconductor film 18 can be reduced. The reliability of the transistor 90 can be improved.

[0248] (Sixth embodiment) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 5 will be described. This will be explained with reference to FIG.

[0249] In this embodiment, compared with Embodiments 1 to 4, defects in an oxide semiconductor film are A semiconductor device having a transistor capable of further reducing the amount of The transistor described in this embodiment is a transistor formed of an oxide semiconductor, similar to that in Embodiment 5. The back channel side of the conductive film 18 is covered with a protective film, and an electrode for forming a pair of electrodes is provided. The difference between the first to fourth embodiments is that the semiconductor device is not exposed to the plasma generated in the etching process. different.

[0250] 14A and 14B are a top view and a cross-sectional view of a transistor 100 included in the semiconductor device. The transistor 100 shown in FIG. 14A is a channel-protective transistor. 14(B) is a top view of the transistor 100, and FIG. 14(B) is a diagram showing the structure between the dashed line AB in FIG. 14(A). 14(C) is a cross-sectional view taken along the dashed line CD in FIG. 14(A), for clarity, the substrate 11 and some of the components of the transistor 100 ( For example, the gate insulating film 17 is omitted.

[0251] The transistor 100 shown in FIG. 14 has a gate electrode 15 provided on a substrate 11. Also, a gate insulating film 17 formed on the substrate 11 and the gate electrode 15, and a gate insulating film The gate electrode 15 is overlapped with an oxide semiconductor film 18 via a gate insulating film 17. On the insulating film 17 and the oxide semiconductor film 18, an oxide insulating film 23a, an oxide insulating film 24a, and The protective film 26a is made of a nitride insulating film 25a, and the gate insulating film 17 and the oxide semiconductor film 1 8, and a pair of electrodes 21c and 22c formed on the protective film 26a.

[0252] Next, a method for manufacturing the transistor 100 will be described.

[0253] As in the first embodiment, a gate electrode 15 is formed on a substrate 11. A gate insulating film 17 is formed on the electrode 15. Next, an oxide semiconductor film 1 Form 8.

[0254] Next, in the same manner as in the first embodiment, 280 After forming the oxide insulating film 23 while heating at a temperature of 0.degree. C. or higher and 400.degree. C. or lower, the oxide insulating film 24, and a nitride insulating film 25. After the oxide insulating film 24 is formed, a heat treatment is performed. In addition, part of the oxygen contained in the oxide insulating film 24 is supplied to the oxide semiconductor film 18.

[0255] Next, a part of each of the oxide insulating film 23, the oxide insulating film 24, and the nitride insulating film 25 is removed. The oxide insulating film 23a, the oxide insulating film 24a, and the nitride insulating film 25a are formed by etching. A protective film 26a is formed.

[0256] Next, the pair of electrodes 21c and 22c in contact with the oxide semiconductor film 18 are Form into.

[0257] In this embodiment, when the pair of electrodes 21c and 22c are etched, the oxide semiconductor Since the body membrane 18 is covered with the protective film 26a, the edges forming the pair of electrodes 21c and 22c are The oxide semiconductor film 18 is not damaged by the etching. The region a is formed of an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. Therefore, part of the oxygen contained in the oxide insulating film 24a moves to the oxide semiconductor film 18, It is possible to compensate for oxygen vacancies contained in the oxide semiconductor film 18. The amount of oxygen vacancies contained in the oxide semiconductor film 18 can be reduced.

[0258] In FIG. 14, the nitride insulating film 25a is formed as the protective film 26a. The oxide insulating film 23a and the oxide insulating film 24a may have a stacked structure. After forming the electrodes 21c and 22c, it is preferable to form the nitride insulating film 25a. As a result, it is possible to prevent hydrogen, water, and the like from entering the oxide semiconductor film 18 from the outside.

[0259] Through the above steps, defects contained in the oxide semiconductor film 18 can be reduced. The reliability of the transistor 100 can be improved.

[0260] (Embodiment 7) Various films such as metal films, oxide semiconductor films, and inorganic insulating films disclosed in the above embodiments are and plasma CVD (Chemical Vapor Deposition) methods. However, it may be formed by other methods, for example, thermal CVD. As an example of CVD, MOCVD (Metal Organic Chemical Vapor Deposition) por Deposition) method and ALD (Atomic Layer Deposition) You can also use the tion method.

[0261] The thermal CVD method is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no further processing is required.

[0262] In the thermal CVD method, the source gas and oxidant are simultaneously fed into a chamber, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the material near or on the substrate under reduced pressure and depositing the material on the substrate. You may go.

[0263] In addition, in the ALD method, the pressure inside the chamber is atmospheric or reduced, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating this gas introduction sequence. For example, by switching each switching valve (also called high-speed valve), two or more types of The above source gases are supplied to the chamber in order, and the first An inert gas (argon, nitrogen, etc.) is introduced simultaneously with or after the raw material gas. The second source gas is introduced. When an inert gas is introduced at the same time, the inert gas is It acts as a carrier gas, and even if an inert gas is introduced at the same time as the second source gas is introduced, Alternatively, instead of introducing an inert gas, the first source gas may be discharged by vacuum evacuation. After that, a second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer. The first layer is deposited on the second layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction order until the desired thickness is achieved. By doing so, a thin film with excellent step coverage can be formed. The thickness can be precisely adjusted by changing the number of times the sequence is repeated. It is suitable for fabricating miniaturized FETs.

[0264] Thermal CVD methods such as MOCVD and ALD are disclosed in the embodiments described above. It is possible to form various films such as metal films, oxide semiconductor films, and inorganic insulating films. When forming an nGaZnO film, trimethylindium, trimethylgallium, and Dimethyl zinc is used. The chemical formula of trimethyl indium is In(CH3)3. The chemical formula of trimethylgallium is Ga(CH3)3. The chemical formula for lead is Zn(CH3)2. Using triethylgallium (chemical formula Ga(C2H5)3) instead of methylgallium It is also possible to use diethylzinc (chemical formula Zn(C2H5)2) instead of dimethylzinc. It is also possible.

[0265] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing a hafnium precursor compound (hafnium alkoxide solution, typically tetra The raw material gas is vaporized tetrachlorodibenzofuran (TDMAH) and the oxidizing agent is Two types of gases are used: tetrakisdimethylamidohafnium (Tetrakisdimethylamidohafnium) and ozone (O3). The chemical formula is Hf[N(CH3)2]4. Other material liquids include tetrakis(ethoxylated (ethylmethylamido) hafnium.

[0266] For example, when forming an aluminum oxide film using an ALD film forming device, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Two types of gases are used: vaporized source gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris( dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0267] For example, when forming a silicon oxide film using a film forming device that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, removing the chlorine contained in the adsorbed material, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0268] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film was formed by sequentially introducing BH gas and BH gas. The tungsten film is formed by simultaneously introducing B2H6 gas and H2 gas. Alternatively, SiH4 gas may be used.

[0269] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, In(CH3)3 gas and O3 gas are introduced in sequence. Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gases are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Alternatively, a mixed compound layer such as an O layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. Instead of O gas, H2O gas obtained by bubbling with an inert gas such as Ar can be used. However, it is preferable to use O3 gas that does not contain H. Also, In(CH3)3 gas In addition, In(C2H5)3 gas may be used. Ga(C2H5)3 gas may be used. Also, instead of In(CH3)3 gas, In( C2H5)3 gas may be used, or Zn(CH3)2 gas may be used.

[0270] (Embodiment 8) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a semiconductor device which is one embodiment of the present invention will be described using a display device as an example. do.

[0271] An example of a semiconductor device is shown in FIG. 15A. The semiconductor device shown in FIG. 15A has a pixel portion. 101, the scanning line driving circuit 104, and the signal line driving circuit 106 are parallel or approximately parallel to each other. and m scanning lines 107 whose potentials are controlled by a scanning line driving circuit 104. , are arranged parallel or approximately parallel to each other, and the potentials thereof are controlled by a signal line driving circuit 106. The pixel section 101 is arranged in a matrix. The pixel array 301 has a plurality of pixels 301 arranged parallel or approximately parallel to each other along the scanning line 107. The capacitor lines 115 are arranged along the signal lines 109. The scanning line driving circuit 104 and the signal line driving circuit 105 may be arranged in parallel or approximately in parallel. The drive circuits 106 may be collectively referred to as a drive circuit section.

[0272] Each scanning line 107 is connected to one of the pixels 301 arranged in m rows and n columns in the pixel section 101. The signal lines 109 are electrically connected to the n pixels 301 arranged in any one of the rows. is m pixels 301 arranged in m rows and n columns, and m pixels 301 arranged in any one of the columns. 1. Both m and n are integers equal to or greater than 1. is n pixels 301 arranged in any row among the pixels 301 arranged in m rows and n columns. 1. The capacitance lines 115 are arranged parallel to the signal lines 109. In the case where the pixels 301 are arranged in m rows and n columns, one of the pixels 301 is arranged in m rows and n columns. The pixel array 301 is electrically connected to m pixels 301 arranged in a column.

[0273] 15B and 15C show the structure of the pixel 301 of the display device shown in FIG. 15A. 1 shows a circuit configuration that can

[0274] The pixel 301 shown in FIG. 15B includes a liquid crystal element 132, a transistor 131_1, and a capacitor. and a capacitance element 133_1.

[0275] The potential of one of the pair of electrodes of the liquid crystal element 132 is set appropriately according to the specifications of the pixel 301. The orientation state of the liquid crystal element 132 is set by the written data. A common potential (common potential) is applied to one of a pair of electrodes of the liquid crystal element 132 included in each pixel 301. In addition, one of the pair of electrodes of the liquid crystal element 132 for each pixel 301 in each row may be applied. may be given different potentials.

[0276] For example, the display device including the liquid crystal element 132 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned Mode) Micro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid Crystal id Crystal) mode, AFLC (AntiFerroelectric Li Quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TB A (Transverse Bend Alignment) mode may also be used. In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electro Cally Controlled Birefringence mode, PDLC ( Polymer Dispersed Liquid Crystal (PNL) mode C (Polymer Network Liquid Crystal) mode, guest However, there are other liquid crystal elements and their driving methods, including but not limited to the above. A variety of materials can be used.

[0277] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent The liquid crystal element may be configured by the following. The liquid crystal that exhibits the blue phase has a response speed of 1 msec or less. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0278] In the pixel 301 in the mth row and the nth column, the source electrode and the drain electrode of the transistor 131_1 One of the electrodes is electrically connected to the signal line DL_n, and the other is a pair of electrodes of the liquid crystal element 132. The gate electrode of the transistor 131_1 is electrically connected to the other of the scan lines G L_m. The transistor 131_1 is in an on state or an off state. By doing so, the write control circuit 100 has a function of controlling the writing of data signals.

[0279] One of the pair of electrodes of the capacitor 133_1 is connected to a wiring to which a potential is supplied (hereinafter, referred to as a capacitor line CL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 132. The value of the potential of the capacitance line CL is set appropriately according to the specifications of the pixel 301. The child 133_1 has a function as a storage capacity for storing written data.

[0280] For example, in a display device having the pixel 301 shown in FIG. 15B, the scanning line driver circuit 104 The pixels 301 in each row are sequentially selected by turning on the transistor 131_1 to apply a data signal Write the data.

[0281] The pixel 301 to which the data has been written is turned off by turning off the transistor 131_1. By repeating this process for each row, an image can be displayed.

[0282] 15C includes a transistor 131_2 and a capacitor 133. 13, a transistor 134, and a light-emitting element 135.

[0283] One of the source electrode and the drain electrode of the transistor 131_2 is connected to a source terminal of the transistor 131_2. Further, the transistor The gate electrode of 131_2 is a wiring to which a gate signal is given (hereinafter referred to as a scanning line GL_m). ) is electrically connected to

[0284] The transistor 131_2 is turned on or off to control the data signal. It has the function of controlling the writing of data.

[0285] One of the pair of electrodes of the capacitor 133_2 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL_a), and the other is electrically connected to the source electrode of the transistor 131_2 and The gate electrode is electrically connected to the other of the drain electrodes.

[0286] The capacitor 133_2 has a function as a storage capacitor for storing written data. .

[0287] One of the source electrode and the drain electrode of the transistor 134 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 134 is electrically connected to the gate of transistor 131. The source electrode and drain electrode of the second transistor are electrically connected to each other.

[0288] One of the anode and the cathode of the light emitting element 135 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 134. will be done.

[0289] The light emitting element 135 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 135 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0290] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0291] In the display device having the pixel 301 of FIG. 15C, the scanning line driver circuit 104 The pixels 301 are sequentially selected, the transistors 131_2 are turned on, and the data of the data signal is input. Write.

[0292] The pixel 301 to which the data has been written is turned off by turning off the transistor 131_2. Furthermore, the state of the transistor 134 changes depending on the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 135 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0293] In this specification and the like, the term "display element," "display device having a display element," "light emitting element," "light emitting device," "light emitting element ... A light-emitting device, which is a device having a light-emitting element and a light-emitting element, can be used in various forms or in various Examples of a display element, a display device, a light-emitting element, or a light-emitting device include EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) etc.), transistors (transistors that emit light according to the current), electron-emitting elements, liquid crystal elements , electronic ink, electrophoretic element, grating light valve (GLV), plasma display PDP, MEMS (Micro Electro Mechanical Systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter), M IRASOL (registered trademark), IMOD (Interference Modulation) element , piezoelectric ceramic displays, carbon nanotubes, etc., due to electromagnetic effects. Some have display media that change contrast, brightness, reflectance, transmittance, etc. An example of a display device using an electron-emitting device is an EL display. An example of a display device is a field emission display (FED) or S ED type flat panel display (SED: Surface-conduction Ele LCDs are used in displays such as liquid crystal displays (LCDs). Examples of LCDs include transmissive LCDs and semi-transmissive LCDs. (i) reflective LCD displays, direct-view LCD displays, projection LCD displays, etc. Examples of display devices using electronic ink or electrophoretic elements include electronic paper. There are some.

[0294] An example of an EL element is a device that includes an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. An example of an EL layer is a device that uses light emission (fluorescence) from singlet excitons. those that utilize emission from triplet excitons (phosphorescence), and those that utilize emission from singlet excitons ( those that utilize fluorescence and those that utilize light emission from triplet excitons (phosphorescence), Those formed by organic matter, those formed by inorganic matter, those formed by organic matter Those made of polymeric materials, including those made of inorganic materials and those made of polymeric materials , those containing low molecular weight materials, or those containing high molecular weight materials and low molecular weight materials, etc. However, there is no limitation to this, and various types of EL elements can be used. .

[0295] An example of a liquid crystal element is a device that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The element can be constructed with a pair of electrodes and a liquid crystal layer. The optical modulation effect of the liquid crystal is due to the electric field (horizontal electric field, vertical electric field or oblique electric field) applied to the liquid crystal. Specifically, an example of a liquid crystal element is , nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, discotic liquid crystal, Motropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal ( PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main chain liquid crystal, side chain polymer liquid crystal, banana-shaped liquid crystal Examples include:

[0296] Next, a specific example of a liquid crystal display device using liquid crystal elements in the pixels 301 will be described. Here, a top view of the pixel 301 shown in FIG. 15(B) is shown in FIG. 16. In this case, the counter electrode and the liquid crystal element are omitted.

[0297] In FIG. 16, the conductive film 304c functioning as the scanning line is oriented in a direction ( The conductive film 310d that functions as a signal line is provided so as to extend in the left-right direction in the drawing. The capacitors are arranged to extend in a direction substantially perpendicular to the scan lines (vertical direction in the drawing). The conductive film 310f extends in a direction parallel to the signal lines. The functioning conductive film 304c is electrically connected to the scanning line driver circuit 104 (see FIG. 15A). The conductive film 310d that functions as a signal line and the conductive film 310b that functions as a capacitance line are connected. 310f is electrically connected to the signal line driving circuit 106 (see FIG. 15(A)). .

[0298] The transistor 103 is provided in a region where the scanning line and the signal line intersect. The gate electrode 103 includes a conductive film 304c that functions as a gate electrode, a gate insulating film (shown in FIG. 16 The oxide semiconductor film 308 in which the channel region is formed on the gate insulating film is not formed. b, and the conductive films 310d and 310e functioning as a source electrode and a drain electrode. Note that the conductive film 304c also functions as a scan line and overlaps with the oxide semiconductor film 308b. The conductive film 310d functions as a gate electrode of the transistor 103. The oxide semiconductor film 308b also functions as a signal line. It functions as a source electrode or a drain electrode. In terms of shape, the end portion is located outside the end portion of the oxide semiconductor film 308b. The lines function as a light-shielding film that blocks light from a light source such as a backlight. The oxide semiconductor film 308b included in the transistor is not irradiated with light, and the electrical characteristics of the transistor are not changed. This can suppress movement.

[0299] The conductive film 310e has a light-transmitting property that functions as a pixel electrode in the opening 362c. The conductive film 316b is electrically connected to the conductive film 316b.

[0300] The capacitor 105 is connected to the conductive film 310f that functions as a capacitor line in the opening 362. The capacitor 105 is formed by a light-transmitting conductive film formed on a gate insulating film. a dielectric film formed of a nitride insulating film provided on the transistor 103; The capacitor 316b is made of a light-transmitting conductive film 316b that functions as a pixel electrode. The element 105 is light-transmitting.

[0301] In this way, since the capacitor 105 has light-transmitting properties, the capacitor 105 is large and can be placed in the pixel 301. Therefore, it is possible to increase the aperture ratio to 50% or more. It is possible to increase the charge capacity to 55% or more, preferably 60% or more. For example, a semiconductor device with high resolution, such as a liquid crystal display, can be obtained. In a display device, the area of ​​a pixel becomes smaller, and the area of ​​a capacitance element also becomes smaller. In a semiconductor device with high resolution, the amount of charge stored in the capacitor element is small. However, since the capacitor 105 described in this embodiment has a light-transmitting property, the capacitor By providing the element, it is possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. Typically, high-resolution monitors have pixel densities of 200 ppi or more, or even 300 ppi or more. The semiconductor device can be suitably used for various semiconductor devices.

[0302] 16, the pixel 301 has a side parallel to the conductive film 310d that functions as a signal line. In comparison, the side parallel to the conductive film 304c functioning as the scanning line is longer, and The conductive film 310f functioning as a quantity line is parallel to the conductive film 310d functioning as a signal line. As a result, the area of ​​the conductive film 310f in the pixel 301 is reduced. It is possible to reduce the number of pixels, which increases the aperture ratio. The conductive film 310f is in direct contact with the light-transmitting conductive film 308c without using a connection electrode. , the aperture ratio can be further increased.

[0303] Furthermore, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows for efficient use of light from light sources such as backlights, and reduces the power consumption of the display device. The force can be reduced.

[0304] Next, a cross-sectional view taken along the dashed line CD in FIG. 16 is shown in FIG. 17. In this case, a driving circuit section (top view omitted) including a scanning line driving circuit 104 and a signal line driving circuit 106 ) is shown in a cross-sectional view taken along the line AB. In this embodiment, a vertical electric field type liquid crystal display device This article explains:

[0305] The liquid crystal display device described in this embodiment has a liquid crystal display device between a pair of substrates (a substrate 302 and a substrate 342). The element 322 is sandwiched.

[0306] The liquid crystal element 322 is connected to a light-transmitting conductive film 316b above the substrate 302 and a conductive film 316b that controls alignment. a liquid crystal layer 320; and a conductive film 350. The light-transmitting conductive film 316b is used as one electrode of the liquid crystal element 322. The conductive film 350 functions as the other electrode of the liquid crystal element 322 .

[0307] Thus, a liquid crystal display device is a device that has a liquid crystal element. The device includes a driving circuit for driving a plurality of pixels. a control circuit, a power supply circuit, a signal generating circuit, a backlight module, etc., arranged in It is also called an LCD module.

[0308] In the driver circuit portion, a conductive film 304a functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 functioning as a channel region are formed in the oxide semiconductor film 30. 8a, the conductive films 310a and 310b functioning as a source electrode and a drain electrode, respectively. The oxide semiconductor film 308a forms the transistor 102. The oxide semiconductor film 308a is provided over the gate insulating film.

[0309] In the pixel portion, a conductive film 304c functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 are connected to the gate insulating film, and the channel region is formed on the insulating film. the oxide semiconductor film 308b, the conductive film 310 serving as a source electrode and a drain electrode, and The oxide semiconductor film 308b is a gate electrode. The insulating film 312 and the insulating film 313 are formed on the conductive films 310d and 310e. 314 is provided as a protective film.

[0310] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is formed between the insulating film 312 and the insulating film 316b. The insulating film 314 is connected to the conductive film 310e through an opening provided in the insulating film 314.

[0311] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 functions as the other electrode, and the light-transmitting conductive film 316b functions as the other electrode. The light-transmitting conductive film 308c is provided over the gate insulating film. .

[0312] In the driving circuit section, the conductive film 304a and the conductive film 304c are formed at the same time. 4b and the conductive film 31 formed simultaneously with the conductive films 310a, 310b, 310d, and 310e. The light-transmitting conductive film 310c is formed at the same time as the light-transmitting conductive film 316b. It is connected via 6a.

[0313] The conductive film 304b and the light-transmitting conductive film 316a are The conductive film 310c and the light-transmitting conductive film 310d are connected to each other through an opening provided in the conductive film 310c. The insulating film 312 and the insulating film 314 are connected to each other through openings formed therein.

[0314] The components of the display device shown in FIG. 17 will now be described.

[0315] Conductive films 304a, 304b, and 304c are formed on the substrate 302. The conductive film 04a functions as a gate electrode of a transistor in the driver circuit portion. 304c is formed in the pixel portion 101 and functions as a gate electrode of the transistor in the pixel portion. The conductive film 304b is formed in the scanning line driving circuit 104 and is connected to the conductive film 310c. do.

[0316] For the substrate 302, the material of the substrate 11 shown in Embodiment 1 can be used as appropriate.

[0317] The conductive films 304a, 304b, and 304c may be the same as those of the gate electrode 15 shown in Embodiment 1. Materials and manufacturing methods can be used as appropriate.

[0318] An insulating film 305, an insulating film 306, an insulating film 307, an insulating film 308, an insulating film 309, an insulating film 309a, an insulating film 309c, and an insulating film 309b are formed on the substrate 302 and the conductive films 304a, 304c, and 304b. The insulating film 305 and the insulating film 306 are formed on the transistors in the driver circuit section. The insulating film functions as a gate insulating film and a gate insulating film of a transistor in the pixel portion 101 .

[0319] The insulating film 305 may be the nitride insulating film described in the gate insulating film 17 in the first embodiment. The insulating film 306 is preferably formed using the gate insulating film shown in Embodiment 1. It is preferable to form the insulating film 17 using the oxide insulating film described above.

[0320] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 30 The oxide semiconductor film 308a is formed in a position overlapping with the conductive film 304a. The oxide semiconductor layer is formed on the insulating film and functions as a channel region of the transistor in the driver circuit portion. The film 308b is formed in a position overlapping with the conductive film 304c, and is used as a channel for the transistor in the pixel portion. The light-transmitting conductive film 308c functions as a panel region. It functions as a pole.

[0321] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are The material and the formation method of the oxide semiconductor film 18 shown in Embodiment 1 can be used as appropriate.

[0322] The light-transmitting conductive film 308c is formed of an oxide semiconductor film similar to the oxide semiconductor films 308a and 308b. The film is a semiconductor film containing impurities. In addition, impurities such as boron, phosphorus, tin, antimony, and rare gases can be used instead of hydrogen. It may contain elements, alkali metals, alkaline earth metals, etc.

[0323] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are all gate electrodes. The oxide semiconductor film 308a is formed over the oxide semiconductor insulating film 308b but has a different impurity concentration. The impurity concentration of the light-transmitting conductive film 308c is higher than that of the light-transmitting conductive film 308b. The hydrogen concentration in the nitride semiconductor films 308a and 308b is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 Further details are as follows: Preferably 1 x 10 16 atoms / cm 3 The light-transmitting conductive film 308c is as follows: The hydrogen concentration in 19 atoms / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 More preferably, 5 × 10 20 atoms / cm 3 That's all. In addition, compared with the oxide semiconductor films 308a and 308b, the light-transmitting conductive film 308c The hydrogen concentration is doubled, preferably 10 times or more.

[0324] The light-transmitting conductive film 308c has a lower resistance than the oxide semiconductor films 308a and 308b. The resistivity of the light-transmitting conductive film 308c is low compared to that of the oxide semiconductor films 308a and 308b. b resistivity 1×10 -8 1×10 times more -1 It is preferable that the ratio is 1:1 or less. 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 - 3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0325] The oxide semiconductor films 308a and 308b are formed by forming oxide semiconductor films such as the insulating film 306 and the insulating film 312. Since it is in contact with a film made of a material that can improve the interface characteristics with the conductor film, it is The oxide semiconductor films 308a and 308b function as semiconductors. The transistor having 08b has excellent electrical characteristics.

[0326] On the other hand, the light-transmitting conductive film 308c is formed in the opening 362 (see FIG. 6A). The insulating film 314 is in contact with the insulating film 314. The insulating film 314 prevents impurities from the outside, such as water and alkali metals. The film is formed of a material that prevents alkaline earth metals and the like from diffusing into the oxide semiconductor film. Therefore, hydrogen in the insulating film 314 is absorbed into the oxide semiconductor films 308a and 308b. When hydrogen diffuses into the oxide semiconductor film formed at the same time as b, hydrogen is converted into an oxide The insulating film 314 is formed by the plasma CVD method. Alternatively, when the oxide semiconductor film is formed by a sputtering method, the oxide semiconductor film is exposed to plasma, and oxygen vacancies are formed. When hydrogen contained in the insulating film 314 enters the oxygen vacancy, As a result, the oxide semiconductor film becomes more conductive and functions as a conductor. In other words, the oxide semiconductor film 308 can be said to have high conductivity. The oxide semiconductor films 308a and 308b are mainly made of the same material as the oxide semiconductor films 308a and 308b, and the hydrogen concentration is 8b, the metal oxide having increased conductivity is used as the conductive film 30 having light-transmitting properties. It's called 8c.

[0327] However, one aspect of the embodiment of the present invention is not limited to this, and the conductive film 30 having light-transmitting properties may be In some cases, it is possible that 8c is not in contact with the insulating film 314.

[0328] Furthermore, one aspect of the embodiment of the present invention is not limited to this. In some cases, the oxide semiconductor films 308a and 308b may be formed in separate steps. In that case, the light-transmitting conductive film 308c may be formed between the oxide semiconductor films 308a and 308b. For example, the light-transmitting conductive film 308c may be made of a material different from that of the conductive film 308b. It is made using indium tin oxide (hereinafter referred to as ITO) or indium zinc oxide. It may be done.

[0329] The semiconductor device described in this embodiment includes an oxide semiconductor film of a transistor and a capacitor. In addition, a light-transmitting conductive film that functions as a pixel electrode is formed. This is used as the other electrode of the capacitor element. This eliminates the need for a process for forming a capacitor film, thereby reducing the number of steps required for manufacturing a semiconductor device. In this case, the pair of electrodes is formed of a light-transmitting conductive film, and therefore the light-transmitting element has light-transmitting properties. As a result, the area occupied by the capacitor element can be increased while increasing the aperture ratio of the pixel.

[0330] The conductive films 310a, 310b, 310c, 310d, and 310e are the same as those shown in the first embodiment. The material and manufacturing method for the pair of electrodes 21 and 22 can be appropriately used.

[0331] an insulating film 306, oxide semiconductor films 308a and 308b, a light-transmitting conductive film 308c, An insulating film 312 is formed on the conductive films 310a, 310b, 310c, 310d, and 310e. An insulating film 314 is formed on the insulating film 312. The insulating film 312 is made of an oxide semiconductor, similar to the insulating film 306. It is preferable to use a material that can improve the interface characteristics with the film. The oxide insulating film 24 can be formed using a material and a formation method similar to those of the oxide insulating film 24 in Embodiment 1 as appropriate. As shown in Embodiment 1, the oxide insulating film 23 and the oxide insulating film 24 are stacked. That's fine.

[0332] The insulating film 314, like the insulating film 305, is resistant to external impurities such as water and alkaline metals. It is preferable to use a material that prevents metals, alkaline earth metals, and the like from diffusing into the oxide semiconductor film. The material and manufacturing method of the nitride insulating film 25 shown in Embodiment 1 can be used appropriately. do.

[0333] In addition, light-transmitting conductive films 316a and 316b are formed over the insulating film 314. The light-transmitting conductive film 316a is conductive in the opening 364a (see FIG. 20C). The conductive film 304b is electrically connected to the conductive film 304b, and the conductive film 304b is electrically connected to the conductive film 304b in the opening 364b (see FIG. 20(C)). That is, the conductive film 304b and the conductive film 310c are electrically connected to each other. The light-transmitting conductive film 316b functions as a connection electrode. C). ) is electrically connected to the conductive film 310e and functions as a pixel electrode of the pixel. The light-transmitting conductive film 316b is used as one of a pair of electrodes of a capacitor. It can function.

[0334] To achieve a connection structure in which the conductive film 304b and the conductive film 310c are in direct contact with each other, the conductive film 3 Before forming 10c, patterning is performed to form openings in the insulating films 305 and 306. The connection structure of FIG. 17 requires the photomask to be formed. However, as shown in FIG. 17, by using a light-transmitting conductive film 316a, By connecting the conductive film 304b and the conductive film 310c, the conductive film 304b and the conductive film 310 This eliminates the need to create a connection where c is in direct contact, reducing the number of photomasks by one. That is, the number of steps for manufacturing a semiconductor device can be reduced.

[0335] The light-transmitting conductive films 316a and 316b are made of indium containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium titanium oxide Oxides, indium tin oxide with titanium oxide, ITO, indium zinc oxide, oxide A conductive material having light-transmitting properties, such as indium-doped indium tin oxide, can be used. do.

[0336] Moreover, a colored film (hereinafter referred to as a colored film 346) is formed on the substrate 342. The colored film 346 functions as a color filter. A light-shielding film 344 is formed on the substrate 342 adjacent to the black matrix. The colored film 346 does not necessarily have to be provided, and may be used as a display. In some cases, such as when the device is monochrome, the colored film 346 may not be provided.

[0337] The colored film 346 may be a colored film that transmits light in a specific wavelength band. For example, A red (R) color filter that transmits light in the red wavelength band, and a green color filter that transmits light in the green wavelength band A green (G) color filter transmits light in the blue wavelength band, and a blue (B) color filter transmits light in the blue wavelength band. A filter or the like can be used.

[0338] The light-shielding film 344 may be made of metal, as long as it has the function of blocking light in a specific wavelength range. A film or an organic insulating film containing a black pigment or the like can be used.

[0339] An insulating film 348 is formed on the colored film 346. The insulating film 348 is formed by a planarizing method. The function of the colored film 346 is to prevent impurities contained therein from diffusing into the liquid crystal element. It has the function of controlling

[0340] In addition, a conductive film 350 is formed on the insulating film 348. The conductive film 350 is The conductive film has a function as the other of the pair of electrodes of the liquid crystal element. An insulating film having a function as an alignment film is formed on the films 316a and 316b and the conductive film 350. It may be formed separately.

[0341] In addition, the liquid crystal layer 3 is provided between the light-transmitting conductive films 316a and 316b and the conductive film 350. The liquid crystal layer 320 is formed on the substrate 3 using a sealing material (not shown). The seal is formed between the substrate 342 and the substrate 342. The seal is used to prevent moisture from entering from the outside. In order to suppress the adhesion, it is preferable to have a structure in which the inorganic material is in contact with the inorganic material.

[0342] In addition, the liquid crystal layer 320 is formed between the conductive films 316a and 316b and the conductive film 350. A spacer may be provided to maintain the thickness (also called the cell gap) of the pixel electrode.

[0343] Regarding a method for manufacturing an element portion provided on a substrate 302 shown in the semiconductor device shown in FIG. This will be explained with reference to FIGS.

[0344] First, prepare a substrate 302. Here, a glass substrate is used as the substrate 302.

[0345] Next, a conductive film is formed on the substrate 302 and processed into a desired region. The conductive films 304a, 304b, and 304c are formed. The formation of c is carried out by forming a mask by first patterning in a desired region, and then covering the mask. It can be formed by etching the uncut area (see FIG. 18(A)).

[0346] The conductive films 304a, 304b, and 304c are typically formed by evaporation or CVD. The film can be formed by a sputtering method, a spin coating method, or the like.

[0347] Next, an insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304b, and 304c. Then, an insulating film 306 is formed on the insulating film 305 (see FIG. 18A).

[0348] The insulating film 305 and the insulating film 306 are formed by a sputtering method, a CVD method, or the like. When the insulating film 305 and the insulating film 306 are formed successively in a vacuum, impurities are easily removed. This is preferable because it prevents the inclusion of

[0349] Next, an oxide semiconductor film 307 is formed over the insulating film 306 (see FIG. 18B).

[0350] The oxide semiconductor film 307 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser The thin film can be formed by using ablation method or the like.

[0351] Next, the oxide semiconductor film 307 is processed into a desired region, whereby an island-shaped oxide semiconductor film 3 The oxide semiconductor films 308a, 308b, and 308d are formed. The formation of 08d involves forming a mask by second patterning in a desired area, and then forming the mask The etching can be performed by etching the area not covered by the The etching can be dry, wet, or a combination of both. (See FIG. 18(C)).

[0352] Next, a conductive film 3 is formed over the insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d. 09 (see Figure 19(A)).

[0353] The conductive film 309 can be formed by, for example, a sputtering method.

[0354] Next, the conductive film 309 is processed into a desired region, thereby forming conductive films 310a, 310b, and 311. The conductive films 310a, 310b, 310c, 310d, and 310e are formed. The formation of 10d and 310e involves forming a mask by third patterning in a desired area. The area not covered by the mask can be etched to form the etched area (FIG. 1). 9(B)).

[0355] Next, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 31 An insulating film 311 is formed to cover the layers 310a, 310b, 310c, 310d, and 310e. (See FIG. 19(C)).

[0356] The insulating film 311 may be the same as the oxide insulating film 23 and the oxide insulating film 24 described in Embodiment 1. The oxide film can be formed by stacking under the same conditions. The insulating film 23 is formed while being heated, so that the oxide semiconductor films 308a, 308b, and 308 By removing hydrogen, water, and the like contained in the oxide semiconductor film d, a highly purified oxide semiconductor film can be formed. Cut.

[0357] Next, the insulating film 311 is processed into a desired region to form an insulating film 312 and an opening 362. The insulating film 311 and the opening 362 are formed by forming a fourth pattern in a desired region. A mask is formed by etching, and the area not covered by the mask is etched. The above steps can be used to form the film (see FIG. 20(A)).

[0358] Note that the opening 362 is formed so that the surface of the oxide semiconductor film 308d is exposed. The opening 362 can be formed by dry etching, for example. However, the method for forming the opening 362 is not limited to this, and may be a wet etching method or Alternatively, a combination of dry etching and wet etching may be used.

[0359] Thereafter, similarly to the first embodiment, a heat treatment is performed to remove oxygen contained in the insulating film 311. Part of the oxygen is transferred to the oxide semiconductor films 308a and 308b. As a result, the oxygen vacancies in the oxide semiconductor film 308b can be compensated for. The amount of oxygen vacancies contained in 08a and 308b can be reduced.

[0360] Next, the insulating film 313 is formed over the insulating film 312 and the oxide semiconductor film 308d (FIG. 20 (See (B)).

[0361] The insulating film 313 is made of a material containing impurities from the outside, such as oxygen, hydrogen, water, alkali metals, It is preferable to use a material that prevents alkaline earth metals and the like from diffusing into the oxide semiconductor film. and preferably contains hydrogen, and typically contains nitrogen, such as nitride. The insulating film 313 can be formed by using, for example, a CVD method. It is possible.

[0362] The insulating film 314 is resistant to external impurities such as water, alkali metals, alkaline earth metals, etc. The film is formed of a material that prevents diffusion of hydrogen into the oxide semiconductor film and further contains hydrogen. Therefore, when hydrogen in the insulating film 314 diffuses into the oxide semiconductor film 308d, the oxide semiconductor In the film 308d, hydrogen bonds with oxygen, generating electrons as carriers. The oxide semiconductor film 308d has high conductivity and becomes a light-transmitting conductive film 308c.

[0363] In addition, the silicon nitride film is preferably formed at a high temperature in order to enhance blocking properties. Preferably, the substrate temperature is 100° C. or higher and 400° C. or lower, more preferably 300° C. or higher and 400° C. or lower. It is preferable to form the film by heating at a temperature of 100°C or less. Oxygen is released from the oxide semiconductor used as the conductive films 308a and 308b, and the carrier concentration Since a phenomenon in which the temperature rises may occur, the temperature should be set at a level at which such a phenomenon does not occur.

[0364] Next, the insulating film 313 is processed into a desired region, forming an insulating film 314 and an opening 364. The insulating film 314 and the openings 364a, 364b, and 364c are formed. b, 364c form a mask by fifth patterning in a desired area, and The area not covered by the metal layer can be etched away (see FIG. 20(C)). ).

[0365] The opening 364a is formed so that the surface of the conductive film 304b is exposed. The opening 364b is formed so as to expose the conductive film 310c. The conductive film 310e is formed so as to be exposed.

[0366] The openings 364a, 364b, and 364c can be formed by, for example, dry etching. However, the method for forming the openings 364a, 364b, and 364c is The etching method is not limited to this, and may be a wet etching method or a dry etching method. A formation method in combination with wet etching may also be used.

[0367] Next, a conductive film 31 is formed on the insulating film 314 so as to cover the openings 364a, 364b, and 364c. 5 is formed (see FIG. 21(A)).

[0368] The conductive film 315 can be formed by, for example, a sputtering method.

[0369] Next, the conductive film 315 is processed into a desired region to form a light-transmitting conductive film 316a, The light-transmitting conductive films 316a and 316b are formed. A mask is formed on the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 21(B)).

[0370] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0371] Note that in this embodiment, hydrogen contained in the insulating film 314 is diffused into the oxide semiconductor film 308d. The oxide semiconductor film 308d was dispersed to increase the conductivity. The oxide semiconductor film 308d is covered with a mask, and impurities, typically hydrogen, boron, or lithium, are introduced into the oxide semiconductor film 308d. Addition of tin, antimony, rare gas elements, alkali metals, alkaline earth metals, etc. The oxide semiconductor film 308d may be doped with hydrogen or boron to increase the conductivity. As a method for adding phosphorus, tin, antimony, rare gas elements, etc., there is an ion doping method. On the other hand, when an alkali metal or alkaline earth metal is added to the oxide semiconductor film 308d, As a method for adding a metal or the like, a method of exposing a solution containing the impurity to the oxide semiconductor film 308d is used. There is a law.

[0372] Next, the structure formed on the substrate 342 provided opposite the substrate 302 will be described below. Give an explanation.

[0373] First, a substrate 342 is prepared. The substrate 342 is made of the same material as the substrate 302. Next, a light-shielding film 344 and a colored film 346 are formed on the substrate 342 (FIG. 22( See A).

[0374] The light-shielding film 344 and the colored film 346 can be formed using various materials by a printing method, an ink-jet method, They are formed at desired positions by etching using photolithography technology.

[0375] Next, an insulating film 348 is formed on the light-shielding film 344 and the colored film 346 (see FIG. 22(B)). see).

[0376] The insulating film 348 is made of an organic insulating material such as acrylic resin, epoxy resin, or polyimide. By forming the insulating film 348, for example, the colored film 34 6 can be prevented from diffusing impurities into the liquid crystal layer 320. However, the insulating film 348 is not necessarily provided, and a structure without the insulating film 348 may be used. Good too.

[0377] Next, a conductive film 350 is formed over the insulating film 348 (see FIG. 22C). The materials for the conductive film 315 can be used.

[0378] Through the above steps, the structure formed on the substrate 342 can be formed.

[0379] Next, the insulating film 31 formed on the substrate 302 and the substrate 342, more specifically, on the substrate 302, 4. The conductive films 316a and 316b having light-transmitting properties and the conductive film 35 formed on the substrate 342 The alignment film 318 and the alignment film 352 are formed on the substrate 10, respectively. The film can be formed by using a rubbing method, a photo-alignment method, etc. Then, the substrate 302 and the substrate The liquid crystal layer 320 is formed between the substrate 342 and the liquid crystal layer 320. or by using capillary action after bonding the substrate 302 and the substrate 342 together. An injection method of injecting liquid crystal can be used.

[0380] Through the above steps, the display device shown in FIG. 17 can be manufactured.

[0381] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0382] <Variation 1> A modified example of a liquid crystal display device using a liquid crystal element in the pixel 301 will be described. 23 shows a top view of the pixel 301 shown in FIG. 15(B). The electrodes and liquid crystal elements are omitted. Note that the description of the same configuration as in the eighth embodiment is omitted. do.

[0383] <Configuration of semiconductor device> In FIG. 23, the opening 374c is provided inside the opening 372c, which is shown in FIG. Also, the pixel 301 differs from the pixel 301 in that an opening 372 is provided instead of the opening 364. The conductive film 310e is formed in the opening 372c and the opening 374c. The conductive film 316b is electrically connected to a light-transmitting conductive film 316b which functions as a pixel electrode.

[0384] Next, a cross-sectional view taken along the dashed line CD in FIG. 23 is shown in FIG. 24. A cross-sectional view of the drive circuit section (top view omitted) is shown at AB.

[0385] As shown in FIG. 24, the insulating film 306 and the insulating film 312 are provided on the conductive film 304a. 25(A) and an opening 374 formed in the insulating film 314. The opening 374a (see FIG. 25(C)) is an opening The opening 374a (see FIG. 25(C)) is located inside the opening 372a (see FIG. 25(A)). In the illustrated example, the conductive film 304a and the light-transmitting conductive film 316a are connected to each other.

[0386] Moreover, an opening 372b (FIG. 25(A)) provided in the insulating film 312 is formed on the conductive film 310c. ) and an opening 374b (see FIG. 25(C)) provided in the insulating film 314. The opening 374b (see FIG. 25(C)) is formed in a shape similar to that of the opening 372b (see FIG. 25(A)). ) is located inside the opening 374b (see FIG. 25(C)). and a light-transmitting conductive film 316a are connected to the wiring 316.

[0387] Moreover, an opening 372c (FIG. 25(A)) provided in the insulating film 312 is formed on the conductive film 310e. ) and an opening 374c (see FIG. 25(C)) provided in the insulating film 314. The opening 374c (see FIG. 25(C)) is formed in a shape similar to that of the opening 372c (see FIG. 25(A)). ) is located inside the opening 374c (see FIG. 25(C)). and a light-transmitting conductive film 316b are connected to each other.

[0388] In addition, an opening 372 provided in the insulating film 312 is formed over the light-transmitting conductive film 308c. (See FIG. 25A.) In the opening 372, the light-transmitting conductive film 308 c contacts the insulating film 314 .

[0389] A connection portion between the conductive film 304b and the light-transmitting conductive film 316a, the conductive film 310c, and the light-transmitting conductive film 316b the connection portion of the conductive film 316a having a light-transmitting property, the conductive film 310e, and the light-transmitting conductive film 316b The connection portions are covered with an insulating film 305 and / or an insulating film 314. The insulating film 314 and the insulating film 315 are resistant to external impurities such as water, alkali metals, and alkaline earth metals. It is formed of an insulating film made of a material that prevents metals and the like from diffusing into the oxide semiconductor film. In addition, the side surfaces of the openings 372a, 372b, 372c, and 372 (see FIG. 25(A)) are insulated. The insulating film 305 and / or the insulating film 314 are covered with the insulating film 305 and / or the insulating film 314. Since an oxide semiconductor film is provided on the side of the gate electrode, external impurities such as water and alkaline metals can be easily removed. The conductive film 304b, the conductive films 310c and 310e, and the light-transmitting The oxide film included in the transistor is formed from the connection portion of the conductive films 308c, 316a, and 316b. This prevents the diffusion of the ions into the semiconductor film, which reduces the change in the electrical characteristics of the transistor. This makes it possible to prevent the semiconductor device from malfunctioning, thereby improving the reliability of the semiconductor device.

[0390] Regarding a method for manufacturing an element portion provided on a substrate 302 shown in the semiconductor device shown in FIG. This will be explained with reference to FIGS. 19, 25, and 26.

[0391] As in the eighth embodiment, a gate electrode is formed on a substrate 302 through the steps shown in FIGS. conductive films 304a, 304b, and 304c functioning as gate insulating films; The insulating film 305, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 31 310a, 310b, 310c, 310d, 310e, and an insulating film 311 are formed. In the process, first to third patterning are performed to form the conductive film 30 4a, 304b, 304c, oxide semiconductor film 308a, 308b, 308d, conductive film 31 0a, 310b, 310c, 310d, and 310e.

[0392] Thereafter, similarly to the eighth embodiment, a heat treatment is performed to remove some of the oxygen contained in the insulating film 311. Oxygen is transferred from the oxide semiconductor films 308a and 308b to the oxide semiconductor films 308a and 308b. Oxygen vacancies in the oxide semiconductor film included in 08b can be filled. The amount of oxygen vacancies in the oxide semiconductor films 308a and 308b can be reduced.

[0393] Next, as shown in FIG. 25(A), the insulating film 311 is processed into a desired region to form an insulating film. The film 312 and the openings 372, 372b, and 372c are formed. A portion of the insulating film 306 is processed into a desired region to form an opening 372a. The insulating film 305, the insulating film 312, and the openings 372, 372a, 372b, and 372c The formation is performed by forming a mask by fourth patterning in a desired region, and then forming a film covered by the mask. The openings 372, 372a can be formed by etching the unfilled areas. , 372b, and 372c, the formation method of the opening 362 shown in the eighth embodiment may be used. The method can be used.

[0394] In this etching step, at least the opening 372a is formed, so that the subsequent During the etching process using the mask formed by the fifth patterning, etching It is possible to reduce the amount.

[0395] Next, the insulating film 305, the conductive films 310c and 310e, the insulating film 312, and the oxide semiconductor film An insulating film 313 is formed on the film 308d (see FIG. 25(B)).

[0396] Next, in the same manner as in the eighth embodiment, the insulating film 313 is processed into a desired region, thereby forming the insulating film 3 14, and openings 374a, 374b, and 374c are formed. The openings 374a, 374b, and 374c are formed by applying a fifth patterning mask to desired areas. The mask can be formed by etching the area not covered by the mask. (See Figure 25(C)).

[0397] Next, as in the eighth embodiment, an insulating film is formed to cover the openings 374a, 374b, and 374c. A conductive film 315 is formed over the film 314 (see FIG. 26A).

[0398] Next, the conductive film 315 is processed into a desired region to form a light-transmitting conductive film 316a, The light-transmitting conductive films 316a and 316b are formed. A mask is formed on the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 26(B)).

[0399] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0400] In the case of a process in which the opening 372a is not formed in FIG. 25(A), In the etching process, the insulating film 305, the insulating film 306, the insulating film 312, and the insulating film 31 4 must be etched, which increases the amount of etching compared to other openings. Therefore, variations occur in the etching process, and in some areas, The opening 374a is not formed, and the conductive film 316a and the conductive film 316b having light-transmitting properties are formed later. However, in this embodiment, the contact failure occurs twice. The openings 372a and 374a are formed by the etching process. As a result, the yield of semiconductor devices is improved. Although the opening 372a has been used in the description, the opening The portion 374b and the opening 374c have the same effect.

[0401] <Variation 2> A modified example of a liquid crystal display device using a liquid crystal element in the pixel 301 will be described. In the liquid crystal display device shown in FIG. 24, the light-transmitting conductive film 308 is in contact with the insulating film 314. However, it can be structured so that it is in contact with the insulating film 305. In this case, as shown in FIG. Since there is no need to provide an opening 362, the surfaces of the conductive films 316a and 316b having light-transmitting properties are Therefore, the alignment of the liquid crystal material contained in the liquid crystal layer 320 can be reduced. It is possible to reduce the disturbance. In addition, it is possible to manufacture a semiconductor device with high contrast. can be done.

[0402] Such a structure is obtained by forming an insulating film before the oxide semiconductor film 307 is formed in FIG. The insulating film 306 may be selectively etched to expose a part of the insulating film 305 .

[0403] <Variation 3> Here, a modification of the semiconductor device shown in the first embodiment will be described with reference to FIGS. 27 to 29. In FIG. 27, AB shows a cross-sectional view of the drive circuit section, and CD shows a cross-sectional view of the pixel section. A plan view is shown.

[0404] The semiconductor device shown in FIG. 27 has a channel protection The difference is that a transistor of this type is used.

[0405] In the driver circuit portion, a conductive film 304a functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 functioning as a channel region are formed in the oxide semiconductor film 30. 8a, the conductive films 310a and 310b functioning as a source electrode and a drain electrode, respectively. The transistor 102 is formed between the oxide semiconductor film 308a and the conductive films 310a and 310b. An insulating film 312 that functions as a channel protective film is provided. An insulating film 314 is provided as a protective film on the layers 10b and 310c.

[0406] In the pixel portion, a conductive film 304c functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 are connected to the gate insulating film, and the channel region is formed on the insulating film. the oxide semiconductor film 308b, the conductive film 310 serving as a source electrode and a drain electrode, and The oxide semiconductor film 308b and the conductive film 310e constitute the transistor 103. An insulating film 312 that functions as a channel protection film is provided between 10d and 310e. In addition, an insulating film 314 is formed over the conductive films 310d and 310e and the light-transmitting conductive film 308c. It is provided as a protective film.

[0407] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is provided on the insulating film 314. The conductive film 310e is connected to the conductive film 310e in the opening.

[0408] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 functions as the other electrode, and the light-transmitting conductive film 316b functions as the other electrode. The element 105 is formed.

[0409] In the driving circuit section, the conductive film 304a and the conductive film 304c are formed at the same time. 4b and the conductive film 31 formed simultaneously with the conductive films 310a, 310b, 310d, and 310e. The light-transmitting conductive film 310c is formed at the same time as the light-transmitting conductive film 316b. It is connected via 6a.

[0410] In this modification, the conductive films 310a, 310b, 310d, and 310e are etched. At this time, since the oxide semiconductor films 308a and 308b are covered with the insulating film 312, the conductive film 3 The oxide semiconductor films 10a, 310b, 310d, and 310e are formed by etching. The insulating film 312 has a stoichiometric composition. The insulating film 312 is formed of an oxide insulating film containing more oxygen than the insulating film 312. Part of the oxygen contained in the oxide semiconductor film 308a is transferred to the oxide semiconductor film 308b. The amount of oxygen vacancies contained in 308a and 308b can be reduced.

[0411] Regarding a method for manufacturing an element portion provided on a substrate 302 shown in the semiconductor device shown in FIG. This will be explained using Figures 19, 28 and 29.

[0412] As in the eighth embodiment, after the process of FIG. 18, a gate electrode is formed on the substrate 302. conductive films 304a, 304b, and 304c, which function as gate insulating films; an insulating film 305, which functions as a gate insulating film; The insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d are formed. In the process, first patterning and second patterning are performed to form the conductive film 30 4a, 304b, and 304c, and oxide semiconductor films 308a, 308b, and 308d are formed. do.

[0413] Next, as shown in FIG. 28(A), an insulating film 311 is formed in the same manner as in the eighth embodiment.

[0414] Thereafter, similarly to the eighth embodiment, a heat treatment is performed to remove some of the oxygen contained in the insulating film 311. Oxygen is transferred from the oxide semiconductor films 308a and 308b to the oxide semiconductor films 308a and 308b. Oxygen vacancies in the oxide semiconductor film included in 08b can be filled. The amount of oxygen vacancies in the oxide semiconductor films 308a and 308b can be reduced.

[0415] Next, as shown in FIG. 28(B), the insulating film 311 is processed into a desired region, and the insulating film 311 is oxidized. An insulating film 312 is formed on the compound semiconductor films 308a and 308b. When the insulating film 306 is made of the same material as the insulating film 312, a part of the insulating film 306 is etched. Only the regions covered with the oxide semiconductor films 308a and 308b remain. The film 306 and the insulating film 312 are formed in desired areas by forming a mask shape by a third patterning. The mask can be formed by forming a thin film on the surface of the substrate and then etching the area not covered by the mask. do.

[0416] Next, a conductive film is formed over the insulating film 305, the insulating film 306, and the oxide semiconductor films 308a and 308b. After the formation, the conductive films 310a, 310b, 310c, and 310d are formed through the same process as in the eighth embodiment. 28(C) 。 In addition, the conductive films 310a and 310b are formed. , 310c, 310d, and 310e are formed in desired areas by a fourth patterning. The mask is formed by etching the area not covered by the mask. can be done.

[0417] Next, the insulating film 305, the insulating film 312, the oxide semiconductor film 308d, the conductive films 310a and 31 An insulating film 313 is formed on the layers 310b, 310c, 310d, and 310e (see FIG. 29(A)). .

[0418] Next, in the same manner as in the eighth embodiment, the insulating film 313 is processed into a desired region, thereby forming the insulating film 3 14, and openings 384a, 384b, and 384c are formed. The openings 384a, 384b, and 384c are formed in the desired areas by a fifth patterning mask. The mask can be formed by etching the area not covered by the mask. (See Figure 29(B)).

[0419] Next, as in the eighth embodiment, an insulating film is formed to cover the openings 384a, 384b, and 384c. After forming a conductive film over the film 314, the conductive film is processed into a desired region, thereby forming a light-transmitting film. Conductive films 316a and 316b are formed (see FIG. 29C). The formation of the conductive films 316a and 316b is performed by forming a mask by a sixth patterning in a desired area. and then etching the area not covered by the mask.

[0420] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0421] <Variation 4> In this embodiment and the modification, a pair of electrodes constituting the capacitor element 105 is made of a light-transmitting material. The conductive film 308c having a light-transmitting property and the conductive film 316b having a light-transmitting property are used. As shown in FIG. 8, a light-transmitting conductive film 31 is formed between the insulating film 312 and the insulating film 314. 7, a light-transmitting conductive film 316c is formed over the insulating film 314, and a light-transmitting conductive film 316b is formed over the insulating film 314. The conductive film 317 and the light-transmitting conductive film 316c are disposed in a pair of electrodes forming the capacitor 105. It can be used as a pole.

[0422] Furthermore, an organic insulating layer such as an acrylic resin, an epoxy resin, or a polyimide is applied to the insulating layer 312. An organic insulating film such as an acrylic resin film has high flatness and therefore has light-transmitting properties. Therefore, the step on the surface of the conductive film 316a can be reduced. It is possible to reduce the alignment disorder of the liquid crystal material that is generated by the liquid crystal display. A device can be fabricated.

[0423] <Variation 5> In this embodiment and the modification, a pair of electrodes constituting a capacitor element is made of a light-transmitting material. The conductive film 308c and the light-transmitting conductive film 316b are used. Conductive films 310a, 310b, 310c, 310d, 310e, 310f, 310g, 310h, 310i, 310j, 310i ... The conductive film 308c and the conductive film 308d are formed at the same time as the conductive film 310e. It is possible to appropriately select two or more of the conductive films 316b having the above structure.

[0424] (Embodiment 9) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is In the above, regarding one aspect applicable to the oxide semiconductor film 18, the multilayer film 20, and the multilayer film 34, Here, an oxide semiconductor film included in a multilayer film will be used as an example. The oxide film can also have a similar structure.

[0425] The oxide semiconductor film is an oxide semiconductor having a single crystal structure (hereinafter referred to as a single-crystal oxide semiconductor). , a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), a microcrystalline oxide semiconductor oxide semiconductors (hereinafter referred to as microcrystalline oxide semiconductors) and amorphous oxide semiconductors (hereinafter referred to as amorphous oxide semiconductors) The oxide semiconductor film may be formed of one or more of the following: The oxide semiconductor film may be made of an amorphous oxide semiconductor. The oxide semiconductor may be composed of a single crystal oxide semiconductor having a crystal grain. oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, and amorphous oxide semiconductors We will explain about this.

[0426] <Single-crystal oxide semiconductor> For example, a single-crystal oxide semiconductor has a low impurity concentration and a low density of defect states (oxygen vacancies). Therefore, the carrier density can be reduced. The transistors used in the channel region rarely have normally-on electrical characteristics. In addition, since the density of defect states in a single-crystal oxide semiconductor is low, the density of trap states is also low. Therefore, a transistor using a single-crystal oxide semiconductor for a channel region may In this case, the variation in electrical characteristics may be small, resulting in a highly reliable transistor.

[0427] <caac-os> The CAAC-OS film is one of the oxide semiconductor films with multiple crystal parts. The crystal part is small enough to fit inside a cube with a side length of less than 100 nm. The crystal parts contained in the OS film are in the form of cubes with sides of less than 10 nm, less than 5 nm, or less than 3 nm. The CAAC-OS film has a smaller defect density than the microcrystalline oxide semiconductor film. The CAAC-OS film has a low density of recessed states. .

[0428] CAAC-OS can be observed, for example, by a transmission electron microscope (TEM). The crystals can be seen in the image observed by a Electron Microscope. The crystalline part contained in the CAAC-OS can be seen, for example, in a TEM image. The size of the CAAC-OS is often such that it fits inside a cube with a side length of 100 nm. In TEM images, the boundaries between crystalline regions may not be clearly visible. CAAC-OS is a TEM image showing the grain boundary. In some cases, it is not possible to clearly identify the grain boundaries of CAAC-OS. Therefore, impurities are less likely to segregate. Therefore, the defect density is unlikely to be high. Since there are no clear grain boundaries, the decrease in electron mobility is small.

[0429] The CAAC-OS has, for example, a plurality of crystal parts, and the c-axes of the crystal parts are aligned. They may be aligned along the normal vector of the forming plane or parallel to the normal vector of the surface. Therefore, CAAC-OS can be easily analyzed by, for example, X-ray diffraction (XRD). When an out-of-plane analysis was performed using a ion device, two A peak may appear when θ is around 31°. Spots (bright points) may be observed in the diffraction pattern. The electron diffraction pattern obtained using an electron beam of 0 nm or less or 5 nm or less is called an ultra- The CAAC-OS has a fine-grained electron diffraction pattern. In CAAC-OS, for example, the c-axis The a-axis and / or b-axis may not be aligned macroscopically.

[0430] FIG. 30 shows an example of an electron microbeam diffraction pattern of a sample having a CAAC-OS. The sample was cut in a direction perpendicular to the CAAC-OS surface to obtain a thickness of about 40 nm. In this case, an electron beam with a beam diameter of 1 nm was applied to the cut surface of the sample. As shown in Figure 30, the electron micro-diffraction pattern of CAAC-OS is , it can be seen that spots are observed.

[0431] The crystal part included in the CAAC-OS has a c-axis normal to the surface on which the CAAC-OS is formed. The vectors are aligned parallel to the normal vector of the surface and perpendicular to the ab plane. When viewed from the direction, the metal atoms are arranged in a triangular or hexagonal shape, and when viewed from the direction perpendicular to the c-axis, the metal atoms are arranged in a triangular or hexagonal shape. Metal atoms are arranged in layers or metal atoms and oxygen atoms are arranged in layers. In this specification, the a-axis and the b-axis may be simply perpendicular to each other. When describing the angle, the range of 80° to 100°, preferably 85° to 95°, is also included. In addition, when simply describing it as parallel, it means that the angle is between -10° and 10°, preferably The range of -5° to 5° is also included.

[0432] The c-axis of the crystalline part of the CAAC-OS is the normal vector of the surface on which the CAAC-OS is formed. Or, the shape of CAAC-OS ( Depending on the cross-sectional shape of the surface to be formed or the cross-sectional shape of the surface, the directions may differ. In addition, the crystalline portion was subjected to a crystallization treatment such as a heat treatment when or after the film was formed. Therefore, the c-axis of the crystal part is determined by the orientation of the CAAC-OS crystal. Aligns to be parallel to the face normal vector or surface normal vector.

[0433] For example, the CAAC-OS can be formed by reducing the impurity concentration. Here, the impurities are the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metal elements. In particular, elements such as silicon are metal elements that make up oxide semiconductors. Therefore, when the element removes oxygen from the oxide semiconductor, the bond strength with oxygen is stronger than that of the element. It can disrupt the atomic arrangement of semiconductors and reduce their crystallinity. Heavy metals, argon, carbon dioxide, etc. have large atomic radii (or molecular radii), so they are This can disrupt the atomic arrangement of the oxide semiconductor and reduce the crystallinity of the oxide semiconductor. CAAC-OS is an oxide semiconductor with a low impurity concentration. Impurities present in the semiconductor may act as a carrier generation source.

[0434] In the CAAC-OS, the distribution of the crystal parts may not be uniform. In the process of forming C-OS, when crystal growth is performed from the surface side of the oxide semiconductor, The proportion of crystalline parts near the surface may be higher than that near the bottom. -When impurities are mixed into the OS, the crystallinity of the crystalline part in the region where the impurities are mixed is reduced. It may go down.

[0435] In addition, the CAAC-OS can be formed by, for example, reducing the density of defect states. In an oxide semiconductor, for example, if there is oxygen vacancy, the density of defect states increases. The loss can become a carrier trap or a carrier generation source by capturing hydrogen. To form a CAAC-OS, for example, oxygen vacancies are introduced into an oxide semiconductor. Therefore, CAAC-OS is an oxide with a low density of defect states. Alternatively, the CAAC-OS is an oxide semiconductor with few oxygen vacancies.

[0436] In CAAC-OS, the constant photocurrent measurement method (CPM) The absorption coefficient derived by the current method is 1×10 -3 / cm or less, good Preferably 1 x 10 -4 / cm, more preferably less than 5 × 10 -5 / cm. The absorption coefficient is the energy (wavelength) corresponding to the localized level resulting from oxygen vacancies and impurity contamination. Since there is a positive correlation with the σ (σ converted from σ), the number of defect levels in the CAAC-OS is extremely small.

[0437] In addition, the absorption coefficient curve obtained by CPM measurement shows that the arbors due to the band tails are By excluding the absorption coefficient called Urbach tail, the absorption coefficient due to defect levels can be calculated using the following formula. Note that the Urbach tail refers to a region with a constant slope in the absorption coefficient curve obtained by CPM measurement, and the slope is called the Urbach energy. It can be calculated from the following formula. The Urbach tail refers to a region with a constant slope in the absorption coefficient curve obtained by CPM measurement, and the slope is called the Urbach energy. It can be calculated from the following formula. The Urbach tail refers to a region with a constant slope in the absorption coefficient curve obtained by CPM measurement, and the slope is called the Urbach energy. It can be calculated from the following formula. The Urbach tail refers to a region with a constant slope in the absorption coefficient curve obtained by CPM measurement, and the slope is called the Urbach energy.

[0438]

Equation

[0439] Here, α(E) represents the absorption coefficient at each energy, and α u represents the absorption coefficient due to the Urbach tail. [[ID=二十一]] [[ID=二十二]]represents the absorption coefficient due to the Urbach tail.

[0440] In addition, transistors using CAAC-OS with high purity intrinsic or substantially high purity intrinsic have small variations in electrical characteristics due to irradiation with visible light or ultraviolet light. In addition, transistors using CAAC-OS with high purity intrinsic or substantially high purity intrinsic have small variations in electrical characteristics due to irradiation with visible light or ultraviolet light.

[0441] <Method for fabricating CAAC-OS> The c-axis of the crystal part included in CAAC-OS is aligned in a direction parallel to the normal vector of the formation surface or the surface normal vector of CAAC-OS. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the formation surface or the cross-sectional shape of the surface), the directions may be different from each other. Note that The c-axis of the crystal part included in CAAC-OS is aligned in a direction parallel to the normal vector of the formation surface or the surface normal vector of CAAC-OS. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the formation surface or the cross-sectional shape of the surface), the directions may be different from each other. Note that The c-axis of the crystal part included in CAAC-OS is aligned in a direction parallel to the normal vector of the formation surface or the surface normal vector of CAAC-OS. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the formation surface or the cross-sectional shape of the surface), the directions may be different from each other. Note that The direction of the c-axis of the crystal part is parallel to the normal vector of the formation surface or the surface normal vector when CAAC-OS is formed. The crystal part is formed by film formation or by performing crystallization treatment such as heat treatment after film formation. The direction of the c-axis of the crystal part is parallel to the normal vector of the formation surface or the surface normal vector when CAAC-OS is formed. The crystal part is formed by film formation or by performing crystallization treatment such as heat treatment after film formation. The direction of the c-axis of the crystal part is parallel to the normal vector of the formation surface or the surface normal vector when CAAC-OS is formed. The crystal part is formed by film formation or by performing crystallization treatment such as heat treatment after film formation.

[0442] Three methods can be listed as the formation method of CAAC-OS.

[0443] The first method is to form an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower. By this, the c-axis of the crystal part included in the oxide semiconductor film is aligned with the normal vector of the surface on which the film is formed or the surface This method forms crystals aligned in a direction parallel to the normal vector of the crystal. In this case, the film formation temperature is preferably set to 100° C. or higher and 400° C. or lower.

[0444] The second method is to form a thin oxide semiconductor film and then heat it at a temperature of 200°C to 700°C. By the heat treatment, the c-axis of the crystal part included in the oxide semiconductor film is aligned with the normal vector of the surface where the oxide semiconductor film is formed. This is a method for forming crystals aligned in a direction parallel to the normal vector of the crystal or surface. In this specification, the heating temperature is preferably 200°C or higher and 400°C or lower.

[0445] The third method is to deposit a thin oxide semiconductor film as a first layer, and then heat the film at 200°C or higher for 700°C. By performing heat treatment at 0.5°C or less and then forming a second oxide semiconductor film, The c-axis of the crystal part included in the conductive film is the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystals aligned in parallel directions. It is preferable to set the temperature to 200°C or higher and 400°C or lower.

[0446] Here, a method for forming a CAAC-OS using the first method will be described.

[0447] <Target and target fabrication method> In addition, the CAAC-OS can be used as a target for sputtering of a polycrystalline oxide semiconductor. The film is formed by sputtering using a sputtering target. When the ions collide, the crystalline regions contained in the sputtering target cleave from the ab plane. The particles peel off as flat or pellet-shaped sputtered particles with surfaces parallel to the ab plane. In this case, the plate-shaped or pellet-shaped sputtered particles may become crystalline. By reaching the target surface while maintaining this state, a CAAC-OS film can be formed. .

[0448] In addition, the following conditions are preferably applied to form a CAAC-OS film.

[0449] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas can be reduced. A deposition gas at a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0450] In addition, by increasing the heating temperature of the surface to be formed (for example, the substrate heating temperature) during film formation, After reaching the target surface, the sputtered particles migrate. The temperature is set to 100°C or higher and 740°C or lower, preferably 200°C or higher and 500°C or lower. By increasing the temperature of the surface during film formation, the plate-shaped sputtering particles reach the surface. When the sputtering particle is formed on the surface, migration occurs on the surface to be formed, and the flat surface of the sputtering particle The sputtering particles adhere to the surface, although this varies depending on the type of oxide. , the diameter (circle equivalent diameter) of the plane parallel to the ab plane is 1 nm or more and 30 nm or less, or 1 nm or more The diameter of the plate-shaped sputtered particles is approximately 10 nm or less. In this case, the direction perpendicular to the hexagonal surface is the c-axis direction. It is in the direction.

[0451] In addition, the sputtering target is sputtered using oxygen cations. Therefore, the plasma damage during film formation can be reduced. When it hits the surface of the ring target, the crystallinity of the sputtering target decreases. This can suppress the formation of amorphous phases.

[0452] In addition, the sputtering target is sputtered using oxygen or argon cations. By doing so, if the flat sputtering particle is a hexagonal column, the hexagonal surface Positive charges can be applied to the corners of the hexagonal surface. As a result, the positive charges in each sputtering particle repel each other, maintaining the flat shape. It can be held.

[0453] In order for the corners of the surface of the flat sputtered particle to have a positive charge, a direct current ( It is preferable to use a DC power supply. However, it is also possible to use a radio frequency (RF) power supply or an alternating current (AC) power supply. However, the RF power supply is not suitable for sputtering equipment capable of depositing films on large-area substrates. In addition, DC power is preferable to AC power for the following reasons: It is possible.

[0454] When an AC power supply is used, adjacent targets alternately switch between cathode and anode potentials. If the flat sputtering particles are positively charged, they will repel each other. However, when using an AC power source, there is a momentary There is a time when no electric field is applied to the sputtering particle, and the charge on the plate-shaped sputtering particle The structure of the sputtered particles may be destroyed. It has been found that using a DC power supply is preferable to using a DC power supply.

[0455] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition can be reduced. The oxygen ratio in the film forming gas is 30% by volume or more, preferably 100% by volume or more. Expressed as volume %.

[0456] As an example of a sputtering target, an In-Ga-Zn compound target is The following are the results:

[0457] InO X powder, GaO Y powder, and ZnO Z The powders are mixed in a specified number of moles and pressurized. After that, it is heat-treated at a temperature between 1000℃ and 1500℃ to form polycrystalline In-G The target is a α-Zn compound. The pressure treatment is performed while cooling (or cooling naturally). The reaction may be carried out from the start or while heating. X, Y and Z are any positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z powder However, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 3:1:2, 1: The ratio is 3:2, 1:6:4, or 1:9:6. The type of powder and the mixture The ol number ratio may be changed as appropriate depending on the sputtering target to be produced.

[0458] By using the sputtering target in the above manner, the thickness is uniform and In this way, an oxide semiconductor film with uniform crystal orientation can be formed.

[0459] <Polycrystalline oxide semiconductor> An oxide semiconductor having polycrystallinity is called a polycrystalline oxide semiconductor. Contains a number of crystal grains.

[0460] In polycrystalline oxide semiconductors, for example, crystal grains can be confirmed in TEM observation images. Crystal grains contained in a polycrystalline oxide semiconductor can be seen in, for example, a TEM image. , 2nm to 300nm, 3nm to 100nm, or 5nm to 50nm In addition, polycrystalline oxide semiconductors often have a grain size of 100 μm or less in size, as seen in TEM images. In addition, in the polycrystalline oxide semiconductor, for example, the boundary between the crystal grains can be confirmed. For example, grain boundaries may be visible in TEM images.

[0461] The polycrystalline oxide semiconductor has, for example, a plurality of crystal grains, and the crystal grains have a directional orientation. In addition, the polycrystalline oxide semiconductor may be analyzed by, for example, an XRD device. When analyzed by the out-of-plane method, a peak at 2θ of approximately 31°, which indicates orientation, was observed. In addition, a polycrystalline oxide semiconductor may have peaks that indicate a plurality of orientations. For example, spots may be observed in an electron diffraction pattern.

[0462] Polycrystalline oxide semiconductors have high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor for a channel region has a high current However, in polycrystalline oxide semiconductors, impurities may segregate at the grain boundaries. In addition, the grain boundaries of polycrystalline oxide semiconductors become defect states. Since the polycrystalline oxide semiconductor can be a carrier generation source and a trap state, The transistor using CAAC-OS for the channel region is In all cases, the electrical characteristics may fluctuate significantly, resulting in a transistor with low reliability.

[0463] The polycrystalline oxide semiconductor is formed by heat treatment at high temperature or laser light treatment. can be done.

[0464] <Microcrystalline oxide semiconductor> In the microcrystalline oxide semiconductor film, crystal parts can be clearly seen in the TEM image. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 nm or less, or 1 nm to 3 nm. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called an oxide semiconductor film. In EM observation images, the grain boundaries may not be clearly visible.

[0465] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analytical method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the device, the crystal plane is analyzed using the out-of-plane method. In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that of the crystalline part. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam (for example, 50 nm or larger) When the diffraction pattern is changed to nc-OS film, a halo-like diffraction pattern is observed. The probe diameter is close to or smaller than the size of the crystal part (for example, 1 nm or more and 30 nm or less). When electron beam diffraction (also called nanobeam electron diffraction) is performed using the electron beam (bottom), Furthermore, when nanobeam electron diffraction is performed on the nc-OS film, a circular pattern is observed. In addition, a bright area (ring-shaped) may be observed for the nc-OS film. When performing nanobeam electron diffraction, multiple spots may be observed within a ring-shaped region. be.

[0466] Figure 31 shows the nanobeam electron diffraction patterns obtained by changing the measurement points on a sample with an nc-OS film. In this example, the sample was cut in a direction perpendicular to the surface on which the nc-OS film was formed. The thickness is reduced to 10 nm or less. The sagittal beam is incident from a direction perpendicular to the cut surface of the sample. When nanobeam electron diffraction is performed on a sample, a diffraction pattern showing the crystal planes is obtained. It was found that no orientation to a specific crystal plane was observed.

[0467] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0468] Therefore, the nc-OS film may have a higher carrier density than the CAAC-OS film. An oxide semiconductor film with high carrier density may have high electron mobility. In some cases, a transistor using an nc-OS film has high field-effect mobility. The nc-OS film has a higher defect density than the CAAC-OS film, which leads to a higher carrier transport. Therefore, the transistor using the nc-OS film is Compared to transistors using OS films, the electrical characteristics fluctuate greatly and the reliability is low. However, the nc-OS film can be formed even if it contains a relatively large amount of impurities. Therefore, it is easier to form than the CAAC-OS film, and it is suitable for some applications. Therefore, a semiconductor having a transistor using an nc-OS film can be The devices may be manufacturable.

[0469] <Method for manufacturing microcrystalline oxide semiconductor film> Next, a method for forming a microcrystalline oxide semiconductor film will be described below. The film is heated in an oxygen-containing atmosphere at a temperature of from room temperature to 75°C, preferably from room temperature to 50°C. The film is formed by sputtering under an oxygen-containing atmosphere. As a result, oxygen vacancies in the microcrystalline oxide semiconductor film are reduced, and the film contains microcrystalline regions. This can be done.

[0470] A microcrystalline oxide semiconductor film has stable physical properties by reducing oxygen vacancies. In particular, when a semiconductor device is manufactured using a microcrystalline oxide semiconductor film, The oxygen vacancies in the microcrystalline oxide semiconductor film act as donors, and carriers are released into the microcrystalline oxide semiconductor film. This generates electrons that are the cause of fluctuations in the electrical characteristics of the semiconductor device. By manufacturing a semiconductor device using a microcrystalline oxide semiconductor film with reduced defects, it is possible to improve reliability. Therefore, a high-quality semiconductor device can be obtained.

[0471] In a microcrystalline oxide semiconductor film, oxygen vacancies occur when the oxygen partial pressure in the film-forming atmosphere is increased. More specifically, the oxygen partial pressure in the film formation atmosphere is preferably 33%. It is preferable that the above is set.

[0472] Note that a target used for forming the microcrystalline oxide semiconductor film by a sputtering method The same target and manufacturing method as those for CAAC-OS can be used.

[0473] In addition, nc-OS can be formed even if it contains a relatively large amount of impurities. It is easier to form than CAAC-OS and can be used preferably in some applications. For example, nc-OS can be formed by a film formation method such as sputtering using an AC power source. The sputtering method using an AC power supply is suitable for forming a film on a large substrate with high uniformity. Therefore, it is possible to develop a semiconductor device having a transistor using nc-OS for the channel region. The device can be manufactured with high productivity.

[0474] <Amorphous oxide semiconductor> An amorphous oxide semiconductor has, for example, a disordered atomic arrangement and does not have a crystalline portion. Amorphous oxide semiconductors have an amorphous state like quartz, and have regular atomic arrangement. Can't see it.

[0475] In the amorphous oxide semiconductor, for example, crystalline parts can be confirmed in the observation image by TEM. There may not be.

[0476] Amorphous oxide semiconductors are analyzed by the out-of-plane method using an XRD device. In addition, when the peak indicating the orientation is not detected, the amorphous oxide semiconductor may not be For example, a halo pattern may be observed in the electron diffraction pattern. For example, in the case of a compound semiconductor, no spots can be observed in the ultrafine electron diffraction pattern. -patterns may be observed.

[0477] Amorphous oxide semiconductors are formed by including impurities such as hydrogen at high concentrations. Therefore, the amorphous oxide semiconductor may be formed by, for example, adding a high amount of impurities. It is an oxide semiconductor containing ZnO at a concentration.

[0478] When an oxide semiconductor contains a high concentration of impurities, defects such as oxygen vacancies occur in the oxide semiconductor. Therefore, an amorphous oxide semiconductor with a high impurity concentration has a high density of defect states. In addition, amorphous oxide semiconductors have low crystallinity, so they are difficult to fabricate as CAAC-OS or nc-OS. The defect level density is higher than that of

[0479] Therefore, the amorphous oxide semiconductor has a higher carrier density than the nc-OS. Therefore, a transistor using an amorphous oxide semiconductor for a channel region may Therefore, normally-on electrical characteristics are required. Amorphous oxide semiconductors can be suitably used for transistors that use amorphous oxide semiconductors. The density of trap states may also be high due to the high density of states. Transistors using conductors in the channel region have been developed using CAAC-OS and nc-OS. Compared to transistors used in the semiconductor industry, these transistors have large fluctuations in electrical characteristics and are less reliable. However, amorphous oxide semiconductors tend to contain a relatively large amount of impurities. It can also be formed by a film forming method, which makes it easy to form and is suitable for some applications. For example, spin coating, sol-gel, immersion, and Plating method, screen printing method, contact printing method, inkjet printing method, roll coating The amorphous oxide semiconductor may be formed by a film formation method such as a spray method or a mist CVD method. Therefore, a semiconductor device having a transistor using an amorphous oxide semiconductor for a channel region It can be produced with high productivity.

[0480] Note that, for example, the density of an oxide semiconductor increases when the number of defects is small. For example, when the crystallinity of hydrogen or the like is high, the density increases. For example, single-crystal oxide semiconductors have a high density when the concentration of impurities such as hydrogen is low. It may be denser than AC-OS. For example, CAAC-OS is a microcrystalline oxide. In addition, for example, polycrystalline oxide semiconductors may have a higher density than microcrystalline oxide semiconductors. In addition, for example, a microcrystalline oxide semiconductor may have a higher density than an amorphous oxide semiconductor. The density may be higher than that of an oxide semiconductor.

[0481] (Embodiment 10) In this embodiment, a human body to which the semiconductor device of one embodiment of the present invention can be applied is The interface will be explained. In particular, the sensor that can detect the proximity or contact of the object to be detected will be explained. A configuration example of the touch sensor will be described below.

[0482] Touch sensors include capacitive, resistive, surface elastic, infrared, and optical. Various methods can be used, such as the method.

[0483] Typical examples of capacitive touch sensors include surface capacitive touch sensors and projected capacitive touch sensors. In addition, as for the projected capacitive type, there are some differences in the driving method, such as There are capacitance type, mutual capacitance type, etc. Here, when using the mutual capacitance type, multiple points can be detected simultaneously. This is preferable because it allows multiple points to be detected (also known as multi-touch).

[0484] Here we will explain the touch sensor in detail, but in addition to this, we will also explain the camera (infrared camera) The movement (gesture) of the detected object (for example, a finger or hand) and the user's gaze are detected by the Sensors that can detect point movements are used as a human interface. It is also possible.

[0485] <Example of sensor detection method> 32(A) and (B) are schematic diagrams showing the configuration of a mutual capacitance type touch sensor and input / output The touch sensor has a pair of electrodes, and a capacitance is formed between them. An input voltage is applied to one of the pair of electrodes. A detection circuit is provided to detect the current (or the potential of the other electrode).

[0486] For example, as shown in Figure 32(A), when a square wave is used as the input voltage waveform, the output voltage A waveform having a sharp peak is detected as a flow waveform.

[0487] As shown in FIG. 32(B), when a conductive object to be detected approaches or comes into contact with the capacitance, In this case, the capacitance between the electrodes decreases, and the output current value decreases accordingly.

[0488] In this way, the change in capacitance can be calculated using the change in output current (or potential) relative to the input voltage. By detecting it, it is possible to detect the proximity or contact of the object to be detected.

[0489] <Touch sensor configuration example> FIG. 32(C) shows a configuration example of a touch sensor having a plurality of capacitors arranged in a matrix. Shows.

[0490] The touch sensor has multiple wirings extending in the X direction (horizontal direction on the paper) and The wiring has a plurality of wirings that intersect and extend in the Y direction (vertical direction on the paper). A capacitance is formed in

[0491] In addition, the wiring extending in the X direction carries the input voltage or common potential (including the ground potential and reference potential). In addition, a detection circuit (for example, , source meter, sense amplifier, etc.) are electrically connected, and the current (or is the potential).

[0492] The touch sensor is designed so that the input voltage is input in order to multiple wires extending in the X direction. By scanning in the Y direction and detecting changes in the current (or potential) flowing through the wiring extending in the Y direction, This enables two-dimensional sensing of the object to be detected.

[0493] <Touch panel configuration example> Below, a configuration example of a touch panel including a display unit having a plurality of pixels and a touch sensor will be described. An example in which the touch panel is incorporated into an electronic device will be described.

[0494] FIG. 33(A) is a schematic cross-sectional view of an electronic device equipped with a touch panel.

[0495] The electronic device 3530 includes a housing 3531 and at least a touch panel 3532 disposed in the housing 3531. 532, a battery 3533, and a control unit 3534. The touch panel 3532 is The display unit 3534 is electrically connected to the control unit 3534 via wiring 3535. The display of images on the screen and the sensing operation of the touch sensor are controlled. 3 is electrically connected to the control unit 3534 via wiring 3536 and supplies power to the control unit 3534. can be supplied.

[0496] The touch panel 3532 is provided so that its display surface is exposed outside the housing 3531. An image is displayed on the exposed surface of the touch panel 3532, and a It is possible to detect a detectable object.

[0497] 33(B) to 33(E) show examples of the configuration of a touch panel.

[0498] The touch panel 3532 shown in FIG. 33(B) is made up of a first substrate 3541 and a second substrate 354 3, a display panel 3540 having a display unit 3542 and a touch sensor 3544. It includes a third substrate 3545 and a protection substrate 3546 .

[0499] The display panel 3540 may be a liquid crystal element, an organic EL (Electro Luminescence) It can be used in a variety of display devices, such as display devices using a Cence element and electronic paper. The touch panel 3532 may be configured with a backlight or polarizer depending on the configuration of the display panel 3540. A light plate or the like may be provided separately.

[0500] Since the object to be detected comes into contact with or is close to one surface of the protective substrate 3546, at least that surface It is preferable that the surface has high mechanical strength. For example, it is possible to use an ion exchange method or an air cooling method. The glass is physically or chemically treated to apply compressive stress to its surface. It can be used as a protective substrate 3546. Or, the surface is coated with plastic. A flexible substrate such as a glass substrate can also be used. A film may also be provided.

[0501] The touch sensor 3544 is provided on at least one surface of the third substrate 3545. Alternatively, a pair of electrodes constituting the touch sensor 3544 is formed on both sides of the third substrate 3545. In addition, in order to make the touch panel thinner, a flexible film may be used as the third substrate 3545. The touch sensor 3544 may be formed on a pair of substrates (including a film). A clamped configuration may also be used.

[0502] In FIG. 33(B), a protection substrate 3546 and a third substrate having a touch sensor 3544 are Although the structure shown is bonded by adhesive layer 3547, these are not necessarily bonded. In addition, the third substrate 3545 and the display panel 3540 may be bonded together by an adhesive layer. This may also be configured as follows.

[0503] The touch panel 3532 shown in FIG. 33(B) is a substrate having a display panel and a touch sensor. The touch panel having such a configuration is called an external touch panel. This configuration allows the display panel and touch sensor to be By stacking these together, the display panel is given the function of a touch sensor. This allows touch panels to be easily manufactured without any special manufacturing process. It can be manufactured.

[0504] The touch panel 3532 shown in FIG. 33(C) has a touch sensor 3544 mounted on the second substrate 35 The touch panel having such a configuration is provided on the surface of the protection substrate 3546 of the touch panel 43. This can also be called an on-cell touch panel. Since the number of sheets can be reduced, the touch panel can be made thinner and lighter.

[0505] The touch panel 3532 shown in FIG. 33(D) has a touch sensor 3544 mounted on a protection substrate 354. 6. By adopting such a configuration, the display panel and the touch panel Since the sensors can be made separately, touch panels can be easily made. Furthermore, the number of required substrates can be reduced, making the touch panel thinner and lighter. This can be achieved.

[0506] The touch panel 3532 shown in FIG. 33(E) has a touch sensor 3544. The touch panel having such a configuration is provided on the inner side of the pair of substrates 40. This can also be called a cell-type touch panel. By using this type of configuration, the number of substrates required is reduced. This reduces the amount of light and thin the touch panel. The panel is configured as a first substrate by, for example, transistors, wirings, electrodes, and the like provided in the display portion 3542. A circuit that functions as a touch sensor is fabricated on the board 3541 or the second board 3543. In addition, when an optical touch sensor is used, a photoelectric conversion element is It may also be configured to include:

[0507] <Configuration example of an in-cell touch panel> The following describes the configuration of a touch panel in which a touch sensor is incorporated into a display unit having multiple pixels. Here, a liquid crystal element is used as a display element provided in a pixel. Here is an example.

[0508] FIG. 34(A) shows one of the pixel circuits provided in the display unit of the touch panel exemplified in this configuration example. FIG. 1 is an equivalent circuit diagram of a portion.

[0509] One pixel has at least a transistor 3503 and a liquid crystal element 3504. A wiring 3501 is connected to the gate of the transistor 3503, and a wiring 3502 is connected to either the source or the drain. 02 are electrically connected to each other.

[0510] The pixel circuit includes a plurality of wirings (for example, wiring 3510_1, wiring 3510_2, wiring 3510_3, wiring 3510_4, wiring 3510_5, wiring 3510_6, wiring 3510_7, wiring 3510_8, wiring 3510_9, wiring 3510_10, wiring 3510_11, wiring 3510_12, wiring 3 _2) and a plurality of wirings (for example, wiring 3511) extending in the Y direction, which are mutually The electrodes are arranged to intersect with each other, and a capacitance is formed therebetween.

[0511] In addition, among the pixels provided in the pixel circuit, some adjacent pixels are The electrodes of the liquid crystal elements are electrically connected to each other to form one block. The lock is divided into island blocks (e.g., block 3515_1, block 3515_2) and , linear blocks extending in the Y direction (for example, block 3516) Although FIG. 34 shows only a part of the pixel circuit, these two types of The blocks are repeatedly arranged in the X and Y directions.

[0512] The wiring 3510_1 (or 3510_2) extending in the X direction is connected to the island-shaped block 351 5_1 (or block 3515_2). The wiring 3510_1 extending in the X direction is discontinuous along the X direction via a line-shaped block. The plurality of island-shaped blocks 3515_1 arranged in the Y direction are electrically connected. The existing wiring 3511 is electrically connected to the linear block 3516 .

[0513] FIG. 34(B) shows a plurality of wirings 3510 extending in the X direction and a plurality of wirings 3510 extending in the Y direction. 3 is an equivalent circuit diagram showing the connection configuration of the wiring 3511. An input voltage or a common potential can be input to the wiring 3 extending in the Y direction. A ground potential is input to each of the wirings 3511, or the wiring 3511 is electrically connected to the detection circuit. It is possible.

[0514] <Example of touch panel operation> Hereinafter, the operation of the above-mentioned touch panel will be described with reference to FIG.

[0515] As shown in FIG. 35(A), one frame period is divided into a writing period and a sensing period. The write period is a period during which image data is written to the pixels, and the wiring 3510 (gate line On the other hand, during the detection period, the touch sensor performs sensing. During this period, the wirings 3510 extending in the X direction are selected in sequence and an input voltage is input.

[0516] 35B is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 3510 extending in the Y direction and the wiring 3511 extending in the Y direction. can be.

[0517] FIG. 35(C) is an equivalent circuit diagram at a certain point in the detection period. Each of the wirings 3511 extending in the X direction is electrically connected to a detection circuit. Of the wirings 3510, the input voltage is input to the selected one, and the other A common potential is input.

[0518] In this way, the image writing period and the period for sensing by the touch sensor can be separated. This prevents touch noise caused by pixel writing noise. The decrease in sensitivity of the sensor can be suppressed.

[0519] (Embodiment 11) In this embodiment mode, a driving method for reducing power consumption of a display device will be described. By the driving method of this embodiment, a display device in which an oxide semiconductor transistor is used in a pixel can be Further reduction in power consumption can be achieved. An example of reducing power consumption in a liquid crystal display device will now be described.

[0520] FIG. 36 is a block diagram showing an example of the configuration of a liquid crystal display device according to this embodiment. As shown, the liquid crystal display device 500 has a liquid crystal panel 501 as a display module, and , a control circuit 510 and a counter circuit.

[0521] The liquid crystal display device 500 receives an image signal (Video) which is digital data, and a liquid crystal panel. A synchronization signal (SYNC) is input to control the rewriting of the screen of the panel 501. The signals include, for example, a horizontal synchronization signal (Hsync), a vertical synchronization signal (Vsync), and There is a reference clock signal (CLK), etc.

[0522] The liquid crystal panel 501 includes a display unit 530, a scanning line driving circuit 540, and a data line driving circuit 550. The display unit 530 has a plurality of pixels 531. The pixels 531 in the same row are shared. The pixels 531 in the same column are connected to a scanning line driving circuit 540 by a common scanning line 541. The data line 551 connects to a data line driving circuit 550 .

[0523] The liquid crystal panel 501 is supplied with a common voltage (Vcom) and a high power supply voltage ( The common voltage (Vcom) is supplied to the display unit 5. 30 pixels 531.

[0524] The data line driving circuit 550 processes the input image signal, generates a data signal, and The scanning line driving circuit 540 outputs a data signal to the data line 551. A scanning signal for selecting the pixel 531 to be scanned is output to the scanning line 541 .

[0525] The pixel 531 is a switch whose electrical connection with the data line 551 is controlled by a scanning signal. When the switching element is turned on, a signal is sent from the data line 551 to the pixel 531. The data signal is written.

[0526] The electrode to which Vcom is applied corresponds to the common electrode.

[0527] The control circuit 510 is a circuit that controls the entire liquid crystal display device 500. It is equipped with a circuit that generates control signals for the circuits that configure 0.

[0528] The control circuit 510 controls the scanning line driving circuit 540 and the data line driving circuit 540 in response to the synchronization signal (SYNC). The scanning line driving circuit 540 has a control signal generating circuit that generates a control signal for the scanning line driving circuit 550. Control signals include a start pulse (GSP) and a clock signal (GCLK), As control signals for the data line driving circuit 550, a start pulse (SSP), a clock signal (SC For example, the control circuit 510 generates clock signals (GCLK, SCLK) and This generates multiple clock signals with the same period but shifted phases.

[0529] The control circuit 510 also receives an image signal (Vide o) controls the output to the data line driving circuit 550.

[0530] The data line driving circuit 550 is a digital / analog conversion circuit (hereinafter referred to as a DA conversion circuit 55 The DA conversion circuit 552 converts the image signal into an analog signal, and outputs a data signal. Generate a number.

[0531] If the image signal input to the liquid crystal display device 500 is an analog signal, the control circuit The signal is converted into a digital signal by a line 510 and output to a liquid crystal panel 501 .

[0532] The image signal is made up of image data for each frame. The control circuit 510 processes the image signal. Based on the information obtained by this processing, the output of the image signal to the data line driving circuit 550 is controlled. Therefore, the control circuit 510 detects motion from image data for each frame. When the motion detection unit 511 determines that there is no motion, The control circuit 510 stops outputting the image signal to the data line driving circuit 550, and the movement is enabled. If it is determined that the image signal has been output, the output of the image signal is resumed.

[0533] There are no particular restrictions on the image processing for motion detection performed by the motion detection unit 511. For example, a motion detection method may involve extracting differential data from image data between two consecutive frames. There is a method to obtain the difference data. The difference data obtained can be used to determine whether there is movement. There are also methods for detecting motion vectors.

[0534] The liquid crystal display device 500 also includes an image signal correction circuit that corrects the input image signal. For example, a voltage higher than the voltage corresponding to the gray level of the image signal can be applied to the pixel 531. The image signal is corrected so that it can be written. By performing such correction, the response of the liquid crystal element is In this way, the image signal is corrected and processed to drive the control circuit 510. The method of reducing the frame frequency of the image signal is called overdrive driving. When performing double speed driving, which drives the liquid crystal display device 500 at an integer multiple, the control circuit 510 Create image data that interpolates between frames, or display black between two frames It is sufficient to generate image data for this purpose.

[0535] Below, using the timing chart shown in FIG. 37, we will explain how to deal with moving images such as moving pictures, The operation of the liquid crystal display device 500 for displaying a motionless image such as a still image will be described. FIG. 37 shows a vertical synchronization signal (Vsync) and a data line drive circuit 550 driving the data line 5 51 shows the signal waveform of the data signal (Vdata) output.

[0536] FIG. 37 is a timing chart of the liquid crystal display device 500 during a 3m frame period. So, there is motion in the image data for the first k frame period and the last j frame period. , and there is no movement in the image data during other frame periods. Note that k and j are 1 An integer greater than or equal to m-2 inclusive.

[0537] During the first k frame period, the motion detector 511 detects motion in the image data of each frame. The control circuit 510 determines that there is a motion error based on the result of the determination by the motion detection unit 511. A data signal (Vdata) is output to the data line 551 .

[0538] Then, the motion detection unit 511 performs image processing for motion detection, and the k+1th frame If it is determined that there is no motion in the image data, the control circuit 510 determines that the motion detector 511 Based on the result, in the k+1-th frame period, the image signal (Vid Therefore, the data line driving circuit 550 stops outputting the data to the data line 551. Furthermore, the output of the data signal (Vdata) is stopped. Therefore, a control signal (start pulse signal) to the scanning line driving circuit 540 and the data line driving circuit 550 is Then, the control circuit 510 stops the supply of the signals (signals, clock signals, etc.) to the motion detection unit 51. 1, the data line driving circuit 550 is turned on until a determination result that there is motion in the image data is obtained. output of image signals, output of control signals to the scanning line driving circuit 540 and the data line driving circuit 550 The power is stopped, and rewriting of the display unit 530 is stopped.

[0539] In this specification, "not supplying" a signal to the liquid crystal panel means that the signal is not supplied. Applying a voltage different from the predetermined voltage for operating the circuit to the wiring, or This refers to putting wiring into an electrically floating state.

[0540] When rewriting of the display unit 530 is stopped, the electric field continues to be applied to the liquid crystal element in the same direction. This may cause deterioration of the liquid crystal in the liquid crystal element. Regardless of the result of the motion detection unit 511, the control circuit 510 outputs a scan signal at a predetermined timing. A signal is supplied to the line driving circuit 540 and the data line driving circuit 550, and a data signal with the polarity inverted is output. A signal is written to the data line 551 to reverse the direction of the electric field applied to the liquid crystal element. .

[0541] The polarity of the data signal input to the data line 551 is determined based on Vcom. The polarity is positive when the data signal voltage is higher than Vcom, and negative when it is lower. The polarity is

[0542] Specifically, as shown in FIG. 37, in the (m+1)th frame period, the control circuit 510 , outputting control signals to the scanning line driving circuit 540 and the data line driving circuit 550, The data line driving circuit 550 outputs the image signal Video to the data line driving circuit 550. The polarity of the data signal (Vdata) output to the data line 551 is inverted during this period. The data signal (Vdata) is output to the data line 551. In the (m+1)th frame period and the (2m+1)th frame period, in which the polarity The inverted data signal (Vdata) is written to the data line 551. During the period when there is no change, the display unit 530 is rewritten intermittently, so that the power consumption due to the rewriting is This makes it possible to reduce costs and prevent deterioration of the liquid crystal element.

[0543] Then, the motion detection unit 511 detects whether there is any motion in the image data of the (2m+1)th frame and thereafter. When it is determined that the scanning line driving circuit 540 and the data line driving circuit 550 and rewrites the display unit 530.

[0544] As described above, according to the driving method of FIG. 37, the effectiveness of the movement of the image data (Video) is Regardless of whether or not the data signal (Vdata) is inverted in polarity every m frame periods. On the other hand, the display unit 530 is rewritten every frame during the display period of an image including a movement. The display unit 530 is rewritten, and the display period of the static image is changed every m frames. As a result, the power consumption associated with rewriting the display can be reduced. Therefore, it is possible to suppress the increase in power consumption due to an increase in the driving frequency and the number of pixels. Cut.

[0545] As described above, the liquid crystal display device 500 has a mode for displaying moving images and a mode for displaying still images. By changing the driving method of the LCD display device in each mode, deterioration of the LCD can be suppressed and the display quality can be improved. It is therefore possible to provide a power-saving liquid crystal display device while maintaining a high level.

[0546] Also, when displaying a still image, if the pixels are rewritten for each frame, the human eye will not be able to see the rewriting of the pixels. The image may be perceived as flickering, which can cause eye fatigue. The display device is effective in reducing eye fatigue because pixels are rewritten less frequently during the display period of a still image. is.

[0547] Therefore, it is possible to use a liquid crystal panel in which a backplane is formed using oxide semiconductor transistors. This provides a high-definition, low-power, small- to medium-sized LCD display device that is highly suitable for portable electronic devices. It is possible to do this.

[0548] To prevent deterioration of the liquid crystal, the interval between polarity inversions of the data signal (here, m frame periods) The time between the start and end of the pulse should be 2 seconds or less, and preferably 1 second or less.

[0549] In addition, the motion detection of the image data was performed by the motion detection unit 511 of the control circuit 510. The data on the presence or absence of motion does not need to be output only by the motion detection unit 511. Alternatively, the signal may be input to the control circuit 510 from outside.

[0550] The condition for determining that there is no movement in the image data is the image data between two consecutive frames. The number of frames required for the determination does not depend on the data, but on the usage pattern of the liquid crystal display device 500. For example, if there is no motion in the image data of successive m frames, In this case, rewriting of the display unit 530 may be stopped.

[0551] In the present embodiment, a liquid crystal display device is used as the display device. The driving method of this form can be used for other display devices, for example, light-emitting display devices.

[0552] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0553] (Embodiment 12) A semiconductor device which is one embodiment of the present invention can be applied to various electronic devices (including game machines). The electronic equipment includes a television set (television or television receiver) (also called receivers), computer monitors, digital cameras, digital video cameras digital photo frames, mobile phones, portable game consoles, personal digital assistants, sound reproduction equipment These electronic devices include gaming machines (pachinko machines, slot machines, etc.) and game cabinets. An example of the device is shown in Figure 38.

[0554] FIG. 38(A) shows a table 9000 having a display section. A display unit 9003 is built into the housing 9001, and images are displayed on the display unit 9003. It is possible to support the housing 9001 with four legs 9002. The housing 9001 also has a power cord 9005 for supplying power.

[0555] The semiconductor device described in any of the above embodiments can be used for the display portion 9003. Therefore, the display quality of the display portion 9003 can be improved.

[0556] The display unit 9003 has a touch input function. By touching the display button 9004 displayed on the screen with a finger or the like, the screen can be operated or information can be input. It also allows communication with other home appliances or allows control of them. It may also be used as a control device to control other home appliances by operating the screen. If a semiconductor device having a touch sensor function is used, the display portion 9003 can have a touch input function. It is possible.

[0557] In addition, the screen of the display unit 9003 can be tilted relative to the floor by a hinge provided in the housing 9001. It can also be placed vertically and used as a television set. When a large screen television is installed, the free space becomes narrow, but the table If the display unit is built into the device, the space in the room can be used more effectively.

[0558] FIG. 38(B) shows a television device 9100. Television device 9100 The display unit 9103 is incorporated in the housing 9101, and the display unit 9103 displays images. In this example, the housing 9101 is supported by a stand 9105. The figure shows the configuration.

[0559] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by using the remote control operation device 9110. The channel and volume can be controlled by the -9109, and the information displayed on the display 9103 In addition, the remote control unit 9110 can be used to control the video. A display unit 9107 for displaying information output from the device 9110 may be provided.

[0560] A television device 9100 shown in FIG. 38(B) includes a receiver, a modem, and the like. The television device 9100 can receive general television broadcasts using a receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, It can be directional (from sender to receiver) or bidirectional (between sender and receiver, or between receivers, etc.) ) information communication is also possible.

[0561] The semiconductor device described in any of the above embodiments can be used for the display portions 9103 and 9107. Therefore, the display quality of the television device can be improved.

[0562] FIG. 38C shows a computer 9200, which includes a main body 9201, a housing 9202, a display unit 9203, and a display section 9204. 203, keyboard 9204, external connection port 9205, pointing device 920 6 and more.

[0563] The semiconductor device described in any of the above embodiments can be used for the display portion 9203. Therefore, the display quality of the computer 9200 can be improved.

[0564] The display unit 9203 has a touch input function. Touch the display buttons on the screen with your finger to operate the screen or input information. It also allows communication with other home appliances or allows control, It may also be a control device that controls other home appliances by operation.

[0565] Figures 39(A) and 39(B) show a foldable tablet terminal. ) is in an open state, and the tablet terminal includes a housing 9630, a display unit 9631a, a display part 9631b, a display mode changeover switch 9034, a power switch 9035, a power saving mode It has a mode changeover switch 9036, a fastener 9033, and an operation switch 9038.

[0566] The semiconductor device described in any of the above embodiments includes a display portion 9631a and a display portion 9631b. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0567] A part of the display portion 9631a can be used as a touch panel area 9632a. By touching the operation keys 9638, data can be input. In 31a, for example, half of the area has a display function only, and the other half Although the display area 96 has a touch panel function, the display area 96 is not limited to this configuration. The entire area of ​​the display unit 9 may have a touch panel function. The entire surface of 631a is displayed as a keyboard button to serve as a touch panel, and the display part 9631b is displayed. It can be used as a display screen.

[0568] In addition, in the display unit 9631b, as in the display unit 9631a, The area can be used as a touch panel area 9632b. Touch the area where the display switch button 9639 is displayed with your finger or a stylus. This allows keyboard buttons to be displayed on the display portion 9631b.

[0569] In addition, the touch panel area 9632a and the touch panel area 9632b are simultaneously You can also use touch input.

[0570] A display mode changeover switch 9034 is used to change the display orientation, such as portrait or landscape. You can switch between black and white and color display. The switch 9036 is an external switch that is detected by a light sensor built into the tablet terminal. The display brightness can be optimized according to the amount of light. In addition to sensors, other detection devices such as gyros and acceleration sensors that detect tilt are also available. may be incorporated.

[0571] FIG. 39(A) shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The display quality may also differ. For example, one display panel may be able to display a higher resolution image than the other. It may also be used as a rule.

[0572] FIG. 39(B) shows the tablet terminal in a closed state, and the tablet terminal includes a housing 9630 and a solar cell 9631. 39B, the charge / discharge control circuit 96 As an example of 34, a configuration having a battery 9635 and a DC-DC converter 9636 is shown. This shows that.

[0573] In addition, since the tablet device can be folded in half, when not in use, the case 9630 is closed. Therefore, the display portions 9631a and 9631b can be protected. This makes it possible to provide a tablet device that is highly durable and reliable even for long-term use.

[0574] In addition, the tablet terminals shown in Figures 39(A) and 39(B) can be used in various Functions that display information (still images, videos, text images, etc.), calendars, dates, or times The function to display the information on the display, and the function to touch input or edit the information displayed on the display. It has touch input function, function to control processing by various software (programs), etc. It is possible.

[0575] The solar cell 9633 attached to the surface of the tablet terminal supplies power to the touch panel. The solar cell 9633 can be supplied to a display unit, a video signal processor, or the like. , which can be provided on one or both sides of the housing 9630, and can efficiently charge the battery 9635. The battery 9635 is preferably a rechargeable battery. The use of a lithium ion battery has the advantage of enabling miniaturization.

[0576] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 39(B) will be described with reference to FIG. A block diagram is shown in Fig. 39(C) and will be explained. 635, DC-DC converter 9636, converter 9637, switches SW1 to SW3 , the display unit 9631, the battery 9635, the DC-DC converter 963 6. The converter 9637 and the switches SW1 to SW3 are configured to perform the charge / discharge control shown in FIG. 39(B). This corresponds to the circuit 9634.

[0577] First, an example of operation when power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell is converted into a voltage to charge the battery 9635. The CDC converter 9636 steps up or steps down the voltage. When power is supplied from the solar cell 9633, switch SW1 is turned on and the converter The voltage is increased or decreased by a voltage converter 9637 to the voltage required for the display unit 9631. When no display is to be made on the display unit 9631, the switch SW1 is turned off and the switch SW2 is turned on. It can be configured to be turned on and charge the battery 9635.

[0578] The solar cell 9633 is shown as an example of a power generating means, but is not particularly limited thereto. , by other power generation means such as piezoelectric elements and thermoelectric conversion elements (Peltier elements) For example, the battery 9635 may be configured to be charged wirelessly (contactlessly). It can be combined with a non-contact power transmission module that transmits and receives power and charges, or with other charging methods. This may also be configured as follows.

[0579] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used. [Example]

[0580] In this example, the Vg-Id characteristics of the transistor and the measurement results of the optical BT stress test were We will explain about this.

[0581] First, a manufacturing process of a transistor included in Sample 1 will be described. This will be explained with reference to FIG.

[0582] First, as shown in FIG. 2(A), a glass substrate is used as the substrate 11, and a gate electrode is formed on the substrate 11. A cathode electrode 15 was formed.

[0583] A tungsten film with a thickness of 100 nm was formed by sputtering, and then photolithography was performed. A mask is formed on the tungsten film by the process, and a part of the tungsten film is removed using the mask. The portion was etched to form a gate electrode 15.

[0584] Next, a gate insulating film 17 (corresponding to GI in FIG. 40) was formed on the gate electrode 15.

[0585] The gate insulating film 17 is made of a first silicon nitride film having a thickness of 50 nm and an oxide film having a thickness of 200 nm. The silicon nitride film was formed by laminating silicon nitride films.

[0586] The silicon nitride film was formed using silane at a flow rate of 50 sccm and nitrogen at a flow rate of 5000 sccm as raw materials. The gas is supplied to the processing chamber of the plasma CVD device, and the pressure in the processing chamber is controlled to 60 Pa. The formation was carried out by supplying a power of 150 W using a 27.12 MHz high frequency power source.

[0587] Next, silane at a flow rate of 20 sccm and dinitrogen monoxide at a flow rate of 3000 sccm were used as the source gas. The pressure in the processing chamber was controlled to 40 Pa and 27. A silicon oxynitride film is formed by supplying 100 W of power using a 12 MHz high frequency power supply. did.

[0588] In the film formation process of the silicon nitride film and the silicon oxynitride film, the substrate temperature was set to 350 The temperature was set to °C.

[0589] Next, an oxide semiconductor film 18 is formed so as to overlap the gate electrode 15 via the gate insulating film 17. Ta.

[0590] Here, an oxide semiconductor film having a thickness of 35 nm is formed on the gate insulating film 17 by sputtering. Next, a mask was formed over the oxide semiconductor film by a photolithography process. A part of the oxide semiconductor film is etched using a mask to form the oxide semiconductor film 18 (S in FIG. 40). (equivalent to 1) was formed.

[0591] The oxide semiconductor film (S1) was formed by sputtering a target of In:Ga:Zn=1:1: The target was argon with a flow rate of 100 sccm and m of oxygen is supplied as a sputtering gas into the processing chamber of the sputtering device, and The pressure was controlled to 0.6 Pa, and a direct current of 5 kW was supplied. The substrate temperature was set to 170° C. when the solid film was formed.

[0592] The structure obtained through the steps up to this point can be seen in FIG. 2(B).

[0593] Next, a part of the gate insulating film 17 is etched to expose the gate electrode (not shown). 2(C), a pair of electrodes 21 and 22 are formed in contact with the oxide semiconductor film 18. Successful.

[0594] Here, a conductive film was formed over the gate insulating film 17 and the oxide semiconductor film 18. As a result, an aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm, A titanium film having a thickness of 100 nm was formed on the aluminum film. A mask is formed on the conductive film by a process, and a part of the conductive film is wet-etched using the mask. A pair of electrodes 21 and 22 was formed by etching.

[0595] Next, the substrate is moved to a depressurized processing chamber, heated at 350°C, and then placed in the processing chamber. A high-frequency power of 150 W was supplied to the upper electrode using a 27.12 MHz high-frequency power supply. The oxide semiconductor film 18 was exposed to oxygen plasma generated in a dinitrogen oxide atmosphere.

[0596] Next, a protective film 26 was formed on the oxide semiconductor film 18 and the pair of electrodes 21 and 22 (FIG. 2 (D)). Here, the oxide insulating film 23 (corresponding to P1 in FIG. 40) is used as the protective film 26. Then, an oxide insulating film 24 (corresponding to P2 in FIG. 40) was formed.

[0597] First, after the plasma treatment, the oxide insulating film 23 and the oxide film 24 are successively removed without being exposed to the atmosphere. The oxide insulating film 24 was formed on the silicon oxynitride film 23. Then, a silicon oxynitride film with a thickness of 390 nm was formed as the oxide insulating film 24.

[0598] The oxide insulating film 23 is formed by silane at a flow rate of 20 sccm and dioxide at a flow rate of 3000 sccm. Nitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the power was 100 W. The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0599] The oxide insulating film 24 is formed by silane at a flow rate of 160 sccm and monoxide at a flow rate of 4000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by the plasma CVD method in which a high frequency power of 1000 W was supplied to parallel plate electrodes. As a result, the material contains more oxygen than the stoichiometric composition, and some of the oxygen is removed by heating. A silicon oxynitride film can be formed to separate the silicon oxynitride film from the silicon nitride film.

[0600] Next, heat treatment is performed to remove water, nitrogen, hydrogen, and the like from the oxide insulating films 23 and 24. and supplying part of oxygen contained in the oxide insulating film 24 to the oxide semiconductor film 18. Here, the heat treatment was carried out in a nitrogen and oxygen atmosphere at 350°C for 1 hour.

[0601] Next, although not shown, a part of the protective film 26 is etched to expose one of the pair of electrodes 21 and 22. An opening was formed to expose the portion.

[0602] Next, a planarizing film (not shown) was formed on the protective film 26. After being applied onto 26, exposure and development are performed to form a film having openings that expose portions of the pair of electrodes. A planarization film was formed using an acrylic resin having a thickness of 1.5 μm. After that, a heat treatment was carried out. The heat treatment was carried out at a temperature of 250°C in a nitrogen-containing atmosphere. I went there for an hour.

[0603] Next, a conductive film (not shown) was formed to connect to a part of the pair of electrodes. ITO containing silicon oxide was formed to a thickness of 100 nm by the quartz deposition method. Heat treatment was carried out in a nitrogen atmosphere at 250°C for 1 hour.

[0604] Through the above steps, Sample 1 having a transistor was manufactured.

[0605] In the transistor of Sample 1, the gate insulating film 17 is a first insulating film having a thickness of 50 nm. a silicon nitride film of 100 nm thick, a second silicon nitride film of 300 nm thick, and a third silicon nitride film of 50 nm thick. The silicon film and the silicon oxynitride film having a thickness of 50 nm were stacked. Instead of the semiconductor film 18, a 35 nm thick oxide semiconductor film (corresponding to S1 in FIG. 40) and a A multilayer film was formed by laminating an oxide film (corresponding to S2 in Figure 40) with a thickness of 10 nm. After forming the pair of electrodes, the surface of the multilayer film was immersed in a phosphoric acid solution diluted 100 times with 85% phosphoric acid. The surface was then cleaned. In addition, a 10 nm thick oxide insulating film 23 and a 10 nm thick The oxide insulating film 24 is 400 nm thick, and the nitride film is formed of a silicon nitride film 100 nm thick. The sample with such a structure was tested. The fee will be 2.

[0606] In the sample 2, the first silicon nitride film to the third silicon nitride film constituting the gate insulating film 17 The conditions for forming the silicon film are as follows:

[0607] The first silicon nitride film was formed using a mixture of silane at a flow rate of 200 sccm and nitrogen at a flow rate of 2000 sccm. and ammonia at a flow rate of 100 sccm was used as the source gas in the processing chamber of the plasma CVD equipment. The pressure in the processing chamber was controlled to 100 Pa, and a high frequency power supply of 27.12 MHz was used. It was formed by supplying 2000W of power.

[0608] Next, under the conditions of the source gas for the first silicon nitride film, the flow rate of ammonia was set to 2000 The gas flow rate was changed to sccm to form a second silicon nitride film.

[0609] Next, silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm were used as source gases. The pressure in the processing chamber was controlled to 100 Pa. A third silicon nitride film was formed by supplying 2000 W of power using a 2 MHz high frequency power supply. Successful.

[0610] In Sample 2, the film formation conditions for the oxide film (S2) in contact with the oxide semiconductor film 18 are as follows: The oxide film (S2) was formed by sputtering a target of In:Ga:Zn=1:3:2 ( The sputtering gas was 180 sccm Ar and 20 s ccm of oxygen was supplied into the processing chamber of the sputtering equipment, and the pressure in the processing chamber was set to 0.6 Pa. The oxide film was formed by controlling the substrate temperature and supplying 5 kW of DC power. The temperature was set to 170°C.

[0611] In Sample 2, the film formation conditions for the nitride insulating film 25 (corresponding to P3 in FIG. 40) are as follows. The nitride insulating film 25 is formed by mixing silane at a flow rate of 50 sccm, nitrogen at a flow rate of 5000 sccm, and Ammonia was used as the source gas at a rate of 100 sccm, the pressure in the processing chamber was 100 Pa, and the substrate temperature was The temperature was set to 350°C and a high frequency power of 1000 W was supplied to parallel plate electrodes by the plasma CVD method. It was formed.

[0612] In addition, in the transistor of Sample 1, the gate insulating film 17 has the same structure as Sample 2. After the oxide semiconductor film 18 was formed, it was subjected to heat treatment at 450° C. In addition, similar to sample 2, after forming a pair of electrodes, 85% phosphoric acid was diluted 100 times. The surface of the oxide semiconductor film 18 was washed with a phosphoric acid solution diluted to 100%. The thickness of the insulating film 23 was set to 50 nm. The film formation temperature was set to 220° C. As the protective film, the same as Sample 2, The oxide insulating film 23, the oxide insulating film 24, and the nitride insulating film 25 (corresponding to P3 in FIG. 40) were stacked and formed. A sample having such a structure is used as Comparative Sample 1.

[0613] Also, in Comparative Sample 1, a sample in which the heat treatment temperature after forming the oxide semiconductor film 18 is 350 °C is used as Comparative Sample 2.

[0614] Also, in Comparative Sample 1, instead of the oxide semiconductor film 18, a sample provided with a multilayer film of the oxide semiconductor film 18 and the oxide film is used as Comparative Sample 3 using the same structure and conditions as in Sample 2.

[0615] Note that the transistors included in each sample have a channel length (L) of 6 μm and a channel width (W ) of 50 μm.

[0616] <Vg-Id Characteristics> Next, the Vg-Id characteristics were measured as the initial characteristics of the transistors included in Sample 1 and Sample 2, and Comparative Sample 1 and Comparative Sample 2. Here, the substrate temperature was set to 25 °C, the potential difference between the source and drain (hereinafter referred to as drain voltage) was set to 1 V and 10 V, and the potential difference between the source-gate electrodes (hereinafter referred to as gate voltage) was changed from -15 V to +15 V, and the change characteristics of the current flowing between the source and drain (hereinafter referred to as drain current), that is, the Vg-Id characteristics were measured.

[0617] FIG. 40 shows the Vg-Id characteristics of the transistors included in each sample. In each graph shown in FIG. 40, the horizontal axis represents the gate voltage Vg, the vertical axis represents the drain current Id, and the right vertical axis represents the field effect mobility. Note that the horizontal axis is shown from -15 V to 15 V. Also, the solid line ​​​​The dashed lines show the Vg-Id characteristics when the drain voltage Vd is 1V and 10V, respectively. The field effect mobility is shown as a function of gate voltage when the drain voltage Vd is set to 10 V. The field-effect mobility is the result in the saturation region of each sample.

[0618] In addition, for each sample, 20 transistors with the same structure were fabricated within the substrate.

[0619] From FIG. 40, it can be seen that in Sample 1, Sample 2, and Comparative Sample 1 and Comparative Sample 2, It is clear that good switching characteristics are obtained.

[0620] Next, the BT stress test and light test of Sample 1 and Sample 2, and Comparative Sample 1 and Comparative Sample 2 were performed. A BT stress test was conducted. The BT stress test is a type of accelerated test, and is designed to withstand long-term use. This allows for the rapid evaluation of changes in transistor characteristics (i.e., changes over time). It is important to check the amount of change in transistor characteristics before and after the BT stress test. This is an important indicator for investigating the following.

[0621] <Gate BT stress test and optical gate BT stress test> First, gate BT stress tests and optical gate BT stress tests were performed.

[0622] Here, the measurement method of the gate BT stress test will be explained. The Vg-Id characteristics of the transistor in its initial state are measured.

[0623] Next, the substrate temperature is kept constant at an arbitrary temperature (hereinafter referred to as the stress temperature). A pair of electrodes that function as the source and drain of the transistor are set to the same potential, and the source and drain electrodes are A potential different from that of the pair of electrodes that function as drain electrodes is applied to the gate electrode for a certain period of time (hereinafter referred to as the drain electrode). Next, the substrate temperature is set appropriately, and the electrical characteristics of the transistor are measured. As a result, the threshold voltage and the signal strength in the electrical characteristics before and after the gate BT stress test were measured. The difference between the soft values ​​can be obtained as the amount of fluctuation.

[0624] The stress test in which a negative voltage is applied to the gate electrode is called the negative gate BT stress test. A stress test in which a positive voltage is applied is called a Dark GBT. This is called a stress test (Dark +GBT). The stress test in which pressure is applied is called the photo-negative gate BT stress test (Photo-GBT ), and the stress test in which a positive voltage is applied is called the optical positive gate BT stress test (Pho to +GBT).

[0625] Here, the gate BT stress conditions are a stress temperature of 60°C and a stress time of 3 The gate electrode was applied with -30 V or +30 V, and the source and drain electrodes were applied with 0 V for 600 seconds. At this time, the electric field strength applied to the gate insulating film was set to 0.66 MV / cm. .

[0626] In addition, using the same conditions as the BT stress test, 10,000 lx white LED light was used. The transistor was irradiated with light and a BT stress test was performed. The temperature for measuring the Vg-Id characteristics of the transistor was set to 60°C.

[0627] The initial characteristics of the transistors included in Sample 1 and Sample 2, and Comparative Sample 1 and Comparative Sample 2 The difference between the threshold voltage of the The difference between the shift values ​​(i.e., the amount of change in the shift value (ΔShift)) is shown in FIG. In FIG. 41(A), a positive gate BT stress test (Dark +G BT), negative gate BT stress test (Dark -GBT), light positive gate BT Stress test (Photo +GBT), Photo negative gate BT stress test (Photo o -GBT) shows the amount of variation for each.

[0628] Next, stress tests were conducted by changing the stress temperature. Under the conditions of the stress test, the gate BT stress test was performed at a stress temperature of 125°C. The measurement temperature for the Vg-Id characteristics of the transistor after the gate BT stress test was 4 The temperature was set to 0°C.

[0629] Variation in threshold voltages in Samples 1 and 2, and Comparative Samples 1 and 2 (ΔVth) and the amount of change in the shift value (ΔShift) are shown in FIG. 41(B). In the positive gate BT stress test (Dark +GBT), negative gate BT The amount of variation in each stress test (Dark-GBT) is shown.

[0630] Here, the threshold voltage and shift value in this specification will be explained with reference to FIG. .

[0631] In this specification, the threshold voltage (Vth) is expressed as the gate voltage (Vg [V]) on the horizontal axis, The square root of the drain current (Id 1 / 2 In the curve 612 plotted with [A] as the vertical axis, and the maximum slope Id 1 / 2 When the tangent line 614 of the Chi, Id 1 / 2 It is defined as the gate voltage at the intersection with 0 A (see FIG. 42(A)). In this specification, the threshold voltage is calculated assuming that the drain voltage Vd is 10 V. In this specification, the threshold voltage (Vth) is the value of the threshold voltage of 20 transistors included in each sample. This is the average Vth of each tester.

[0632] In this specification, the shift value (Shift) is the gate voltage (Vg [V]). In the curve 616 where the horizontal axis is the logarithm of the drain current (Id [A]) and the vertical axis is the logarithm of the drain current (Id [A]), When the tangent line 618 of the large slope Id is extrapolated, the straight line Id = 1.0 × 10 -12 [A] and The gate voltage at the intersection of these two gates is defined as (see FIG. 42(B)). The shift value is calculated assuming that the drain voltage Vd is 10 V. The value is the average shift value of each of the 20 transistors included in each sample.

[0633] From Figure 41(A), when the stress temperature is 60°C, the Samples 1 and 2 were subjected to a positive gate BT stress test (Dark +GBT) and a It can be seen that the amount of variation in the Inasgate BT stress test (Dark-GBT) is small.

[0634] From FIG. 41(B), when the stress temperature is 120°C, the results are comparable to those of Comparative Sample 1 and Comparative Sample 2. Samples 1 and 2 were subjected to a positive gate BT stress test (Dark +GBT) and It can be seen that the amount of variation in the negative gate BT stress test (Dark -GBT) is small.

[0635] From the above, after the oxide semiconductor film or the multilayer film is formed, no particular heat treatment is required. In either case, the deposition temperature of the oxide insulating film formed on the oxide semiconductor film or the multilayer film is set to 280° C. or higher. By setting the temperature to 400° C. or less, impurities can be desorbed from the oxide semiconductor film or the multilayer film. It is clear that this is possible and that the amount of variation in transistor characteristics can be reduced.

[0636] In addition, in Samples 1 and 2, and Comparative Samples 1 and 3, the positive gate B A T stress test (Dark + GBT) was conducted. Here, the stress temperature was increased to 60°C. or 125°C, and the stress time was set to 100 seconds, 500 seconds, 1500 seconds, The amount of change in threshold voltage was measured for each stress. The graph shows the amount of change in threshold voltage over time and the approximate curve obtained from each amount of change. The vertical axis indicates the threshold voltage fluctuation (ΔVth). , the measurement results when the stress temperature was 60°C, and Fig. 43(B) shows the results when the stress temperature was 125 The measurement results are shown in °C.

[0637] As can be seen from FIG. 43(A), the amount of change in threshold voltage of Samples 1 and 2 compared to Comparative Sample 1 is This indicates that the oxide semiconductor film or multilayer film is not particularly heated after it is formed. The oxide insulating film formed on the oxide semiconductor film or the multilayer film can be formed at a low temperature without heat treatment. By setting the temperature between 280°C and 400°C, it is possible to reduce the amount of fluctuation in transistor characteristics. I found out that...

[0638] 43(A) and 43(B), the change in the transistor characteristics of Sample 1 and Sample 2 The amount of fluctuation is larger than that of comparative sample 3, but it is clear that the amount of fluctuation is the same as that of comparative sample 3. do. [Example]

[0639] In this example, the water and oxygen from the oxide insulating film 23 and the oxide insulating film 24 shown in Embodiment 1 were The amount of desorption of oxygen and the amount of defects in the film will be explained below.

[0640] First, the amount of water and oxygen desorbed was measured by TDS measurement of a sample with an oxide insulating film. An evaluation was carried out.

[0641] First, the sample preparation process will be described.

[0642] A silicon wafer was subjected to plasma etching under the conditions for the oxide insulating film 23 described in Embodiment 1. A silicon oxynitride film was formed by CVD. This sample was designated as Sample 3. The silicon oxynitride film contained therein had a thickness of 100 nm.

[0643] The silicon oxynitride film contained in sample 3 was formed by silane at a flow rate of 20 sccm and a flow rate of 3000 s ccm of nitrous oxide was supplied as a source gas to the processing chamber of the plasma CVD equipment. The pressure was controlled to 200 Pa, the substrate temperature was set to 350°C, and the high frequency power supply of 27.12 MHz was used. The formation was carried out by supplying 100 W of power using a .

[0644] Further, a protrusion was formed on a silicon wafer under the conditions for the oxide insulating film 24 shown in the first embodiment. A silicon oxynitride film was formed by plasma CVD. This sample was designated as Sample 4. The silicon oxynitride film contained in Sample 4 had a film thickness of 400 nm.

[0645] The silicon oxynitride film included in Sample 4 was formed by silane with a flow rate of 160 sccm and 400 The source gas was nitrous oxide at 0 sccm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 22 It was formed by the plasma CVD method in which the temperature was set to 0 °C and high-frequency power of 1500 W was supplied to the parallel plate electrodes. Under these conditions, a silicon oxynitride film containing more oxygen than stoichiometric oxygen and having a part of oxygen desorbed by heating can be formed.

[0646] Also, a silicon oxynitride film was formed on a silicon wafer by the plasma CVD method under conditions where the film formation pressure and the film formation temperature were lower than those of Sample 3. This sample was used as Comparative Sample 4. The thickness of the silicon oxynitride film contained in Comparative Sample 4 was 400 nm.

[0647] The silicon oxynitride film contained in Comparative Sample 4 was formed by supplying silane with a flow rate of 30 sccm and dinitrogen monoxide with a flow rate of 400 0 sccm as raw material gases into the processing chamber of a plasma CVD apparatus, controlling the pressure in the processing chamber to 40 Pa, setting the substrate temperature to 220 °C, and supplying power of 150 W using a high-frequency power source of 27.12 MHz.

[0648] <TDS Measurement> The results of TDS measurement for Sample 3, Sample 4, and Comparative Sample 4 are shown in FIG. 44. The upper part of FIG. 44 shows the measurement results representing the desorption amount of water molecules, and the lower part of FIG. 44 shows the measurement results representing the desorption amount of oxygen molecules.

[0649] As shown in the upper part of FIG. 44, in Comparative Sample 4, a peak of M / z = 18 corresponding to the mass number of water molecules was confirmed. On the other hand, it was confirmed that Samples 3 and 4 had smaller peak intensities in the vicinity of a substrate temperature of 50 °C to 150 °C compared to Comparative Sample 4. From this, it can be seen that the films formed using the conditions of the oxide insulating films 23 and 24 of Embodiment 1 are films with a low water content. ​

[0650] As shown in the lower part of FIG. 44, in Sample 4, M / z = 3 corresponding to the mass number of oxygen molecules and a peak at 2 were confirmed. On the other hand, Samples 3 and Comparative Sample 4 were found to have lower peak intensities at substrate temperatures of 300°C to 400°C compared to Sample 4. From this, it can be seen that the film formed using the conditions of the oxide insulating film 24 in Embodiment 1 has a high oxygen content.

[0651] Next, the amount of defects in the oxide insulating films contained in Sample 3, Sample 4, and Comparative Sample 4 will be described using the ESR (electron spin resonance) measurement results.

[0652] First, the structure of the evaluated samples will be described.

[0653] A sample in which a silicon oxynitride film contained in Sample 3 is formed on a quartz substrate is designated as Sample 5. The film thickness of the silicon oxynitride film contained in Sample 5 was 100 nm.

[0654] A sample in which a silicon oxynitride film contained in Sample 4 is formed on a quartz substrate is designated as Sample 6. The film thickness of the silicon oxynitride film contained in Sample 6 was 400 nm.

[0655] A sample in which a silicon oxynitride film contained in Comparative Sample 4 is formed on a quartz substrate is designated as Comparative Sample 5. The film thickness of the silicon oxynitride film contained in Comparative Sample 5 was 400 nm.

[0656] <ESR Measurement> <000448​​​​​​0, a parameter called g value is obtained using ν, where ν is the microwave frequency. h is Planck's constant and β is the Bohr magneton, both of which are constants.

[0657] Here, ESR measurements were performed under the following conditions: the measurement temperature was -170°C, and the applied voltage was 8.92G. The high frequency power (microwave power) was set to 1 mW at 100 Hz, and the direction of the magnetic field was set to the film surface of the prepared sample. The g value, which is derived from the dangling bond of silicon, appears at g = 2. The detection limit for the spin density of the signal is 1.1 × 10 11 The number of spins was small. The smaller the thickness, the fewer defects, which are dangling bonds of silicon.

[0658] The first derivative curves obtained by ESR measurement for each sample are shown in the upper part of Figure 45. In each sample, the g value (g value) of 2, which is due to the dangling bond of silicon, appears. The spin density of the signal is shown in the bottom of Figure 45. Note that the measured spin number is expressed in units of The spin density converted to a per unit area is shown.

[0659] In this case, in order to measure the change in the amount of defects caused by the heat treatment, the ESR measurements were performed on each sample. In Figure 45, the measurement results before heat treatment are shown as The measurement results after heat treatment at 350°C are indicated as -depo and 350°C, respectively.

[0660] As shown in the upper part of FIG. 45, the silicon oxynitride film included in Sample 5 has the following characteristics before and after the heat treatment: In this study, no signal with symmetry was detected at a g value of 2. The silicon oxynitride film contained in the silicon oxide film has very few defects or no defects. We can see that.

[0661] On the other hand, the silicon oxynitride films included in Sample 6 and Comparative Sample 5 were A signal with symmetry at a g value of 2 was detected, indicating that a defect was present. In sample 6, a symmetric signal was detected at a g value of 2 after heat treatment. However, in comparative sample 5, the g value after heat treatment is symmetric at 2. From this, it can be seen that in the comparative sample 5, the heat treatment It can be seen that the amount of defects is reduced or no defects are included.

[0662] From the above, by using the conditions for the oxide insulating film 23 described in Embodiment 1, the defect amount can be reduced. It was found that an oxide insulating film with little etchant could be formed. [Example]

[0663] In this example, the film formation temperature of the oxide insulating film 23 and the oxide semiconductor film and the oxide insulating film 24 shown in Example 1 were In this embodiment, the relationship between the concentration of hydrogen contained in the oxide insulating film and the concentration of hydrogen contained in the oxide semiconductor insulating film will be described. The hydrogen concentration was measured by SIMS on a sample with a laminated body film and oxide insulating film. .

[0664] First, the sample preparation process will be described.

[0665] A 100 nm thick oxide semiconductor film (corresponding to OS in Figure 46) was sputtered onto a quartz substrate. Next, a heat treatment was carried out.

[0666] Here, the oxide semiconductor film was grown under the same conditions as those for the oxide semiconductor film included in Sample 1 described in Example 1. A nitride semiconductor film was formed. The film was then heat-treated at 350°C for 1 hour in a nitrogen atmosphere. Subsequently, heat treatment was performed at 350°C for 1 hour in an atmosphere containing nitrogen and oxygen.

[0667] Next, using the conditions of the oxide insulating film 23 shown in Embodiment 1 on the oxide semiconductor film, a thickness of 20 nm silicon oxynitride film (corresponding to P1 in FIG. 46) was formed, and then, using the conditions of the oxide insulating film 24 shown in Embodiment 1, a 200 nm thick silicon oxynitride film (corresponding to P2 in FIG. 46) was formed.

[0668] Here, using the same conditions as the oxide insulating film 23 included in Sample 1 shown in Example 1, silicon oxynitride (P1) was formed. Using the same conditions as the oxide insulating film 23 included in Sample 1 shown in Example 1, silicon oxynitride (P2) was formed. This sample is designated as Sample 7.

[0669] Also, in Sample 7, in the heat treatment performed after forming the oxide semiconductor film (corresponding to OS in FIG. 46), the heat treatment temperature was set to 450°C. Further, compared with Sample 7, using conditions with a lower film formation pressure and film formation temperature, a 50 nm thick silicon oxynitride film (corresponding to P1 in FIG. 46) was formed on the oxide semiconductor film. This sample is designated as Comparative Sample 6.

[0670] The silicon oxynitride film (P1) included in Comparative Sample 6 was formed using the same conditions as the silicon oxynitride film included in Comparative Sample 4.

[0671] Also, in Comparative Sample 6, in the heat treatment performed after forming the oxide semiconductor film (corresponding to OS in FIG. 46), a sample with a heat treatment temperature of 350°C is designated as Comparative Sample 7.

[0672] <SIMS Measurement> Next, SIMS measurements were performed on Sample 7, Comparative Sample 6, and Comparative Sample 7, and the oxide semiconductor film (OS) The hydrogen concentration in the silicon oxynitride film (P1) was measured. The hydrogen concentration in the semiconductor film (OS) is shown in the upper part of Figure 46. In addition, in each sample, the oxynitride The hydrogen concentration in the silicon film (P1) is shown in the lower part of FIG.

[0673] In this case, in order to measure the change in hydrogen concentration caused by the heat treatment, SIMS measurement was performed on each of the sample...

Claims

1. a first conductive film that functions as a gate electrode of a transistor; a gate insulating film having a region located above the first conductive film; an oxide semiconductor film having a region in contact with an upper surface of the gate insulating film and a region overlapping with the first conductive film with the gate insulating film interposed therebetween; an oxide film having a region in contact with a top surface of the oxide semiconductor film and a region overlapping with the first conductive film with the gate insulating film and the oxide semiconductor film interposed therebetween; a second conductive film having a region in contact with a top surface of the oxide film and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive film having a region in contact with an upper surface of the oxide film and functioning as the other of the source electrode and the drain electrode of the transistor; an oxide insulating film having a region in contact with an upper surface of the oxide film, a region in contact with an upper surface of the second conductive film, and a region in contact with an upper surface of the third conductive film; a nitride insulating film having a region located above the oxide insulating film, each of the oxide semiconductor film and the oxide film contains In, Ga, and Zn; The atomic ratio of In, Ga, and Zn in the oxide film is In:Ga:Zn=x １ :y １ :z １ (atomic ratio), the atomic ratio of In, Ga, and Zn in the oxide semiconductor film is In:Ga:Zn=x ２ :y ２ :z ２ (atomic ratio), then y １ / x １ Yes ２ / x ２ is larger than In the oxide film, y １ Ha x １ is larger than the oxide semiconductor film has a crystalline portion in which a plurality of spots are observed within a ring-shaped region by nanobeam electron diffraction; The display device, wherein the oxide film has a non-single crystal structure and has a crystal portion oriented along the c-axis.

2. a first conductive film that functions as a gate electrode of a transistor; a gate insulating film having a region located above the first conductive film; an oxide semiconductor film having a region in contact with an upper surface of the gate insulating film and a region overlapping with the first conductive film with the gate insulating film interposed therebetween; an oxide film having a region in contact with a top surface of the oxide semiconductor film and a region overlapping with the first conductive film with the gate insulating film and the oxide semiconductor film interposed therebetween; a second conductive film having a region in contact with a top surface of the oxide film and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive film having a region in contact with an upper surface of the oxide film and functioning as the other of the source electrode and the drain electrode of the transistor; an oxide insulating film having a region in contact with an upper surface of the oxide film, a region in contact with an upper surface of the second conductive film, and a region in contact with an upper surface of the third conductive film; a nitride insulating film having a region located above the oxide insulating film, each of the oxide semiconductor film and the oxide film contains In, Ga, and Zn; The atomic ratio of In, Ga, and Zn in the oxide film is In:Ga:Zn=x １ :y １ :z １ (atomic ratio), the atomic ratio of In, Ga, and Zn in the oxide semiconductor film is In:Ga:Zn=x ２ :y ２ :z ２ (atomic ratio), then y １ / x １ Yes ２ / x ２ is larger than In the oxide film, y １ Ha x １ is larger than In the oxide semiconductor film, y ２ Ha x ２ is equal to or greater than y ２ Ha x ２ is less than three times the oxide semiconductor film has a crystalline portion in which a plurality of spots are observed within a ring-shaped region by nanobeam electron diffraction; The display device, wherein the oxide film has a non-single crystal structure and has a crystal portion oriented along the c-axis.

3. In claim 1 or 2, each of the second conductive film and the third conductive film has a laminated structure including a copper film; the oxide insulating film contains silicon oxide or silicon oxynitride, The nitride insulating film comprises silicon nitride, silicon nitride oxide, aluminum nitride, or aluminum nitride oxide.

4. In any one of claims 1 to 3, The y １ / x １ is the y ２ / x ２ A display device that is more than 1.5 times larger than the

5. In any one of claims 1 to 3, The y １ / x １ is the y ２ / x ２ A display device that is more than twice as large as the

6. In any one of claims 1 to 3, The y １ / x １ is the y ２ / x ２ A display device that is more than three times larger than the

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