Display device
The display device addresses ESD issues by optimizing conductive layer configurations and contact holes to improve manufacturing yield and reliability in GDM technology.
Patent Information
- Application Number
- JP2024059359
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-04-02
- Publication Date
- 2025-10-15
AI Technical Summary
The manufacturing yield of liquid crystal display devices using Gate Driver Monolithic (GDM) technology is compromised due to electrostatic discharge (ESD) caused by charge accumulation in the transparent conductive layer of the counter substrate, leading to potential damage of the gate driver circuitry.
The display device design includes specific configurations of conductive layers and contact holes to enhance electrical resistance and reduce ESD risk, with higher resistance values between certain conductive portions and strategic placement of contact holes to minimize charge transfer.
This design effectively suppresses defects caused by ESD, enhancing the manufacturing yield and reliability of the display device.
Smart Images

Figure 2025156747000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a display device. [Background technology]
[0002] Liquid crystal display panels are used in liquid crystal display devices for various applications, such as mobile terminals and televisions. Narrowing the frame of liquid crystal display panels is required from the perspectives of reducing manufacturing costs and improving design and functionality. By using gate driver monolithic (GDM) technology, which integrates gate drive circuits (sometimes called "gate drivers") onto a TFT substrate, driver implementation costs can be reduced and frame widths can be narrowed compared to when gate drive circuits are mounted on a TFT substrate using COF (chip on film) or COG (chip on glass). GDM technology is also sometimes called Gate Driver on Array (GOA).
[0003] Patent Documents 1 and 2 disclose liquid crystal display devices to which GDM technology is applied. For example, in the liquid crystal display device of Patent Document 1, a region other than the display region (sometimes called a "peripheral region" or "frame region") is provided with gate drivers provided on the left and / or right of the display region, main wiring extending in the vertical direction for supplying signals to the gate drivers, and branch wiring extending in the horizontal direction and connected to circuits that constitute the main wiring and the gate drivers. The main wiring and branch wiring are formed from different conductive layers and are electrically connected via contact holes formed in an insulating layer between them. The main wiring and branch wiring are electrically connected by a conductive portion formed from, for example, ITO that is provided so as to cover the contact holes. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] International Publication No. 2011 / 067963 [Patent Document 2] International Publication No. 2014 / 115810 Summary of the Invention [Problem to be solved by the invention]
[0005] There is a demand for improving the manufacturing yield of display devices to which the GDM technology is applied. According to the study by the present inventors, the liquid crystal display device of Patent Document 1 may have a reduced manufacturing yield.
[0006] In the liquid crystal display device of Patent Document 1, if the transparent conductive layer of the counter substrate is exposed at the outer edge of the counter substrate, it is prone to charging during the manufacturing process of the liquid crystal display device. Charges accumulated in the transparent conductive layer of the counter substrate may jump toward a conductive portion (e.g., a conductive portion made of ITO) of the TFT substrate that covers a contact hole for connecting the main wiring and the branch wiring, causing electrostatic discharge (ESD). In this case, damage may occur to the circuitry that constitutes the gate driver via the branch wiring from the conductive portion.
[0007] Patent Document 2 discloses a technology for suppressing a decrease in manufacturing yield due to ESD during the manufacturing process of a TFT substrate used in a liquid crystal display device. According to Patent Document 2, during the manufacturing process of a TFT substrate (e.g., a photolithography process), the manufacturing yield may decrease due to charge accumulation in the gate metal layer. Charges accumulated in the gate metal layer may cause ESD between conductive patterns included in the gate metal layer, and ESD may form pinholes penetrating the insulating layer, resulting in short circuits between wirings. In the liquid crystal display device of Patent Document 2, the location of ESD caused by charges accumulated in the gate metal layer can be controlled so as to induce ESD between conductive patterns configured to be connected to each other. However, Patent Document 2 does not disclose suppressing ESD caused by charges accumulated in the transparent conductive layer of the opposing substrate.
[0008] An object of the present invention is to provide a display device in which the occurrence of defects due to ESD is suppressed. [Means for solving the problem]
[0009] According to an embodiment of the present invention, the following solutions are provided:
[0010] [Item 1] A display device having a plurality of pixels arranged in a matrix having a plurality of pixel rows and a plurality of pixel columns, a display area defined by the plurality of pixels and a peripheral area other than the display area; a gate drive circuit provided in the peripheral region, the gate drive circuit including a shift register having a plurality of stages corresponding to each of the plurality of pixel rows; a first trunk line provided in the peripheral region, extending in a column direction, and supplying a first signal to one or more of the plurality of stages of the shift register; one or more first branch lines provided in the peripheral region and electrically connected to the first trunk line; and the first trunk line is included in a first conductive layer; the first branch wiring is included in a second conductive layer; one or more first contact holes exposing a first portion of the first trunk line and a first portion of the first branch line; one or more third contact holes exposing a third portion of the conductive portion included in the first conductive layer; and the first portion of the first main line and the first portion of the first branch line are electrically connected to each other in the first contact hole; a range of the third portion in the row direction overlaps a range of the first main line in the row direction, and a range of the third portion in the column direction overlaps a range of the first main line in the column direction, A display device, wherein the electrical resistance value between the third portion and the first branch wiring is higher than the electrical resistance value between the first portion of the first trunk line and the first branch wiring connected to the first portion of the first trunk line.
[0011] [Item 2] a second trunk line provided in the peripheral region, extending in a column direction, and supplying the first signal to one or more stages of the plurality of stages of the shift register; another trunk line provided in the peripheral region, extending in a column direction, and supplying a second signal to one or more of the plurality of stages of the shift register; one or more second branch lines provided in the peripheral region and electrically connected to the other trunk lines; and the first branch wiring electrically connects the first trunk line and the second trunk line; the first trunk line is disposed farther from the display area than the second trunk line and each of the other trunk lines; the second trunk line and the other trunk line are included in the first conductive layer; the second branch wiring is included in the second conductive layer, further comprising one or more second contact holes exposing a second portion of the other main line and a second portion of the second branch line; Item 1. The display device according to item 1, wherein the second portion of the other main line and the second portion of the second branch line are electrically connected in the second contact hole.
[0012] [Item 3] the one or more first branch wirings are a plurality of first branch wirings, the one or more first contact holes are a plurality of first contact holes formed corresponding to the plurality of first branch wirings, respectively; the one or more third contact holes are a plurality of third contact holes, Item 1. The display device according to item 1, wherein the number of the third contact holes is greater than the number of the first contact holes.
[0013] [Item 4] When the positions of the first contact holes in the column direction are defined as first positions, and the positions of the third contact holes in the column direction are defined as third positions, The display device described in item 3, wherein the plurality of first contact holes and the plurality of third contact holes are formed so that there are multiple third positions between two adjacent first positions in the column direction.
[0014] [Item 5] one or more first conductive parts provided corresponding to the one or more first contact holes, each electrically connected to the first portion of the first main line and the first portion of the first branch line; one or more third conductive portions provided corresponding to the one or more third contact holes, each electrically connected to the third portion; and Item 1. The display device according to item 1, wherein the first conductive portion and the third conductive portion are included in a third conductive layer.
[0015] [Item 6] one or more first conductive parts provided corresponding to the one or more first contact holes, each electrically connected to the first portion of the first main line and the first portion of the first branch line; one or more second conductive parts provided corresponding to the one or more second contact holes, each electrically connected to the second portion of the other main line and the second portion of the second branch wiring; one or more third conductive portions provided corresponding to the one or more third contact holes, each electrically connected to the third portion; and Item 3. The display device according to item 2, wherein the first conductive portion, the second conductive portion, and the third conductive portion are included in a third conductive layer.
[0016] [Item 7] Item 6. The display device according to item 5, wherein the first conductive portion and the third conductive portion are formed from a transparent conductive material.
[0017] [Item 8] a gate electrode of a TFT included in each of the plurality of pixels is included in the first conductive layer; a source electrode of the TFT of each of the plurality of pixels is included in the second conductive layer; Item 8. The display device according to item 7, wherein the pixel electrodes of each of the plurality of pixels are included in the third conductive layer.
[0018] [Item 9] a first substrate and a second substrate arranged to face each other; a liquid crystal layer provided between the first substrate and the second substrate; a seal portion surrounding the liquid crystal layer; and 9. The display device according to any one of items 5 to 8, wherein the first conductive portion and the third conductive portion do not overlap the sealing portion in a plan view.
[0019] [Item 10] the first substrate includes the first conductive layer, the second conductive layer, and the third conductive layer; Item 10. The display device according to item 9, wherein the second substrate has one or more protruding structures that protrude toward the first substrate and are provided at positions opposite the third contact holes.
[0020] [Item 11] 11. The display device according to any one of items 1 to 10, wherein the third contact holes are arranged at positions farther from the display area in the row direction than the first contact holes are arranged at positions farther from the display area in the row direction.
[0021] [Item 12] the third portion is a part of the first trunk line, 12. The display device according to any one of items 1 to 11, wherein in the third contact hole, the third portion is not connected to any conductive portion included in the second conductive layer.
[0022] [Item 13] the third portion is a part of the first trunk line, the one or more third conductive parts are a plurality of third conductive parts, Item 11. The display device according to any one of items 5 to 10, further comprising a connection portion included in the second conductive layer and electrically connecting two or more third conductive portions among the plurality of third conductive portions.
[0023] [Item 14] Item 14. The display device according to item 13, wherein the connection portion overlaps with the first trunk line in a plan view.
[0024] [Item 15] Item 13 or 14, the display device according to item 13 or 14, wherein the connection portion electrically connects the two or more third conductive portions to any one of the one or more first conductive portions.
[0025] [Item 16] the first trunk line has one or more notches; the first conductive layer further includes one or more island-shaped conductive portions that are arranged in the cutout portion and spaced apart from the first trunk line; Item 12. The display device according to any one of items 1 to 11, wherein the third portion is a part of the island-shaped conductive portion.
[0026] [Item 17] Item 17. The display device according to item 16, wherein in the third contact hole, the third portion is not connected to any conductive portion included in the second conductive layer.
[0027] [Item 18] the first trunk line has one or more notches; the first conductive layer further includes one or more island-shaped conductive portions that are arranged in the cutout portion and spaced apart from the first trunk line; the third portion is a part of the island-shaped conductive portion, the one or more third conductive parts are a plurality of third conductive parts, Item 11. The display device according to any one of items 5 to 10, further comprising a first connection portion included in the second conductive layer and electrically connecting two or more third conductive portions among the plurality of third conductive portions.
[0028] [Item 19] Item 19. The display device according to item 18, wherein the first connection portion at least partially overlaps the island-shaped conductive portion and at least partially overlaps the first trunk line in a plan view.
[0029] [Item 20] the one or more cutout portions are a plurality of cutout portions, the one or more island-shaped conductive portions are a plurality of island-shaped conductive portions arranged in each of the plurality of cutout portions, Item 18 or 19, the display device, wherein the first connection portion electrically connects two or more third conductive portions among the plurality of third conductive portions that are electrically connected to different island-shaped conductive portions.
[0030] [Item 21] Item 18. The display device according to item 17, further comprising a second connection portion formed of a transparent conductive material, which electrically connects the island-shaped conductive portion and the first trunk line.
[0031] [Item 22] Item 18. The display device according to item 17, further comprising an ESD protection circuit electrically connected to the island-shaped conductive portion and the first trunk line. [Effects of the Invention]
[0032] According to an embodiment of the present invention, a display device in which the occurrence of defects caused by ESD is suppressed is provided. [Brief explanation of the drawings]
[0033] [Figure 1] FIG. 1 is a schematic diagram showing the configuration of a display device 1100a according to a first embodiment of the present invention. [Figure 2] FIG. 1 is a schematic plan view of a display device 1100a. [Figure 3] FIG. 1 is a schematic plan view of a display panel 1000a included in a display device 1100a, showing a part of a peripheral area NA. [Figure 4A] 4A is a schematic cross-sectional view of the display panel 1000a, taken along line 4A-4A' in FIG. [Figure 4B] 4B is a schematic cross-sectional view of the display panel 1000a taken along line 4B-4B' in FIG. [Figure 5A] 10 is a schematic plan view of a first contact portion CPa of the display panel 1000a. FIG. [Figure 5B] 5B is a schematic cross-sectional view of a first contact portion CPa of the display panel 1000a, taken along line 5B-5B' in FIG. 5A. FIG. [Figure 6A] 10 is a schematic plan view of a second contact portion CPd of the display panel 1000a. FIG. [Figure 6B] 6B is a schematic cross-sectional view of a second contact portion CPd of the display panel 1000a, taken along line 6B-6B' in FIG. 6A. FIG. [Figure 7] 10 is a schematic cross-sectional view of a third contact portion CPp of the display panel 1000a. FIG. [Figure 8] FIG. 10 is a schematic plan view of a display panel 1000b included in a display device according to a second embodiment, showing a part of a peripheral area NA. [Figure 9] 9 is a schematic cross-sectional view of the display panel 1000b, taken along line 9A-9A' in FIG. [Figure 10] 10 is a schematic cross-sectional view of a third contact portion CPp of the display panel 1000b. FIG. [Figure 11] FIG. 10 is a schematic plan view of a display panel 1000c included in a display device according to Embodiment 3, showing a part of a peripheral area NA. [Figure 12] 12A is a schematic cross-sectional view of the display panel 1000c, taken along line 12A-12A' in FIG. [Figure 13] 10 is a schematic cross-sectional view of a third contact portion CPp of the display panel 1000c. FIG. [Figure 14] FIG. 10 is a schematic plan view of a display panel 1000d included in a display device according to Embodiment 4, showing a part of a peripheral area NA. [Figure 15] 15A is a schematic cross-sectional view of the display panel 1000d, taken along line 15A-15A' in FIG. [Figure 16] 10 is a schematic cross-sectional view of a third contact portion CPp included in a display panel 1000d. FIG. [Figure 17A] FIG. 10 is a schematic plan view of a display panel 1000e included in a display device according to Embodiment 5, showing a part of a peripheral area NA. [Figure 17B] 17B is a cross-sectional view schematically showing a display panel 1000e, taken along line 17B-17B' in FIG. 17A. [Figure 18] 13 is a schematic plan view of a display panel 1000f included in a display device according to Embodiment 6, showing a part of a peripheral area NA. FIG. [Figure 19] FIG. 1 is a schematic plan view of a display panel 1000a1 included in a display device according to a first modification of the first embodiment, and is a plan view schematically showing a part of a peripheral area NA. [Figure 20] FIG. 10 is a schematic plan view of a display panel 1000a2 included in a display device according to a second modification of the first embodiment, and is a plan view schematically showing a part of a peripheral area NA. [Figure 21] 21A is a cross-sectional view schematically showing a display panel 1000a2, taken along line 21A-21A' in FIG. 20. FIG. [Figure 22] FIG. 10 is a schematic plan view of a display panel 900 of a comparative example, showing a part of the peripheral area NA. [Figure 23A] 23A is a schematic cross-sectional view of a display panel 900 of a comparative example, taken along line 23A-23A' in FIG. 22. FIG. [Figure 23B] 23B is a schematic cross-sectional view of a display panel 900 of a comparative example, taken along line 23B-23B' in FIG. 22. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0034] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that, although a liquid crystal display panel and a liquid crystal display device will be shown below as examples of a display panel and a display device according to embodiments of the present invention, the present invention is not limited to the following embodiments. In the following drawings, components having substantially the same functions will be designated by common reference numerals, and their description may be omitted.
[0035] (Embodiment 1) A liquid crystal display panel 1000a according to this embodiment and a liquid crystal display device 1100a having the liquid crystal display panel 1000a (hereinafter sometimes referred to as the "display panel 1000a" and the "display device 1100a") will be described with reference to Figures 1 and 2. Figure 1 is a schematic diagram showing the configuration of the display device 1100a. Figure 2 is a schematic plan view of the display device 1100a.
[0036] 1 and 2, the display panel 1000a has a plurality of pixels P arranged in a matrix having a plurality of pixel rows and a plurality of pixel columns. Each pixel P is provided with a TFT (thin film transistor) 1 and a pixel electrode 5 electrically connected to the TFT 1. The pixel row is a plurality of pixels P arranged in the row direction (X direction in FIG. 2), and the pixel column is a plurality of pixels P arranged in the column direction (Y direction in FIG. 2).
[0037] The display panel 1000a has a display area AA defined by a plurality of pixels P, and a peripheral area NA outside the display area AA. The peripheral area NA includes a first peripheral area NA1 located outside the display area AA in the row direction, and a second peripheral area NA2 located outside the display area AA in the column direction. The first peripheral area NA1 and the second peripheral area NA2 may overlap each other.
[0038] The display panel 1000a has a TFT substrate 101 (sometimes referred to as the "first substrate") and an opposing substrate 201 (sometimes referred to as the "second substrate") that face each other, a liquid crystal layer LC (see, for example, Figure 4B described below) provided between these substrates, and a sealing portion 40 (see, for example, Figure 4B) that surrounds the liquid crystal layer LC.
[0039] In this example, a gate bus line GL is associated with each of the multiple pixel rows, and a source bus line SL is associated with each of the multiple pixel columns. The TFT1 of each pixel P receives a gate signal from the corresponding gate bus line GL and a source signal from the corresponding source bus line SL. The pixel rows are numbered from top to bottom as the first, second, ..., rxth rows, and the gate bus line associated with the rth (1≦r≦rx) pixel row is sometimes referred to as the gate bus line GL(r) (see FIG. 1). Here, rx is the number of pixel rows in the display panel 1000a. The pixels in the rth pixel row are selected by a scanning signal voltage supplied to the gate bus line GL(r). The gate bus line GL(r) associated with the rth pixel row is connected to the gate electrodes of the TFTs connected to the pixels in the rth pixel row. The pixel columns are numbered from left to right as the first, second, ..., qyth columns, and the source bus line SL associated with the qth pixel row is sometimes referred to as the source bus line SL(q). Here, qy is the number of pixel columns in the display panel 1000a. A display signal voltage is supplied to pixels in the qth pixel column (1≦q≦qy) from a source bus line SL(q). The source bus line SL(q) associated with the qth pixel column is connected to the source electrodes of the TFTs connected to the pixels in the qth pixel column.
[0040] The display panel 1000a includes a gate drive circuit GD. Here, the gate drive circuit GD is integrally formed on the TFT substrate 101 (monolithic gate driver). The gate drive circuit GD is provided in the first peripheral region NA1 of the display panel 1000a and includes a shift register 110 having multiple stages corresponding to each of the multiple pixel rows. The output of each stage of the shift register 110 is connected to a gate bus line GL associated with each of the multiple pixel rows. Typically, the shift register 110 has rx stages, which are numbered from top to bottom as the first stage, second stage, ..., rx stage. The output of the rth stage (1≦r≦rx) is connected to the gate bus line GL(r). In addition to the rx stages, the shift register 110 may further include one or more dummy stages adjacent to the rx stages in the column direction that do not contribute to display. The shift register 110 is configured by cascading multiple unit circuits QC. Each stage of the shift register 110 is made up of a unit circuit QC. The unit circuit QC that constitutes each stage of the shift register 110 has at least one TFT (semiconductor element).
[0041] As shown in FIG. 2, the display device 1100a includes a display panel 1000a and a circuit board 510 connected to the display panel 1000a. The circuit board 510 includes a control circuit CNTL that supplies control signals to the gate drive circuit GD. For example, the control circuit CNTL is mounted on the circuit board 510. The circuit board 510 is connected to a terminal unit TP formed in the second peripheral area NA2 of the display panel 1000a via a source substrate 520. The circuit board 510 is connected to the source substrate 520 via flexible printed circuits (FPC) 512. The terminal unit TP has terminals electrically connected to each of the trunk lines for supplying signals to the gate drive circuit GD. The circuit board 510 supplies signals from the terminal unit TP of the display panel 1000a to each of the trunk lines for supplying signals to the gate drive circuit GD via the source substrate 520. In this example, the circuit board 510 is connected to the display panel 1000a via a plurality of source substrates 520. Each of the source substrates 520 (printed wiring boards) is connected to the display panel 1000a via a plurality of flexible circuit boards 522, and a source drive circuit SD that supplies a display signal voltage to the source bus lines SL is mounted on the flexible circuit boards 522. For ease of viewing, the source bus lines SL are not shown in Figure 2. The control circuit CNTL also supplies a control signal to the source drive circuit SD, for example.
[0042] The control signals supplied by the control circuit CNTL to the gate drive circuit GD include, for example, a gate start pulse signal GSP, a gate clock signal GCK, and a gate end pulse signal GEP. The terminal section TP in the second peripheral area NA2 of the display panel 1000a is provided with terminals (n clock trunk terminals and outer trunk terminals) electrically connected to n clock trunk lines CKL1 to CKLn and outer trunk lines 122 (sometimes referred to as "first trunk lines"). The control signals supplied by the control circuit CNTL to the source drive circuit SD include, for example, a source start pulse signal SSP and a source clock signal SCK. The arrangement and connection method of the source drive circuit SD and the control circuit CNTL are not limited to those shown in the figure. Furthermore, while FIG. 2 shows the gate drive circuit GD and wiring for supplying signals to the gate drive circuit GD provided on both the left and right sides of the display area AA, wiring for supplying signals to the gate drive circuit GD may be provided only on either the left or right side of the display area AA.
[0043] The structure of the display panel 1000a will be described in detail with further reference to FIGS. 3, 4A, and 4B. FIG. 3 is a plan view schematically showing the display panel 1000a, and is an enlarged view of a portion of the peripheral region NA of the display panel 1000a. FIG. 3 shows a region including gate bus lines GL(m) to GL(m+9) (1≦m≦rx−9). FIGS. 4A and 4B are cross-sectional views schematically showing the display panel 1000a, with FIG. 4A being a cross-sectional view taken along line 4A-4A′ in FIG. 3 and FIG. 4B being a cross-sectional view taken along line 4B-4B′ in FIG. 3.
[0044] As shown in FIG. 3, the display panel 1000a further includes a wiring group for supplying signals to the gate drive circuit GD. The wiring group is provided on the TFT substrate 101 of the display panel 1000a. Specifically, the display panel 1000a includes, in the peripheral region NA (more specifically, in the first peripheral region NA1), an outer trunk 122, one or more first branch wirings 140 electrically connected to the outer trunk 122, one or more first contact portions CPa and one or more third contact portions CPp provided corresponding to the wiring group. The display panel 1000a also includes, in the peripheral region NA (more specifically, in the first peripheral region NA1), an inner trunk 124 (sometimes referred to as a "second trunk"), a clock trunk CKL (sometimes referred to as an "other trunk"), one or more second branch wirings 154 electrically connected to the clock trunk CKL, and one or more second contact portions CPd. The first contact portion CPa, the second contact portion CPd, and the third contact portion CPp have a first contact hole CHa, a second contact hole CHd, and a third contact hole CHp, respectively, as will be described later with reference to Figures 5A and 5B, Figures 6A and 6B, and Figure 7.
[0045] 3, the outer trunk 122, the inner trunk 124, and the clock trunk CKL are wirings that extend in the column direction. The outer trunk 122 is arranged farther from the display area AA than the inner trunk 124 and the clock trunk CKL. The clock trunk CKL is provided between the outer trunk 122 and the inner trunk 124. The inner trunk 124 is arranged farther from the display area AA than the shift register 110. The first branch wiring 140 and the second branch wiring 154 are wirings that extend in the row direction.
[0046] The outer trunk 122 and the inner trunk 124 each supply a first signal to one or more of the multiple stages of the shift register 110. The first signal is, for example, a signal that provides a low-level potential Vgl of a gate clock signal, which will be described later. The first signal may be a signal that is commonly supplied to the multiple stages of the shift register 110. A first signal that provides a fixed potential (e.g., a signal that provides a low-level potential Vgl) is supplied to the outer trunk 122, which is connected from the control circuit CNTL via an outer trunk terminal. As will be described below, the outer trunk 122 and the inner trunk 124 are electrically connected via first branch wiring 140, and the inner trunk 124 and the input (input terminal) of each stage of the shift register 110 are electrically connected via third branch wiring 152 extending in the row direction. Therefore, the first signal is supplied to the input of each stage of the shift register 110. The first signal is not limited to a signal that provides a low-level potential Vgl, but may be, for example, a signal that provides a high-level potential Vgh of a gate clock signal, or a signal that provides another potential (for example, a fixed potential).
[0047] The first branch wiring 140 electrically connects the outer trunk 122 and the inner trunk 124. The first branch wiring 140 and the outer trunk 122 are electrically connected at the first contact portion CPa. In the illustrated example, the display panel 1000a has a plurality of first branch wirings 140. In the example shown in FIG. 3, each of the plurality of first branch wirings 140 is provided corresponding to n second branch wirings 154 electrically connected to n clock trunk lines CKL1 to CKLn. As shown in FIG. 3, the first peripheral area NA1 includes a plurality of unit areas U arranged in the column direction, and each unit area U corresponds to n stages of the shift register 110 to which n types of clock signals having different phases are supplied from the n clock trunk lines CKL1 to CKLn. Each of the plurality of first branch wirings 140 is provided for each unit area U.
[0048] As shown in FIG. 3, the display panel 1000a has n clock trunk lines CKL1 to CKLn as the clock trunk lines CKL. The n clock trunk lines CKL1 to CKLn may be collectively referred to as the clock trunk lines CKL. The n clock trunk lines CKL1 to CKLn supply n types of clock signals (n is an integer of 2 or greater) with different phases to multiple stages of the shift register 110. Each of the n clock trunk lines CKL1 to CKLn supplies a clock signal (sometimes referred to as a "second signal") to one or more of the multiple stages of the shift register 110. Each of the clock trunk lines CKL and the input (input terminal) of each stage of the shift register 110 are electrically connected via second branch lines 154 extending in the row direction. Each of the clock trunk lines CKL and the second branch lines 154 are electrically connected at second contact portions CPd. In the example shown in FIG. 3, the display panel 1000a has multiple second branch lines 154. Each of the second branch lines 154 may be provided corresponding to one of the clock main lines CKL. Note that the second branch lines 154 may be electrically connected to each of the clock main lines CKL and to another main line connected to the input (input terminal) of each stage of the shift register 110.
[0049] In the example of FIG. 3, eight clock trunk lines CKL1 to CKL8 are provided as n clock trunk lines CKL1 to CKLn (n=8). If the gate clock signals GCK supplied from the clock trunk lines CKL1 to CKL8 are designated GCK1 to GCK8, the gate clock signals GCK1 to GCK8 are oscillating voltages with a period of, for example, 8H (1H is one horizontal scanning period) and a duty ratio of 1:1 (4H of the 8H period are high level and 4H are low level), and their phases differ by 1H. For example, the low-level potential Vgl is −7V and the high-level potential Vgh is 35V. The terminal section TP in the second peripheral area NA2 of the display panel 1000a is provided with terminals (eight clock trunk terminals) electrically connected to the clock trunk lines CKL1 to CKL8, respectively. The gate clock signals GCK1 to GCK8 are supplied from the control circuit CNTL to the clock trunk lines CKL1 to CKL8 connected via the clock trunk terminals. The clock trunk lines CKL1 to CKL8 and the inputs (input terminals) of each stage of the shift register 110 are electrically connected via second branch lines 154 extending in the row direction, so that gate clock signals GCK1 to GCK8 are supplied to the inputs of each stage of the shift register 110. An example of the connection relationship between the inputs of each stage of the shift register 110 and the n clock trunk lines CKL1 to CKLn is as follows: For example, the gate clock signals GCK1 to GCK8 are supplied from the clock trunk lines CKL1 to CKL8 to the inputs of the 1st to 8th stages, respectively; the gate clock signals GCK1 to GCK8 are supplied from the clock trunk lines CKL1 to CKL8 to the inputs of the 9th to 16th stages, respectively; the gate clock signals GCK1 to GCK8 are supplied from the clock trunk lines CKL1 to CKL8 to the inputs of the 17th to 24th stages, respectively; and so on, repeated in the same manner. That is, the gate clock signal GCKk is supplied from the main clock line CKLk to the input of the {(a×n)+k}th stage of the shift register 110 (where a is an integer of 0 or more, and k is an integer of 1 or more and n or less).
[0050] An example of the structure of the first contact portion CPa will be described with reference to Figures 5A and 5B. Figure 5A is a schematic plan view of the first contact portion CPa. Figure 5B is a schematic cross-sectional view of the first contact portion CPa, taken along line 5B-5B' in Figure 5A.
[0051] As described above, at each first contact portion CPa, the first branch wiring 140 and the outer main wiring 122 are electrically connected. The first contact portion CPa has a first contact hole CHa that exposes a portion of the outer main wiring 122 (the first portion R12e1 in the illustrated example) and a portion of the first branch wiring 140 (the first portion R16e1 in the illustrated example). The first portion R12e1 of the outer main wiring 122 and the first portion R16e1 of the first branch wiring 140 are electrically connected through the first contact hole CHa. In this example, the first contact portion CPa further has a first conductive portion 18a formed corresponding to the first contact hole CHa. The first conductive portion 18a includes a portion formed within the first contact hole CHa. The first conductive portion 18a is electrically connected to the first portion R12e1 of the outer main wiring 122 and the first portion R16e1 of the first branch wiring 140, which are exposed within the first contact hole CHa.
[0052] The outer trunks 122 and the inner trunks 124 are included in a first conductive layer of the TFT substrate 101. The first conductive layer is, for example, a conductive layer including the gate electrodes of the TFTs 1 of each pixel P. That is, the first conductive layer is, for example, a gate metal layer. The gate electrodes of the TFTs 1 are formed in the same layer as the gate bus lines GL. That is, the gate electrodes are formed from the same conductive film (gate metal film) as the gate bus lines GL. In this specification, the electrodes and wiring formed from the gate metal film are collectively referred to as the "gate metal layer." That is, the gate metal layer includes multiple gate bus lines GL and the gate electrodes of the TFTs 1 of multiple pixels P. The components of the TFT substrate 101 are supported by a substrate 11 (for example, a glass substrate).
[0053] The first branch wiring 140 is included in a second conductive layer of the TFT substrate 101. The second conductive layer is, for example, a conductive layer including the source electrodes of the TFT1 of each pixel P. That is, the second conductive layer is, for example, a source metal layer. The source electrodes and drain electrodes of the TFT1 are formed in the same layer as the source bus lines SL. That is, the source electrodes and drain electrodes are formed from the same conductive film (source metal film) as the source bus lines SL. In this specification, the electrodes and wiring formed from the source metal film are collectively referred to as the "source metal layer." That is, the source metal layer includes multiple source bus lines SL and the source electrodes and drain electrodes of the TFT1 of multiple pixels P.
[0054] The first contact hole CHa includes a first opening 13a formed in the gate insulating layer 13 between the gate metal layer and the source metal layer, and a first opening 17a formed in the interlayer insulating layer 17 on the source metal layer. In the illustrated example, the first contact hole CHa further includes an opening 16a formed in the first branch wiring 140, but this example is not limiting, and the first contact hole may be formed so as to expose a part of the outer trunk line 122 and a part of the first branch wiring 140. In this example, the source metal layer is formed on the gate metal layer with the gate insulating layer 13 interposed therebetween. The positional relationship between the gate metal layer and the source metal layer may be reversed.
[0055] The first conductive portion 18a is included in a third conductive layer of the TFT substrate 101. The third conductive layer is, for example, a conductive layer including pixel electrodes 5 of a plurality of pixels P. The first conductive portion 18a is made of a transparent conductive material such as ITO. In this example, the third conductive layer is formed on the interlayer insulating layer 17.
[0056] The display panel 1000a may have a plurality of first contact portions CPa. Each of the plurality of first contact portions CPa is formed, for example, to correspond to one of the plurality of first branch wirings 140. In a given first contact portion CPa, the first branch wiring 140 electrically connected to the outer trunk line 122 may be referred to as the first branch wiring 140 corresponding to that first contact portion CPa. In the example shown in FIG. 3, the first branch wiring 140 is provided for each unit area U, and therefore the first contact portion CPa is also provided for each unit area U.
[0057] The display panel 1000a further includes a fourth contact portion CPc and a fifth contact portion CPb. The fourth contact portion CPc and the fifth contact portion CPb may have a structure similar to that of the first contact portion CPa shown in FIGS. 5A and 5B. At the fifth contact portion CPb, the first branch wiring 140 and the inner trunk line 124 are electrically connected. At the fourth contact portion CPc, the inner trunk line 124 and the third branch wiring 152 are electrically connected.
[0058] An example of the structure of the second contact portion CPd will be described with reference to Figures 6A and 6B. Figure 6A is a schematic plan view of the second contact portion CPd. Figure 6B is a schematic cross-sectional view of the second contact portion CPd, taken along line 6B-6B' in Figure 6A.
[0059] As described above, the clock main line CKL and the second branch line 154 are electrically connected at the second contact portion CPd.
[0060] The clock main line CKL is included in the first conductive layer, and the second branch line 154 is included in the second conductive layer. In this example, the clock main line CKL is included in the gate metal layer, and the second branch line 154 is included in the source metal layer.
[0061] The second contact portion CPd has a second contact hole CHd that exposes a portion of the clock main line CKL (the second portion R12d in the illustrated example) and a portion of the second branch line 154 (the second portion R16d in the illustrated example). The second portion R12d of the clock main line CKL and the second portion R16d of the second branch line 154 are electrically connected through the second contact hole CHd. In this example, the second contact portion CPd further has a second conductive portion 18d formed corresponding to the second contact hole CHd. The second conductive portion 18d includes a portion formed within the second contact hole CHd. The second conductive portion 18d is electrically connected to the second portion R12d of the clock main line CKL and the second portion R16d of the second branch line 154, which are exposed within the second contact hole CHd.
[0062] The second contact hole CHd includes a second opening 13d formed in the gate insulating layer 13 between the gate metal layer and the source metal layer, and a second opening 17d formed in the interlayer insulating layer 17 on the source metal layer. In the illustrated example, the second contact hole CHd further includes an opening 16d formed in the second branch wiring 154, but is not limited to this example, and the second contact hole may be formed so as to expose a part of the clock main line CKL and a part of the second branch wiring 154.
[0063] The second conductive portion 18d is included in a third conductive layer. In this example, the second conductive portion 18d is included in the same conductive layer as the pixel electrodes 5 of the plurality of pixels P. The second conductive portion 18d may be formed of a transparent conductive material such as ITO, similar to the first conductive portion 18a.
[0064] The display panel 1000a may have a plurality of second contact portions CPd. Each of the plurality of second contact portions CPd is formed, for example, corresponding to one of the plurality of second branch wirings 154. In a given second contact portion CPd, the second branch wiring 154 electrically connected to the clock trunk line CKL may be referred to as the second branch wiring 154 corresponding to that second contact portion CPd. In the example shown in FIG. 3, each of the plurality of second branch wirings 154 is provided corresponding to one of the clock trunk lines CKL, and therefore the second contact portion CPd is also provided corresponding to each clock trunk line CKL. In the example shown in FIG. 3, the number of second contact portions CPd (i.e., the number of second contact holes CHd) is greater than the number of first contact portions CPa (i.e., the number of first contact holes CHa).
[0065] An example of the structure of the third contact portion CPp will be described with reference to Fig. 7. Fig. 7 is a schematic cross-sectional view of the third contact portion CPp. The display panel 1000a can have a plurality of third contact portions CPp.
[0066] The third contact portion CPp has a third contact hole CHp that exposes another portion of the outer trunk 122 (the third portion R12e2 in the illustrated example). The portion of the outer trunk 122 exposed in the third contact hole CHp does not overlap the portion exposed in the first contact hole CHa. In this example, in a plan view (i.e., when viewed from the normal direction of the TFT substrate 101), the third portion R12e2 of the outer trunk 122 does not overlap the first portion R12e1. In this example, the third contact portion CPp further has a third conductive portion 18p formed corresponding to the third contact hole CHp. The third conductive portion 18p includes a portion formed in the third contact hole CHp. The third conductive portion 18p is electrically connected to the third portion R12e2 of the outer trunk 122 exposed in the third contact hole CHp.
[0067] The third conductive portion 18p is typically included in the same conductive layer as the first conductive portion 18a. That is, the third conductive portion 18p is included in, for example, the third conductive layer. The third conductive portion 18p is included in, for example, the same conductive layer as the pixel electrodes 5 of the multiple pixels P. The third conductive portion 18p can be formed of, for example, a transparent conductive material such as ITO, similar to the first conductive portion 18a.
[0068] As already described, in each of the first contact portions CPa, the corresponding first branch wiring 140 and the outer main line 122 are electrically connected. In contrast, the third contact portion CPp having a third contact hole CHp exposing another part of the outer main line 122 (the third portion R12e2 in the illustrated example) is not intended to electrically connect the first branch wiring 140 and the outer main line 122. The third contact portion CPp is sometimes called a dummy contact portion. When the third contact portion CPp has a third conductive portion 18p, the third conductive portion 18p is not connected to the first branch wiring 140 within the third contact hole CHp. Furthermore, the third conductive portion 18p is not in contact with the first branch wiring 140 within the third contact hole CHp. The third conductive portion 18p is not connected to any conductive portion included in the second conductive layer within the third contact hole CHp. The third conductive portion 18p is electrically connected to the first branch wiring 140 via the outer trunk line 122 electrically connected in the third contact hole CHp. Therefore, the electrical resistance value between the third portion R12e2 exposed in a certain third contact hole CHp and the first branch wiring 140 closest to the third portion R12e2 (i.e., the electrical resistance value between the third portion R12e2 exposed in a certain third contact hole CHp and the first branch wiring 140 having the lowest electrical resistance value between the third portion R12e2 and the third portion R12e2 among the first branch wirings 140 included in the display panel 1000a) is higher than the electrical resistance value between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa. Therefore, in both cases where the third contact portion CPp has the third conductive portion 18p and where it does not have the third conductive portion 18p, the electrical resistance value between the third portion R12e2 exposed in each third contact hole CHp and each of the multiple first branch wirings 140 is higher than the electrical resistance value between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa.
[0069] The display device 1100a has the third contact portion CPp, which reduces the occurrence of defects due to ESD. To explain why the display device 1100a reduces the occurrence of defects due to ESD, a display panel 900 of a comparative example will be described with reference to FIGS. 22, 23A, and 23B. FIG. 22 is a plan view schematically showing the display panel 900 of the comparative example, illustrating a portion of the peripheral region NA. FIGS. 23A and 23B are cross-sectional views schematically showing the display panel 900 of the comparative example, with FIG. 23A being a cross-sectional view taken along line 23A-23A' in FIG. 22 and FIG. 23B being a cross-sectional view taken along line 23B-23B' in FIG. 22.
[0070] As shown in FIG. 22, the display panel 900 of the comparative example differs from the display panel 1000a of the display device 1100a in that it does not have the third contact portion CPp.
[0071] As shown in FIG. 23A, the counter substrate 201 includes a color filter layer 22 supported on a substrate 21 (e.g., a glass substrate) and a transparent conductive layer 28 on the color filter layer 22. The color filter layer 22 may include a color filter and a black matrix BM. If the transparent conductive layer 28 is exposed at the edge of the counter substrate 201, charges (static electricity) may enter through the exposed portions of the transparent conductive layer 28. The charges (static electricity) accumulated in the transparent conductive layer 28 may cause ESD between the transparent conductive layer 28 and the first contact portions CPa of the TFT substrate 101 (particularly, between the first conductive portions 18a if the first contact portions CPa include the first conductive portions 18a). The arrows in the figure schematically indicate the movement of charges. In the peripheral region NA of the TFT substrate 101, the first conductive portions 18a are close to the counter substrate 201, making ESD more likely to occur between the transparent conductive layer 28 of the counter substrate 201 and the first conductive portions 18a. In a display device having a display panel 900 of the comparative example, defects may occur due to ESD occurring in the first contact portion CPa. Specifically, for example, damage may occur to the circuitry constituting the gate drive circuit GD via the first branch wiring 140 corresponding to the first contact portion CPa where ESD has occurred. Alternatively, a malfunction such as melting of the first conductive portion 18a may occur in the first contact portion CPa where ESD has occurred, resulting in a poor connection between the corresponding first branch wiring 140 and the outer trunk line 122. Furthermore, destruction of the insulating layer in and around the first contact portion CPa where ESD has occurred may cause a short circuit with other wiring, which may result in excessive heat generation.
[0072] In contrast, the display device 1100a has the third contact portion CPp, which allows charge accumulated in the transparent conductive layer 28 to be discharged toward the third contact portion CPp, thereby inducing ESD between the third contact portion CPp and the third contact portion CPp. If the third conductive portion 18p is provided at the third contact portion CPp, ESD can be induced between the third contact portion CPp and the third conductive portion 18p. This reduces the probability and frequency of ESD occurring between the transparent conductive layer 28 and the first contact portion CPa due to charge accumulated in the transparent conductive layer 28. Even if ESD occurs at the third contact portion CPp (or the third conductive portion 18p if the third contact portion CPp is provided with the third conductive portion 18p), as already described, the third portion R12e2 of the outer trunk line 122 exposed in the third contact hole CHp at the third contact portion CPp is not in contact with the first branch wiring 140. Therefore, the effect on the electrical connection between the first branch wiring 140 and the outer trunk line 122 is smaller than when ESD occurs at the first contact portion CPa. Furthermore, as described above, the electrical resistance between the third portion R12e2 exposed in each third contact hole CHp and each of the multiple first branch wirings 140 is higher than the electrical resistance between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa. Therefore, even if ESD occurs at the third contact portion CPp, the charge that has flown to the third contact portion CPp (or the third conductive portion 18p if the third contact portion CPp has a third conductive portion 18p) attenuates before reaching the first branch wiring 140. Therefore, the effect on the gate drive circuit GD via the first branch wiring 140 is smaller than when ESD occurs at the first contact portion CPa. In the display device 1100a, the occurrence of defects due to ESD is suppressed.
[0073] Furthermore, in the display panel 900 of the comparative example, as shown in FIG. 23B, charges (static electricity) accumulated in the transparent conductive layer 28 can cause ESD between the second contact portion CPd (or the second conductive portion 18d if the second contact portion CPd is provided with the second conductive portion 18d). ESD is particularly likely to occur in the second contact portion CPd close to the sealing portion 40, i.e., the second contact portion CPd that electrically connects the clock trunk line CKL, which is farthest from the display area AA, to the second branch line 154. FIG. 23B shows an example in which ESD occurs in the second contact portion CPd that electrically connects the clock trunk line CKL8, which is farthest from the display area AA among the clock trunk lines CKL1 to CKL8, to the second branch line 154. As such, in a display device including the display panel 900 of the comparative example, defects can occur due to ESD occurring not only in the first contact portion CPa described above but also in the second contact portion CPd.
[0074] In contrast, as shown in FIG. 4B, the display device 1100a includes the third contact portion CPp, which can reduce the probability and frequency of ESD occurring between the third contact portion CPp and the second contact portion CPd (or the second conductive portion 18d if the second contact portion CPd includes the second conductive portion 18d) due to charges accumulated in the transparent conductive layer 28. The third contact portion CPp is disposed farther from the display area AA than the second contact portion CPd. For example, the position of the third contact portion CPp in the row direction is farther from the display area AA than the position of the second contact portion CPd in the row direction. In other words, the third contact portion CPp is closer to the sealing portion 40 than the second contact portion CPd, which can effectively reduce the probability and frequency of ESD occurring at the second contact portion CPd. The display device 1100a is less susceptible to ESD-related defects.
[0075] The display panel 1000a may have a plurality of third contact portions CPp. As shown in the example of FIG. 3, the number of third contact portions CPp (i.e., the number of third contact holes CHp) is preferably greater than the number of first contact portions CPa (i.e., the number of first contact holes CHa). In this case, ESD is induced toward the conductive portions of the third contact portions CPp (e.g., the third conductive portion 18p), and it is possible to effectively prevent ESD from occurring in the first contact portions CPa.
[0076] 3, the first contact portion CPa and the third contact portion CPp are arranged in a plan view along the direction in which the sealing portion 40 extends (the Y direction in FIG. 3). That is, in a plan view, the arrangement position xa of the first contact portion CPa in the row direction (the X direction in FIG. 3) coincides with the arrangement position xp of the third contact portion CPp in the row direction (xa = xp). The arrangement position of the first contact portion CPa in the row direction in a plan view is defined as the position in the row direction of the reference point of the first contact portion CPa in a plan view. The reference point of the first contact portion CPa in a plan view can be determined arbitrarily, and can be, for example, the center point in the row direction of the first contact hole CHa of the first contact portion CPa in a plan view, or the center point in the row direction of the first conductive portion 18a of the first contact portion CPa in a plan view. The row-direction arrangement positions of the first contact portions CPa in plan view can also be rephrased as the row-direction arrangement positions of the first contact holes CHa in plan view or the row-direction arrangement positions of the first conductive portions 18a in plan view. The same applies to the second contact portions CPd and the third contact portions CPp.
[0077] 3, when the arrangement positions of the plurality of first contact portions CPa in the column direction are defined as first positions and the arrangement positions of the plurality of third contact portions CPp in the column direction are defined as third positions, the plurality of first contact portions CPa and the plurality of third contact portions CPp are formed so that a plurality of third positions exist between two adjacent first positions in the column direction. In this case, ESD is induced toward the third contact portion CPp (or the third conductive portion 18p if the third contact portion CPp is provided with the third conductive portion 18p), and it is possible to effectively prevent ESD from occurring in the first contact portion CPa.
[0078] The third conductive portion 18p of the third contact portion CPp may be included in any of the conductive layers of the TFT substrate 101 of the display panel 1000a, but is preferably included in the same conductive layer (the third conductive layer in this example) as the first conductive portion 18a and the second conductive portion 18d. When the third conductive portion 18p is included in the same conductive layer as the first conductive portion 18a and the second conductive portion 18d, the height of the third conductive portion 18p is equal to the heights of the first conductive portion 18a and the second conductive portion 18d. In this case, the distance d3p of the third conductive portion 18p from the counter substrate 201 is equal to the distance d1a of the first conductive portion 18a from the counter substrate 201 and the distance d1b of the second conductive portion 18d from the counter substrate 201. Here, the distances of the first conductive portion 18a, the second conductive portion 18d, and the third conductive portion 18p from the counter substrate 201 are measured in the normal direction of the TFT substrate 101 or the counter substrate 201.
[0079] 4A , the distance d3p from the third conductive portion 18p to the counter substrate 201 is equal to the distance d1a from the first conductive portion 18a to the counter substrate 201. This is more advantageous than a case in which the distance d3p from the third conductive portion 18p to the counter substrate 201 is longer than the distance d1a from the first conductive portion 18a to the counter substrate 201 in terms of inducing discharge of charges accumulated in the transparent conductive layer 28 toward the third conductive portion 18p of the third contact portion CPp. Note that, from the perspective of reducing the probability and frequency of ESD occurring in the first conductive portion 18a of the first contact portion CPa, it is more preferable to make the distance from the third conductive portion 18p to the counter substrate 201 shorter than the distance from the first conductive portion 18a to the counter substrate 201. However, forming an additional layer to shorten the distance from the third conductive portion 18p to the counter substrate 201 may increase the manufacturing process and manufacturing costs. In contrast, when the third conductive portion 18p is included in the same conductive layer as the first conductive portion 18a, that is, when the third conductive portion 18p is formed from the same conductive film as the first conductive portion 18a, it is possible to suppress the occurrence of ESD in the first conductive portion 18a of the first contact portion CPa while suppressing increases in the manufacturing process and manufacturing costs for providing the third contact portion CPp.
[0080] In FIG. 3, the region where the seal portion 40 is provided is shown as region Asm, and the region where the liquid crystal layer LC is provided is shown as region Alc. As in the example shown in FIG. 3, it is preferable that the first conductive portion 18a, the second conductive portion 18d, and the third conductive portion 18p do not overlap the seal portion 40 in a planar view (i.e., are exposed from the seal portion 40). When the first contact portion CPa is arranged to overlap the seal portion 40 in a planar view, i.e., when the first conductive portion 18a is covered by the seal portion 40, the seal portion 40 is formed on the first conductive portion 18a, which reflects the uneven shape of the first contact hole CHa of the first contact portion CPa. This may result in the seal portion 40 not being able to bond the TFT substrate 101 and the counter substrate 201 with sufficient strength. Similarly, when the second conductive portion 18d and / or the third conductive portion 18p are covered by the seal portion 40, the seal portion 40 may not be able to bond the TFT substrate 101 and the counter substrate 201 with sufficient strength. In particular, the adhesive strength of seal portion 40 tends to weaken when there are a large number of first contact portions CPa, second contact portions CPd, and third contact portions CPp that are arranged to overlap with seal portion 40. In contrast, when first conductive portion 18a, second conductive portion 18d, and third conductive portion 18p are exposed from seal portion 40, the adhesive strength of seal portion 40 is not affected even if the numbers of first contact portions CPa, second contact portions CPd, and third contact portions CPp increase.
[0081] In the example of FIG. 3 , the row-direction width of the outer trunks 122 is larger than the row-direction width of the inner trunks 124. By configuring the row-direction width of the outer trunks 122, which are arranged farther from the display area AA, to be larger than the row-direction width of the inner trunks 124, which are arranged closer to the display area AA, it is possible to suppress an increase in the area where the first branch lines 140 overlap with other trunks (particularly trunks extending in the column direction) in a planar view, thereby suppressing an increase in parasitic capacitance formed therebetween. Furthermore, by increasing the row-direction width of the outer trunks 122, it is possible to reduce the row-direction width of the inner trunks 124 while suppressing an increase in the resistance value of the outer trunks 122. This reduces the area where the second branch lines 154, which electrically connect each clock trunk line CKL with each stage of the shift register 110, overlap with the inner trunks 124 in a planar view. This suppresses an increase in parasitic capacitance formed between the second branch lines 154 and the inner trunks 124. By suppressing an increase in the parasitic capacitance formed between the wiring groups, an increase in the amount of current flowing through the wiring can be suppressed, and as a result, the generation of excessive heat can be suppressed.
[0082] In the above-described display panel 1000a, the third portion exposed in the third contact hole CHp is a part of the outer main line 122. However, without being limited to this example, as will be described in the following embodiments 3 to 6, the third portion exposed in the third contact hole CHp may be a part of an island-shaped conductive portion included in the same conductive layer (i.e., the first conductive layer) as the outer main line 122 and arranged at a distance from the outer main line 122. In either case, the row-direction extent of the third portion overlaps the row-direction extent of the outer main line 122, and the column-direction extent of the third portion overlaps the column-direction extent of the outer main line 122.
[0083] (Embodiment 2) A display panel 1000b included in a display device according to this embodiment will be described with reference to FIGS. 8 and 9. FIG. 8 is a schematic plan view of the display panel 1000b, showing a part of the peripheral area NA. FIG. 9 is a schematic cross-sectional view of the display panel 1000b, taken along line 9A-9A' in FIG. 8. For simplicity, FIG. 9 shows only the TFT substrate 101 included in the display panel 1000b. The following mainly describes the differences from the previous embodiment.
[0084] The display panel 1000b differs from the display panel 1000a in that it further includes a connection portion 161 that electrically connects the third conductive portions 18p of two or more third contact portions CPp. The connection portion 161 is included in a conductive layer different from that of the outer trunk line 122. In this example, the connection portion 161 is included in the same conductive layer (i.e., the second conductive layer) as the first branch wiring 140. For example, the connection portion 161 is included in a source metal layer. The connection portion 161 at least partially overlaps with the outer trunk line 122 in a plan view (i.e., when viewed from the normal direction of the TFT substrate 101). In this example, the connection portion 161 extends in the column direction.
[0085] An example of the structure of the third contact portion CPp of the display panel 1000b will be described with reference to Fig. 10. Fig. 10 is a schematic cross-sectional view of the third contact portion CPp of the display panel 1000b.
[0086] As shown in FIG. 10 , the third contact portion CPp has a third contact hole CHp that exposes another portion of the outer main line 122 (the third portion R12e2 in the illustrated example) and a portion of the connecting portion 161 (the third portion R16e2 in the illustrated example). The third portion R12e2 of the outer main line 122 and the third portion R16e2 of the connecting portion 161 are electrically connected through the third contact hole CHp. In the example shown in FIG. 10 , the third contact portion CPp further has a third conductive portion 18p formed corresponding to the third contact hole CHp. The third conductive portion 18p includes a portion formed within the third contact hole CHp. The third conductive portion 18p is electrically connected to the third portion R12e2 of the outer main line 122 and the third portion R16e2 of the connecting portion 161, both of which are exposed within the third contact hole CHp.
[0087] In a display device including the display panel 1000b, as in the display device 1100a, the third contact portion CPp prevents ESD from occurring at the first contact portion CPa and the second contact portion CPd and the resulting defects. In the display panel 1000b, the third portion R12e of the outer trunk line 122 exposed in the third contact hole CHp at the third contact portion CPp is not in contact with the first branch wiring 140. As in the illustrated example, when the third conductive portion 18p is provided in the third contact portion CPp, the third conductive portion 18p is electrically connected to the first branch wiring 140 via the third portion R12e of the outer trunk line 122 and / or the connection portion 161 electrically connected in the third contact hole CHp. Therefore, the electrical resistance value between the third portion R12e2 exposed in a certain third contact hole CHp and the first branch wiring 140 closest to that third portion R12e2 (i.e., the electrical resistance value between the third portion R12e2 exposed in a certain third contact hole CHp and the first branch wiring 140 having the lowest electrical resistance value between that third portion R12e2 and the first branch wiring 140 of the display panel 1000a) is higher than the electrical resistance value between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa. That is, the electrical resistance value between the third portion R12e2 exposed in each third contact hole CHp and each of the multiple first branch wirings 140 is higher than the electrical resistance value between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa.
[0088] The connection portion 161 may be provided so as to electrically connect the third conductive portions 18p of any two or more of the third contact portions CPp included in the display panel 1000b. The connection portion 161 may be provided so as to electrically connect all of the third contact portions CPp included in the display panel 1000b, or may be provided so as to electrically connect only some (any two or more) of the third contact portions CPp included in the display panel 1000b. The connection portion 161 may be formed so as to further electrically connect the two or more third conductive portions 18p electrically connected to any one of the first conductive portions 18a included in the display panel 1000b.
[0089] (Embodiment 3) A display panel 1000c included in a display device according to this embodiment will be described with reference to FIGS. 11 and 12. FIG. 11 is a schematic plan view of the display panel 1000c, showing a part of the peripheral area NA. FIG. 12 is a schematic cross-sectional view of the display panel 1000c, taken along line 12A-12A' in FIG. 11. For simplicity, FIG. 12 shows only the TFT substrate 101 included in the display panel 1000c. The following mainly describes the differences from the previous embodiment.
[0090] The display panel 1000c differs from the display panel 1000a in that the outer trunk line 122 has one or more cutout portions 122a and one or more conductive islands 128 formed in the cutout portions 122a. The display panel 1000c further differs from the display panel 1000a in that the third contact portions CPp are provided on the conductive islands 128.
[0091] The outer trunk 122 has a first edge 122e1 and a second edge 122e2, which are edges on both sides in the row direction. The first edge 122e1 is on the display area AA side, and the second edge 122e2 is on the opposite side from the display area AA. A notch 122a is formed in the first edge 122e1 of the outer trunk 122. The row-direction length wd of the portion of the outer trunk 122 where the notch 122a is formed is smaller than the row-direction length w0 of the portion of the outer trunk 122 where the notch 122a is not formed. A plurality of notches 122a may be formed in the first edge 122e1 of the outer trunk 122. In the example shown in FIG. 11 , each of the plurality of notches 122a is formed between adjacent first branch wirings 140 among the plurality of first branch wirings 140. 11, the notch portions 122a are formed so that they do not overlap with the first contact portions CPa (the first contact holes CHa and / or the first conductive portions 18a) in a plan view. That is, the first contact portions CPa are formed in portions of the outer trunk lines 122 where the notch portions 122a are not formed. In the example shown in FIG. 11, the notch portions 122a and the island-shaped conductive portions 128 are provided between adjacent first contact portions CPa in a plan view. Note that the shapes of the notch portions 122a and the island-shaped conductive portions 128 in a plan view are not limited to the example shown in the drawing and can be modified as desired.
[0092] The island-shaped conductive portion 128 is formed in the cutout portion 122a and spaced apart from the outer main line 122. The island-shaped conductive portion 128 is included in the same conductive layer as the outer main line 122 (i.e., the first conductive layer). For example, the island-shaped conductive portion 128 is included in a gate metal layer. When multiple cutout portions 122a are formed in the first edge 122e1 of the outer main line 122, multiple island-shaped conductive portions 128 can be provided such that each island-shaped conductive portion 128 is formed in each of the multiple cutout portions 122a. In the example shown in FIG. 11, each of the multiple island-shaped conductive portions 128 is provided between adjacent first branch wirings 140.
[0093] In the example shown in FIG. 11, a plurality of third contact portions CPp are provided corresponding to one island-shaped conductive portion 128.
[0094] An example of the structure of the third contact portion CPp of the display panel 1000c will be described with reference to Fig. 13. Fig. 13 is a schematic cross-sectional view of the third contact portion CPp of the display panel 1000c.
[0095] The third contact portion CPp of the display panel 1000c has a third contact hole CHp that exposes a part of the island-shaped conductive portion 128 (in the illustrated example, the third portion R12e3). In the example of FIG. 13, the third contact portion CPp of the display panel 1000c further has a third conductive portion 18p formed corresponding to the third contact hole CHp. The third conductive portion 18p includes a portion formed in the third contact hole CHp. The third conductive portion 18p is electrically connected to the third portion R12e3 of the island-shaped conductive portion 128 exposed in the third contact hole CHp. The third conductive portion 18p is not connected to any conductive portion included in the second conductive layer within the third contact hole CHp. The third conductive portion 18p is not connected to the first branch wiring 140 within the third contact hole CHp. The third conductive portion 18p is not in contact with the first branch wiring 140 within the third contact hole CHp.
[0096] The range Rx3 in the row direction (X direction in the figure) of the third part R12e3 of the island-shaped conductive portion 128 exposed in the third contact hole CHp overlaps with the range Rx0 in the row direction of the outer main line 122, and the range Ry3 in the column direction (Y direction in the figure) of the third part R12e3 overlaps with the range in the column direction of the outer main line 122.
[0097] The third conductive portion 18p of the display panel 1000c, like the third conductive portion 18p of the display panel 1000a, is included in the third conductive layer. The third conductive portion 18p of the display panel 1000c may be formed from the same conductive film and / or the same material as the third conductive portion 18p of the display panel 1000a. The arrangement positions, number, etc. of the third conductive portions 18p of the display panel 1000c may also be similar to those of the third conductive portion 18p of the display panel 1000a described above. In the example of FIG. 11 , like the display panel 1000a, the arrangement positions of the first contact portions CPa in the row direction coincide with the arrangement positions of the third contact portions CPp in the row direction in a planar view. In the illustrated example, the third conductive portion 18p of the display panel 1000c does not overlap the sealing portion 40 in a planar view. The island-shaped conductive portion 128 can also be formed so as not to overlap the seal portion 40 in plan view.
[0098] In a display device including the display panel 1000c, similar to the display device 1100a, the third contact portion CPp prevents ESD from occurring at the first contact portion CPa and the second contact portion CPd and the resulting defects. In the display panel 1000c, the third conductive portion 18p is electrically connected to the island-shaped conductive portion 128 within the third contact hole CHp, but the island-shaped conductive portion 128 is formed isolated from the outer main line 122, and is not electrically connected to the outer main line 122. Therefore, in the display panel 1000c, the electrical resistance between the third portion R12e3 of the island-shaped conductive portion 128 exposed within each third contact hole CHp and each of the multiple first branch wirings 140 is higher than the electrical resistance between the first portion R12e1 exposed within each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa.
[0099] In the display panel 1000c, the third conductive portion 18p is substantially insulated from the first branch wiring 140, and therefore, when ESD occurs in the third conductive portion 18p of the third contact portion CPp, the effect on the electrical connection between the first branch wiring 140 and the outer trunk line 122 and the effect on the gate drive circuit GD via the first branch wiring 140 is smaller than in the display panel 1000a. The display panel 1000c suppresses the occurrence of defects due to ESD more effectively than the display panel 1000a.
[0100] (Embodiment 4) A display panel 1000d included in a display device according to this embodiment will be described with reference to FIGS. 14 and 15. FIG. 14 is a schematic plan view of the display panel 1000d, showing a portion of the peripheral area NA. FIG. 15 is a schematic cross-sectional view of the display panel 1000d, taken along line 15A-15A' in FIG. 14. For simplicity, FIG. 15 shows only the TFT substrate 101 included in the display panel 1000d. The following mainly describes the differences from the previous embodiment.
[0101] The display panel 1000d differs from the display panel 1000c in that it further includes a first connection portion 148 that electrically connects the third conductive portions 18p of two or more third contact portions CPp. The first connection portion 148 is included in a conductive layer different from that of the outer main line 122. In this example, the first connection portion 148 is included in the same conductive layer (i.e., the second conductive layer) as the first branch wiring 140. For example, the first connection portion 148 is included in the source metal layer. In a plan view (i.e., when viewed from the normal direction of the TFT substrate 101), the first connection portion 148 at least partially overlaps with the island-shaped conductive portion 128 and also at least partially overlaps with the outer main line 122. Furthermore, the first connection portion 148 is formed so as not to overlap with the first contact portion CPa in a plan view.
[0102] An example of the structure of the third contact portion CPp of the display panel 1000d will be described with reference to Fig. 16. Fig. 16 is a schematic cross-sectional view of the third contact portion CPp of the display panel 1000d.
[0103] As shown in FIG. 16, at the third contact portion CPp, a portion of the island-shaped conductive portion 128 (the third portion R12e3 in the illustrated example) and a portion of the first connecting portion 148 (the third portion R16e3 in the illustrated example) are electrically connected. The third contact portion CPp has a third contact hole CHp that exposes the third portion R12e3 of the island-shaped conductive portion 128 and the third portion R16e3 of the first connecting portion 148. In the example of FIG. 16, the third contact portion CPp further has a third conductive portion 18p formed corresponding to the third contact hole CHp. The third conductive portion 18p has a portion formed within the third contact hole CHp. The third conductive portion 18p is electrically connected to the third portion R12e3 of the island-shaped conductive portion 128 exposed in the third contact hole CHp and the third portion R16e3 of the first connecting portion 148.
[0104] In a display device having display panel 1000d, as in a display device having display panel 1000c, the presence of third contact portion CPp prevents ESD from occurring in the first contact portion CPa and the second contact portion CPd and the resulting defects.
[0105] Because the first connection portion 148 at least partially overlaps the outer trunk 122 in a plan view, a capacitance element is formed by the first connection portion 148, the outer trunk 122, and the insulating layer (gate insulating layer 13 in this example) therebetween. When ESD occurs at the third contact portion CPp (or the third conductive portion 18p if the third contact portion CPp has the third conductive portion 18p), charge discharged from the transparent conductive layer 28 of the counter substrate 201 to the third conductive portion 18p can be charged into the capacitance element via the first connection portion 148. Therefore, since the display panel 1000d can absorb ESD shock, it is more effective than the display panel 1000c in suppressing the occurrence of defects due to ESD. Here, because the first connection portion 148 is not electrically connected to the outer trunk 122, different potentials can be supplied to the first connection portion 148 and the outer trunk 122. From the viewpoint of charging the capacitive element with the charge discharged to the third contact portion CPp, it is preferable that the potential of the first connection portion 148 differs from the potential of the outer trunk line 122. Furthermore, even if the first connection portion 148 does not overlap the outer trunk line 122 in plan view, a capacitive element can be formed by the first connection portion 148, the outer trunk line 122, and the insulating layer therebetween, but from the viewpoint of charging the capacitive element with the charge discharged from the transparent conductive layer 28 to the third contact portion CPp, it is preferable that the capacitance value of the capacitive element is large, and therefore it is preferable that the first connection portion 148 at least partially overlaps the outer trunk line 122 in plan view.
[0106] The first connection portion 148 may be provided so as to electrically connect the third conductive portions 18p of any two or more third contact portions CPp included in the display panel 1000d. The first connection portion 148 may be provided so as to electrically connect all of the third contact portions CPp included in the display panel 1000d, or may be provided so as to electrically connect only a portion (any two or more) of the third contact portions CPp included in the display panel 1000d. The first connection portion 148 may be provided so as to electrically connect two or more third conductive portions 18p that are electrically connected to different island-shaped conductive portions 128 included in the display panel 1000d.
[0107] (Embodiment 5) A display panel 1000e included in a display device according to this embodiment will be described with reference to Figures 17A and 17B. Figure 17A is a schematic plan view of the display panel 1000e, showing a portion of the peripheral area NA. Figure 17B is a schematic cross-sectional view of the display panel 1000e, taken along line 17B-17B' in Figure 17A. Differences from the previous embodiment will be mainly described below.
[0108] The display panel 1000e differs from the display panel 1000c in that it further includes second connection portions 182 formed from a transparent conductive material, which electrically connect the island-shaped conductive portions 128 and the outer trunk lines 122. The second connection portions 182 may be included in, for example, the same conductive layer (i.e., the third conductive layer) as the pixel electrodes 5 of the multiple pixels P.
[0109] In a display device having display panel 1000e, as in a display device having display panel 1000c, the presence of third contact portion CPp prevents ESD from occurring in the first contact portion CPa and the second contact portion CPd and the resulting defects.
[0110] In the display panel 1000e, the third conductive portion 18p is electrically connected to the island-shaped conductive portion 128 in the third contact hole CHp, and the island-shaped conductive portion 128 is electrically connected to the outer trunk line 122 via the second connection portion 182. The second connection portion 182 is formed from a transparent conductive material and therefore has a higher electrical resistance than when it is formed from a conductive material that forms, for example, a gate metal layer or a source metal layer. Therefore, in the display panel 1000e, the electrical resistance between the third portion R12e2 exposed in each third contact hole CHp and each of the multiple first branch wirings 140 is higher than the electrical resistance between the first portion R12e1 exposed in each first contact hole CHa and the first branch wiring 140 electrically connected to the first portion R12e1 in that first contact hole CHa.
[0111] In the display panel 1000e, if ESD occurs in the third conductive portion 18p of the third contact portion CPp provided on the island-shaped conductive portion 128, the second connection portion 182, which has a relatively high electrical resistance, may heat up and burn out due to the charge discharged to the third conductive portion 18p. In such a case, it is possible to further reduce the effect on the gate drive circuit GD via the first branch wiring 140 due to the ESD occurring in the third conductive portion 18p. One or more second connection portions 182 may be provided for each island-shaped conductive portion 128, for example.
[0112] The plurality of third contact portions CPp included in the display panel 1000e include a third contact portion CPp(1) provided on the island-shaped conductive portion 128 and a third contact portion CPp(2) provided on the outer main line 122. The third conductive portion 18p included in the third contact portion CPp(1) and the third conductive portion 18p included in the third contact portion CPp(2) are electrically connected by the second connection portion 182, thereby electrically connecting the island-shaped conductive portion 128 and the outer main line 122. The third conductive portion 18p included in the third contact portion CPp(1), the third conductive portion 18p included in the third contact portion CPp(2), and the second connection portion 182 may be formed integrally (continuously).
[0113] The display panel 1000e may further include a first connection portion that electrically connects the third conductive portions 18p of two or more third contact portions CPp, such as the first connection portion 148 included in the display panel 1000d. In particular, when the display panel 1000e further includes a first connection portion that electrically connects two or more third conductive portions 18p that are electrically connected to different island-shaped conductive portions 128 among the multiple third conductive portions 18p included in the display panel 1000e, it is not necessary to provide a second connection portion 182 for each of all the island-shaped conductive portions 128, and one or more second connection portions 182 may be provided for the island-shaped conductive portions 128 that are electrically connected to each other by the first connection portion.
[0114] (Embodiment 6) A display panel 1000f included in a display device according to this embodiment will be described with reference to Fig. 18. Fig. 18 is a schematic plan view of the display panel 1000f, and is a plan view that schematically shows a part of the peripheral area NA. The following mainly describes the differences from the previous embodiment.
[0115] The display panel 1000f differs from the display panel 1000c in that it further includes an ESD protection circuit 192 electrically connected to the island-shaped conductive portion 128 and the outer trunk line 122. By including the ESD protection circuit 192, the display panel 1000f can protect the outer trunk line 122, the first branch line 140, and the gate drive circuit GD from ESD that occurs at the third contact portion CPp provided on the island-shaped conductive portion 128 (or the third conductive portion 18p if the third contact portion CPp includes the third conductive portion 18p). Here, a diode ring 192 is provided as the ESD protection circuit 192. The diode ring 192 is composed of two diode elements connected in parallel between the island-shaped conductive portion 128 and the outer trunk line 122 with their forward directions reversed. One or more ESD protection circuits 192 can be provided for each island-shaped conductive portion 128, for example.
[0116] In a display device having display panel 1000f, as in a display device having display panel 1000c, the presence of third contact portion CPp prevents ESD from occurring in the first contact portion CPa and the second contact portion CPd and the resulting defects.
[0117] The display panel 1000f may further include a first connection portion that electrically connects the third conductive portions 18p of two or more third contact portions CPp, such as the first connection portion 148 included in the display panel 1000d. In particular, when the display panel 1000f further includes a first connection portion that electrically connects two or more third conductive portions 18p that are electrically connected to different island-shaped conductive portions 128 among the multiple third conductive portions 18p included in the display panel 1000f, it is not necessary to provide an ESD protection circuit 192 for each of all the island-shaped conductive portions 128, and one or more ESD protection circuits 192 may be provided for the island-shaped conductive portions 128 that are electrically connected to each other by the first connection portion.
[0118] (Variation 1) Modification 1 of the display panel 1000a of Embodiment 1 will be described with reference to FIG. 19. FIG. 19 is a schematic plan view of a display panel 1000a1 included in a display device according to Modification 1 of Embodiment 1, and is a plan view that schematically shows a part of the peripheral area NA. Differences from the display panel 1000a of Embodiment 1 will be mainly described below. Note that Modification 1 can be applied not only to Embodiment 1 but also to any of the above-mentioned embodiments.
[0119] The display panel 1000a1 differs from the display panel 1000a in that the row-direction position xp of the third contact portion CPp (e.g., the row-direction position of the third contact hole CHp) is farther from the display area AA than the row-direction position xa of the first contact portion CPa (e.g., the row-direction position of the first contact hole CHa).
[0120] In a display device having a display panel 1000a1, as in a display device having a display panel 1000a, the presence of the third contact portion CPp prevents ESD from occurring in the first contact portion CPa and the second contact portion CPd and the resulting defects.
[0121] In a display device having the display panel 1000a1, the third contact portion CPp is disposed farther from the display area AA in the row direction than the first contact portion CPa. That is, the third contact portion CPp is closer to the edge of the counter substrate 201 in the row direction than the first contact portion CPa, so ESD can be effectively induced toward the third contact portion CPp (or the third conductive portion 18p if the third contact portion CPp has the third conductive portion 18p), and the effect of suppressing ESD from occurring in the first contact portion CPa is greater than that of the display panel 1000a.
[0122] (Variation 2) Modification 2 of the display panel 1000a of Embodiment 1 will be described with reference to FIGS. 20 and 21. FIG. 20 is a schematic plan view of a display panel 1000a2 included in a display device according to Modification 2 of Embodiment 1, and is a plan view schematically showing a part of the peripheral area NA. FIG. 21 is a cross-sectional view schematically showing the display panel 1000a2, taken along line 21A-21A' in FIG. 20. Differences from the display panel 1000a of Embodiment 1 will be mainly described below. Note that Modification 2 can be applied not only to Embodiment 1 but also to any of the above-mentioned embodiments.
[0123] The display panel 1000a2 differs from the display panel 1000a in that the opposing substrate 201 has one or more protrusion structures PT that protrude toward the TFT substrate 101 and are located opposite the third contact portion CPp (i.e., located opposite the third contact hole CHp).
[0124] In a display device having display panel 1000a2, as in a display device having display panel 1000a, the presence of third contact portion CPp prevents ESD from occurring in the first contact portion CPa and the second contact portion CPd and the resulting defects.
[0125] In a display device having a display panel 1000a2, a protruding structure PT is provided facing the third contact portion CPp. The distance d3q from the counter substrate 201 to the third contact portion CPp (third conductive portion 18p in the example of FIG. 21) to which the facing protruding structure PT is provided is smaller than the distance d1a from the counter substrate 201 to the first contact portion CPa (first conductive portion 18a in the example of FIG. 21). Therefore, ESD can be effectively induced toward such a third contact portion CPp (for example, third conductive portion 18p), and the effect of suppressing ESD from occurring in the first contact portion CPa is greater than that of the display panel 1000a.
[0126] In the example of FIG. 21, the protrusion structure PT is formed from the same material (color resist) as the color filters included in the color filter layer 22. That is, the protrusion structure PT is formed from the same dielectric film as the color filters included in the color filter layer 22. For example, the color filter layer 22 has a first color filter, a second color filter, and a third color filter that transmit light of different colors. In this example, the protrusion structure PT has a first portion 22R formed from the same dielectric film as the first color filter and a second portion 22G formed from the same dielectric film as the second color filter. The protrusion structure PT may further have a third portion formed from the same dielectric film as the third color filter. The material and structure of the protrusion structure are not limited to the above example.
[0127] The display panel 1000a2 may have a plurality of protruding structures PT. The plurality of protruding structures PT may be provided corresponding to each of the plurality of third contact portions CPp included in the display panel 1000a2, or may be provided corresponding to any two or more of the plurality of third contact portions CPp included in the display panel 1000a2.
[0128] In the above-described embodiment, the third contact hole CHp (third contact portion CPp) is arranged so that the row and column ranges of the third portion exposed by the third contact hole CHp overlap the row and column ranges of the outer trunk line 122 that supplies a first signal that provides a fixed potential (e.g., a signal that provides a low-level potential Vgl) to multiple stages of the shift register. However, this is not limiting. For example, the third contact hole CHp (third contact portion CPp) may be arranged so that the row and column ranges of the third portion exposed by the third contact hole CHp overlap the row and column ranges of a trunk line other than the outer trunk line 122 that is provided in the peripheral region and extends in the column direction (e.g., a clock trunk line that supplies a clock signal to one or more stages of the multiple stages of the shift register; in this case, the first signal corresponds to the clock signal). In this case, ESD can be induced between the third contact hole CHp and the third contact portion CPp, thereby reducing the probability and frequency of ESD occurring between the third contact hole CHp and other contact portions and suppressing the occurrence of defects due to ESD. [Industrial Applicability]
[0129] The display device according to the embodiment of the present invention is widely applicable to active matrix display panels, and the display device according to the embodiment of the present invention can suppress the occurrence of defects caused by ESD and improve the manufacturing yield. [Explanation of symbols]
[0130] 11: substrate, 18a: first conductive portion, 18d: second conductive portion, 18p: third conductive portion, 21: substrate, 22: color filter layer, 28: transparent conductive layer, 40: sealing portion, 101: TFT substrate, 110: shift register, 122: outer trunk line, 124: inner trunk line, 128: island-shaped conductive portion, 140: branch wiring, 148: first connecting portion, 161: connecting portion, 182: second connecting portion, 201: opposing substrate, 510: circuit Circuit board, 1000a, 1000b, 1000c, 1000d, 1000e, 1000f, 1000a1, 1000a2: display panel, 1100a: display device, CHa: first contact hole, CHd: second contact hole, CHp: third contact hole, CPa: first contact part, CPd: second contact part, CPp: third contact part, GD: gate drive circuit, LC: liquid crystal layer
Claims
1. A display device having a plurality of pixels arranged in a matrix having a plurality of pixel rows and a plurality of pixel columns, a display area defined by the plurality of pixels and a peripheral area other than the display area; a gate drive circuit provided in the peripheral region, the gate drive circuit including a shift register having a plurality of stages corresponding to each of the plurality of pixel rows; a first trunk line provided in the peripheral region, extending in a column direction, and supplying a first signal to one or more stages of the plurality of stages of the shift register; one or more first branch lines provided in the peripheral region and electrically connected to the first trunk line; and the first trunk line is included in a first conductive layer; the first branch wiring is included in a second conductive layer, one or more first contact holes exposing a first portion of the first trunk line and a first portion of the first branch line; one or more third contact holes exposing third portions of the conductive portions included in the first conductive layer; and the first portion of the first main line and the first portion of the first branch line are electrically connected to each other through the first contact hole; a range of the third portion in the row direction overlaps a range of the first main line in the row direction, and a range of the third portion in the column direction overlaps a range of the first main line in the column direction, A display device, wherein the electrical resistance value between the third portion and the first branch wiring is higher than the electrical resistance value between the first portion of the first trunk line and the first branch wiring connected to the first portion of the first trunk line.
2. a second trunk line provided in the peripheral region, extending in a column direction, and supplying the first signal to one or more stages of the plurality of stages of the shift register; another trunk line provided in the peripheral region, extending in a column direction, and supplying a second signal to one or more stages of the plurality of stages of the shift register; one or more second branch lines provided in the peripheral region and electrically connected to the other trunk lines; and the first branch wiring electrically connects the first trunk line and the second trunk line; the first trunk line is disposed farther from the display area than the second trunk line and the other trunk lines, the second trunk line and the other trunk line are included in the first conductive layer; the second branch wiring is included in the second conductive layer, further comprising one or more second contact holes exposing a second portion of the other main line and a second portion of the second branch line; 2. The display device according to claim 1, wherein the second portion of the other main line and the second portion of the second branch line are electrically connected to each other through the second contact hole.
3. the one or more first branch wirings are a plurality of first branch wirings, the one or more first contact holes are a plurality of first contact holes formed corresponding to the plurality of first branch wirings, respectively; the one or more third contact holes are a plurality of third contact holes, The display device according to claim 1 , wherein the number of the third contact holes is greater than the number of the first contact holes.
4. When the positions of the first contact holes in the column direction are defined as first positions, and the positions of the third contact holes in the column direction are defined as third positions, 4. The display device according to claim 3, wherein the plurality of first contact holes and the plurality of third contact holes are formed so that there are a plurality of third positions between two adjacent first positions in the column direction.
5. one or more first conductive parts provided corresponding to the one or more first contact holes, each electrically connected to the first portion of the first trunk line and the first portion of the first branch wiring; one or more third conductive portions provided corresponding to the one or more third contact holes, each of which is electrically connected to the third portion; and The display device according to claim 1 , wherein the first conductive portion and the third conductive portion are included in a third conductive layer.
6. one or more first conductive parts provided corresponding to the one or more first contact holes, each electrically connected to the first portion of the first trunk line and the first portion of the first branch wiring; one or more second conductive parts provided corresponding to the one or more second contact holes, each electrically connected to the second portion of the other main line and the second portion of the second branch wiring; one or more third conductive portions provided corresponding to the one or more third contact holes, each of which is electrically connected to the third portion; and The display device according to claim 2 , wherein the first conductive portion, the second conductive portion, and the third conductive portion are included in a third conductive layer.
7. The display device according to claim 5 , wherein the first conductive portion and the third conductive portion are made of a transparent conductive material.
8. a gate electrode of a TFT included in each of the plurality of pixels is included in the first conductive layer; a source electrode of a TFT included in each of the plurality of pixels is included in the second conductive layer; The display device according to claim 7 , wherein a pixel electrode of each of the plurality of pixels is included in the third conductive layer.
9. a first substrate and a second substrate arranged to face each other; a liquid crystal layer provided between the first substrate and the second substrate; a seal portion surrounding the liquid crystal layer; and The display device according to claim 5 , wherein the first conductive portion and the third conductive portion do not overlap the sealing portion in a plan view.
10. the first substrate includes the first conductive layer, the second conductive layer, and the third conductive layer; The display device according to claim 9 , wherein the second substrate has one or more protruding structures that are provided at positions facing the third contact holes and that protrude toward the first substrate.
11. The display device according to claim 1 , wherein the third contact hole is disposed at a position farther from the display area in the row direction than the first contact hole is disposed at a position farther from the display area in the row direction.
12. the third portion is a part of the first trunk line, The display device according to claim 1 , wherein in the third contact hole, the third portion is not connected to any conductive portion included in the second conductive layer.
13. the third portion is a part of the first trunk line, the one or more third conductive parts are a plurality of third conductive parts, The display device according to claim 5 , further comprising a connection portion included in the second conductive layer and electrically connecting two or more third conductive portions of the plurality of third conductive portions.
14. The display device according to claim 13 , wherein the connection portion overlaps with the first trunk line in a plan view.
15. The display device according to claim 13 , wherein the connection portion electrically connects the two or more third conductive portions to any one of the one or more first conductive portions.
16. the first trunk line has one or more notches; the first conductive layer further includes one or more island-shaped conductive portions that are disposed in the cutout portion and spaced apart from the first trunk line; The display device according to claim 1 , wherein the third portion is a part of the island-shaped conductive portion.
17. The display device according to claim 16 , wherein in the third contact hole, the third portion is not connected to any conductive portion included in the second conductive layer.
18. the first trunk line has one or more notches; the first conductive layer further includes one or more island-shaped conductive portions that are disposed in the cutout portion and spaced apart from the first trunk line; the third portion is a part of the island-shaped conductive portion, the one or more third conductive parts are a plurality of third conductive parts, 11. The display device according to claim 5, further comprising a first connection portion included in the second conductive layer and electrically connecting two or more third conductive portions of the plurality of third conductive portions.
19. 19. The display device according to claim 18, wherein the first connection portion at least partially overlaps the island-shaped conductive portion and at least partially overlaps the first trunk line in a plan view.
20. the one or more cutout portions are a plurality of cutout portions, the one or more island-shaped conductive portions are a plurality of island-shaped conductive portions arranged in each of the plurality of cutout portions, 19. The display device according to claim 18, wherein the first connection portion electrically connects two or more third conductive portions, among the plurality of third conductive portions, that are electrically connected to different island-shaped conductive portions.
21. 18. The display device according to claim 17, further comprising a second connection portion formed of a transparent conductive material, which electrically connects the island-shaped conductive portion and the first trunk line.
22. The display device according to claim 17 , further comprising an ESD protection circuit electrically connected to the island-shaped conductive portion and the first trunk line.
Citation Information
Patent Citations
Liquid crystal display device
WO2011067963A1
Semiconductor device
WO2014115810A1