Electronic device

The integration of heterogeneous structures with optical and electrical signal communication in an electronic device enhances computing performance by leveraging flexible substrates and optical trajectories, addressing the limitations of traditional methods.

JP2025159722APending Publication Date: 2025-10-21PANELSEMI CORP
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Patent Information

Application Number
JP2025063625
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-04-08
Filing Date
2025-04-08
Publication Date
2025-10-21

AI Technical Summary

Technical Problem

Existing methods for improving computing performance in processing units, such as reducing transistor size, increasing clock frequency, or adding cores, do not effectively integrate heterogeneous structures for high-speed computing.

Method used

An electronic device integrating a functional substrate, conductive layer, redistribution layer substrates, and computational and memory elements, with optical and electrical signal communication between layers, utilizing flexible substrates and optical trajectories like optical fibers and waveguides for enhanced computing performance.

Benefits of technology

Facilitates high-speed computing by flexibly integrating heterogeneous structures and enabling optical communication between computing and memory elements, maximizing information processing speed and redundancy.

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Abstract

To provide an electronic device that achieves high-speed calculation by integrating heterogeneous structures and applying them to the semiconductor field.SOLUTION: There is provided an electronic device which includes a functional substrate, a conductive layer which includes a plurality of electric circuits and is disposed on the functional substrate, a plurality of redistribution layer substrates arranged along a surface of the functional substrate, a plurality of functional elements disposed on the functional substrate, and a plurality of computing and memory elements disposed on one side of a redistribution layer substrate.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to electronic devices. [Background technology]

[0002] Currently, there are several methods known for increasing the computing performance of processing units. One method is to reduce the size of transistors, thereby arranging them more densely, thereby improving computing performance. Another method is to increase the clock frequency of the processing unit. When the clock frequency of the processing unit is increased, the transistors can perform more work per unit of time, thereby improving computing speed. Another method is to increase the number of cores in the processing unit, thereby allowing more chips and cores to operate simultaneously. Furthermore, improving the chip structure of the processing unit also improves computing performance by increasing the cooperation between different elements within the chip. Summary of the Invention [Problem to be solved by the invention]

[0003] It is an object of one or more exemplary embodiments of the present invention to provide an electronic device that integrates heterogeneous structures for semiconductor applications to achieve high speed computing. [Means for solving the problem]

[0004] The present invention provides an electronic device, comprising a functional substrate, a conductive layer, a plurality of redistribution layer substrates, a plurality of functional elements, and a plurality of computing and memory elements. The functional substrate defines a first surface and a second surface opposite the first surface; the conductive layer includes a plurality of electrical circuits and is disposed on the first surface of the functional substrate; the plurality of redistribution layer substrates are disposed along the first surface of the functional substrate, the redistribution layer substrates including redistribution layers, one or more of the redistribution layer substrates electrically connecting to the one or more electrical circuits of the conductive layer; one redistribution layer communicates with another redistribution layer by electrical signals, optical signals, or both; the functional elements are disposed on the functional substrate and electrically connected to the conductive layer; the plurality of computing elements The memory elements are disposed on one side of the redistribution layer substrate, the one side of the redistribution layer substrate being opposite to the first surface side of the functional substrate. The plurality of computational and memory elements are electrically connected to corresponding redistribution layers of the redistribution layer substrate.

[0005] The present invention provides an electronic device comprising a functional substrate, a conductive layer, a redistribution layer substrate, a plurality of functional elements, and a plurality of computing and memory elements. The functional substrate defines a first surface and a second surface opposite to the first surface; the conductive layer is disposed on the functional substrate and defines a plurality of electrical circuits; the redistribution layer substrate includes a redistribution layer disposed along the first surface of the functional substrate, the redistribution layer substrate corresponding to and electrically connecting to the one or more electrical circuits of the conductive layer; the plurality of functional elements are disposed on the functional substrate and electrically connected to the conductive layer; the plurality of computing and memory elements are disposed on a side of the redistribution layer substrate opposite the first surface of the functional substrate; the plurality of computing and memory elements are electrically connected to the redistribution layer of the redistribution layer substrate, and one computing and memory element communicates with another computing and memory element via at least one of an electrical signal and an optical signal.

[0006] In one embodiment, the redistribution layer substrate is a flexible substrate.

[0007] In one embodiment, a plurality of electrical circuits are arranged in a matrix, and the conductive layer further includes a plurality of conductive current trajectories, which are electrically connected to the plurality of electrical circuits arranged in the matrix.

[0008] In one embodiment, the electronic device further includes a plurality of optical trajectories transmitting the optical signals.

[0009] In one embodiment, one redistribution layer substrate and another redistribution layer substrate are coupled by an optical trajectory.

[0010] In one embodiment, one or more computational and memory elements disposed on the redistribution layer substrate communicate with optical signals transmitted by optical trajectories.

[0011] In one embodiment, at least a portion of the one or more optical trajectories is located below the first surface of the functionalized substrate.

[0012] In one embodiment, the optical trajectory includes an optical fiber, a waveguide, an optical element, and any combination thereof.

[0013] In one embodiment, the waveguide comprises a dielectric slab waveguide, a two-dimensional waveguide, a light pipe, an optical fiber waveguide, or any combination thereof.

[0014] In one embodiment, the waveguide comprises a silicon waveguide, a silicon oxynitride (SiON), a silicon nitride (Si3N4) waveguide, a lithium niobate (LiNbO3) waveguide, an aluminum nitride (AlN) waveguide, an aluminum gallium arsenide (AlGaAs) waveguide, a gallium nitride (GaN) waveguide, a gallium phosphide (GaP) waveguide, or any combination thereof.

[0015] In one embodiment, the waveguide material includes silicon (Si), silicon oxynitride (SiON), silicon nitride (Si3N4), lithium niobate (LiNbO3), aluminum nitride (AlN), aluminum gallium arsenide (AlGaAs), gallium nitride (GaN), gallium phosphide (GaP), or any combination thereof.

[0016] In one embodiment, the optical trajectories are arranged in a matrix.

[0017] In one embodiment, the optical trajectories are arranged along at least one of the vertical and horizontal directions.

[0018] In one embodiment, the optical trajectories are communicated by a redirection unit that redirects the optical signals.

[0019] In one embodiment, multiple optical trajectories can be arranged to intersect and are engaged by a diverting unit where the optical trajectories intersect.

[0020] In one embodiment, the conversion unit includes a photoelectric conversion element.

[0021] In one embodiment, the conversion unit includes a signal expander.

[0022] In one embodiment, the plurality of computing and storage elements disposed correspondingly on the plurality of redistribution layer substrates are the same.

[0023] In one embodiment, at least a portion of the conductive layer defines a pitch, the pitch being 50 μm or less.

[0024] In one embodiment, at least some of the conductive layers define a pitch of 30 μm or less.

[0025] In one embodiment, at least some of the conductive layers define a pitch of 15 μm or less.

[0026] In one embodiment, at least a portion of the conductive layer defines a thickness that is less than or equal to 20 μm.

[0027] In one embodiment, at least a portion of the conductive layer defines a thickness of 10 μm or less.

[0028] In one embodiment, electrical signals, optical signals, or both of a redistribution layer substrate are selectively routed to another redistribution layer substrate.

[0029] In one embodiment, the plurality of computation and storage elements include a plurality of input / output ports, and the number of input / output ports of one computation and storage element is 300 or more. [Brief explanation of the drawings]

[0030] [Figure 1] 1 is a cross-sectional view of an embodiment of an electronic device of the present invention; [Figure 2] FIG. 2 is a cross-sectional view of another embodiment of an electronic device of the present invention. [Figure 3A] 1A and 1B are cross-sectional views of the computational and memory element placement method of the present invention. [Figure 3B] 1A and 1B are cross-sectional views of the computational and memory element placement method of the present invention. [Figure 3C] 1A and 1B are cross-sectional views of the computational and memory element placement method of the present invention. [Figure 4A] 1 shows a cross section of an optical fiber arrangement of the present invention. [Figure 4B] 1 shows a cross section of an optical fiber arrangement of the present invention. [Figure 4C] 1 shows a cross section of an optical fiber arrangement of the present invention. [Figure 5A] FIG. 1 is a plan view showing a plurality of rewiring layer substrates of the present invention arranged on a functional substrate. [Figure 5B] FIG. 1 is a plan view showing a plurality of rewiring layer substrates of the present invention arranged on a functional substrate. [Figure 5C] FIG. 1 is a plan view showing a plurality of rewiring layer substrates of the present invention arranged on a functional substrate. DETAILED DESCRIPTION OF THE INVENTION

[0031] The following describes an electronic device according to a preferred embodiment of the present invention with reference to the drawings, and like elements are designated by like reference numerals. It should be understood that the following description is provided for different embodiments for implementing different aspects. The specific elements and arrangement methods described below are intended to simply and clearly describe the embodiments of the present invention. These embodiments are for illustrative purposes only and do not limit the scope of the present invention. Furthermore, symbols and indications may be used repeatedly in different embodiments, and these are intended to simply and clearly describe the embodiments of the present invention only and do not indicate any relationship between different embodiments and / or structures.

[0032] The present invention provides an electronic device. As shown in FIG. 1, the electronic device 1 comprises a functional substrate 10, a conductive layer 20, a plurality of redistribution layer substrates 30, a plurality of functional elements 40, and a plurality of computational and memory elements 50. The functional substrate 10 has opposing first and second surfaces S1 and S2. The conductive layer 20 includes a plurality of electrical circuits (not shown) and is disposed on the first surface S1 of the functional substrate 10. The redistribution layer substrate 30 is disposed along the first surface S1 of the functional substrate 10 and electrically connects to the plurality of electrical circuits in the conductive layer 20. The ratio of the number of electrical circuits in the conductive layer 20 to the number of redistribution layer substrates 30 disposed on the functional substrate 10 is not limited. The redistribution layer substrate 30 includes a redistribution layer 31 and a plurality of conductive members CM, which electrically connect the redistribution layer 31 to the corresponding electrical circuits disposed on the conductive layer 20. The electrical circuits communicate electrical signals, optical signals, or both to another electrical circuit. The functional elements 40 are disposed on the functional substrate 10 and are electrically connected to the conductive layer 20. The calculation and memory element 50 is disposed on the side of the redistribution layer substrate 30 opposite to the first surface S1 side of the functional substrate 10. The calculation and memory element 50 is electrically connected to the corresponding redistribution layer 31 of the redistribution layer substrate 30.

[0033] The functional substrate 10 includes, but is not limited to, a BT (Bismaleimide Triazine) substrate, a PPO (Polyphenol oxidase) substrate, a Rogers substrate, a glass substrate, a ceramic substrate, or a substrate having a similar function.

[0034] In one embodiment, the electrical circuits of the conductive layer 20 are arranged in a matrix, and the conductive layer 20 further includes a plurality of conductive current trajectories, which are electrically connected to the electrical circuits and transmit electrical signals. In one embodiment, some of the conductive current trajectories of the conductive layer 20 define a pitch of 50 μm or less, or a pitch of 30 μm or less, or a pitch of 15 μm or less, but are not limited thereto. Furthermore, some of the conductive current trajectories of the conductive layer 20 define a thickness of 20 μm or less, or a thickness of 10 μm or less, but are not limited thereto. In one embodiment, the plurality of conductive current trajectories are arranged to cross each other and are engaged with a switching unit (not shown in the figure). A plurality of switching units are disposed at the crossings of the conductive current trajectories, and the function of the conductive current trajectories here is to transmit electrical signals.

[0035] In one embodiment, the redistribution layer substrate 30 is a multilayer board or composite board including a flexible layer 32, which is disposed between the redistribution layer 31 and the conductive layer 20. Furthermore, a connecting layer 33 can be disposed between the redistribution layer 31 and the conductive layer 20 (see FIG. 1 , where the connecting layer 33 can be disposed between the redistribution layer 31 and the conductive layer 20). In some embodiments, the redistribution layer 31 and / or the flexible layer 32 are made of a flexible material, such as, but not limited to, polyimide (PI). Note that the order in which the flexible layer 32 and the connecting layer 33 are fabricated and the materials for fabricating them are not limited. A plurality of electrical circuits can be arranged in a matrix, and the conductive layer 20 further includes a plurality of conductive current trajectories, which are electrically connected to the electrical circuits arranged in a matrix. The conductive members CM can be holes filled with a conductive material and penetrating the flexible layer 32. 1, the conductive member CM further penetrates the connecting layer 33, i.e., the conductive member CM in FIG. 1 penetrates the flexible layer 32 and the connecting layer 33. The conductive member CM electrically connects the conductive layer 20 to the redistribution layer 31. In some embodiments, the conductive material filled in the holes of the conductive member CM may be, but is not limited to, a conductive adhesive, a conductive pillar, a conductive wire, or any combination thereof.

[0036] The functional element 40 includes, but is not limited to, at least one integrated circuit (IC) 41 and at least one passive element 42 (e.g., electrical resistance R, capacitance C, and inductance L). The functional element 40 distributes electrical signals to multiple electrical circuits.

[0037] The computing and storage element 50 includes at least one system-on-chip (SoC) processing unit 51 and at least one storage unit 52, where the storage unit 52 is, for example, but not limited to, high bandwidth memory (HBM). The computing and storage element 50, such as the system-on-chip processing unit 51 and the storage unit 52, includes multiple input / output (I / O) ports, where the number of I / O ports provided on one computing and storage element 50 is 300 or more. In some embodiments, multiple SoC processing units 51 arranged on the same redistribution layer substrate 30 may be of different types, and multiple storage units 52 arranged on the same redistribution layer substrate 30 may be of different types.

[0038] Please refer to FIG. 2. In the electronic device 1', a plurality of computational and memory elements 50 are grouped and disposed on a single redistribution layer substrate 30'. Please note that the arrangement of the plurality of computational and memory elements 50 within each group may be different. Also, in FIG. 2, only one redistribution layer substrate 30' is disposed on the functional substrate 10 and extends along the functional substrate 10, and the redistribution layer substrate 30' is electrically connected to the conductive layer 20. In this embodiment, the redistribution layer substrate 30' may be only a redistribution layer 31'. Also, in this embodiment, the functional substrate 10 is a glass substrate, and the redistribution layer 31' is formed on the glass substrate.

[0039] See Figures 3A and 3B. The electronic device 1A further includes a plurality of optical trajectories 61 for transmitting optical signals. The optical trajectories 61 can be directly disposed on the functional substrate 10 or the redistribution layer substrate 30. In Figure 3A, the optical trajectory 61 is directly disposed on the functional substrate 10 and communicates with at least two redistribution layer substrates 30, with the plurality of optical trajectories 61 corresponding to the plurality of redistribution layer substrates 30. The electronic device further includes a photoelectric unit 62, which includes one or more optical sensors 621 and one or more photoelectric conversion elements 622. The photoelectric unit 62 can be disposed within or on the redistribution layer substrate 30. The optical trajectory 61 can be directly or indirectly coupled to the plurality of photoelectric units 62. The calculation and memory unit 50 communicates with the photoelectric unit 62. In some embodiments, one or more optical trajectories 61 communicate with another redistribution layer substrate 30, and the optical trajectories 61 may be optical fibers. One or more computing and memory units 50 disposed in one redistribution layer substrate 30 communicate with one or more computing and memory units 50 disposed in another redistribution layer substrate 30 via optical signals transmitted by the optical trajectories 61. The optical trajectories 61 in this embodiment include optical fibers, waveguides, optical elements, and any combination thereof. Optical elements include, but are not limited to, reflectors. The optical sensor 621 is a light-emitting diode (LED), and its optical sensor function is achieved by a reverse-biased LED. One or more photoelectric units 62, particularly the optical sensor 621 shown in FIG. 3A, are disposed on the surface of the redistribution layer substrate 30, within the redistribution layer substrate 30, or between the redistribution layer substrate 30 and the functional substrate 10. 3B, one or more photoelectric units 62, particularly, photo sensors 621', of electronic device 1B are disposed on the surface of redistribution substrate 30, and after computing and memory elements 50 are disposed on redistribution substrate 30, photo sensors 621' are located between the connection pads of computing and memory elements 50. One photoelectric conversion element 622 can be disposed corresponding to one or more photo sensors 621.

[0040] In FIG. 3C, the redistribution layer substrate 30' may be only the redistribution layer 31' shown in FIG. 2. In this embodiment, only one redistribution layer substrate 30' (or redistribution layer 31') is disposed on the functional substrate 10. Also, multiple functional elements 40 are disposed on the redistribution layer 31'. In other words, multiple functional elements 40 are indirectly disposed on the functional substrate 10. In this embodiment, one computing and memory element 50' communicates with another computing and memory element 50'' via an optical signal transmitted by an optical trajectory 61. However, the two computing and memory elements 50', 50'' can also communicate with each other via an electrical signal. The electronic device 1' shown in FIG. 3C also includes an optical sensor 621 and a photoelectric conversion element 622.

[0041] The optical trajectory 61, for example, an optical fiber, can bridge the double wiring layer substrate without being disposed on the functional substrate 10.

[0042] An optical trajectory, such as an optical fiber, is disposed within a receiving chamber of an electronic device, and the receiving chamber may be formed within the functional substrate 10, the redistribution layer substrate 30, or both. In the following embodiments, the receiving chamber may be disposed within the functional substrate 10, the flexible layer 32 of the redistribution layer substrate 30, or both, but is not limited thereto. In FIG. 4A, a receiving chamber 70A is formed by two corresponding recessed areas located in the functional substrate 10 and the flexible layer 32 of the redistribution layer substrate 30, respectively, and an optical fiber 61A is disposed within the receiving chamber 70A. In FIG. 4B, a receiving chamber 70B for disposing an optical fiber 61B is formed with a recessed area located on one side of the functional substrate 10 and the flexible layer 32 covering the recessed area. In FIG. 4C, a receiving chamber 70C for disposing an optical fiber 61C is formed with a recessed area located on one side of the flexible layer 32 and the functional substrate 10 covering the recessed area. However, at least a portion of the optical fiber is disposed below the first surface S1 of the functional substrate 10.

[0043] 5A , a plurality of redistribution layer substrates 30 are disposed on a functional substrate 10, and the plurality of redistribution layer substrates 30 are connected by electrical signals, and the trajectories that transmit the electrical signals are conductor current trajectories 21A and 21B. In this embodiment, the plurality of redistribution layer substrates 30 are arranged in a matrix, and the redistribution layer substrates 30 are connected by conductor current trajectories 21A arranged along the Y direction and conductor current trajectories 21B arranged along the X direction.

[0044] In addition, signals transmitted within electronic devices can also include optical signals. See FIG. 5B, optical trajectories 61 (61D and 61E) can be arranged in conjunction with conductive current trajectories. Optical trajectories 61 connect multiple redistribution layer substrates 30, and one or more computing and memory devices 50 installed in a redistribution layer substrate 30 communicate with computing and memory devices 50 installed in another redistribution layer substrate 30 through optical signals transmitted through the optical trajectories 61. The optical trajectories 61 can include optical fibers, waveguide optical structures, or both. See FIG. 5B, the multiple redistribution layer substrates 30 and the multiple optical trajectories 61 are all arranged in a matrix. In this embodiment, the optical trajectory 61D arranged along the Y direction and the optical trajectory 61E arranged along the X direction are considered as main optical trajectories 61 controlling the multiple redistribution layer substrates 30, and the main optical trajectories 61 can be made of optical fibers. Furthermore, among the optical trajectories 61 arranged in a matrix, the other optical trajectories 61 except the main optical trajectory 61 are considered sub-optical trajectories 61, and the sub-optical trajectories 61 connect the corresponding optical trajectories 61D or 61E to the multiple redistribution layer substrates 30. As shown in FIG. 5B or 5C, the electronic device further includes one or more conversion units 63, which change the transmission direction of the optical signal. The conversion units 63 are disposed at the overlapping or intersecting portions of the multiple optical trajectories 61. In FIG. 5B, the conversion units 63 are disposed at the intersecting portions of each optical trajectory 61. In FIG. 5C, conversion units 63 are disposed only at the intersecting portions of some optical trajectories 61. In this embodiment, the conversion units 63 are photoelectric conversion elements and further include signal amplifiers. In some embodiments, the ratio of the number of intersections of the optical trajectories to the number of conversion units 63 installed is 4 or more, but is not limited thereto. Furthermore, the transfer unit 63 may include a bundle of optical fibers or a set of optical conductors to guide a plurality of optical signals to a corresponding redistribution layer substrate 30 or a corresponding computing and storage element 50 .

[0045] In one embodiment, electrical signals, optical signals, or both, from one redistribution layer substrate 30 are selectively routed to one or more other redistribution layer substrates 30. In other words, if one redistribution layer substrate 30 or one or more of the computing and memory elements 50 disposed thereon fails, the signals will bypass the failed redistribution layer substrate 30 and be routed to one or more other normal redistribution layer substrates 30.

[0046] In summary, the electronic device of the present invention can be applied to the semiconductor industry, where high-speed computing performance is required, by flexibly integrating heterogeneous structures and further optically arranging them. The computing and storage elements include a system-on-chip (SoC) processor and high-bandwidth memory (HBM), thereby maximizing the speed of information processing. Furthermore, the coupling of electrical and optical signals can realize high-speed communication between any two redistribution layer substrates with different computing and storage elements.

[0047] The above description is for illustrative purposes only and is not intended to be limiting. Any modifications or variations made within the spirit and scope of the present invention should fall within the scope of the appended claims. [Explanation of symbols]

[0048] 1, 1', 1A, 1B Electronic equipment 10 Functional substrates 20 Conductive layer 21A, 21B Conductive current trace 30, 30' redistribution layer board 31, 31' redistribution layer 32 flexible layer 33 Connecting layer 40 Functional elements 41 Integrated Circuits 42 Passive elements 50, 50', 50' ' Computational and memory elements 51 System-on-chip processing device 52 Memory Unit 61, 61D, 61E optical trajectory 61A, 61B, 61C Optical Fiber 62 Optical Unit 63 Conversion Unit 621, 621' Light Sensor 622 Photoelectric conversion element 70A, 70B, 70C Containment chambers CM Conductive material S1 1st surface S2 2nd surface R Electrical resistance C capacitance L inductance

Claims

1. a functionalized substrate defining a first surface and a second surface opposite the first surface; a conductive layer disposed on the functional substrate and defining a plurality of electrical circuits; a plurality of rewiring layer substrates arranged along the first surface of the functional substrate; a plurality of functional elements disposed on the functional substrate and electrically connected to the conductive layer; The redistribution layer substrate includes a plurality of computing and memory elements disposed on a side opposite to the first surface side of the functional substrate; One or more of the redistribution layer substrates include a redistribution layer, and one or more of the redistribution layer substrates are electrically connected to one or more of the electrical circuits of the conductive layer; and the redistribution layer substrates communicate with another of the redistribution layer substrates via at least one of electrical signals or optical signals; a plurality of said computing and memory elements electrically connected to the redistribution layers of said redistribution layer substrate;

2. 2. The electronic device according to claim 1, wherein the rewiring layer substrate is a flexible substrate.

3. 2. The electronic device according to claim 1, wherein a plurality of the electrical circuits are arranged in a matrix, the conductive layer further includes a plurality of conductive current trajectories, the plurality of conductive current trajectories being electrically connected to the plurality of the electrical circuits arranged in the matrix.

4. The electronic device of claim 1 , further comprising a plurality of optical trajectories transmitting the optical signals.

5. The electronic device according to claim 4 , wherein the redistribution layer substrate and the other redistribution layer substrate are coupled by one or more corresponding optical trajectories.

6. 5. The electronic device of claim 4, wherein one or more of the computation and memory elements disposed corresponding to the redistribution layer substrate communicate with the optical signal transmitted by the optical trajectory.

7. The electronic device of claim 4 , wherein at least a portion of one or more of the optical trajectories is located below the first surface of the functionalized substrate.

8. 5. The electronic device of claim 4, wherein the optical trajectory comprises an optical fiber, a waveguide, an optical element, and any combination thereof.

9. 5. The electronic device according to claim 4, wherein the optical trajectories are arranged in a matrix.

10. 5. The electronic device according to claim 4, wherein the optical trajectories are arranged along at least one of a vertical direction and a horizontal direction.

11. 5. The electronic device of claim 4, wherein the optical trajectories are connected by a redirection unit that redirects the optical signals.

12. The electronic device according to claim 11, wherein the conversion unit comprises a photoelectric conversion element.

13. 13. The electronic device of claim 12, wherein the conversion unit includes a signal amplifier.

14. 5. The electronic device of claim 4, wherein a plurality of said optical trajectories can be arranged to intersect and are engaged by a diverting unit where said optical trajectories intersect.

15. 15. The electronic device of claim 14, wherein the conversion unit comprises a photoelectric conversion element.

16. 16. The electronic device of claim 15, wherein the conversion unit includes a signal amplifier.

17. 2. The electronic device according to claim 1, wherein the plurality of computing and memory elements arranged corresponding to the plurality of redistribution layer substrates are the same.

18. 2. The electronic device of claim 1, wherein at least a portion of the conductive layer defines a pitch, the pitch being 50 [mu]m or less.

19. 10. The electronic device of claim 1, wherein at least a portion of the conductive layer defines a thickness, the thickness being less than or equal to 20 [mu]m.

20. 2. The electronic device according to claim 1, wherein the electrical signal, the optical signal, or both of the redistribution layer substrates are selectively transmitted to another redistribution layer substrate.

21. 2. The electronic device of claim 1, wherein the plurality of computation and memory elements include a plurality of input / output ports, and the number of input / output ports of one computation and memory element is 300 or more.

22. a functionalized substrate defining a first surface and a second surface opposite the first surface; a conductive layer disposed on the functional substrate and defining a plurality of electrical circuits; a rewiring layer substrate disposed along the first surface of the functional substrate; a plurality of functional elements disposed on the functional substrate and electrically connected to the conductive layer, and a plurality of calculation and memory elements disposed on the side of the redistribution layer substrate opposite to the first surface side of the functional substrate; The redistribution layer substrate includes a redistribution layer, and the redistribution layer substrate is electrically connected to one or more of the electrical circuits of the conductive layer; An electronic device characterized in that a plurality of the computing and memory elements are electrically connected to the redistribution layer of the redistribution layer substrate, and the computing and memory elements communicate with other computing and memory elements via at least one of electrical signals or optical signals.