Physical reservoir element and physical reservoir
By integrating a sample-and-hold circuit and nonlinear elements, the physical reservoir element addresses the challenge of insufficient short-term memory, enhancing its ability to process time series data through nonlinear signal interactions and retention.
Patent Information
- Application Number
- JP2025065066
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-04-16
- Filing Date
- 2025-04-10
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2045-04-10
AI Technical Summary
Existing physical reservoirs face challenges in achieving sufficient short-term memory performance when implemented using electronic circuits, leading to insufficient performance in processing time series data.
Incorporating a first input terminal, a second input terminal, a first sample-and-hold circuit, and a first nonlinear circuit in the physical reservoir element, which enhances the short-term memory performance by holding and converting input signals for a certain period, allowing for nonlinear interactions among physical reservoir elements.
The physical reservoir element exhibits improved short-term memory performance, enabling effective processing of time series data by retaining past information for a specific duration and facilitating nonlinear signal transformations.
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Figure 2025162994000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a physical reservoir element, a physical reservoir, and an information processing device. [Background technology]
[0002] Neuromorphic devices are elements that mimic the human brain through neural networks, allowing AI and other systems to efficiently perform complex calculations. Neuromorphic devices artificially mimic the relationship between neurons and synapses in the human brain.
[0003] A neural network, for example, has hierarchically arranged nodes (neurons in the brain) and transmission means (synapses in the brain) that connect them. A neural network increases the rate of correct answers to questions as the transmission means (synapses) learn. Learning is performed to optimize the weights in the transmission means (synapses) so that the desired output is obtained.
[0004] Recurrent neural networks are known as one type of neural network. Recurrent neural networks can handle nonlinear time series data. Nonlinear time series data is data whose values change over time, such as stock prices. Recurrent neural networks can process time series data based on memory by returning the processing results of neurons in later layers to neurons in earlier layers.
[0005] Reservoir computing is one method for realizing recurrent neural networks. Reservoir computing can express complex dynamics by allowing signals to interact with each other based on internal connections, including recurrent connections. In recent years, attempts have been made to realize the concept of reservoir computing using actual elements, as described in, for example, Non-Patent Document 1. The actual implementation of the concept of reservoir computing using actual elements is called physical reservoir computing. In physical reservoir computing, the nodes of the reservoir layer in mathematical reservoir computing are realized using physically fabricated elements such as electronic devices. The basic elements that realize physical reservoir computing are called physical reservoir elements. A physical reservoir element replaces the nodes of the reservoir layer in mathematical reservoir computing with physical electronic devices. A computational system or hardware that includes a reservoir layer composed of physical reservoir elements, an input unit that weights input signals, and an output unit that outputs desired information from the physical reservoir elements is called a physical reservoir. [Prior art documents] [Non-patent literature]
[0006] [Non-Patent Document 1] K. Toprasertpong, E. Nako, Z. Wang, R. Nakane, M. Takenaka, and S. Takagi, “Reservoir computing on a silicon platform with a ferroelectric field-effect transistor”, Communications Engineering, 1, 21, August 2022. (DOI: 10.1038 / s44172-022-00021-8). Summary of the Invention [Problem to be solved by the invention]
[0007] There is a demand for a physical reservoir element, a physical reservoir, and an information processing device that have excellent short-term memory performance. [Means for solving the problem]
[0008] The physical reservoir element of the present disclosure comprises a first input terminal, a second input terminal, a first sample-and-hold circuit, a first output terminal, and a first nonlinear circuit. The first input terminal is configured to be connected to an input source that transmits an input signal to the physical reservoir element. The second input terminal is configured to be connected to at least one other physical reservoir element. The first nonlinear circuit is located between the first input terminal and the first sample-and-hold circuit. The first terminal of the first sample-and-hold circuit is configured to receive a combined signal obtained by combining signals from the first input terminal and the second input terminal, and the second terminal of the first sample-and-hold circuit is connected to the first output terminal. The first output terminal is configured to be connected to at least one other physical reservoir element. The first sample-and-hold circuit holds and converts the combined signal. [Effects of the Invention]
[0009] The physical reservoir element, physical reservoir, and information processing device of the present disclosure have excellent short-term memory performance. [Brief explanation of the drawings]
[0010] [Figure 1] FIG. 2 is a conceptual diagram of a neural network simulated by a physical reservoir according to the first embodiment. [Figure 2] 1 is a configuration diagram of an information processing device according to a first embodiment. [Figure 3] FIG. 2 is a configuration diagram of another example of the information processing device according to the first embodiment. [Figure 4] FIG. 2 is a configuration diagram of a physical reservoir according to the first embodiment. [Figure 5] FIG. 2 is a circuit diagram of a physical reservoir element according to the first embodiment. [Figure 6] 1 is a circuit diagram of an example of a sample-and-hold circuit according to a first embodiment. [Figure 7] 3A and 3B are diagrams for explaining the operation of the sample-and-hold circuit according to the first embodiment. [Figure 8] FIG. 1 is a circuit diagram of a nonlinear circuit according to a first embodiment. [Figure 9] FIG. 3 is a diagram showing the nonlinear characteristics of the physical reservoir element according to the first embodiment. [Figure 10] FIG. 10 is a plan view of a capacitor according to a first modified example. [Figure 11] FIG. 10 is a cross-sectional view of a capacitor according to a first modified example. [Figure 12] FIG. 10 is a circuit diagram of a sample-and-hold circuit according to a second modification. [Figure 13] FIG. 10 is a circuit diagram of a sample-and-hold circuit according to a third modified example. [Figure 14] FIG. 10 is a circuit diagram of a sample-and-hold circuit according to a fourth modification. [Figure 15] FIG. 10 is a circuit diagram of a physical reservoir element according to a second embodiment. [Figure 16] FIG. 10 is a circuit diagram of a physical reservoir element according to a third embodiment. [Figure 17] FIG. 10 is a circuit diagram of a physical reservoir element according to a fourth embodiment. [Figure 18] FIG. 10 is a circuit diagram of a physical reservoir element according to a fifth embodiment. [Figure 19] FIG. 10 is a circuit diagram of a physical reservoir element according to a sixth embodiment. [Figure 20] FIG. 13 is a configuration diagram of a physical reservoir according to a seventh embodiment. [Figure 21] FIG. 13 is a configuration diagram of a physical reservoir according to an eighth embodiment. [Figure 22] FIG. 13 is a configuration diagram of a physical reservoir according to a ninth embodiment. [Figure 23] FIG. 20 is a configuration diagram of a physical reservoir according to a tenth embodiment. [Figure 24] FIG. 22 is a configuration diagram of a physical reservoir according to an eleventh embodiment. [Figure 25] FIG. 23 is a configuration diagram of a physical reservoir according to a twelfth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0011] The present disclosure will be described in detail below with reference to the drawings as appropriate. The drawings used in the following description may show characteristic portions enlarged for convenience in order to make the features of the present disclosure easier to understand, and the dimensional ratios of each component may differ from the actual ones. The materials, dimensions, etc. exemplified in the following description are merely examples, and the present disclosure is not limited thereto. Appropriate changes can be made within the scope of the effects of the present disclosure.
[0012] One of the performance requirements for a physical reservoir is short-term memory performance. Short-term memory performance is a measure of how much past information can be remembered and forgotten. In general, a physical reservoir with optimal short-term memory performance for a given task outputs an estimated solution by taking into account the necessary data from the time series data up to the present, while ignoring data older than necessary. However, when attempting to realize a physical reservoir using electronic circuits or physical elements, it is difficult to ensure sufficient short-term memory performance. A physical reservoir with insufficient short-term memory performance outputs an estimated solution using only the data immediately preceding the time series data, resulting in insufficient performance.
[0013] The present disclosure has been made in consideration of the above circumstances, and provides a physical reservoir element, a physical reservoir, and an information processing device that have excellent short-term memory performance.
[0014] "First embodiment" The physical reservoir according to this embodiment is a device that implements mathematical reservoir computing, which is a type of recurrent neural network.
[0015] FIG. 1 is a conceptual diagram of a neural network simulated by a physical reservoir according to the first embodiment. The neural network NN shown in FIG. 1 is a conceptual schematic diagram of reservoir computing. The neural network NN shown in FIG. 1 has an input layer Lin and the reservoir layer R and the output layer L out The input layer L in and the output layer L out is connected to the reservoir layer R.
[0016] input layer L in is the input signal S in is input to the reservoir layer R. The input signal S in is, for example, a signal detected by a sensor. in The input signal S can be either an analog signal or a digital signal. in may be composed of a plurality of signals. Also, resistors or the like may be connected in series to each input signal to give it a different weight.
[0017] The reservoir layer R is a function of the input layer L in The reservoir layer R stores input signals from nodes n and converts them into other signals. In the reservoir layer R, the connection weights between each node n are fixed values set by random numbers or other methods, and generally, the connection weights between each node n are not subject to learning. The reservoir layer R causes the input signals to change nonlinearly. The input signals change over time as they interact with each other within the reservoir layer R. The reservoir layer R has multiple nodes n. Nodes n correspond to neurons in a neural circuit, and connections between nodes n correspond to synapses. Generally, multiple nodes n are connected randomly, but the connection weights and topology between nodes can be optimized in advance, and the connection relationships and connection coefficients of multiple nodes n can be determined based on this. For example, a signal output from a node n at time t may return to the node n that output the signal at time t+1. Node n performs processing based on the signals at time t and time t+1, and information is processed recursively.
[0018] Output layer L out is an output signal S based on a signal input from the reservoir layer R. out The output layer L out has weights for weighting the output of the reservoir layer R, and performs inference using those weights. outThe weights are optimized through the learning process. In the learning process, the output layer L out The output from the reservoir layer R is compared with the training data D by the comparator C, and the node n of the reservoir layer R and the output layer L out The weight w applied between node n and the output layer L is adjusted. The weight w is determined during the learning process. out is the input signal S in The inference based on the weight w is output as the signal S out Output as
[0019] 2 is a configuration diagram of an information processing device 200 according to the first embodiment. The information processing device 200 is hardware for operating a neural network NN.
[0020] The information processing device 200 includes, for example, a physical reservoir 201, a processor 202, a memory 203, and a communication device 204. The physical reservoir 201, the processor 202, the memory 203, and the communication device 204 are connected to each other via a bus 205.
[0021] The physical reservoir 201 is a computing device that performs the processing of the above-mentioned neural network NN. The processor 202 executes a program stored in the memory 203. The memory 203 has a program storage area for storing the program and an information storage area for storing information from the physical reservoir 201. The memory 203 is, for example, a dynamic random access memory (DRAM), a static random access memory (SRAM), a hard disk drive (HDD), or a solid state drive (SSD). The physical reservoir 201 performs learning processing or inference processing based on instructions from the processor 202. The communication device 204 outputs a signal to the outside of the information processing device 200. The communication device 204 may be wired or wireless.
[0022] The information processing device 200 is an example of an information processing device according to the first embodiment, and the information processing device is not limited to this example. For example, Fig. 3 is a configuration diagram of another example of an information processing device according to the first embodiment. As in the information processing device 200A shown in Fig. 3, a physical reservoir 201, a processor 202, a memory 203, and a communication device 204 may be connected to each other without the intervention of a bus 205.
[0023] 4 is a configuration diagram of a physical reservoir 100 according to the first embodiment. The physical reservoir 100 is an example of a physical reservoir 201, and the circuit performs processing of a neural network NN. The physical reservoir 100 realizes the concept of a mathematical neural network NN in a physical device.
[0024] The physical reservoir 100 includes a reservoir 1, an input section 2, and a readout 3. The input section 2 is shown in the input layer L in Reservoir 1 corresponds to reservoir layer R in FIG. 1. Readout 3 corresponds to output layer L in FIG. out The input unit 2 may include, for example, a plurality of sensors and a digital-to-analog converter when the physical elements in the reservoir layer R receive analog signals as input. The readout 3 may include, for example, an analog-to-digital converter, a product-sum operation circuit, a comparison circuit, and an output circuit. Note that the processing of the readout 3 after digital conversion by the analog-to-digital converter may be performed by the processor 202.
[0025] Reservoir 1 includes a plurality of physical reservoir elements 10. At least one of the physical reservoir elements included in reservoir 1 is a physical reservoir element 10, which will be described later. The number of physical reservoir elements 10 included in reservoir 1 is not limited. Each physical reservoir element 10 has, for example, a first input terminal 11, a second input terminal 12, a first output terminal 13, and a second output terminal 14. Different physical reservoir elements 10 are connected by wiring connecting the second input terminal 12 to the first output terminal 13. In the example shown in FIG. 4, the plurality of physical reservoir elements 10 are connected in a ring shape by wiring connecting the second input terminal 12 to the first output terminal 13. The connections between the physical reservoir elements 10 shown in FIG. 4 are merely an example, and the connections between the physical reservoir elements 10 and the arrangement of the physical reservoir elements 10 are not limited thereto.
[0026] 5 is a circuit diagram of a physical reservoir element 10 according to the first embodiment. The physical reservoir element 10 has, for example, a first input terminal 11, a second input terminal 12, a first output terminal 13, a second output terminal 14, a sample-and-hold circuit 20, and a nonlinear circuit 30. The physical reservoir element 10 may also have a resistor, an amplifier, etc. The sample-and-hold circuit 20 is an example of a first sample-and-hold circuit. The nonlinear circuit 30 is an example of a first nonlinear circuit provided to impart nonlinear conversion performance to the physical reservoir.
[0027] The first input terminal 11 is connected to, for example, the input section 2. The input section 2 receives an input signal S in The first input terminal 11 is connected to an input source that transmits an input signal S to the physical reservoir 100 via the input section 2. in The first input terminal 11 is configured to be connectable to an input source that transmits an input signal S in The first input terminal 11 may receive an analog output sensor signal as an input source as is, or may receive a signal that has passed through a voltage follower circuit, or may receive a digital output sensor signal that has been converted into an analog signal via a digital-to-analog converter, and the form of the signal input to the first input terminal 11 is not important.
[0028] The second input terminal 12 is configured to be connectable to at least one other physical reservoir element 10. The second input terminal 12 is connected to, for example, a first output terminal 13 of the other physical reservoir element 10. The second input terminal 12 receives a signal P in is entered.
[0029] The sample-and-hold circuit 20 holds the signal input thereto for a certain period of time and converts the signal input thereto.
[0030] The first terminal 21 is a signal input terminal of the sample-and-hold circuit 20. The first terminal 21 is connected to, for example, the nonlinear circuit 30 connected to the first input terminal 11 and the second input terminal 12. The first terminal 21 receives a combined signal S m is entered.
[0031] Here, the output signal of the nonlinear circuit 30 is the input signal S input to the first input terminal 11. in is the signal due to the input signal S in The signal P from the second input terminal 12 is a signal obtained by nonlinearly converting the signal P in is a signal P from another physical reservoir element 10 input to the second input terminal 12. in It may be the signal itself, or the signal P in In the example shown in FIG. in That is the input signal S in and merge at signal S m This becomes:
[0032] The second terminal 22 is a signal output terminal of the sample and hold circuit 20. The second terminal 22 is connected to the first output terminal 13. The second terminal 22 may be connected to the second output terminal 14. The second terminal 22 outputs the converted signal S converted by the sample and hold circuit 20. c Output.
[0033] 6 is a circuit diagram of an example of a sample-and-hold circuit 20 according to the first embodiment. The sample-and-hold circuit 20 includes a first terminal 21, a second terminal 22, a first switch 23, a second switch 24, a first capacitor 25, an amplifier 26, and an inverter 27.
[0034] The first switch 23 is located between the first terminal 21 and the first capacitor 25. The second switch 24 is located between the second terminal 22 and the first capacitor 25. Known switches, such as MOSFETs, can be used for the first switch 23 and the second switch 24. The first switch 23 operates with a first clock signal CLK1, and the second switch 24 operates with a second clock signal CLK2. The first clock signal CLK1 and the second clock signal CLK2 are input from the processor 202.
[0035] 6, the second clock signal CLK2 is the first clock signal CLK1 inverted by the inverter 27. Therefore, when the first switch 23 is ON, the second switch 24 is OFF, and when the second switch 24 is ON, the first switch 23 is OFF.
[0036] The first capacitor 25 is located between the first switch 23 and the second switch 24. One electrode of the first capacitor 25 is connected to a wire connecting the first switch 23 and the amplifier 26, and the other electrode of the first capacitor 25 is, for example, grounded. The first capacitor 25 accumulates charge when the first switch 23 is ON and the second switch 24 is OFF, and discharges charge when the first switch 23 is OFF and the second switch 24 is ON. The amplifier 26 is connected to the first capacitor 25. The amplifier 26 amplifies the potential of the first capacitor 25.
[0037] The sample and hold circuit 20 receives the combined signal S m and the merge signal S m Converting this to the converted signal S c 7 is a diagram for explaining the operation of the sample and hold circuit 20 according to the first embodiment.
[0038] When the first switch 23 is ON and the second switch 24 is OFF, the merged signal S m reaches the first capacitor 25. The first capacitor 25 m That is, the combined signal is held in the first capacitor 25 for a certain period of time.
[0039] Next, when the first switch 23 is turned OFF and the second switch 24 is turned ON, the charge accumulated in the first capacitor 25 is discharged. m is converted to a discrete-time signal, and the converted signal S c The amplifier 26 amplifies the signal based on the charge accumulated in the first capacitor 25.
[0040] The sample and hold circuit 20 receives the combined signal S m is held in the first capacitor 25 for a certain period of time and is controlled to propagate the held signal to the next physical reservoir element, thereby improving the short-term memory performance of the physical reservoir 100. The next physical reservoir is the physical reservoir to which the control signals controlling the first switch 23 and the second switch are connected in the next cycle. Also, the sample-and-hold circuit 20 holds the combined signal S m Convert the signal S c This contributes to the nonlinear conversion performance of the physical reservoir 100. The duty ratio between the first clock signal CLK1 and the second clock signal CLK2 does not necessarily have to be 50:50 and can be freely designed.
[0041] The nonlinear circuit 30 is connected to the first input terminal 11 and the first terminal 21 of the sample-and-hold circuit 20. The nonlinear circuit 30 is, for example, a horizontal resistor circuit. FIG. 8 is a circuit diagram of an example of the nonlinear circuit 30 according to the first embodiment. The nonlinear circuit 30 is not limited to the example shown in FIG. 8, and for example, only the left half or the right half of the left-right symmetrical circuit shown in FIG. 8 may be used as the nonlinear circuit.
[0042] The nonlinear circuit 30 nonlinearly converts the first signal S1 into a second signal S2 and outputs the converted signal. The second signal S2 and the first signal S1 satisfy, for example, the relational expression y≠ax+b. In this relational expression, y is the second signal S2, x is the first signal S1, and a and b are arbitrary values. The first signal S1 is converted into the input signal S in is.
[0043] The nonlinear circuit 30 enhances the nonlinear performance of the physical reservoir 100. The reservoir 100 receives an input signal S in into a nonlinear space, and the more nonlinear the signal transformation of the reservoir 1, the greater the expressive power of the physical reservoir 100. Even if the physical reservoir element 10 does not have the nonlinear circuit 30, the nonlinear transformation occurs in the sample-and-hold circuit 20, so the nonlinear circuit 30 is not essential in the physical reservoir element 10. However, if the physical reservoir element 10 has the nonlinear circuit 30, the physical reservoir 100 can process more complex signals.
[0044] The nonlinear characteristics of the nonlinear circuit 30 can be changed by changing the gate length, gate width, and gate voltage of the transistor Tr included in the nonlinear circuit 30.
[0045] Preferably, the nonlinear characteristics of the multiple physical reservoir elements 10 included in the physical reservoir 100 vary. For example, the nonlinear characteristics of the nonlinear circuit 30 in at least one of the multiple physical reservoir elements 10 differ from the nonlinear characteristics of the nonlinear circuit 30 in another physical reservoir element 10 of the multiple physical reservoir elements 10.
[0046] The nonlinear characteristic represents the degree of nonlinearity between the input and output. When the second signal S2 and the first signal S1 satisfy the relational expression y≠ax+b, a nonlinear relationship is established. However, there are many different types of nonlinear relationships. For example, functions expressed as exponential, logarithmic, sinusoidal, or higher-order polynomials are all nonlinear functions, and combinations of these are also nonlinear functions. When there is variation in the nonlinear characteristics of multiple physical reservoir elements 10, the degree of nonlinear transformation in each physical reservoir element 10 is not constant, and the degree of nonlinear transformation differs among the physical reservoir elements 10. When there is variation in the degree of nonlinear transformation in each physical reservoir element 10, for example, the slope of the resistance change with respect to the applied voltage, the way in which the resistance saturates, and the offset that serves as the reference for the resistance change differ among the physical reservoir elements 10.
[0047] The first output terminal 13 is configured to be connectable to at least one other physical reservoir element 10. The first output terminal 13 is connected to, for example, the second input terminal 12 of the other physical reservoir element 10. The first output terminal 13 outputs a signal P out The input signal S input from the first input terminal 11 is output. in and the signal P input from the second input terminal 12 in is transformed while propagating through the physical reservoir element 10, resulting in a signal P out becomes.
[0048] The second output terminal 14 is configured to be connectable to the readout 3. In the physical reservoir 100, the second output terminal 14 is connected to the readout 3. The output signal output from the second output terminal 14 is output to the outside via the readout 3.
[0049] In the physical reservoir 100 according to the first embodiment, a plurality of physical reservoir elements 10 are connected to each other, and signals interact with each other while undergoing nonlinear conversion between the physical reservoir elements 10. FIG. 9 is a graph showing the measurement of the nonlinear conversion characteristics of the nonlinear circuit 30 according to the first embodiment. The horizontal axis of FIG. 9 represents the voltage V corresponding to the signal input to the nonlinear circuit 30. inThe vertical axis of FIG. 9 represents the current I corresponding to the signal output from the nonlinear circuit 30. out 9, the signal output from the nonlinear circuit 30 is nonlinearly converted from the signal input to the nonlinear circuit 30. The physical reservoir 100 implements the mechanism of the neural network NN as a physical circuit (hardware) rather than as software.
[0050] In addition, the physical reservoir 100 according to the first embodiment receives an input signal S from the input unit 2 to each of the plurality of physical reservoir elements 10. in is input, and this input signal S in is held for a certain period by the sample-and-hold circuit 20. in The fact that the physical reservoir 100 retains past information for a certain period of time leads to the retention of past information within the physical reservoir 100. In other words, the physical reservoir 100 according to the first embodiment has excellent short-term memory performance. The short-term memory performance of the physical reservoir 100 using the physical reservoir element 10 shown in FIG. 5 was 60. In contrast, the short-term memory performance of the physical reservoir using a physical reservoir element obtained by removing the sample-and-hold circuit 20 from the physical reservoir element 10 shown in FIG. 5 was 15. It can be confirmed that the short-term memory performance of the physical reservoir 100 is improved by including the sample-and-hold circuit 20 in the physical reservoir element 10.
[0051] Although an example of the physical reservoir 100 according to the first embodiment has been described in detail so far, the physical reservoir according to the first embodiment can be modified and changed in various ways within the scope of the gist of the present disclosure.
[0052] 6 is a capacitor having a fixed capacitance, but the first capacitor 25 may be a variable capacitor whose capacitance is variable. A specific example in which the first capacitor 25 is a variable capacitor will be described below.
[0053] Fig. 10 is a plan view of a first capacitor according to a first modification. Fig. 11 is a cross-sectional view of the first capacitor according to the first modification. The first capacitor 25 has a first conductive layer 25A, a second conductive layer 25B, a capacitance layer 25C, a first electrode 25D, a second electrode 25E, and a third electrode 25F. The conductance of the first capacitor 25 changes with changes in the magnetization of the first conductive layer 25A and the second conductive layer 25B, which sandwich the capacitance layer 25C. The periphery of the first capacitor 25 is covered with, for example, an insulating layer 25G.
[0054] The first conductive layer 25A is a ferromagnetic layer containing a ferromagnetic material. The first conductive layer 25A may be a ferromagnetic layer made of a ferromagnetic material.
[0055] The ferromagnetic material may be, for example, a metal selected from the group consisting of Cr, Mn, Co, Fe, and Ni, an alloy containing one or more of these metals, or an alloy containing these metals and at least one of B, C, and N. The ferromagnetic material may include, for example, any material selected from the group consisting of a CoPt alloy, a CoNi alloy, a TbFeCo alloy, a CoFe alloy, or an alloy in which a portion of these alloys is substituted. Examples of the ferromagnetic material include Co-Fe, Co-Fe-B, and Ni-Fe.
[0056] The ferromagnetic material may be, for example, a Heusler alloy. Heusler alloys are half-metallic and have high spin polarization. Heusler alloys are intermetallic compounds with a chemical composition of XYZ or X2YZ, where X is a transition metal element or a noble metal element of the Co, Fe, Ni, or Cu group on the periodic table, Y is a transition metal element or an element species of X of the Mn, V, Cr, or Ti group, and Z is a typical element of groups III to V. Examples of Heusler alloys include Co2FeSi, Co2FeGe, Co2FeGa, Co2MnSi, and Co2Mn 1-a Fe a Al b Si 1-b , Co2FeGe 1-c Ga c etc.
[0057] The first conductive layer 25A has a first magnetic domain A1 and a second magnetic domain A2, and a domain wall DW exists at the boundary between the first magnetic domain A1 and the second magnetic domain A2.
[0058] The domain wall DW is configured to be able to move in a first direction within the plane of the first conductive layer 25A, at least in the region of the first conductive layer 25A that overlaps with the capacitance layer 25C in the stacking direction. For example, the domain wall DW is configured to be able to move in the x direction within the first conductive layer 25A. The x direction is one direction within the plane in which each layer extends. The y direction is a direction perpendicular to the x direction within the plane in which each layer extends. The z direction is a direction perpendicular to the x and y directions.
[0059] The domain wall DW moves in the x-direction by changing the potential difference between the first electrode 25D and the second electrode 25E. The domain wall DW moves, for example, by applying a write current (e.g., a current pulse) in the x-direction of the first conductive layer 25A, or by applying an external magnetic field to the first conductive layer 25A. For example, when a write pulse is applied between the first electrode 25D and the second electrode 25E, the domain wall DW moves.
[0060] The first magnetic domain A1 has a first region A11 and a second region A12. The magnetizations in the first magnetic domain A1 are oriented in the same direction. The magnetization M of the first region A11 A11 and the magnetization M of the second region A12 A12 are oriented in the same direction.
[0061] The first region A11 is a region that overlaps with the first electrode 25D when viewed from the z direction, and has a magnetization M A11 The first region A11 is a region where the magnetization is fixed. The magnetization being fixed means that the magnetization does not reverse during normal operation of the first capacitor 25 (when no external force exceeding the expected value is applied). The first region A11 is called a first magnetization fixed region.
[0062] The second region A12 is a region other than the first region A11 in the first magnetic domain A1. The volume of the second region A12 changes as the domain wall DW moves.
[0063] The second magnetic domain A2 has a third region A21 and a fourth region A22. The magnetizations in the second magnetic domain A2 are oriented in the same direction. The magnetizations in the second magnetic domain A2 are oriented in a different direction from the magnetizations in the first magnetic domain A1. The magnetization M of the third region A21 A21 and the magnetization M of the fourth region A22 A22 are oriented in the same direction.
[0064] The third region A21 is a region that overlaps with the second electrode 25E when viewed from the z direction, and has a magnetization M A21 The third region A21 is called a second magnetization fixed region.
[0065] The fourth region A22 is a region other than the third region A21 in the second magnetic domain A2. The volume of the fourth region A22 changes as the domain wall DW moves.
[0066] The second region A12 and the fourth region A22 are collectively referred to as a domain wall motion region. The domain wall motion region is sandwiched between the first magnetization fixed region and the second magnetization fixed region.
[0067] The second conductive layer 25B is in contact with the capacitance layer 25C. The first conductive layer 25A and the second conductive layer 25B sandwich the capacitance layer 25C.
[0068] The second conductive layer 25B is a ferromagnetic layer containing a ferromagnetic material. The second conductive layer 25B may be a ferromagnetic layer made of a ferromagnetic material. The second conductive layer 25B may be made of the same material as the material constituting the first conductive layer 25A. The material constituting the second conductive layer 25B and the material constituting the first conductive layer 25A may be the same or different. The magnetization M of the second conductive layer 25B 25B is more difficult to reverse than the magnetization of the first conductive layer 25A.
[0069] The capacitance layer 25C is sandwiched between the first conductive layer 25A and the second conductive layer 25B. The capacitance layer 25C is a dielectric layer. The capacitance layer 25C has insulating properties, and electric charges are stored in the first conductive layer 25A and the second conductive layer 25B that sandwich the capacitance layer 25C.
[0070] The capacitance layer 25C may contain, for example, one selected from the group consisting of magnesium oxide (MgO), aluminum oxide (Al2O3), titanium oxide (TiO2), barium titanate (BaTiO3), magnesium aluminate (MgAl2O4), silicon oxide (SiO2), magnesium titanate (MgTiO3), and hafnium oxide (HfO2). The composition ratio of each element in these oxides is not limited to a stoichiometric composition. When the capacitance layer 25C contains one of these materials, the capacitance of the first capacitor 25 changes over a wider range.
[0071] The capacitance layer 25C may contain, for example, aluminum nitride (AlN) or aluminum nitride doped with one selected from the group consisting of calcium, strontium, titanium, and potassium. When the capacitance layer 25C contains these materials, it has the effect of increasing capacitance. Furthermore, when the capacitance layer 25C contains these materials, the electrical conductivity of the capacitance layer 25C is improved, and heat generation due to current flow can be suppressed. As a result, it is possible to suppress large temperature changes in the first capacitor 25 during use.
[0072] The capacitance layer 25C may contain any one selected from the group consisting of lead titanate (PbTiO), strontium titanate (SrTiO), lead zirconate (PbZrO), lead hafnate (PbHfO), and relaxor ferroelectrics. When the capacitance layer 25C contains one of these materials, the dielectric constant of the capacitance layer 25C increases, and the capacitance of the first capacitor 25 increases.
[0073] The first electrode 25D and the second electrode 25E are, for example, ferromagnetic layers. The first electrode 25D and the second electrode 25E can be made of, for example, the same material as the first conductive layer 25A and the second conductive layer 25B. The third electrode 25F is in contact with the second conductive layer 25B. The third electrode 25F is a conductor.
[0074] The capacitance of first capacitor 25 changes by applying a potential difference between first electrode 25D and second electrode 25E and applying a write current (write pulse) to first conductive layer 25A. The capacitance of first capacitor 25 changes in an analog manner by applying an electric signal in one direction within the plane of first conductive layer 25A.
[0075] The write current (write pulse) moves the domain wall DW in the first conductive layer 25 A. The position of the domain wall DW changes depending on the magnitude of the write current (write pulse).
[0076] The capacitance of the first capacitor 25 is determined by the second conductive layer 25B and the magnetization M 25B The larger the region where the magnetization of the second conductive layer 25B and the magnetization M are antiparallel to each other, the larger the magnetization of the first conductive layer 25A becomes. 25B The capacitance of the first capacitor 25 decreases as the area where the magnetization of the first conductive layer 25A and the magnetization of the first magnetic domain A1 are parallel expands. The capacitance of the first capacitor 25 increases as the first magnetic domain A1 expands, and the capacitance of the second magnetic domain A2 decreases as the second magnetic domain A2 expands. For example, the capacitance of the first capacitor 25 varies between 1 μF and 1 pF.
[0077] If the capacitance of the first capacitor 25 is variable, it is possible to change the short-term memory performance according to the task given to the physical reservoir 100. For example, if taking into account older data in the time series data improves estimation accuracy, it is possible to increase the capacitance of the first capacitor 25 and improve the short-term memory performance.
[0078] Furthermore, the configuration of the sample and hold circuit 20 is not limited to the configuration shown in FIG.
[0079] 12 is a circuit diagram of a sample and hold circuit 20A of a physical reservoir according to Modification 2. The sample and hold circuit 20A differs from the sample and hold circuit 20 shown in FIG.
[0080] In the sample-and-hold circuit 20A, control signals are input to each of the first switch 23 and the second switch 24 to control ON / OFF. A first control signal CTL1 that controls ON / OFF of the first switch 23 and a second control signal CTL2 that controls ON / OFF of the second switch 24 are input separately. The first control signal CTL1 and the second control signal CTL2 are independently variable.
[0081] When the second control signal CTL2 and the first control signal CTL1 are controlled separately, the duty ratio of the first control signal CTL1 and the second control signal CTL2, the frequency of the first control signal CTL1 and the second control signal CTL2, etc. become variable. m The retention time in the sample-and-hold circuit 20A varies depending on the ON / OFF timing of the first switch 23 and the second switch 24. By adjusting this retention time and the timing of signal retention, the short-term memory performance of the physical reservoir can be adjusted.
[0082] 13 is a circuit diagram of a sample and hold circuit 20B of a physical reservoir according to a third modification. The sample and hold circuit 20B differs from the sample and hold circuit 20 shown in FIG. 6 in that it has a voltage follower circuit 28 between the first terminal 21 and the first switch 23.
[0083] The sample and hold circuit 20B has the effect of isolating the circuit with the voltage follower circuit 28. The sample and hold circuit 20B can perform more accurate signal processing by blocking signals from subsequent circuits.
[0084] FIG. 14 is a circuit diagram of a physical reservoir sample-and-hold circuit 20C according to a fourth modification. The sample-and-hold circuit 20C differs from the sample-and-hold circuit 20 shown in FIG. 6 in that a switch 29 is provided between the first switch 23 and the first capacitor 25. The switch 29 may be a known switch, such as a MOSFET. When the switch 29 is turned on, the charge stored in the first capacitor 25 is completely discharged. The sample-and-hold circuit 20C can control the amount of charge remaining in the first capacitor 25 by turning the switch 29 on and off.
[0085] The characteristic configurations of the first to fourth modifications may be combined. For example, the first capacitor 25 according to the second to fourth modifications may be a variable capacitor. Also, for example, the sample-and-hold circuit 20A of the first modification may be provided with an amplifier 28 or a switch 29. Also, for example, the sample-and-hold circuit 20B of the second modification may be provided with a switch 29.
[0086] "Second embodiment" 15 is a circuit diagram of a physical reservoir element 10A of a physical reservoir according to the second embodiment. The physical reservoir element 10A according to the second embodiment can be substituted for the physical reservoir element 10 of the physical reservoir 100 according to the first embodiment. The physical reservoir element 10A differs from the physical reservoir element 10 according to the first embodiment in that it includes a nonlinear circuit 31. In the physical reservoir element 10A, components similar to those of the physical reservoir element 10 are denoted by the same reference numerals, and descriptions thereof will be omitted.
[0087] The nonlinear circuit 31 is connected to the second input terminal 12 and the first terminal 21 of the sample-and-hold circuit 20. The nonlinear circuit 31 is an example of a second nonlinear circuit. The nonlinear circuit 31 is a circuit similar to the nonlinear circuit 30, such as a horizontal resistor circuit. The nonlinear circuit 31 nonlinearly converts a signal input to the nonlinear circuit 31 and outputs the converted signal.
[0088] The nonlinear circuit 31 enhances the nonlinear characteristics of the physical reservoir. In reservoir computation, it is known that the expressive power of the reservoir computation increases when each node has diverse nonlinear transformation capabilities. Therefore, the higher the nonlinear performance and diversity of the signal transformation of the physical reservoir element, the higher the expressive power of the physical reservoir.
[0089] The nonlinear characteristics of the nonlinear circuit 31 can be changed by changing the gate length, gate width, and gate voltage of the transistor Tr included in the nonlinear circuit 31, similar to the nonlinear circuit 30. The nonlinear characteristics of the nonlinear circuit 31 may be the same or different in each physical reservoir element 10A included in the physical reservoir.
[0090] In the physical reservoir according to the second embodiment, a plurality of physical reservoir elements 10A are connected to each other, and the physical reservoir elements 10A interact with each other while undergoing nonlinear signal conversion. The plurality of physical reservoir elements 10A can hold input signals for a certain period of time using a sample-and-hold circuit 20. The physical reservoir 100 according to the second embodiment has excellent short-term memory performance, similar to the physical reservoir 100 according to the first embodiment.
[0091] The same modifications as those in the first embodiment 10 can be applied to the physical reservoir element 10A according to the second embodiment.
[0092] "Third embodiment" 16 is a circuit diagram of a physical reservoir element 10B of a physical reservoir according to the third embodiment. The physical reservoir element 10B according to the third embodiment can be substituted for the physical reservoir element 10 of the physical reservoir 100 according to the first embodiment. The physical reservoir element 10B differs from the physical reservoir element 10 according to the first embodiment in that it includes a sample-and-hold circuit 40. In the physical reservoir element 10B, components similar to those of the physical reservoir element 10 are denoted by the same reference numerals, and descriptions thereof will be omitted.
[0093] The sample and hold circuit 40 is connected to the sample and hold circuit 20 and the first output terminal 13 or the second output terminal 14. The sample and hold circuit 40 is an example of a second sample and hold circuit. The sample and hold circuit 40 is, for example, a capacitor. One electrode of the capacitor is connected between a branch point of the wiring between the first output terminal 13 and the second output terminal 14 and the second terminal 22 of the sample and hold circuit 20. The other electrode of the capacitor is, for example, grounded.
[0094] The sample and hold circuit 40 accumulates a portion of the signal output from the second terminal 22 of the sample and hold circuit 20. By retaining a portion of the signal in the sample and hold circuit 40, the short-term memory performance of the physical reservoir can be improved.
[0095] The physical reservoir according to the third embodiment has excellent short-term memory performance, similar to the physical reservoir 100 according to the first embodiment.
[0096] The physical reservoir element 10B according to the third embodiment can also be modified in the same manner as in the first embodiment 10. The nonlinear circuit 31 according to the second embodiment may also be applied to the physical reservoir element 10B according to the third embodiment.
[0097] "Fourth embodiment" 17 is a circuit diagram of a physical reservoir element 10C of a physical reservoir according to the fourth embodiment. The physical reservoir element 10C according to the fourth embodiment can be substituted for the physical reservoir element 10 of the physical reservoir 100 according to the first embodiment. The physical reservoir element 10C differs from the physical reservoir element 10 according to the first embodiment in that it includes an output adjustment unit 50. In the physical reservoir element 10C, components similar to those of the physical reservoir element 10 are denoted by the same reference numerals, and descriptions thereof will be omitted.
[0098] The output adjustment unit 50 is connected to the second terminal 22 of the sample and hold circuit 20 and the first output terminal 13. The output adjustment unit 50 adjusts the signal P out The output adjustment unit 50 changes the magnitude of the signal Pout Decrease or increase the strength of the
[0099] The output adjustment unit 50 is, for example, a resistor. The output adjustment unit 50 may be a gain adjustment circuit. The gain adjustment circuit includes, for example, an amplifier, an attenuator, etc. The output adjustment unit 50 adjusts the signal P out By changing the size of the physical reservoir elements 10C, the coupling between the physical reservoir elements 10C is changed. The coupling between the physical reservoir elements 10C is a parameter that affects the short-term memory performance of the physical reservoir. By adjusting the coupling between the physical reservoir elements 10C, the short-term memory performance of the physical reservoir can be changed.
[0100] The physical reservoir according to the fourth embodiment has excellent short-term memory performance, similar to the physical reservoir 100 according to the first embodiment.
[0101] The physical reservoir element 10C according to the fourth embodiment can also be modified in the same manner as in the first embodiment 10. Moreover, the nonlinear circuit 31 according to the second embodiment, the sample-and-hold circuit 40 according to the third embodiment, or both of them may be applied to the physical reservoir element 10C according to the fourth embodiment.
[0102] "Fifth embodiment" 18 is a circuit diagram of a physical reservoir element 10D of the physical reservoir according to the fifth embodiment. The physical reservoir element 10D according to the fifth embodiment can be substituted for the physical reservoir element 10 of the physical reservoir 100 according to the first embodiment. The physical reservoir element 10D differs from the physical reservoir element 10 according to the first embodiment in that it includes voltage follower circuits 61 and 62. In the physical reservoir element 10D, components similar to those of the physical reservoir element 10 are denoted by the same reference numerals, and descriptions thereof will be omitted.
[0103] The voltage follower circuit 61 is located between the first input terminal 11 and the nonlinear circuit 30. The voltage follower circuit 61 is an example of a first voltage follower circuit. The voltage follower circuit 62 is located between the second input terminal 12 and the first terminal 21 of the sample and hold circuit 20. The voltage follower circuit 62 is an example of a second voltage follower circuit. The voltage follower circuit 62 may be located between the first output terminal 13 and the second terminal 22 of the sample and hold circuit 20.
[0104] The voltage follower circuits 61 and 62 separate the influence of the impedance between the circuits. When the physical reservoir has the voltage follower circuits 61 and 62, the respective circuits can be separated, and the influence of the impedance between the circuits can be eliminated. In addition, the return of the signal from the physical reservoir element 10D, which is the subsequent stage in the signal propagation direction, can be suppressed, and the signal P out This can reduce noise.
[0105] The physical reservoir element 10D may have at least one of a voltage follower circuit 61 and a voltage follower circuit 62.
[0106] The physical reservoir according to the fifth embodiment has excellent short-term memory performance, similar to the physical reservoir 100 according to the first embodiment.
[0107] The same modifications as those of the first embodiment 10 can be applied to the physical reservoir element 10D according to the fifth embodiment. Furthermore, the nonlinear circuit 31 according to the second embodiment, the sample-and-hold circuit 40 according to the third embodiment, the output adjustment unit 50 according to the fourth embodiment, or a combination thereof may be applied to the physical reservoir element 10C according to the fifth embodiment.
[0108] "Sixth embodiment" 19 is a circuit diagram of a physical reservoir element 10E of a physical reservoir according to the sixth embodiment. The physical reservoir element 10E according to the sixth embodiment can be substituted for the physical reservoir element 10 of the physical reservoir 100 according to the first embodiment. The physical reservoir element 10E differs from the physical reservoir element 10 according to the first embodiment in that it includes an output circuit 70. In the physical reservoir element 10E, components similar to those of the physical reservoir element 10 are denoted by the same reference numerals, and descriptions thereof will be omitted.
[0109] The output circuit 70 includes, for example, a switch. The switch switches the connection between the second terminal 22 and the second output terminal 14. When the switch is ON, the output signal S out When the switch is OFF, the output signal S is output from the second output terminal 14 to the readout 3. out is not output.
[0110] The output circuit 70 may also include a voltage follower circuit. The voltage follower circuit included in the output circuit 70 is an example of a third voltage follower circuit. When the output circuit 70 includes a voltage follower circuit, the influence of the impedance between the readout 3 and the physical reservoir element 10E can be eliminated.
[0111] The output circuit 70 may also include an amplifier, which increases the strength of the signal output to the readout.
[0112] The physical reservoir according to the sixth embodiment has excellent short-term memory performance, similar to the physical reservoir 100 according to the first embodiment.
[0113] The same modifications as those of the first embodiment 10 can be applied to the physical reservoir element 10E according to the sixth embodiment. Furthermore, the nonlinear circuit 31 according to the second embodiment, the sample-and-hold circuit 40 according to the third embodiment, the output adjustment unit 50 according to the fourth embodiment, the voltage follower circuits 61, 61 according to the fifth embodiment, or a combination of these may be applied to the physical reservoir element 10E according to the sixth embodiment.
[0114] Seventh Embodiment 20 is a configuration diagram of a physical reservoir 101 according to the seventh embodiment. The physical reservoir 101 has a reservoir 4, an input unit 2, and a readout 3. The reservoir 4 differs from the reservoir 1 according to the first embodiment in that some of the multiple physical reservoir elements are physical reservoir elements 10F. In the seventh embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0115] The reservoir 4 has a plurality of physical reservoir elements 10 and at least one physical reservoir element 10F. Any one of the physical reservoir elements constituting the reservoir 4 may be the physical reservoir element 10F. The number of physical reservoir elements 10F may be one or more.
[0116] The physical reservoir element 10F differs from the physical reservoir element 10 in that it does not have the second output terminal 14. The physical reservoir element 10F may be the physical reservoir element of any of the second to sixth embodiments without the second output terminal 14. The above-mentioned modified examples are also applicable to the physical reservoir element 10F.
[0117] The physical reservoir element 10F is responsible for signal interaction between the physical reservoir element 10 or physical reservoir element 10F connected to the second input terminal 12 and the physical reservoir element 10 or physical reservoir element 10F connected to the first output terminal 13.
[0118] The physical reservoir 101 according to the seventh embodiment realizes a neural network using a physical circuit, similar to the physical reservoir 100 according to the first embodiment. Furthermore, each of the physical reservoir elements 10 and 10F has a sample-and-hold circuit 20, and therefore has excellent short-term memory performance.
[0119] Eighth Embodiment 21 is a configuration diagram of a physical reservoir 102 according to the eighth embodiment. The physical reservoir 102 has a reservoir 5, an input section 2, and a readout 3. The reservoir 5 differs from the reservoir 1 according to the first embodiment in that some of the multiple physical reservoir elements are physical reservoir elements 10G. In the eighth embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0120] The reservoir 5 has a plurality of physical reservoir elements 10 and at least one physical reservoir element 10G. Any one of the physical reservoir elements constituting the reservoir 5 can be selected as the physical reservoir element 10G. The number of physical reservoir elements 10G may be one or more.
[0121] The physical reservoir element 10G differs from the physical reservoir element 10 in that it does not have the first input terminal 11. The physical reservoir element 10G may be the physical reservoir element of any of the second to sixth embodiments without the first input terminal 11. The above-described modified examples are also applicable to the physical reservoir element 10G.
[0122] The physical reservoir element 10G receives the signal P in Preserve and convert.
[0123] The physical reservoir 102 according to the eighth embodiment realizes a neural network using a physical circuit, similar to the physical reservoir 100 according to the first embodiment. Furthermore, each of the physical reservoir elements 10 and 10G has a sample-and-hold circuit 20, and therefore has excellent short-term memory performance.
[0124] "Ninth embodiment" 22 is a configuration diagram of a physical reservoir 103 according to the ninth embodiment. The physical reservoir 103 has a reservoir 6, an input section 2, and a readout 3. The reservoir 6 differs from the reservoir 1 according to the first embodiment in that some of the multiple physical reservoir elements are physical reservoir element 10F, physical reservoir element 10G, and physical reservoir element 10H. In the ninth embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0125] Reservoir 4 has a plurality of physical reservoir elements 10, at least one physical reservoir element 10F, at least one physical reservoir element 10G, and at least one physical reservoir element 10H. Of the physical reservoir elements constituting reservoir 6, it is optional whether the physical reservoir element is physical reservoir element 10F, physical reservoir element 10G, or physical reservoir element 10H. The number of each of physical reservoir element 10F, physical reservoir element 10G, and physical reservoir element 10H may be one or more.
[0126] The physical reservoir element 10H differs from the physical reservoir element 10 in that it does not have the first input terminal 11 and the second output terminal 14. The physical reservoir element 10H may be the physical reservoir element of any of the second to sixth embodiments without the first input terminal 11 and the second output terminal 14. The above-described modified examples are also applicable to the physical reservoir element 10H.
[0127] The physical reservoir element 10H is responsible for signal interaction between any of the physical reservoir elements 10, 10F, 10G, and 10H connected to the second input terminal 12 and any of the physical reservoir elements 10, 10F, 10G, and 10H connected to the first output terminal 13.
[0128] The physical reservoir 103 according to the ninth embodiment realizes a neural network using a physical circuit, similar to the physical reservoir 100 according to the first embodiment. Furthermore, each of the physical reservoir elements 10, 10F, 10G, and 10H has a sample-and-hold circuit 20, and therefore has excellent short-term memory performance.
[0129] "Tenth embodiment" 23 is a configuration diagram of a physical reservoir 104 according to the tenth embodiment. The physical reservoir 104 has a reservoir 7, an input section 2, and a readout 3. The reservoir 7 differs from the reservoir 1 according to the first embodiment in that a plurality of physical reservoir elements 10 form a plurality of rings. In the tenth embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0130] The reservoir 7 has a first ring unit R1 and a second ring unit R2. In the first ring unit R1, a plurality of physical reservoir elements 10 are connected in a ring shape by wiring connecting the second input terminal 12 and the first output terminal 13. Similarly, in the second ring unit R2, a plurality of physical reservoir elements 10 are connected in a ring shape by wiring connecting the second input terminal 12 and the first output terminal 13. The number of physical reservoir elements 10 constituting each of the first ring unit R1 and the second ring unit R2 is not limited.
[0131] The input signal input to each physical reservoir element 10 of the first ring unit R1 and the input signal input to each physical reservoir element 10 of the second ring unit R2 may be the same or different. For example, when there are two types of input signals, the input signal S in and inputs the first input signal as an input signal S in Alternatively, the second input signal may be input as an input signal S in The first input signal and the second input signal may be input as
[0132] Furthermore, the configuration of each physical reservoir element 10 in the first ring unit R1 and the configuration of each physical reservoir element 10 in the second ring unit R2 may be the same or different. The configuration of the physical reservoir element 10 is, for example, the capacitance of a capacitor, the first clock signal CLK1 input to the first switch 23, the second clock signal CLK2 input to the second switch 24, etc. By changing the configuration of the physical reservoir elements 10 between the first ring unit R1 and the second ring unit R2, different features can be extracted from the same input signal.
[0133] 23 shows an example in which the first ring unit R1 and the second ring unit R2 are connected to the same readout 3, but the first ring unit R1 and the second ring unit R2 may be connected to different readouts 3. In this case, the physical reservoir 104 may output a linear sum of the output from the readout 3 connected to the first ring unit R1 and the output from the readout 3 connected to the second ring unit R2.
[0134] The physical reservoir 104 according to the tenth embodiment, like the physical reservoir 100 according to the first embodiment, realizes a neural network using physical circuits and has excellent short-term memory performance. Furthermore, the physical reservoir 104 according to the tenth embodiment has multiple units within the reservoir 7, allowing various feature quantities to be extracted.
[0135] In the physical reservoir 104 according to the tenth embodiment, the physical reservoir element 10 can be replaced with the physical reservoir element according to the above-mentioned variations or other embodiments.
[0136] "Eleventh embodiment" 24 is a configuration diagram of a physical reservoir 105 according to the 11th embodiment. The physical reservoir 105 has a reservoir 8, an input section 2, and a readout 3. The reservoir 8 differs from the reservoir 1 according to the first embodiment in that a plurality of physical reservoir elements 10 form a plurality of rings. In the 11th embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0137] The reservoir 8 has a first ring unit R1' and a second ring unit R2'. In the first ring unit R1', a plurality of physical reservoir elements 10 or a plurality of physical reservoir elements 10I are connected in a ring shape by wiring connecting the second input terminal 12 and the first output terminal 13. Similarly, in the second ring unit R2', a plurality of physical reservoir elements 10 or a plurality of physical reservoir elements 10J are connected in a ring shape by wiring connecting the second input terminal 12 and the first output terminal 13. The numbers of the physical reservoir elements 10, physical reservoir elements 10I, and physical reservoir elements 10J constituting each of the first ring unit R1' and the second ring unit R2' are not limited.
[0138] The physical reservoir element 10I has a configuration similar to that of the physical reservoir element 10. The physical reservoir element 10I differs from the physical reservoir element 10 in that the second output terminal 14 of the physical reservoir element 10I is configured to be connectable to the first input terminal 11 of another physical reservoir element 10J.
[0139] The physical reservoir element 10J has a similar configuration to the physical reservoir element 10. The physical reservoir element 10J differs from the physical reservoir element 10 in that the first input terminal 11 of the physical reservoir element 10J is configured to be connectable to the second output terminal 14 of another physical reservoir element 10I.
[0140] The first ring unit R1' and the second ring unit R2' are arranged in a hierarchical structure, with the first ring unit R1' handling the first half of the reservoir 8 and the second ring unit R2' handling the second half of the reservoir 8.
[0141] Furthermore, the configuration of each physical reservoir element 10 or physical reservoir element 10I in the first ring unit R1' may be the same as or different from the configuration of each physical reservoir element 10 or physical reservoir element 10J in the second ring unit R2'. Changing the configuration of the physical reservoir elements between the first ring unit R1' and the second ring unit R2' increases the expressive power of the reservoir 8, enabling more complex processing. The reservoir 8 can generate a more expressive feature space that better matches the target task.
[0142] The physical reservoir 105 according to the eleventh embodiment, like the physical reservoir 100 according to the first embodiment, realizes a neural network using physical circuits and has excellent short-term memory performance. Furthermore, the physical reservoir 105 according to the eleventh embodiment has multiple units within the reservoir 8, thereby further enhancing the expressive power of the reservoir 8.
[0143] In the physical reservoir 105 according to the 11th embodiment, the physical reservoir element 10 can be replaced with the physical reservoir element according to the above-described modifications or other embodiments. The physical reservoir elements 10I and 10J can also be modified in the same manner as the physical reservoir element 10. The physical reservoir 105 according to the 11th embodiment may have multiple ring units arranged in parallel, as in the tenth embodiment.
[0144] "Twelfth embodiment" 25 is a configuration diagram of a physical reservoir 106 according to the twelfth embodiment. The physical reservoir 106 has a reservoir 9, an input unit 2, and a readout 3. The reservoir 9 differs from the reservoir 1 according to the first embodiment in that some of the multiple physical reservoir elements 10 are connected to multiple other physical reservoir elements 10. In the twelfth embodiment, the same components as those in the first embodiment are denoted by the same reference numerals.
[0145] Reservoir 9 includes a plurality of physical reservoir elements 10, at least one physical reservoir element 10K, and at least one physical reservoir element 10L. A first output terminal 13 of physical reservoir element 10K is configured to be connectable to a plurality of physical reservoir elements 10. A second input terminal 12 of physical reservoir element 10L is configured to be connectable to a plurality of physical reservoir elements 10. The configurations of physical reservoir element 10K and physical reservoir element 10L are similar to that of physical reservoir element 10.
[0146] The physical reservoir 106 according to the 12th embodiment, like the physical reservoir 100 according to the first embodiment, realizes a neural network using physical circuits and has excellent short-term memory performance. Furthermore, the physical reservoir 106 according to the 12th embodiment has more complex connections between the physical reservoir element 10, the physical reservoir element 10K, and the physical reservoir element 10L within the reservoir 9, which can further enhance the expressive power of the reservoir 9.
[0147] In the physical reservoir 106 according to the twelfth embodiment, the physical reservoir element 10 can be replaced with the physical reservoir element according to the above-described modifications or other embodiments. The physical reservoir elements 10K and 10L can also be modified in the same manner as the physical reservoir element 10. The physical reservoir 106 according to the twelfth embodiment may have multiple ring units within the reservoir 9.
[0148] Furthermore, the physical reservoirs according to the first embodiment and the seventh to twelfth embodiments may be used alone or in combination. For example, multiple physical reservoirs may be connected in series. In this case, the readout 3 of the preceding physical reservoir is connected to the input section 2 of the succeeding physical reservoir. Each of the multiple physical reservoirs may be any of the physical reservoirs according to the first embodiment and the seventh to twelfth embodiments. [Explanation of symbols]
[0149] 1,4,5,6,7,8,9…Reservoir 2...Input section 3...Leadout 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H, 10I, 10J, 10K, 10L...Physical reservoir element 11...First input terminal 12...Second input terminal 13...First output terminal 14...Second output terminal 20, 20A, 20B, 20C...Sample and hold circuit 21…1st terminal 22…Second terminal 23...First switch 24...Second switch 25...First capacitor 25A…first conductive layer 25B…Second conductive layer 25C...Capacitance layer 25D…1st electrode 25E…Second electrode 25F…3rd electrode 25G...insulating layer 27...Inverter 28...Voltage follower circuit 29...Switch 30, 31...Nonlinear circuits 40...Sample-hold circuit 50...Output adjustment section 61, 62...Voltage follower circuit 70...Output circuit 100, 101, 102, 103, 104, 105, 106...Physical reservoir 200, 200A...Information processing equipment 201...Physical Reservoir 202...Processor 203...Memory 204...Communication equipment 205...bus CLK1: First clock signal CLK2: Second clock signal CTL1: First control signal CTL2: Second control signal P in , P out …signal S in …input signal S out …Output signal S1…1st signal S2…Second signal
Claims
1. a first input terminal, a second input terminal, a first sample-and-hold circuit, a first output terminal, and a first nonlinear circuit; the first input terminal is configured to be connectable to an input source that provides an input signal to the physical reservoir; the second input terminal is configured to be connectable to at least one other physical reservoir element; a first nonlinear circuit between the first input terminal and the first sample-and-hold circuit; a first terminal of the first sample-and-hold circuit is configured to receive a combined signal obtained by combining signals from the first input terminal and the second input terminal; a second terminal of the first sample-and-hold circuit connected to the first output terminal; the first output terminal is configured to be connectable to at least one other physical reservoir element; The first sample and hold circuit is a physical reservoir element that holds and converts the combined signal.
2. a second output terminal connected to the second terminal; The physical reservoir element of claim 1 , wherein the second output terminal is configured to be connectable to a readout that outputs a signal external to the physical reservoir.
3. further comprising a second nonlinear circuit; The physical reservoir element of claim 1 , wherein the second nonlinear circuit is between the second input terminal and the first sample-and-hold circuit.
4. Further comprising a second sample and hold circuit; The physical reservoir element of claim 1 , wherein the second sample-and-hold circuit is between the second terminal of the first sample-and-hold circuit and the first output terminal.
5. With more resistance, The physical reservoir element of claim 1 , wherein the resistor is between the second terminal and the first output terminal of the first sample-and-hold circuit.
6. further comprising a gain adjustment circuit; The physical reservoir element of claim 1 , wherein the gain adjustment circuit is located between the second terminal and the first output terminal of the first sample-and-hold circuit.
7. further comprising a first voltage follower circuit; The physical reservoir element of claim 1 , wherein the first voltage follower circuit is between the first input terminal and the first nonlinear circuit.
8. further comprising a second voltage follower circuit; The physical reservoir element of claim 1 , wherein the second voltage follower circuit is located between the second input terminal and the first nonlinear circuit or between the first sample-and-hold circuit and the first output terminal.
9. further comprising a third voltage follower circuit; The physical reservoir element of claim 2 , wherein the third voltage follower circuit is between the first sample-and-hold circuit and the second output terminal.
10. a plurality of physical reservoir elements; A physical reservoir, wherein at least one of the plurality of physical reservoir elements is the physical reservoir element of claim 1.
11. The physical reservoir of claim 10 , wherein at least some of the plurality of physical reservoir elements are connected in a ring shape.
12. a plurality of physical reservoir element units connected in the ring shape; The physical reservoir of claim 11 , wherein at least two of the plurality of physical reservoir element units are connected in series or parallel.
13. each of the plurality of physical reservoir elements includes the first nonlinear circuit; The physical reservoir of claim 10 , wherein the nonlinear characteristics of the first nonlinear circuit in at least one of the plurality of physical reservoir elements are different from the nonlinear characteristics of the first nonlinear circuit in another physical reservoir element of the plurality of physical reservoir elements.
14. An information processing device comprising the physical reservoir of claim 10.