Display device

Abstract

To provide a novel display device capable of improving reliability.SOLUTION: A display device has an insulation layer provided between first wiring and second wiring, where the insulation layer has a first insulation layer and a second insulation layer provided on the first insulation layer in an overlapping manner; and the insulation layer has a region where a part of the second insulation layer is removed, and the region functions as a protection circuit. Alternatively, in a region where the insulation layer and a semiconductor layer of a transistor overlap each other, the display device has the first insulation layer and the second insulation layer. Alternatively, in a region where the first wiring and the second wiring are directly connected, the display device has a region where the first insulation layer and the second insulation layer are removed.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention is a product, a machine, a manufacture, a composition, Composition of Matter) and methods (processes, simple methods and production methods) In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, an electronic device, In particular, one aspect of the present invention relates to a device, a driving method thereof, or a manufacturing method thereof. The present invention relates to a semiconductor device, a display device, an electronic device, or a light-emitting device including an oxide semiconductor.

[0002] The display device refers to a device having a display element. The display device includes a control circuit disposed on a separate substrate. This includes circuits, power supply circuits, signal generation circuits, etc. [Background technology]

[0003] Display devices, such as liquid crystal display devices, have been miniaturized due to recent technological innovations. The technology has progressed and mass production technology has also progressed significantly. Therefore, there is a need to reduce costs.

[0004] When a surge voltage caused by static electricity is applied to a display device, the elements are destroyed and normal operation is lost. This can lead to a decrease in manufacturing yield. The display device is provided with a protection circuit to release the surge voltage to another wiring (for example, See, for example, Patent Documents 1 to 7. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-92036 [Patent Document 2] Japanese Patent Application Laid-Open No. 2010-92037 [Patent Document 3] Japanese Patent Application Laid-Open No. 2010-97203 [Patent Document 4] Japanese Patent Application Laid-Open No. 2010-97204 [Patent Document 5] Japanese Patent Application Laid-Open No. 2010-107976 [Patent Document 6] Japanese Patent Application Laid-Open No. 2010-107977 [Patent Document 7] Japanese Patent Application Laid-Open No. 2010-113346 Summary of the Invention [Problem to be solved by the invention]

[0006] In display devices, configurations aimed at improving reliability, such as protection circuits, are important. be.

[0007] Therefore, one embodiment of the present invention provides a display device having a novel structure that can improve reliability. Another object of the present invention is to reduce electrostatic damage. Another object of the present invention is to provide a display device having a novel structure. The object of the present invention is to provide a display device having a novel configuration that can reduce the influence of static electricity. Alternatively, one embodiment of the present invention provides a display device that is hard to break and has a novel structure. Alternatively, in one embodiment of the present invention, a transistor is The object of the present invention is to provide a display device having a novel configuration that can reduce the influence on the monitor. Alternatively, in one embodiment of the present invention, an influence on a transistor in an inspection process may be It is an object of the present invention to provide a display device with a novel structure that can reduce noise. In addition, in one embodiment of the present invention, it is possible to reduce the influence of defects when using a touch sensor. It is an object of the present invention to provide a display device having a novel structure that can achieve the above. In one embodiment, a novel configuration can reduce the fluctuation or degradation of transistor characteristics. Another object of the present invention is to provide a display device. and a display device having a novel configuration capable of reducing fluctuation or deterioration of the threshold voltage of the display device. Another object of one embodiment of the present invention is to provide a normally-on transistor. It is an object of the present invention to provide a display device with a novel structure that can reduce the noise level. Alternatively, in one embodiment of the present invention, a novel method for improving the manufacturing yield of transistors is provided. Another object of the present invention is to provide a display device with a novel structure. The object of the present invention is to provide a display device having a novel configuration in which transistors can be shielded. Alternatively, in one embodiment of the present invention, charges accumulated in a pixel electrode can be discharged. Another object of the present invention is to provide a display device having a novel structure. The object is to provide a display device having a novel configuration that can discharge charges accumulated in wiring. Alternatively, in one embodiment of the present invention, a semiconductor device having an oxide semiconductor layer with improved conductivity is Another object of the present invention is to provide a display device having a novel structure. A display device having a novel structure in which the conductivity of an oxide semiconductor layer can be controlled is provided. Another object of one embodiment of the present invention is to control the conductivity of a gate insulating film. It is an object of the present invention to provide a display device having a novel structure that can achieve the above. In one aspect, a display device having a novel configuration is provided that can easily achieve normal display. One of the challenges is to

[0008] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The above will be made clear from the description, drawings, claims, etc. It is possible to extract issues other than those mentioned above from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0009] One aspect of the present invention is a semiconductor device including an insulating layer provided between a first wiring and a second wiring, The edge layer includes a first insulating layer and a second insulating layer superimposed on the first insulating layer. The insulating layer has a surface having a protection circuit having an area where a part of the second insulating layer is removed. It is a display device.

[0010] One aspect of the present invention is a semiconductor device including an insulating layer provided between a first wiring and a second wiring, The edge layer includes a first insulating layer and a second insulating layer superimposed on the first insulating layer. The insulating layer has a protection circuit having a region where a part of the second insulating layer is removed, In a region where the insulating layer overlaps with a semiconductor layer of a transistor, the first insulating layer and A display device having the second insulating layer.

[0011] One aspect of the present invention is a semiconductor device including an insulating layer provided between a first wiring and a second wiring, The edge layer includes a first insulating layer and a second insulating layer superimposed on the first insulating layer. The insulating layer has a protection circuit having a region where a part of the second insulating layer is removed, In a region where the insulating layer overlaps with a semiconductor layer of a transistor, the first insulating layer and In a region having the second insulating layer and directly connecting the first wiring and the second wiring, The display device has an area where the first insulating layer and the second insulating layer are removed.

[0012] In one embodiment of the present invention, the first insulating layer has a resistivity of 10 10 Ωcm or more 10 18 Displays that are less than Ωcm are preferred.

[0013] In one aspect of the present invention, the semiconductor layer is preferably an oxide semiconductor layer. [Effects of the Invention]

[0014] According to one embodiment of the present invention, the reliability of a display device can be improved. [Brief explanation of the drawings]

[0015] [Figure 1] 1A and 1B are a plan view schematic diagram of a display device and a circuit diagram illustrating a protection circuit. [Figure 2] FIG. 10 is a cross-sectional view illustrating a resistor element of the display device. [Figure 3] 1A and 1B are a plan view schematic diagram of a display device and a circuit diagram illustrating a protection circuit. [Figure 4] FIG. [Figure 5] 1A and 1B are a plan view and a circuit diagram of a display device. [Figure 6] FIG. [Figure 7] 1A and 1B are a plan view and a circuit diagram of a display device. [Figure 8] FIG. [Figure 9] FIG. [Figure 10] FIG. [Figure 11] 1A to 1C illustrate a method for manufacturing a transistor. [Figure 12]1A to 1C illustrate a method for manufacturing a transistor. [Figure 13] 1A and 1B are cross-sectional views of a transistor. [Figure 14] 1A to 1C illustrate a method for manufacturing a display device. [Figure 15] 1A to 1C illustrate a method for manufacturing a display device. [Figure 16] 1A to 1C illustrate a method for manufacturing a display device. [Figure 17] 1A to 1C illustrate a method for manufacturing a display device. [Figure 18] FIG. [Figure 19] 1A and 1B are a plan view and a cross-sectional view of a display device. [Figure 20] 1A and 1B are a plan view and a cross-sectional view of a display device. [Figure 21] 1A and 1B are a plan view and a cross-sectional view of a display device. [Figure 22] FIG. [Figure 23] FIG. [Figure 24] FIG. [Figure 25] FIG. [Figure 26] 1A to 1C are cross-sectional views illustrating a method for manufacturing a display device. [Figure 27] 1A to 1C are cross-sectional views illustrating a method for manufacturing a display device. [Figure 28] 1A and 1B are a plan view and a cross-sectional view of a display device. [Figure 29] FIG. [Figure 30] FIG. [Figure 31] FIG. [Figure 32] FIG. [Figure 33] FIG. [Figure 34] FIG. [Figure 35] FIG. [Figure 36] FIG. [Figure 37] FIG. [Figure 38]FIG. [Figure 39] FIG. [Figure 40] FIG. [Figure 41] 1A and 1B are a cross-sectional view and a plan view of a display device. [Figure 42] FIG. 2 is a diagram illustrating a touch sensor. [Figure 43] FIG. 2 is a cross-sectional view illustrating a touch sensor. [Figure 44] FIG. 2 is a circuit diagram illustrating a touch sensor. [Figure 45] FIG. 1 is a circuit diagram illustrating a pixel circuit that can be used in a display device. [Figure 46] 1A and 1B illustrate a display module using a display device which is one embodiment of the present invention. [Figure 47] 1A to 1C illustrate electronic devices using a display device which is one embodiment of the present invention. [Figure 48] 1A to 1C illustrate electronic devices using a display device which is one embodiment of the present invention. [Figure 49] 1A and 1B are a plan view and a cross-sectional view of a display device. [Figure 50] 1A and 1B are a cross-sectional view and a band diagram illustrating an oxide stack; [Figure 51] FIG. 2 is a circuit diagram illustrating a protection circuit. [Figure 52] 3A and 3B are a circuit diagram and waveform diagrams illustrating a protection circuit. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the present invention in various ways without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0017] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The figures are merely schematic representations and are not limited to the shapes or values ​​shown in the drawings. Variations in signals, voltages, or currents due to the above, or variations in signals, voltages, or currents due to timing differences , or current variations, etc.

[0018] In this specification, a transistor includes a gate, a drain, and a source. It is an element with at least three terminals. And, the drain (drain terminal, drain Between the source (source terminal, source region or drain electrode) and the source (source terminal, source region or source electrode) It has a channel region and allows current to flow through the drain, the channel region, and the source. This is possible.

[0019] Here, the source and drain may vary depending on the structure or operating conditions of the transistor. Therefore, it is difficult to determine which is the source and which is the drain. The part that functions as a source and the part that functions as a drain are called the source and the drain, respectively. First, one of the source and the drain is referred to as a first electrode, and the other of the source and the drain is referred to as a second electrode. It may be written as "pole."

[0020] In this specification, the ordinal numbers "first," "second," and "third" are used to indicate the mixture of constituent elements. It should be noted that the numbers are added to avoid confusion and are not intended to limit the number.

[0021] In this specification, "A and B are connected" does not mean that A and B are directly connected. In addition to those that are connected electrically, those that are connected electrically are also included. Electrically connected means that there is an object between A and B that has some kind of electrical effect. When this occurs, it refers to something that enables the transmission and reception of electrical signals between A and B.

[0022] In this specification, the terms "above" and "below" that indicate the position of components are used to refer to the positions of components. The relationship is used for convenience in explaining the relationship with reference to the drawings. The values ​​change depending on the direction in which each component is depicted. It is not limited to words and phrases, and can be rephrased appropriately depending on the situation.

[0023] The arrangement of each circuit block in the block diagram in the drawing is not intended to specify the positional relationship for the sake of explanation. Although different circuit blocks are shown to perform different functions, In circuits and regions, different functions can be realized within the same circuit or region. In addition, the function of each circuit block in the block diagram may be different for the purpose of explanation. Although it is shown as one circuit block, it may not be the same in the actual circuit or area. In some cases, processing that would normally be done by one circuit block is performed by multiple circuit blocks. There are cases like this.

[0024] A pixel is a pixel that contains one color element (for example, one of R (red), G (green), or B (blue)). This corresponds to a display unit that can control brightness. Therefore, in the case of a color display device, The minimum display unit of a color image is composed of three pixels: an R pixel, a G pixel, and a B pixel. However, the color elements for displaying a color image are not limited to three colors. The above may be used, or colors other than RGB may be used.

[0025] In this specification, embodiments of the present invention will be described with reference to the drawings. The description of each embodiment will be given in the following order. 1. Embodiment 1 (Basic Configuration of One Aspect of the Present Invention) 2. Second Embodiment (Regarding the Components of the Display Device) 3. Third Embodiment (Modifications of the Configurations of the Display Device) 4. Embodiment 4 (Configuration of Touch Panel) 5. Fifth embodiment (modification of touch panel) 6. Sixth Embodiment (Pixel Circuit Configuration Variations) 7. Embodiment 7 (Electronic Device) 8. Embodiment 8 (Film Forming Method)

[0026] (Embodiment 1) In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS. The explanation will be given with reference to Figures 51 and 52.

[0027] The display device shown in FIG. 1A includes a region having a pixel display element (hereinafter referred to as a pixel portion 102). a circuit section (hereinafter referred to as a driving circuit section 104) having a circuit for driving the pixels; A circuit having a function of protecting the element (hereinafter referred to as a protection circuit 106) and a terminal section 107 are provided. Has.

[0028] The pixel units 102 are arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device further includes a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuits 108), The path section 104 includes a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 104a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 104b includes a driving circuit such as the circuit (hereinafter referred to as source driver 104b).

[0029] The gate driver 104a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 107, and a signal for outputting the shift register is outputted. For example, the gate driver 104a receives a start pulse signal, a clock signal, etc. The gate driver 104a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 104a are provided, and the plurality of gate drivers 104a drive the scanning lines GL_1 to Alternatively, the gate driver 104a may control the GL_X by dividing it into two parts. However, the gate driver 10 has a function of supplying 4a may also provide other signals.

[0030] The source driver 104b includes a shift register and the like. Through the terminal section 107, signals for driving the shift register as well as the source of data signals are transmitted. The source driver 104b receives a signal (image signal) that is to be output from the pixel circuit The source driver 104b has a function of generating a data signal to be written to the source driver 108. The data is generated in accordance with the pulse signals obtained by inputting the start pulse signal, clock signal, etc. The source driver 104b has a function of controlling the output of the data signal. The function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y) to be applied is Alternatively, the source driver 104b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 104b may supply other signals. It is also possible.

[0031] The source driver 104b is configured using, for example, a plurality of analog switches. The source driver 104b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 104b may be configured using the same.

[0032] Each of the plurality of pixel circuits 108 is connected to a plurality of wirings (hereinafter referred to as scanning lines) to which scanning signals are applied. A pulse signal is input through one of the lines (called GL) and a data signal is given through the lines. A data signal is input via one of the data lines DL. Each of the pixel circuits 108 is driven by the gate driver 104a to write data of the data signal. For example, the pixel circuit 108 in the mth row and nth column is connected to the scanning line GL_m(m is a natural number equal to or less than X), a pulse signal is input from the gate driver 104a to the scanning line The source driver is connected to the data line DL_n (n is a natural number less than or equal to Y) according to the potential of GL_m. A data signal is input from the input terminal 104b.

[0033] The protection circuit 106 is a scanning line that is a wiring between the gate driver 104a and the pixel circuit 108. GL. Alternatively, the protection circuit 106 may be connected to the source driver 104b and the pixel circuit 10 8. Alternatively, the protection circuit 106 is connected to the data line DL, which is the wiring between the gate driver The protection circuit 1 can be connected to the wiring between the driver 104a and the terminal portion 107. 06 can be connected to the wiring between the source driver 104b and the terminal section 107. The terminal unit 107 is used to input power, control signals, and image signals from an external circuit to the display device. This refers to the part where terminals are provided for connecting the power supply to the power source.

[0034] When a potential outside a certain range is applied to the wiring to which the protection circuit 106 is connected, the protection circuit 106 A protection circuit is a circuit that connects a wiring to another wiring. However, it is not limited to this, and may be any other circuit. 06 can also provide other signals.

[0035] As shown in FIG. 1A, a pixel section 102 and a driver circuit section 104 are provided with a protection circuit 106. By providing a This can improve the resistance of the display device to overcurrents caused by electrical discharges, etc. However, the configuration of the protection circuit 106 is not limited to this. For example, A configuration in which the protection circuit 106 is connected only to the source driver 104b, or a configuration in which the protection circuit 106 is connected only to the source driver 104b Alternatively, a protection circuit 106 may be connected to the terminal section 107. It is also possible to adopt such a configuration.

[0036] In FIG. 1A, the gate driver 104a and the source driver 104b However, the present invention is not limited to this configuration. For example, only the gate driver 104a is formed, and a source driver circuit is separately formed. A substrate (for example, a drive circuit board formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is mounted. It may also be configured as follows.

[0037] The protection circuit 106 can be configured using, for example, a resistor element. An example of a specific protection circuit is shown below.

[0038] The protection circuit 106 shown in FIG. 1B includes a resistor 11 between a wiring 110 and a wiring 112. The wiring 110 is connected to, for example, the scanning line GL and the data line D shown in FIG. L, or a wiring routed from the terminal portion 107 to the drive circuit portion 104.

[0039] The wiring 112 is, for example, a wiring for the gate driver 104a or the source driver 104b. a potential of a power supply line for supplying power to the A wiring to which a second potential (hereinafter referred to as a low power supply potential VSS or a ground potential GND) is applied. It is a line. Or, it is a wiring (common line) to which a common potential (common potential) is applied. The wiring 112 is a power supply line for supplying power to the gate driver 104a, particularly It is preferable that the scanning line GL is connected to a wiring that supplies a low potential. Therefore, the potential of the wiring 112 is also low. When the gate electrode 114 is turned on, the current leaking from the scanning line GL to the wiring 112 during normal operation is suppressed. This is because it can be reduced.

[0040] Here, an example of a configuration that can be used as the resistance element 114 will be described with reference to FIG. Give an explanation.

[0041] The resistor element 114 shown in FIG. 2(A) is a conductive layer (hereinafter referred to as a and a conductive layer 142 (hereinafter referred to as a conductive layer 142) and an insulating layer formed on the substrate 140 and the conductive layer 142. a conductive layer (hereinafter referred to as insulating layer 144) formed on insulating layer 144; Hereinafter referred to as conductive layer 148).

[0042] The resistor element 114 shown in FIG. 2B includes a conductive layer 142 formed on a substrate 140 and a 140 and an insulating layer 144 formed on the conductive layer 142, and an insulating layer 144 formed on the insulating layer 144. an edge layer 146, an insulating layer 144, and a conductive layer 148 formed on the insulating layer 146. .

[0043] Note that the wiring 112 shown in FIG. 1B corresponds to the wiring formed using the conductive layer 142. The wiring 110 shown in FIG. 1B corresponds to the wiring formed using the conductive layer 148 .

[0044] In other words, the resistance element 114 shown in FIGS. 2A and 2B has an insulating layer 14 between a pair of electrodes. 4 is sandwiched between the insulating layer 144, and the resistivity (electrical resistivity, specific resistance) of the insulating layer 144 is controlled. By doing so, when an overcurrent flows through one of the pair of electrodes, the other electrode is Part or all of the material can be released.

[0045] However, if the resistivity of the insulating layer sandwiched between the pair of electrodes is high, e.g., 10 18 Ωc When an insulating layer of 1000 m or more is used, when an overcurrent flows through one of the pair of electrodes, the other Overcurrent cannot be properly released.

[0046] Therefore, in one aspect of the present invention, the resistivity and For example, 10 10 Ωcm or more 10 18 Less than Ωcm, preferably 10 11 Ωcm or more 10 15 An insulating film having a resistivity of less than Ωcm is used. For example, an insulating film containing nitrogen and silicon can be used.

[0047] Also, the resistance element 114 covers the end of one of the pair of electrodes as shown in FIG. 2(B). The insulating layer 146 may be provided on the insulating layer 144. The insulating layer 146 can be formed using a material having a higher resistivity than the insulating layer 44. For example, 10 18 It is advisable to use an insulating film with a resistivity of Ωcm or more. An example of such an insulating film is an insulating film containing oxygen, nitrogen, and silicon.

[0048] The conductive layers 142 and 148 functioning as a pair of electrodes of the resistor 114 and the resistor The insulating layers 144 and 146 functioning as insulating layers of the element 114 are The transistors constituting the pixel portion 102 and the driver circuit portion 104 are formed at the same time as the transistors. It is possible.

[0049] Specifically, for example, the conductive layer 142 is formed in the same process as the gate electrode of the transistor. The conductive layer 148 can be formed as a source or drain electrode of the transistor. The insulating layers 144 and 146 can be formed in the same process as the gate of the transistor. It can be manufactured in the same process as the insulating layer.

[0050] In this way, by providing the protection circuit 106 in the display device shown in FIG. 102 and the drive circuit unit 104 have enhanced resistance to overcurrent caused by ESD and the like. Therefore, it is possible to provide a novel display device that can improve reliability. do.

[0051] Next, a specific structure of the display device shown in FIG. 1A will be described with reference to FIG.

[0052] The display device shown in FIG. 3 includes a pixel section 102 and a gate driver 103 functioning as a driver circuit section. 04a, a source driver 104b, a protection circuit 106_1, a protection circuit 106_2, The protection circuit 106_3 and the protection circuit 106_4 are included.

[0053] The pixel section 102, the gate driver 104a, and the source driver 104b are the same as those shown in FIG. The configuration is the same as that shown in (A).

[0054] The protection circuit 106_1 includes transistors 151, 152, 153, and 154, and a resistance element 1 The protection circuit 106_1 includes the gate driver 10 4a and the wirings 181, 182, and 183 connected to the gate driver 104a. The transistor 151 has a first terminal that functions as a source electrode, A second terminal having a function as a gate electrode is connected to the second terminal having a function as a drain electrode. The third terminal of the transistor 152 is connected to the wiring 183. A first terminal having a function as an electrode and a second terminal having a function as a gate electrode are connected. a third terminal connected to the first terminal of the transistor 151 and functioning as a drain electrode; The transistor 153 has a first terminal which functions as a source electrode. The second terminal is connected to the gate electrode, and the second terminal is connected to the drain electrode. The third terminal having the function is connected to the first terminal of the transistor 152. The resistor 154 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. a second terminal having a function as a drain electrode; The first terminal of the transistor 153 is connected to the first terminal of the transistor 154. are connected to the wiring 183 and the wiring 181. The resistor elements 171 and 173 are connected to the wiring The resistor element 172 is provided on the wiring 182 and the transistor 152. and the third terminal of the transistor 153.

[0055] The wiring 181 is used as a power supply line to which a low power supply potential VSS is applied, for example. The wiring 182 can be used as a common line, for example. The line 183 can be used as, for example, a power supply line to which a high power supply potential VDD is applied.

[0056] The protection circuit 106_2 includes transistors 155, 156, 157, and 158, and a resistance element 1 The protection circuit 106_2 has a gate driver 104a and a pixel driver 106b. The transistor 155 is provided between the element portion 102 and the gate electrode 103. A first terminal having a function as a gate electrode is connected to a second terminal. The third terminal, which functions as an on-electrode, is connected to the wiring 185. The capacitor 156 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. a second terminal connected to the transistor and functioning as a drain electrode; The first terminal of the transistor 155 is connected to the source electrode of the transistor 157. a first terminal having a function as a gate electrode is connected to a second terminal having a function as a gate electrode; The third terminal, which functions as a drain electrode, is connected to the first terminal of the transistor 156. The transistor 158 has a first terminal that functions as a source electrode and a gate electrode. a first terminal having a function as a source electrode and a second terminal having a function as a drain electrode; The third terminal of the transistor 151 is connected to the first terminal of the transistor 157. A first terminal of the resistor 158 is connected to the wiring 184. 85 and the first terminal of the transistor 156 and the third terminal of the transistor 157. The resistor element 175 is connected to the wiring 184 and the first terminal of the transistor 156. and the third terminal of the transistor 157 .

[0057] The wiring 184 is used as a power supply line to which a low power supply potential VSS is applied, for example. The wiring 185 can be used as a power supply line to which a high power supply potential VDD is applied, for example. The wiring 186 can also be used as, for example, a gate line.

[0058] The protection circuit 106_3 includes transistors 159, 160, 161, and 162, and a resistance element 1 76 and 177. The protection circuit 106_3 is connected to the source driver 104b and the pixel The transistor 159 functions as a source electrode. A first terminal having a function as a gate electrode is connected to a second terminal. The third terminal, which functions as an on-electrode, is connected to the wiring 190. The capacitor 160 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. a second terminal connected to the transistor and functioning as a drain electrode; The first terminal of the transistor 161 is connected to the first terminal of the transistor 159. a first terminal having a function as a gate electrode is connected to a second terminal having a function as a gate electrode; The third terminal, which functions as a drain electrode, is connected to the first terminal of the transistor 160. The transistor 162 has a first terminal that functions as a source electrode and a gate electrode. a first terminal having a function as a source electrode and a second terminal having a function as a drain electrode; The third terminal of the transistor 161 is connected to the first terminal of the transistor 161. A first terminal of the resistor 162 is connected to the wiring 191. 90 and the first terminal of the transistor 160 and the third terminal of the transistor 161. The resistor element 177 is connected to the wiring 191 and the first terminal of the transistor 160. and the third terminal of the transistor 161 .

[0059] The wiring 188 can be used as, for example, a common line or a source line. The wirings 189 and 190 are used as power supply lines to which a high power supply potential VDD is applied, for example. The wiring 191 can be, for example, a power supply line to which a low power supply potential VSS is applied. It can be used as such.

[0060] The protection circuit 106_4 includes transistors 163, 164, 165, and 166, and a resistance element 1 78, 179, and 180. The protection circuit 106_4 is connected to the source driver 10 4b and wirings 187, 188, 189, 190, 191 connected to the source driver 104b. 91. The transistor 163 has a function as a source electrode. A first terminal having a function as a gate electrode is connected to a second terminal having a function as a drain electrode. The third terminal of the transistor 16 is connected to the wiring 187. 4 is a first terminal having a function as a source electrode and a second terminal having a function as a gate electrode. a third terminal connected to the second terminal and functioning as a drain electrode; The first terminal of the transistor 165 is connected to the first terminal of the transistor 63. The transistor 165 functions as a source electrode. A first terminal having a function as a gate electrode is connected to a second terminal. The third terminal, which functions as an on-electrode, is connected to the first terminal of the transistor 164. The transistor 166 has a first terminal that functions as a source electrode and a gate terminal a first terminal having a function as a drain electrode, The third terminal is connected to the first terminal of the transistor 165. The first terminal of the resistor element 66 is connected to the wiring 189. The resistor element 178 is connected to the wiring 187. , and the wiring 188. The resistor element 179 is provided in the wiring 188. , is connected to a first terminal of the transistor 164 and a third terminal of the transistor 165 . The resistance element 180 is provided between the wiring 188 and the wiring 189 .

[0061] The wirings 187 and 191 are used as power supply lines to which a low power supply potential VSS is applied, for example. The wiring 188 can be used as, for example, a common line or a source line. The wirings 189 and 190 may be connected to a power supply to which a high power supply potential VDD is applied. It can be used as a source beam.

[0062] The wirings 181 to 191 are connected to the high power supply potential VDD, the low power supply potential VSS, and the The functions of the common line CL are not limited to those shown, but may be used independently as scanning lines, signal lines, power supply lines, It may also have the function of a ground line, a capacitance line, a common line, or the like.

[0063] In this way, the protection circuits 106_1 to 106_4 are configured as a plurality of diode-connected transistors. The protection circuit 106_1 is configured by a transistor and a plurality of resistance elements. 106_4 is a diode-connected transistor and a resistor element connected in parallel. You can be there.

[0064] 3, the protection circuits 106_1 to 106_4 are connected to the pixel portion 102. and the wiring connected to the gate driver 104a, and 4a, between the pixel section 102 and the source driver 104b, or between the pixel section 102 and the source driver 104c. The switch 104b may be provided between the switch driver 104b and the wiring to be connected.

[0065] 3. Also, as an example, a plan view corresponding to the protection circuit 106_2 described in FIG. The cross-sectional view of the area functioning as the ion implantation electrode is shown in Figures 49(A) and 49(B). The reference numerals in FIG. 49(B) correspond to the reference numerals in FIG. 3. 49(A) and 49(B), the present embodiment is The resistor element of the protection circuit described in is formed by removing a part of the insulating layer that overlaps the wiring. By controlling the resistivity of the insulating layer, it can be used as a resistive element that effectively releases excess current. can.

[0066] FIG. 51 is a circuit diagram showing a configuration different from that of the protection circuit described in FIG. 3. In the circuit diagram shown, transistors 155A to 158A, transistor 155 B to transistor 158B, resistor elements 174A, 175A, resistor elements 174B, 175 B, the resistor element 199, the wiring 184, the wiring 185, and the wiring 186 are shown. The reference numerals in the circuit diagram shown in FIG. 1 represent the same configurations as the protection circuit 106_2 described in FIG. The circuit diagram shown in FIG. 51 corresponds to the protection circuit 1 shown in FIG. The difference from 06_2 is that the circuit equivalent to the protection circuit 106_2 in Figure 3 is arranged side by side and wiring The difference is that a resistive element 199 is provided between them.

[0067] The resistivity of the resistor element 199 included in the protection circuit 106_2 shown in FIG. 74A, 175A, and the resistivity of resistor elements 174B and 175B is 10 10 Ωcm or more 10 18 Ωcm or less, whereas 10 3 Ωcm or more 10 6 Ωcm or less and smaller values By using the circuit diagram shown in FIG. 51, it is possible to reduce the suddenness of the signal applied to the wiring. It is possible to suppress abrupt changes.

[0068] In this way, by providing a plurality of protection circuits in the display device shown in FIG. , and the drive circuit unit 104 (gate driver 104a, source driver 104b) This further increases the resistance to overcurrents caused by D, etc. It is possible to provide a novel display device that can improve reliability.

[0069] Note that the protection circuits 106_1 to 106_4 described in FIG. In particular, an oxide semiconductor is used in a semiconductor layer that serves as a channel formation region of a diode-connected transistor. By using this, the protection circuit can have excellent functionality.

[0070] Here, using the circuit diagram and waveform diagram shown in Figures 52(A) and 52(B), A transistor using an oxide semiconductor for a semiconductor layer is connected to a diode of a protection circuit. The advantages of using it as a transistor will be explained below.

[0071] FIG. 52A shows a wiring 600 for inputting and outputting signals and a wiring to which a high power supply potential HVDD is applied. 601, a wiring 602 to which a low power supply potential HVSS is applied, and a protective circuit 603 are shown.

[0072] The signal Sig given to the wiring 600 is a clock signal, a selection signal, a signal with a fixed potential, etc. In the example described with reference to FIGS. 52(A) and 52(B), the signal Sig is described as a clock signal. In this case, the signal Sig_out that the wiring 600 provides to another element or wiring is This becomes the clock signal that is given to the port driver or source driver.

[0073] The high power supply potential HVDD applied to the wiring 601 may be the same potential as the high power supply potential VDD. The low power supply potential HVSS applied to the wiring 602 may be a low potential. It may be the same potential as the power supply potential VSS, or may be a lower potential.

[0074] The protection circuit 603 includes a transistor as an example of a plurality of diode-connected transistors. Transistor 604A and transistor 604B, and transistor 605A and transistor 606B It has 05B.

[0075] The transistor 604A and the transistor 604B are connected between the wiring 600 and the wiring 601. The transistors 604A and 604B are diode-connected transistors. During normal operation, the resistor 604B passes almost no current and passes the signal Sig directly to the signal S ig_out. 04B flows an overcurrent when a surge voltage is applied, and the surge voltage of the signal Sig The stepped-down signal can be provided as the signal Sig_out. Electrons flow in the direction opposite to the direction of flow through transistor 604A and transistor 604B.

[0076] FIG. 52(B) shows an example of a waveform when the signal Sig is used as a clock signal. The transistors 604A and 604B are connected to the signal Sig shown in FIG. When a surge voltage 611 higher than the high power supply potential HVDD is applied, an overcurrent and a voltage The flow of electrons causes the surge voltage 611 to drop to the high power supply potential, The clock signal with the voltage removed can be provided as signal Sig_out. Therefore, it is possible to prevent dielectric breakdown of the circuit to which the signal Sig_out is given. .

[0077] The flow of current and electrons through the transistors 604A and 604B is indicated by arrows In the arrow 606, the solid arrow I indicates the direction of the overcurrent, and the dashed arrow e - represents the flow of electrons.

[0078] The transistor 605A and the transistor 605B are connected between the wiring 600 and the wiring 602. The transistors 605A and 605B are diode-connected transistors. During normal operation, the resistor 605B passes almost no current and passes the signal Sig directly to the signal S ig_out. 05B flows an overcurrent when a surge voltage is applied, and the surge voltage of the signal Sig The boosted signal can be provided as the signal Sig_out. Electrons flow in the direction opposite to the direction of flow through transistor 605A and transistor 605B.

[0079] The transistors 604A and 604B are connected to the signal line 604A shown in FIG. 52(B). In the waveform of the signal Sig, a surge voltage 612 lower than the low power supply potential HVSS is applied. When this happens, an overcurrent and electron flow occur, causing the surge voltage 612 to rise to the low power supply potential. The surge-free clock signal is provided as the signal Sig_out. Therefore, it is possible to prevent the dielectric breakdown of the circuit to which the signal Sig_out is given. It is possible.

[0080] The flow of current and electrons through the transistors 605A and 605B is indicated by arrows In the arrow 607, the solid arrow I indicates the direction of the overcurrent, and the dashed arrow e - represents the flow of electrons.

[0081] Note that the transistor 604A and the transistor 604B described in FIG. The transistor 605A and the transistor 605B are formed by using a semiconductor that is to form a channel formation region. An oxide semiconductor is used for the semiconductor layer that becomes the channel formation region. A transistor has an extremely small leakage current when it is off. The leakage current that flows when the protection circuit 603 is not in operation can be made extremely small.

[0082] In addition, a transistor using an oxide semiconductor for a semiconductor layer that serves as a channel formation region has a semiconductor layer Compared to transistors that use silicon, the band gap is about 1 to 2 V higher. Therefore, avalanche breakdown is unlikely to occur and resistance to electric fields is high. By using an oxide semiconductor for the semiconductor layer that becomes the channel formation region, the function of the protection circuit can be improved. It can be said that.

[0083] As described above with reference to FIGS. 52A and 52B, a transistor using an oxide semiconductor By providing this in the protection circuit, leakage current is minimized and the resistance to electric fields is high. Therefore, the protection circuit has excellent functionality.

[0084] In this embodiment, an example in which a protection circuit is provided has been described. One aspect of the embodiment is not limited to this. In some cases, a protection circuit may not be provided. It is possible.

[0085] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0086] (Embodiment 2) In this embodiment mode, a liquid crystal display device of an in-plane switching type having the protection circuit described in the above embodiment mode is The structure of a display device using a liquid crystal display device (also called a liquid crystal display device) will be described. LCD displays have a wider viewing angle than vertical electric field displays, and have become popular in mobile devices in recent years. It is used in liquid crystal display devices of various screen sizes as display devices for devices and the like.

[0087] The liquid crystal display device refers to a device having a liquid crystal element. The liquid crystal display device includes a driving circuit for driving a plurality of pixels. The LCD module includes a control circuit, a power supply circuit, a signal generating circuit, a backlight module, etc. It is also called a joule.

[0088] The IPS (In-Plane-Switching) model is a type of horizontal electric field liquid crystal element. Mode and FFS (Fringe Field Switching) mode are typical. In this embodiment, the configuration of a liquid crystal display device in particular in the FFS mode will be described.

[0089] The liquid crystal display device of this embodiment will be described with reference to FIGS.

[0090] <Configuration of an in-plane switching liquid crystal display device as shown in a plan view> FIG. 4 is a plan view schematically illustrating an example of the configuration of a liquid crystal display device 500. As shown in FIG.

[0091] In the schematic plan view of the liquid crystal display device 500 shown in FIG. 4, a circuit having pixels (hereinafter referred to as a pixel section 5) 01), a circuit that outputs a signal (scanning signal) to select pixels (hereinafter referred to as a gate driver 502, 503), which supply signals (data signals) for driving the display elements of the pixels. a circuit for driving the source driver 504, a terminal section 505, and an FPC 506 (Flexible Printed Circuit). ible printed circuit), the sealing member 512 and the protection function of the element 5 shows a circuit (hereinafter referred to as a protection circuit 511) having such a protection circuit.

[0092] In the schematic plan view of the pixel section 501 shown in FIG. 4, pixels 518, wiring (hereinafter referred to as scanning lines GL), The pixel 518 is connected to a scanning line GL A scanning signal is applied to the pixel 518 via the data line DL. is given.

[0093] One of the gate drivers 502 and 503 shown in FIG. 4 is connected to the odd-numbered scanning lines G The source driver 504 is connected to the scanning lines GL of the even rows. The data line DL is connected.

[0094] The terminal portion 505 shown in FIG. 4 is connected to the FPC 506 outside the sealing member 512. The terminal 505 and the FPC 506 are electrically connected via an anisotropic conductive film or the like. In the schematic plan view of the terminal section 505 shown in FIG. Between 504 and 505, there are wiring for supplying control signals (control signals) and power The wiring (power supply line) for this purpose is shown.

[0095] The sealing member 512 shown in FIG. 4 is provided to seal the liquid crystal layer provided inside. The sealing member 512 also blocks moisture from the outside and prevents the liquid crystal layer from penetrating between the substrates. It is provided to keep the gap constant.

[0096] In the schematic plan view of FIG. 4, the protection circuit 511 includes a gate driver 502, a terminal section 505, and and between the wirings for achieving electrical connection between the gate driver 503 and the terminal section 505. between the wirings for electrically connecting the gate driver 502 and the pixel section 501; The wiring for electrically connecting the source driver 503 and the pixel section 501 and the source driver 502 are connected to each other. 5. The wiring is provided between the wiring for electrically connecting the pixel portion 501 and the pixel portion 504.

[0097] Although not shown in FIG. 4, the liquid crystal display device 500 also has a common potential ( ) is given to the wiring (common line) and another wiring to connect the common contact part, It has a connection portion for connecting wiring provided on different layers.

[0098] Pixel configuration Next, a configuration example of the pixel 518 will be described. FIG. 5B is a circuit diagram corresponding to a part of the plan view.

[0099] 6(A) is a cross-sectional view taken along the line A1-A2 in FIG. 5(A). 5(A) is a cross-sectional view taken along the line A3-A4 in FIG. 5(A).

[0100] In the plan view of the pixel 518 shown in FIG. 5A, as an example, a conductive layer (hereinafter, a conductive layer) is a conductive layer 519), a layer having conductivity (hereinafter referred to as conductive layer 520), a semiconductor layer 523, a conductive layer a layer having conductivity (hereinafter referred to as conductive layer 524), a layer having conductivity (hereinafter referred to as conductive layer 525), and a layer having conductivity 5 shows a layer having the conductive layer 526 and a spacer 515.

[0101] The conductive layer 519 is a wiring that functions as a scan line. The conductive layer 519 functions as a gate electrode of the capacitor 522. Wiring to which a constant potential signal such as low power supply potential VSS, ground potential or common potential is applied The conductive layer 519 also functions as an electrical connection between wirings provided in different layers. The conductive layer 519 has a function as a wiring that is routed to achieve the above. Smoke, titanium, chromium, cobalt, nickel, copper, yttrium, zirconium, molybdenum A film made of a conductive material containing one or more of: tungsten, ruthenium, silver, tantalum, and / or tungsten. It may be formed of one layer or two or more layers.

[0102] The conductive layer 520 is a wiring that functions as a data line. The conductive layer 520 functions as one of the source and drain electrodes of the transistor 522. is a constant potential such as a high power supply potential VDD, a low power supply potential VSS, a ground potential or a common potential. The conductive layer 520 functions as a wiring to which a signal is applied. The conductive layer 5 functions as a wiring that is routed to achieve electrical connection between the wirings. The conductive layer 20 can be formed in the same manner as the conductive layer 519 .

[0103] The semiconductor layer 523 is a layer having semiconductor properties. Semiconductor layer mainly composed of silicon (Si), semiconductor layer mainly composed of organic material, or metal oxide A semiconductor layer mainly made of a metal oxide can be used. For example, an oxide semiconductor layer can be formed.

[0104] The conductive layer 524 serves as the other electrode of the source and drain of the transistor 522. The conductive layer 524 is an electrode that serves to electrically connect wirings provided in different layers. The conductive layer 524 has a function as a wiring that is routed for the conductive layer 520. can be formed in the same way.

[0105] The conductive layer 525 functions as a common electrode or a pixel electrode of the liquid crystal element. Functions as wiring routed to establish electrical connections between wiring on different layers The conductive layer 525 may be, for example, an indium oxide layer containing tungsten oxide. Indium zinc oxide containing tungsten oxide, Indium oxide containing titanium oxide , indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, A film made of indium tin oxide or silicon oxide can be used. One of the conducting electrode and the pixel electrode has a comb-like shape, and the other has a planar shape.

[0106] The conductive layer 526 functions as a common electrode or a pixel electrode of the liquid crystal element. Functions as wiring routed to establish electrical connections between wiring on different layers The conductive layer 526 can be formed in a manner similar to that of the conductive layer 525.

[0107] In this embodiment, the conductive layer 525 and the conductive layer 526 are positioned such that they are arranged as a common electrode. The conductive layer 525 functions as a pixel electrode, and the conductive layer 526 functions as a pixel electrode. However, the conductive layer 525 functioning as a common electrode is provided as a pixel electrode. Alternatively, the conductive layer 526 may be provided on top of the conductive layer 526 which also functions as a conductive layer.

[0108] The spacer 515 is provided to maintain the cell gap. Thus, the spacer 515 is connected to the conductive layer 519 which functions as a scan line and the conductive layer 519 which functions as a data line. The conductive layer 520 is formed in the overlapping area. By forming the pixel 518 in such an area, the pixel 518 is not opened. You can increase your speaking rate.

[0109] In the circuit diagram of the pixel 518 shown in FIG. 5B, for example, the scanning line GL, the data line DL, A transistor 522, a capacitor CAP, and a liquid crystal element LC are shown.

[0110] The transistor 522 is a switching transistor that controls the connection between the liquid crystal element LC and the data line DL. The transistor 522 functions as an element. The on / off state is controlled by a scanning signal input from the

[0111] For example, the capacitor CAP is formed in a region where the conductive layer 525 and the conductive layer 526 overlap each other. Therefore, it is not necessary to separately form a capacitance line in the pixel 518. be.

[0112] The liquid crystal element LC is, for example, an element composed of a common electrode, a pixel electrode, and a liquid crystal layer. The orientation of the liquid crystal material in the liquid crystal layer is changed by the action of the electric field formed between the common electrode and the pixel electrode. can be.

[0113] In the cross-sectional view of the pixel 518 taken along the line A1-A2 in FIG. 6A, for example, 521, a conductive layer 519, an insulating layer (hereinafter referred to as insulating layer 532), an insulating layer ( Hereinafter, the insulating layer 533, the semiconductor layer 523, the conductive layer 520, the conductive layer 524, and the insulating layer a layer (hereinafter referred to as insulating layer 534), a layer having insulating properties (hereinafter referred to as insulating layer 535), layer (hereinafter referred to as insulating layer 536), a layer having insulating properties (hereinafter referred to as insulating layer 537), a conductive layer 525, A conductive layer 526, an insulating layer (hereinafter, an insulating layer 538), a film for imparting alignment to the liquid crystal ( Hereinafter, an alignment film 539), a liquid crystal layer 540, a substrate 541, a film having a light-shielding property (hereinafter, a black Matrix 542), color filter 543, overcoat 544, and liquid crystal alignment layer 5B shows a film (hereinafter referred to as an alignment film 545) that provides an alignment effect to the transistor 52. 2 is shown.

[0114] The substrate 521 may be, for example, a glass substrate, a ceramic substrate, a quartz substrate, or a sapphire substrate. The same applies to the substrate 541.

[0115] The insulating layer 532 functions as a gate insulating film of the transistor 522. The insulating layer 532 is a layer that functions as a resistive element in the protection circuit. are aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, and silicon oxynitride. Silicon, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, dioxide one or more of zinc oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide The insulating layer 532 may be formed as a single layer or a stacked layer. It is a material with a lower resistivity than silicon.

[0116] The insulating layer 533 functions as a gate insulating film of the transistor 522. The insulating layer 533 can be formed in the same manner as the insulating layer 532. A material with a higher resistivity than 532 is preferred.

[0117] The insulating layer 532 may be, for example, a silicon nitride oxide film, a silicon nitride film, or an aluminum oxide film. The insulating layer 533 may be a silicon oxide film, a silicon oxide film, or the like. For example, a silicon nitride film or the like is provided as a laminated layer or a single layer. A 50 nm thick silicon nitride film was applied as the insulating layer 533, and a 50 nm thick silicon oxynitride film was applied as the insulating layer 534. A film can be applied.

[0118] Silicon nitride oxide is an insulating material with a higher nitrogen content than oxygen. Silicon oxynitride refers to an insulating material that contains more oxygen than nitrogen.

[0119] The insulating layers 534 to 536 are formed of insulating films made of inorganic materials. The insulating layer 535 is preferably an oxide film, and the insulating layer 536 is preferably a nitride film. By using a nitride insulating film as the insulating layer 536, impurities such as hydrogen and water from the outside can be prevented from entering the semiconductor layer 523. The insulating layer 534 may not be provided.

[0120] The insulating layer 537 is formed of an insulating film made of an organic material. The insulating layer 537 preferably has a function of providing flatness to the layer or film formed thereon. Heat-resistant organic materials such as acrylic resins and polyimide resins can be used. do.

[0121] The insulating layer 538 acts as a passivation film to prevent water and impurities from entering from the outside. The insulating layer 538 is formed in the region where the conductive layer 525 and the conductive layer 526 overlap. The insulating layer 538, like the insulating layer 536, is made of a nitride or nitride compound. An insulating film made of oxide is preferable, for example, a silicon nitride film, a silicon nitride oxide film, etc. Just do that.

[0122] The alignment film 539 is preferably a film for imparting alignment to the liquid crystal molecules of the liquid crystal layer. The same applies to the alignment film 545.

[0123] The black matrix 542 is, for example, printed using a known material having light blocking properties. method, inkjet method, and etching method using photolithography technology, respectively. Form at the desired location.

[0124] The color filter 543 is a color filter that transmits light in the red wavelength band and light in the green wavelength band. Color filters that transmit light in the blue wavelength band, etc. Each color filter can be formed by using a known material and by a printing method, an inkjet method, or the like. The desired positions are formed by using methods such as the lithography method and the etching method using photolithography technology. Complete.

[0125] The overcoat 544 protects the black matrix 542 and the color filter 543. The overcoat 544 is formed of, for example, an acrylic resin. An insulating layer such as grease may be used.

[0126] In the cross-sectional view of the pixel 518 taken along the cutting line A3-A4 shown in FIG. 6(B), as an example, The layers described in (A) are stacked, and a spacer 515 is provided to maintain the cell gap. This indicates the areas where

[0127] <Protection circuit configuration> Next, a configuration example of the protection circuit 511 will be described. 7(A) is a plan view, and FIG. 7(B) is a circuit diagram corresponding to the plan view.

[0128] FIG. 8 is a cross-sectional view taken along the line B1-B2 in FIG. 7(A).

[0129] In the plan view of the protection circuit 511 shown in FIG. 7A, for example, a conductive layer (hereinafter referred to as a 551), a conductive layer (hereinafter referred to as conductive layer 552), and an opening 553. do.

[0130] The conductive layer 551 is a wiring for leaking an overcurrent caused by a surge voltage. 1 is fixed to the ground potential (GND), for example. The conductive layer 519 can be formed in the same manner as the conductive layer 519.

[0131] The conductive layer 552 is a wiring that functions as a scan line or a signal line. , can be formed in the same manner as the conductive layer 520.

[0132] The opening 553 is formed by the insulating layer 532 and the insulating film 533 provided between the conductive layer 551 and the conductive layer 552. The opening is provided by removing the insulating layer 533 in the edge layer 533 .

[0133] In other words, the protective circuit 511 shown in FIG. 7A has an insulating layer 532 sandwiched between a pair of electrodes. By controlling the resistivity of the insulating layer 532, it is possible to form an overcoat on one of the pair of electrodes. When a current flows, part or all of the excess current can be released to the other electrode.

[0134] In one aspect of the present invention, the resistivity of the insulating layer 532 sandwiched between the pair of electrodes is as follows: For example, 10 10 Ωcm or more 10 18 Less than Ωcm, preferably 10 11 Ωcm or more 10 15 An insulating film having a resistivity of less than Ωcm is used. For example, a nitrogen insulating film having such a resistivity is used. and insulating films containing silicon.

[0135] In this way, by providing the protective circuit 511 between the conductive layers shown in FIG. 7A, the display device This device can improve resistance to overcurrent caused by ESD, etc. Thus, it is possible to provide a novel display device that can improve reliability.

[0136] In the circuit diagram including the protection circuit 511 shown in FIG. 7B, for example, the wiring 551L, the wiring This indicates 552L.

[0137] The wiring 551L leaks an overcurrent when a surge voltage is applied to the wiring 552L. It has a function.

[0138] The wiring 552L is a wiring to which signals such as scanning signals and data signals are applied. 552L leaks the overcurrent that occurs when a surge voltage is applied to the wiring 551L, It has a function of preventing signals such as scan signals and data signals from leaking to the wiring 551L.

[0139] The protection circuit 511 is provided between the wiring 551L and the wiring 552L. The overcurrent caused by the surge voltage is relayed to the wiring 551L side fixed to the ground potential. The protection circuit 511 also protects the wiring 552L from scanning signals, data signals, and the like. The resistivity is such that the potential of the signal does not fluctuate.

[0140] In the cross-sectional view of the protection circuit 511 taken along the line B1-B2 in FIG. 8, for example, 21, conductive layer 551, insulating layer 532, insulating layer 533, conductive layer 552, insulating layer 534, insulating layer 535, an insulating layer 536, an insulating layer 537, an insulating layer 538, an alignment film 539, a liquid crystal layer 540, The substrate 541, black matrix 542, overcoat 544, and alignment film 545 are shown. There are.

[0141] As described above, in the protection circuit 511, a conductive layer 551 is provided between the conductive layer 552. Of the insulating layers 532 and 533, the insulating layer 533 is removed. By changing the size of the portion 553, the resistivity of the insulating layer 532 can be controlled. When an overcurrent flows through one of the pair of electrodes, some or all of the overcurrent is released to the other electrode. It is possible.

[0142] <Connection configuration> Next, a configuration example of a connection portion that connects conductive layers provided on different layers will be described. FIG. 9A is a cross-sectional view showing a structural example of a connection portion between a conductive layer 571 and a conductive layer 572. 9B shows a structural example of a connection portion between the conductive layer 572 and the conductive layer 573. Cross-sectional view.

[0143] In the cross-sectional view of the connection portion shown in FIG. 9A, for example, a substrate 521, a conductive layer 571, an insulating layer 572, and a conductive layer 573 are provided. layer 532, insulating layer 533, conductive layer 572, insulating layer 534, insulating layer 535, insulating layer 536, Insulating layer 537, insulating layer 538, alignment film 539, liquid crystal layer 540, substrate 541, black matrix The layer 542, the overcoat 544, and the alignment layer 545 are shown.

[0144] The conductive layer 571 is a conductive layer formed in the same layer as the conductive layer 519 and the conductive layer 551 . The conductive layer 571 can be formed in a manner similar to that of the conductive layer 519 and the conductive layer 551 .

[0145] The conductive layer 572 is formed in the same layer as the conductive layers 520, 524, and 552. The conductive layer 572 is a conductive layer. can be formed in the same way.

[0146] At the connection portion between the conductive layer 571 and the conductive layer 572, Therefore, the insulating layer 532 and the insulating layer 533 are removed. A direct connection can be made to layer 572.

[0147] In the cross-sectional view of the connection portion shown in FIG. 9B, for example, a substrate 521, an insulating layer 532, an insulating layer 533, conductive layer 572, insulating layer 534, insulating layer 535, insulating layer 536, insulating layer 537, Conductive layer 573, insulating layer 538, alignment film 539, liquid crystal layer 540, substrate 541, black matrix The layer 542, the overcoat 544, and the alignment layer 545 are shown.

[0148] The conductive layer 573 is a conductive layer formed in the same layer as the conductive layer 525. The conductive layer 524 can be formed in a similar manner to the conductive layer 525.

[0149] At the connection portion between the conductive layer 572 and the conductive layer 573, a conductive layer 573 is provided between the conductive layer 572 and the conductive layer 573. The insulating layers 534, 535, 536 and 537 are removed. Therefore, the conductive layer 572 and the conductive layer 573 can be directly connected to each other.

[0150] <Terminal configuration> Next, a configuration example of the terminal part 505 will be described. 10 is a cross-sectional view showing an example of the configuration of a connection portion.

[0151] In the cross-sectional view of the terminal portion shown in FIG. 10, for example, a substrate 521, an insulating layer 532, an insulating layer 5 33, transistor 522, conductive layer 572, conductive layer 574, insulating layer 537, alignment film 539 , liquid crystal layer 540, substrate 541, black matrix 542, overcoat 544, alignment The membrane 545, conductive layer 561, and FPC 506 are shown.

[0152] The conductive layer 574 is a conductive layer formed in the same layer as the conductive layer 526. The conductive layer 524 can be formed in a similar manner to the conductive layer 526.

[0153] The conductive layer 561 is used to bond the conductive layer 574 and the FPC 506 to establish electrical continuity. The conductive layer 561 may be, for example, an anisotropic conductive film. Anisotropic conductive films are made by mixing conductive particles into thermosetting or thermosetting and photosetting resins. The anisotropic conductive film is made by hardening a paste or sheet-like material that has been mixed together. When exposed to radiation or thermocompression bonding, it becomes a material that exhibits anisotropic conductivity. The conductive particles are, for example, spherical organic resin particles coated with a thin film of metal such as Au, Ni, or Co. Particles can be used.

[0154] The conductive layer 572 and the conductive layer 574 are connected via the conductive layer 561 by partially passing through the alignment film 539. By removing it, a direct connection configuration can be achieved.

[0155] <Method of manufacturing a transistor> A method for manufacturing a transistor of a display device including the above-described transistor 522 will be described below. .

[0156] A manufacturing method of the transistor 522 will be described with reference to FIGS. 11A to 12C illustrate an example of a method for manufacturing the transistor 522 of the pixel 518. 5. The cross-sectional view of the gate drivers 502 and 503 and the source driver 504 Transistors can also be fabricated on the same substrate at the same time with a similar structure.

[0157] The components described in Figures 11(A) to 12(C) will be listed first. 12A to 12C, a substrate 400, a conductive film 401, a gate electrode 402, a first insulating film 403, a gate electrode 404, a first insulating film 405, a gate electrode 406, a gate electrode 407, a gate electrode 408, a gate electrode 409, a gate electrode 410, a gate electrode 411, a gate electrode 412, a gate electrode 413, a gate electrode An insulating film 403, a second insulating layer 404, an oxide semiconductor film 405, and an island-shaped oxide semiconductor layer 406 , a conductive film 407, a source electrode 408, a drain electrode 409, an insulating layer 410, and an insulating layer 411. The components of the insulating layer 412 will be described in order. The gate electrode 402 has the same structure as the substrate 521. 19. The first insulating film 403 is the same as the insulating layer 532 described in FIG. The second insulating layer 404 has the same structure as the insulating layer 533 described in FIG. The island-shaped oxide semiconductor layer 406 has the same structure as the semiconductor layer 52 described with reference to FIG. 3. The source electrode 408 has the same structure as the conductive layer 520 described in FIG. The drain electrode 409 has the same structure as the conductive layer 524 described in FIG. The insulating layer 410 has the same structure as the insulating layer 534 described with reference to FIG. The insulating layer 411 has the same structure as the insulating layer 535 described with reference to FIG. The insulating layer 412 has the same structure as the insulating layer 536 described in FIG. 6(A).

[0158] As shown in FIG. 11(A), a conductive layer constituting the first layer of wiring and electrodes is formed on a substrate 400. A film 401 is formed.

[0159] As the conductive film 401, for example, a film in which a copper film is stacked on a tungsten nitride film or A single layer of tungsten can be formed.

[0160] Next, as shown in FIG. 11(B), the conductive film 401 is processed to form the gate electrode 4 of the transistor. Form 02.

[0161] A first insulating film 403 is formed to cover the gate electrode 402. A second insulating layer 404 is formed on the insulating layer 403.

[0162] The first insulating film 403 and the second insulating layer 404 serve as gate insulating films of the transistor. It has a function.

[0163] For example, if the first layer is a silicon nitride film and the second layer is a silicon oxide film, The second silicon oxide film can be a silicon oxynitride film. The first silicon nitride film may be a silicon nitride oxide film.

[0164] It is preferable to use a silicon oxide film with a low defect density. , Electron Spin Resonance (ESR) The spin density of the spins originating from the signal with a value of 2.001 is 3×10 17 spins / cm 3 Less than or equal to 5 x 10 16 spins / cm 3 The following silicon oxide film is used. The silicon oxide film is preferably a silicon oxide film containing excess oxygen. The film used is a silicon nitride film that releases less hydrogen and ammonia. The amount of emission was measured using TDS (Thermal Desorption Spectroscopy) It can be measured by thermal desorption spectroscopy.

[0165] The resistivity of the silicon nitride film is 10 10 Ωcm or more 10 18 Less than Ωcm, preferably 10 11 Ωcm or more 10 15 Therefore, the first insulating film 403 is made of nitride. A silicon dioxide film is preferably used.

[0166] Next, as shown in FIG. 11C, an oxide semiconductor film 405 is formed over the second insulating layer 404. Here, the oxide semiconductor film 405 is formed by a sputtering method. A Zn oxide film is formed.

[0167] Examples of oxide semiconductors used as semiconductor layers of transistors include indium oxide. Aluminum, tin oxide, zinc oxide, In-Zn oxide, Sn-Zn oxide, Al-Zn oxide oxides, Zn-Mg oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides oxides, In-Ga-Zn oxides (also written as IGZO), In-Al-Zn oxides , In-Sn-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-Zr-Zn oxide, I n-Ti-Zn oxide, In-Sc-Zn oxide, In-Y-Zn oxide, In- La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-N d-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd -Zn-based oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho- Zn-based oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Z n-based oxides, In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides, In-Hf -Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Zn oxide oxides, In-Sn-Hf-Zn oxides, In-Hf-Al-Zn oxides, etc.

[0168] For example, In:Ga:Zn=1:1:1, In:Ga:Zn=3:1:2, or I In-Ga-Zn oxides with an atomic ratio of n:Ga:Zn=2:1:3 and other oxides with similar compositions It is preferable to use an oxide.

[0169] When a large amount of hydrogen is contained in the oxide semiconductor film that constitutes the semiconductor layer, hydrogen bonds with the oxide semiconductor. By doing so, some of the hydrogen atoms become donors, generating electrons that act as carriers. This causes the threshold voltage of the transistor to shift in the negative direction. After the formation of the oxide semiconductor film, a dehydration treatment (dehydrogenation treatment) is performed to remove hydrogen from the oxide semiconductor film. It is preferable to remove hydrogen or moisture to purify the material so that it contains as few impurities as possible. .

[0170] Note that dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film Therefore, dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film is In order to compensate for oxygen vacancies increased by the oxidation process, oxygen is added to the oxide semiconductor film. In this specification and the like, the case where oxygen is supplied to an oxide semiconductor film is referred to as oxygen addition. Alternatively, oxygen contained in the oxide semiconductor film may be converted to a value other than the stoichiometric composition. When the amount is increased, it is sometimes referred to as hyperoxygenation treatment.

[0171] In this way, the oxide semiconductor film is dehydrated by dehydration treatment (dehydrogenation treatment). By removing oxygen and filling the oxygen vacancies through oxygen addition treatment, the i-type (intrinsic) or The oxide semiconductor film can be an oxide semiconductor film that is very close to i-type and is substantially i-type (intrinsic). Note that the term "substantially intrinsic" means that there are very few carriers derived from donors in the oxide semiconductor film. (close to zero), and the carrier density is 1×10 17 / cm 3 Below, 1×10 16 / cm 3 below , 1×10 15 / cm 3 Below, 1×10 14 / cm 3 Below, 1×10 13 / cm 3 Below It says something.

[0172] In addition, a transistor including an i-type or substantially i-type oxide semiconductor film as described above For example, a transistor using an oxide semiconductor film can achieve excellent off-state current characteristics. The drain current when the transistor is off is 1×10 at room temperature (approximately 25°C). -18 Below A , preferably 1 x 10 -21 A or less, more preferably 1 × 10 -24 A or below, or 8 1 x 10 at 5°C -15 A or less, preferably 1×10 -18 A or less, more preferably 1 x10 -21 A or less. The transistor is in the off state when the n-channel In the case of a gate-type transistor, this refers to a state in which the gate voltage is sufficiently smaller than the threshold voltage. Specifically, if the gate voltage is 1V or more, 2V or more, or 3V or more less than the threshold voltage, If the transistor is turned off, the transistor is turned off.

[0173] The oxide semiconductor film may have a non-single-crystal structure including an amorphous structure, a microcrystalline structure, or a polycrystalline structure. Alternatively, it may have a single crystal structure.

[0174] In addition, as the oxide semiconductor film, CAAC-OS (C Axis Al Also known as igned Crystalline Oxide Semiconductor .) membranes may also be used.

[0175] The CAAC-OS film is neither completely single crystalline nor completely amorphous. The size of the transparent electrode is often such that it fits inside a cube with a side of less than 100 nm. Transmission Electron Microscope (TEM) In the image observed in e), the boundary between the amorphous and crystalline parts in the CAAC-OS film is clear. In addition, the grain boundaries in the CAAC-OS film were observed by TEM. Therefore, the CAAC-OS film does not have a low electron mobility due to the grain boundary. The bottom is suppressed.

[0176] The crystal part included in the CAAC-OS film has a c-axis that is the normal vector of the surface on which the CAAC-OS film is formed. The triangle is aligned parallel to the normal vector of the sphere or surface and perpendicular to the ab plane. The metal atoms are arranged in a layered or hexagonal shape when viewed perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. The orientation of the b-axis may be different. In this specification, when simply referring to a vertical axis, it means that the This also includes the range of -5° to 95°. The range of 5° or less is also included. may be substituted with nitrogen.

[0177] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be higher near the surface than near the growth surface. By adding impurities to the AC-OS film, the crystalline part in the impurity-doped region becomes amorphous. It may also be pawned.

[0178] The c-axis of the crystalline part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The CAAC-OS film shape (on which the film is formed) is Depending on the cross-sectional shape of the surface or the cross-sectional shape of the surface, they may face in different directions. The direction of the c-axis of the crystal is the normal vector of the surface on which the CAAC-OS film is formed. The direction of the crystal is parallel to the normal vector of the film or surface. is formed by carrying out a crystallization treatment such as a heat treatment after the film formation.

[0179] The electrical characteristics of a transistor using a CAAC-OS film change when irradiated with visible light or ultraviolet light. Therefore, the transistor has high reliability.

[0180] Next, as shown in FIG. 11D, the oxide semiconductor film 405 is processed to form island-shaped oxide semiconductor layers. A conductor layer 406 is formed.

[0181] Next, as shown in FIG. 12(A), the source and drain electrodes of the transistor, or A conductive film 407 having a function as a data line is formed. The conductive film 407 can be formed in the same manner. For example, the conductive film 407 has a three-layer structure. The third layer is made of titanium film, and the second layer is made of aluminum film. The silicon film is formed by sputtering.

[0182] Next, as shown in FIG. 12(B), the conductive film 407 is processed to form a source electrode 408 and a drain electrode 409. The inner electrode 409 is formed.

[0183] Next, as shown in FIG. 12C, insulating layers 410 to 412 are formed.

[0184] In addition, when one or both of the insulating layers 410 and 411 are formed as oxide films, the stoichiometric It is preferable that the oxide semiconductor contains more oxygen than the target composition. The desorption of oxygen from the conductor layer 406 is prevented, and the oxygen contained in the oxygen-excess region is oxidized. The oxygen vacancies can be compensated for by transferring the oxygen to the oxide semiconductor film.

[0185] When the insulating layer 411 is an oxide film containing more oxygen than the stoichiometric composition, the insulating layer 4 The insulating layer 411 is preferably an oxide film that transmits oxygen. A part of the oxygen that has entered the insulating layer 411 from the outside remains in the film. The oxygen contained in the insulating layer 411 may diffuse to the outside. An insulating oxide film with a large number of insulating films is preferable.

[0186] When the insulating layer 412 is a nitride insulating film, one or both of the insulating layer 410 and the insulating layer 411 It is preferable that the insulating film has a barrier property against nitrogen. For example, a dense oxide By forming a film, it is possible to provide a barrier against nitrogen. Specifically, at 25°C, An oxide film with an etching rate of 10 nm / min or less when using 0.5 wt % hydrofluoric acid It is preferable to set the following.

[0187] The insulating layers 410 to 412 are formed by various film forming methods such as PE-CVD or sputtering. The insulating layers 410 to 412 can be formed successively in a vacuum. In this way, the insulating layer 410, the insulating layer 411, and the insulating layer 41 2. When the material used for the insulating layer 411 has the same composition, the interface between the insulating layer 410 and the insulating layer 411 Sometimes it's not clear.

[0188] For example, the insulating layer 410 and the insulating layer 411 are formed by a PE-CVD method using a silicon oxide film or an oxide film. When forming a silicon nitride film, the film can be formed under the following film forming conditions. The temperature is maintained at 0°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. The pressure in the processing chamber is increased by introducing a deposition gas containing silicon and an oxidizing gas as source gases. The pressure is set to 20 Pa or more and 250 Pa or less, more preferably 40 Pa or more and 200 Pa or less. This is a condition in which high frequency power is supplied to an electrode installed in the chamber.

[0189] For example, a silicon nitride film with a low hydrogen content is deposited as the insulating layer 412 using a PE-CVD apparatus. When forming the film, the film can be formed under the following conditions: The substrate is heated to 80°C or more and 400°C or less. Furthermore, the temperature is preferably maintained at 200° C. or higher and 370° C. or lower, and a raw material gas is introduced into the processing chamber. The pressure inside the chamber is set to 100 Pa or more and 250 Pa or less, preferably 100 Pa or more and 200 The pressure is set to 0.1 Pa or less, and high frequency power is supplied to an electrode provided in the processing chamber.

[0190] After the insulating layer 411 is formed, heat treatment is performed to remove the oxide film contained in the insulating layer 410 or the insulating layer 411. The excess oxygen contained in the oxide semiconductor layer 406 is moved to the oxide semiconductor layer 406. It is preferable that the heat treatment is performed to compensate for oxygen vacancies in the island-shaped oxide semiconductor layer 40. The heat treatment for dehydrogenation or dehydration of 6 may be carried out.

[0191] The above is the method for manufacturing the transistors of the display device including the transistor 522.

[0192] 11A to 12C, the island-shaped oxide semiconductor layer 406 is formed as a single layer. However, a multilayer oxide semiconductor layer having two or more layers may also be used.

[0193] As an example, as shown in FIG. 13A, an oxide semiconductor layer 413 and an oxide semiconductor layer 4 The oxide semiconductor layer 406 may be formed as an island-shaped oxide semiconductor layer 406 including two layers.

[0194] As another example, as shown in FIG. 13B, an oxide semiconductor layer 413 and an oxide semiconductor layer The oxide semiconductor layer 406 is an island-shaped oxide semiconductor layer 406 consisting of three layers: the oxide semiconductor layer 414, and the oxide semiconductor layer 415. This may also be configured as follows.

[0195] Here, the oxide stack shown in FIGS. 13(A) and (B) is explained in detail in FIG. 50(A) and 13(A) to 13(C) will be used as an example of an oxide stack. The following description will be given of the case where two oxide semiconductor layers are stacked as shown in FIG. For the sake of illustration, the island-shaped oxide semiconductor layer 406 described in FIG. 13A is shown as an oxide stack 406. In the following description, the oxide semiconductor layer 414 will be read as an oxide layer 414s.

[0196] FIG. 50(A) is an enlarged view of the oxide stack 406s. It includes a semiconductor layer 413 and an oxide layer 414s.

[0197] The oxide semiconductor layer 413 contains at least indium (In), zinc (Zn), and M (Al In-M-Zn containing metals such as Ga, Ge, Y, Zr, Sn, La, Ce or Hf It is preferred to include a layer designated as oxide.

[0198] The oxide layer 414s is formed from one or more elements contained in the oxide semiconductor layer 413. The energy of the conduction band minimum is 0.05 eV or more and 0.07 eV or more than that of the oxide semiconductor layer 413. or more, 0.1 eV or more, 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV The gate electrode 402 is an oxide film having a potential of 0.4 eV or less, or close to the vacuum level. When an electric field is applied, the oxide with the lowest conduction band energy in the oxide stack 406s A channel is formed in the semiconductor layer 413. That is, the oxide semiconductor layer 413 and the insulating layer 41 0, the transistor channel is isolated from the insulating layer 4 In addition, the oxide semiconductor layer 413 can be formed so as not to be in contact with the oxide semiconductor layer 410. Since the oxide layer 414s is composed of one or more elements constituting the oxide semiconductor layer 13, The interface scattering is unlikely to occur between the oxide layer 413 and the oxide layer 414s. Since the movement of carriers is not hindered between the compound semiconductor layer 413 and the oxide layer 414s, Therefore, the field-effect mobility of the transistor is increased. The interface state is unlikely to be formed between the oxide semiconductor layer 413 and the oxide layer 414s. If there is an interface state between the two, a second transistor with a different threshold voltage will be generated using the interface as a channel. This can cause a transistor to appear, causing the apparent threshold voltage of the transistor to fluctuate. Therefore, by providing the oxide layer 414s, electrical characteristics such as the threshold voltage of the transistor can be controlled. The variation in characteristics can be reduced.

[0199] The oxide layer 414s is an In-M-Zn oxide (wherein M is Al, Ti, Ga, Ge, Y, Zr, Sn, La, Ce, Hf, or other metal), and The oxide layer 414s includes an oxide layer having a high atomic ratio of M. Specifically, the oxide layer 414s includes an oxide semiconductor. The above elements are contained in the layer 412 at least 1.5 times, preferably at least 2 times, more preferably at least 3 ... The oxide layer contains indium at an atomic ratio more than 2 times higher than that of the aforementioned elements. Therefore, it has the function of suppressing the occurrence of oxygen deficiency in the oxide layer. The layer 414s is an oxide layer in which oxygen vacancies are less likely to occur than in the oxide semiconductor layer 413.

[0200] That is, the oxide semiconductor layer 413 and the oxide layer 414s contain at least indium, zinc, and and M (metals such as Al, Ti, Ga, Ge, Y, Zr, Sn, La, Ce, or Hf). When the oxide layer 414s is an In-M-Zn oxide, the oxide layer 414s is In:M:Zn=x1:y1:z 1 [atomic ratio], and the oxide semiconductor layer 413 is In:M:Zn=x2:y2:z2 [atomic ratio]. ], it is preferable that y1 / x1 is greater than y2 / x2. y1 / x1 is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more than y2 / x2 In this case, when y2 is equal to or larger than x2 in the oxide semiconductor layer 413, the electric potential of the transistor is However, if y2 is three times or more than x2, the transistor Since the field effect mobility of the capacitor decreases, y2 must be greater than or equal to x2 and less than three times x2. preferable.

[0201] When the oxide semiconductor layer 413 is an In-M-Zn oxide, the atomic ratio of In to M is The ratio is preferably 25 atomic % or more for In and less than 75 atomic % for M, and more preferably 10 atomic % or more for M. Preferably, In is 34 atomic % or more and M is less than 66 atomic %. When the oxide layer 414s is an In-M-Zn oxide, the atomic ratio of In to M is preferably In is less than 50 atomic %, M is 50 atomic % or more, and more preferably In is 25 atomic % or less, and M is 75 atomic % or more.

[0202] The oxide semiconductor layer 413 and the oxide layer 414s are formed of, for example, indium, zinc, and gallium. Specifically, an oxide semiconductor containing sodium can be used for the oxide semiconductor layer 413. Examples include In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:1:1, and In In-Ga-Zn oxide with an atomic ratio of Ga:Zn=3:1:2 or a similar composition The oxide layer 414s can be an oxide having In:Ga:Zn=1 In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:6:4 In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:9:6 Ga-Zn oxide or an oxide having a composition close to that can be used.

[0203] The thickness of the oxide semiconductor layer 413 is greater than or equal to 3 nm and less than or equal to 200 nm, preferably less than or equal to 3 nm. The oxide layer is preferably 3 nm or more and 50 nm or less. The thickness of 414s is 3 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less. do.

[0204] Next, the band structure of the oxide stack 406s will be explained with reference to FIGS. 50(B) and 50(C). do.

[0205] For example, the oxide semiconductor layer 413 is made of In The oxide layer 414s is made of Ga-Zn oxide and has an energy gap of 3.5 eV. The energy gap is measured by a spectroscopic ellipsometer (HO Measurements were taken using a RIBA JOBIN YVON UT-300.

[0206] The energy difference between the vacuum level and the top of the valence band of the oxide semiconductor layer 413 and the oxide layer 414s (also called ionization potential) were 8 eV and 8.2 eV, respectively. The energy difference between the vacuum level and the top of the valence band is measured by ultraviolet photoelectron spectroscopy (UPS). Violet Photoelectron Spectroscopy (PH Measurements were taken using a VersaProbe (manufactured by IHI).

[0207] Therefore, the vacuum level and the energy at the bottom of the conduction band of the oxide semiconductor layer 413 and the oxide layer 414s are The energy difference (also called electron affinity) was 4.85 eV and 4.7 eV, respectively. .

[0208] FIG. 50(B) shows a schematic diagram of a part of the band structure of the oxide stack 406s. Here, a case where a silicon oxide film is provided in contact with the oxide stack 406s will be described. , EcI1 shown in FIG. 50(B) indicates the energy of the bottom of the conduction band of the silicon oxide film, and Ec S1 indicates the energy of the bottom of the conduction band of the oxide semiconductor layer 413, and EcS2 indicates the energy of the oxide semiconductor layer 41 4s conduction band edge energy, and EcI2 is the conduction band edge energy of the silicon oxide film. In addition, EcI1 corresponds to the second insulating layer 404 in FIG. 13(A), EcI2 corresponds to the insulating layer 410 in FIG.

[0209] As shown in FIG. 50(B), the oxide semiconductor layer 413 and the oxide layer 414s The energy at the lower edge of the conductive band changes smoothly without any barrier. In other words, it changes continuously. This is because the oxide layer 414s and the oxide semiconductor layer 413 share the same element. oxygen is transferred between the oxide semiconductor layer 413 and the oxide layer 414s. This can be said to be because a mixed layer is formed between the two.

[0210] As shown in FIG. 50B, the oxide semiconductor layer 413 of the oxide stack 406s serves as a well. In the transistor using the oxide stack 406s, the channel region is formed by the oxide semiconductor layer It can be seen that the oxide stack 406s is formed at the energy Since the temperature changes continuously, the oxide semiconductor layer 413 and the oxide layer 414s are continuously bonded to each other. It can also be said that this is the case.

[0211] As shown in FIG. 50(B), the oxide layer 414s and the insulating layer 410 are adjacent to each other. Although trap levels due to impurities or defects may be formed in the oxide layer 414s, By this, the oxide semiconductor layer 413 can be separated from the trap states. However, when the energy difference between EcS1 and EcS2 is small, the oxide semiconductor layer 413 Electrons may exceed the energy difference and reach the trap level. The trapping generates a negative charge near the interface with the insulating layer, which increases the threshold voltage of the transistor. Therefore, the energy difference between EcS1 and EcS2 is If the difference is 0.1 eV or more, preferably 0.15 eV or more, the threshold voltage of the transistor is This is preferable because it reduces fluctuations in the voltage and provides stable electrical characteristics.

[0212] FIG. 50(C) shows a schematic diagram of a part of the band structure of the oxide stack 406s, and FIG. 50(B) shows a schematic diagram of the band structure of the oxide stack 406s. ) is a modified example of the band structure shown in FIG. 1. Here, a silicon oxide film is formed on the oxide stack 406s. The case where the electrodes are provided in contact with each other will be described. Note that EcI1 shown in FIG. 50(C) is silicon oxide. EcS1 represents the energy of the bottom of the conduction band of the oxide semiconductor layer 413. EcI2 indicates the energy at the bottom of the conduction band of the silicon oxide film. cI1 corresponds to the second insulating layer 404 in FIG. 13(A), and EcI2 corresponds to the second insulating layer 404 in FIG. In A), it corresponds to the insulating layer 410.

[0213] In the transistor shown in FIG. 13A, the source electrode 408 and the drain electrode 409 When the oxide layer 414s is etched above the oxide stack 406s during formation, However, the top surface of the oxide semiconductor layer 413 is covered with the oxide semiconductor layer 414s during the formation of the oxide layer 414s. A mixed layer of the conductor layer 413 and the oxide layer 414s may be formed.

[0214] For example, the oxide semiconductor layer 413 may be formed of In:Ga:Zn=1:1:1 (atomic ratio). -Ga-Zn oxide, or In-Ga- with an atomic ratio of In:Ga:Zn=3:1:2 The oxide layer 414s is a Zn oxide, and the atomic ratio of In:Ga:Zn is 1:3:2. In-Ga-Zn oxide, or In-G with an atomic ratio of In:Ga:Zn=1:6:4 In the case of a-Zn oxide, the Ga content of the oxide layer 414s is higher than that of the oxide semiconductor layer 413. Since the amount is large, the GaOx layer or the oxide semiconductor layer 41 A mixed layer containing more Ga than 3 can be formed.

[0215] Therefore, even when the oxide layer 414s is etched, the EcI The energy at the bottom of the conduction band on the 2 side becomes higher, resulting in the band structure shown in Figure 50(C). There are cases where this happens.

[0216] <Method of manufacturing pixel section, protection circuit, and connection section> Next, referring to FIGS. 14A to 17B, a pixel portion 581, a holding portion 582, and a holding portion 583 are formed on a substrate 521. The steps for fabricating the protective circuit 582 and the connection portion 583 will be described.

[0217] First, as shown in FIG. 14(A), a substrate is formed by a photolithography process and an etching process. On the plate 521, a conductive layer 519, a conductive layer 551, and a conductive layer 571 are formed. The conductive layers 551 and 571 are formed by a resist mask using a first photomask. A resist mask is formed on a conductive film, and the conductive film is etched. After the conductive layer 519, the conductive layer 551, and the conductive layer 571 are formed, a resist Remove the mask.

[0218] Next, insulating layers 532 and 533 are formed on the conductive layers 519, 551, and 571. 14(B), a photolithography process and an etching process are performed. The semiconductor layer 523 is formed on the insulating layer 533 through a process. A resist mask is formed on a semiconductor film using a photomask, and the semiconductor film is etched. After the semiconductor layer 523 is formed, the resist mask is removed.

[0219] Next, an opening 584 is formed in the insulating layer 532, and an opening 585 is formed in the insulating layer 532 and the insulating layer 533. Specifically, as shown in FIG. 14(C), a photolithography process and an etching process are performed. By the etching process, the insulating layer 532 is left in the protective circuit 582 at the remaining opening 584 and the connecting portion 583. An opening 585 can be formed by removing the insulating layers 532 and 533. The portion 584 and the opening 585 are formed by using a third photomask to form resists having different thicknesses. A mask is formed on the insulating layer 533, and the insulating layer 533 and / or the insulating layer 532 are etched. After the openings 584 and 585 are formed, the resist mask is removed. Remove.

[0220] The mask used to form the openings 584 and 528 is a multi-tone mask. A multi-tone mask is a mask that has three exposures: an exposed area, an intermediate exposed area, and an unexposed area. It is an exposure mask that can perform leveling and transmits light with multiple intensities. A single exposure and development process can produce a pattern having regions of multiple thicknesses (typically two types). Therefore, by using a multi-tone mask, it is possible to It is possible to reduce the number of optical masks. Examples of the mask include a gray-tone mask and a black-and-white mask.

[0221] By using a multi-tone mask, the openings 584 and 585 are formed with different depths. As a result, the opening 584 exposes the insulating layer 532 and The opening 585 can have a structure in which the conductive layer 519 is exposed. The method for forming 585 is not limited to this, and may be performed using a different mask, for example.

[0222] As a result, the insulating layers 532 and 533 formed in the pixel section 581 are stacked gate insulating layers. The insulating layer 532 formed in the protection circuit 582 can function as a resistor. The insulating layers 532 and 533 of the connection portion 583 are conductive. The layers can be removed to directly connect to each other. In this display device, a pixel section 581, a protection circuit 582, and a connection section 583 are formed in the same process. Therefore, it is possible to form a display device without increasing the manufacturing cost. It becomes Noh.

[0223] Next, a conductive film is formed over the semiconductor layer 523, the conductive layer 571, the insulating layer 532, and the insulating layer 533. Then, as shown in FIG. 15(A), a photolithography process and an etching process are performed. As a result, the conductive layer 52 is formed on the semiconductor layer 523, the conductive layer 571, the insulating layer 532, and the insulating layer 533. 0, a conductive layer 524, a conductive layer 552, and a conductive layer 571 are formed. 24, the conductive layer 552 and the conductive layer 571 are formed by using a fourth photomask. The conductive layer 520 is formed on the conductive film and then etched. After the conductive layer 524, the conductive layer 552, and the conductive layer 571 are formed, the resist mask is removed.

[0224] Next, conductive layer 520, conductive layer 524, conductive layer 552, conductive layer 571 and insulating layer 533 are formed on the conductive layer 520, conductive layer 524, conductive layer 552, conductive layer 571 and insulating layer 533. Then, insulating layers 534, 535, 536, and 537 are formed. As shown in FIG. 15(B), a pixel portion 58 is formed by a photolithography process and an etching process. 1, an opening 585 is formed that reaches the conductive layer 524. The opening 585 is A resist mask is formed on the insulating layer 537 using a photomask, and the insulating layer 534 and the insulating layer The insulating layer 535, the insulating layer 536 and the insulating layer 537 are etched to form the opening 5. After the formation of 85, the resist mask is removed.

[0225] Although one photomask is added, the opening is formed in the insulating layer 537. The photomask was used to form contact holes in the insulating layers 534, 535, and 536. The photomask for forming the pattern may be a different mask.

[0226] Next, a conductive film is formed over the conductive layer 524 and the insulating layer 537. As shown in FIG. 1, a conductive layer is formed on the insulating layer 537 by a photolithography process and an etching process. The conductive layer 525 is formed by introducing a resist mask using a sixth photomask. After the conductive layer 525 is formed, the conductive layer 525 is formed on the conductive film and then etched. Then, the resist mask is removed.

[0227] By forming the conductive layer 525, a conductive layer formed in the same layer as the conductive layer 525 may be formed. A connecting portion may be formed to directly connect the conductive layer formed on the other layer. In this case, openings may be formed in advance at predetermined locations using a fifth photomask. Alternatively, the formation of the conductive layer 525 may be used to form a plurality of conductive layers formed in different layers. In this case, the same photomask may be used. In this case, different conductive layers can be electrically connected to each other using openings that are opened together. Therefore, the number of photomasks used can be reduced.

[0228] Next, an insulating layer 538 is formed over the conductive layer 524, the conductive layer 525, and the insulating layer 537. As shown in FIG. 16(B), the pixel is formed by a photolithography process and an etching process. In the portion 581, an opening 586 is formed that reaches the conductive layer 524. A resist mask was formed on the insulating layer 538 using the photomask of No. 7. After the opening 586 is formed, the resist mask is removed. .

[0229] Next, a conductive film is formed over the conductive layer 524 and the insulating layer 538. As shown in FIG. 1, the conductive layer 524 and the insulating layer 525 are formed by the photolithography process and the etching process. A conductive layer 526 is formed over the insulating film 38. The conductive layer 526 is formed by photolithography using an eighth photomask. A resist mask is formed on the conductive film, and the conductive film is etched to form the conductive film. After the formation of layer 526, the resist mask is removed.

[0230] By forming the conductive layer 526, a conductive layer formed in the same layer as the conductive layer 526 may be formed. A connecting portion may be formed to directly connect the conductive layer formed on the other layer. In this case, openings may be formed in advance at predetermined locations using a seventh photomask. Alternatively, the formation of the conductive layer 526 may be performed by forming a plurality of conductive layers in different layers. In this case, the same photomask may be used. In this case, different conductive layers can be electrically connected to each other using openings that are opened together. Therefore, the number of photomasks used can be reduced.

[0231] As shown in FIG. 17(B), an alignment film 539 is formed on the conductive layer 526 and the insulating layer 538. The alignment film 539 is formed by printing a polyimide resin on the conductive layer 526 and the insulating layer 538 by a printing method or the like. The alignment film 539 is then coated on the substrate and baked. The alignment film 539 is then subjected to alignment treatment by rubbing or light irradiation. It is possible.

[0232] Although not shown, a spacer for maintaining the cell gap is provided on the alignment film 539. The spacer is formed by applying a photosensitive curing resin agent on the alignment film 539 and forming a ninth photoresist. The resin is exposed through a mask and developed to form spacers made of resin in each pixel. .

[0233] Next, the structure formed on the substrate 541 provided opposite the substrate 521 will be described with reference to FIG. is omitted, but will be briefly explained here.

[0234] On a substrate 541, a black matrix 542, a color filter 543, and an overcoat The black matrix 542 and the color filter 543 are formed on the substrate 5 An alignment film 545 is formed on the overcoat 544. .

[0235] Next, a liquid crystal layer 540 is formed between the substrate 521 and the substrate 541. The forming method may be a dispenser method (dropping method) or a method in which the substrate 521 and the substrate 541 are bonded together. Then, a liquid crystal is injected by using capillary action.

[0236] Through the above cell process, a liquid crystal panel in which the liquid crystal layer 540 is sealed can be manufactured.

[0237] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0238] (Embodiment 3) In this embodiment, the components of the in-plane switching liquid crystal display device described in the second embodiment are the same as those of the first embodiment. A modified example of the above will be described.

[0239] <Configuration of Modified Pixel> As shown in FIG. 18, the conductive layer 526 is provided to overlap with the transistor 522. That's fine.

[0240] <Configuration of Modified Protection Circuit> Next, a modification of the protection circuit 511 will be described. FIG. 19(A) shows an example of the configuration of the protection circuit. 19(B) is a cross-sectional view taken along the line B3-B4 in FIG. 19(A). .

[0241] In the plan view of the protection circuit 511 shown in FIG. 19A, for example, a conductive layer 552, a conductive 5 shows a layer having a conductive layer 554 and a semiconductor layer 555.

[0242] The conductive layer 554 is a wiring for leaking an overcurrent caused by a surge voltage. 4 is fixed to the ground potential (GND), for example. , can be formed in the same manner as the conductive layer 520.

[0243] The semiconductor layer 555 is a layer having semiconductor properties. It can be formed in the same manner as 523.

[0244] In other words, the protective circuit 511 shown in FIG. 19A includes a semiconductor layer 555 between a pair of electrodes. By controlling the resistivity of the semiconductor layer 555, one of the pair of electrodes When an overcurrent flows to one electrode, part or all of the overcurrent can be released to the other electrode. .

[0245] By providing the protection circuit 511 shown in FIG. 19A in this manner, the pixel portion 501 The gate drivers 502 and 503 and the source driver 504 are The resistance to overcurrent can be improved. Therefore, the novel display can improve reliability. An apparatus can be provided.

[0246] In the cross-sectional view of the protection circuit 511 taken along the line B3-B4 in FIG. 19(B), as an example, , substrate 521, insulating layer 532, insulating layer 533, semiconductor layer 555, conductive layer 552, conductive layer 5 54, insulating layer 534, insulating layer 535, insulating layer 536, insulating layer 537, insulating layer 538, orientation film 539, liquid crystal layer 540, substrate 541, black matrix 542, overcoat 54 4, the alignment film 545 is shown.

[0247] As described above, in the protection circuit 511, a semiconductor layer is provided between the conductive layer 552 and the conductive layer 554. Therefore, the pixel section 501, the gate driver 502, and the 3 and the source driver 504 enhance the resistance to overcurrent caused by ESD, etc. Therefore, it is possible to provide a novel display device that can improve reliability. .

[0248] Another example of the configuration of the protection circuit 511 will be described. 20(B) is a cross-sectional view taken along the line B5-B6 in FIG. 20(A). be.

[0249] In the plan view of the protection circuit 511 shown in FIG. 20A, for example, the conductive layer 552, the conductive layer 554, a semiconductor layer 555, a conductive layer 556, and a conductive layer 557 are shown.

[0250] The conductive layer 556 and the conductive layer 557 are formed by the conductive layer 552, the semiconductor layer 555, and the conductive layer 554. The conductive layer 556 and the conductive layer 557 are wirings for connecting the semiconductor layer 555 to the conductive layer 556. can be formed in the same manner as the conductive layer 525.

[0251] In other words, the protective circuit 511 shown in FIG. 20A includes a conductive layer 556 and a semiconductor layer 557 between a pair of electrodes. The structure sandwiches a conductor layer 555 and a conductive layer 557, and controls the resistivity of the semiconductor layer 555. By doing so, when an overcurrent flows through one of the pair of electrodes, a part of the overcurrent flows to the other electrode. Or you can let it all go.

[0252] By providing the protection circuit 511 shown in FIG. 20A in this manner, the pixel portion 501 The gate drivers 502 and 503 and the source driver 504 are The resistance to overcurrent can be improved. Therefore, the novel display can improve reliability. An apparatus can be provided.

[0253] In the cross-sectional view of the protection circuit 511 taken along the line B5-B6 in FIG. 20B, for example, , substrate 521, insulating layer 532, insulating layer 533, semiconductor layer 555, conductive layer 552, conductive layer 5 54, insulating layer 534, insulating layer 535, insulating layer 536, insulating layer 537, conductive layer 556, conductive layer 557, insulating layer 538, alignment film 539, liquid crystal layer 540, substrate 541, black matrix The film 542, the overcoat 544, and the alignment film 545 are shown.

[0254] As described above, in the protection circuit 511, the conductive layer 552 is disposed between the conductive layer 554. 56, a conductive layer 557, and a semiconductor layer 555 are provided. 1. The gate drivers 502, 503 and the source driver 504 are protected from ESD and other damage. Therefore, the reliability of the new device can be improved. A display device can be provided.

[0255] Another example of the configuration of the protection circuit 511 will be described. 21(B) is a cross-sectional view taken along the line B7-B8 in FIG. 21(A). be.

[0256] In the plan view of the protection circuit 511 shown in FIG. 21A, for example, the conductive layer 552, the conductive layer 554, a semiconductor layer 555, a conductive layer 558, and a conductive layer 559 are shown.

[0257] The conductive layer 558 and the conductive layer 559 are formed by the conductive layer 552, the semiconductor layer 555, and the conductive layer 554. The conductive layer 558 and the conductive layer 559 are wirings for connecting the semiconductor layer 555 to the conductive layer 558. can be formed in the same manner as the conductive layer 526.

[0258] In other words, the protective circuit 511 shown in FIG. 21A includes a conductive layer 558 and a semiconductor layer 559 between a pair of electrodes. The structure sandwiches a conductor layer 555 and a conductive layer 559, and the resistivity of the semiconductor layer 555 is controlled. By doing so, when an overcurrent flows through one of the pair of electrodes, a part of the overcurrent flows to the other electrode. Or you can let it all go.

[0259] By providing the protection circuit 511 shown in FIG. 21A in this way, the pixel portion 501 The gate drivers 502 and 503 and the source driver 504 are The resistance to overcurrent can be improved. Therefore, the novel display can improve reliability. An apparatus can be provided.

[0260] In the cross-sectional view of the protection circuit 511 taken along the line B7-B8 in FIG. 21B, for example, , substrate 521, insulating layer 532, insulating layer 533, semiconductor layer 555, conductive layer 552, conductive layer 5 54, insulating layer 534, insulating layer 535, insulating layer 536, insulating layer 537, conductive layer 558, conductive layer 559, insulating layer 538, alignment film 539, liquid crystal layer 540, substrate 541, black matrix The film 542, the overcoat 544, and the alignment film 545 are shown.

[0261] As described above, in the protection circuit 511, the conductive layer 552 is disposed between the conductive layer 554. 58, a conductive layer 559, and a semiconductor layer 555 are provided. 1. The gate drivers 502, 503 and the source driver 504 are protected from ESD and other damage. Therefore, the reliability of the new device can be improved. A display device can be provided.

[0262] In the plan views of the protection circuits shown in FIGS. 19(A), 20(A), and 21(A), The shape of the semiconductor layer is a meander shape as shown in FIG. 22(A) and FIG. 22(B). It is also possible.

[0263] Next, another example of the configuration of the protection circuit 511 will be described. FIG. 2 is a cross-sectional view showing an example of the configuration of a path.

[0264] In the cross-sectional view of the protection circuit 511 shown in FIG. 23(A), for example, a substrate 521, an insulating layer 5 32, insulating layer 533, conductive layer 551, conductive layer 552, semiconductor layer 555, insulating layer 534, insulating Edge layer 535, insulating layer 536, insulating layer 537, conductive layer 525, conductive layer 558, conductive layer 559 , an insulating layer 538, an alignment film 539, a liquid crystal layer 540, a substrate 541, and a black matrix 542 , an overcoat 544, and an alignment film 545 are shown.

[0265] As described above, in the protection circuit 511, a semiconductor layer is provided between the conductive layer 552 and the conductive layer 551. 555 and a conductive layer 525 are provided. The drivers 502 and 503 and the source driver 504 are designed to withstand overcurrent caused by ESD or the like. Therefore, a novel display device that can improve reliability can be provided. It is possible.

[0266] In the cross-sectional view of the protection circuit 511 shown in FIG. 23(B), for example, a substrate 521, an insulating layer 5 32, insulating layer 533, conductive layer 551, conductive layer 552, semiconductor layer 555, insulating layer 534, insulating Edge layer 535, insulating layer 536, insulating layer 537, conductive layer 526, conductive layer 558, conductive layer 559 , an insulating layer 538, an alignment film 539, a liquid crystal layer 540, a substrate 541, and a black matrix 542 , an overcoat 544, and an alignment film 545 are shown.

[0267] As described above, in the protection circuit 511, a semiconductor layer is provided between the conductive layer 552 and the conductive layer 551. 555 and a conductive layer 526 are provided. The buffers 502 and 503 and the source driver 504 are designed to withstand overcurrent caused by ESD or the like. Therefore, a novel display device that can improve reliability can be provided. It is possible.

[0268] 24(A), (B), and (C) show circuits that can be used as the protection circuit 511. 1 shows an example of a road configuration.

[0269] The circuit configuration shown in FIG. 24A includes wirings 351, 352, and 381, a transistor 302, 304.

[0270] The transistor 302 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 351. A first terminal of the transistor 302 is connected to a wiring 381. The transistor 304 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 352. A first terminal of the transistor 304 is connected to a wiring 381.

[0271] The circuit configuration shown in FIG. 24(B) includes wirings 353, 354, 382, ​​383, and 384, The configuration includes transistors 306, 308, 310, and 312.

[0272] The transistor 306 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 383. A first terminal of the transistor 306 is connected to a wiring 382.

[0273] The transistor 308 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 384. A first terminal of the transistor 308 is connected to a wiring 383.

[0274] The transistor 310 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 382. A first terminal of the transistor 310 is connected to a wiring 383.

[0275] The transistor 312 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 383. A first terminal of the transistor 312 is connected to a wiring 384.

[0276] The circuit configuration shown in FIG. 24(C) includes wirings 355, 356, 385, and 386 and transistors. The configuration includes:

[0277] The transistor 314 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 385. A first terminal of the transistor 314 is connected to a wiring 386.

[0278] The transistor 316 has a first terminal that functions as a source electrode and a second terminal that functions as a gate electrode. The third terminal, which functions as a drain electrode, is connected to the wiring 386. A first terminal of the transistor 316 is connected to a wiring 385.

[0279] A protection circuit 511 that can be used in one embodiment of the present invention is shown in FIGS. It is also possible to use diode-connected transistors as in the circuit configuration shown in

[0280] In the circuit configurations shown in Figures 24(A), (B), and (C), The connection between the first terminal, which functions as a gate electrode, and the second terminal, which functions as a gate electrode, is shown in the cross-sectional view of FIG. By using the configuration shown in the figure, it is possible to arbitrarily control the resistivity.

[0281] FIG. 25(A) shows a resistive element that can be used as the protection circuit 511. In the cross-sectional view of the resistor element shown in FIG. 25(A), a substrate 521, a conductive layer 551, an insulating layer 53 2, insulating layer 533, semiconductor layer 555, conductive layer 552, insulating layer 534, insulating layer 535, insulating Layer 536, insulating layer 537 and conductive layer 556 are shown.

[0282] FIG. 25(B) shows a resistive element that can be used as the protection circuit 511. In the cross-sectional view of the resistor element shown in FIG. 25(B), the substrate 521, the conductive layer 551, the insulating layer 53 2, insulating layer 533, semiconductor layer 555, conductive layer 552, insulating layer 534, insulating layer 535, insulating Layer 536, insulating layer 537, conductive layer 556 and conductive layer 557 are shown.

[0283] FIG. 25(C) shows a resistive element that can be used as the protection circuit 511. In addition, in the cross-sectional view of the resistor element shown in FIG. 25(C), the substrate 521, the conductive layer 551, the insulating layer 53 2, insulating layer 533, semiconductor layer 555, conductive layer 552, conductive layer 554, insulating layer 534, insulating Layer 535, insulating layer 536, insulating layer 537, conductive layer 556 and conductive layer 557 are shown.

[0284] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0285] <Configuration of Modified Transistor> Next, a modification of the transistor 522 will be described.

[0286] A method for manufacturing a transistor of a display device including the above-described transistor 522 will be described below. .

[0287] A manufacturing method of the transistor 522 will be described with reference to FIGS.

[0288] The manufacturing method shown in FIGS. 26(A) to 27(C) is the same as that shown in FIGS. The difference from the manufacturing method is that the length L1 of the gate electrode 402 in the channel length direction is The length of the layer in the channel length direction is made larger than L2 (L1>L2), and the island-shaped oxide semiconductor In the process of forming the conductor layer 406, the second insulating layer 404 is processed at the same time to form the second insulating layer 404. The point is that the source electrode 408 (or the drain electrode 416) is formed as the layer 416. A resistive element serving as a protection circuit can be formed between the electrode 409 and the gate electrode 402. do.

[0289] As shown in FIG. 26(D), the length L1 of the gate electrode 402 in the channel length direction is made by adding an oxide semiconductor. When the length L2 in the channel length direction of the conductor layer is to be larger than L2, the gate electrode 402 is processed in advance. At this point, the length L1 in the channel length direction should be increased to perform the processing.

[0290] 26D, the island-shaped oxide semiconductor layer 406 and the second insulating layer 416 In this case, the resist mask remains when the island-shaped oxide semiconductor layer 406 is processed. The second insulating layer 416 may be partially removed by isotropic etching. In this case, the edge of the island-shaped oxide semiconductor layer 406 is etched together with the etching of the second insulating layer 416. The island-shaped oxide semiconductor layer 406 is etched to have a smaller size than the designed size. do.

[0291] In addition, a transistor 522 manufactured by the manufacturing method shown in FIGS. The structure of the pixel 518 is as shown in Figures 28(A) and 28(B). 28(B) is a cross-sectional view taken along the cutting line A7-A8 in FIG. 28(A). FIG.

[0292] <Configuration of Modified Example in Cross-Sectional View of Liquid Crystal Display Device> Next, a modified example of the cross-sectional view of the in-plane switching liquid crystal display device will be described.

[0293] In the cross-sectional views shown in FIGS. 29(A) and 29(B), as an example, 29(A) and (B) show the cross-sectional view of the pixel section and the cross-sectional view of the connection section. 29A. The cross-sectional view shown in FIG. 29A shows the structure of the semiconductor layer 523. A conductive layer 526 is formed later.

[0294] In the configuration of FIG. 29(B), the conductive layer 52 in the area overlapping the black matrix 542 5 and the conductive layer 573, a conductive layer 576 for enhancing conductivity is laminated. 29(A) and (B) show the structure of the conductive layer in the connection part. As the conductive layers connected to the first and second electrodes, a conductive layer 571 and a conductive layer 572 are shown as different conductive layers.

[0295] In the cross-sectional view shown in FIG. 29(A), a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 5 33, semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating An edge layer 536, a conductive layer 525, a conductive layer 526, an alignment film 539, a liquid crystal layer 540, a substrate 541, Black matrix 542, color filter 543, overcoat 544, alignment film 54 29A shows the transistor 5, the conductive layer 571, and the conductive layer 573. 22 is shown.

[0296] In the cross-sectional view shown in FIG. 29(B), a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 5 33, semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating An edge layer 536, a conductive layer 525, a conductive layer 526, an alignment film 539, a liquid crystal layer 540, a substrate 541, Black matrix 542, color filter 543, overcoat 544, alignment film 54 5, a conductive layer 571, a conductive layer 573, and a conductive layer 576 are shown. Transistor 522 is shown.

[0297] The conductive layer 576 serves as an electrode for assisting the conductivity of the conductive layer 525 and the conductive layer 573. The conductive layer 576 has the following functions. Nickel, copper, yttrium, zirconium, molybdenum, ruthenium, silver, tantalum and It is preferable to form one or more layers of a film made of a conductive material containing one or more types of tungsten.

[0298] Next, in the configuration of the cross section shown in FIG. 30, unlike FIGS. 29(A) and (B), the conductive layer After forming the layer 526, the semiconductor layer 523 is formed. In this structure, the insulating layer 533 remains overlapping with the conductive layer 526 .

[0299] In the cross-sectional view shown in FIG. 30, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, conductive layer 525, conductive layer 526, alignment film 539, liquid crystal layer 540, substrate 541, black a color matrix 542, a color filter 543, an overcoat 544, an alignment film 545, and a conductive film. 30 shows a conductive layer 572, a conductive layer 573, and a conductive layer 576. 522 is shown.

[0300] The cross-sectional view shown in FIG. 31 is, as an example, a modified example of the cross-sectional view shown in FIG. 6(A). 31 shows the cross-sectional structure of the pixel section as well as the cross-sectional structure of the connection section. The cross-sectional view shown in FIG. 1 shows a structure in which a conductive layer 526 functioning as a pixel electrode is formed, and then a common electrode is formed. In this configuration, a conductive layer 525 that functions as a conductive layer is formed.

[0301] In the cross-sectional view shown in FIG. 31, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5 shows a gate 544, an alignment film 545, a conductive layer 571, a conductive layer 573, and a conductive layer 575. Also shown in FIG. 31 is transistor 522.

[0302] The cross-sectional view shown in FIG. 32 is, as an example, a modified example of the cross-sectional view shown in FIG. 6(A). 32 shows the cross-sectional structure of the pixel section as well as the cross-sectional structure of the connection section. In the cross-sectional view of FIG. 2, the conductive layer 526 functioning as a pixel electrode is disposed between the transistor 522 and the gate electrode 523. The insulating film 521 is provided so as to overlap with the semiconductor layer 523 constituting the insulating film 521 .

[0303] In the cross-sectional view shown in FIG. 32, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 32 shows a gate 544, an alignment film 545, a conductive layer 571, and a conductive layer 573. , transistor 522 is shown.

[0304] The cross-sectional view shown in FIG. 33 is, as an example, a modified example of the cross-sectional view shown in FIG. 6(A). 33 shows the cross-sectional structure of the pixel section as well as the cross-sectional structure of the connection section. The cross-sectional view of FIG. 3 shows the structure of the conductive layer 576 functioning as a back gate electrode of the transistor. is provided overlapping with the conductive layer 526 and over the transistor 522 .

[0305] In the cross-sectional view shown in FIG. 33, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5 shows a gate 544, an alignment film 545, a conductive layer 571, a conductive layer 573, and a conductive layer 576. Also shown in FIG. 33 is transistor 522.

[0306] The conductive layer 576 is a wiring that functions as a back gate electrode of the transistor. The conductive layer 576 can be formed in the same manner as the conductive layer 575 .

[0307] The cross-sectional view shown in FIG. 34 is, as an example, a modified example of the cross-sectional view shown in FIG. In addition to the cross-sectional view of the pixel section, the cross-sectional view of the connection section is also shown. The cross-sectional view of the transistor shows a structure in which a conductive layer 576 serving as a back gate electrode of the transistor is formed. The conductive layer 526 is provided to overlap the conductive layer 526 directly connected to the conductive layer 519 and is provided over the transistor 522. This is a configuration that can be used.

[0308] In the cross-sectional view shown in FIG. 34, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5 shows a gate 544, an alignment film 545, a conductive layer 571, a conductive layer 573, and a conductive layer 576. Also shown in FIG. 34 is transistor 522.

[0309] The cross-sectional view shown in FIG. 35 is, as an example, a modified example of the cross-sectional view shown in FIG. 6(A). 35 shows the cross-sectional structure of the pixel section as well as the cross-sectional structure of the connection section. The cross-sectional view of FIG. 5 shows a structure including a transistor 522, a conductive layer 526 functioning as a pixel electrode, and a A conductive layer 525 is provided to overlap the connection portion.

[0310] In the cross-sectional view shown in FIG. 35, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5 shows a gate 544, an alignment film 545, a conductive layer 571, a conductive layer 573, and a conductive layer 575. Also shown in FIG. 35 is transistor 522.

[0311] The cross-sectional view shown in Figure 36 is, as an example, a modified example of the cross-sectional view of Figure 31. In addition to the cross-sectional view of the pixel section, the cross-sectional configuration of the protection circuit section shown in FIG. The cross-sectional view of FIG. 36 shows a configuration in which the insulating layer 538 is directly connected to the semiconductor layer 555 in the protection circuit section. It is configured to be installed in contact with each other.

[0312] In the cross-sectional view shown in FIG. 36, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5, an alignment film 544, an alignment layer 545, a conductive layer 552, a conductive layer 554, and a semiconductor layer 555. Also shown in FIG. 36 is transistor 522.

[0313] The cross-sectional view shown in Figure 37 is, as an example, a modified example of the cross-sectional view of Figure 35. In addition to the cross-sectional view of the pixel section, the cross-sectional configuration of the protection circuit section shown in FIG. The cross-sectional view of FIG. 37 shows a configuration in which the insulating layer 538 is directly connected to the semiconductor layer 555 in the protection circuit section. It is configured to be installed in contact with each other.

[0314] In the cross-sectional view shown in FIG. 37, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5, an alignment film 544, an alignment layer 545, a conductive layer 552, a conductive layer 554, and a semiconductor layer 555. Also shown in FIG. 37 is transistor 522.

[0315] The cross-sectional view shown in FIG. 38 is, as an example, a modified example of the cross-sectional view of FIG. 6(A). 1 shows the cross-sectional configuration of the pixel section as well as the cross-sectional configuration of the protection circuit section shown in FIG. 38, the insulating layer 538 is formed on the semiconductor layer 555 in the protection circuit portion. The structure is such that the filter is provided in direct contact with the filter.

[0316] In the cross-sectional view shown in FIG. 38, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating layer 533, Semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 535, insulating layer 5 36, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, a substrate 541, a black matrix 542, a color filter 543, an overcoat 5, an alignment film 544, an alignment layer 545, a conductive layer 552, a conductive layer 554, and a semiconductor layer 555. Also shown in FIG. 38 is transistor 522.

[0317] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0318] (Fourth embodiment) In this embodiment mode, a touch sensor is added to the in-plane switching display device described in the above embodiment mode 1. This section explains the configuration in which a touch panel is functioned by providing a touch sensor (touch detection device). do.

[0319] In this embodiment, a touch panel will be described with reference to FIGS.

[0320] FIG. 39 is a cross-sectional view of a touch panel in which the liquid crystal display device 500 is used as a touch panel. FIG. 40 shows a conductive layer functioning as an electrode on which the capacitance of the touch sensor is formed. 41(A) is a plan view showing a configuration example, and FIG. 41(A) is a cross section taken along the cutting line C1-C2 in FIG. 41(B) is a plan view of the region 430 in FIG.

[0321] Touch panel 420 in which the liquid crystal display device 500 shown in FIG. 39 is made to function as a touch panel. In the cross-sectional view showing the configuration example, for example, a substrate 521, a conductive layer 519, an insulating layer 532, an insulating Edge layer 533, semiconductor layer 523, conductive layer 520, conductive layer 524, insulating layer 534, insulating layer 53 5, insulating layer 536, insulating layer 537, conductive layer 525, conductive layer 526, insulating layer 538, alignment film 539, liquid crystal layer 540, substrate 541, black matrix 542, color filter 543 , an overcoat 544, an alignment film 545, a member having a polarizing function (hereinafter referred to as a polarizing plate 42 1), a member having a polarizing function (hereinafter referred to as polarizing plate 422), and a conductive 39 shows a layer (hereinafter referred to as a conductive layer 423) of the transistor 522. Illustrated.

[0322] The touch panel 420 is provided with a capacitance sensor as a touch sensor. A polarizing plate 421 is attached to the outside of the substrate 541, and a polarizing plate 422 is attached to the outside of the substrate 541. It is being done.

[0323] The polarizing plate 421 may be any suitable one that can produce linearly polarized light from natural light or circularly polarized light. For example, by arranging dichroic materials in a certain direction, optical Such a polarizing plate can be, for example, an iodine-based The compound is adsorbed onto a film such as polyvinyl alcohol, and then stretched in one direction. In addition to iodine-based compounds, dichroic materials include The same applies to the polarizing plate 422.

[0324] The conductive layer 423 serves as an anti-static conductor and also serves as a capacitance for the touch sensor. The conductive layer 423 is formed in the same manner as the conductive layer 525. It is possible.

[0325] As shown in FIG. 40, the common electrode and the other electrode on which the capacitance of the touch sensor is formed are In the plan view showing the functional conductive layer 525 and the conductive layer 423, for example, a substrate 521, substrate 541, FPC 461, FPC 462, wiring 431, wiring 432, conductive layer 5 40, the region corresponding to the pixel portion 501 is shown. This is shown by the dotted line.

[0326] In the plan view shown in FIG. 40, the conductive layer 525 and the conductive layer 423 have a stripe shape. The conductive layer 525 and the conductive layer 423 are arranged perpendicular to each other in a plane. 525 is connected to an FPC 461 attached to the substrate 521 by a wiring 431 . The conductive layer 423 is connected to an FPC 462 attached to a substrate 541 by a wiring 432. do.

[0327] In the cross-sectional view taken along the line C1-C2 in FIG. 40 shown in FIG. 41(A), the substrate 521, the transistor A transistor 522, a conductive layer 525, a conductive layer 526, a liquid crystal layer 540, a substrate 541, and a conductive layer 4 It shows 23.

[0328] The conductive layer 526 functioning as a pixel electrode is provided for each pixel. It is connected to 22.

[0329] 41(B), a plan view of the region 430 in FIG. 40 shows the pixel 518, the conductive Layer 525 and conductive layer 423 are shown.

[0330] A plurality of pixels 518 are provided in the region where the conductive layer 525 and the conductive layer 423 intersect.

[0331] The capacitance of the touch sensor is formed in the area where the conductive layer 525 and the conductive layer 423 intersect. In a capacitor including the conductive layer 525 and the conductive layer 423 as a pair of electrodes, 5 is an electrode for applying a potential to the capacitor element. This is an electrode for extracting the flowing current.

[0332] The touch panel 420 operates by inputting a video signal to the pixels and detecting contact. During display operation, the potential of the conductive layer 525 is fixed to a low level. During the sensing period, pulse signals are applied to the conductive layers 525 in sequence, and the potential At this time, if a finger is in contact with the touch panel 420, As capacitance is added to the capacitive element of the touch sensor, the current flowing through the capacitive element changes, causing the conductive The potential of the conductive layer 423 is changed by sequentially scanning the pulse signal of the conductive layer 525. By detecting the change in potential, the position of the finger contact is detected.

[0333] As described above, by configuring a touch panel with the liquid crystal display device 500, As an electrode constituting the capacitance of 420, the FFS mode liquid crystal display device 500 is originally provided with The anti-static conductor and common electrode for the pixels can be used, making the display light and thin. It is possible to provide a touch panel with a high display quality.

[0334] (Embodiment 5) In this embodiment, the display device described in the fourth embodiment functions as a touch panel. Modifications and applications of the configuration for achieving this will be described below.

[0335] <Configuration of Modified External Touch Panel> The structure of the touch panel is such that the touch panel substrate forming the capacitance is It is configured to be attached to the substrate 541 side, or to the outside of the substrate 541 of the liquid crystal display device 500. By using a conductive film for anti-static purposes, surface capacitance The touch panel may be configured as an external touch panel, such as a touch sensor of the touch panel type. Hereinafter, with reference to FIGS. 42(A) to 43, a touch panel applied to an external touch panel will be described. An example of the configuration of the sensor will be described.

[0336] FIG. 42(A) is an exploded perspective view showing a configuration example of a touch sensor, and FIG. 42(B) is a perspective view showing a configuration example of a touch sensor. 43 is a plan view showing an example of the configuration of the electrodes of the touch sensor 450. FIG.

[0337] As shown in FIGS. 42A and 42B, the touch sensor 450 has a plurality of electrodes 45 42(A) and 42(B) correspond to a plan view of the contact 1 and the plurality of electrodes 452. The sensor 450 has a plurality of electrodes 451 arranged in the X-axis direction on a substrate 491, and A plurality of electrodes 452 are formed in the Y-axis direction, which intersects with the Y-axis direction.

[0338] Each of the electrodes 451 and 452 has a structure in which a plurality of quadrilateral conductive films are connected. The electrodes 451 and the electrodes 452 are arranged such that the positions of the quadrilateral portions of the conductive film do not overlap. At the intersection of the electrode 451 and the electrode 452, An insulating film is provided between 452 so that they do not come into contact.

[0339] FIG. 43 is a cross-sectional view illustrating an example of a connection structure between the electrode 451 and the electrode 452. A cross-sectional view of the intersection of electrodes 451 and 452 is shown as an example. 44 is an equivalent circuit diagram of the intersection of the electrode 451 and the electrode 452. A capacitor element 454 is formed at the intersection of the gate electrodes 452 .

[0340] As shown in FIG. 43, the electrode 451 includes a first conductive film 451a and a first conductive film 451b. and a second conductive film 451c on the insulating film 481. The electrode 452 is connected to the conductive film 451b by the conductive film 451c. An insulating film 482 is formed to cover the electrodes 451, 452, and 471. The insulating films 481 and 482 may be formed using, for example, a silicon oxynitride film. A base film made of an insulating film may be formed between the substrate 491 and the electrode 451 and between the substrate 491 and the electrode 471. As the base film, for example, a silicon oxynitride film can be formed.

[0341] The electrode 451 and the electrode 452 are formed of a conductive material that transmits visible light. For example, examples of the conductive material having a light-transmitting property include indium tin oxide containing silicon oxide, indium oxide, Examples include indium tin, zinc oxide, indium zinc oxide, and zinc oxide doped with gallium.

[0342] The conductive film 451a is connected to an electrode 471. The electrode 471 is a terminal for connecting to an FPC. Electrode 452 is also connected to another electrode 471, just like electrode 451. 71 can be formed from, for example, a tungsten film.

[0343] An insulating film 482 is formed to cover the electrodes 451, 452, and 471. In order to electrically connect to the FPC, the insulating film 481 and the insulating film 482 on the electrode 471 are An opening is formed on the insulating film 482. A substrate 492 is attached to the insulating film 482 with an adhesive or an adhesive film. The substrate 491 side is attached to the liquid crystal display device 5 by an adhesive or an adhesive film. 00 substrate 541 to form a touch panel.

[0344] <Configuration of an external touch panel application example> Next, a display module in which the display device of one embodiment of the present invention can be used is shown in FIG. 6 will be used for explanation.

[0345] The display module 8000 shown in FIG. 46 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and A display panel cell 8006, a backlight unit 8007, a frame 8009, a printer It has a base board 8010 and a battery 8011.

[0346] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed appropriately to match the size of the cell 8006.

[0347] The touch panel 8004 is a resistive or capacitive touch panel. It can be used by overlapping with the cell 8006. It is also possible to provide the sealing substrate with a touch panel function. It is also possible to provide an optical sensor in each pixel of the panel cell 8006 to create an optical touch panel. It is Noh.

[0348] The backlight unit 8007 includes a light source 8008. The light source 8008 is It may be provided at the end of the light unit 8007 and configured to use a light diffusion plate.

[0349] The frame 8009 has a function of protecting the display panel cell 8006 and also a function of supporting the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the device. The frame 8009 may also function as a heat sink.

[0350] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0351] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0352] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0353] (Embodiment 6) In this embodiment, the semiconductor device can be used in the pixel circuit 108 of the display device shown in FIG. The display device of the present invention has a pixel circuit 108. By changing the display element that the display device has, it can be applied to various display devices.

[0354] In this specification, a display element, a display device which is a device having a display element, a light-emitting element, and A light-emitting device, which is a device having a light-emitting element, can be formed in various forms or can have various elements. An example of a display element, a display device, a light-emitting element, or a light-emitting device is an EL ( Electroluminescence) elements (EL elements including organic and inorganic materials, organic EL elements, EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), Transistors (transistors that emit light according to current), electron-emitting devices, liquid crystal devices, electronic ink , electrophoretic element, grating light valve (GLV), plasma display panel (PDP), Digital Micromirror Device (DMD), Piezoelectric Ceramic Display , carbon nanotubes, etc., due to electromagnetic effects, contrast, brightness, reflectivity, Some display devices have a display medium that changes transmittance, etc. Examples of display devices using EL elements are Examples of display devices using electron-emitting devices include EL displays. Field Emission Display (FED) or SED type flat panel display (S ED:Surface-conduction Electron-emitter D An example of a display device using a liquid crystal element is a liquid crystal display. (Transmissive LCD, Semi-transmissive LCD, Reflective LCD, Direct LCDs (e.g., LCDs with a projection function, LCDs with a projection function, etc.) An example of a display device using the element is electronic paper.

[0355] An example of an EL element is a device that includes an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. An example of an EL layer is a device that uses light emission (fluorescence) from singlet excitons. those that utilize emission from triplet excitons (phosphorescence), and those that utilize emission from singlet excitons ( those that utilize fluorescence and those that utilize light emission from triplet excitons (phosphorescence), Those formed by organic matter, those formed by inorganic matter, those formed by organic matter Those containing polymeric materials and those formed by inorganic materials, those containing low molecular weight materials, Some contain polymeric materials, while others contain polymeric and low molecular weight materials. However, the present invention is not limited to this, and various EL elements can be used.

[0356] An example of a liquid crystal element is a device that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The element can be constructed by a pair of electrodes and a liquid crystal layer. The optical modulation effect of the liquid crystal is achieved by applying an electric field (horizontal electric field, vertical electric field or oblique electric field) to the liquid crystal. Specifically, an example of a liquid crystal element is a matic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, discotic liquid crystal, thermo Lyotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PD LC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main chain liquid crystal, side chain polymer liquid crystal, banana-shaped liquid crystal, etc. As a method for driving the liquid crystal, TN (Twisted Nema) tic) mode, STN (Super Twisted Nematic) mode, IP S (In-Plane-Switching) mode, FFS (Fringe Field d Switching) mode, MVA (Multi-domain Vertica) l Alignment) mode, PVA(Patterned Vertical A) lignment mode, ASV (Advanced Super View) mode , ASM(Axially Symmetric aligned Micro-cel l) mode, OCB (Optically Compensated Birefringence ECB (Electrically Controlled Bi refringence mode, FLC (Ferroelectric Liquid Crystal Crystal) mode, AFLC (AntiFerroelectric Liquor) mode, id Crystal) mode, PDLC (Polymer Dispersed Liquid Crystal) mode quid Crystal) mode, PNLC (Polymer Network Li Quid Crystal mode, guest host mode, Blue Phase However, there are other liquid crystal elements and their driving methods, including A variety of materials can be used.

[0357] One example of the display method for electronic paper is a molecular display (optical anisotropy, dye molecular orientation, etc.), particle-based display (electrophoresis, particle migration, particle rotation, phase change, etc.) (e.g., those that are displayed by moving one edge of the film, those that are displayed by coloring / phase change of molecules) These are indicated by the light absorption of molecules, or by spontaneous electron-hole combinations. It is possible to use a display method using light, such as electronic paper. Examples of methods include microcapsule electrophoresis, horizontal migration electrophoresis, and vertical migration electrophoresis. Electrophoresis, spherical twist ball, magnetic twist ball, cylindrical twist ball method, charged toner , electronic powder, magnetic migration type, magnetic heat sensitive type, electrowetting, light scattering (transparent / white Cloudiness change), cholesteric liquid crystal / photoconductive layer, cholesteric liquid crystal, bistable nematic liquid Crystal, ferroelectric liquid crystal, dichroic dye / liquid crystal dispersion type, movable film, color development and decolorization by leuco dye, Photochromic, electrochromic, electrodeposition, flexible organic However, there are various electronic paper and its display methods, and they are not limited to these. Here, by using microcapsule electrophoresis, This can solve the aggregation and precipitation of electrophoretic particles. It has advantages such as high efficiency, wide viewing angle, low power consumption, and memory properties.

[0358] In the display device shown in FIG. 1(A), the pixel circuit 108 has a structure as shown in FIG. It can be concluded that

[0359] The pixel circuit 108 shown in FIG. 45A includes a liquid crystal element 130, a transistor 131_1, and , and a capacitor 133_1.

[0360] The pixel circuit 108 shown in FIG. 45B includes a transistor 131_2 and a capacitor 1 33_2, a transistor 134, and a light-emitting element 135.

[0361] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0362] (Embodiment 7) In this embodiment, an example of an electronic device will be described.

[0363] 47(A) to 47(H) and 48(A) to 48(D) are diagrams showing electronic devices. These electronic devices are composed of a housing 5000, a display unit 5001, a speaker 5003, an LE D lamp 5004, operation key 5005 (including power switch or operation switch), connection Terminal 5006, sensor 5007 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance , light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation (including functions to measure flow rate, humidity, gradient, vibration, odor or infrared rays), It can have a 5008, etc.

[0364] FIG. 47(A) shows a mobile computer, which includes, in addition to the above, a switch 5009 , an infrared port 5010, etc. FIG. 47(B) shows a portable terminal equipped with a recording medium. A portable image reproducing device (for example, a DVD reproducing device) is also included. It can have a display unit 5002, a recording medium reading unit 5011, etc. It is a group-type display, and in addition to the above, it has a second display unit 5002, a support unit 5012 , earphones 5013, etc. FIG. 47(D) shows a portable gaming machine. In addition to the above, it may have a recording medium reading unit 5011, etc. It is a digital camera with a TV receiving function, and in addition to the above, it also has an antenna 5014, The mobile phone may have a shutter button 5015, an image receiving unit 5016, etc. It is a belt-type gaming machine, and in addition to the above, it has a second display unit 5002, a recording medium reading unit 5011, , etc. FIG. 47(G) shows a television receiver, which, in addition to the above, has It can have a tuner, an image processor, etc. FIG. 47(H) shows a portable television receiver. In addition to the above, it has a charger 5017 capable of transmitting and receiving signals, etc. FIG. 48(A) shows a display, which includes, in addition to the above, a support base 5018, FIG. 48(B) shows a camera, which has external connections in addition to the above. It may have a port 5019, a shutter button 5015, an image receiving unit 5016, etc. FIG. 48(C) shows a computer, which, in addition to the above, has a pointing device 5 020, an external connection port 5019, a reader / writer 5021, etc. Figure 48(D) shows a mobile phone, which in addition to the above-mentioned components includes a transmitting unit, a receiving unit, a mobile phone / transmitter It may have a tuner for one segment partial reception services for mobile terminals, etc.

[0365] The electronic devices shown in FIGS. 47(A) to 47(H) and 48(A) to 48(D) are For example, various information (still images, videos, text images, etc.) can be stored. ) on the display, touch panel function, calendar, date or time display, etc. Functions for controlling processing using various software (programs), wireless communication functions , the ability to connect to various computer networks using wireless communication functions, wireless communication functions A function to send or receive various data using the program recorded on the recording medium. Or, it can have a function of reading out data and displaying it on a display unit. In electronic devices having such a display unit, one display unit is used to mainly display image information, and another display unit is used to A function that mainly displays text information on one display unit, or a function that takes parallax into account on multiple displays By displaying the image, it is possible to have a function of displaying a three-dimensional image. In electronic devices having an image receiving unit, there are functions for taking still images, taking moving images, and Function to automatically or manually correct captured images, and to save captured images to a recording medium (external or camera) It can have functions such as saving the captured image to a camera (built-in), displaying the captured image on the display, etc. In addition, the electronic devices shown in Figures 47(A) to 47(H) and Figures 48(A) to 48(D) The functions that the container can have are not limited to these, and the container can have a variety of functions.

[0366] The electronic device described in this embodiment has a display unit for displaying some information. It is characterized by the following.

[0367] Next, application examples of the display device will be described.

[0368] FIG. 48(E) shows an example in which a display device is integrated with a building. ) includes a housing 5022, a display unit 5023, a remote control device 5024 as an operation unit, and a speaker 5025. 025, etc. The display device is a wall-mounted type that is integrated with the building, and the space to install it is It can be installed without requiring a large space.

[0369] FIG. 48(F) shows another example in which a display device is provided inside a building as an integral part of the building. The display module 5026 is attached to the unit bath 5027. The bather can then view the display module 5026.

[0370] In this embodiment, a wall and a unit bath are used as examples of buildings. The form is not limited to this, and the display device can be installed in various buildings.

[0371] Next, an example in which the display device is provided integrally with a moving object will be described.

[0372] FIG. 48(G) is a diagram showing an example in which the display device is installed in an automobile. The control unit 5028 is attached to the body 5029 of the automobile and controls the operation of the body or the inside and outside of the automobile. It is possible to display information entered from the navigation function on demand. may have

[0373] FIG. 48(H) is a diagram showing an example in which a display device is integrated into a passenger airplane. FIG. 48(H) shows a display module 503 mounted on a ceiling 5030 above the seats of a passenger airplane. 1 is provided. The display module 5031 is a diagram showing the shape of the display module when in use. The ceiling 5030 is attached to the ceiling 5030 via a hinge portion 5032. The expansion and contraction of the display module 503 allows passengers to view the display module 5031. 1 has the function of displaying information when operated by passengers.

[0374] In this embodiment, an automobile body and an airplane body are exemplified as moving bodies. However, this is not limited to motorcycles, four-wheeled vehicles (including cars, buses, etc.), trains (mono It can be installed on a variety of things, including rails, railways, ships, etc.

[0375] (Embodiment 8) The conductive films and semiconductor films disclosed in the above embodiments can be formed by sputtering or plasma CVD. However, other methods, such as thermal CVD (Chemical Vapor Deposition), can also be used. The MOC method is an example of a thermal CVD method. VD(Metal Organic Chemical Vapor Depositi) The on-coat method or ALD (Atomic Layer Deposition) method may also be used. stomach.

[0376] The thermal CVD method is a film formation method that does not use plasma, so defects are generated by plasma damage. This has the advantage that it will not be

[0377] In the thermal CVD method, the source gas and oxidant are simultaneously fed into the chamber, and the pressure inside the chamber is increased to atmospheric pressure. The film is formed by reacting the material near or on the substrate under reduced pressure and depositing it on the substrate. It is also possible.

[0378] In the ALD method, the chamber is kept at atmospheric pressure or reduced pressure, and the source gases for the reaction are sequentially introduced. Next, the gas is introduced into the chamber, and the film may be formed by repeating this gas introduction sequence. For example, by switching between two or more types of switching valves (also called high-speed valves), The source gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. Inert gas (argon, nitrogen, etc.) is introduced simultaneously with or after the fuel gas. In case of simultaneously introducing an inert gas, the inert gas is The second source gas may be introduced as a carrier gas, and an inert gas may be introduced at the same time as the second source gas is introduced. Also, instead of introducing an inert gas, the first raw material gas is discharged by vacuum evacuation. The first source gas may be adsorbed on the surface of the substrate to form a first layer. The second layer is deposited on the first layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction order until a desired thickness is achieved. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the order of gas introduction. The thickness can be precisely adjusted by changing the number of times the process is repeated. This is suitable for producing thin FETs.

[0379] The thermal CVD method such as the MOCVD method or the ALD method can be used in the above-described embodiments. Conductive films and semiconductor films can be formed. For example, when forming an In-Ga-Zn-O film, In this case, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula for trimethylindium is In(CH3)3. The chemical formula of zinc is Ga(CH3)3, and the chemical formula of dimethylzinc is Zn(CH3 ) 2. The combination is not limited to these, and trimethylgallium may be replaced with trimethylgallium. Ethylgallium (chemical formula Ga(C2H5)3) can also be used, replacing dimethylzinc. Diethylzinc (chemical formula Zn(C2H5)2) can also be used.

[0380] For example, when forming a tungsten film using a film forming device that uses ALD, WF6 gas is used. The initial tungsten film is formed by repeatedly introducing WF6 and B2H6 gases. The tungsten film is formed by simultaneously introducing B2H6 gas and H2 gas. Alternatively, SiH4 gas may be used.

[0381] For example, an oxide semiconductor film, such as In-Ga-Zn-O, can be formed using a film formation device that uses ALD. When forming a film, In(CH3)3 gas and O3 gas are introduced in sequence and repeatedly to form an In- Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gases are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, In-Ga-O Alternatively, a mixed compound layer such as an In-Zn-O layer or a Ga-Zn-O layer may be formed. Instead of O3 gas, H2O gas obtained by bubbling with an inert gas such as Ar may be used. However, it is preferable to use O3 gas, which does not contain H. Also, instead of In(CH3)3 gas, In addition, instead of Ga(CH3)3 gas, In(C2H5)3 gas may be used. In(C2H5)3 gas may be used instead of In(CH3)3 gas. 2H5)3 gas may be used, or Zn(CH3)2 gas may be used.

[0382] In this specification, etc., in a drawing or text described in a certain embodiment, Therefore, it is possible to extract a part of it and use it to constitute an aspect of the invention. If a drawing or text describing a certain part is included, the drawing or text of that part may be omitted. The extracted content is also disclosed as an aspect of the invention and can constitute an aspect of the invention. Therefore, for example, in drawings or texts that describe one or more active elements (such as transistors and diodes), wirings, passive elements (such as capacitive elements and resistive elements), conductive layers, insulating layers, semiconductor layers, organic materials, inorganic materials, components, devices, operation methods, manufacturing methods, etc., it is possible to extract a part thereof to constitute an aspect of the invention. For example, from a circuit diagram composed of N (N is an integer) circuit elements (such as transistors and capacitive elements), it is possible to extract M (M is an integer and M < N) circuit elements (such as transistors and capacitive elements) to constitute an aspect of the invention. As another example, from a cross-sectional view composed of N (N is an integer) layers, it is possible to extract M (M is an integer and M < N) layers to constitute an aspect of the invention. As yet another example, from a flowchart composed of N (N is an integer) elements, it is possible to extract M (M is an integer and M < N) elements to constitute an aspect of the invention. In addition, in this specification, etc., when at least one specific example is described in a figure or text described in a certain embodiment, those skilled in the art can easily derive the upper concept of the specific example. Therefore, when at least one specific example is described in a figure or text described in a certain embodiment, the upper concept of the specific example is also disclosed as an aspect of the invention and can constitute an aspect of the invention.

[0383]

[0384] ​​​​​​​​​​​​​​​In this specification, at least the contents shown in the drawings (or even a part of the drawings) is disclosed as one aspect of the invention and can constitute one aspect of the invention. Therefore, if a certain content is shown in a diagram, it can be explained in writing. Even if there is no such content, the content is disclosed as one aspect of the invention, and one aspect of the invention Similarly, even if a part of the drawings is taken out, it is possible to construct the invention. and can constitute one embodiment of the invention. [Explanation of symbols]

[0385] GL scanline DL data line LC liquid crystal element CAP Capacitive element DL_Y Data line DL_n Data line DL_1 Data line GL_X scanlines GL_m scanlines GL_1 scanline 102 Pixel section 104 Drive circuit section 104a Gate Driver 104b Source Driver 106 Protection circuit 106_1 Protection circuit 106_2 Protection circuit 106_3 Protection circuit 106_4 Protection circuit 107 Terminal section 108 pixel circuit 110 Wiring 112 Wiring 114 Resistor element 130 Liquid crystal element 131_1 Transistor 131_2 Transistor 133_1 Capacitor element 133_2 Capacitor element 134 transistors 135 Light-emitting element 140 boards 142 Conductive layer 144 Insulating Layer 146 Insulating Layer 148 Conductive Layer 151 transistors 152 transistors 153 Transistor 154 transistors 155 transistors 156 transistors 157 transistors 158 transistors 159 Transistors 160 transistors 161 transistors 162 transistors 163 transistors 164 transistors 165 transistors 166 transistors 171 Resistor element 172 Resistor element 173 Resistor element 174 Resistor element 175 Resistor element 176 Resistor element 177 Resistor element 178 Resistor element 179 Resistive element 180 Resistor element 181 Wiring 182 Wiring 183 Wiring 184 Wiring 185 Wiring 186 Wiring 187 Wiring 188 Wiring 189 Wiring 190 Wiring 191 Wiring 199 Resistor element 301 Conductive film 302 Transistor 304 Transistor 306 Transistor 308 Transistor 310 Transistor 312 Transistor 314 Transistor 316 Transistor 351 Wiring 352 Wiring 353 Wiring 354 Wiring 355 Wiring 356 Wiring 381 Wiring 382 Wiring 383 Wiring 384 Wiring 385 Wiring 386 Wiring 400 boards 401 Conductive film 402 gate electrode 403 Insulating film 404 Second insulating layer 405 Oxide semiconductor film 406 Island-shaped oxide semiconductor layer 406s oxide stack 407 Conductive Film 408 Source Electrode 409 Drain electrode 410 Insulating layer 411 Insulating layer 412 Insulating layer 413 Oxide semiconductor layer 414 Oxide semiconductor layer 414s oxide layer 415 Oxide semiconductor layer 416 Insulating Layer 420 Touch Panel 421 Polarizing Plate 422 Polarizing Plate 423 Conductive Layer 430 areas 431 Wiring 432 Wiring 450 Touch Sensor 451 Electrode 451a Conductive film 451b Conductive film 451c Conductive film 452 Electrode 454 Capacitor 461 FPC 462 FPC 471 Electrode 481 Insulating Film 482 insulating film 486 Wiring 491 PCB 492 PCB 500 LCD display device 501 Pixel unit 502 Gate Driver 503 Gate Driver 504 Source Driver 505 Terminal section 506 FPC 511 Protection circuit 512 Sealing material 515 Spacer 518 pixels 519 Conductive Layer 520 Conductive layer 521 Circuit Board 522 transistor 523 Semiconductor layer 524 Conductive Layer 525 Conductive Layer 526 Conductive Layer 528 Opening 532 Insulating layer 533 Insulation Layer 534 Insulating Layer 535 Insulation Layer 536 Insulating Layer 537 Insulating Layer 538 Insulating Layer 539 Orientation Film 540 Liquid Crystal Layer 541 Circuit Board 542 Black Matrix 543 Color Filter 544 Overcoat 545 Orientation Film 551 Conductive layer 551L wiring 552 Conductive layer 552L wiring 553 Opening 554 Conductive layer 555 Semiconductor layer 556 Conductive layer 557 Conductive Layer 558 Conductive Layer 559 Conductive Layer 561 Conductive layer 571 Conductive Layer 572 Conductive layer 573 Conductive Layer 574 Conductive Layer 575 Conductive Layer 576 Conductive Layer 581 Pixel section 582 Protection circuit 583 Connection 584 Opening 585 Opening 586 Opening 600 Wiring 601 Wiring 602 Wiring 603 Protection circuit 604A Transistor 604B transistor 605A Transistor 605B transistor 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 5020 pointing device 5021 Reader / Writer 5022 Housing 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Module 5027 Unit bath 5028 Display Module 5029 Car Body 5030 Ceiling 5031 Display Module 5032 Hinge part 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display panel cell 8007 Backlight Unit 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

[Claim 1] an insulating layer provided between the first wiring and the second wiring; the insulating layer includes a first insulating layer and a second insulating layer provided so as to overlap the first insulating layer; the insulating layer has a region where a portion of the second insulating layer is removed, The display device is characterized in that the region functions as a protection circuit.

Images