Reversible coding of video data

Abstract

To provide systems and methods for performing residual coding of video data.SOLUTION: The methods include: receiving control information for coding a video sequence; and determining, based on the control information, a coding method for coding a prediction residual signal of a coding block in the video sequence. The coding method is one of transform residual coding and transform-skip residual coding.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This disclosure claims the benefit of priority to U.S. Provisional Patent Application No. 62 / 904,574, filed September 23, 2019, which is incorporated herein by reference in its entirety.

[0002] Technical Field FIELD OF THE DISCLOSURE

[0002] The present disclosure relates generally to video processing, and more particularly to methods and apparatus for lossless encoding of video data and selecting residual encoding techniques for lossless encoding. [Background technology]

[0003] background

[0003] A video is a series of still pictures (or "frames") that capture visual information. To reduce storage memory and transmission bandwidth, a video may be compressed before storage or transmission and decompressed before display. The compression process is usually called encoding, and the decompression process is usually called decoding. There are various video coding formats that use standardized video coding techniques, most commonly based on prediction, transform, quantization, entropy coding, and in-loop filtering. Video coding standards, such as the High Efficiency Video Coding (HEVC) / H.265 standard, the Versatile Video Coding (VVC) / H.266 standard, and the AVS standard, that specify specific video coding formats are developed by standardization organizations. As more advanced video coding techniques are adopted into video standards, the coding efficiency of new video coding standards becomes higher. Summary of the Invention [Means for solving the problem]

[0004] Disclosure Overview

[0004] An embodiment of the present disclosure provides a residual coding method that includes receiving control information for coding a video sequence and determining, based on the control information, an encoding method for coding a predicted residual signal of a coding block of the video sequence, wherein the encoding method is one of transform residual coding and transform skip residual coding.

[0005]

[0005] Embodiments of the present disclosure also provide a system for processing a video signal with residual coding, the system including: a memory for storing a set of instructions; and at least one processor, the at least one processor configured to execute the set of instructions to cause the system to receive control information for encoding a video sequence; and determine, based on the control information, an encoding method for encoding a prediction residual signal of a coding block of the video sequence, where the encoding method is one of transform residual coding and transform skip residual coding.

[0006]

[0006] An embodiment of the present disclosure also provides a non-transitory computer-readable medium storing instructions executable by at least one processor of a computer system, wherein execution of the instructions causes the computer system to perform a method including receiving control information for encoding a video sequence and determining, based on the control information, an encoding method for encoding a predicted residual signal of a coding block of the video sequence, wherein the encoding method is one of transform residual encoding and transform skip residual encoding.

[0007] BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Embodiments and various aspects of the present disclosure are set forth in the following detailed description and accompanying drawings, in which various features are not drawn to scale. [Brief explanation of the drawings]

[0008] [Figure 1]8 illustrates the structure of an exemplary video sequence consistent with embodiments of the present disclosure. [Figure 2A]

[0009] 1 shows a schematic diagram of an example encoding process of a hybrid video coding system consistent with embodiments of the present disclosure. [Figure 2B]

[0010] 1 shows a schematic diagram of another example encoding process of a hybrid video coding system, consistent with embodiments of the present disclosure. [Figure 3A]

[0011] 1 shows a schematic diagram of an exemplary decoding process of a hybrid video coding system, consistent with embodiments of the present disclosure. [Figure 3B]

[0012] 1 shows a schematic diagram of another example decoding process of a hybrid video coding system, consistent with embodiments of the present disclosure. [Figure 4]

[0013] 1 is a block diagram of an exemplary apparatus for encoding or decoding video consistent with embodiments of the present disclosure. [Figure 5]

[0014] 1 illustrates an example transform unit syntax consistent with embodiments of the present disclosure. [Figure 6]

[0015] 10 illustrates example SPS syntax for using sps_bdpcm_transform_residual_coding_flag, consistent with embodiments of the present disclosure. [Figure 7]

[0016] 1 illustrates an example slice header syntax consistent with embodiments of the present disclosure. [Figure 8]

[0017] 1 illustrates an example transform block syntax consistent with embodiments of the present disclosure. [Figure 9A]

[0018] 1 illustrates an example transform residual coding syntax consistent with embodiments of this disclosure. [Figure 9B] 1 illustrates an example transform residual coding syntax consistent with embodiments of this disclosure. [Figure 9C]1 illustrates an example transform residual coding syntax consistent with embodiments of this disclosure. [Figure 9D] 1 illustrates an example transform residual coding syntax consistent with embodiments of this disclosure. [Figure 9E] 1 illustrates an example transform residual coding syntax consistent with embodiments of this disclosure. [Figure 10]

[0019] 1 is a flowchart of an exemplary computer-implemented method for processing a video signal with residual coding, consistent with embodiments of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Detailed Description

[0020] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which like numbers in different drawings represent the same or similar elements unless otherwise specified. The implementations described in the following description of exemplary embodiments do not represent all implementations consistent with the present invention. Instead, they are merely examples of apparatus and methods consistent with aspects related to the present invention as set forth in the appended claims. Unless specifically stated otherwise, the term "or" encompasses all possible combinations unless infeasible. For example, if a component is described as including A or B, the component may include A, or B, or A and B, unless specifically stated otherwise or infeasible. As a second example, if a component is described as including A, B, or C, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C, unless specifically stated otherwise or infeasible.

[0010]

[0021] Video coding systems are often used to compress digital video signals, for example, to reduce the storage space consumed or to reduce the transmission bandwidth consumption associated with the digital video signals. With high-definition (HD) video (e.g., having a resolution of 1920x1080 pixels) gaining popularity in various applications of video compression, such as online video streaming, video conferencing, or video monitoring, there is a continuing need to develop video coding tools that can improve the efficiency of compressing video data.

[0011]

[0022] For example, video monitoring applications are becoming more and more widespread in many applications (e.g., security, traffic, or environmental monitoring), and the number and resolution of monitoring devices are continuing to rapidly increase. Many video monitoring applications prefer to provide users with HD video to capture more information, and HD video has more pixels per frame to capture more information. However, HD video bitstreams can have high bitrates that require high bandwidth for transmission and large storage space. For example, a monitoring video stream with an average resolution of 1920 x 1080 may require as much as 4 Mbps of bandwidth for real-time transmission. In addition, video monitoring typically involves continuous 7x24 monitoring, which can pose a significant challenge to storage systems when video data is saved. Therefore, the high bandwidth and large-capacity storage requirements of HD video are becoming major limitations to large-scale deployment of video monitoring.

[0012]

[0023] Video is a series of still pictures (or "frames") arranged in time sequence to preserve visual information. A video capture device (e.g., a camera) can be used to capture and store these pictures in time sequence, and a video playback device (e.g., a television, a computer, a smartphone, a tablet computer, a video player, or any end-user terminal with display capabilities) can be used to display such pictures in time sequence. In some applications, the video capture device can also transmit the captured video in real time to a video playback device (e.g., a computer with a monitor) for purposes such as surveillance, conference hosting, or live broadcasting.

[0013]

[0024] To reduce the storage space and transmission bandwidth required for such applications, video may be compressed before storage and transmission and decompressed before display. Compression and decompression may be performed by software executed by a processor (e.g., a general-purpose computer processor) or dedicated hardware. A module for compression is commonly referred to as an "encoder," and a module for decompression is commonly referred to as a "decoder." Encoders and decoders may be collectively referred to as a "codec." Encoders and decoders may be implemented as any of a variety of suitable hardware, software, or combinations thereof. For example, hardware implementations of encoders and decoders may include circuitry such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, or any combination thereof. Software implementations of encoders and decoders may include program code, computer-executable instructions, firmware, or any suitable computer-implemented algorithm or process fixed on a computer-readable medium. Video compression and decompression may be performed by various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, and the H.26x family. In some applications, a codec can reconstruct video from a first encoding standard and recompress the reconstructed video using a second encoding standard, in which case the codec is sometimes called a "transcoder."

[0014]

[0025] A video encoding process can identify and retain useful information that can be used for picture reconstruction and ignore information that is not important for reconstruction. If the ignored, unimportant information cannot be perfectly reconstructed, such an encoding process may be called "lossy." Otherwise, it may be called "lossless." Most encoding processes are lossy; this is a tradeoff to reduce the required storage space and transmission bandwidth.

[0015]

[0026] Useful information about the picture being encoded (called the "current picture") includes changes relative to a reference picture (e.g., a previously encoded and reconstructed picture). Such changes may include pixel position changes, luminance changes, or color changes, of which position changes are the most important. Position changes of pixels representing an object may reflect the object's motion between the reference picture and the current picture.

[0016]

[0027] A picture that is coded without referencing another picture (i.e., it is its own reference picture) is called an "I-picture." A picture that is coded using a previous picture as a reference picture is called a "P-picture." A picture that is coded using both a previous picture and a future picture as reference pictures (i.e., the referencing is "bidirectional") is called a "B-picture."

[0017]

[0028] As mentioned above, video monitoring using HD video faces the challenges of high bandwidth and large-capacity storage requirements. To address these challenges, the bit rate of the encoded video can be reduced. Among I-pictures, P-pictures, and B-pictures, I-pictures have the highest bit rate. Because the background of most monitoring videos is nearly static, one way to reduce the total bit rate of the encoded video can be to use fewer I-pictures for video encoding.

[0018]

[0029] However, the improvement of using fewer I-pictures may be insignificant because the proportion of I-pictures in encoded video is typically small. For example, in a typical video bitstream, the ratio of I-pictures to B-pictures and P-pictures may be 1:20:9, in which case I-pictures may account for less than 10% of the total bitrate. That is, in such an example, even if all I-pictures were removed, the bitrate reduction may be less than 10%.

[0019]

[0030] 1 illustrates the structure of an example video sequence 100 consistent with embodiments of the present disclosure. Video sequence 100 may be live video or captured and archived video. Video 100 may be actual video, computer-generated video (e.g., computer game video), or a combination thereof (e.g., actual video with augmented reality effects). Video sequence 100 may be input from a video capture device (e.g., a camera), a video archive containing previously captured video (e.g., video files saved on a storage device), or a video feed interface (e.g., a video broadcast transceiver) for receiving video from a video content provider.

[0020]

[0031] As shown in FIG. 1, video sequence 100 may include a series of pictures arranged temporally along a timeline, including pictures 102, 104, 106, and 108. Pictures 102-106 are consecutive, with more pictures between pictures 106 and 108. In FIG. 1, picture 102 is an I-picture, and its reference picture is picture 102 itself. Picture 104 is a P-picture, and its reference picture is picture 102, as indicated by the arrow. Picture 106 is a B-picture, and its reference pictures are pictures 104 and 108, as indicated by the arrows. In some embodiments, the reference picture for a picture (e.g., picture 104) may not be immediately preceding or following that picture. For example, the reference picture for picture 104 may be a picture preceding picture 102. It should be noted that the reference pictures of pictures 102-106 are merely examples, and this disclosure does not limit the reference picture embodiment to the example shown in FIG.

[0021]

[0032] Typically, video codecs do not encode or decode an entire picture at once due to the computational complexity of such a task. Rather, they may divide a picture into elementary segments and encode or decode the picture segment by segment. Such elementary segments are referred to as basic processing units ("BPUs") in this disclosure. For example, structure 110 in FIG. 1 illustrates an example structure for a picture (e.g., any of pictures 102-108) in video sequence 100. In structure 110, the picture is divided into 4x4 basic processing units, the boundaries of which are indicated by dashed lines. In some embodiments, basic processing units may be referred to as "macroblocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC) or as "coding tree units" ("CTUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing units may have variable sizes, such as 128x128, 64x64, 32x32, 16x16, 4x8, 16x32, or any shape and size of pixels in a picture. The size and shape of the basic processing unit can be selected for each picture based on a balance between coding efficiency and the level of detail to be maintained in the basic processing unit.

[0022]

[0033] A basic processing unit may be a logical unit that may include groups of different types of video data stored in computer memory (e.g., in a video frame buffer). For example, a basic processing unit for a color picture may include a luma component (Y) representing achromatic lightness information, one or more chroma components (e.g., Cb and Cr) representing color information, and related syntax elements (where the luma and chroma components may have the same size basic processing unit). The luma and chroma components are sometimes referred to as "coding tree blocks" ("CTBs") in some video coding standards (e.g., H.265 / HEVC or H.266 / VVC). Any operation performed on a basic processing unit can be repeated for each of its luma and chroma components.

[0023]

[0034] Video coding has multiple computation stages, examples of which are shown in detail in Figures 2A-2B and 3A-3B. At each stage, the size of the basic processing unit may still be too large to process and therefore may be further divided into segments referred to as "basic processing subunits" in this disclosure. In some embodiments, the basic processing subunits may be referred to as "blocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC) or "coding units" ("CUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing subunits may have the same or smaller size as the basic processing units. Similar to basic processing units, basic processing subunits are also logical units that may contain groups of different types of video data (e.g., Y, Cb, Cr, and related syntax elements) stored in computer memory (e.g., in a video frame buffer). Any operation performed on a basic processing sub-unit can be repeated for each of its luma and chroma components. Note that such division can be performed to further levels depending on the processing needs. Note also that different stages can use different schemes to divide the basic processing units.

[0024]

[0035] For example, in a mode decision stage (an example of which is shown in detail in FIG. 2B ), the encoder may decide which prediction mode (e.g., intra-picture prediction or inter-picture prediction) to use for a basic processing unit, which may be too large to make such a decision. The encoder may divide the basic processing unit into multiple basic processing sub-units (e.g., CUs in the case of H.265 / HEVC or H.266 / VVC) and determine the prediction type for each individual basic processing sub-unit.

[0025]

[0036] As another example, in the prediction stage (an example of which is shown in detail in FIG. 2A), the encoder can perform prediction operations at the level of basic processing sub-units (e.g., CUs). However, in some cases, the basic processing sub-units may still be too large to process. The encoder can further divide the basic processing sub-units into smaller segments (e.g., called "prediction blocks" or "PBs" in H.265 / HEVC or H.266 / VVC) and perform prediction operations at the level of the segments.

[0026]

[0037] As another example, in the transform stage (one example of which is shown in detail in FIG. 2A ), the encoder can perform transform operations on residual basic processing sub-units (e.g., CUs). However, in some cases, the basic processing sub-units may still be too large to process. The encoder can further divide the basic processing sub-units into smaller segments (e.g., called "transform blocks" or "TBs" in H.265 / HEVC or H.266 / VVC) and perform transform operations at the segment level. Note that the division scheme of the same basic processing sub-unit may be different in the prediction stage and the transform stage. For example, in H.265 / HEVC or H.266 / VVC, the prediction blocks and transform blocks of the same CU may have different sizes and numbers.

[0027]

[0038] 1, the basic processing unit 112 is further divided into 3x3 basic processing sub-units, the boundaries of which are indicated by dotted lines. Different basic processing units of the same picture may be divided into basic processing sub-units in different schemes.

[0028]

[0039] In some implementations, to provide parallel processing capabilities and error resilience for video encoding and decoding, a picture may be divided into multiple regions for processing, such that for each region of a picture, the encoding or decoding process can be independent of information from any other region of the picture. That is, each region of a picture can be processed independently. In this way, a codec can process different regions of a picture in parallel, thus improving coding efficiency. Also, if data for one region is corrupted during processing or lost during network transmission, the codec can accurately encode or decode other regions of the same picture without relying on the corrupted or lost data, thus providing error resilience. In some video coding standards, a picture can be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC provide two region types: "slice" and "tile." It should also be noted that different pictures in video sequence 100 may have different partition schemes for dividing the picture into regions.

[0029]

[0040] For example, in Figure 1, structure 110 is divided into three regions 114, 116, and 118, the boundaries of which are shown as solid lines within structure 110. Region 114 includes four basic processing units. Regions 116 and 118 each include six basic processing units. It should be noted that the basic processing units, basic processing subunits, and regions of structure 110 in Figure 1 are merely examples, and the present disclosure is not limited to these embodiments.

[0030]

[0041] FIG. 2A illustrates a schematic diagram of an example encoding process 200A consistent with embodiments of the present disclosure. For example, encoding process 200A can be performed by an encoder. As shown in FIG. 2A, the encoder can encode video sequence 202 into video bitstream 228 according to process 200A. Similar to video sequence 100 of FIG. 1, video sequence 202 can include a set of pictures (referred to as "original pictures") arranged in a temporal order. Similar to structure 110 of FIG. 1, each original picture in video sequence 202 can be divided by the encoder into basic processing units, basic processing sub-units, or regions for processing. In some embodiments, the encoder can perform process 200A at the level of basic processing units for each original picture in video sequence 202. For example, the encoder can perform process 200A in an iterative manner, encoding one basic processing unit in one iteration of process 200A. In some embodiments, the encoder may perform process 200A in parallel for a region of each original picture in video sequence 202 (eg, regions 114-118).

[0031]

[0042] In Figure 2A, an encoder may send a fundamental processing unit (referred to as an "original BPU") of an original picture of a video sequence 202 to a prediction stage 204 to generate prediction data 206 and a prediction BPU 208. The encoder may generate a residual BPU 210 by subtracting the prediction BPU 208 from the original BPU. The encoder may send the residual BPU 210 to a transform stage 212 and a quantization stage 214 to generate quantized transform coefficients 216. The encoder may send the prediction data 206 and the quantized transform coefficients 216 to a binary encoding stage 226 to generate a video bitstream 228. Components 202, 204, 206, 208, 210, 212, 214, 216, 226, and 228 may be referred to as the "forward path." During process 200A, the encoder may send quantized transform coefficients 216, after quantization stage 214, to inverse quantization stage 218 and inverse transform stage 220 to generate reconstructed residual BPU 222. The encoder may add reconstructed residual BPU 222 to prediction BPU 208 to generate prediction reference 224, which is used in prediction stage 204 for the next iteration of process 200A. Components 218, 220, 222, and 224 of process 200A may be referred to as the "reconstruction path." The reconstruction path may be used to ensure that both the encoder and decoder use the same reference data for prediction.

[0032]

[0043] The encoder may perform process 200A iteratively to encode each original BPU of the original picture (in the forward path) and to generate a prediction reference 224 for encoding the next original BPU of the original picture (in the reconstruction path). After encoding all original BPUs of the original picture, the encoder may proceed to encode the next picture in the video sequence 202.

[0033]

[0044] Referring to process 200A, an encoder may receive a video sequence 202 generated by a video capture device (e.g., a camera). As used herein, the term "receive" may refer to any action of receiving, inputting, acquiring, retrieving, obtaining, reading, accessing, or any manner of inputting data.

[0034]

[0045] In the prediction stage 204, in the current iteration, the encoder may receive the original BPU and a predicted reference 224 and perform a prediction operation to generate predicted data 206 and a predicted BPU 208. The predicted reference 224 may be generated from the reconstruction path of a previous iteration of the process 200A. The purpose of the prediction stage 204 is to reduce information redundancy by extracting predicted data 206, which can be used to reconstruct the original BPU from the predicted data 206 and the predicted reference 224 as the predicted BPU 208.

[0035]

[0046] Ideally, predicted BPU 208 would be identical to the original BPU. However, due to non-ideal prediction and reconstruction operations, predicted BPU 208 typically differs slightly from the original BPU. To record such differences, after generating predicted BPU 208, the encoder can subtract it from the original BPU to generate residual BPU 210. For example, the encoder can subtract pixel values ​​(e.g., grayscale or RGB values) of predicted BPU 208 from corresponding pixel values ​​of the original BPU. Each pixel of residual BPU 210 may have a residual value as a result of such subtraction between corresponding pixels of the original BPU and predicted BPU 208. Compared to the original BPU, predicted data 206 and residual BPU 210 may have fewer bits, yet can be used to reconstruct the original BPU without significant quality degradation. Thus, the original BPU is compressed.

[0036]

[0047] To further compress the residual BPU 210, in the transform stage 212, the encoder can reduce spatial redundancy in the residual BPU 210 by decomposing it into a set of two-dimensional "basis patterns," each associated with a "transform coefficient." The basis patterns may have the same size (e.g., the size of the residual BPU 210). Each basis pattern may represent a variation frequency (e.g., frequency of brightness variation) component of the residual BPU 210. No basis pattern can be reproduced from any combination (e.g., linear combination) of the other basis patterns. That is, this decomposition can decompose the variation of the residual BPU 210 into the frequency domain. Such a decomposition is similar to the discrete Fourier transform of a function, where the basis patterns are similar to the basis functions (e.g., trigonometric functions) of the discrete Fourier transform, and the transform coefficients are similar to the coefficients associated with the basis functions.

[0037]

[0048] Different transform algorithms may use different basis patterns. For example, various transform algorithms, such as a discrete cosine transform or a discrete sine transform, may be used in transform stage 212. The transform in transform stage 212 is reversible. That is, the encoder can reconstruct residual BPU 210 by inverting the transform (called the "inverse transform"). For example, to reconstruct pixels of residual BPU 210, the inverse transform may be to generate a weighted sum by multiplying the values ​​of corresponding pixels of the basis pattern by their associated coefficients and adding these products. For video coding standards, both the encoder and decoder may use the same transform algorithm (and therefore the same basis pattern). Therefore, the encoder may record only the transform coefficients, and the decoder can reconstruct residual BPU 210 from the transform coefficients without receiving the basis pattern from the encoder. Compared to residual BPU 210, the transform coefficients may have fewer bits, but they can be used to reconstruct residual BPU 210 without significant quality degradation. Therefore, the residual BPU 210 is further compressed.

[0038]

[0049] The encoder can further compress the transform coefficients in the quantization stage 214. In the transform process, different basis patterns may represent different variation frequencies (e.g., brightness variation frequencies). Because the human eye is generally good at recognizing low-frequency variations, the encoder can ignore high-frequency variation information without causing significant quality degradation in decoding. For example, in the quantization stage 214, the encoder can generate quantized transform coefficients 216 by dividing each transform coefficient by an integer value (called a "quantization parameter") and rounding the quotient to the nearest integer. After such an operation, some transform coefficients of high-frequency basis patterns may be converted to zero, and transform coefficients of low-frequency basis patterns may be converted to smaller integers. The encoder can ignore zero-valued quantized transform coefficients 216, thereby further compressing the transform coefficients. The quantization process is also lossless, where the quantized transform coefficients 216 can be reconstructed into transform coefficients by the inverse operation of quantization (called "dequantization").

[0039]

[0050] Because the encoder ignores such division remainders in rounding operations, the quantization stage 214 may be lossy. In general, the quantization stage 214 may contribute the most information loss in the process 200A. The greater the information loss, the fewer bits the quantized transform coefficients 216 may require. To achieve different levels of information loss, the encoder may use different values ​​of the quantization parameter or other parameters of the quantization process.

[0040]

[0051] In the binary encoding stage 226, the encoder may encode the prediction data 206 and the quantized transform coefficients 216 using a binary encoding technique, such as entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or other lossless or lossy compression algorithm. In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the encoder may encode other information in the binary encoding stage 226, such as a prediction mode used in the prediction stage 204, parameters of the prediction operation, a transform type in the transform stage 212, parameters of the quantization process (e.g., quantization parameters), or encoder control parameters (e.g., bitrate control parameters). The encoder may use the output data of the binary encoding stage 226 to generate a video bitstream 228. In some embodiments, the video bitstream 228 may be further packetized for network transmission.

[0041]

[0052] Referring to the reconstruction path of process 200A, in an inverse quantization stage 218, the encoder may generate reconstructed transform coefficients by performing inverse quantization on the quantized transform coefficients 216. In an inverse transform stage 220, the encoder may generate a reconstructed residual BPU 222 based on the reconstructed transform coefficients. The encoder may add the reconstructed residual BPU 222 to a predicted BPU 208 to generate a predicted reference 224 to be used in the next iteration of process 200A.

[0042]

[0053] It should be noted that other variations of process 200A may be used to encode video sequence 202. In some embodiments, the stages of process 200A may be performed by an encoder in a different order. In some embodiments, one or more stages of process 200A may be combined into a single stage. In some embodiments, a single stage of process 200A may be split into multiple stages. For example, transform stage 212 and quantization stage 214 may be combined into a single stage. In some embodiments, process 200A may include additional stages. In some embodiments, process 200A may omit one or more stages of FIG. 2A.

[0043]

[0054] 2B shows a schematic diagram of another example encoding process 200B consistent with embodiments of the present disclosure. Process 200B may be modified from process 200A. For example, process 200B may be used by an encoder compliant with a hybrid video coding standard (e.g., the H.26x family). Compared to process 200A, the forward path of process 200B further includes a mode decision stage 230, which divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044. The reconstruction path of process 200B further includes a loop filter stage 232 and a buffer 234.

[0044]

[0055] In general, prediction techniques can be categorized into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-picture prediction or "intra-prediction") can predict a current BPU by using pixels from one or more already-encoded neighboring BPUs within the same picture. That is, the prediction reference 224 in spatial prediction may include neighboring BPUs. Spatial prediction can reduce the inherent spatial redundancy of a picture. Temporal prediction (e.g., inter-picture prediction or "inter-prediction") can predict a current BPU by using regions from one or more already-encoded pictures. That is, the prediction reference 224 in temporal prediction may include encoded pictures. Temporal prediction can reduce the inherent temporal redundancy of a picture.

[0045]

[0056] Referring to process 200B, in the forward path, the encoder performs prediction operations in a spatial prediction stage 2042 and a temporal prediction stage 2044. For example, in the spatial prediction stage 2042, the encoder may perform intra prediction. With respect to the original BPU of a picture being encoded, the prediction reference 224 may include one or more neighboring BPUs encoded (in the forward path) and reconstructed (in the reconstruction path) within the same picture. The encoder may generate the predicted BPU 208 by extrapolating the neighboring BPUs. Extrapolation techniques may include, for example, linear extrapolation or interpolation, polynomial extrapolation or interpolation, etc. In some embodiments, the encoder may perform extrapolation at the pixel level, for example, by extrapolating the value of the corresponding pixel for each pixel of the predicted BPU 208. The neighboring BPUs used for extrapolation may be located relative to the original BPU from various directions, such as vertically (e.g., above the original BPU), horizontally (e.g., to the left of the original BPU), diagonally (e.g., bottom-left, bottom-right, top-left, or top-right of the original BPU), or any direction defined in the used video coding standard. In the case of intra prediction, the prediction data 206 may include, for example, the locations (e.g., coordinates) of the used neighboring BPUs, the sizes of the used neighboring BPUs, parameters of the extrapolation, or the orientations of the used neighboring BPUs relative to the original BPU.

[0046]

[0057] As another example, in the temporal prediction stage 2044, the encoder may perform inter-prediction. With respect to the original BPU of the current picture, the prediction reference 224 may include one or more pictures (called "reference pictures") that have been encoded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference pictures may be encoded and reconstructed for each BPU. For example, the encoder may generate a reconstructed BPU by adding the reconstructed residual BPU 222 to the predicted BPU 208. Once all the reconstructed BPUs of the same picture are generated, the encoder may generate the reconstructed picture as the reference picture. The encoder may perform a "motion estimation" operation to search for a matching region within a range (called a "search window") of the reference picture. The location of the search window in the reference picture may be determined based on the location of the original BPU in the current picture. For example, the search window may be centered in the reference picture at a location having the same coordinates as the original BPU of the current picture and may extend outward by a predetermined distance. When the encoder identifies a region within the search window that is similar to the original BPU (e.g., using a pel-recursive algorithm or a block-matching algorithm), the encoder can determine such a region as a matching region. The matching region may have different dimensions (e.g., smaller, equal, larger, or a different shape) than the original BPU. Because the reference picture and the current picture are temporally separated in a timeline (e.g., as shown in FIG. 1), the matching region can be considered to "move" to the location of the original BPU over time. The encoder may record the direction and distance of such movement as a "motion vector." If multiple reference pictures are used (e.g., like picture 106 in FIG. 1), the encoder can search for a matching region and determine its associated motion vector for each reference picture. In some embodiments, the encoder can assign weights to pixel values ​​of the matching region in each matching reference picture.

[0047]

[0058] Motion estimation can be used to identify various types of motion, such as, for example, translation, rotation, or zooming. In the case of inter prediction, the prediction data 206 may include, for example, the location (e.g., coordinates) of the matching region, a motion vector associated with the matching region, the number of reference pictures, or weights associated with the reference pictures.

[0048]

[0059] To generate the predicted BPU 208, the encoder may perform a "motion compensation" operation. Motion compensation can be used to reconstruct the predicted BPU 208 based on the prediction data 206 (e.g., motion vectors) and the prediction reference 224. For example, the encoder can shift the matching region of the reference picture according to a motion vector that allows the encoder to predict the original BPU of the current picture. If multiple reference pictures are used (e.g., as in picture 106 of FIG. 1), the encoder can shift the matching region of the reference picture according to each motion vector and average the pixel values ​​of the matching region. In some embodiments, if the encoder assigns weights to the pixel values ​​of the matching region of each matching reference picture, the encoder can add a weighted sum of the pixel values ​​of the shifted matching region.

[0049]

[0060] In some embodiments, inter-prediction may be unidirectional or bidirectional. Unidirectional inter-prediction may use one or more reference pictures in the same temporal direction relative to the current picture. For example, picture 104 in FIG. 1 is a unidirectional inter-predicted picture in which a reference picture (e.g., picture 102) precedes picture 104. Bidirectional inter-prediction may use one or more reference pictures in both temporal directions relative to the current picture. For example, picture 106 in FIG. 1 is a bidirectional inter-predicted picture in which reference pictures (i.e., pictures 104 and 108) are in both temporal directions relative to picture 104.

[0050]

[0061]

[0033] Referring further to the forward path of process 200B, after spatial prediction 2042 and temporal prediction stage 2044, in mode decision stage 230, the encoder can select a prediction mode (e.g., one of intra-prediction or inter-prediction) for the current iteration of process 200B. For example, the encoder can perform a rate-distortion optimization technique, in which the encoder can select a prediction mode to minimize the value of a cost function depending on the bitrates of candidate prediction modes and the distortion of reconstructed reference pictures under the candidate prediction modes. Depending on the selected prediction mode, the encoder can generate a corresponding predicted BPU 208 and predicted data 206.

[0051]

[0062] In the reconstruction path of process 200B, if an intra-prediction mode was selected in the forward path, after generating the prediction reference 224 (e.g., the current BPU encoded and reconstructed within the current picture), the encoder can send the prediction reference 224 directly to the spatial prediction stage 2042 for later use (e.g., for extrapolating the next BPU of the current picture). If an inter-prediction mode was selected in the forward path, after generating the prediction reference 224 (e.g., the current picture with all BPUs encoded and reconstructed), the encoder can send the prediction reference 224 to the loop filter stage 232, where the encoder can apply a loop filter to the prediction reference 224 to reduce or eliminate distortions (e.g., blocking artifacts) introduced by inter-prediction. The encoder can apply various loop filter techniques in the loop filter stage 232, such as deblocking, sample adaptive offset, or adaptive loop filtering. The loop-filtered reference picture may be stored in a buffer 234 (or a "decoded picture buffer") for later use (e.g., to be used as an inter-predicted reference picture for a future picture in the video sequence 202). The encoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, the encoder may encode loop filter parameters (e.g., loop filter strength) in the binary encoding stage 226 along with the quantized transform coefficients 216, the prediction data 206, and other information.

[0052]

[0063] FIG. 3A shows a schematic diagram of an example decoding process 300A consistent with embodiments of the present disclosure. Process 300A may be a decompression process corresponding to compression process 200A of FIG. 2A. In some embodiments, process 300A may be similar to the reconstruction path of process 200A. A decoder can follow process 300A to decode video bitstream 228 into video stream 304. Video stream 304 may be very similar to video sequence 202. However, due to information loss in the compression and decompression processes (e.g., quantization stage 214 of FIGS. 2A-2B), video stream 304 is generally not identical to video sequence 202. Similar to processes 200A and 200B of FIGS. 2A-2B, a decoder can perform process 300A at the level of a basic processing unit (BPU) for each picture encoded in video bitstream 228. For example, the decoder may perform process 300A in an iterative manner, allowing the decoder to decode one fundamental processing unit in one iteration of process 300A. In some embodiments, the decoder may perform process 300A in parallel for a region (e.g., region 114-118) of each picture encoded in video bitstream 228.

[0053]

[0064] In FIG. 3A , a decoder may send a portion of a video bitstream 228 associated with an encoded picture fundamental processing unit (referred to as an “encoding BPU”) to a binary decoding stage 302. In the binary decoding stage 302, the decoder may decode the portion into prediction data 206 and quantized transform coefficients 216. The decoder may send the quantized transform coefficients 216 to an inverse quantization stage 218 and an inverse transform stage 220 to generate a reconstructed residual BPU 222. The decoder may send the prediction data 206 to a prediction stage 204 to generate a prediction BPU 208. The decoder may generate a prediction reference 224 by adding the reconstructed residual BPU 222 to the prediction BPU 208. In some embodiments, the prediction reference 224 may be stored in a buffer (e.g., a decoded picture buffer in computer memory). The decoder may send the prediction reference 224 to the prediction stage 204 for performing a prediction operation in a next iteration of the process 300A.

[0054]

[0065] The decoder may iteratively perform process 300A to decode each encoded BPU of the encoded picture and generate a prediction reference 224 for encoding the next encoded BPU of the encoded picture. After decoding all encoded BPUs of the encoded picture, the decoder may output the picture to video stream 304 for display and proceed to decode the next encoded picture in video bitstream 228.

[0055]

[0066] In binary decoding stage 302, the decoder may perform the inverse operation of the binary encoding technique used by the encoder (e.g., entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or other lossless compression algorithm). In some embodiments, in addition to prediction data 206 and quantized transform coefficients 216, the decoder may decode other information in binary decoding stage 302, such as, for example, a prediction mode, parameters of the prediction operation, a transform type, parameters of the quantization process (e.g., quantization parameters), or encoder control parameters (e.g., bitrate control parameters). In some embodiments, if video bitstream 228 is transmitted in packets over a network, the decoder may depacketize video bitstream 228 before sending it to binary decoding stage 302.

[0056]

[0067] 3B shows a schematic diagram of another example decoding process 300B consistent with embodiments of the present disclosure. Process 300B may be modified from process 300A. For example, process 300B may be used by a decoder compliant with a hybrid video coding standard (e.g., the H.26x family). Compared to process 300A, process 300B further divides prediction stage 204 into spatial prediction stage 2042 and temporal prediction stage 2044, and further includes loop filter stage 232 and buffer 234.

[0057]

[0068] In process 300B, for an encoding fundamental processing unit (referred to as the "current BPU") of an encoded picture being decoded (referred to as the "current picture"), prediction data 206 decoded by the decoder from binary decoding stage 302 may include various types of data depending on which prediction mode was used by the encoder to encode the current BPU. For example, if intra prediction was used by the encoder to encode the current BPU, prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating intra prediction, parameters of the intra prediction operation, etc. The parameters of the intra prediction operation may include, for example, the location (e.g., coordinates) of one or more neighboring BPUs used as references, the size of the neighboring BPUs, parameters of extrapolation, or directions of the neighboring BPUs relative to the original BPU, etc. As another example, if inter prediction was used by the encoder to encode the current BPU, prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating inter prediction, parameters of the inter prediction operation, etc. Parameters for the inter-prediction operation may include, for example, the number of reference pictures associated with the current BPU, weights associated with each of the reference pictures, the locations (e.g., coordinates) of one or more matching regions in each reference picture, or one or more motion vectors associated with each of the matching regions.

[0058]

[0069] Based on the prediction mode indicator, the decoder can decide whether to perform spatial prediction (e.g., intra prediction) in spatial prediction stage 2042 or temporal prediction (e.g., inter prediction) in temporal prediction stage 2044. Details of performing such spatial or temporal prediction are shown in FIG. 2B and will not be repeated below. After performing such spatial or temporal prediction, the decoder can generate a predicted BPU 208. The decoder can generate a predicted reference 224 by adding the predicted BPU 208 and the reconstructed residual BPU 222, as shown in FIG. 3A.

[0059]

[0070] In process 300B, the decoder may send the predicted reference 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 for performing a prediction operation in the next iteration of process 300B. For example, if the current BPU is decoded using intra prediction in the spatial prediction stage 2042, after generating the predicted reference 224 (e.g., the decoded current BPU), the decoder may send the predicted reference 224 directly to the spatial prediction stage 2042 for later use (e.g., for extrapolation of the next BPU of the current picture). If the current BPU is decoded using inter prediction in the temporal prediction stage 2044, after generating the predicted reference 224 (e.g., the reference picture from which all BPUs are decoded), the encoder may send the predicted reference 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder may apply a loop filter to the predicted reference 224 in the manner shown in FIG. 2B. The loop filtered reference picture may be stored in a buffer 234 (e.g., a decoded picture buffer in computer memory) for later use (e.g., to be used as an inter-prediction reference picture for a future encoded picture in the video bitstream 228). The decoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, if the prediction mode indicator in the prediction data 206 indicates that inter-prediction was used to encode the current BPU, the prediction data may further include parameters of the loop filter (e.g., loop filter strength).

[0060]

[0071] FIG. 4 is a block diagram of an example apparatus 400 for encoding or decoding video, according to an embodiment of the present disclosure. As shown in FIG. 4, the apparatus 400 may include a processor 402. When the processor 402 executes the instructions described herein, the apparatus 400 can become a dedicated machine for video encoding or decoding. The processor 402 may be any type of circuitry capable of manipulating or processing information. For example, the processor 402 may include any combination of several central processing units (i.e., "CPUs"), graphics processing units (i.e., "GPUs"), neural processing units ("NPUs"), microcontroller units ("MCUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general-purpose array logic (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), systems-on-chips (SoCs), or application-specific integrated circuits (ASICs), etc. In some embodiments, processor 402 may be a set of processors grouped as a single logical component. For example, as shown in Figure 4, processor 402 may include multiple processors, including processor 402a, processor 402b, and processor 402n.

[0061]

[0072] The device 400 may also include memory 404 configured to store data (e.g., an instruction set, computer code, intermediate data, etc.). For example, as shown in FIG. 4, the stored data may include program instructions (e.g., program instructions for implementing stages of processes 200A, 200B, 300A, or 300B) and data for processing (e.g., video sequence 202, video bitstream 228, or video stream 304). The processor 402 may access the program instructions and the data for processing (e.g., via bus 410) and execute the program instructions to perform operations or manipulations on the data for processing. The memory 404 may include a high-speed random access storage device or a non-volatile storage device. In some embodiments, the memory 404 may include any combination of random access memory (RAM), read-only memory (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, etc. Memory 404 may also be a collection of memories (not shown in FIG. 4) grouped as a single logical component.

[0062]

[0073] Bus 410 may be a communication device that transfers data between components within apparatus 400, such as an internal bus (e.g., a CPU memory bus) or an external bus (e.g., a Universal Serial Bus port, a Peripheral Component Interconnect Express port).

[0063]

[0074] For the sake of clarity and simplicity, in this disclosure, the processor 402 and other data processing circuitry will be collectively referred to as "data processing circuitry." The data processing circuitry may be implemented entirely as hardware or as a combination of software, hardware, or firmware. Furthermore, the data processing circuitry may be a single, independent module, or may be fully or partially integrated with any other components of the device 400.

[0064]

[0075] The device 400 may further include a network interface 406 to provide wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, or a mobile communication network, etc.) In some embodiments, the network interface 406 may include any combination of several network interface controllers (NICs), radio frequency (RF) modules, transponders, transceivers, modems, routers, gateways, wired network adapters, wireless network adapters, Bluetooth adapters, infrared adapters, near field communication ("NFC") adapters, or cellular network chips, etc.

[0065]

[0076] In some embodiments, apparatus 400 may optionally further include a peripheral interface 408 to provide connection to one or more peripheral devices. As shown in Figure 4, the peripheral devices may include, but are not limited to, a cursor control device (e.g., a mouse, a touchpad, or a touchscreen), a keyboard, a display (e.g., a cathode ray tube display, a liquid crystal display, or a light emitting diode display), or a video input device (e.g., an input interface coupled to a camera or a video archive), etc.

[0066]

[0077] It should be noted that a video codec (e.g., a codec performing process 200A, 200B, 300A, or 300B) may be implemented as any combination of software or hardware modules within apparatus 400. For example, some or all stages of process 200A, 200B, 300A, or 300B may be implemented as one or more software modules of apparatus 400, such as program instructions that may be loaded into memory 404. As another example, some or all stages of process 200A, 200B, 300A, or 300B may be implemented as one or more hardware modules of apparatus 400, such as dedicated data processing circuits (e.g., FPGAs, ASICs, or NPUs).

[0067]

[0078] The JVET Ad Hoc Group (AHG) Lossless and Near-Lossless Coding Tools (AHG18) released lossless software based on the VVC Test Model 6.0 (VTM-6.0). This software introduced a coding unit (CU) level flag called cu_transquant_bypass_flag. When cu_transquant_bypass_flag=1, it means that the transform and quantization of the prediction residual signal for that CU is skipped, and the residual for that CU is losslessly encoded directly.

[0068]

[0079] Similar to lossy VVC, current lossless codecs use two types of residual coding techniques: transform skip (TS) residual coding and transform residual coding. TS residual coding is selected if one of the following two conditions is met: 1) intra_bdpcm_flag has a value equal to 1, or 2) transform_skip_flag has a value equal to 1. Transform residual coding is used if both of the above conditions are false.

[0069]

[0080] Also, in current lossless codecs, if block differential pulse code modulation (BDPCM) is selected, transform-skip (TS) residual coding is used, otherwise transform residual coding is used.

[0070]

[0081] However, conventionally, in VVC6, both transform residual coding techniques and TS residual coding techniques are designed for lossy codecs. The statistical properties of residual coefficients differ depending on whether lossy coding or lossless coding is used. Therefore, it is desirable to improve existing residual coding methods for lossless coding to improve coding efficiency. This disclosure provides various methods for selecting an appropriate residual coding technique for lossless coding.

[0071]

[0082] According to some embodiments, residual coding methods for video signals may include TS residual coding and transform residual coding.

[0072]

[0083] TS residual coding can be selected when both of the following two conditions are met: The two conditions may include that the video signal is a luma component and either intra_bdpcm_flag or transform_skip_flag is 1.

[0073]

[0084] Transform residual coding can be selected if either of the above two conditions is false.

[0074]

[0085] In some embodiments, transform skip and BDPCM blocks may be allowed to select between TS residual coding and transform residual coding. This selection may be controlled by signaling an additional flag. The additional flag may be signaled at the CU level, slice level, picture level, or in the Picture Parameter Set (PPS) or SPS.

[0075]

[0086] For example, cu_transquant_bypass_flag can be signaled at the CU level and used to select one of two types of residual coding techniques for lossless coding. If cu_transquant_bypass_flag is 1, transform residual coding is used regardless of the values ​​of intra_bdpcm_flag or transform_skip_flag. Table 1 in Figure 5 shows an example transform unit syntax table, in which syntax elements shown in dashed boxes are suggested for implementing the disclosed embodiments.

[0076]

[0087] According to some embodiments, a sequence parameter set (SPS) level flag "sps_bdpcm_transform_residual_coding_flag" is used to signal the residual coding technique used by a luma BDPCM block. Specifically, sps_bdpcm_transform_residual_coding_flag equal to 1 specifies that the current luma block uses transform residual coding if BDPCM is applied to the current luma block (e.g., intra_bdpcm_flag=1). Also, sps_bdpcm_transform_residual_coding_flag equal to 0 specifies that the current luma block uses TS residual coding if BDPCM is applied to the current luma block (e.g., intra_bdpcm_flag=1). Furthermore, if sps_bdpcm_transform_residual_coding_flag is not present, it is inferred to be equal to 0.

[0077]

[0088] In these embodiments, sps_bdpcm_transform_residual_coding_flag is signaled based on a preset condition. As an example, if sps_bdpcm_enabled_flag is 1, sps_bdpcm_transform_residual_coding_flag is signaled.

[0078]

[0089] As another example, sps_bdpcm_transform_residual_coding_flag is signaled when sps_bdpcm_enabled_flag and transquant_bypass_enabled_flag are both 1. Table 2 of Figure 6 shows an example SPS syntax table for signaling sps_bdpcm_transform_residual_coding_flag based on both sps_bdpcm_enabled_flag and transquant_bypass_enabled_flag, where syntax elements shown in dashed boxes are suggested for implementing embodiments of the disclosure. As shown in Table 2 (Figure 6), sps_bdpcm_transform_residual_coding_flag equal to 1 specifies that the current luma block uses transform residual coding if BDPCM is applied to the current luma block (e.g., intra_bdpcm_flag=1) and the current block is in transform and quantization bypass mode (e.g., cu_transquant_bypass_flag=1). Also, sps_bdpcm_transform_residual_coding_flag equal to 0 specifies that the current luma block uses TS residual coding if BDPCM is applied to the current luma block (e.g., intra_bdpcm_flag=1) and the current block is in transform and quantization bypass mode (e.g., cu_transquant_bypass_flag=1).

[0079]

[0090] Although the above description uses luma blocks as an example to explain the residual coding process, it is contemplated that the disclosed methods are equally readily applicable to residual coding of chroma blocks.

[0080]

[0091] In some embodiments, the selection of the residual coding method can also be signaled at other levels, such as the PPS, picture header, or slice header. For example, the selection of TS residual coding can be controlled at the slice level. In that case, a slice-level flag is provided to enable / disable the TS residual coding method. The semantics of the slice-level flag are given below:

[0081]

[0092] slice_ts_residual_coding_disabled_flag equal to 1 specifies that the residual_coding( ) syntax structure is used to parse residual samples of transform skip and BDPCM blocks of the current slice. slice_ts_residual_coding_disabled_flag equal to 0 specifies that the residual_ts_coding( ) syntax structure is used to parse residual samples of transform skip blocks of the current slice. If slice_ts_residual_coding_disabled_flag is not present, it is inferred to be equal to 0.

[0082]

[0093] Table 3 of Figure 7 shows an example slice header syntax, where syntax elements shown in dashed boxes are suggested for implementing the disclosed embodiments. Table 4 of Figure 8 shows an example transform block syntax, where syntax elements shown in dashed boxes are suggested for implementing the disclosed embodiments. In some embodiments, if the value of slice_ts_residual_coding_disabled_flag is equal to 1, transform skip and BDPCM blocks use the transform residual coding method instead of the TS residual coding method.

[0083]

[0094] According to some embodiments of the present disclosure, for transform residual coding, signaling of the location of the last significant coefficient may be omitted. In the VVC6 transform residual coding method, the location of the last significant coefficient is signaled at the beginning of residual coding of a transform block. In contrast, in the disclosed method, when cu_transquant_bypass_flag=1, the location of the last significant coefficient is not signaled; instead, its location is inferred to be the bottom-right position of the transform block. When cu_transquant_bypass_flag=0, the location of the last significant coefficient is signaled in the same way as in VVC6.

[0084]

[0095] In VVC6 transform residual coding, coded_sub_block_flag of the first and last sub-blocks is not signaled but is inferred to be 1. In the disclosed method, if cu_transquant_bypass_flag=1, coded_sub_block_flag of all sub-blocks is signaled. However, if coded_sub_block_flag of all previously coded sub-blocks is zero, coded_sub_block_flag of the first sub-block is inferred to be 1. Similar to VVC6, in the disclosed method, if cu_transquant_bypass_flag=0, coded_sub_block_flag of the first and last sub-blocks is not signaled but is inferred to be 1.

[0085]

[0096] In VVC6 transform residual coding, the position of the last significant coefficient is always signaled, and because the last significant coefficient is always a non-zero value, the sig_coeff_flag of the last significant coefficient does not need to be signaled and is inferred to be 1. In contrast, in the disclosed method, when cu_transquant_bypass_flag=1, the last significant coefficient is always the coefficient to the bottom right, which can be either zero or a non-zero value. Therefore, when cu_transquant_bypass_flag=1, the disclosed method may signal the sig_coeff_flag of the position of the last significant coefficient. However, when cu_transquant_bypass_flag=0, the disclosed method may signal sig_coeff_flag in the same manner as VVC6 transform residual coding.

[0086]

[0097] Table 5 of Figure 9 shows an example transform residual coding syntax table for signaling the location of the last significant coefficient according to the disclosed method. In Table 5 (Figure 9), the syntax elements shown in dashed boxes are proposed modifications to the transform residual coding syntax of VVC6.

[0087]

[0098] According to some embodiments of the present disclosure, for transform residual coding, signaling of the position of the last significant coefficient may be omitted, regardless of the value of cu_transquant_bypass_flag.

[0088]

[0099] FIG. 10 is a flowchart of an exemplary computer-implemented method 1000 for processing a video signal with residual coding consistent with embodiments of the present disclosure. In some embodiments, method 1000 may be performed by a codec (e.g., an encoder using encoding process 200A or 200B of FIGS. 2A-2B or a decoder using decoding process 300A or 300B of FIGS. 3A-3B). For example, the codec may be implemented as one or more software or hardware components of an apparatus (e.g., apparatus 400) for encoding or transcoding a video sequence. In some embodiments, the video sequence may be an uncompressed video sequence (e.g., video sequence 202) or a decoded compressed video sequence (e.g., video stream 304). In some embodiments, the video sequence may be a monitoring video sequence that may be captured by a monitoring device (e.g., video input device of FIG. 4) associated with a processor (e.g., processor 402) of the apparatus. The video sequence may include multiple pictures. The apparatus may perform method 1000 at the picture level. For example, the device may process one picture at a time in the method 1000. As another example, the device may process multiple pictures at a time in the method 1000. The method 1000 may include steps such as:

[0089]

[0100] In step 1002, control information for encoding a video sequence can be received. The control information can include flags that can be signaled at different levels of the video sequence. For example, flags can be signaled at the CU level, slice level, picture level, or in a picture parameter set (PPS) or SPS.

[0090]

[0101] In step 1004, the coding method for coding the prediction residual signal of the coding block of the video sequence may be determined to be one of transform residual coding and transform skip residual coding based on the control information.

[0091]

[0102] In some embodiments, the control information may be signaled at a coding unit level of a video sequence, and the control information may include a first flag indicating whether to skip transform and quantization of a prediction residual signal of the coding block. For example, the first flag may be cu_transquant_bypass_flag. In response to the first flag satisfying a first condition, the coding method may be determined to be transform residual coding. As shown in Table 1 (FIG. 5), if the value of cu_transquant_bypass_flag is “1,” transform residual coding is used regardless of the values ​​of intra_bdpcm_flag or transform_skip_flag. Thus, the first condition may include the value of the first flag being “1.” It is understood that the transform residual coding is performed by a lossless codec. If the value of cu_transquant_bypass_flag is “0,” both the transform skip and BDPCM blocks may use TS residual coding.

[0092]

[0103] In some embodiments, the control information may further include a second flag and a third flag. For example, the second flag may be intra_bdpcm_flag, and the third flag may be transform_skip_flag. If the first flag does not satisfy the first condition, the encoding method may be determined based on the value of the second flag or the third flag. If intra_bdpcm_flag is equal to '1', the encoding method may be BDPCM. If transform_skip_flag is equal to '1', the encoding method may be transform skip coding.

[0093]

[0104] In some embodiments, other than being signaled at the coding unit level, the control information may be signaled in a sequence parameter set (SPS) of a video sequence, and the control information may include a fourth flag and a fifth flag. For example, the fourth flag may be sps_bdpcm_transform_residual_coding_flag, and the fifth flag may be intra_bdpcm_flag. As described with reference to Table 2 (FIG. 6), in response to the fourth flag and the fifth flag being equal to a first value (e.g., “1”), the coding method may be determined to be transform residual coding. Also, in response to the fourth flag being equal to a second value (e.g., “0”) and the fifth flag being equal to the first value (e.g., “1”), the coding method may be determined to be transform skip residual coding.

[0094]

[0105] In some embodiments, the fourth flag may be signaled in the control information if block differential pulse code modulation (BDPCM) is enabled for the video sequence. In some embodiments, the fourth flag may be signaled in the control information if BDPCM is enabled for the video sequence and transform and quantization bypass mode is enabled for the coding block.

[0095]

[0106] In some embodiments, the control information may be signaled at the slice level for a slice of a video sequence. The control information may also include a sixth flag (e.g., slice_ts_residual_coding_disabled_flag). As described with reference to Table 3 (FIG. 7) and Table 4 (FIG. 8), the coding method for coding the prediction residual signal of a coding block may be determined to be transform skip residual coding when the value of the sixth flag is the first value. It is understood that a coding block is associated with a slice for which control information is signaled at the slice level.

[0096]

[0107] In some embodiments, a non-transitory computer-readable storage medium containing instructions is also provided, which can be executed by a device (such as the disclosed encoders and decoders) to perform the above-described methods. Common forms of non-transitory media include, for example, floppy disks, flexible disks, hard disks, solid-state drives, magnetic tape or other magnetic data storage media, CD-ROMs, other optical data storage media, any physical media with a pattern of holes, RAM, PROMs and EPROMs, FLASH®-EPROMs or other flash memory, NVRAM, cache, registers, other memory chips or cartridges, and networked versions of the above. A device may include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memory.

[0097]

[0108] The embodiments can be further described using the following clauses. 1. Receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; 20. A computer-implemented method comprising: 2. The control information is signaled at the coding unit level of the video sequence; 2. The method of clause 1, wherein the control information includes a first flag indicating whether to skip transform and quantization of the prediction residual signal of the coding block. 3. The method of clause 2, wherein determining the encoding method based on the control information further includes determining the encoding method to transform residual encoding in response to the first flag satisfying a first condition. 4. The first condition includes that the value of the first flag is "1", and 4. The method of clause 3, wherein the transform residual coding is performed by a lossless codec. 5. The control information further includes a second flag and a third flag; and The method of clause 2, wherein determining the encoding method based on the control information further includes determining the encoding method based on the value of the second flag or the third flag in response to the first flag not satisfying the first condition. 6. The control information is signaled in a sequence parameter set of a video sequence; The control information includes a fourth flag and a fifth flag; and Determining the encoding method based on the control information determining the coding method to be transform residual coding in response to the fourth flag and the fifth flag having the same value; determining a coding method to be transform skip residual coding in response to the fourth flag and the fifth flag having different values; 2. The method of clause 1, further comprising: 7. The method of clause 6, further comprising signaling a fourth flag in the control information in response to block differential pulse code modulation (BDPCM) being enabled for the video sequence. 8. The method of clause 6, further comprising signaling a fourth flag in the control information in response to BDPCM being enabled for the video sequence and a transform and quantization bypass mode being enabled for the coding block. 9. The control information is signaled at a slice level for a slice of a video sequence; The control information includes a sixth flag; and The method of clause 1, wherein determining the encoding method based on the control information further includes determining the encoding method to transform skip residual encoding in response to the value of the sixth flag being the first value. 10. The method of clause 9, wherein the coding blocks are associated with slices. 11. A system for processing a video signal with residual coding, comprising: a memory for storing an instruction set; and at least one processor, the at least one processor comprising: receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; 10. A system configured to execute a set of instructions to cause the system to: 12. The control information is signaled at the coding unit level of the video sequence; 12. The system of clause 11, wherein the control information includes a first flag indicating whether to skip transform and quantization of the prediction residual signal of the coding block. 13. When determining the encoding method based on the control information, at least one processor: determining the encoding method to be transform residual encoding in response to the first flag satisfying the first condition; 13. The system of claim 12, configured to execute a set of instructions to cause the system to further: 14. The first condition includes the value of the first flag being "1", and 14. The system of claim 13, wherein the transform residual coding is performed by a lossless codec. 15. The control information further includes a second flag and a third flag; and When determining the encoding method based on the control information, the at least one processor determining an encoding method based on the value of the second flag or the third flag in response to the first flag not satisfying the first condition; 13. The system of claim 12, configured to execute a set of instructions to cause the system to further: 16. The control information is signaled in a sequence parameter set of a video sequence; The control information includes a fourth flag and a fifth flag; and When determining the encoding method based on the control information, the at least one processor determining the coding method to be transform residual coding in response to the fourth flag and the fifth flag having the same value; determining a coding method to be transform skip residual coding in response to the fourth flag and the fifth flag having different values; 12. The system of claim 11, configured to execute a set of instructions to cause the system to further: 17. At least one processor: signaling a fourth flag in the control information in response to BDPCM being enabled for the video sequence. 17. The system of claim 16, configured to execute a set of instructions to cause the system to further: 18. At least one processor: signaling a fourth flag in the control information in response to enabling BDPCM for the video sequence and enabling a transform and quantization bypass mode for the coding block. 17. The system of claim 16, configured to execute a set of instructions to cause the system to further: 19. The control information is signaled at the slice level for slices of the video sequence; The control information includes a sixth flag; and When determining the encoding method based on the control information, the at least one processor determining the encoding method to be transform skip residual encoding in response to the value of the sixth flag being the first value; 12. The system of claim 11, configured to execute a set of instructions to cause the system to further: 20. A non-transitory computer-readable medium storing instructions executable by at least one processor of a computer system, the execution of the instructions comprising: receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; A non-transitory computer-readable medium that causes a computer system to perform a method including:

[0098]

[0109] It should be noted that relational terms herein, such as "first" and "second," are used only to distinguish one entity or operation from another, and do not require or imply an actual relationship or ordering between those entities or operations. Also, the words "comprise," "have," "contain," and "include," as well as other similar forms, are intended to be equivalent in meaning and to be open-ended in that the term or terms following any one of these terms is not an exhaustive list of such term or terms, or limited to only the listed term or terms.

[0099]

[0110] It is understood that the above embodiments can be implemented by hardware or software (program code), or a combination of hardware and software. If implemented by software, it can be stored on the above computer-readable medium. The software, when executed by a processor, can perform the disclosed methods. The computing units and other functional units described in this disclosure can be implemented by hardware or software, or a combination of hardware and software. Those skilled in the art will also understand that more than one of the above modules / units can be integrated into one module / unit, and that each of the above modules / units can be further divided into multiple sub-modules / sub-units.

[0100]

[0111] In the foregoing specification, embodiments have been described with reference to numerous specific details that may vary depending on the implementation. Certain adaptations and modifications of the described embodiments may be made. Other embodiments may become apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the above specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims. Additionally, the order of steps depicted in the figures is intended for illustrative purposes only and is not intended to be limited to any particular order of steps. As such, one skilled in the art will recognize that these steps may be performed in different orders while performing the same method.

[0101]

[0112] In the drawings and specification, illustrative embodiments have been disclosed. However, many variations and modifications to these embodiments may be made. Thus, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; 20. A computer-implemented method comprising:

2. the control information is signaled at a coding unit level of the video sequence; The method of claim 1 , wherein the control information includes a first flag indicating whether to skip transform and quantization of the prediction residual signal of the coding block.

3. 3. The method of claim 2, wherein determining the encoding method based on the control information further comprises determining the encoding method to be the transform residual coding in response to the first flag satisfying a first condition.

4. The first condition includes that the value of the first flag is “1”, and The method of claim 3 , wherein the transform residual coding is performed by a lossless codec.

5. The control information further includes a second flag and a third flag; and 3. The method of claim 2, wherein determining the encoding method based on the control information further comprises determining the encoding method based on a value of the second flag or the third flag in response to the first flag not satisfying a first condition.

6. the control information is signaled in a sequence parameter set of the video sequence; The control information includes a fourth flag and a fifth flag; and determining the encoding method based on the control information determining the encoding method to be the transform residual encoding in response to the fourth flag and the fifth flag having the same value; determining the encoding method to be the transform skip residual encoding in response to the fourth flag and the fifth flag having different values; The method of claim 1 further comprising:

7. 7. The method of claim 6, further comprising signaling the fourth flag in the control information in response to block differential pulse code modulation (BDPCM) being enabled for the video sequence.

8. 7. The method of claim 6, further comprising signaling the fourth flag in the control information in response to BDPCM being enabled for the video sequence and a transform and quantization bypass mode being enabled for the coding block.

9. the control information is signaled at a slice level for a slice of the video sequence; the control information includes a sixth flag; and 2. The method of claim 1, wherein determining the encoding method based on the control information further comprises: determining the encoding method to be the transform skip residual coding in response to a value of the sixth flag being a first value.

10. The method of claim 9 , wherein the coding block is associated with the slice.

11. 1. A system for processing a video signal with residual coding, comprising: a memory for storing an instruction set; and at least one processor, wherein the at least one processor: receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; a system configured to execute the set of instructions to cause the system to:

12. the control information is signaled at a coding unit level of the video sequence; The system of claim 11 , wherein the control information includes a first flag indicating whether to skip transform and quantize the prediction residual signal of the coding block.

13. When determining the encoding method based on the control information, the at least one processor: determining the encoding method to be the transform residual encoding in response to the first flag satisfying a first condition; 13. The system of claim 12, configured to execute the set of instructions to further cause the system to:

14. The first condition includes that the value of the first flag is “1”, and The system of claim 13 , wherein the transform residual coding is performed by a lossless codec.

15. The control information further includes a second flag and a third flag; and When determining the encoding method based on the control information, the at least one processor: determining the encoding method based on the value of the second flag or the third flag in response to the first flag not satisfying a first condition; 13. The system of claim 12, configured to execute the set of instructions to further cause the system to:

16. the control information is signaled in a sequence parameter set of the video sequence; The control information includes a fourth flag and a fifth flag; and When determining the encoding method based on the control information, the at least one processor: determining the encoding method to be the transform residual encoding in response to the fourth flag and the fifth flag having the same value; determining the encoding method to be the transform skip residual encoding in response to the fourth flag and the fifth flag having different values; 12. The system of claim 11, configured to execute the set of instructions to further cause the system to:

17. The at least one processor signaling the fourth flag in the control information in response to BDPCM being enabled for the video sequence.

17. The system of claim 16, configured to execute the set of instructions to further cause the system to:

18. The at least one processor signaling the fourth flag in the control information in response to BDPCM being enabled for the video sequence and a transform and quantization bypass mode being enabled for the coding block.

17. The system of claim 16, configured to execute the set of instructions to further cause the system to:

19. the control information is signaled at a slice level for a slice of the video sequence; the control information includes a sixth flag; and When determining the encoding method based on the control information, the at least one processor: determining the encoding method to be the transform skip residual encoding in response to the sixth flag having a first value; 12. The system of claim 11, configured to execute the set of instructions to further cause the system to:

20. A non-transitory computer-readable medium storing instructions executable by at least one processor of a computer system, execution of said instructions comprising: receiving control information for encoding a video sequence; determining, based on the control information, a coding method for coding a prediction residual signal of a coding block of the video sequence, the coding method being one of transform residual coding and transform skip residual coding; A non-transitory computer-readable medium that causes the computer system to perform a method including:

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