Function chain constitution method

The function chain configuration method addresses inefficiencies in mapping VNFs by considering heterogeneous devices and paths, using a mixed integer linear programming model to optimize objective functions and handle multiple services, enhancing flexibility and performance.

JP2025182456APending Publication Date: 2025-12-15NIPPON TELEGRAPH & TELEPHONE CORP +1
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Patent Information

Application Number
JP2024090029
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-03
Publication Date
2025-12-15

AI Technical Summary

Technical Problem

Conventional methods for mapping virtual network functions (VNFs) in a computer system do not consider data processing within heterogeneous devices, multiple types of switches, or transmission paths, leading to inefficiencies in minimizing or maximizing objective functions and failing to handle multiple services with separate objective functions, while also being computationally complex.

Method used

A function chain configuration method that includes acquiring device and service information, determining sub-chains, solving function mapping to minimize or maximize objective functions, and adjusting request parameters, using a mixed integer linear programming model to handle multiple types of devices, switches, and transmission paths.

Benefits of technology

Enables efficient mapping of functions to minimize or maximize objective functions while satisfying service conditions, reduces computational complexity, and allows for multiple objective functions per service, improving flexibility and performance in inter-device communication.

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Abstract

To map functions by a computer system equipped with one or more kinds of devices, one or more kinds of switch, and one or more kinds of transmission path.SOLUTION: A function chain constitution method includes: a step S1 of acquiring device information and service information; a step S2 of determining a sub-chain as a virtual transmission path of a function chain required to embody service that a user desires; a step S3 of solving mapping problems of functions that the computer system is equipped with so as to minimize or maximize an object function based upon the device information, the service information and the sub-chain; and a step S4 of altering parameters of requests included in the service device when no optimum solution is found in the step S3.SELECTED DRAWING: Figure 9
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Description

[Technical Field]

[0001] The present invention relates to a method for configuring a function chain in a computer system that provides a service to a user by using a service function chaining technique. [Background technology]

[0002] Attention is being drawn to NFV (Network Function Virtualization), which virtualizes network service functions that were previously implemented using dedicated hardware on general-purpose servers. To flexibly combine virtualized network functions to provide users with the services they desire, a method is required for forwarding packets to the appropriate network devices in the appropriate order. Service Function Chaining (SFC) is being considered as a packet forwarding method that can realize such technology (Non-Patent Document 1).

[0003] Research has been reported that focuses on applying the SFC concept to communication between devices (Non-Patent Document 2). The technology disclosed in Non-Patent Document 2 demonstrates that low latency can be achieved and real-time video surveillance services can be provided by flexibly linking multiple image processing functions using a look-aside CPU (Central Processing Unit)-FPGA (field-programmable gate array) architecture. The SFC concept is also being studied in fields other than network services, and can be applied to communication between multiple devices, with the potential to improve the flexibility and performance of inter-device communication.

[0004] Figure 26 shows an overview of the conventional technology disclosed in Non-Patent Document 3. In Figure 26, Source is the starting point of the function chain required to realize the service, and Destination is the end point of the function chain. FW (Firewall), NAT (Network Address Translation), and DPI (Deep Packet Inspection) are functions that make up the function chain. Chain 1 is connected in the order of FW → NAT, and Chain 2 is connected in the order of FW → DPI → NAT.

[0005] Data using the service of chain 1 is transferred from node 2000-1 of Source 1 to node 2000-2 equipped with function FW, then via nodes 2000-3 and 2000-4 to node 2000-5 equipped with function NAT. Data using the service of chain 2 is transferred from node 2000-6 of Source 2 to node 2000-2 equipped with function FW, then to node 2000-3 equipped with function DPI, then via node 2000-4 to node 2000-5 equipped with function NAT, and then to node 2000-7 of Destination 2.

[0006] In the conventional technology shown in Figure 26, nodes are switches or data centers, there is one type of edge, and functions are realized by virtualized network functions (VNFs). In the conventional technology, the placement of VNFs and the method of connecting network devices are determined so that the desired objective function (either latency, network bandwidth used, or number of nodes used) for the chain in the user's network processing is minimized. In this conventional technology, requests are assigned to VNFs, and then functions are mapped to nodes consisting of network device switches and data centers.

[0007] A flowchart of a conventional mapping method is shown in Figure 27. In the conventional technique disclosed in Non-Patent Document 3, input information is acquired (step S300), a mathematical programming model is constructed (step S301), an objective function is determined (step S302), and mathematical optimization is performed (step S303).

[0008] In the step of acquiring input information, the device information shown in FIG. 28 and the service information shown in FIG. 29 are acquired as input information. The device information includes information on two types of nodes, data centers and switches, and includes information on the number of functions that a node can accommodate. Furthermore, the device information includes information on the edge, such as the available bandwidth and transmission delay of the edge. The service information includes, as request information for a service to be implemented in the network, information on the desired function, information on the desired throughput, information on the maximum transmission delay between nodes, information on the path specification, and information on the start node and end node. Furthermore, the service information includes, as information on the function (VNF) to be mapped, information on the maximum number of functions in the entire network, information on the maximum number of requests that a function can carry, and information indicating whether the function can be implemented in a data center or a switch.

[0009] In the step of constructing a mathematical programming model, a mixed integer quadratic constrained programming (MIQCP) model is constructed using the constraints and decision variables shown in Fig. 30. The decision variables used in the prior art are shown below.

[0010]

number

[0011] Using these decision variables, the constraints shown in Figure 30 are described in the MIQCP model. In the step of determining the objective function, one of the following three is selected: service (chain) latency, network bandwidth usage, and node usage. The objective function is also described using the above decision variables.

[0012] In the mathematical optimization step, the problem of minimizing the objective function under the specified constraints is solved by mathematical optimization. As a result, the desired objective function, request and function placement information, node connection information, etc. can be obtained. Note that the mathematical programming model of the prior art only considers network processing, so it does not consider the processing time of nodes and assumes that the bandwidth of edges for each chain is basically uniform.

[0013] [Task 1] The conventional technology disclosed in Non-Patent Document 3 is a method for mapping VNFs in a network, but does not consider data processing within heterogeneous devices, switches, multiple types of edges, or applications. Therefore, the conventional technology has a problem in that it is not possible to map functions so as to minimize or maximize an objective function while satisfying service conditions in a computer system equipped with multiple types of devices, switches, and transmission paths.

[0014] [Task 2] The conventional technology disclosed in Non-Patent Document 3 had the problem that it was not possible to set separate objective functions for each service (chain), and that even if there were multiple services (chains), only a common objective function could be defined.

[0015] [Task 3] The conventional technology disclosed in Non-Patent Document 3 is a method of constructing a complex mathematical programming model that assigns requests to functions and maps those functions to nodes. However, because it uses the MIQCP model, which is computationally complex, it has the problem of taking a long time to search for problems. [Prior art documents] [Non-patent literature]

[0016] [Non-Patent Document 1] RFC 7665 - Service Function Chaining (SFC) Architecture, Internet Engineering Task Force (IETF), October 2015, <https: / / datatracker.ietf.org / doc / html / rfc7665> [Non-Patent Document 2] Yuta UKON, et al., “Real-Time Image Processing Based on Service Function Chaining Using CPU-FPGA Architecture”, IEICE Transactions on Communications, Vol.E103-B, No.1, pp.11-19, 2020, <https: / / search.ieice.org / bin / summary.php?id=e103-b_1_11> [Non-Patent Document 3] S.Mehraghdam, M.Keller and H.Karl, “Specifying and placing chains of virtual network functions”, 2014 IEEE 3rd International Conference on Cloud Networking (CloudNet), Luxembourg, Luxembourg, May 2014, pp.7-13, doi:10.1109 / CloudNet.2014.6968961, <https: / / ieeexplore.ieee.org / document / <8281644> [Summary of the Invention] <00​​​​​​The present invention has been made to solve the above-mentioned problems, and aims to provide a function chain configuration method that can map functions so as to minimize or maximize an objective function in a computer system equipped with one or more types of devices, one or more types of switches, and one or more types of transmission paths. [Means for solving the problem]

[0018] The function chain configuration method of the present invention is characterized by comprising a first step of acquiring device information and service information, a second step of determining a sub-chain, which is a virtual transmission path of the function chain required to realize the user's desired service, a third step of solving a mapping problem of functions installed on a computer system so as to minimize or maximize an objective function based on the device information, the service information, and the sub-chain determined in the second step, and a fourth step of changing the request parameters included in the service information if an optimal solution is not found in the third step.

[0019] In addition, in one configuration example of the function chain configuration method of the present invention, the second step is characterized by including a fifth step of determining the degree of parallelism of each function that constitutes the function chain based on the service information, and a sixth step of determining possible combinations of sub-chains of the parallelized functions based on the degree of parallelism. In addition, in one configuration example of the function chain configuration method of the present invention, the second step is characterized in that, when mapping functions that are components of multiple function chains necessary to realize multiple services, the second step includes a fifth step of calculating the total throughput required for the multiple function chains for each function based on the service information, a sixth step of determining the degree of parallelism of each function so as to satisfy the total throughput, and a seventh step of determining, for each function chain, the combinations of sub-chains that can be taken by the parallelized functions based on the degree of parallelism.

[0020] In addition, in one configuration example of the function chain configuration method of the present invention, the third step is characterized by including a step of constructing a mathematical programming model using predetermined constraint conditions; a fifth step of determining a desired objective function based on the service information; a sixth step of determining weights for each objective function if there are multiple objective functions; a seventh step of combining the multiple objective functions based on the weights to create a single objective function if there are multiple objective functions; and an eighth step of finding, as a solution to the optimization problem, values ​​of decision variables that minimize or maximize the objective function obtained in the fifth step or the seventh step under the constraint conditions. In addition, in one configuration example of the function chain configuration method of the present invention, the computer system is equipped with one or more types of nodes, one or more types of switches, and one or more types of transmission paths, and the decision variables include a decision variable indicating the node where the function is placed, a decision variable indicating the node to be used, a decision variable indicating the switch to be used, and a decision variable indicating whether or not different types of transmission paths are established, and the constraints include function placement constraints, function connection constraints, and chain constraints based on service information.

[0021] In addition, in one configuration example of the function chain configuration method of the present invention, the placement constraints are characterized by including a constraint that a specific function is always assigned to one node, a constraint that limits the number of functions that a node can have, a constraint that multiple functions can be assigned to one node within a specified capacity, a constraint that limits the functions that a node can have, and a constraint that limits the maximum speed of the node. In addition, in one configuration example of the function chain configuration method of the present invention, the connection constraints include a constraint that an edge exists between the node to which the function is mapped and the switch being used, a flow matching constraint, a constraint regarding the bandwidth of the edge, a constraint that the delay between edges is kept within an allowable range, a constraint regarding the number of ports of the switch, and a constraint that prevents buffer overflow of the PCIe switch. In addition, in one configuration example of the function chain configuration method of the present invention, the chain constraint conditions are characterized by including a constraint condition that satisfies the latency of the chain request, a constraint condition that satisfies the jitter width of the chain request, which is the processing time difference between sub-chains, and a constraint condition that determines the transmission path. [Effects of the Invention]

[0022] According to the present invention, in a computer system equipped with one or more types of devices, one or more types of switches, and one or more types of transmission paths, it is possible to map functions so as to minimize or maximize an objective function while satisfying service conditions. Furthermore, in the present invention, when there are multiple services (chains), it is possible to set multiple objective functions for each service (chain). Furthermore, in the present invention, it is possible to construct a mathematical programming model that is simpler to calculate than the MIQCP model, thereby reducing the time required to search for an optimal solution compared to conventional methods. [Brief explanation of the drawings]

[0023] [Figure 1]FIG. 1 is a diagram showing an outline of a function chain configuration method according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a block diagram showing the configuration of an SFC system according to a first embodiment of the present invention. [Figure 3] FIG. 3 is a block diagram showing the configuration of a control function unit according to the first embodiment of the present invention. [Figure 4] FIG. 4 is a block diagram showing the configuration of a function chain configuration unit according to the first embodiment of the present invention. [Figure 5] FIG. 5 is a block diagram showing the configuration of a sub-chain determination function unit according to the first embodiment of the present invention. [Figure 6] FIG. 6 is a block diagram showing the configuration of a mapping function unit according to the first embodiment of the present invention. [Figure 7] FIG. 7 is a diagram showing an example of the topology of a computer system according to the first embodiment of the present invention. [Figure 8] FIG. 8 is a diagram showing an example of a chain according to the first embodiment of the present invention. [Figure 9] FIG. 9 is a flowchart illustrating a function chain configuration method according to the first embodiment of the present invention. [Figure 10] FIG. 10 is a diagram showing device information according to the first embodiment of the present invention. [Figure 11] FIG. 11 is a diagram showing service information according to the first embodiment of the present invention. [Figure 12] FIG. 12 is a diagram illustrating an example of the operation of the sub-chain determination function unit according to the first embodiment of the present invention. [Figure 13] FIG. 13 is a diagram showing constraints of a mathematical programming model according to the present invention. [Figure 14] FIG. 14 is a diagram showing constraints of a mathematical programming model according to the first embodiment of the present invention. [Figure 15] FIG. 15 is a diagram showing a topology after mapping according to the first embodiment of the present invention. [Figure 16]FIG. 16 is a diagram showing an example of a chain according to the second embodiment of the present invention. [Figure 17] FIG. 17 is a diagram showing constraints of a mathematical programming model according to the second embodiment of the present invention. [Figure 18] FIG. 18 is a diagram showing a topology after mapping according to the second embodiment of the present invention. [Figure 19] FIG. 19 is a diagram showing an example of the topology of a computer system according to the third embodiment of the present invention. [Figure 20] FIG. 20 is a diagram showing a topology after mapping according to the third embodiment of the present invention. [Figure 21] FIG. 21 is a diagram showing an example of a chain according to the fourth embodiment of the present invention. [Figure 22] FIG. 22 is a diagram showing a topology after mapping according to the fourth embodiment of the present invention. [Figure 23] FIG. 23 is a diagram showing an example of a chain according to the fifth embodiment of the present invention. [Figure 24] FIG. 24 is a flowchart illustrating the operation of the sub-chain determination function unit according to the fifth embodiment of the present invention. [Figure 25] FIG. 25 is a diagram illustrating an example of the operation of the sub-chain determination function unit according to the fifth embodiment of the present invention. [Figure 26] FIG. 26 is a schematic diagram of the prior art. [Figure 27] FIG. 27 is a flowchart illustrating a prior art mapping method. [Figure 28] FIG. 28 is a diagram showing device information. [Figure 29] FIG. 29 is a diagram showing service information. [Figure 30] FIG. 30 is a diagram illustrating constraints of a mathematical programming model. DETAILED DESCRIPTION OF THE INVENTION

[0024] [First Example] An embodiment of the present invention will be described below with reference to the drawings. In this invention, the method of indicating where functions are placed and how they are connected is called mapping. Also, in this invention, a chain of functions that make up a service is called a chain, and the functionalities required to form a chain are called requests. The present invention has been made in consideration of the above-mentioned problems, and provides a method for mapping functions, which are components of an application, to a computer system equipped with multiple types of devices, multiple types of switches, and multiple types of transmission paths so that an objective function is minimized or maximized.

[0025] FIG. 1 shows an overview of a function chain configuration method according to a first embodiment of the present invention. In this embodiment, a node 1001 that provides a service function is a processing device such as a GPU (Graphics Processing Unit), FPGA (Field-Programmable Gate Array), or XPU, an edge 1002 is a PCIe (Peripheral Component Interconnect Express) or Ethernet (registered trademark), and a switch 1003 that connects devices is a PCIe switch or an Ethernet switch. A function is a component of an application. In FIG. 1, 1004 denotes a CPU and memory of a computer system 1000, 1005 denotes storage, 1006 denotes shared memory, and 1007 denotes a NIC (Network Interface Card).

[0026] In the example of Figure 1, chain a is a chain of functions FA, FB, and FC, and chain b is a chain of functions FD and FE. Here, function FA is a function that provides, for example, video data decoding, FB is a function that provides data resizing, and FC is a function that provides AI (Artificial Intelligence) inference services.

[0027] 1008 in Figure 1 indicates the route taken by the data of chain a. As a result of the mapping, for example, the route taken by the data of chain a is GPU 1000-1, which performs video data decoding (FA), → FPGA (FB) 1000-2, which performs data resizing, → XPU (FC) 1000-3, which performs AI inference.

[0028] The configuration of the SFC system according to this embodiment is shown in Figure 2. The SFC system is made up of a tagging function unit 1 that assigns tags to chains, data transfer function units 2-1 to 2-6 that refer to the tags, delete the tags, and transfer the data to functions, calculation function units 3-1 to 3-4 that process the functions, and a control function unit 4 that implements the functions and controls the data transfer function unit 2 and tagging function unit 1. The shared memory 5 in Figure 2 is the same as the shared memory 1006 in Figure 1.

[0029] The tagging function unit 1 adds a chain tag to the service usage data sent from the user according to the user's desired service. The data transfer function units 2-1 to 2-6 transfer the data to the next function based on the tag. Note that data transfer using tags may be in accordance with the NSH (Network Service Header) defined in RFC8300, for example (see the literature "RFC 8300 - Network Service Header (NSH)", Internet Engineering Task Force (IETF), January 2018,<https: / / datatracker.ietf.org / doc / html / rfc8300> ")

[0030] The arithmetic function units 3-1 to 3-4 each process one or more functions. In the example of FIG. 2, the arithmetic function unit 3-1 processes functions #1 to #3, the arithmetic function unit 3-2 processes functions #4 to #6, the arithmetic function unit 3-3 processes functions #7 to #10, and the arithmetic function unit 3-4 processes functions #11 to #13. Each of the arithmetic function units 3-1 to 3-4 may be realized by multiple processing devices (the above-mentioned nodes 1001) or by a single processing device. When the arithmetic function units 3 (3-1 to 3-4) are realized by a single processing device, the data transfer function units 2 (2-1 to 2-6) may be included within the device. For example, in the example of FIG. 2, the arithmetic function unit 3-2 has a data transfer function unit 2-3 within the device.

[0031] The control function unit 4 acquires device information and service information, determines subchains, which are virtual transmission paths of the function chains required to realize the user's desired service, and solves a mapping problem for the functions installed on the computer system based on the device information, service information, and subchains so as to minimize or maximize the objective function. The configuration of the control function unit 4 is shown in Figure 3. The control function unit 4 includes a function chain configuration unit 40, an implementation function unit 41, a tag generation unit 42, and a routing information registration unit 43.

[0032] 4 shows the configuration of the function chain configuration unit 40. The function chain configuration unit 40 includes an input unit 400, an input information acquisition function unit 401, a sub-chain determination function unit 402, a mapping function unit 403, an output unit 404, and an input parameter change function unit 405.

[0033] The configuration of the subchain determination function unit 402 is shown in FIG. 5, and the configuration of the mapping function unit 403 is shown in FIG. The subchain determination function unit 402 comprises an input unit 4020 , a function parallelism determination unit 4021 , a subchain construction function unit 4022 , and an output unit 4023 . The mapping function unit 403 includes an input unit 4030 , a mathematical programming modeling function unit 4031 , an objective function selection function unit 4032 , a mathematical optimization unit 4033 , and an output unit 4034 .

[0034] The implementation function unit 41 of the control function unit 4 implements a function corresponding to the user's desired service in the arithmetic function units 3 (3-1 to 3-4) based on the mapping information obtained by the function chain configuration unit 40. Specifically, if the arithmetic function units 3 (3-1 to 3-4) are configured with, for example, a CPU or a GPU, a program for the function can be added to the memory of the CPU or GPU. Also, if the arithmetic function units 3 (3-1 to 3-4) are configured with, for example, an FPGA, the circuit configuration of the FPGA can be updated to add a circuit for the function.

[0035] The tag generation unit 42 of the control function unit 4 generates a tag containing chain route information corresponding to the user's desired service based on the mapping information. The tag addition function unit 1 adds the tag generated by the tag generation unit 42 to the service usage data sent from the user.

[0036] The routing information registration unit 43 of the control function unit 4 updates the routing information of the data transfer function unit 2 (2-1 to 2-6) based on the mapping information so that the service usage data sent from the user follows the chain route corresponding to the user's desired service.

[0037] The data transfer function units 2 (2-1 to 2-6) transfer the service usage data sent from the user to the function (arithmetic function unit 3) corresponding to the user's desired service based on the route information written in the tag attached to the service usage data sent from the user and the routing information registered in the data transfer function units 2. In this way, data is transferred to the function multiple times by the data transfer function units 2 (2-1 to 2-6) on the chain route. The data transfer function units 2 (2-1 to 2-6) that are the end points of the chain route remove tags from data after processing by all functions has been completed, and send the data with the tags removed back to the user.

[0038] The control function unit 4 may be realized by the CPU and memory (1004 in FIG. 1) of a computer system, or may be realized by an FPGA (1000-2 in FIG. 1) or the like. The CPU executes the processing of the present invention in accordance with a program stored in the memory. As described above, the arithmetic function unit 3 (3-1 to 3-4) is configured by the CPU and memory of a computer system, a GPU or FPGA, or the like.

[0039] Next, an example of a computer system topology is shown in Figure 7. A0 to A23 are all the same type of nodes. E0 to E2 are Ethernet switches, and P0 and P1 are PCIe switches.

[0040] An example of a chain corresponding to a service desired by a user is shown in Figure 8. The chain in Figure 8 includes three functions FA, FB, and FC, connected in the order FA → FB → FC. The processing speeds of functions FA, FB, and FC are 30 fps, 20 fps, and 60 fps, respectively.

[0041] The method of this embodiment will be described when mapping functions, which are components of the chain in Fig. 8, on the topology in Fig. 7. The method of this embodiment solves the problem that conventional techniques cannot be applied to data processing within an application on a computer system where communication is performed via heterogeneous switches and transmission paths.

[0042] A flowchart of the function chain configuration method according to this embodiment is shown in Fig. 9. The processing shown in Fig. 9 is performed by the function chain configuration unit 40. The function chain configuration unit 40 executes roughly the following steps: step S1 for acquiring input information, step S2 for determining a sub-chain, step S3 for performing mapping calculation, and step S4 for changing input parameters.

[0043] A subchain is a virtual transmission path of a function chain that consists of functions associated with requests. For example, for a chain FA → FB, the subchains refer to the virtual transmission paths FA#1 → FB#1, FA#2 → FB#2, etc.

[0044] First, in step S1 of acquiring input information, the input information acquisition function unit 401 of the function chain configuration unit 40 acquires the device information shown in Fig. 10 and the service information shown in Fig. 11 through the input unit 400 (steps S100 and S101 in Fig. 9). The device information and service information are set in advance by, for example, a provider that provides a service to a user. Furthermore, although not stated in the service information in Fig. 11, information about the functions that make up the chain and the connection order of the functions is also set in advance by the service provider.

[0045] In Figures 10 and 11, V is the set of mappable nodes v (devices) (A0, A1,...), U is the set of functions u used for each chain (F0, F1,...), and S is the PCIe switch s connected to the mappable nodes. P and Ethernet switchesE A is a set of chains c (services) to be mapped, and C' is a set of subchains c' for each chain. P PCIe switches P and the set of connections between node v (A0→P0, A1→P0,···), A E Ethernet switches E and the set of connections between node v (A0→E0, A1→E0,...).

[0046] In the device information shown in Figure 10, anode (v) is the capacity of node v, K inode (v) is the type of node v, N unode (v) is the number of functions that node v can have, V maxnode (v) is the maximum processing speed that node v can tolerate, P onode (v) is the number of ports of node v, W anode (v) is the score indicating the power consumption of node v. dPCIe (s P ) is a PCIe switch P A score indicating the dynamic power consumption of dEthernet (s E ) is an Ethernet switch E A score indicating the dynamic power consumption of sPCIe (s P ) is a PCIe switch P A score indicating the static power consumption of sEthernet (s E ) is an Ethernet switch E A score indicating the static power consumption of oPCIe (s P ) is a PCIe switch P Number of ports, P oEthernet (s E ) is an Ethernet switch E The number of ports is B. aPCIe (vors P ,v'ors P ') is PCIe switch P and the available bandwidth of the path between node v, B aEthernet (vors E ,v'orsE ') is an Ethernet switch E and the available bandwidth of the path between node v, L aPCIe (vors P ,v'ors P ') is PCIe switch P and the transmission delay of the path between node v, La Ethernet (vors E ,v'ors E ') is an Ethernet switch E is the transmission delay of the path between node v and node v. unode (v), B aPCIe (vors P ,v'ors P '), B aEthernet (vors E ,v'ors E '), L aPCIe (vors P ,v'ors P '), L aEthernet (vors E ,v'ors E ') are parameters common to the prior art, and the other parameters are new parameters.

[0047] In the service information shown in FIG. h (c) is the throughput required by chain c, L a (c) is the latency required by chain c, J i (c) is the jitter required by chain c, L i (c) is the transmission path (PCIe or Ethernet) specified by chain c, O b (c) is the objective function of chain c, P r (c) is the importance of the objective function for chain c. T h (c') is the throughput of subchain c'. C afunction (u) is the capacitance of function u, K ifunction (u) is a node that can have function u, V efunction (u) is the speed at which function u processes a data block, L afunction (u) is the time it takes for function u to process a data block, D infunction(u) is the size of the data block input to function u, D outfunction (u) is the size of the processed data block output by function u, W afunction (u) is the score indicating the power consumption of function u. T h (c), K ifunction (u) is a parameter common to the prior art, and the other parameters are new parameters.

[0048] As shown in Fig. 10, the device information consists of various types of node information, switch information, and edge information. The node information and switch information in this embodiment are set taking into consideration parameters that are not considered in conventional technology. In addition, in this embodiment, the edge information can express connectable locations by providing parameters such as the matrices shown in equations (1) and (2).

[0049]

number

[0050] In equations (1) and (2), the 0 indicates that the passband is 0 and therefore cannot be connected. For example, Ba PCIe (0, 0) indicates that only node A0 and PCIe switch P0 can be connected.

[0051] As shown in FIG. 11, the service information consists of chain information, function information, and subchain information. The service information of this embodiment is set taking into consideration many parameters that are not considered in conventional technology. The chain information includes multiple chain requirements such as latency and jitter in addition to the required throughput, making it possible to meet a variety of service requirements. The subchain information is required when determining a subchain in step S2, which will be described later. Unlike conventional technology, the function information takes into consideration processing in different data block units in data processing within an application. For this reason, the processing speed and processing time for each data block are set as function information.

[0052] Next, in step S2 of establishing a subchain, the subchain determination function unit 402 of the function chain configuration unit 40 executes step S102 of parallelizing functions based on the service information acquired in step S1, and step S103 of determining the subchain.

[0053] First, the function parallelism determination unit 4021 of the subchain determination function unit 402 determines the parallelism of each function based on the service information acquired through the input unit 4020 so as to satisfy the required throughput (step S102 in FIG. 9).

[0054] The subchain construction function unit 4022 of the subchain determination function unit 402 determines a subchain by evenly allocating the parallelized functions to the functions that make up the subchain, for example, using a round robin method, based on the parallelism determined by the function parallelism determination unit 4021 (step S103 in Figure 9).

[0055] In step S2, subchains are constructed using functions associated with requests, so that request allocation does not need to be taken into consideration when constructing a mathematical programming model.

[0056] Fig. 12 is a diagram showing an example of the operation of the sub-chain determination function unit 402. In the example of Fig. 12, it is assumed that the chain c corresponding to the service desired by the user is known to have three functions FA → FB → FC connected in this order.

[0057] Assume that the service information defines the processing speed of function FA as 30 fps, the processing speed of function FB as 20 fps, and the processing speed of function FC as 60 fps, and the required throughput of chain c as 225 fps. Using this service information, the function parallelism determination unit 4021 parallelizes each function to the minimum extent possible so as to satisfy the required throughput (step S102). In this example, the minimum parallelism of function FA is 8, the smallest integer value greater than or equal to 225 / 30. The minimum parallelism of function FB is 12, the smallest integer value greater than or equal to 225 / 20. The minimum parallelism of function FC is 4, the smallest integer value greater than or equal to 225 / 60.

[0058] Next, the subchain construction function unit 4022 determines subchains by evenly allocating the parallelized functions to the functions constituting the subchains using, for example, a round-robin algorithm based on the parallelism determined by the function parallelism determination unit 4021 (step S103). In the example of FIG. 12, 24 subchains #1, #2, #3,... are determined using the round-robin algorithm. F.A1, F.A2, F.A3,... are functions obtained by dividing and parallelizing the processing of function FA, F.B1, F.B2, F.B3,... are functions obtained by dividing and parallelizing the processing of function FB, and F.C1, F.C2, F.C3,... are functions obtained by dividing and parallelizing the processing of function FC. In the example of FIG. 12, the throughput of each subchain #1, #2, #3,... is required throughput / number of subchains = 225 / 24 = 9.375 fps. The sub-chain determination function unit 402 performs the processes of steps S102 and S103 for each of all chains c.

[0059] Next, in step S3 of performing mapping calculation, the mapping function unit 403 of the function chain configuration unit 40 solves the function mapping problem to minimize or maximize the objective function based on the device information, service information, and the subchain determined by the subchain determination function unit 402, and outputs the optimized objective function, mapping information, and other simulation results (network bandwidth used, latency, etc.).

[0060] The mapping function unit 403 executes the following steps: step S105 for constructing a mathematical programming model, step S106 for determining an objective function, step S108 for determining the weight of the objective function, step S109 for adding up all the objective functions, and step S110 for performing mathematical optimization according to the added up objective function. However, in this embodiment, since there is only one objective function, the processes of steps S108 and S109 are not executed.

[0061] The mathematical programming modeling function unit 4031 of the mapping function unit 403 constructs a mixed integer linear programming model using the constraints and decision variables shown in Fig. 13 (step S105 in Fig. 9). The decision variables (binary variables) corresponding to multiple types of nodes, multiple types of switches, and multiple types of transmission paths are shown below.

[0062]

number

[0063] Decision variable X u,v ,Y v is a decision variable corresponding to multiple types of nodes v. Decision variable X u,v is 1 when function u is placed on node v, and is 0 when function u is not placed on node v. The decision variable Y v is 1 when node v is used and is 0 when node v is not used.

[0064] Z s is a decision variable corresponding to multiple types of switches. Decision variable Z sswitches (PCIe switches P or Ethernet switches E ) is used and 0 when switch s is not used.

[0065] P iu,u’,v,v ,P Pu,u’,vorsP,v’orsP’ ,P Eu,u’,vorsE,v’orsE’ is a decision variable corresponding to multiple types of transmission paths. iu,u’,v,v is 1 when a transmission path is established within node v for the connection between functions u and u', and is 0 when a transmission path is not established within node v. The decision variable P Pu,u’,vorsP,v’orsP’ is the connection between functions u and u', and node v or PCIe switch s P and node v's or PCIe switches P The decision variable P Eu,u’,vorsE,v’orsE’ is the node v or Ethernet switch s for the connection between functions u and u'. E and node v' or Ethernet switch s E The value is 1 when an Ethernet transmission path is established between ' and ', and 0 when an Ethernet transmission path is not established.

[0066] As described above, by expressing switches and nodes (devices) as separate decision variables and dividing transmission paths by their types using a mixed integer linear programming model, it is possible to perform mapping for a system that includes multiple types of devices, multiple types of switches, and multiple types of transmission paths. The decision variable P iu,u’,v,v ,P Pu,u’,vorsP,v’orsP’ ,P Eu,u’,vorsE,v’orsE’ is set taking into consideration the inside of the node, PCIe, and Ethernet, but decision variables for other transmission paths may be added. By defining decision variables in this way, it becomes easier to set constraints for each type of node and each type of switch.

[0067] The constraints are broadly divided into three types: placement constraints, connection constraints, and chain constraints. Five placement constraints, C-1 to C-5, are set as shown in Figure 13. Constraints C-1 to C-5 ensure that each function is placed on one node, taking into consideration the maximum processing speed and capacity of the device, the number of functions that can be placed, and the type of function.

[0068] C-1 is also considered in conventional technology, but it is a constraint with different decision variables and nodes than conventional technology. C-2, C-3, and C-4 are constraints that redefine conventional technology. C-2 and C-3 are constraints that not only limit the number of functions but also take into account differences in capacity depending on the type of function. C-4 is a constraint that can limit the functions that can be placed on a specific device, taking into account devices such as FPGAs and GPUs that are not considered in conventional technology. C-5 is a constraint that limits the upper limit of the processing speed of a node (device), which is not considered at all in conventional technology. Note that C-5 assumes data processing within an application and describes the node processing speed in data block units. Equation (3) shows the constraint condition formula for C-5.

[0069]

number

[0070] As mentioned above, V efunction (u) is the speed at which function u processes a data block, and X u,v is the decision variable for node v, V maxnode (v) is the maximum processing speed that node v can tolerate. Note that in this embodiment, since only one type of node is handled, the constraint C-4 is not necessary and is therefore not provided.

[0071] As connection constraints, six constraints D-1 to D-6 shown in Figure 13 are set. Constraints D-1 to D-6 make it possible to ensure the data flow rate and data consistency while taking into account the characteristics of the switches and transmission paths. D-1 to D-4 are constraints that redefine conventional technology. D-1 is also taken into account in conventional technology, but the decision variables, nodes, and switches are different from those in the past. Furthermore, since conventional technology does not take into account data processing within the application, it is a newly redefined constraint. Equations (4) and (5) show the constraint formula for D-3.

[0072]

number

[0073] Since the bandwidth for processing data blocks in application processing must be taken into account, D in Equation (4) and Equation (5) infunction (u')*T h (c') converts the data amount in data block units into bit units. This allows for cases where the data amount between nodes in the same chain is uneven. Also, unlike conventional methods, since there are multiple types of edges, constraints must be set for each edge, as in equations (4) and (5).

[0074] D-5 and D-6 are constraints that are not taken into account at all in conventional technology. D-5 is a constraint that limits the number of devices that can be connected to a switch to a number that does not exceed the number of physical ports on the switch. D-6 is a constraint specific to switches, and when a PCIe switch is accessed by many nodes, data waits occur, which can cause buffer overflows in each node, so this constraint is used to prevent overflow.

[0075] Constraints other than D-1 to D-6 may be set using the above decision variables. Also, in this embodiment, only two types of edges and switches are considered, but it is possible to add three or more types of edges and switches.

[0076] Finally, three constraints E-1 to E-3 shown in Figure 13 are set as chain constraints. Constraints E-1 to E-3 make it possible to map functions while satisfying service requirements. E-1, E-2, and E-3 are all constraints that have not been taken into account in conventional technology. E-1 is a constraint that satisfies the required latency of the chain, which is described in the service information. Here, latency is the average processing time of the chain (the sum of the device processing time and transmission delay).

[0077] E-2 is a constraint that satisfies the jitter width of the chain request described in the service information. Jitter is the processing time difference between sub-chains for one data block. E-3 is a constraint that allows the transmission path to be specified for each chain. For example, E-3 can be used to express the case where a certain chain can only use an Ethernet route. Note that in this embodiment, the E-3 constraint is not set.

[0078] In addition to the constraints C-1 to C-5, D-1 to D-6, and E-1 to E-3, it is also possible to add original constraints using the above decision variables, or to remove some of the constraints. In this embodiment, unnecessary constraints are deleted from Figure 13, and the constraints shown in Figure 14 are used.

[0079] The objective function selection function unit 4032 determines a desired objective function based on the service information (step S106 in FIG. 9). In this embodiment, one or more objective functions are selected from a plurality of objective functions for one type of chain. The objective function of the chain is O in FIG. b As specified in (c), O b (c) can be selected. The objective function can be power consumption, network bandwidth, device utilization, latency, etc. For example, Ob When (c)=1, power is the objective function, and O b When (c)=2, latency is the objective function. b It is also possible to define two objective functions for one chain by setting (c)=(1,2).

[0080] In this embodiment, the objective function is power. Specifically, the node power W node total and function power W function total and PCIe switch dynamic power Wd PCIe total and the dynamic power Wd of the Ethernet switch Ethernet total and PCIe switch static power Ws PCIe total and the static power of the Ethernet switch Ws Ethernet total The sum of these is the objective function Object.

[0081]

number

[0082] In this embodiment, the decision variables are described separately for switches and nodes, so the power of each can be easily expressed separately. In this embodiment, since there is only one objective function, power, the result of the judgment in step S107 in Figure 9 is No, so steps S108 and S109 are not performed.

[0083] The mathematical optimization unit 4033 finds, as a solution to the optimization problem, values ​​of decision variables that minimize or maximize the objective function under the specified constraint conditions (step S110 in FIG. 9). In this embodiment, since the objective function is power, an optimal solution that minimizes the objective function is found. As a mathematical optimization method, paid software such as Gurobi (registered trademark) or CPLEX (registered trademark) may be used, or a free solver such as SCIP may be used, or a heuristic method may be used.

[0084] There are cases where the constraints on the throughput, latency, and jitter of the request are strict and an optimal solution cannot be found. If an optimal solution cannot be found (No in step S111 in FIG. 9), the input parameter change function unit 405 of the function chain configuration unit 40 corrects the throughput, latency, and jitter of the request included in the service information (step S4 in FIG. 9).

[0085] Specifically, the input parameter modification function unit 405 decreases the throughput of the request by a predetermined throughput modification amount, increases the latency of the request by a predetermined latency modification amount, and increases the jitter of the request by a predetermined jitter modification amount. Note that desired parameters may be modified in response to a user instruction.

[0086] In this way, the processes of steps S101 to S107, S110, S111, and S4 are repeated until an optimal solution is obtained. When the optimal solution is derived, the process of the function chain configuration unit 40 ends. As a calculation result of the process of Figure 9, an optimized objective function and mapping information (values ​​of decision variables for multiple types of nodes, multiple types of switches, and multiple types of transmission paths) are obtained.

[0087] In this embodiment, the topology after mapping can be obtained from mapping information obtained as a result of processing by the function chain configuration unit 40 to minimize power consumption. An example of the topology is shown in Fig. 15. Nodes A12, A13, A15 to A19, and A21 to A23 are connected to each other by a PCIe switch P1.

[0088] Node A12 is equipped with functions F1, F3, and F23. Node A13 is equipped with functions F10 and F18. Node A15 is equipped with functions F15 and F19. Node A16 is equipped with functions F2, F7, and F8. Node A17 is equipped with functions F5, F6, and F21. Node A18 is equipped with functions F12 and F22. Node A19 is equipped with functions F11 and F17. Node A21 is equipped with functions F9 and F13. Node A22 is equipped with functions F0, F4, and F16. Node A23 is equipped with functions F14 and F20.

[0089] F0 to F7 are functions obtained by parallelizing the function FA shown in Figure 12 into eight functions. F8 to F19 are functions obtained by parallelizing the function FB shown in Figure 12 into twelve functions. F20 to F23 are functions obtained by parallelizing the function FC shown in Figure 12 into four functions. Note that the topology shown in Figure 15 is just one example, and there may be multiple topologies that achieve a similar power score.

[0090] As described above, in this embodiment, in a computer system equipped with multiple types of devices, multiple types of switches, and multiple types of transmission paths, function mapping can be performed so as to minimize or maximize the objective function while satisfying service conditions. Also, in this embodiment, when there are multiple services (chains), multiple objective functions can be set for each service (chain).

[0091] Furthermore, in this embodiment, by associating requests with functions in advance, it is no longer necessary to solve the function allocation of requests using a mathematical programming model, and a simple mathematical programming model that maps functions to nodes can be constructed. This makes it possible to construct a mixed integer linear programming model that is simpler to calculate than the MIQCP model, thereby reducing the time required to search for an optimal solution compared to conventional methods.

[0092] [Second Example] Next, a second embodiment of the present invention will be described. In this embodiment, the configuration of the control function unit 4 is the same as in the first embodiment, so the description will be given using the symbols in Figures 2 to 6. In this embodiment, a case will be described in which the start point "in" and the end point "out" of a chain are specified under the same conditions as in the first embodiment.

[0093] This embodiment has the same processing as the first embodiment, but the way in which constraints are set is different. For example, if only Ethernet switch E2 in Fig. 7 is the start point (in) and end point (out) of the chain, then by placing function Fin, which signifies the start point of the chain, and function Fout, which signifies the end point of the chain, as shown in Fig. 16, and setting a constraint by constraint C-4 that functions Fin and Fout can only be installed in specific locations, it becomes possible to specify the locations of the start point (in) and end point (out). Equation (7) shows the constraint equation for C-4 in this embodiment.

[0094]

number

[0095] In this embodiment, for example, a function that means the start point in or the end point out of a chain is K ifunction (u) = 100, and the node indicating the starting point in or the ending point out is K inode (v)=100 and other functions are K ifunction (u)=1, other nodes are K inode By setting (v)=1, it is possible to specify the start point (in) and end point (out).

[0096] In this embodiment, the constraints shown in Fig. 17 are used. In this embodiment, Fig. 18 shows an example of a topology after mapping obtained as a result of the function chain configuration unit 40 performing processing to minimize power consumption. Nodes A12, A13, A15, A17 to A19, and A21 to A23 are interconnected by a PCIe switch P1. Nodes A12, A15, A17, A18, A22, and A23 are also interconnected by an Ethernet switch E1. Furthermore, Ethernet switch E2, which serves as the start point (in) and end point (out) of the chain, is connected to Ethernet switch E1.

[0097] Node A12 is equipped with functions F5, F7, and F24. Node A13 is equipped with functions F14 and F16. Node A15 is equipped with functions F2 and F10. Node A17 is equipped with functions F1, F6, and F21. Node A18 is equipped with functions F12 and F22. Node A19 is equipped with functions F13 and F19. Node A21 is equipped with functions F9 and F11. Node A22 is equipped with functions F4 and F17. Node A23 is equipped with functions F15 and F23.

[0098] F1 to F8 are functions obtained by parallelizing the function FA shown in Fig. 16 into eight functions. F9 to F20 are functions obtained by parallelizing the function FB shown in Fig. 16 into twelve functions. F21 to F24 are functions obtained by parallelizing the function FC shown in Fig. 16 into four functions.

[0099] As described above, in this embodiment, in a computer system equipped with multiple types of nodes, multiple types of switches, and multiple types of transmission paths, the positions of the start point in and the end point out of the chain can be set, and functions can be mapped to minimize or maximize the objective function.

[0100] [Third Example] Next, a third embodiment of the present invention will be described. In this embodiment, the configuration of the control function unit 4 is the same as in the first embodiment, so the reference numerals in FIGS. 2 to 6 will be used for the description. An example of the topology of the computer system of this embodiment is shown in FIG. 19. In the example of FIG. 19, there are three different types of node groups 1001-1 to 1001-3. Nodes A0, A3, A6, A9, A12, A15, A18, and A21 belong to node group 1001-1, nodes A1, A4, A7, A10, A13, A16, A19, and A22 belong to node group 1001-2, and nodes A2, A5, A8, A11, A14, A17, A20, and A23 belong to node group 1001-3.

[0101] This embodiment describes the method for mapping one type of chain under the conditions shown in Figure 8 on the topology of a computer system equipped with multiple types (three types) of nodes, two types of switches (PCIe switch, Ethernet switch), and multiple types of transmission paths shown in Figure 19.

[0102] It is assumed that functions FA (F0 to F7) can only be placed on nodes 1001-1 (A0, A3, A6, A9, A12, A15, A18, A21), functions FB (F8 to F19) can only be placed on nodes 1001-2 (A1, A4, A7, A10, A13, A16, A19, A22), and functions FC (F20 to F23) can only be placed on nodes 1001-3 (A2, A5, A8, A11, A14, A17, A20, A23).

[0103] The difference between each node (device) is shown in Figure 10. inode It can be expressed using the parameters of (v). K inode (v) allows us to express the differences in performance and power scores for each node (device).

[0104] This embodiment is the same as the first embodiment in terms of processing, but the way in which constraints are set is different. As in the second embodiment, the type of node can be distinguished by showing the relationship between each function and node using constraint C-4. For example, functions FA, FB, and FC are respectively ifunction (u)=1, K ifunction (u)=2, K ifunction (u)=3, and nodes 1001-1, 1001-2, and 1001-3 are K inode (v)=1, K inode (v)=2, K inode By setting (v)=3, it is possible to distinguish between three types of nodes and place functions. That is, as mentioned above, functions FA (F0 to F7) can be placed only in node 1001-1, functions FB (F8 to F19) can be placed only in node 1001-2, and functions FC (F20 to F23) can be placed only in node 1001-3. As an exception, functions FA can be placed only in K ifunction If (u)=[1,2], then K inode (v)=1 and K inode It becomes possible to place the function FA on both nodes with (v)=2.

[0105] In this embodiment, the constraint E-3 restricts the chain to use only Ethernet transmission paths. That is, in this embodiment, the constraint shown in FIG.

[0106] 20 shows an example of a topology after mapping obtained as a result of the function chain configuration unit 40 performing processing to minimize power consumption in this embodiment. Nodes A0, A5, A7, and A10 are interconnected by Ethernet switch E0, and nodes A13, A16, A17 to A19, A21, and A22 are interconnected by Ethernet switch E1. Ethernet switches E0 and E1 are interconnected by Ethernet switch E2.

[0107] Node A0 is equipped with functions F0 and F4. Node A5 is equipped with functions F20 and F22. Node A7 is equipped with functions F8 and F16. Node A10 is equipped with functions F12 and F18. Node A13 is equipped with functions F10 and F19. Node A16 is equipped with functions F13 and F17. Node A17 is equipped with functions F21 and F23. Node A18 is equipped with functions F1 to F3. Node A19 is equipped with functions F14 and F15. Node A21 is equipped with functions F5 to F7. Node A22 is equipped with functions F9 and F11.

[0108] F0 to F7 are functions obtained by parallelizing the function FA shown in Figure 8 into eight functions. F8 to F19 are functions obtained by parallelizing the function FB shown in Figure 8 into 12 functions. F20 to F23 are functions obtained by parallelizing the function FC shown in Figure 8 into four functions.

[0109] As described above, in this embodiment, in a computer system equipped with multiple types of nodes, multiple types of switches, and multiple types of transmission paths, functions can be mapped to minimize or maximize an objective function while limiting the relationship between the functions and the nodes.

[0110] [Fourth Example] Next, a fourth embodiment of the present invention will be described. In this embodiment, the configuration of the control function unit 4 is the same as in the first embodiment, so the description will be made using the reference numerals in Figures 2 to 6. A method of this embodiment will be described for mapping three types of services (chains) under the conditions shown in Figure 21 on the topology of a computer system equipped with one type of node, two types of switches (PCIe switch, Ethernet switch), and two types of transmission paths shown in Figure 7.

[0111] Chain α in Figure 21 includes three functions FA, FB, and FC, and is connected in the order FA → FB → FC. The processing speeds of functions FA, FB, and FC are 30 fps, 20 fps, and 60 fps, respectively. Chain β includes two functions FD and FE, and is connected in the order FD → FE. The processing speeds of functions FD and FE are 40 fps and 50 fps, respectively. Chain γ includes four functions FF, FG, FH, and FI, and is connected in the order FF → FG → FH → FI. The processing speeds of functions FF, FG, FH, and FI are 30 fps, 40 fps, 20 fps, and 80 fps, respectively.

[0112] Since the processing of this embodiment is generally similar to that of the first embodiment, the processing for a plurality of chains will be explained using the symbols in FIG. First, in step S1 of acquiring input information, the input information acquisition function unit 401 of the function chain configuration unit 40 acquires the device information shown in FIG. 10 and the service information shown in FIG. 11 through the input unit 400 (steps S100 and S101 in FIG. 9).

[0113] Next, in step S2 of establishing a sub-chain, the sub-chain determination function unit 402 of the function chain configuration unit 40 executes step S102 of parallelizing functions based on the service information acquired in step S1, and step S103 of determining a sub-chain. In this embodiment, since there are multiple chains, the processes of steps S102 and S103 are executed for each chain. In this embodiment, the parallelism of functions FA, FB, FC, FD, FE, FF, FG, FH, and FI is 3, 4, 2, 2, 2, 3, 3, 5, and 2.

[0114] Next, in step S3 of performing mapping calculation, the mapping function unit 403 of the function chain configuration unit 40 executes step S105 of constructing a mathematical programming model, step S106 of determining an objective function, step S108 of determining the weights of the objective functions, step S109 of adding up all the objective functions, and step S110 of performing mathematical optimization according to the added up objective function. In step S105, the mathematical programming modeling function unit 4031 of the mapping function unit 403 integrates all the service information and converts it into a mathematical programming model that uses the constraint conditions shown in Fig. 13. It should be noted that chain constraints can be set for each chain.

[0115] The objective function selection function unit 4032 determines a desired objective function based on the service information (step S106 in FIG. 9). In this embodiment, a different objective function can be set for each chain. As described above, the objective function of the chain is O in FIG. b In this embodiment, the objective function for chains α and β is power, and the objective function for chain γ is network bandwidth (Ethernet network bandwidth).

[0116] Since there are multiple objective functions (Yes in step S107 in FIG. 9), the objective function selection function unit 4032 weights the multiple objective functions and determines the objective function to be prioritized (step S108 in FIG. 9). r (c) shows the importance of the objective function of chain c. Therefore, the objective function of each chain and P r By multiplying it with (c), the chain's objective function can be weighted.

[0117] For example, in this embodiment, the importance of the objective function of chain α is P r (α)=2, the importance of the objective function of chain β is P r (β)=1, the importance of the objective function of chain γ is P r Let (γ) = 1. Therefore, the objective function of chain α is more important than the objective functions of other chains β and γ.

[0118] Next, the objective function selection function unit 4032 sums up the objective functions weighted in step S108 to create one objective function (step S109 in FIG. 9). If the objective function (power) of chain α is Wα, the objective function (power) of chain β is Wβ, and the objective function (network bandwidth) of chain γ is NBγ, then the weighted sum is Wα×P r (α)+Wβ×P r (β)+NBγ×P r (γ). In this way, one objective function can be created.

[0119] The mathematical optimization unit 4033 finds, as a solution to the optimization problem, the values ​​of the decision variables that minimize or maximize the objective function created in step S109 under the specified constraint conditions (step S110 in FIG. 9). In this embodiment, a single objective function is created by calculating the weighted sum of the objective functions of multiple chains, so whether the problem is a minimization problem or a maximization problem depends on the importance of the chain's objective function. In the above example, the objective function (power) of chain α has the highest importance, so the mathematical optimization unit 4033 finds an optimal solution that minimizes the objective function created in step S109 based on a determination based on the importance. Note that another method may be used to determine whether the problem is a minimization problem or a maximization problem.

[0120] There are cases where the constraints on the throughput, latency, and jitter of the request are strict and an optimal solution cannot be found. If an optimal solution cannot be found (No in step S111 of FIG. 9), the input parameter modification function unit 405 of the function chain configuration unit 40 corrects the throughput, latency, and jitter of the request included in the service information (step S4 of FIG. 9). Specifically, the input parameter modification function unit 405 reduces the throughput that has the strictest conditions among the three types of chains by a predetermined throughput modification amount, increases the latency that has the strictest conditions among the three types of chains by a predetermined latency modification amount, and increases the jitter that has the strictest conditions among the three types of chains by a predetermined jitter modification amount. Note that desired parameters may be modified in response to a user instruction.

[0121] In this way, the processes of steps S101 to S111 and S4 are repeated until an optimal solution is obtained. When the optimal solution is derived, the process of the function chain configuration section 40 ends.

[0122] 22 shows an example of a topology after mapping obtained as a result of the function chain configuration unit 40 performing processing so as to minimize the objective function created in step S109 in this embodiment. Nodes A12, A13, A16 to A23 are interconnected by a PCIe switch P1. Nodes A12, A15 to A20, A22, and A23 are also interconnected by an Ethernet switch E1.

[0123] Node A12 is equipped with functions F5, F15, and F23. Node A13 is equipped with functions F11 and F13. Node A15 is equipped with functions F7 and F8. Node A16 is equipped with functions F20 and F25. Node A17 is equipped with functions F2, F10, and F16. Node A18 is equipped with functions F0, F14, and F21. Node A19 is equipped with functions F6 and F17. Node A20 is equipped with functions F4, F19, and F22. Node A21 is equipped with functions F9 and F12. Node A22 is equipped with functions F1 and F24. Node A23 is equipped with functions F3 and F18.

[0124] F0 to F2 are functions obtained by parallelizing the function FA shown in FIG. 21. F3 to F6 are functions obtained by parallelizing the function FB. F7 and F8 are functions obtained by parallelizing the function FC. F9 and F10 are functions obtained by parallelizing the functions F and D. F11 and F12 are functions obtained by parallelizing the function FE. F13 to F15 are functions obtained by parallelizing the function FF. F16 to F18 are functions obtained by parallelizing the function FG. F19 to F23 are functions obtained by parallelizing the function FH. F24 and F25 are functions obtained by parallelizing the function FI.

[0125] As described above, in this embodiment, in a computer system equipped with multiple types of nodes, multiple types of switches, and multiple types of transmission paths, an objective function can be provided for each service (chain), and the functions that are components of multiple services (chains) can be mapped so that each objective function is optimized.

[0126] [Fifth Example] Next, a fifth embodiment of the present invention will be described. In this embodiment, the configuration of the control function unit 4 is the same as in the first embodiment, so the description will be made using the symbols in Figures 2 to 6. The method of this embodiment when mapping two types of services (chains) under the conditions shown in Figure 23 will be described.

[0127] Chain α in Figure 23 includes three functions FA, FB, and FC, and is connected in the order FA → FB → FC. The processing speeds of functions FA, FB, and FC are 30 fps, 20 fps, and 60 fps, respectively. Chain δ includes three functions FA, FD, and FB, and is connected in the order FA → FD → FB. The processing speeds of functions FA, FD, and FB are 30 fps, 50 fps, and 20 fps, respectively.

[0128] When the same function is used in multiple chains, it is possible to carry out the same steps as in the fourth embodiment, but in this embodiment, a different method is proposed in which only step S2 in Fig. 9 is changed. By using this embodiment, the degree of parallelism of the function can be reduced. A flowchart of step S2 in this embodiment is shown in Fig. 24.

[0129] The function parallelism determination unit 4021 of the subchain determination function unit 402 in this embodiment calculates the total throughput of the functions based on the service information acquired in step S1 (step S200 in FIG. 24). Specifically, the subchain determination function unit 402 calculates the total processing speed obtained for multiple chains for each function. For example, in this embodiment, functions FA, F, and B are components of two chains α and δ, so a throughput of 225 + 105 = 330 fps is calculated for the two types of chains combined. Function FC is a component of only chain α, so a throughput of 225 fps is calculated. Function FD is a component of only chain δ, so a throughput of 105 fps is calculated.

[0130] Next, the function parallelism determination unit 4021 determines the parallelism of the functions so as to satisfy the desired throughput determined in step S200 (step S201 in FIG. 24). Since a throughput of 330 fps is desired for function FA, the minimum parallelism is 11, which is the smallest integer value greater than or equal to 330 / 30. The minimum parallelism of function FB is 17, which is the smallest integer value greater than or equal to 330 / 20. The minimum parallelism of function FC is 4, which is the smallest integer value greater than or equal to 225 / 60. The minimum parallelism of function FD is 3, which is the smallest integer value greater than or equal to 105 / 50.

[0131] After the parallelism of the functions of all chains has been determined (No in step S202 of FIG. 24), the subchain construction function unit 4022 of the subchain determination function unit 402 determines the subchain by evenly allocating the parallelized functions to the functions that make up the subchain, for example, using a round robin method, based on the parallelism determined by the function parallelism determination unit 4021 (step S203 of FIG. 24).

[0132] 25 shows an application example of this embodiment. F.A1, F.A2, F.A3,..., F.A9, F.A10, F.A11,... are functions obtained by dividing and parallelizing the processing of function FA, F.B1, F.B2, F.B3,..., F.B13, F.B14, F.B15,... are functions obtained by dividing and parallelizing the processing of function FB, F.C1, F.C2, F.C3,... are functions obtained by dividing and parallelizing the processing of function FC, and F.D1, F.D2, F.D3,... are functions obtained by dividing and parallelizing the processing of function FD. Step S3 and onwards are the same as in the fourth embodiment.

[0133] As described above, in this embodiment, the same function can be shared and handled by a plurality of services (chains), so it is expected that the total degree of parallelism of the functions can be reduced. [Industrial Applicability]

[0134] The present invention can be applied to service function chaining technology. [Explanation of symbols]

[0135] 1...Tag addition function unit, 2-1 to 2-6...Data transfer function unit, 3-1 to 3-4...Calculation function unit, 4...Control function unit, 40...Function chain configuration unit, 41...Implementation function unit, 42...Tag generation unit, 43...Routing information registration unit, 400, 4020, 4030...Input unit, 401...Input information acquisition function unit, 402...Subchain determination function unit, 403...Mapping function unit, 404, 4023, 4034...Output unit, 405...Input parameter change function unit, 4021...Function parallelism determination unit, 4022...Subchain construction function unit, 4031...Mathematical programming modeling function unit, 4032...Objective function selection function unit, 4033...Mathematical optimization unit.

Claims

1. a first step of obtaining device information and service information; a second step of determining a subchain, which is a virtual transmission path of the function chain necessary to realize a service desired by the user; a third step of solving a mapping problem of a function installed on a computer system so as to minimize or maximize an objective function based on the device information, the service information, and the sub-chain determined in the second step; a fourth step of changing parameters of a request included in said service information if an optimal solution cannot be found in said third step.

2. 2. The function chain configuration method according to claim 1, The second step includes: a fifth step of determining the degree of parallelism of each function constituting the function chain based on the service information; and a sixth step of determining a combination of sub-chains that can be taken by the parallelized functions based on the degree of parallelism.

3. 2. The function chain configuration method according to claim 1, The second step includes: a fifth step of calculating, when mapping functions that are components of multiple function chains required to realize multiple services, a total throughput required for the multiple function chains for each function based on the service information; a sixth step of determining the degree of parallelism of each function so as to satisfy the total throughput; and a seventh step of determining, for each function chain, a combination of sub-chains that can be formed by the parallelized functions based on the degree of parallelism.

4. 2. The function chain configuration method according to claim 1, The third step includes: constructing a mathematical programming model according to predetermined constraints; a fifth step of determining a desired objective function based on the service information; a sixth step of determining a weight of each objective function when there are a plurality of objective functions; a seventh step of combining the plurality of objective functions based on the weights to create one objective function when there are a plurality of objective functions; and an eighth step of determining, as a solution to the optimization problem, the values ​​of the decision variables that minimize or maximize the objective function obtained in the fifth step or the seventh step under the constraint conditions.

5. 5. The function chain configuration method according to claim 4, the computer system is equipped with one or more types of nodes, one or more types of switches, and one or more types of transmission paths, the decision variables include a decision variable indicating a node where a function is placed, a decision variable indicating a node to be used, a decision variable indicating a switch to be used, and a decision variable indicating whether a heterogeneous transmission path is laid; A function chain configuration method, wherein the constraints include function placement constraints, function connection constraints, and chain constraints based on service information.

6. 6. The function chain configuration method according to claim 5, A function chain configuration method characterized in that the placement constraints include a constraint that a specific function is always assigned to one node, a constraint that limits the number of functions that a node can have, a constraint that multiple functions can be assigned to one node within a specified capacity, a constraint that limits the functions that a node can have, and a constraint that limits the maximum speed of the node.

7. 6. The function chain configuration method according to claim 5, A function chain configuration method characterized in that the connection constraints include a constraint that an edge exists between the node to which the function is mapped and the switch being used, a flow matching constraint, a constraint regarding the bandwidth of the edge, a constraint that the delay between edges is kept within an acceptable range, a constraint regarding the number of ports of the switch, and a constraint that prevents buffer overflow of the PCIe switch.

8. 6. The function chain configuration method according to claim 5, A function chain configuration method characterized in that the chain constraints include a constraint that satisfies the latency of the chain request, a constraint that satisfies the jitter width of the chain request, which is the processing time difference between sub-chains, and a constraint that determines the transmission path.