Video processing method, apparatus, and medium

Abstract

The embodiments of the present disclosure provide a solution for video processing. A video processing method is proposed. The method includes performing a conversion between a current video block of a video and a bitstream of the video based on a first syntax element, where the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element is used for byte alignment of the syntax structure, and a value of the first syntax element is allowed to be equal to 6.

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to video coding techniques, and more particularly to signaling versatile video coding (VVC) range extension general constraint information flags.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority to U.S. Provisional Application No. 63 / 300,013, filed January 16, 2022, the entire contents of which are expressly incorporated herein by reference. [Background technology]

[0003] Video coding standards have evolved primarily through the development of well-known ITU-T and ISO / IEC standards. ITU-T developed H.261 and H.263, ISO / IEC developed MPEG-1 and MPEG-4 Visual, and the two organizations jointly developed H.262 / MPEG-2 Video, H.264 / MPEG-4 Advanced Video Coding (AVC), and H.265 / HEVC standards. Since H.262, video coding standards have been based on a hybrid video coding structure in which temporal prediction and transform coding are utilized. In order to explore future video coding technologies beyond HEVC, the Joint Video Exploration Team (JVET) was established by VCEG and MPEG in 2015. Since then, many new methods have been adopted by JVET and incorporated into a reference software named the Joint Exploration Model (JEM). JVET was later renamed JVET when the VVC project was officially launched. VVC is a new coding standard that aims to reduce bitrate by 50% compared to HEVC.

[0004] The VVC standard and the associated Versatile Supplemental Enhancement Information for Coded Video Bitstreams (VSEI) standard are designed to be used in the widest possible range of applications, including traditional uses such as television broadcast, videoconferencing, or playback from storage media, as well as new advanced uses such as adaptive bitrate streaming, video region extraction, compositing and merging content from multiple coded video bitstreams, multiview video, scalable layer coding, viewport adaptive 360° immersive media, etc. The latest draft amendments to the VVC standard include the specification of range extension profiles, among other aspects. Summary of the Invention

[0005] SUMMARY OF THE DISCLOSURE Embodiments of the present disclosure provide a solution for video processing.

[0006] In a first aspect, a video processing method is proposed, comprising: performing a conversion between a current video block of a video and a bitstream of the video based on a first syntax element, where the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element is used for byte alignment of the syntax structure, and a value of the first syntax element is allowed to be equal to 6.

[0007] Based on the method according to the first aspect of the present disclosure, the value of the first syntax element is allowed to be equal to 6. Compared with the traditional solution in which the value of the first syntax element is equal to 0 or 1, the proposed method can advantageously improve syntax compatibility, thus ensuring a uniform process of video processing and improving coding efficiency.

[0008] In a second aspect, an apparatus for processing video data is proposed, the apparatus comprising a processor and a non-transitory memory with instructions that, when executed by the processor, cause the processor to perform a method according to the first aspect of the present disclosure.

[0009] In a third aspect, a non-transitory computer-readable storage medium is proposed, said non-transitory computer-readable storage medium storing instructions for causing a processor to perform the method according to the first aspect of the present disclosure.

[0010] In a fourth aspect, another non-transitory computer-readable recording medium is proposed, the non-transitory computer-readable recording medium storing a bitstream of a video generated by a method executed by a video processing device, the method including performing a conversion between a current video block of the video and the bitstream based on a first syntax element, where the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element is used for byte alignment of the syntax structure, and the value of the first syntax element is allowed to be equal to 6.

[0011] In a fifth aspect, a method for storing a bitstream of a video is proposed, the method comprising: performing a conversion between a current video block of the video and the bitstream based on a first syntax element; and storing the bitstream in a non-transitory computer-readable recording medium, where the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element is used for byte alignment of the syntax structure, and a value of the first syntax element is allowed to be equal to 6.

[0012] This description is provided to introduce a selection of concepts in a simplified form that are more fully described in the detailed description. This description is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. [Brief description of the drawings]

[0013] The above and other objects, features, and advantages of the embodiments of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: In the exemplary embodiments of the present disclosure, like reference numerals generally refer to like components. [Figure 1] 1 shows a block diagram illustrating an example video coding system in accordance with some embodiments of the present disclosure. [Diagram 2] 1 shows a block diagram illustrating a first exemplary video encoder according to some embodiments of the present disclosure. [Diagram 3] 1 shows a block diagram illustrating an exemplary video decoder, in accordance with some embodiments of the present disclosure. [Figure 4] 1 illustrates a flowchart of a video processing method according to some embodiments of the present disclosure. [Diagram 5] FIG. 1 illustrates a block diagram of a computing device capable of implementing various embodiments of the present disclosure.

[0014] Throughout the drawings, the same or similar reference numbers typically refer to the same or similar elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Next, the principles of the present disclosure will be described with reference to some embodiments. It should be understood that these embodiments are provided for illustrative purposes only, to help those skilled in the art understand and embody the present disclosure, and do not imply any limitations on the scope of the present disclosure. The disclosure described herein can be embodied in various ways other than the methods described below.

[0016] In the following description and claims, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.

[0017] References in this disclosure to "one embodiment," "one embodiment," "exemplary embodiment," and the like indicate that the described embodiment may include a particular feature, structure, or characteristic, but not all embodiments necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in connection with an exemplary embodiment, it is noted that it is within the knowledge of one of ordinary skill in the art to affect such feature, structure, or characteristic in connection with other embodiments, whether or not explicitly described.

[0018] Terms such as "first" and "second" may be used herein to describe various elements, but it should be understood that these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the exemplary embodiments. As used herein, the term "and / or" includes any and all combinations of one or more of the listed terms.

[0019] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly dictates otherwise. It will be further understood that the terms "comprise," "comprising," "having," "having," "containing," and / or "including," as used herein, specify the presence of stated features, elements, and / or components, etc., but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof.

[0020] Example Environment 1 is a block diagram illustrating an example video coding system 100 that may utilize techniques of this disclosure. As shown, video coding system 100 may include a source device 110 and a destination device 120. Source device 110 may also be referred to as a video encoding device, and destination device 120 may also be referred to as a video decoding device. In operation, source device 110 may be configured to generate encoded video data, and destination device 120 may be configured to decode the encoded video data generated by source device 110. Source device 110 may include a video source 112, a video encoder 114, and an input / output (I / O) interface 116.

[0021] Video source 112 may include sources such as video capture devices. Examples of video capture devices include, but are not limited to, an interface that receives video data from a video content provider, a computer graphics system that generates video data, and / or combinations thereof.

[0022] The video data may include one or more pictures. The video encoder 114 encodes the video data from the video source 112 to generate a bitstream. The bitstream may include a series of bits forming a coded representation of the video data. The bitstream may include coded pictures and associated data. A coded picture is a coded representation of a picture. The associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. The I / O interface 116 may include a modulator / demodulator and / or a transmitter. The encoded video data may be transmitted directly to the destination device 120 through the network 130A via the I / O interface 116. The encoded video data may be stored in a storage medium / server 130B for access by the destination device 120.

[0023] Destination device 120 may include an I / O interface 126, a video decoder 124, and a display device 122. I / O interface 126 may include a receiver and / or a modem. I / O interface 126 may obtain encoded video data from source device 110 or storage medium / server 130B. Video decoder 124 may decode the encoded video data. Display device 122 may display the decoded video data to a user. Display device 122 may be integrated with destination device 120 or may be external to destination device 120 configured to interface with an external display device.

[0024] Video encoder 114 and video decoder 124 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard, the Versatile Video Coding (VVC) standard, and other current and / or future standards.

[0025] FIG. 2 is a block diagram illustrating an example of a video encoder 200, which may be an example of the video encoder 114 in the system 100 shown in FIG. 1, according to some embodiments of the disclosure.

[0026] Video encoder 200 may be configured to embody any or all of the techniques of this disclosure. In the example of FIG. 2, video encoder 200 includes multiple functional components. The techniques described in this disclosure may be shared among various components of video encoder 200. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0027] In some embodiments, the video encoder 200 may include a division unit 201, a prediction unit 202, which may include a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205, and an intra prediction unit 206, a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy encoding unit 214.

[0028] In other examples, video encoder 200 may include more, fewer, or different functional components. In one example, prediction unit 202 may include an intra block copy (IBC) unit. The IBC unit may perform prediction in an IBC mode, where at least one reference picture is the picture in which the current video block is located.

[0029] Furthermore, some components, such as the motion estimation unit 204 and the motion compensation unit 205, may be integrated but are depicted separately in the example of FIG. 2 for illustrative purposes.

[0030] The division unit 201 may divide a picture into one or more video blocks. The video encoder 200 and the video decoder 300 may support a variety of video block sizes.

[0031] The mode selection unit 203 may, for example, select one of intra or inter coding modes based on the error result, provide the resulting intra-coded or inter-coded block to the residual generation unit 207 to generate residual block data, and provide the encoded block to the reconstruction unit 212 to reconstruct and use as a reference picture. In some examples, the mode selection unit 203 may select a combined intra- and inter-prediction (CIIP) mode, in which prediction is based on an inter prediction signal and an intra prediction signal. In the case of inter prediction, the mode selection unit 203 may select a resolution of the motion vector of the block (e.g., sub-pixel or integer pixel accuracy).

[0032] To perform inter prediction on the current video block, motion estimation unit 204 may generate motion information for the current video block by comparing one or more reference frames from buffer 213 with the current video block. Motion compensation unit 205 may determine a prediction video block for the current video block based on the motion information and decoded samples of pictures from buffer 213 other than the picture associated with the current video block.

[0033] Motion estimation unit 204 and motion compensation unit 205 may perform different operations on a current video block depending on whether the current video block is in an I slice, a P slice, or a B slice, for example. As used herein, an "I slice" may refer to a portion of a picture composed of macroblocks, all of which are based on macroblocks in the same picture. Additionally, as used herein, in some aspects, a "P slice" and a "B slice" may refer to a portion of a picture composed of macroblocks that are independent of macroblocks in the same picture.

[0034] In some examples, motion estimation unit 204 may perform unidirectional prediction on the current video block, and motion estimation unit 204 may look for reference pictures in list 0 or list 1 for a reference video block of the current video block. Motion estimation unit 204 may then generate a reference index indicating a reference picture in list 0 or list 1 that contains the reference video block, and a motion vector indicating a spatial displacement between the current video block and the reference video block. Motion estimation unit 204 may output the reference index, the prediction direction indicator, and the motion vector as motion information of the current video block. Motion compensation unit 205 may generate a predictive video block for the current video block based on the reference video block indicated by the motion information of the current video block.

[0035] Alternatively, in other examples, motion estimation unit 204 may perform bidirectional prediction on the current video block. Motion estimation unit 204 may look for a reference picture in list 0 for a reference video block of the current video block, and may look for a reference picture in list 1 for another reference video block of the current video block. Motion estimation unit 204 may then generate a reference index indicating the reference picture in list 0 and list 1 that contains the reference video block, and a motion vector indicating a spatial displacement between the reference video block and the current video block. Motion estimation unit 204 may output the reference index and the motion vector of the current video block as motion information of the current video block. Motion compensation unit 205 may generate a predictive video block for the current video block based on the reference video block indicated by the motion information of the current video block.

[0036] In some examples, motion estimation unit 204 may output a full set of motion information for the decoding process of the decoder. Alternatively, in some embodiments, motion estimation unit 204 may signal the motion information of the current video block with reference to motion information of another video block. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.

[0037] In one example, motion estimation unit 204 may indicate, in a syntax structure associated with the current video block, a value that indicates to video decoder 300 that the current video block has the same motion information as another video block.

[0038] In another example, motion estimation unit 204 may identify another video block and a motion vector differential (MVD) in a syntax structure associated with the current video block. The motion vector differential indicates a difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 300 may determine the motion vector of the current video block using the motion vector and the motion vector differential of the indicated video block.

[0039] As discussed above, video encoder 200 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by video encoder 200 include advanced motion vector prediction (AMVP) and merge mode signaling.

[0040] Intra prediction unit 206 may perform intra prediction on the current video block. When intra prediction unit 206 performs intra prediction on the current video block, intra prediction unit 206 may generate predictive data for the current video block based on decoded samples of other video blocks in the same picture. The predictive data for the current video block may include a predicted video block and various syntax elements.

[0041] Residual generation unit 207 may generate residual data for the current video block by subtracting (e.g., as indicated by a minus sign) the prediction video block of the current video block from the current video block. The residual data for the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.

[0042] In other examples, such as in skip mode, residual data for the current video block may not be present, and residual generation unit 207 may not perform the subtraction operation.

[0043] Transform processing unit 208 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video block associated with the current video block.

[0044] After transform processing unit 208 generates the transform coefficient video block associated with the current video block, quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0045] Inverse quantization unit 210 and inverse transform unit 211 may apply inverse quantization and inverse transform, respectively, to the transform coefficient video block to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 212 may add the reconstructed residual video block to corresponding samples from one or more prediction video blocks generated by prediction unit 202 to generate a reconstructed video block associated with the current video block for storage in buffer 213.

[0046] After reconstruction unit 212 reconstructs the video blocks, a loop filtering operation may be performed to reduce video blocking artifacts in the video blocks.

[0047] Entropy encoding unit 214 may receive data from other functional components of video encoder 200. Once entropy encoding unit 214 receives the data, it may perform one or more entropy encoding operations to generate entropy encoded data and output a bitstream including the entropy encoded data.

[0048] FIG. 3 is a block diagram illustrating an example of a video decoder 300, which may be an example of the video decoder 124 in the system 100 shown in FIG. 1, according to some embodiments of the disclosure.

[0049] The video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 3, the video decoder 300 includes multiple functional components. The techniques described in this disclosure may be shared among various components of the video decoder 300. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0050] 3, the video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, an intra prediction unit 303, an inverse quantization unit 304, an inverse transform unit 305, a reconstruction unit 306, and a buffer 307. The video decoder 300 may, in some examples, perform a decoding path that is generally inverse to the encoding path described with respect to the video encoder 200.

[0051] The entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., encoded blocks of video data). The entropy decoding unit 301 may decode the entropy coded video data, from which the motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. The motion compensation unit 302 may determine such information, for example, by performing AMVP and merge mode. AMVP is used and includes derivation of some most likely candidates based on data from neighboring PB and reference pictures. The motion information typically includes horizontal and vertical motion vector displacement values, one or two reference picture indexes, and, in the case of prediction regions in B slices, identification of which reference picture list is associated with each index. As used herein, in some aspects, "merge mode" may refer to deriving motion information from spatially or temporally neighboring blocks.

[0052] The motion compensation unit 302 may generate a motion compensated block, possibly performing interpolation based on an interpolation filter. An identifier of the interpolation filter used with sub-pixel precision may be included in the syntax element.

[0053] Motion compensation unit 302 may calculate interpolated values ​​for sub-integer pixels of a reference block using an interpolation filter used by video encoder 200 during encoding of the video block. Motion compensation unit 302 may determine the interpolation filter used by video encoder 200 according to received syntax information and generate a predictive block using the interpolation filter.

[0054] The motion compensation unit 302 may use at least a portion of the syntactic information to determine the size of blocks used to encode frames and / or slices of the encoded video sequence, partition information describing how each macroblock of a picture of the encoded video sequence is divided, a mode indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter-encoded block, and other information for decoding the encoded video sequence. As used herein, in some aspects, a "slice" may refer to a data structure that can be decoded independently from other slices of the same picture for entropy coding, signal prediction, and residual signal reconstruction. A slice can be either an entire picture or a region of a picture.

[0055] The intra prediction unit 303 may form a prediction block from spatially neighboring blocks, e.g., using an intra prediction mode received in the bitstream. The inverse quantization unit 304 inverse quantizes, or dequantizes, the quantized video block coefficients provided in the bitstream and decoded by the entropy decoding unit 301. The inverse transform unit 305 applies an inverse transform.

[0056] The reconstruction unit 306 may, for example, obtain a decoded block by adding the residual block and a corresponding prediction block generated by the motion compensation unit 302 or the intra prediction unit 303. Optionally, a deblocking filter may be applied to filter the decoded block to remove block artifacts. The decoded video block is then stored in a buffer 307, which provides reference blocks for subsequent motion compensation / intra prediction, and also generates the decoded video for presentation on a display device.

[0057] Some exemplary embodiments of the present disclosure will be described in detail below. Section headings are used herein for ease of understanding, but it should be understood that they do not limit the embodiments disclosed in a section to only that section. Furthermore, although certain embodiments are described with reference to versatile video coding or other specific video codecs, the disclosed techniques are applicable to other video coding techniques. Furthermore, although some embodiments describe video coding steps in detail, it will be understood that a corresponding decoding step that undoes the coding is performed by a decoder. Furthermore, the term video processing encompasses video coding or compression, video decoding or decompression, and video transcoding, which represents video pixels from one compressed format to another compressed format or at a different compressed bit rate. [Table 1] TIFF2025501402000003.tif231169TIFF2025501402000004.tif249162TIFF2025501402000005.tif249167TIFF202 5501402000006.tif247169TIFF2025501402000007.tif244169TIFF2025501402000008.tif247169TIFF20255014020 00009.tif247169TIFF2025501402000010.tif247169TIFF2025501402000011.tif247169TIFF2025501402000012.t if249169TIFF2025501402000013.tif248169TIFF2025501402000014.tif249162TIFF2025501402000015.tif249162 TIFF2025501402000016.tif249169TIFF2025501402000017.tif249169TIFF2025501402000018.tif244169TIFF202 5501402000019.tif249161TIFF2025501402000020.tif249161TIFF2025501402000021.tif249161TIFF20255014020 00022.tif249161TIFF2025501402000023.tif245169TIFF2025501402000024.tif246169TIFF2025501402000025.t if249169TIFF2025501402000026.tif249169TIFF2025501402000027.tif249162TIFF2025501402000028.tif242169

[0058] Further details of the embodiments of the present disclosure will be described below in relation to the signaling of the VVC range extension general constraint information flag. The embodiments of the present disclosure should be considered as examples for explaining the general concept, and should not be interpreted in a narrow sense. Moreover, these embodiments can be applied individually or in combination in any manner.

[0059] As used herein, a position in a bitstream is "byte-aligned" if its position is an integer multiple of 8 bits from the position of the first bit in the bitstream, and a bit, byte, or syntax element is said to be byte-aligned if its occurrence in the bitstream is byte-aligned.

[0060] FIG. 4 illustrates a flowchart of a method 400 of video processing according to some embodiments of the present disclosure. As shown in FIG. 4, at 402, a conversion between a current video block of a video and a bitstream of the video is performed based on a first syntax element. As used herein, the term "block" may represent a coding tree block (CTB), a coding tree unit (CTU), a coding block (CB), a coding unit (CU), a prediction unit (PU), a transform unit (TU), a prediction block (PB), a transform block (TB), a video processing unit including a plurality of samples / pixels, and / or the like. The block may be rectangular or non-rectangular. In some embodiments, the conversion may include encoding the current video block into a bitstream. Additionally or alternatively, the conversion may include decoding the current video block from the bitstream.

[0061] In some embodiments, the first syntax element specifies the number of additional general constraint information (GCI) bits in the syntax structure for general constraint information other than at least one second syntax element. In other words, the first syntax element specifies the difference between the number of additional GCI bits in the syntax structure and the number of the second syntax elements (if present). The at least one second syntax element is used for byte alignment of the syntax structure. For example, if the last position of the syntax structure is not byte aligned, the at least one second syntax element may be included in the syntax structure to make the last position of the syntax structure byte aligned. Furthermore, the value of the first syntax element is allowed to be equal to 6.

[0062] By way of example and not limitation, the first syntax element may be a syntax element gci_num_additional_bits, the second syntax element may be a syntax element gci_alignment_zero_bit, and / or the syntax structure may be a syntax structure general_constraints_info.

[0063] Considering the above, the value of the first syntax element is allowed to be equal to 6. Compared with the traditional solution in which the value of the first syntax element is equal to 0 or 1, the proposed method can advantageously improve the syntax compatibility, thus ensuring a uniform process of video processing and improving coding efficiency.

[0064] In some embodiments, the value of the first syntax element may only be allowed to be equal to 0 or 6. Values ​​greater than 6 for the first syntax element may be reserved, for example, for future use. Moreover, a decoder performing the transformation may allow values ​​of the first syntax element greater than 6 to appear in the syntax. Furthermore, if the value of the first syntax element is greater than 6, values ​​of all third syntax elements for reserved bits may be ignored by the decoder. For example, all of the third syntax elements may not be considered during the decoding process.

[0065] In one example, the third syntax element may be the syntax element gci_reserved_zero_bit. It should be understood that the above syntax elements and syntax structures may be represented as any other suitable string. For example, the third syntax element may also be represented as gci_reserved_bit. The scope of the present disclosure is not limited in this respect. Additionally, the value of the first syntax element shall be outside the range of 1 to 5, inclusive.

[0066] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element (if present). In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 0 or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although in this version of this document the value of gci_num_additional_bits must be equal to 0 or 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits greater than 6 appearing in the syntax and shall ignore the values ​​of all gci_reserved_zero_bit[ i ] syntax elements when gci_num_additional_bits is greater than 6. It should be understood that the above discussion is provided for illustrative purposes only. The scope of the present disclosure is not limited in this respect.

[0067] In some embodiments, if the value of the first syntax element is greater than 5, the syntax structure may include: (1) a third syntax element indicating whether all pictures in one or more output layer sets (OLS) may be recovery point pictures or intra random access point (IRAP) pictures; (2) a fourth syntax element indicating whether extended dynamic range may be used in the scaling and transform process and in the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs; and (3) a Rice parameter used for the syntax structure residual_ts_coding in the current slice for all pictures in one or more OLSs may be indicated in a syntax structure slice_header pointing to a sequence parameter set (SPS). (4) a sixth syntax element indicating whether an alternative Rice parameter derivation may be used for the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs; (5) a seventh syntax element indicating whether the Rice parameter derivation for the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs may be initialized at the start of each transform unit (TU) using statistics accumulated from previous TUs; or (6) an eighth syntax element indicating whether the syntax element sh_reverse_last_sig_coeff_flag may be present in the syntax structure slice_header pointing to the SPS for all pictures in one or more OLSs.

[0068] For example, the third syntax element may be a syntax element gci_all_rap_pictures_constraint_flag, the fourth syntax element may be a syntax element gci_no_extended_precision_processing_constraint_flag, the fifth syntax element may be a syntax element gci_no_ts_residual_coding_rice_constraint_flag, the sixth syntax element may be a syntax element gci_no_rrc_rice_extension_constraint_flag, the seventh syntax element may be a syntax element gci_no_persistent_rice_adaptation_constraint_flag, or the eighth syntax element may be a syntax element gci_no_reverse_last_sig_coeff_constraint_flag. It should be understood that the above syntax elements may be represented as any other suitable string. The scope of the present disclosure is not limited in this respect.

[0069] In some embodiments, if all of the fourth, fifth, sixth, seventh, and eighth syntax elements are absent from the bitstream, the third syntax element is allowed to be included in the bitstream. In some embodiments, if additional GCI bits other than the at least one second syntax element are present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) version 1, the third syntax element may be included in the bitstream. For example, if gci_present_flag is equal to 1, indicating that the bitstream (i.e., OlsInScope) conforms to a profile specified in VVC version 1, then gci_all_rap_pictures_constraint_flag must be present.

[0070] In some embodiments, if additional GCI bits other than the at least one second syntax element are present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) version 2, then all of the third, fourth, fifth, sixth, seventh, and eighth syntax elements may be included in the bitstream. For example, if gci_present_flag is equal to 1 to indicate that a bitstream (i.e., OlsInScope) conforms to a profile specified in VVC version 2, then all six new GCI flags must be present.

[0071] In some embodiments, if additional GCI bits other than the at least one second syntax element may be present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) version 1, then all of the fourth, fifth, sixth, seventh, and eighth syntax elements may be absent from the bitstream. For example, if gci_present_flag is equal to 1 to indicate that a bitstream (i.e., OlsInScope) conforms to a profile specified in VVC version 1, then five of the six new GCI flags other than gci_all_rap_pictures_constraint_flag must not be present.

[0072] In some embodiments, the value of the first syntax element shall be greater than 5. Alternatively, the value of the first syntax element may only be allowed to be equal to 6. In some embodiments, the syntax elements gci_all_rap_pictures_constraint_flag, gci_no_extended_precision_processing_constraint_flag, gci_no_ts_residual_coding_rice_constraint_flag, gci_no_rrc_rice_extension_constraint_flag, gci_no_persistent_rice_adaptation_constraint_flag, and gci_no_reverse_last_sig_coeff_constraint_flag may be included in the syntax structure regardless of the value of the first syntax element.

[0073] In some embodiments, the value of the first syntax element may only be allowed to be equal to 0 or 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element other than 0 or 6 to appear in the syntax. Furthermore, if the value of the first syntax element is other than 0 or 6, any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall be outside the range of 1 to 5, inclusive.

[0074] By way of example and not limitation, the semantics of gci_num_additional_bitsgci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 0 or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. In this version of this document, the value of gci_num_additional_bits is required to be equal to 0 or 6, but decoders conforming to this version of this document shall allow values ​​of gci_num_additional_bits other than 0 or 6 to appear in the syntax and shall ignore values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is other than 0 or 6.

[0075] In some embodiments, the value of the first syntax element is only allowed to be equal to 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element greater than 6 to appear in the syntax. Furthermore, if the value of the first syntax element is greater than 6, then any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element may be greater than 5.

[0076] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although this version of this document requires that the value of gci_num_additional_bits be equal to 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits greater than 6 appearing in the syntax and shall ignore the values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is greater than 6.

[0077] In some embodiments, the value of the first syntax element may only be allowed to be equal to 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element not equal to 6 to appear in the syntax. Additionally, if the value of the first syntax element is not equal to 6, then all third syntax element values ​​for reserved bits may be ignored by the decoder.

[0078] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although this version of this document requires that the value of gci_num_additional_bits be equal to 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits not equal to 6 appearing in the syntax and shall ignore the values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is not equal to 6.

[0079] In some embodiments, the value of the first syntax element is only allowed to be equal to 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element not equal to 6 to appear in the syntax. Additionally, if the value of the first syntax element is other than 0 or 6, the value of a third syntax element for a reserved bit may be ignored by the decoder.

[0080] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although this version of this document requires that the value of gci_num_additional_bits be equal to 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits not equal to 6 appearing in the syntax and shall ignore values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is other than 0 or 6.

[0081] In some embodiments, the value of the first syntax element may only be allowed to be equal to 0, 1, or 6. Values ​​greater than 6 for the first syntax element are reserved. A decoder performing the transformation may allow values ​​of the first syntax element greater than 6 to appear in the syntax. Furthermore, if the value of the first syntax element is greater than 6, then any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall be outside the range of 2 to 5, inclusive.

[0082] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 0, 1, or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although in this version of this document the value of gci_num_additional_bits shall be equal to 0, 1, or 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits greater than 6 appearing in the syntax and shall ignore the values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is greater than 6.

[0083] In some embodiments, the value of the first syntax element is only allowed to be equal to 1 or 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element greater than 6 to appear in the syntax. Furthermore, if the value of the first syntax element is greater than 6, then any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall not be equal to 0 or shall be outside the range of 2 to 5 (inclusive).

[0084] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 1 or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although in this version of this document the value of gci_num_additional_bits shall be equal to 1 or 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits greater than 6 appearing in the syntax and shall ignore the values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is greater than 6.

[0085] In some embodiments, the value of the first syntax element may only be allowed to be equal to 0, 1, or 6. Values ​​greater than 6 for the first syntax element are reserved. A decoder performing the transformation may allow values ​​of the first syntax element other than 0, 1, or 6 to appear in the syntax. Furthermore, if the value of the first syntax element is other than 0, 1, or 6, then any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall be outside the range of 2 to 5, inclusive.

[0086] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 0, 1, or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. In this version of this document, the value of gci_num_additional_bits is required to be equal to 0, 1, or 6, but decoders conforming to this version of this document shall allow values ​​of gci_num_additional_bits other than 0, 1, or 6 to appear in the syntax and shall ignore values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is other than 0, 1, or 6.

[0087] In some embodiments, the value of the first syntax element may only be allowed to be equal to 0 or 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element other than 0 or 6 to appear in the syntax. Furthermore, if the value of the first syntax element is other than 0 or 6, then any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall be outside the range of 1 to 5, inclusive.

[0088] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 0 or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although this version of this document requires that the value of gci_num_additional_bits be equal to 0 or 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits other than 0 or 6 appearing in the syntax and shall ignore values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is other than 0 or 6.

[0089] In some embodiments, the value of the first syntax element is only allowed to be equal to 1 or 6. Values ​​greater than 6 for the first syntax element may be reserved. A decoder performing the transformation may allow values ​​of the first syntax element other than 1 or 6 to appear in the syntax. Furthermore, if the value of the first syntax element is other than 1 or 6, any third syntax element values ​​for reserved bits may be ignored by the decoder. Additionally, the value of the first syntax element shall not be equal to 0 or shall be outside the range of 2 to 5 (inclusive).

[0090] By way of example and not limitation, the semantics of gci_num_additional_bits may be formulated as follows: gci_num_additional_bits specifies the number of additional GCI bits in the General Constraint Information syntax structure other than the gci_alignment_zero_bit syntax element, if present. In bitstreams conforming to this version of this document, the value of gci_num_additional_bits shall be equal to 1 or 6. Values ​​greater than 6 for gci_num_additional_bits are reserved for future use by ITU-T | ISO / IEC. Although in this version of this document the value of gci_num_additional_bits shall be equal to 1 or 6, decoders conforming to this version of this document shall tolerate values ​​of gci_num_additional_bits other than 1 or 6 appearing in the syntax and shall ignore values ​​of all gci_reserved_zero_bit[ i ] syntax elements if gci_num_additional_bits is other than 1 or 6.

[0091] According to an embodiment of the present disclosure, a non-transitory computer-readable recording medium is proposed. A bitstream of a video is stored in the non-transitory computer-readable recording medium. The bitstream may be generated by a method executed by a video processing device. According to the method, a conversion between a current video block of a video and a bitstream is performed based on a first syntax element. The first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element. The at least one second syntax element is used for byte alignment of the syntax structure, and a value of the first syntax element is allowed to be equal to 6.

[0092] According to an embodiment of the present disclosure, a method for storing a bitstream of a video is proposed. In the method, a conversion between a current video block of a video and a bitstream is performed based on a first syntax element. The first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element. The at least one second syntax element is used for byte alignment of the syntax structure, and a value of the first syntax element is allowed to be equal to 6. Furthermore, the bitstream is stored in the non-transitory computer-readable recording medium.

[0093] Implementations of the present disclosure can be described in light of the following clauses, the features of which can be combined in any reasonable manner.

[0094] Clause 1. A video processing method comprising: performing a conversion between a current video block of a video and a bitstream of the video based on a first syntax element, wherein the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element being used for byte alignment of the syntax structure, and the value of the first syntax element being allowed to be equal to 6.

[0095] Clause 2. The method of clause 1, wherein the first syntax element is the syntax element gci_num_additional_bits, the second syntax element is the syntax element gci_alignment_zero_bit, or the syntax structure is the syntax structure general_constraints_info.

[0096] Clause 3. The method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 0 or 6.

[0097] Clause 4. A method according to any one of clauses 1 to 3, wherein values ​​greater than 6 for the first syntax element are reserved.

[0098] Clause 5. A method according to any one of clauses 1 to 4, wherein a decoder performing the conversion allows values ​​of the first syntax element greater than 6 to appear in the syntax, and when the value of the first syntax element is greater than 6, values ​​of all third syntax elements for spare bits are ignored by the decoder.

[0099] Clause 6. The method of clause 5, wherein the third syntax element is a syntax element gci_reserved_zero_bit.

[0100] Clause 7. If the value of the first syntax element is greater than 5, the syntax structure further comprises a third syntax element indicating whether all pictures in one or more output layer sets (OLS) are recovery point pictures or intra random access point (IRAP) pictures; a fourth syntax element indicating whether extended dynamic range is used in the scaling and transform process and in the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLS; a fifth syntax element indicating whether the Rice parameters used in the syntax structure residual_ts_coding in the current slice are indicated in the syntax structure slice_header pointing to a sequence parameter set (SPS) for all pictures in one or more OLS. 10. The method of claim 1, further comprising: a sixth syntax element indicating whether, for all pictures in one or more OLSs, an alternative Rice parameter derivation is used for the binarization of the syntax elements abs_remaining and dec_abs_level; a seventh syntax element indicating whether, for all pictures in one or more OLSs, the Rice parameter derivation for the binarization of the syntax elements abs_remaining and dec_abs_level is initialized at the start of each transform unit (TU) using statistics accumulated from previous TUs; or an eighth syntax element indicating whether, for all pictures in one or more OLSs, the syntax element sh_reverse_last_sig_coeff_flag is present in the syntax structure slice_header pointing to the SPS.

[0101] Clause 8. The method of clause 7, wherein the third syntax element is the syntax element gci_all_rap_pictures_constraint_flag, the fourth syntax element is the syntax element gci_no_extended_precision_processing_constraint_flag, the fifth syntax element is the syntax element gci_no_ts_residual_coding_rice_constraint_flag, the sixth syntax element is the syntax element gci_no_rrc_rice_extension_constraint_flag, the seventh syntax element is the syntax element gci_no_persistent_rice_adaptation_constraint_flag, or the eighth syntax element is the syntax element gci_no_reverse_last_sig_coeff_constraint_flag.

[0102] Clause 9. A method according to any one of clauses 7 to 8, wherein if all of the fourth, fifth, sixth, seventh and eighth syntax elements are absent from the bitstream, the third syntax element is allowed to be included in the bitstream.

[0103] Clause 10. The method of any one of clauses 7 to 9, wherein the third syntax element is included in the bitstream if the additional GCI bits other than the at least one second syntax element are present in the syntax structure indicating that the bitstream conforms to a profile specified in the first version of Versatile Video Coding (VVC).

[0104] Clause 11. The method of any one of clauses 7 to 9, wherein if the additional GCI bits other than the at least one second syntax element are present in the syntax structure indicating that the bitstream conforms to a profile specified in the second version of Versatile Video Coding (VVC), all of the third, fourth, fifth, sixth, seventh, and eighth syntax elements are included in the bitstream.

[0105] Clause 12. The method of any one of clauses 7 to 9, wherein if the additional GCI bits other than the at least one second syntax element are present in the syntax structure indicating that the bitstream conforms to a profile specified in the first version of Versatile Video Coding (VVC), then none of the fourth, fifth, sixth, seventh, and eighth syntax elements are present in the bitstream.

[0106] Clause 13. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is greater than 5.

[0107] Clause 14. The method of any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 6.

[0108] Clause 15. A method according to any one of clauses 1 to 2, wherein the syntax elements gci_all_rap_pictures_constraint_flag, gci_no_extended_precision_processing_constraint_flag, gci_no_ts_residual_coding_rice_constraint_flag, gci_no_rrc_rice_extension_constraint_flag, gci_no_persistent_rice_adaptation_constraint_flag, and gci_no_reverse_last_sig_coeff_constraint_flag are included in the syntax structure regardless of the value of the first syntax element.

[0109] Clause 16. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 0 or 6, values ​​greater than 6 for the first syntax element being reserved, and a decoder performing the conversion allows values ​​of the first syntax element other than 0 or 6 to appear in the syntax, and when the value of the first syntax element is other than 0 or 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0110] Clause 17. The method of clause 16, wherein the value of the first syntax element is outside the range of 1 to 5 (inclusive).

[0111] Clause 18. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 6, values ​​greater than 6 for the first syntax element are reserved, and a decoder performing the conversion allows values ​​of the first syntax element greater than 6 to appear in the syntax, and when the value of the first syntax element is greater than 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0112] Clause 19. The method of clause 18, wherein the value of the first syntax element is greater than 5.

[0113] Clause 20. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 6, values ​​greater than 6 for the first syntax element are reserved, and a decoder performing the conversion allows values ​​of the first syntax element not equal to 6 to appear in the syntax, and if the value of the first syntax element is not equal to 6, all values ​​of a third syntax element for reserved bits are ignored by the decoder.

[0114] Clause 21. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 6, values ​​greater than 6 for the first syntax element are reserved, and a decoder performing the conversion allows values ​​of the first syntax element not equal to 6 to appear in the syntax, and when the value of the first syntax element is other than 0 or 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0115] Clause 22. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 0, 1 or 6, values ​​greater than 6 for the first syntax element are reserved, and a decoder performing the conversion allows values ​​of the first syntax element greater than 6 to appear in the syntax, and when the value of the first syntax element is greater than 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0116] Clause 23. The method of clause 22, wherein the value of the first syntax element is outside the range of 2 to 5 (inclusive).

[0117] Clause 24. A method according to any one of clauses 1 to 8, wherein the value of the first syntax element is outside the range of 1 to 5 (inclusive).

[0118] Clause 25. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 1 or 6, values ​​greater than 6 for the first syntax element are reserved, and a decoder performing the conversion allows values ​​of the first syntax element greater than 6 to appear in the syntax, and when the value of the first syntax element is greater than 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0119] Clause 26. The method of clause 25, wherein the value of the first syntax element is not equal to 0 or is outside the range of 2 to 5 (inclusive).

[0120] Clause 27. A method according to any one of clauses 1 to 2, wherein values ​​of the first syntax element are only allowed to be equal to 0, 1 or 6, values ​​greater than 6 for the first syntax element being reserved, and a decoder performing the conversion allows values ​​of the first syntax element other than 0, 1 or 6 to appear in the syntax, and when the value of the first syntax element is other than 0, 1 or 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0121] Clause 28. The method of clause 27, wherein the value of the first syntax element is outside the range of 2 to 5 (inclusive).

[0122] Clause 29. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 0 or 6, values ​​greater than 6 for the first syntax element being reserved, and a decoder performing the conversion allows values ​​of the first syntax element other than 0 or 6 to appear in the syntax, and when the value of the first syntax element is other than 0 or 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0123] Clause 30. The method of clause 29, wherein the value of the first syntax element is outside the range of 1 to 5 (inclusive).

[0124] Clause 31. A method according to any one of clauses 1 to 2, wherein the value of the first syntax element is only allowed to be equal to 1 or 6, values ​​greater than 6 for the first syntax element being reserved, and a decoder performing the conversion allows values ​​of the first syntax element other than 1 or 6 to appear in the syntax, and when the value of the first syntax element is other than 1 or 6, values ​​of all third syntax elements for reserved bits are ignored by the decoder.

[0125] Clause 32. The method of clause 31, wherein the value of the first syntax element is not equal to 0 or is outside the range of 2 to 5 (inclusive).

[0126] Clause 33. The method of any one of clauses 1 to 32, wherein the converting includes encoding the current video block into the bitstream.

[0127] Clause 34. The method of any one of clauses 1 to 32, wherein the converting includes decoding the current video block from the bitstream.

[0128] Clause 35. An apparatus for processing video data comprising a processor and a non-transitory memory having instructions which, when executed by the processor, cause the processor to perform a method according to any one of clauses 1 to 34.

[0129] Clause 36. A non-transitory computer-readable storage medium storing instructions that cause a processor to perform the method of any one of clauses 1 to 34.

[0130] Clause 37. A non-transitory computer-readable recording medium storing a bitstream of a video generated by a method performed by a video processing device, the method comprising: performing a conversion between a current video block of the video and the bitstream based on a first syntax element, where the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element being used for byte alignment of the syntax structure, and the value of the first syntax element is allowed to be equal to 6.

[0131] Clause 38. A method for storing a bitstream of a video, comprising: performing a conversion between a current video block of the video and the bitstream based on a first syntax element; and storing the bitstream in a non-transitory computer-readable recording medium, wherein the first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element, the at least one second syntax element being used for byte alignment of the syntax structure, and the value of the first syntax element is allowed to be equal to 6.

[0132] Exemplary Devices 5 illustrates a block diagram of a computing device 500 capable of implementing various embodiments of the present disclosure. The computing device 500 may be embodied as or included in the source device 110 (or the video encoder 114 or 200) or the destination device 120 (or the video decoder 124 or 300).

[0133] It will be appreciated that the computing device 500 illustrated in FIG. 5 is for illustrative purposes only and is not intended to suggest any limitation on the functionality and scope of the embodiments of the present disclosure.

[0134] 5, the computing device 500 includes a general purpose computing device 500. The computing device 500 may include at least one or more processors or processing units 510, a memory 520, a storage unit 530, one or more communication units 540, one or more input devices 550, and one or more output devices 560.

[0135] In some embodiments, the computing device 500 may be embodied as any user terminal or server terminal having computing capabilities. The server terminal may be a server provided by a service provider, a large-scale computing device, etc. The user terminal may be any type of mobile, fixed, or portable terminal, including, for example, a mobile phone, a station, a unit, a device, a multimedia computer, a multimedia tablet, an Internet node, a communicator, a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a personal communication system (PCS) device, a personal navigation device, a personal digital assistant (PDA), an audio / video player, a digital camera / camcorder, a positioning device, a television receiver, a radio broadcast receiver, an electronic book device, a gaming device, or any combination thereof (including accessories and peripherals of these devices, or any combination thereof). It is contemplated that the computing device 500 may support any type of interface to a user, such as "wearable" circuitry.

[0136] The processing unit 510 may be a physical or virtual processor and may implement various processes based on programs stored in the memory 520. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to increase the parallel processing capabilities of the computing device 500. The processing unit 510 may also be referred to as a central processing unit (CPU), a microprocessor, a controller, or a microcontroller.

[0137] Computing device 500 typically includes a variety of computer storage media. Such media may be any media accessible by computing device 500, including but not limited to volatile and non-volatile media, or removable and non-removable media. Memory 520 may be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory), or any combination thereof. Storage unit 530 may be any removable or non-removable media, including machine-readable media such as memory, flash memory drives, magnetic disks, or other media that can be used to store information and / or data and that can be accessed by computing device 500.

[0138] The computing device 500 may further include additional removable / non-removable, volatile / non-volatile memory media. Although not shown in FIG. 5, a magnetic disk drive that reads from and writes to a removable non-volatile magnetic disk and an optical disk drive that reads from and writes to a removable non-volatile optical disk may be provided. In such a case, each drive may be connected to a bus (not shown) via one or more data media interfaces.

[0139] The communication unit 540 communicates with further computing devices via a communication medium. Moreover, the functionality of the components in the computing device 500 may be embodied by a single computing cluster or multiple computing machines that can communicate via a communication connection. Thus, the computing device 500 can operate in a networked environment using logical connections with one or more other servers, networked personal computers (PCs), or further general network nodes.

[0140] The input device 550 may be one or more of a variety of input devices such as a mouse, a keyboard, a tracking ball, a voice input device, etc. The output device 560 may be one or more of a variety of output devices such as a display, a loudspeaker, a printer, etc. The communication unit 540 allows the computing device 500 to further communicate with one or more external devices (not shown), such as a storage device and a display device, one or more devices allowing a user to interact with the computing device 500, or any device (such as a network card, a modem, etc.) allowing the computing device 500 to communicate with one or more other computing devices, as needed. Such communication may be performed via an input / output (I / O) interface (not shown).

[0141] In some embodiments, instead of being integrated into a single device, some or all of the components of the computing device 500 may be located in a cloud computing architecture. In a cloud computing architecture, the components may be provided remotely and work together to perform the functions described in this disclosure. In some embodiments, cloud computing provides computing, software, data access, and storage services without the end user needing to be aware of the physical location or configuration of the systems or hardware providing these services. In various embodiments, cloud computing provides services over a wide area network (such as the Internet) using appropriate protocols. For example, a cloud computing provider provides applications over a wide area network that can be accessed through a web browser or other computing components. The software or components of the cloud computing architecture and corresponding data may be stored on a server located in a remote location. Computing resources in a cloud computing environment may be consolidated or distributed at remote data center locations. A cloud computing infrastructure may act as a single access point for users but provide services through a shared data center. Thus, a cloud computing architecture may be used to provide the components and functions described herein from a service provider located in a remote location. Alternatively, they may be provided from a traditional server or installed directly or otherwise on a client device.

[0142] The computing device 500 may be used to implement video encoding / decoding in embodiments of the present disclosure. The memory 520 may include one or more video coding modules 525 having one or more program instructions. These modules are accessible and executable by the processing unit 510 to perform the functions of various embodiments described herein.

[0143] In an example embodiment performing video encoding, input device 550 may receive video data to be encoded as input 570. The video data may be processed, for example, by video coding module 525 to generate an encoded bitstream. The encoded bitstream may be provided as output 580 via output device 560.

[0144] In an example embodiment performing video decoding, input device 550 may receive an encoded bitstream as input 570. The encoded bitstream may be processed, for example, by video coding module 525 to generate decoded video data. The decoded video data may be provided as output 580 via output device 560.

[0145] Although the present disclosure has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application as defined by the appended claims. Such variations are intended to be within the scope of the present application. Accordingly, the foregoing description of the embodiments of the present application is not intended to be limiting.

Claims

1. 1. A video processing method comprising the steps of: performing a conversion between a current video block of a video and a bitstream of the video based on a first syntax element; The first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element; the at least one second syntax element is used for byte alignment of the syntax structure; The value of the first syntax element is allowed to be equal to 6. method.

2. The first syntax element is a syntax element gci_num_additional_bits, the second syntax element is the syntax element gci_alignment_zero_bit, or The syntax structure is the syntax structure general_constraints_info. The method of claim 1.

3. The value of the first syntax element is only allowed to be equal to 0 or 6. The method of claim 1.

4. Values ​​greater than 6 for the first syntax element are reserved. The method of claim 1.

5. a decoder performing the transformation allows values ​​of the first syntax element greater than 6 to appear in the syntax; If the value of the first syntax element is greater than 6, then all third syntax element values ​​for spare bits are ignored by the decoder. The method of claim 1.

6. The third syntax element is a syntax element gci_reserved_zero_bit. The method according to claim 5.

7. If the value of the first syntax element is greater than 5, the syntax structure A third syntax element indicating whether all pictures in one or more output layer sets (OLS) are recovery point pictures or intra random access point (IRAP) pictures; A fourth syntax element indicating whether extended dynamic range is used in the scaling and transformation process and in the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs; A fifth syntax element indicating whether the Rice parameter used for the syntax structure residual_ts_coding in the current slice is indicated in the syntax structure slice_header pointing to a sequence parameter set (SPS) for all pictures in one or more OLSs; a sixth syntax element indicating whether an alternative Rice parameter derivation is used in the binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs; A seventh syntax element indicating whether the Rice parameter derivation for binarization of the syntax elements abs_remaining and dec_abs_level for all pictures in one or more OLSs is initialized at the beginning of each transform unit (TU) using statistics accumulated from previous TUs; or An eighth syntax element indicating whether a syntax element sh_reverse_last_sig_coeff_flag is present in a syntax structure slice_header pointing to the SPS for all pictures in one or more OLSs; [0046] The method of claim 1.

8. The third syntax element is a syntax element gci_all_rap_pictures_constraint_flag, The fourth syntax element is a syntax element gci_no_extended_precision_processing_constraint_flag, The fifth syntax element is a syntax element gci_no_ts_residual_coding_rice_constraint_flag, The sixth syntax element is a syntax element gci_no_rrc_rice_extension_constraint_flag, The seventh syntax element is the syntax element gci_no_persistent_rice_adaptation_constraint_flag, or The eighth syntax element is a syntax element gci_no_reverse_last_sig_coeff_constraint_flag. The method of claim 7.

9. If the fourth, fifth, sixth, seventh, and eighth syntax elements are not present in the bitstream, the third syntax element is allowed to be included in the bitstream. The method of claim 7.

10. If the additional GCI bits other than the at least one second syntax element are present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) first version, the third syntax element is included in the bitstream. The method of claim 7.

11. If the additional GCI bits other than the at least one second syntax element are present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) version 2, then all of the third, fourth, fifth, sixth, seventh, and eighth syntax elements are included in the bitstream. The method of claim 7.

12. If the additional GCI bits other than the at least one second syntax element are present in the syntax structure to indicate that the bitstream conforms to a profile specified in Versatile Video Coding (VVC) version 1, then none of the fourth, fifth, sixth, seventh, and eighth syntax elements are present in the bitstream. The method of claim 7.

13. the value of the first syntax element is greater than 5; The method according to claim 1 or 2.

14. The value of the first syntax element is only allowed to be equal to 6. The method according to claim 1 or 2.

15. the syntax elements gci_all_rap_pictures_constraint_flag, gci_no_extended_precision_processing_constraint_flag, gci_no_ts_residual_coding_rice_constraint_flag, gci_no_rrc_rice_extension_constraint_flag, gci_no_persistent_rice_adaptation_constraint_flag, and gci_no_reverse_last_sig_coeff_constraint_flag are included in the syntax structure regardless of the value of the first syntax element; The method according to claim 1 or 2.

16. the value of the first syntax element is only allowed to be equal to 0 or 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element other than 0 or 6 to appear in the syntax; If the value of the first syntax element is other than 0 or 6, then all values ​​of the third syntax element for spare bits are ignored by the decoder. The method according to claim 1 or 2.

17. the value of the first syntax element is outside the range of 1 to 5, inclusive.

17. The method of claim 16.

18. the value of the first syntax element is only allowed to be equal to 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element greater than 6 to appear in the syntax; If the value of the first syntax element is greater than 6, then all third syntax element values ​​for spare bits are ignored by the decoder. The method according to claim 1 or 2.

19. the value of the first syntax element is greater than 5; 20. The method of claim 18.

20. the value of the first syntax element is only allowed to be equal to 6; a value greater than 6 for the first syntax element is reserved; a decoder that performs the transformation allows values ​​of the first syntax element that are not equal to 6 to appear in the syntax; if the value of the first syntax element is not equal to 6, then all third syntax element values ​​for spare bits are ignored by the decoder. The method according to claim 1 or 2.

21. the value of the first syntax element is only allowed to be equal to 6; a value greater than 6 for the first syntax element is reserved; a decoder that performs the transformation allows values ​​of the first syntax element that are not equal to 6 to appear in the syntax; If the value of the first syntax element is other than 0 or 6, then all values ​​of the third syntax element for spare bits are ignored by the decoder. The method according to claim 1 or 2.

22. the value of the first syntax element is only allowed to be equal to 0, 1, or 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element greater than 6 to appear in the syntax; If the value of the first syntax element is greater than 6, then all third syntax element values ​​for spare bits are ignored by the decoder. The method according to claim 1 or 2.

23. the value of the first syntax element is outside the range of 2 to 5, inclusive.

23. The method of claim 22.

24. the value of the first syntax element is outside the range of 1 to 5, inclusive. The method of claim 1.

25. the value of the first syntax element is only allowed to be equal to 1 or 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element greater than 6 to appear in the syntax; If the value of the first syntax element is greater than 6, then all third syntax element values ​​for spare bits are ignored by the decoder. The method according to claim 1 or 2.

26. the value of the first syntax element is not equal to 0 or is outside the range of 2 to 5, inclusive.

26. The method of claim 25.

27. the value of the first syntax element is only allowed to be equal to 0, 1 or 6; a value greater than 6 for the first syntax element is reserved; a decoder that performs the transformation allows values ​​of the first syntax element other than 0, 1, or 6 to appear in the syntax; If the value of the first syntax element is other than 0, 1, or 6, then all values ​​of the third syntax element for the spare bits are ignored by the decoder. The method according to claim 1 or 2.

28. the value of the first syntax element is outside the range of 2 to 5, inclusive.

28. The method of claim 27.

29. the value of the first syntax element is only allowed to be equal to 0 or 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element other than 0 or 6 to appear in the syntax; If the value of the first syntax element is other than 0 or 6, then all values ​​of the third syntax element for spare bits are ignored by the decoder. The method according to claim 1 or 2.

30. the value of the first syntax element is outside the range of 1 to 5, inclusive.

30. The method of claim 29.

31. the value of the first syntax element is only allowed to be equal to 1 or 6; a value greater than 6 for the first syntax element is reserved; a decoder performing the transformation allows values ​​of the first syntax element other than 1 or 6 to appear in the syntax; If the value of the first syntax element is other than 1 or 6, then all values ​​of the third syntax element for spare bits are ignored by the decoder. The method according to claim 1 or 2.

32. the value of the first syntax element is not equal to 0 or is outside the range of 2 to 5, inclusive.

32. The method of claim 31 .

33. the converting includes encoding the current video block into the bitstream. The method of claim 1.

34. the converting includes decoding the current video block from the bitstream. The method of claim 1.

35. 1. An apparatus for processing video data, comprising a processor and a non-transitory memory with instructions, comprising: The instructions, when executed by the processor, cause the processor to perform the method of claim 1 .

36. A non-transitory computer readable storage medium storing instructions that cause a processor to perform the method of claim 1.

37. 1. A non-transitory computer-readable recording medium storing a bitstream of video generated by a method executed by a video processing device, the method comprising: performing a conversion between a current video block of the video and the bitstream based on a first syntax element; The first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element; the at least one second syntax element is used for byte alignment of the syntax structure; The value of the first syntax element is allowed to be equal to 6. A non-transitory computer-readable recording medium.

38. 1. A method for storing a video bitstream, comprising: performing a conversion between a current video block of the video and the bitstream based on a first syntax element; storing the bitstream on a non-transitory computer-readable recording medium; The first syntax element specifies a number of additional general constraint information (GCI) bits in a syntax structure for general constraint information other than at least one second syntax element; the at least one second syntax element is used for byte alignment of the syntax structure; The value of the first syntax element is allowed to be equal to 6. method.

Images