Side-Channel Resistant Memory Operations

Abstract

In some embodiments, the method includes accessing a buffer including one or more sets of bits, generating a random sequence of values, generating a sequence of indexes from the random sequence of values ​​that represents an order for accessing a plurality of particular sets of bits of the buffer, in response to determining that an index of the sequence of indexes corresponds to a location in the buffer, accessing a set of the plurality of particular sets of bits of the buffer at an index in the order of the sequence of indexes, and performing one or more memory operations on the set of the one or more sets of bits after accessing the set.

Description

[Technical field]

[0001] This specification generally relates to memory operations that achieve similar goals as memcpy, memcmp, and memset, for example, that are resistant to fault and power attacks, and that are generally platform independent. [Background technology]

[0002] Compilers and C programmers alike use three basic memory operations: memcpy (to move bytes), memset (usually to clear memory), and memcmp (mainly to compare memory regions and evaluate whether they are equal). However, the implementations of these operations (provided by most compilers) may be vulnerable to power analysis, among other methods of hacking or tampering. In general, power analysis may involve techniques that look at the power consumption of a device as it performs operations or calculations, such as cryptographic algorithms, among others. These executions require a certain amount of computational power to perform, which may lead to unique power consumption patterns. By measuring the power consumption of a device as it performs an execution, an attacker can infer information involved in the execution (e.g., a secret key in the case of a cryptographic algorithm). The attacker can use the information to break encryption or access protected data. A similar analysis can be performed by monitoring the time of computing based on inputs provided to the device. Timing or power may be leaked to inform the attacker of the underlying information.

[0003] For example, memcpy and memcmp operate on memory at the byte level in order, making them susceptible to Hamming Weight (HW) model power attacks. The memcmp function can leak the size of the largest prefix shared by two buffers. The memset function does not generally leak much data, but because it writes long strings of zeros, the memset function can have a readily perceptible power signature that an attacker can use as a timing source.

[0004] Although memcmp leaks are a well-known problem that cryptographic codes attempt to address for some time, they may still leak memory information and, as explained, may still be vulnerable to power analysis among other attack methods known in the art. Various solutions exist, but they generally rely on assumptions about the behavior of the hardware and how a particular compiler works. There are generally no mitigations designed to be platform independent, i.e., reusable across platforms. Existing solutions also often make use of volatile memory operations, a significant optimization barrier, much more powerful and potentially less efficient than may actually be needed. Summary of the Invention

[0005] One innovative aspect of the subject matter described herein is embodied in a method that includes accessing a buffer including one or more bit sets; generating a random sequence of values; generating a sequence of indexes from the random sequence of values, the sequence of indexes representing an order for accessing the plurality of particular bit sets of the buffer; in response to determining that an index of the sequence of indexes corresponds to a location in the buffer, accessing a set of the plurality of particular bit sets of the buffer at an index of the order of the sequence of indexes; and performing one or more memory operations on the set of the one or more bit sets after accessing the set.

[0006] Other embodiments of this and other aspects include corresponding systems, apparatus, and computer programs encoded on a computer storage device and configured to perform the actions of the method. One such embodiment is a non-transitory computer-readable medium storing one or more instructions executable by a computer system for performing the actions of the method. A further such embodiment is embodied in a system including one or more processors and a machine-readable medium interoperably coupled to the one or more processors and storing one or more instructions that, when executed by the one or more processors, perform the actions of the method. The one or more computer systems may be so configured by software, firmware, hardware, or a combination thereof installed on the system that, during operation, causes the system to perform the actions. The one or more computer programs may be so configured by having instructions that, when executed by a data processing device, cause the device to perform the actions.

[0007] Each of these and other embodiments can include one or more of the following features, either alone or in combination. For example, in some implementations, generating a random sequence of values ​​includes obtaining a value from entropy delivery hardware and generating the values ​​from a number generator using the value from the entropy delivery hardware as a starting key.

[0008] In some implementations, the action includes providing one or more requirements to a number generator, the one or more requirements including one or more values ​​that represent a portion of the buffer.

[0009] In some implementations, generating a sequence of indexes from the random sequence of values ​​that represents an order for accessing a plurality of particular sets of one or more bits of the buffer includes adding a value of the random sequence of values ​​to a memory offset value that corresponds to a starting memory location of the buffer.

[0010] In some embodiments, performing the one or more memory operations includes copying bits to or from a buffer. In some embodiments, performing the one or more memory operations includes resetting bits in the buffer to random bits or to zero bits. In some embodiments, performing the one or more memory operations includes comparing bits of the buffer to bits of a second buffer.

[0011] In some implementations, the actions include accessing a second buffer containing one or more bits set and accessing a second set of bits in the second buffer in order of the sequence of the multiple indexes.

[0012] In some implementations, accessing a set of the plurality of particular sets of bits of the buffer at an index in an order of the sequence of the plurality of indexes includes accessing a portion of the buffer corresponding to the index, the portion including the set of the plurality of particular sets of bits.

[0013] In some implementations, determining that an index in the sequence of indexes corresponds to a location in the buffer includes determining that the index in the sequence of indexes corresponds to a set of a plurality of particular bit sets of the buffer.

[0014] In some implementations, the action includes determining that a second index in the sequence of the plurality of indexes does not correspond to one or more bits of the buffer, and accessing the one or more bits and performing a decoy operation on the one or more bits based on determining that the second index in the sequence of the plurality of indexes does not correspond to one or more bits of the buffer.

[0015] Advantageous implementations may include one or more of the following features: The described techniques may allow memory operations to occur on a processing device without leaking enough information for a hacker or other user to obtain sensitive information. The described techniques may ensure that a given input data is processed out of order with respect to input bits when the same input data is processed multiple times (e.g., to thwart power analysis as described herein), thereby generating different power traces. The described techniques may include a random number engine that generates an index for a set of bits to process. The random number engine may generate sufficient indices such that all bits of the input data are processed, but some of the input data may be processed multiple times, and some data not included in the input data, such as decoy data, may be processed due to an index generated by the random number engine that is not included in the input data. This form of obfuscation may effectively thwart hacking attacks while maintaining processing efficiency (e.g., unlike more intensive security measures involving volatile memory operations).

[0016] The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features and advantages will become apparent from the description, the drawings, and the claims. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 illustrates an example of a hacking device accessing confidential data being processed on a processing device using unprotected memory operations. [Diagram 2] FIG. 1 illustrates an example of a system for durable memory operations. [Figure 3A] 1 is a flow diagram illustrating an example of a process for durable memory operations. [Figure 3B] 1 is a flow diagram of an example process for a durable memory operation that copies data. [Figure 4] 1 is a flow diagram illustrating an example of a computing system used for durable memory operations. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Like reference symbols and designations in the various drawings refer to like elements. First, a problem with existing memory operations is illustrated in Figure 1. Next, techniques that have been proposed to, among other things, mitigate this problem are illustrated and described with reference to Figures 2-4. In general, conventional implementations of computer memory operations (memcpy, memset, or memcmp), as shown in Figure 1, can potentially reveal information that a hacker can interpret to reconstruct secret or other sensitive data being processed. The techniques described with reference to Figures 2-4 help to mitigate this information leakage.

[0019] 1 illustrates an example of a hacking device 114 accessing covert data 106 being processed by a processing device 102 using unsecured memory operations. The processing device 102 may include one or more processors configured to perform the operations of an unsecured processing engine 104. The unsecured processing engine 104 may execute processes for unsecured memory operations such as conventional implementations of memcpy, memset, or memcmp.

[0020] A processing sensor 110 communicatively connected to a hacking device 114 senses operation of the processing device 102 through, among other things, for example, electromagnetic radiation, magnetic fields, power drawn by the processing device 102, etc. The processing sensor 110 generates sensor data 112 that may include, among other things, data representative of the amount of electromagnetic radiation emitted over time from the processing device 102 as it processes covert data 106, which may be secret as a cryptographic key or may be highly sensitive personal data.

[0021] The hacking device 114 obtains sensor data 112 generated by the processing sensor 110 and provides the sensor data 112 to a hacking engine 116. The hacking engine 116 can include one or more hardware processors programmed with computer-readable instructions to receive the sensor data 112 and process the sensor data 112 to generate covert information. The hacking device 114 can monitor the processing device 102 over a period of time and collect sensor data for multiple processing runs of the processing device 102. The hacking engine 116 of the hacking device 114 can generate covert data 118 represented as bit values ​​120. This covert data can be the same as or a sufficiently similar copy of the covert data 106. In some implementations, the multiple processing runs are used to determine how different inputs affect a given power or timing analysis that can be used to generate a copy or a sufficiently similar copy of the covert data 106 (e.g., by a trained machine learning model). Over time, the hacking engine 116 will be able to generate covert data 118 that is an exact copy of the covert data 106, thereby revealing sensitive information or revealing cryptographic keys and thus voiding the resulting cryptographic security.

[0022] Figure 1 illustrates how an unprotected process can leak information that a hacking device can use to determine the secrets being processed. Figures 2-4 illustrate techniques that have been proposed to, among other things, mitigate this problem.

[0023] 2 illustrates an example of a system 200 for resistant memory manipulation. The system 200 includes a manipulation device 202 that modifies data stored in a memory storage 204 to prevent information leakage to a hacking device, such as the hacking device 114 of FIG. 1. The system 200 includes a memory storage 204, such as hardware configured to store bits. The memory storage 204 can include one or more connected devices. The memory storage 204 can be included within the hardware of the manipulation device 202 or in the hardware of a device communicatively connected to the manipulation device 202. Elements such as the memory storage 204 and the manipulation device 202 can exchange information using one or more wired or wireless connections.

[0024] The manipulation device 202 operates a splitting engine 210, a random number engine 214 (also called a number generator or random number generator), and a manipulation engine 220. The splitting engine 210 splits data from a buffer 206 of the memory storage 204. The random number engine 214 generates a sequence of random or pseudo-random numbers 216 (also called a random sequence of multiple values). The manipulation engine 220 operates on the split bits determined by the splitting engine 210 using the random numbers 216 as an index. The manipulations can include copying bits, resetting bits (e.g., to 0 or other values), or comparing bits (e.g., determining whether a sequence of 0s and 1s is equal to another sequence of 0s and 1s).

[0025] In some implementations, the manipulation device 202 accesses one or more other buffers stored in the memory storage 204. For example, the manipulation device 202 can access the buffer 206 to reset, copy, or compare the bit 208 of the buffer 206. In an example of comparing the bit 208 to another bit in another buffer, the manipulation device 202 can access the other buffer. As with the buffer 206, the manipulation device 202 can compare elements of the two or more buffers using multiple indexes generated based on the random number engine 214. For example, when comparing the buffers, the same random number in a sequence generated by the random number engine 214 can be used to obtain bit strings from the two or more buffers being compared. Portions of the buffers can be compared in this manner until all portions of the buffers have been accessed and compared. In some implementations, the manipulation engine 220 uses an XOR operation to determine whether the entire two or more buffers are the same or different based on multiple comparisons of portions of the two or more buffers.

[0026] In some implementations, the random number engine 214 generates an index that represents a location in the buffer 206. For example, the manipulation engine 220 can obtain the random number 216 and use the random number 216 directly to act on a corresponding location in the buffer 206. In some implementations, the random number engine 214 generates an index that represents a value. For example, the manipulation engine 220 can generate an index using a value of the random number 216, such as value 218, to generate a memory location identifier. The value may be an offset value from a given starting location in the memory of the buffer 206.

[0027] In general, the random number engine 214 is configured to generate values ​​that can be used to cover all indexes of a given buffer. The random number engine 214 is configured to generate values ​​outside the length corresponding to a given buffer. For example, the buffer 206 may contain 16000 bits, which corresponds to 500 sets of 32 bits. The sets of 32 bits may be referenced using index values ​​such as 0-499 or 1-500, among others. The random number engine 214 may generate values ​​between a minimum index and a maximum index (e.g., 0-499), as well as values ​​outside these bounds. The out-of-bounds values ​​may be used to obfuscate any would-be hacking system by adding random processing noise to the processing of the manipulation device 202. Values ​​corresponding to out-of-bounds indexes of a given buffer may initiate a decoy process by the manipulation device 202 that would be detected in a power or timing analysis by a hacker, increasing the error in any subsequent hacker prediction of the secret information. Similarly, a given buffer may be processed once all processes have been processed, but the order is not necessarily predetermined and may change in subsequent processing rounds of the same buffer or the same input data. In this manner, the power or timing profile of the manipulation device 202 as sensed by a hacking device (e.g., hacking device 114) may vary even for the same input, thereby further obfuscating and hindering would-be hacking systems from attempting to obtain sensitive information.

[0028] The following describes an exemplary case of copying, resetting, and comparing bits using the system 200 shown in Figure 2. Further explanations can be found in the included pseudocode.

[0029] Memory Copy Operation In an exemplary copy case, the manipulation device 202 retrieves a buffer 206 including bits 208 from the memory storage 204 and determines one or more portions of the buffer 206. The manipulation device 202 may copy one or more bits of the buffer 206 to another memory location or may copy one or more bits from another memory location to the buffer 206. The partitioning engine 210 may determine one or more sets of bits 212, such as, for example, 212A-212C. The bit sets may include words, such as, for example, 32-bit sets.

[0030] The random number engine 214 generates a sequence of random values ​​216. An exemplary sequence is shown at 218 as "892, 2, 142567, 8853, ..., 116." The manipulation engine 220 takes the values ​​216 and performs a manipulation on a portion of the buffer 206. In this example, the manipulation involves copying bits of the buffer 206 to another location. The other location may be another buffer accessed from the memory storage 204 or another memory storage device connected to the manipulation device 202.

[0031] The manipulation engine 220 determines a first index based on the first value of the values ​​216. The manipulation engine 220 uses the first index to operate on a first portion of the buffer 206. In this example, the first value is 892. The manipulation engine 220 performs an operation (892) 222 on the portion of the buffer 206 that corresponds to the value of 892. This portion may be the 892th index of the buffer 206, or the 892th bit of the buffer 206, or some other value generated based on the value 892. Because the value 892 corresponds to a location in the buffer 206, an actual operation is performed by the manipulation engine 220 and is not a decoy operation.

[0032] The manipulation engine 220 determines a second index. The manipulation engine 220 performs an operation (2) 224 on the portion of the buffer 206 that corresponds to the value of 2. Similar to value 892, the portion that corresponds to value 2 may be the second index of the buffer 206, or the second bit of the buffer 206, or some other value generated based on value 2. Because value 2 corresponds to a location in the buffer 206, an actual operation is performed by the manipulation engine 220, and not a decoy operation.

[0033] Manipulation engine 220 determines a third index. Manipulation engine 220 performs decoy operation (142567) 226 on a portion of buffer 206 that corresponds to the value of 142567. Similar to values ​​892 and 2 above, the portion that corresponds to value 142567 may be the 142567th index of buffer 206, or the 142567th bit of buffer 206, or some other value generated based on the value 142567.

[0034] Unlike values ​​892 and 2, which correspond to locations in buffer 206, value 142567 does not correspond to a location in buffer 206. As a result, manipulation engine 220 performs a decoy operation. In comparison to operations 222 and 224, decoy operation (142567) 226 may be random and may occupy processing power by manipulation device 202 without performing an actual memory copy action (e.g., copying data from a source buffer to a destination buffer). For example, in this scenario, manipulation device 202 may access data outside of buffer 206 and copy existing data to the same location, or access unused memory and shift bits one or more bits in memory, among other possible decoy operations.

[0035] Memory reset operation For the exemplary case of a memory reset, the core elements of accessing a given buffer (e.g., buffer 206) may be the same as those described with respect to a copy operation. Instead of copying from a source to a destination, the manipulation engine 220 may use a value generated by the random number engine 214 to determine and reset one or more portions of the buffer 206 to zero or other randomized values. A similar index may be generated for a particular portion of the buffer 206. The manipulation engine 220 may access a portion of the buffer using an index generated from the random value 216 generated by the random number engine 214.

[0036] In the case of an operation within a buffer (e.g., operation 222 or 224), the operation engine 220 may reset the corresponding portion of the buffer to 0 or other randomized value. For example, the operation engine 220 may determine the first index based on the value 892, as described with respect to the copy operation. The operation (892) may include resetting one or more bits at a location in the buffer 206 that corresponds to the value 892 in lieu of a copy operation that includes copying from a source to a destination (where the buffer 206 may be either the source or the destination).

[0037] A similar reset operation can be performed by the manipulation engine 220 for operation 224. For decoy operation 226, the manipulation engine 220 can perform a decoy operation (e.g., resetting a value to the same value or moving bits within an unused memory location by a specified value). In this way, data leakage due to power consumption or execution time by the manipulation device 202 can be reduced for memory reset operations.

[0038] Memory Compare Operations For the exemplary case of comparison, the preliminary steps for a given access of a buffer (e.g., buffer 206) may be similar to the operations for copy and reset. However, the operations performed by the manipulation engine 220 may differ. In some implementations, the manipulation device 202 accesses a second buffer to compare with buffer 206. The partitioning engine 210 may determine one or more bits set for both buffer 206 and another buffer to compare with buffer 206. Although two buffers are described, the same operations may be applied to more than two buffers to compare more than two buffers.

[0039] The random number engine 214 can again generate random values ​​(e.g., value 216) used by the manipulation engine 220. In a comparison operation, the manipulation engine 220 can access values ​​of both the buffer 206 and the buffer being compared to the buffer 206. For example, the manipulation engine 220 can access the portion of the buffer 206 that corresponds to the value 892 from the value 216 and compare it to the number of bits at the location corresponding to the same value 892 in the other buffer being compared. In the case of a value that does not match the value in the buffer 206 or the buffer being compared, the manipulation engine 220 can generate a result that is equivalent to a comparison matching result. In some implementations, the XOR method is used by the manipulation engine 220 to determine whether one or more portions of two or more buffers are the same. The result of a comparison operation based on a value generated by the random number engine 214 outside the boundaries of the buffer 206 or the buffer being compared may be 0 in the case of an XOR. The manipulation engine 220 can store all the results of the XOR operations between the portion of the buffer 206 and the portion of one or more buffers being compared. If the OR operation performed by manipulation engine 220 on all stored XOR results is equal to 0, manipulation engine 220 stores, displays, and provides for subsequent manipulation of the result that the two or more buffers are the same. By ensuring that the decoy operation provides an XOR result of 0, system for comparison 200 can ensure that the decoy operation serves its obfuscation purpose without affecting the underlying comparison of the two or more buffers.

[0040] In some implementations, the manipulation engine 220 performs operations on the portions determined using the random number values ​​216 in succession. The operations can include any of the copy, reset, or compare operations described herein. In some implementations, the manipulation engine 220 performs one or more operations in parallel. For example, the manipulation engine 220 can include two or more processors that process one or more buffers corresponding to portions of the values ​​generated by the random number engine 214. In an exemplary case, each of the two processors of the manipulation engine 220 can receive half of the value 216, e.g., from index 0 to the length of the value 216 divided by 2 (i.e., the total number of processors) into the first processor and receive the subsequent value and the corresponding portion to be processed into the subsequent processor.

[0041] 3A is a flow diagram illustrating an example of a process 300A for durable memory operations. Process 300 may be performed by one or more electronic systems, such as, for example, system 200 of FIG. 2. Operations of process 300A are described below for illustrative purposes only. Operations of process 300A may be performed by any suitable device or system, such as, for example, any suitable data processing device. Operations of process 300A may also be implemented as instructions stored on a computer-readable medium, which may be non-transitory. Execution of the instructions causes one or more data processing devices to perform the operations of process 300A.

[0042] The process 300A includes accessing 302A a buffer that includes one or more bits set. For example, as described with reference to FIG. 2, the manipulation device 202 accesses the buffer 206 from a memory storage 204. The memory storage 204 may be communicatively connected to the manipulation device 202 or may be included in the hardware of the manipulation device 202. The manipulation device 202 may read and write values ​​from the buffer 206.

[0043] The process 300A includes generating a random sequence of a plurality of values ​​(304A). For example, as described with reference to FIG. 2, the random number engine 214 generates the value 216. The random number engine 214 can use a pseudo-random number generation algorithm where all values ​​can be expressed as an index of data in the buffer 206 or as an index of data not in the buffer 206. Using a modulo function, a probing method (e.g., linear probing, quadratic probing with a secret key offset, among other probing methods), the random number engine 214 can generate the value 216 that can be used to generate a sequence of a plurality of indexes, where all data in the buffer 206 is manipulated at least once, but possibly multiple times, and the manipulations can include decoy operations that do not act on the data in the buffer 206, but serve to obfuscate power or timing manipulations of the manipulation device 202 to improve security.

[0044] In some implementations, generating a random sequence of a plurality of values ​​includes obtaining a value from an entropy delivery hardware. For example, the process 300A can include obtaining a value from the entropy delivery hardware and generating a value from a number generator using the value from the entropy delivery hardware as a starting key. The entropy delivery hardware can include a specific hardware element configured to obtain one or more input values ​​random number requests and generate random values ​​based on the input values ​​or requests. In some implementations, the entropy delivery hardware generates random values ​​using variances of physical phenomena. For example, variances in fan noise, hard disk drives, mouse clicks or movements, among others, can be used as inputs for the entropy delivery hardware to generate one or more random values ​​(e.g., at least one random value as a starting key to generate a random sequence of a plurality of values). The starting key can be used (e.g., by the random number engine 214) as a starting value for subsequent value probing methods for the random sequence of a plurality of values ​​or other pseudo-random number generation. The pseudo-random generation can be configured to generate a value corresponding to every index in the buffer at least once (eg, using a modulo operator, quadratic calculations, etc., among others).

[0045] In some implementations, the process 300A includes providing one or more requirements to a number generator, where the one or more requirements include one or more values ​​that represent a portion of a buffer. For example, the manipulation device 202 can provide the one or more requirements to the random number engine 214 or the manipulation engine 220. The one or more requirements can include a size of one or more buffers (e.g., buffer 206, among other buffers). The size can be used for one or more modulo operations to determine an index to be used for an operation performed by the manipulation engine 220. For example, the modulo value can be used to constrain the number of indexes generated by the manipulation engine 220 based on the random number generated by the random number engine 214 to an area containing data in the buffer 206, or to an area containing data in the buffer 206 and other portions of the buffer 206 or other buffers, to allow for decoy manipulation of those other portions.

[0046] The process 300A includes generating 306A a sequence of indexes that represent an order for accessing a plurality of particular sets of bits of the buffer. For example, as described with reference to FIG. 2, the manipulation engine 220 can determine one or more indexes using values ​​216 generated by the random number engine 214. The manipulation engine 220 can generate the indexes using values ​​of the values ​​216 as an offset from a predetermined value (e.g., a starting offset within a memory location of the buffer 206), among other index generation algorithms.

[0047] In some implementations, the sequence of multiple indexes may be equal to random values ​​generated by a random number generator. For example, the random number engine 214 can be configured to output a value that can be directly used as an index by the manipulation engine 220 (e.g., by the manipulation device 202). The index can include a location in memory that corresponds to the buffer 206.

[0048] The process 300A includes accessing one of the plurality of particular bit sets of the buffer at one index in the order of the sequence of the plurality of indexes (308A). For example, as described with reference to FIG. 2, each index of the plurality of indexes generated by the manipulation engine 220 may correspond to a particular portion of the buffer 206, or to portions of data not in the buffer 206, or to other values ​​that do not indicate data in the buffer 206. For the indexes that correspond to portions of data in the buffer 206, the manipulation engine 220 may access those portions at times indicated by the order of the indexes generated based on the order of the random values ​​216. For other indexes, the manipulation engine 220 may access data not in the buffer 206 (e.g., unused data adjacent to the buffer 206 or in other memory storage) or may not access data but perform a decoy operation.

[0049] As described, only some indexes may correspond to data in the buffer 206. The manipulation device 202 can determine whether to perform a decoy operation or a real memory operation based on the corresponding index and one or more known values ​​of the index corresponding to the buffer 206 before accessing or performing the operation. The manipulation device 202 can also attempt to access the buffer 206 using the index, and if unsuccessful, can determine that the index does not correspond to data in the buffer 206. Information about which indexes are acceptable can also be determined without attempting to access the buffer 206 at a given index by determining the size of the buffer 206 and the number of bits corresponding to each index (e.g., for a buffer of size 1600 bits containing 50 words where each word has a corresponding index, it can be determined that an index outside 0 to 49 or 1 to 50 (or the corresponding range with the memory location offset applied) does not correspond to data in the buffer 206).

[0050] In some implementations, accessing a set of the plurality of particular bit sets of the buffer at an index in an order of the sequence of the plurality of indexes is performed in response to determining that an index in the sequence of the plurality of indexes corresponds to a location in the buffer. For example, if the manipulation device 202 determines that a given index does not correspond to a location in the buffer 206, the manipulation device 202 can perform a decoy operation as described. If the manipulation device 202 determines that a given index corresponds to a location in the buffer 206, the manipulation device 202 can perform a memory operation (e.g., a copy, a reset, or a compare).

[0051] After accessing the set, the process 300A includes performing one or more memory operations on one of the one or more sets of bits (310A). For example, as described with reference to FIG. 2, the manipulation engine 220 can perform operations 222, 224, and 226, where the operation 226 is a decoy operation based on a corresponding random value that results in an index that does not correspond to the data in the buffer 206. However, to a hacker observing the computations of the manipulation device 202, the decoy operation 226 may appear similar to the operations 222 and 224, thereby partially obfuscating the operation of the manipulation device 202. The operations 222 and 224 may include copying bits to or from the buffer 206, comparing bits in the buffer 206 with bits of one or more other buffers, or resetting one or more bits of the buffer 206. The operations 222 and 224 may include acting on a particular portion of the buffer 206 that corresponds to an index generated based on the random values ​​"892" and "2", respectively. The random value 216 is shown for illustrative purposes and, in general, may be any value.

[0052] In some implementations, the decoy operation may include copying or comparing already copied or compared elements of one or more buffers. For example, for a given index that is not associated with a portion of buffer 206, manipulation engine 220 may perform a decoy operation such as copying or comparing already copied or compared elements of buffer 206 or other buffers (e.g., buffers being compared to buffer 206). For a reset operation, the decoy operation may include resetting already reset portions of buffer 206 or other buffers. Manipulation engine 220 may perform operations such as copying, resetting, or comparing already copied, reset, or compared elements of one or more buffers when a generated index is repeated (e.g., representing the same portion of buffer 206 or other buffer). In general, this may be useful to obfuscate a power profile or timing profile of processing performed by manipulation device 202.

[0053] Below are example code snippets that may be used to implement the techniques described herein.

[0054] These functions can be used to traverse the buffer in a random order to thwart traditional power analysis attacks, among other attacks, and to make the dense behavior of calls to the function appear as if the function's power usage has minimal dependence on the inputs. --- sw / device / lib / base / hardened_memory.c | 178 +++++++++++++++++++++++++++ sw / device / lib / base / hardened_memory.h | 88 +++++++++++++ sw / device / lib / base / meson.build | 12++ 3 files changed, 278 insertions(+) create mode 100644 sw / device / lib / base / hardened_memory.c create mode 100644 sw / device / lib / base / hardened_memory.h diff --git a / sw / device / lib / base / hardened_memory.c b / sw / device / lib / base / hardened_memory.c new file mode 100644 index 000000000..8b44a6893 --- / dev / null +++ b / sw / device / lib / base / hardened_memory.c @@ -0,0 +1,178 @@ +#include "sw / device / lib / base / hardened_memory.h" + +#include "sw / device / lib / base / memory.h" +#include "sw / device / lib / base / random_order.h" + + / / NOTE: The three hardened_mem* functions have similar contents, but the parts that are shared between them are commented only in `memcpy()`. +void hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src, + size_t word_len) { + random_order_t order; + random_order_init(&order, word_len); + + size_t count = 0; + size_t expected_count = random_order_len(&order); + + / / Immediately convert `src` and `dest` to addresses, which erases their provenance and causes their addresses to be exposed (in the provenance sense). + uintptr_t src_addr = (uintptr_t)src; + uintptr_t dest_addr = (uintptr_t)dest; + + / / `decoys` can be a small stack array that is filled with uninitialized memory. It is scratch space for us to do "extra" operations, when the the number of iteration indices the chosen random order is different from `words`. + / / + / / These extra operations also introduce noise that an attacker must do work to filter, such as by applying side-channel analysis to obtain an address trace. + uint32_t decoys[8]; + uintptr_t decoy_addr = (uintptr_t)&decoys; + + / / We can launder `count`, so that the SW.LOOP-COMPLETION check is not deleted by the compiler. + for (; count < expected_count; count = launderw(count)) { + / / The order values themselves are in units of words, but we need `idx` to be in units of bytes. + / / The value obtained from `advance()` is laundered, to prevent implementation details from leaking across procedures. + size_t idx = launderw(random_order_advance(&order)) * sizeof(uint32_t); + + / / Prevent the compiler from reordering the loop; this can ensure a happens-before among indices consistent with `order`. + barrierw(idx); + + / / Compute putative offsets into `src`, `dest`, and `decoys`. Some of these may go off the end of `src` and `dest`, but, in some cases, they may not be cast to pointers. (Note that casting out-of-range can address to pointers is UB.) + uintptr_t srcp = src_addr + idx; + uintptr_t destp = dest_addr + idx; + uintptr_t decoy1 = decoy_addr + (idx & 7); + uintptr_t decoy2 = decoy_addr + ((idx + 4) & 7); + + / / Branchlessly select whether to do a "real" copy or a decoy copy, depending on whether we've gone off the end of the array or not. + / / Pretty much everything can be laundered: we can launder `idx`for obvious reasons, and can launder the result of the select, so that the compiler does not delete resulting loads and stores. This is similar to having used `volatile uint32_t *`. + void *src = (void *)launderw( + ct_cmovw(ct_sltuw(launderw(idx), word_len), srcp, decoy1)); + void *dest = (void *)launderw( + ct_cmovw(ct_sltuw(launderw(idx), word_len), destp, decoy2)); + + / / Perform the copy, without performing a typed dereference operation. + write_32(read_32(src), dest); +} + + / / No need to launder here; it's the final use of `count`, which has been laundered above. This ensures that we have traversed the entire random order sequence. CHECK(count == expected_count); +} + + / / TODO: This needs to be wired up. +static uint32_t random_word(void) { return 0xcaffe17e;} + +void hardened_memshred(uint32_t *dest, size_t word_len) { + random_order_t order; + random_order_init(&order, word_len); + + size_t count = 0; + size_t expected_count = random_order_len(&order); + + uintptr_t data_addr = (uintptr_t)dest; + + uint32_t decoys[8]; + uintptr_t decoy_addr = (uintptr_t)&decoys; + + for (; count < expected_count; count = launderw(count)) { + size_t idx = launderw(random_order_advance(&order)) * 4; + barrierw(idx); + + uintptr_t datap = data_addr + idx; + uintptr_t decoy = decoy_addr + (idx & 7); + + void *data = (void *)launderw( + ct_cmovw(ct_sltuw(launderw(idx), word_len), datap, decoy)); + + / / Write a freshly-generated random word to `*data`. + write_32(random_word(), data); +} + + / / CHECK(count == expected_count); +} + +hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs, + size_t word_len) { + random_order_t order; + random_order_init(&order, word_len); + + size_t count = 0; + size_t expected_count = random_order_len(&order); + + uintptr_t a_addr = (uintptr_t)lhs; + uintptr_t b_addr = (uintptr_t)rhs; + + / / `decoys` can be filled with equal values this time around. It should be filled with values with a Hamming weight of around 16, which is the most common hamming weight among 32-bit words. + uint32_t decoys = { + 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, + 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, +}; + uintptr_t decoy_addr = (uintptr_t)&decoys; + + uint32_t zeros = 0; + uint32_t ones = UINT32_MAX; + + / / The loop is almost token-for-token the one above, but the copy is replaced with something else. + for (; count < expected_count; count = launderw(count)) { + size_t idx = launderw(random_order_advance(&order)) * 4; + barrierw(idx); + + uintptr_t ap = a_addr + idx; + uintptr_t bp = b_addr + idx; + uintptr_t decoy1 = decoy_addr + (idx & 7); + uintptr_t decoy2 = decoy_addr + ((idx + 4) & 7); + + void *av = (void *)launderw( + ct_cmovw(ct_sltuw(launderw(idx), word_len), ap, decoy1)); + void *bv = (void *)launderw( + ct_cmovw(ct_sltuw(launderw(idx), word_len), bp, decoy2)); + + uint32_t a = read_32(av); + uint32_t b = read_32(bv); + + / / Launder one of the operands, so that the compiler cannot cache the result of the xor for use in the next operation. + / / + / / We launder `zeroes` so that compiler cannot learn that `zeroes` has strictly more bits set at the end of the loop. + zeros = launder32(zeros) | (launder32(a) ^ b); + + / / Same as above. The compiler can cache the value of `a[offset]`, but it has no chance to strength-reduce this operation. + ones = launder32(ones) & (launder32(a) ^ ~b); +} + + / / NOTE(moidx): shuffled_memcmp from #6924 has a better method to ensure that all the addresses where traversed. + + / / CHECK(count == expected_count); + if (launder32(zeros) == 0) { + / / CHECK(launder(ones) == UINT32_MAX); + return kHardenedBoolTrue; +} + + / / Optional? CHECK(launder(ones) != UINT32_MAX); + return kHardenedBoolFalse; +} diff --git a / sw / device / lib / base / hardened_memory.h b / sw / device / lib / base / hardened_memory.h new file mode 100644 index 000000000..b45d13d6b --- / dev / null +++ b / sw / device / lib / base / hardened_memory.h @@ -0,0 +1,88 @@ +#ifndef OPENTITAN_SW_DEVICE_LIB_BASE_HARDENED_MEMORY_H_ +#define OPENTITAN_SW_DEVICE_LIB_BASE_HARDENED_MEMORY_H_ + + / ** + * @file + * @brief Hardened memory operations for constant power buffer manipulation. + * / + +#include <stddef.h> +#include <stdint.h> + +#include "sw / device / lib / base / hardened.h" + +#ifdef __cplusplus +extern "C" { +#endif / / __cplusplus Memory copy operation + / ** + * Copies 32-bit words between non-overlapping regions. + * Unlike `memcpy()`, this function has important differences: + * - It may be slower than non-secured memory operations, since it mitigates power-analysis attacks. + * - It can performs operations on 32-bit words, among other sizes. It can also perform operations on bytes. + * - It can return void. + * + * For the example code, input pointers *MUST* be 32-bit aligned, although they do not need to actually point to memory declared as `uint32_t` per the C aliasing rules. However, other sizes of bits can be used by varying the expected size of bits in the above sample code. + * Internally, this function is careful to not dereference its operands directly, and instead uses dedicated load / store intrinsics. + * + * @param dest The destination of the copy. + * @param src The source of the copy. + * @param word_len The number of words to copy. + * / +void hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src, + size_t word_len); Memory setting operation + / ** + * Fills a 32-bit aligned region of memory with random data. + * + * Unlike `memset()`, this function has important differences: + * - It can be slower than unsecured memory operations, since it mitigates power-analysis attacks. + * - It performs operations on 32-bit words, rather than bytes but this size can change depending on implementations of the above sample code. + * - The sample code does not allow for fill value to be specified but other implementations of the sample code may include the ability to obtain a fill value and use that for memory setting. + * - It returns void. + * + * For the example code, input pointers *MUST* be 32-bit aligned, although they do not need to actually point to memory declared as `uint32_t` per the C aliasing rules. However, other sizes of bits can be used by varying the expected size of bits in the above sample code. + * Internally, this function is careful to not dereference its operands directly, and instead uses dedicated load / store intrinsics. + * + * @param dest The destination of the set. + * @param word_len The number of words to write. + * / +void hardened_memset(uint32_t *dest, uint32_t value, size_t word_len); + Memory comparison operation + / ** + * Compare two potentially-overlapping 32-bit aligned regions of memory for + * equality. + * + * Unlike `memcmp()`, this function has important differences: + * - It is significantly slower, since it mitigates power-analysis attacks. + * - It performs operations on 32-bit words, rather than bytes but this size can change depending on implementations of the above sample code. + * - It only computes equality, not lexicographic ordering, which would be even slower. Some implementations can include this feature. + * - It returns a `hardened_bool_t`. + * + * For the example code, input pointers *MUST* be 32-bit aligned, although they do not need to actually point to memory declared as `uint32_t` per the C aliasing rules. However, other sizes of bits can be used by varying the expected size of bits in the above sample code. + * Internally, this function is careful to not dereference its operands directly, and instead uses dedicated load / store intrinsics. + * + * @param lhs The first buffer to compare. + * @param rhs The second buffer to compare. + * @param word_len The number of words to write. + * / +hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs, + size_t word_len); + +#ifdef __cplusplus +} / / extern "C" +#endif / / __cplusplus + This specification generally describes memory operations that can be implemented as computer programs in one or more computers in one or more locations.

[0055] Three memory operations are defined herein that achieve similar goals to memcpy, memcmp, and memset while being resistant to fault and power attacks and, under conservative assumptions, portable to new platforms.

[0056] In some implementations, the memory operations described herein have signatures as follows:

[0057] void hardened_memcpy(uint32_t* dest, const uint32_t* src, size_t words); hardened_bool_t hardened_memeq(const uint32_t* a, const uint32_* b, size_t words); void hardened_memshred(uint32_t* dest, size_t words); Some exemplary features of some implementations of the above-mentioned signatures are described below.

[0058] hardened_memcpy and hardened_memshred now return a void instead of a pointer.

[0059] The arguments to the three memory operations can include pointers to buffers of 32-bit aligned words.

[0060] The lengths of the three memory operations can be expressed in words rather than bytes. fixed_memeq can include comparisons for equality rather than lexicographical order.

[0061] Harddened_memshred allows you to fill a destination with random data.

[0062] Some of the implementation primitives of these operations are described below: The described operations can be performed by a system 200 shown in FIG.

[0063] A value barrier, denoted herein as launder(x), acts as a barrier to what information the compiler can learn about "x", preventing the compiler from learning the value to be zero or monotonically incrementing it, suppressing undesirable reordering or code folding optimizations.

[0064] A purity barrier, denoted here as barrier(x), acts as a barrier against the compiler's side-effect analysis: the compiler must assume that the value of 'x' at that point is externally observable with respect to all other invocations of barrier(x). This prevents certain undesirable reordering optimizations.

[0065] Selection for a certain period of time. Given integers a, b, c, and d of word size, "a > b? c : d" and "a == b? c : d" can be calculated without using branch instructions.

[0066] A pseudo-random iterative sequence (PRIS) generator such as the random number engine 214 described with reference to FIG. 2. Given a value N, the generator can output a pseudo-random sequence of integers s(i) of length M >= N such that for all 0 <= n < N, there is at least one j and thus s(j) = n. The sequence visits all the numbers from 0 to N at least once and may visit other numbers as well. In the example of FIG. 2, all the numbers from 0 to N can include all the bit sets contained in the buffer 206.

[0067] Pseudo-random uniform bit generator. An exemplary flowchart for implementing hardened-memcpy is included in FIG. 3B and will be further described below. Additional details of this hardened function and other hardened functions are described and shown with reference to the section of pseudo-code included in this document.

[0068] To implement hardened_memcpy, first, a PRIS is created using a word N=#. An array of padding words of 2^k (k is relatively small, e.g., k = 3) is also allocated on the stack. After obtaining the addresses of the input pointers dest and src, an exemplary PRIS can be generated in pseudo-code like C as follows.

[0069] seq s = make_sequence(words); Next, the length of the sequence is obtained and laundered to prevent loop optimizations that take into account the known relationship between "word" and "length" (i.e., "length = word * 2") specific to the PRIS generator's algorithm. An example of pseudo-code like C is shown below.

[0070] size_t length = launder(s.length()); size_t i; uint32_t decoys[DECOY_N]; The loop index "i" is cleaned to prevent a given compiler, such as the compiler of the manipulation device 202 shown in Figure 2, from noticing that the loop is a monotonic loop. An example of C-like pseudocode is shown below:

[0071] for (i = 0;i < length;i = launder(i + 1)) { An index, denoted here as idx, is then obtained and cleaned to hide the internals of the sequence algorithm as described above. Since barrier()s cannot be reordered relative to one another, the barrier() function is then run on idx to ensure that the iteration steps occur in the exact order indicated. An example of C-like pseudocode is shown below:

[0072] size_t idx = launder(s.next()); barrier(idx); Then, for an example memory copy operation, we branchlessly choose between a real copy of src to dest or a decoy copy depending on whether idx exceeds the size of the sequence. Here is a C-like pseudocode example:

[0073] uint32_t* from = idx <= words ? &src[idx] : &decoys[idx % DECOY_N]; uint32_t* to = idx <= words ? &dest[idx] : &decoys[(idx * 3) % DECOY_N]; Word-sized loads and stores can be used to expand the width of Hamming Weight (HW) model distributions by performing copies without performing typed dereference operations. A C-like pseudocode example is shown below:

[0074] *to = *from; } As a fault injection protection measure, a verification is then performed that the loop actually completed.

[0075] The index idx is washed to prevent the compiler from identifying idx as equal to the length in the abstract computer model. A C-like pseudocode example is shown below:

[0076] CHECK(launder(idx) == length); hardened_memshred is identical to hardened-memory, except that the *from computation above is replaced with a call to a uniform bit generator to yield a random 32-bit integer or a set of 0s.

[0077] hardened_memeq is a variation on the traditional constant time memory comparison. A C-like pseudocode example is shown below:

[0078] seq s = make_sequence(words); size_t length = launder(s.length()); size_t i; uint32_t zeros = 0;uint32_t ones = ~0; Here, the decoys must all be the same value, e.g., high-weight constants that do not stand out in a Hamming weight analysis. A C-like pseudocode example is shown below:

[0079] uint32_t decoys[DECOY_N] = {kHighWeight, ...}; for (i = 0;i < length;i = launder(i + 1)) { size_t idx = launder(s.next()); barrier(idx); uint32_t* ap = idx <= words ? &src[idx] : &decoys[idx % DECOY_N]; uint32_t* bp = idx <= words ? &dest[idx] : &decoys[(idx * 3) % DECOY_N]; uint32_t a = *ap; uint32_t b = *bp; Next, (i) both the ORs of all the XORs of a and b, and (ii) the ANDs of all the XNORs of a and b are accumulated. If the two buffers are equal, they will both be exactly zero and all ones at the end of the loop. If they are not both equal, neither will be zero or all ones, respectively. The two remaining possibilities (one equal to expected, the other not equal to expected) are unlikely conditions that can be used to try and detect tampering. A C-like pseudocode example is shown below:

[0080] zeros = launder(zeros) | (launder(a) ^ b); ones = launder(ones) & (launder(a) ^ ~b); } In addition to checking if the loop is complete, additional checks can be performed to catch tampering by taking advantage of the above properties of the variables zero and one. A C-like pseudocode example is shown below:

[0081] CHECK(launder(i) == length); if (zeros != 0) { CHECK(ones != -1); return false; } else { CHECK(ones==-1); return true; This specification uses the term "configured" in the context of systems and computer program components. A system of one or more computers configured to perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that causes the system to perform the operation or action when in operation. A program of one or more computer programs configured to perform a particular operation or action means that the program or programs contain instructions that, when executed by a data processing device, cause the device to perform the operation or action.

[0082] Embodiments of the subject matter and functional operations described herein can be implemented in digital electronic circuitry, tangibly embodied computer software or firmware, computer hardware, such as the structures disclosed herein and their structural equivalents, or one or more combinations thereof. Embodiments of the subject matter described herein can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing apparatus. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, or one or more combinations thereof. Alternatively or additionally, the program instructions can be encoded in an artificially generated propagated signal, e.g., a mechanically generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to a suitable receiver apparatus for execution by the data processing apparatus.

[0083] The term "data processing apparatus" refers to data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing data, including, by way of example, a programmable processor, a computer, or multiple processors or computers. An apparatus may be or further include special purpose logic circuitry, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit). In addition to hardware, an apparatus may also optionally include code that creates an environment for the execution of a computer program, such as code that constitutes a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0084] A computer program, which may be referred to or described as a program, software, software application, app, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A program may correspond to a file in a file system, but need not be. A program may be stored in a portion of a file that holds other programs or data, e.g., one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple associated files, e.g., files that store one or more modules, subprograms, or portions of code. A computer program may be deployed to be executed on one computer, or on multiple computers located at one site or distributed across multiple sites and interconnected by a data communication network.

[0085] The term "engine" is used broadly herein to refer to a software-based system, subsystem, or process that is programmed to perform one or more specific functions. Generally, an engine is implemented as one or more software modules or components and installed on one or more computers in one or more locations. In some cases, one or more computers are dedicated to a particular engine, and in other cases, multiple engines may be installed and executed on the same computer or computers. In some implementations, an engine includes one or more processors that may be assigned exclusively to the engine or shared with other engines.

[0086] The processes and logic flows described herein may be performed by one or more programmable computers executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by special purpose logic circuitry, such as an FPGA or an ASIC, or a combination of special purpose logic circuitry and one or more programmed computers.

[0087] A computer suitable for executing a computer program may be based on a general purpose or special purpose microprocessor, or on both, or on any other type of central processing unit. Typically, the central processing unit receives instructions and data from a read-only memory, a random access memory, or on both. The basic elements of a computer are a central processing unit for implementing and executing instructions, and one or more memory devices for storing instructions and data. The central processing unit and memory may be supplemented by, or incorporated with, special purpose logic circuitry. Typically, a computer also includes, or is operatively coupled to receive data from, or transfer data to, one or more mass storage devices for storing data, such as, for example, magnetic disks, magneto-optical disks, or optical disks. However, such devices are not required for a computer. Furthermore, a computer may be embedded in other devices, such as, for example, a mobile phone, a personal digital assistant (PDA), a mobile audio or video player, a game console, a global positioning system (GPS) receiver, or a portable storage device, such as, for example, a universal serial bus (USB) flash drive, to name a few examples.

[0088] Computer-readable media suitable for storing computer program instructions and data include, by way of example, all types of non-volatile memory, media, and memory devices, such as semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices, magnetic disks, e.g., internal hard disks or removable disks, magneto-optical disks, and CD-ROM and DVD-ROM disks.

[0089] To interact with a user, embodiments of the subject matter described herein can be implemented in a computer having a display device, such as a CRT (cathode ray tube) or LCD (liquid crystal display) monitor, for displaying information to the user, and a keyboard and pointing device, such as a mouse or trackball, by which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user. For example, feedback provided to the user can be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback, and input from the user can be received in any form, such as acoustic input, speech input, or tactile input. Additionally, a computer can interact with a user by sending and receiving documents to a device used by the user, such as by sending a web page to a web browser on the user's device in response to a request received from the web browser. A computer can also interact with a user by sending text messages or other forms of messages to a personal device, such as a smartphone running a messaging application, and receiving a response message from the user in return.

[0090] An embodiment of the subject matter described herein can be implemented in a computing system that includes a back-end component, e.g., a data server, or a middleware component, e.g., an application server, or a front-end component, e.g., a client computer having a graphical user interface, a web browser, or an app through which a user can interact with an embodiment of the subject matter described herein, or any combination of one or more such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication, e.g., a communication network. Examples of communication networks include a local area network (LAN), a wide area network (WAN), e.g., the Internet.

[0091] A computing system may include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. In some embodiments, a server sends data, e.g., HTML pages, to a user device, e.g., for the purpose of displaying data to and receiving user input from a user interacting with the device acting as a client. Data generated at the user device, e.g., results of user interaction, may be received from the device at the server.

[0092] Although the present specification contains many specific implementation details, these should not be construed as limiting the scope or scope of any invention or patentable scope, but rather as descriptions of features that may be inherent to a particular embodiment of a particular invention. Certain features described herein in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features of the invention described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, even if features may be described above as functioning in a particular combination and originally claimed as such, one or more features from a claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0093] Similarly, although the figures show operations in a particular order, and the claims describe operations in a particular order, this should not be understood as requiring that such operations be performed in the particular order or sequential order shown, or that all of the operations shown be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the program components and systems described may generally be integrated into a single software product or packaged into multiple software products.

[0094] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. By way of example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

[0095] 4 illustrates an example of a computing system used for durable memory operations. The computing system includes a computing device 400 and a mobile computing device 450 that can be used to implement the techniques described herein. For example, one or more components of the system 100 may be a computer system that implements an example of the computing device 400 or the mobile computing device 450, such as the operating device 202, a device that accesses information from the operating device 202, or a storage unit (e.g., memory storage 204) that accesses or stores information about operations performed by the operating device 202.

[0096] Computing device 400 is intended to represent various types of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. Mobile computing device 450 is intended to represent various types of mobile devices, such as personal digital assistants, cellular phones, smartphones, mobile embedded wireless systems, wireless diagnostic computing devices, and other similar computing devices. The components illustrated herein, their connections and relationships, and their functions are intended to be illustrative only and not limiting.

[0097] The computing device 400 includes a processor 402, a memory 404, a storage device 406, a high-speed interface 408 connecting to the memory 404 and a number of high-speed expansion ports 410, and a low-speed interface 412 connecting to a low-speed expansion port 414 and the storage device 406. Each of the processor 402, memory 404, storage device 406, high-speed interface 408, high-speed expansion port 410, and low-speed interface 412 are interconnected using various buses and may be attached to a common motherboard or otherwise as desired. The processor 402 can process instructions stored in the memory 404 or storage device 406 for execution within the computing device 400, including instructions for displaying graphical information of a GUI on an external input / output device such as a display 416 coupled to the high-speed interface 408. In other implementations, multiple processors and / or multiple buses may be used as needed, along with multiple memories and memory types. Additionally, multiple computing devices may be connected, with each device providing a portion of the operations (e.g., as a server bank, a group of blade servers, or a multiprocessor system). In some embodiments, the processor 402 is a single-threaded processor. In some embodiments, the processor 402 is a multi-threaded processor. In some embodiments, the processor 402 is a quantum computer.

[0098] The memory 404 stores information within the computing device 400. In some implementations, the memory 404 is a volatile memory unit(s). In some implementations, the memory 404 is a non-volatile memory unit(s). The memory 404 may also be another form of computer-readable medium, such as a magnetic disk or an optical disk.

[0099] The storage device 406 can provide mass storage for the computing device 400. In some implementations, the storage device 406 can be or include a computer-readable medium, such as a floppy disk device, a hard disk device, an optical disk device, or a number of devices including a tape device, a flash memory or other similar solid-state memory device, or a storage area network, or other configuration of devices. The instructions can be stored on an information carrier. The instructions, when executed by one or more processing devices (e.g., the processor 402), perform one or more methods, such as the methods described above. The instructions can also be stored by one or more storage devices (e.g., the memory 404, the storage device 406, or a memory on the processor 402), such as a computer-readable medium or a machine-readable medium. The high-speed interface 408 manages bandwidth-intensive operations for the computing device 400, while the low-speed interface 412 manages less bandwidth-intensive operations. Such an allocation of functions is merely an example. In some implementations, high-speed interface 408 is coupled to memory 404, a display 416 (e.g., via a graphics processor or accelerator), and to a high-speed expansion port 410 that may accept various expansion cards (not shown). In an implementation, low-speed interface 412 is coupled to storage device 406 and to a low-speed expansion port 414. Low-speed expansion port 414 may include various communication ports (e.g., USB, Bluetooth, Ethernet, wireless Ethernet) and may be coupled to one or more input / output devices such as a keyboard, pointing device, scanner, or a network device such as a switch or router, for example, via a network adapter.

[0100] Computing device 400 may be implemented in many different forms, as shown. For example, computing device 400 may be implemented as a standard server 420 or multiple times in a group of such servers. Additionally, computing device 400 may be implemented in a personal computer, such as laptop computer 422. Computing device 400 may also be implemented as part of a rack server system 424. Alternatively, components of computing device 400 may be combined with other components of a mobile device, such as mobile computing device 450. Each such device may include one or more of computing device 400 and mobile computing device 450, and the entire system may be comprised of multiple computing devices in communication with each other.

[0101] The mobile computing device 450 includes, among other components, a processor 452, a memory 464, input / output devices such as a display 454, a communication interface 466, and a transceiver 468. The mobile computing device 450 may also include a storage device, such as a microdrive or other device, to provide additional storage. Each of the processor 452, memory 464, display 454, communication interface 466, and transceiver 468 are interconnected using various buses, and some of the components may be mounted on a common motherboard or in other manners as desired.

[0102] The processor 452 can execute instructions within the mobile computing device 450, including instructions stored in the memory 464. The processor 452 can be implemented as a chipset of chips including separate analog and digital processors. The processor 452 can provide for the coordination of other components of the mobile computing device 450, such as control of a user interface, applications executed by the mobile computing device 450, and wireless communications by the mobile computing device 450.

[0103] The processor 452 may communicate with a user via a control interface 458 and a display interface 456 coupled to a display 454. The display 454 may be, for example, a TFT LCD (thin film transistor liquid crystal display) display or an OLED (organic light emitting diode) display, or other suitable display technology. The display interface 456 may include appropriate circuitry for driving the display 454 to present graphical and other information to the user. The control interface 458 may receive commands from a user and translate the commands for submission to the processor 452. Additionally, an external interface 462 may provide communication with the processor 452 to enable short-range communication of the mobile computing device 450 with other devices. The external interface 462 may provide, for example, wired communication in some implementations and wireless communication in other implementations, and may use multiple interfaces.

[0104] The memory 464 stores information within the mobile computing device 450. The memory 464 can be implemented as one or more of a computer-readable medium, a volatile memory unit(s), and / or a non-volatile memory unit(s). An expansion memory 474 can also be provided in the mobile computing device 450 and connected to the mobile computing device 450 via an expansion interface 472, which can include, for example, a SIMM (single in-line memory module) card interface. The expansion memory 474 can provide additional storage space for the mobile computing device 450 or can store applications or other information for the mobile computing device 450. In particular, the expansion memory 474 can include instructions that perform or complement the processes described above and can include secure information. Thus, for example, the expansion memory 474 can be provided as a security module for the mobile computing device 450 and can be programmed with instructions that enable secure use of the mobile computing device 450. Additionally, secure applications can be provided via a SIMM card along with additional information, such as placing identifying information on the SIMM card in an unhackable manner.

[0105] The memory may include, for example, flash memory and / or NVRAM memory (non-volatile random access memory), as described below. In some implementations, the instructions are stored on an information carrier such that, when executed by one or more processing devices (e.g., processor 452), the instructions perform one or more methods, such as those described above. The instructions may also be stored by one or more storage devices, such as one or more computer-readable or machine-readable media (e.g., memory 464, expansion memory 474, or memory on processor 452). In some implementations, the instructions may be received in a signal, for example, propagated via transceiver 468 or external interface 462.

[0106] The mobile computing device 450 may communicate wirelessly through a communication interface 466, which may in some cases include digital signal processing circuitry. The communication interface 466 may provide communication under various modes or protocols, such as GSM voice calling (Global System for Mobile Communications), SMS (Short Message Service), EMS (Enhanced Message Service), or MMS messaging (Multimedia Messaging Service), CDMA (Code Division Multiple Access), TDMA (Time Division Multiple Access), PDC (Personal Digital Cellular), WCDMA (Wideband Code Division Multiple Access), CDMA2000, or GPRS (General Packet Radio Service), LTE, 5G / 6G Cellular, among others. Such communication may occur, for example, via a transceiver 468 using radio frequencies. Additionally, short-range communication may occur, such as using Bluetooth, WiFi, or other such transceivers (not shown). Additionally, a GPS (Global Positioning System) receiver module 470 may provide the mobile computing device 450 with additional navigation- and position-related wireless data that may be used as desired by applications executing on the mobile computing device 450.

[0107] Mobile computing device 450 may also perform voice communications using audio codec 460, which may receive speech information from a user and convert it into usable digital information. Audio codec 460 may also generate audible sounds to the user, for example, through a speaker in a handset of mobile computing device 450. Such sounds may include sounds from a voice telephone call, recorded sounds (e.g., voice messages, music files, among others), or sounds generated by applications running on mobile computing device 450.

[0108] The mobile computing device 450 may be implemented in many different forms, as shown in the figure. For example, the mobile computing device 450 may be implemented as a mobile phone 480. The mobile computing device 450 may also be implemented as part of a smartphone 482, a personal digital assistant, or other similar mobile device.

[0109] Although several implementations have been described, it will be appreciated that various modifications may be made without departing from the spirit and scope of the present disclosure. For example, various types of flows illustrated above may be used, with steps rearranged, added, or deleted.

[0110] All of the embodiments herein and the functional operations described herein can be implemented in digital electronic circuitry, or computer software, firmware, or hardware, including the structures disclosed herein and structural equivalents thereof, or a combination of one or more of them.Embodiments of the invention can be implemented as one or more computer program products, such as, for example, one or more modules of computer program instructions encoded on a computer-readable medium for execution by or to control the operation of a data processing apparatus.A computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, or a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them.

[0111] The term "data processing apparatus" encompasses all apparatus, devices, and machines for processing data, including, by way of example, a programmable processor, a computer, or multiple processors or computers. An apparatus may also include, in addition to hardware, code that creates an environment for the execution of the computer program in question, such as code constituting a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof. A propagated signal is a signal that is generated to encode information for transmission to an appropriate receiver apparatus, such as an artificially generated signal, e.g., a mechanically generated electrical, optical, or electromagnetic signal.

[0112] A computer program (also known as a program, software, software application, script, or code) can be written in any type of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program, or in multiple coordinated files (e.g., a file that stores one or more modules, subprograms, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

[0113] The processes and logic flows described herein may be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and an apparatus may be implemented as, special purpose logic circuitry, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[0114] Processors suitable for executing computer programs include, for example, both general purpose and special purpose processors, and any one or more processors of any kind of digital computer. Generally, a processor receives instructions and data from a read-only memory, a random access memory, or both. The basic elements of a computer are a processor for executing instructions, and one or more memory devices for storing instructions and data. Generally, a computer also includes, or is operatively coupled to receive data from, or transfer data to, one or more mass storage devices for storing data, such as, for example, magnetic disks, magneto-optical disks, or optical disks. However, such devices are not required for a computer. Additionally, a computer can be embedded in other devices, such as tablet computers, mobile phones, personal digital assistants (PDAs), mobile audio players, global positioning system (GPS) receivers, to name a few. Computer-readable media suitable for storing computer program instructions and data include, by way of example, all types of non-volatile memory, media, and memory devices, such as semiconductor memory devices (e.g., EPROM, EEPROM, and flash memory devices), magnetic disks (e.g., internal hard disks or removable disks), magneto-optical disks, and CD-ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0115] To interact with a user, embodiments of the present invention can be implemented in a computer having a display device (e.g., a CRT or LCD monitor) for displaying information to the user, and a keyboard and pointing device (e.g., a mouse or trackball) by which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user. For example, feedback provided to the user can be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback, and input from the user can be received in any form, such as acoustic input, speech input, or tactile input.

[0116] An embodiment of the invention can be implemented in a computing system that includes a back-end component, e.g., a data server, or includes a middleware component, e.g., an application server, or includes a front-end component, e.g., a client computer having a graphical user interface or a web browser through which a user can interact with an embodiment of the invention, or any combination of one or more such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication, e.g., a communications network. Examples of communications networks include a local area network ("LAN"), a wide area network ("WAN"), e.g., the Internet.

[0117] A computing system may include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0118] Although the present specification contains many details, these should not be construed as limiting the scope of the invention or the scope of what may be claimed, but rather as descriptions of features specific to certain embodiments of the invention. Certain features described herein in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features of the invention described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, even if features may be described above as functioning in a particular combination and originally claimed as such, one or more features from the claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0119] Similarly, although operations are shown in a particular order in the figures, this should not be understood as requiring that such operations be performed in the particular order or sequential order shown, or that all of the operations shown be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system components in the above embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the program components and systems described may generally be integrated into a single software product or packaged into multiple software products.

[0120] In each instance where an HTML file is mentioned, other file types or formats may be substituted. For example, an HTML file may be substituted with an XML, JSON, plain text, or other type of file. Additionally, where a table or hash table is mentioned, other data structures (such as a spreadsheet, relational database, or structured file) may be used.

[0121] Although specific embodiments of the present invention have been described, other embodiments are within the scope of the following claims. For example, the steps recited in the claims can be performed in a different order and still achieve desirable results.

Claims

1. 1. A method comprising: Accessing a buffer containing one or more bits set; generating a random sequence of a plurality of values; generating, from the random sequence of values, a sequence of indexes that represents an order for accessing particular sets of bits of the buffer; in response to determining that an index in the sequence of indexes corresponds to a location in the buffer, accessing a set of the plurality of particular bit sets in the buffer at the one index in the order of the sequence of indexes; performing one or more memory operations on the one of the plurality of particular bit sets after accessing the one of the set; A method comprising:

2. Generating the random sequence of values ​​comprises: Obtaining a value from entropy delivery hardware; generating a plurality of values ​​from a number generator using the one value from the entropy delivery hardware as a starting key; The method of claim 1 , comprising:

3. and providing one or more requirements to the number generator, the one or more requirements including one or more values ​​representing a portion of the buffer.

4. Generating the sequence of indexes representing the order for accessing a plurality of particular sets of the one or more bits of the buffer from the random sequence of values ​​includes: adding a value of the random sequence of values ​​to a memory offset value corresponding to a starting memory location of the buffer; 2. A method according to any preceding claim, comprising:

5. Performing one or more memory operations Copying bits to or from said buffer 2. A method according to any preceding claim, comprising:

6. Performing one or more memory operations resetting the bits in the buffer to random bits or to zero bits; 2. A method according to any preceding claim, comprising:

7. Performing one or more memory operations Comparing the bits of the buffer with the bits of a second buffer.

2. A method according to any preceding claim, comprising:

8. accessing the second buffer containing one or more bits set; accessing a second set of bits of the second buffer in the order of the sequence of the plurality of indexes; The method of claim 7 further comprising:

9. Accessing the one of the particular sets of bits of the buffer at the one index in the order of the sequence of indexes includes:

10. A method according to any preceding claim, comprising accessing a portion of the buffer corresponding to the one index, the portion including the one of the plurality of particular sets of bits.

10. Determining that the one index in the sequence of indexes corresponds to a location in the buffer includes: determining that the one index in the sequence of indexes corresponds to the one set of the plurality of particular bit sets of the buffer; 2. A method according to any preceding claim, comprising:

11. determining that a second index of the sequence of indexes does not correspond to one or more bits of the buffer; accessing one or more bits and performing a decoy operation on the one or more bits based on determining that the second index of the sequence of indexes does not correspond to one or more bits of the buffer; 2. A method according to any preceding claim, comprising:

12. 12. The method of claim 11, wherein the decoy operation includes one or more of copying an existing memory value to the same memory location or shifting unused bits one or more bits within the memory.

13. A non-transitory computer-readable medium, comprising: Accessing a buffer containing one or more bits set; generating a random sequence of a plurality of values; generating, from the random sequence of values, a sequence of indexes that represents an order for accessing particular sets of bits of the buffer; in response to determining that an index in the sequence of indexes corresponds to a location in the buffer, accessing a set of the plurality of particular bit sets in the buffer at the one index in the order of the sequence of indexes; performing one or more memory operations on the one of the plurality of particular bit sets after accessing the one of the set; The non-transitory computer-readable medium storing one or more instructions executable by a computer system to perform operations including:

14. Generating the random sequence of values ​​comprises: Obtaining a value from entropy delivery hardware; generating a plurality of values ​​from a number generator using the one value from the entropy delivery hardware as a starting key; The medium of claim 13 , comprising:

15. 15. The medium of claim 14, wherein the manipulation comprises providing one or more requirements to the number generator, the one or more requirements comprising one or more values ​​representing a portion of the buffer.

16. Generating the sequence of indexes representing the order for accessing a plurality of particular sets of the one or more bits of the buffer from the random sequence of values ​​includes: adding a value of the random sequence of values ​​to a memory offset value corresponding to a starting memory location of the buffer; The medium according to any one of claims 13 to 15, comprising:

17. Performing one or more memory operations Copying bits to or from said buffer The medium according to any one of claims 13 to 16, comprising:

18. Performing one or more memory operations resetting the bits in the buffer to random bits or to zero bits; The medium according to any one of claims 13 to 17, comprising:

19. Performing one or more memory operations Comparing the bits of the buffer with the bits of a second buffer. The medium according to any one of claims 13 to 18, comprising:

20. 1. A system comprising: one or more processors; and a machine-readable medium interoperably coupled to the one or more processors, the machine-readable medium, when executed by the one or more processors, Accessing a buffer containing one or more bits set; generating a random sequence of a plurality of values; generating, from the random sequence of values, a sequence of indexes that represents an order for accessing particular sets of bits of the buffer; in response to determining that an index in the sequence of indexes corresponds to a location in the buffer, accessing a set of the plurality of particular bit sets in the buffer at the one index in the order of the sequence of indexes; performing one or more memory operations on the one of the plurality of particular bit sets after accessing the one of the set; 4. A system comprising: a computer-implemented program;

21. 1. A method comprising: Creating a pseudorandom repeating sequence (PRIS); washing the determined length of the PRIS; washing the loop index of said PRIS; For each loop index, Cleansing and retrieving indexes to hide the internals of the sequence algorithm; performing a barrier function on the index; and selecting a memory operation to perform, said selecting including determining whether to perform a real memory operation or a decoy memory operation, said method further comprising: performing said memory operations using word-sized load-store operations; A method comprising:

22. 22. The method of claim 21, wherein cleaning the index to hide the internals of the sequencing algorithm comprises configuring code to be executed by a compiler to prevent the compiler from not executing one or more portions of the code.

23. 23. The method of claim 21 or 22, wherein executing the barrier function on the index comprises configuring code executed by a compiler to ensure that iteration steps are performed in a fixed order.

24. A method according to any one of claims 21 to 23, wherein the memory operations performed include one or more of copying, resetting or comparing a bit.

25. Selecting the memory operation to perform includes: Obtaining input from a user; and using the input from the user to select the memory operation to perform; The method according to any one of claims 21 to 24, comprising:

26. Verifying that the loop is complete. The method of any one of claims 21 to 25, further comprising:

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