Power converter and method for protecting a power converter - Patents.com

Abstract

Disclosed embodiments may include a power converter having first and second terminals, a charge pump power conversion circuit, and a protection circuit. The first terminal may receive an input voltage and the second terminal may output an output voltage. The charge pump power conversion circuit may be electrically connected between the first terminal and the second terminal and may convert the input voltage to the output voltage. The protection circuit may be electrically connected to the charge pump power conversion circuit. The protection circuit may include a first switching device responsive to a control signal to interrupt power flow from the first terminal to the second terminal and from the second terminal to the first terminal.

Description

[Technical field]

[0001] REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. patent application Ser. No. 17 / 651,572, entitled "Power Converter and Methods for Protecting Power Converters," filed Feb. 17, 2022, the entirety of which is incorporated herein by reference.

[0002] The present disclosure relates generally to power electronic devices and, more particularly, to DC-DC power converters. [Background technology]

[0003] Many electronic products, particularly mobile computing and / or communication products and components (e.g., notebook computers, ultrabook computers, tablet devices, LCD and LED displays), require multiple voltage levels. For example, a radio frequency transmitter power amplifier may require a relatively high voltage (e.g., 12V or more), while logic circuits may require a lower voltage level (e.g., 1-2V). Some other circuits may require an intermediate voltage level (e.g., 5-10V). Power converters are often used to generate lower or higher voltages from a common power source, such as a battery, to meet the power requirements of different components in an electronic product. Summary of the Invention [Means for solving the problem]

[0004] An embodiment of the present disclosure provides a power converter. The power converter comprises first and second terminals, a charge pump power conversion circuit, and a protection circuit. The first terminal receives an input voltage. The second terminal outputs an output voltage. The charge pump power conversion circuit is electrically connected between the first terminal and the second terminal and converts the input voltage to the output voltage. The protection circuit is electrically connected to the charge pump power conversion circuit. The protection circuit comprises a first switching device that, in response to a control signal, blocks power flow from the first terminal to the second terminal and from the second terminal to the first terminal.

[0005] An embodiment of the present disclosure provides a power converter. The power converter comprises a controller and a switched capacitor network. The controller implements a dead time interval based at least in part on one or more timing signals and outputs a control signal in response to detecting a fault to interrupt power flow in either direction between a first terminal of the power converter and a second terminal of the power converter. The switched capacitor network is electrically connected to the controller and converts a first voltage at the first terminal to a second voltage at the second terminal. The switched capacitor network comprises a plurality of switches that switch between a first configuration and a second configuration, and the controller controls the plurality of switches to connect the plurality of capacitors to form the first capacitor network in the first configuration and to form the second capacitor network in the second configuration.

[0006] An embodiment of the present disclosure provides a power converter. The power converter includes a power conversion circuit, two or more switching circuits, and one or more detection circuits. The power conversion circuit has first, second, and third terminals and converts a first voltage received from at least one of the first, second, and third terminals of the power converter to a second voltage output from at least one of the first, second, and third terminals. The two or more switching circuits are electrically connected to the power conversion circuit and, in response to a fault, provide or interrupt a bidirectional current path between one of the first, second, and third terminals and another one of the first, second, and third terminals according to a control signal. The one or more detection circuits are electrically connected to one of the first, second, and third terminals and detect whether a fault occurs.

[0007] An embodiment of the present disclosure provides a method for protecting a charge pump power converter receiving a first voltage from a first terminal and providing a second voltage at a second terminal, the method including converting the first voltage to a second voltage by the charge pump power converter, and blocking, in response to a control signal, a power flow from the first terminal to the second terminal and from the second terminal to the first terminal by a protection circuit electrically connected to the charge pump power converter.

[0008] Additional features and advantages of the disclosed embodiments will be set forth in part in the description that follows, and in part will be obvious from the description, or may be learned by practice of the embodiments. The features and advantages of the disclosed embodiments may be realized and attained by means of the elements and combinations set forth in the claims. [Brief description of the drawings]

[0009] Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying drawings. It should be noted that, according to industry practice, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. [Figure 1]FIG. 1 illustrates an exemplary power converter in accordance with an embodiment of the present disclosure. [Diagram 2] 1 is a block diagram illustrating a power converter according to an embodiment of the present disclosure. [Diagram 3] FIG. 2 illustrates an exemplary switching device according to an embodiment of the present disclosure. [Figure 4] FIG. 2 illustrates an exemplary switching device according to an embodiment of the present disclosure. [Diagram 5] Figure 5A illustrates another exemplary switching device according to an embodiment of the present disclosure, Figure 5B illustrates an n-type power MOSFET device having a body bias selection circuit, and Figure 5C illustrates a p-type power MOSFET device having a body bias selection circuit according to an embodiment of the present disclosure. [Figure 6] 6A and 6B illustrate another exemplary switching device and a power converter according to an embodiment of the present disclosure, respectively. [Figure 7] 1 is a block diagram illustrating a power converter according to an embodiment of the present disclosure. [Figure 8-1] 8 is a circuit diagram illustrating an example circuit configuration of the power converter of FIG. 7 in accordance with an embodiment of the present disclosure. [Figure 8-2] 8 is a circuit diagram illustrating an example circuit configuration of the power converter of FIG. 7 in accordance with an embodiment of the present disclosure. [Figure 9] 1 is a block diagram illustrating a power converter according to an embodiment of the present disclosure. [Figure 10-1] FIG. 9C is a circuit diagram illustrating an example circuit configuration of the power converter of FIG. 9B in accordance with an embodiment of the present disclosure. [Figure 10-2] FIG. 9C is a circuit diagram illustrating an example circuit configuration of the power converter of FIG. 9B in accordance with an embodiment of the present disclosure. [Figure 11] FIG. 2 is a circuit diagram illustrating an exemplary detection circuit according to an embodiment of the present disclosure. [Figure 12] FIG. 4 is a circuit diagram illustrating another exemplary detection circuit, according to an embodiment of the present disclosure. [Figure 13] 4 is a flowchart of a method for protecting a power converter according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The following disclosure provides many different exemplary embodiments or examples for implementing different features of the provided subject matter. To explain the present disclosure, certain simplified examples of components and configurations are described below. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference signs and / or letters in various examples. This repetition is for the purposes of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0011] The terms used herein generally have their ordinary meaning in the art and in the specific context in which each term is used. The use of examples herein, including examples of any term discussed herein, is illustrative only and does not limit the scope and meaning of the disclosure or any exemplified term in any way. Similarly, the disclosure is not limited to the various embodiments provided herein.

[0012] Terms such as "first", "second", etc. may be used herein to describe various elements, but these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element, without departing from the scope of the embodiments. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0013] Additionally, spatially relative terms such as "lower," "below," "bottom," "upper," "top," and the like may be used herein for ease of description to describe the relationship of one element or feature to another element or feature illustrated in the drawings. These spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation shown in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be interpreted accordingly.

[0014] As used herein, the term “coupled” can also be referred to as “electrically coupled,” and the term “connected” can also be referred to as “electrically connected.” “Coupled” and “connected” can also be used to indicate that two or more elements co-operate or interact with each other.

[0015] Various embodiments of the present disclosure are described with respect to embodiments in a particular context, namely, in charge pump circuits. As used in this disclosure, the term "charge pump" refers to a switched capacitor network configured to convert an input voltage to an output voltage. Examples of such charge pumps include cascade multiplier, Dickson, ladder, series-parallel, Fibonacci, and doubler switched capacitor networks, all of which may be configured as multi-layer or single-phase networks.

[0016] However, the concepts in this disclosure can be applied to other types of power converters. A power converter that converts a higher input voltage source to a lower output voltage level is commonly known as a step-down converter, or a buck converter because the converter "bucks" the input voltage. A power converter that converts a lower input voltage source to a higher output voltage level is commonly known as a step-up converter, or a boost converter because the converter "boosts" the input voltage. In addition, some power converters, commonly known as "buck-boost converters," can be configured to convert an input voltage source to a wide range of output voltages, where the output voltage may be higher or lower than the input voltage. In various embodiments, the power converter can be bidirectional and is either a step-up or step-down converter depending on how the power source is connected to the converter. In some embodiments, an AC-DC power converter can be built from a DC-DC power converter, for example, by first rectifying the AC input voltage to a DC voltage and then applying the DC voltage to a DC-DC power converter.

[0017] The voltage ratings of electrical components such as capacitors, inductors, and / or transistors in a power converter can be selected according to actual demand. However, under fault conditions, the input voltage may suddenly increase rapidly, which may cause electrical components to experience temporary overvoltage stress, resulting in damage to the power electronics device. In other words, a fault may create a condition where electrical components experience current and / or voltage conditions that are outside of the designed and / or permitted range. Such conditions may cause the components to fail or cause electrical hazards (e.g., high temperature, arcing, ground fault fire). Therefore, it is desirable to limit the exposure of electrical components to fault conditions, for example, for device robustness and lifetime, as well as safety concerns. In some cases, power metal-oxide-semiconductor field-effect transistors (MOSFETs) can be used as protection switches to block undesired power flow when a fault occurs. However, MOSFET devices can only block in one direction, preventing power from flowing from a voltage source to a load. That is, due to the current path provided by the inherent body diode, the MOSFET device alone may not be able to prevent the energy stored on the load side from flowing back to the voltage source. When an input undervoltage or output overvoltage fault occurs, unwanted current may flow back from the load to the voltage source, causing damage to the power conversion circuitry.

[0018] In various embodiments of the present disclosure, one or more bidirectional power switches can be applied as part of a protection mechanism for a charge pump circuit, which can block current in both directions when a fault condition occurs to provide better protection and prevent potential damage to electrical components in the power converter.

[0019] FIG. 1 illustrates an example power converter 100 according to some embodiments of the present disclosure. As shown in FIG. 1, the power converter 100 may include a protection circuit 110, a charge pump power conversion circuit 120, a controller 130, and one or more detection circuits 140. In some embodiments, the power converter 100 includes a clock (not shown) that generates one or more timing signals. The controller 130 may implement a dead-time interval based at least in part on the one or more timing signals generated by the clock. The protection circuit 110 may be electrically connected to the charge pump power conversion circuit 120. In some embodiments, the protection circuit 110 may include a switching device 112 between a first terminal 102 (e.g., an input terminal configured to receive an input voltage Vin) and the power conversion circuit 120 (e.g., at a node N1).

[0020] In the embodiment shown in FIG. 1, the charge pump power conversion circuit 120 may be a Dickson charge pump using a switching network with switches SW0-SW4 and SWA-SWD that controls the connection of the supply voltage across the load through the capacitors C1-C4. In particular, the charge pump power conversion circuit 120 may be configured to step down or step up the input voltage Vin received from the first terminal 102 via the switching device 112 in the ON condition by storing a portion or multiple of the input voltage Vin across the capacitors C1-C4. Each capacitor C1-C4 may assist in generating an intermediate voltage during a portion of the operating cycle. As the magnitude of conversion increases, the number of capacitors used in the charge pump increases.

[0021] The switches SW0-SW4, SWA-SWD can be used to reconfigure the capacitors C1-C4 into different configurations. In some embodiments, the switches SW0-SW4 and SWA-SWD are configured to switch between two different configurations. Thus, the capacitors C1-C4 can form a first capacitor network in response to a first configuration of the switches SW0-SW4 and SWA-SWD, and a second capacitor network in response to a second configuration of the switches SW0-SW4 and SWA-SWD. In some embodiments, the controller 130 controls and sequences the transitions of the switches SW0-SW4 and SWA-SWD based on timing signals received by the controller 130 to incorporate any required dead time or required clock phases. For example, the controller 130 can implement a dead time interval during the transition to prevent all the switches SW0-SW4 and SWA-SWD from being executed simultaneously when switching between the first and second configurations.

[0022] Although an exemplary Dickson charge pump is shown in a 5:1 (step-down) configuration (or a 1:5 step-up configuration if the power flow is reversed) in FIG. 1, the present disclosure is not limited to such conversion circuit ratios or types. In various embodiments, the step-down or step-up configurations can be applied to all possible charge pump ratios. For example, in other embodiments, the Dickson charge pump can be in a 2:1 configuration with an input voltage Vin of 10V and an output voltage Vout of 5V.

[0023] During a first operating phase, in a first configuration, switches SW0, SW2, SW4, SWB and SWC are on while the remaining switches SW1, SW3, SW4, SWA and SWD are off. A first voltage label at each node indicates the voltage value of the node during the first operating phase. During a second operating phase, in a second configuration, switches SW0, SW2, SW4, SWB and SWC are off while the remaining switches SW1, SW3, SW4, SWA and SWD are on. A second voltage label at each node indicates the voltage value of the node during the second operating phase.

[0024] By controlling the switches SW0-SW4, SWA-SWD to switch between a first configuration and a second configuration in different operation stages, the charge pump power conversion circuit 120 can achieve voltage conversion to output an output voltage Vout (e.g., about 4V) at a desired level in response to an input voltage Vin (e.g., about 20V) at a normal operation level. It should be understood that the voltage values ​​provided in the embodiment of FIG. 1 are only examples to assist in understanding the present disclosure. In various embodiments, the number of switches and capacitors in the charge pump, the voltage ratings of the switches and capacitors, the input voltage Vin, and the output voltage Vout can be designed based on the actual demands of different applications.

[0025] Thus, the power conversion circuit 120 can output an output voltage Vout via its output node to the second terminal 104, which can be an output terminal configured to output the output voltage Vout to a next stage circuit, such as a regulator circuit, a filtering circuit, or a load, connected to the second terminal 104.

[0026] Each stage in the Dickson charge pump, shown in FIG. 1, sees only a small portion of the total voltage (e.g., 20V) on the high voltage side of the charge pump. Therefore, it is possible to use devices with relatively low voltage ratings to improve efficiency. However, under conditions where the high voltage side, such as the input voltage Vin from the first terminal 102, rises quickly and suddenly, the low voltage switches SW0-SW4, SWA-SWD in the charge pump power conversion circuit 120 may be subjected to temporary overvoltage stress, which may occur during transient or fault conditions, resulting in damage to the power devices.

[0027] To protect the switches SW0-SW4, SWA-SWD and the capacitors C1-C4 from being subjected to voltages exceeding the breakdown voltages and to prevent improper circuit operation or damage to the power conversion circuit 120, the controller 130 can output a corresponding control signal CS to the protection circuit 110 in response to the fault signal FS. For example, in various embodiments, the fault signal FS can include an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal, or any other fault signal FS indicative of an undesirable fault condition. Thus, in response to the control signal CS, the switching device 112 is configured to disconnect the current path between the first terminal 102 and the input node of the power conversion circuit 120.

[0028] In some embodiments, the fault signal FS, indicative of an abnormal fault condition, is generated by one or more detection circuits 140 electrically connected to the controller 130. The operation of the controller 130 and the detection circuits 140 will be described in detail below with reference to the accompanying drawings.

[0029] As mentioned above, when a single p-type metal-oxide-semiconductor field-effect transistor (PMOS) or a single n-type metal-oxide-semiconductor field-effect transistor (NMOS) is used as a protection switch between the first terminal 102 and the power conversion circuit 120, the PMOS or NMOS device can only prevent power from flowing from a voltage source (e.g., the first terminal 102) to a load (e.g., the second terminal 104), but cannot prevent the energy stored on the load side from flowing back to the voltage source due to the inherent body diode of the PMOS or NMOS device. The inherent body diode provides a current path for reverse power flow from the power conversion circuit 120 to the first terminal 102. Thus, the PMOS or NMOS device only blocks power flow from the first terminal 102 to the second terminal 104, but not in the opposite direction. Alternatively stated, a PMOS or NMOS device can only block power flow in one direction.

[0030] When an input under-voltage fault or an output over-voltage fault occurs, undesirable current may flow back from the power conversion circuit 120 to the first terminal 102, potentially causing damage to devices within the power conversion circuit 120 or to devices in a previous stage (e.g., an AC-DC converter or a DC power supply) connected to the power converter 100.

[0031] To prevent current from flowing back to the first terminal 102, in some embodiments, the switching device 112 may be a bidirectional disconnect switch. In particular, the switching device 112 is configured to interrupt power flow from the first terminal 102 (e.g., an input terminal configured to receive an input voltage Vin) to the second terminal 104 (e.g., an output terminal configured to output an output voltage Vout) and also interrupt power flow from the second terminal 104 to the first terminal 102 in response to a control signal CS from the controller 130. Alternatively stated, the protection circuit 110 can support bidirectional current flow when the switching device 112 is in an ON state and can support bidirectional voltage blocking when the switching device 112 is turned OFF. Because protection circuit 110 blocks current paths in both directions, it can protect components in the previous stage before power converter 100 (e.g., “upstream” components), components in power conversion circuit 120, and components in the next stage after power converter 100 (e.g., “downstream” components) from damage under transient or fault conditions.

[0032] 2 is a block diagram illustrating a power converter 100 according to some embodiments of the present disclosure. In some embodiments shown in FIG. 2, each of the detection circuits 140a, 140b, and 140c is electrically connected to the controller 130 and electrically connected to an appropriate node in the power converter 100 and can detect voltage, current, or other signals in the power converter 100. Thus, the detection circuits 140a, 140b, and 140c can be configured to output a fault signal FS to the controller 130 based on these signals.

[0033] For example, the detection circuit 140a may be connected between the controller 130 and the first terminal 102 and configured to detect whether the input voltage Vin and / or the input current across the input capacitor Cin are within a proper range. The detection circuit 140b may be connected between the controller 130 and the input node of the power conversion circuit 120 and configured to detect whether the voltage V1 received by the power conversion circuit 120 is within a proper range. The detection circuit 140c may be connected between the controller 130 and the second terminal 104 and configured to detect whether the output voltage Vout and / or the output current Iout across the output capacitor Cout are within a proper range. It will be understood that the configurations of the detection circuits 140a, 140b, and 140c are merely examples and are not intended to limit the present disclosure. In various embodiments, the detection circuits 140a, 140b, and 140c can output a fault signal FS according to detection of an input voltage Vin, an output voltage Vout, a charge pump capacitor voltage, an input current Iin, an output current Iout, a thermal value, a soft start timeout, or any other suitable signal or event.

[0034] Thus, in response to a fault signal FS output by any of the detection circuits 140a, 140b, and 140c, the controller 130 can output a control signal CS to turn off the bidirectional disconnect switch in the protection circuit 110, interrupting the current path and power flow between the first terminal 102 and the power conversion circuit 120 in both directions. For example, the detection circuits 140a, 140b, and 140c can be used to determine whether the current and voltage levels in the power converter 100 are within a safe range. When the current exceeds one or more safe levels in either the forward or reverse direction, or the input or output voltage is outside the safe range (e.g., under-voltage or over-voltage), the bidirectional disconnect switch is turned off accordingly to protect the power converter 100. In addition, during a start-up or initialization phase, the power converter 100 can also hold the switch in the protection circuit 110 off if turning on the switch in the protection circuit 110 would cause an unsafe or undesirable reverse power flow from the output side back to the input side.

[0035] FIG. 3 illustrates an exemplary switching device 112 implemented in the protection circuit 110 according to some embodiments of the present disclosure. In some embodiments illustrated in FIG. 3, the switching device 112 includes two power metal oxide semiconductor field effect transistor (MOSFET) devices 310 and 320. The power MOSFET devices 310 and 320 are connected in an anti-series connection with body diodes D1 and D2. An "anti-series connection" may indicate that the anode terminals of the body diodes D1 and D2 are connected to each other, or the cathode terminals of the body diodes D1 and D2 are connected to each other. Thus, the body diodes D1 and D2 may have opposite forward directions. When the power MOSFET devices 310 and 320 are both off, the body diode D1 blocks current in one direction, and the body diode D2 blocks current in the other direction.

[0036] This back-to-back configuration of power MOSFET devices 310 and 320 allows switching device 112 to block power flow in both directions between the input and output terminals of power converter 100 of FIG. 1 to prevent potential damage caused under fault conditions. In some embodiments, the gate terminals of power MOSFET devices 310 and 320 may be electrically connected to one another and configured to receive a control signal CS, such that power MOSFET devices 310 and 320 may be controlled simultaneously, although the disclosure is not limited to this particular configuration. In some other embodiments, power MOSFET devices 310 and 320 may be independently controlled by separate signals from a controller (e.g., controller 130 in FIG. 1).

[0037] In some embodiments, power MOSFET devices 310 and 320 may be MOSFET devices having different power / voltage ratings, while in some other embodiments, power MOSFET devices 310 and 320 may be MOSFET devices having the same power / voltage rating. Additionally, power MOSFET devices 310 and 320 may also have different parameters such as on-resistance, size, etc.

[0038] In addition, different types of MOSFET devices can be used and different configurations can be applied to achieve the switching device 112 having a back-to-back configuration. FIGS. 4A-4I respectively show an example switching device 112 implemented by different types of MOSFET devices according to some embodiments of the present disclosure. In some embodiments shown in FIGS. 4A and 4B, the power MOSFET devices 310 and 320 are both n-type MOSFET devices. In FIG. 4A, the n-type MOSFET devices 310 and 320 can be connected back-to-back in a common source configuration, where the source terminals S of the MOSFETs are connected to each other. In FIG. 4B, the n-type MOSFET devices 310 and 320 can be connected back-to-back in a common drain configuration, where the drain terminals D of the MOSFETs are connected to each other.

[0039] In some embodiments, shown in Figures 4C and 4D, the power MOSFET devices 310 and 320 may both be p-type MOSFET devices. In Figure 4C, the p-type MOSFET devices 310 and 320 may be connected back-to-back in a common drain configuration, where the drain terminals D of the MOSFETs are connected together. In Figure 4D, the p-type MOSFET devices 310 and 320 may be connected back-to-back in a common source configuration, where the source terminals S of the MOSFETs are connected together.

[0040] In some embodiments, shown in Figures 4E-4H, the switching device 112 can be realized by one p-type MOSFET device and one n-type MOSFET device. For example, in Figure 4E, the drain terminal of the p-type MOSFET device can be connected to the source terminal of the n-type MOSFET device to achieve a back-to-back configuration with body diodes connected in an anti-series connection. In Figure 4F, the source terminal of the p-type MOSFET device can be connected to the drain terminal of the n-type MOSFET device to achieve a back-to-back configuration with body diodes connected in an anti-series connection. It will be understood that the arrangement order of the p-type MOSFET device and the n-type MOSFET device in the series connection can be changed as shown in Figures 4G and 4H, which are the same topology as the embodiment of Figures 4E and 4F. In some embodiments, shown in Figure 4I, the switching device 112 can include three or more switches 410, 420, 430, and 440 electrically connected in series, where the body diodes of the switches 410, 420, 430, and 440 are connected in an anti-series connection.

[0041] FIG 5A illustrates another example switching device 112 implemented in a protection circuit 110 according to some embodiments of the present disclosure. In some embodiments, as shown in FIG 5A, the switching device 112 may comprise a power MOSFET device 510 having a body bias selection circuit 520. The body bias selection circuit 520 may be configured to bias a body terminal of the power MOSFET device 510. FIG 5B and FIG 5C illustrate n-type and p-type power MOSFET devices, respectively, having a body bias selection circuit 520 according to some embodiments of the present disclosure.

[0042] 5B, when the power MOSFET device 510 is an n-type MOSFET device, the body bias selection circuit 520 can be configured to selectively connect the body terminal 518 to the source or drain terminal 512 or 514 having the lower voltage. For example, the body bias selection circuit 520 can include switches 522 and 524. When the voltage level of the first terminal 512 is lower than the voltage level of the second terminal 514, the switch 522 connected between the body terminal 518 and the first terminal 512 is on and the switch 524 connected between the body terminal 518 and the second terminal 514 is off. Thus, a reverse bias across the diode present between the source terminal 512 and the drain terminal 514 can be maintained. Similarly, when the voltage level of the first terminal 512 is higher than the voltage level of the second terminal 514, the switch 522 connected between the body terminal 518 and the first terminal 512 is off and the switch 524 connected between the body terminal 518 and the second terminal 514 is on, thereby maintaining a reverse bias across the diode present between the source terminal 512 and the drain terminal 514. In some other embodiments, it may be possible to connect the body terminal 518 to a most negative node, such as system ground, to maintain a reverse bias across the diode present between the source-drain terminal 512 and the drain terminal 514.

[0043] 5C, when the power MOSFET device 510 is a p-type MOSFET device, the body bias selection circuit 520 is configured to selectively connect the body terminal 518 to the source or drain terminal 512 or 514 having the higher voltage. For example, when the voltage level of the first terminal 512 is higher than the voltage level of the second terminal 514, the switch 522 connected between the body terminal 518 and the first terminal 512 can be turned on and the switch 524 connected between the body terminal 518 and the second terminal 514 can be turned off. When the voltage level of the first terminal 512 is lower than the voltage level of the second terminal 514, the switch 522 connected between the body terminal 518 and the first terminal 512 can be turned off and the switch 524 connected between the body terminal 518 and the second terminal 514 can be turned on. Thus, a reverse bias across the diode present between the source terminal 512 and the drain terminal 514 can be maintained by the power MOSFET device 510 through the body bias.

[0044] 6A and 6B illustrate another example switching device 112 implemented in a protection circuit 110 according to some embodiments of the present disclosure. In some embodiments, as shown in FIGS. 6A and 6B, the switching device 112 may comprise a micro-electromechanical system (MEMS) switch 610. The MEMS switch 610 has a first contact 612 coupled to a first end T1 of the switching device 112 and a second contact 614 coupled to a second end T2 of the switching device 112. The MEMS switch 610 may be configured to be switched between an on state (e.g., a “closed” state) and an off state (e.g., an “open” state) in response to a control signal CS.

[0045] Figure 6A shows the MEMS switch 610 in an on state, where the second contact 614 is electrically connected to the first contact 612. Figure 6B shows the MEMS switch 610 in an off state, where the second contact 614 is electrically isolated from the first contact 612. In response to a control signal CS, the MEMS switch 610 can be switched from a first state shown in Figure 6A to a second state shown in Figure 6B to disconnect the two ends of the switching device 112, thereby blocking current in both directions.

[0046] In some embodiments, the MEMS switch 610 may be an electrostatic MEMS switch, although the disclosure is not limited thereto. Various types of MEMS switches may be used as the switching device 112 implemented in the protection circuit 110. In the embodiment shown in FIG. 6A and FIG. 6B, when a sufficient DC voltage is applied to the control gate electrode 616 of the MEMS switch 610, an electrostatic force may be generated, which causes the suspended electrode 618 to bend downward and contact the second contact 614 below. Thus, the first contact 612 and the second contact 614 may be connected, which allows current to flow across the MEMS switch 610. On the other hand, when no voltage is applied to the control gate electrode 616, the suspended electrode 618 may remain in a stationary state, and the first contact 612 and the second contact 614 may be disconnected in the off state shown in FIG. 6B.

[0047] FIG 6C illustrates a power converter 600 having a MEMS switch 610 implemented in a protection circuit 110 according to some embodiments of the present disclosure. The high-voltage charge pump circuit 620 illustrated in FIG 6C can be electrically connected to the control gate electrode 616 of the MEMS switch 610 and can be configured to output a drive voltage VD (e.g., 100V) based on a power supply VDD to generate a sufficient electrostatic force to operate the MEMS switch 610 illustrated in FIG 6A in an ON state. When a corresponding signal CS is received, the high-voltage charge pump circuit 620 can be configured to stop supplying the drive voltage VD such that the MEMS switch 610 illustrated in FIG 6B is in an OFF state.

[0048] It will be understood that in various embodiments, other types of switches can also be applied to implement the switching device 112 in the protection circuit 110, and the embodiments shown in FIGS. 3-6C are exemplary and are not intended to limit the present disclosure. For example, in some other embodiments, the switching device 112 can comprise one or more of a bipolar junction transistor (BJT) power device, a high electron mobility transistor (HEMT) device, a GaN device, a junction gate field-effect transistor (JFET) device, or a metal semiconductor field effect transistor (MESFET) device. These types of transistor devices can function as bidirectional power switches with fast response times and do not provide a reverse current path in the off state. In addition, the switching device 112 can also be implemented by any combination of the switching components described above. In various applications described above, the switching components forming the switching device 112 can have different power / voltage ratings, on-resistances, sizes, etc.

[0049] FIG. 7 is a block diagram illustrating a power converter 700 according to some embodiments of the present disclosure. Compared with the power converter 100 of FIG. 1 and FIG. 2, in the power converter 700, the protection circuit 110 may include multiple switching devices 112 and 114 arranged at different positions. For example, one switching device 112 is connected between the first terminal 102 and the input node of the power conversion circuit 120, and another switching device 114 is connected between the second terminal 104 and the output node of the power conversion circuit 120. Similar to the switching device 112, the switching device 114 may be a bidirectional disconnect switch and may be configured to interrupt power flow in both directions in response to a control signal CS from the controller 130. Alternatively stated, in response to the control signal CS, the switching device 114 is configured to open a current path between the second terminal 104 and the output node of the power conversion circuit 120. The circuitry and / or components used to implement switching device 114 are similar to those used to implement switching device 112, which has been discussed in detail in FIGS. 3-6C.

[0050] The switching devices 112 and 114 on both the high and low voltage sides of the power conversion circuit 120 can provide backup redundancy protection for the protection circuit 110, further ensuring that undesirable currents do not flow into the power conversion circuit 120 because the power conversion circuit 120 is electrically disconnected from the first terminal 102 and the second terminal 104 if an abnormal condition is detected.

[0051] Figure 8A is a circuit diagram illustrating an example circuit configuration of power converter 700 of Figure 7, according to some embodiments of the present disclosure. Similar to the embodiment of Figure 1, in the embodiment of Figure 8A, power conversion circuit 120 may be a Dickson charge pump that controls the connection of a supply voltage across a load through capacitors C1-C4 using switches SW0-SW4, SWA-SWD. The Dickson charge pump may operate as described above in connection with Figure 1.

[0052] In some embodiments, power conversion circuitry 120 and switching devices 112 and / or 114 may share one or more power switches to further reduce cost and / or chip area of ​​the circuit design. Figures 8B-8D are circuit diagrams illustrating different example circuit configurations of power converter 700 of Figure 7 in accordance with some embodiments of the present disclosure.

[0053] For example, compared with the embodiment of FIG. 8A, in the circuit configuration shown in FIG. 8B, the switching device 112 can include a power MOSFET device 1122 and one of the switches in the switching network (e.g., switch SW4). In particular, the power MOSFET device 1122 and the switch SW4 can be on or off at the same time. The switch SW4 shown in FIG. 8B is also implemented by a MOSFET device, and the body diode of the power MOSFET device 1122 and the switch SW4 are connected in an inverse series connection. Thus, when the power MOSFET device 1122 and the switch SW4 are both off, the body diode in the back-to-back configuration blocks current in both directions. The power MOSFET device 1122 and the switch SW4 shown in FIG. 8B can share a source so that a single gate driver can be provided to drive the gate of the power MOSFET device 1122 and the switch SW4, but the present disclosure is not limited thereto. In other alternative embodiments, the power MOSFET device 1122 and the switch SW4 can share a drain to achieve an inverse series connection. In some other embodiments, the switch SW4 in the first stage of the switching network can also be replaced with a bidirectional disconnect switch. Thus, the bidirectional disconnect switch can function as a protection switch during a fault condition and can also function as a switching element in the charge pump under normal operation. For example, the switching device 112 shown in the circuit configuration in FIG. 8C can be merged and integrated in the power conversion circuit 120 to achieve bidirectional disconnection.

[0054] In the circuit configuration shown in FIG. 8D, the switching device 114 may include power MOSFET devices 1142, 1144, and 1146, and switches SW0, SWA, and SWC in a switching network. Similar to the switching device 112 in FIG. 8B, the switching device 114 may be merged into the power conversion circuit 120 by sharing switches SW0, SWA, and SWC. In FIG. 8D, the body diode of the power MOSFET device 1142 and switch SW0, both on or off, may form a back-to-back configuration in an anti-series connection. The body diode of the power MOSFET device 1144 and switch SWC, both on or off, may form a back-to-back configuration in an anti-series connection. The body diode of the power MOSFET device 1146 and switch SWA, both on or off, may form a back-to-back configuration in an anti-series connection. Thus, the circuit may prevent current from flowing in both directions through the power conversion circuit 120 by the switching device 114.

[0055] 9A and 9B are block diagrams illustrating power converters 900a and 900b according to some embodiments of the present disclosure. Compared with the power converter 700 of FIG. 7, in the power converters 900a and 900b, the protection circuit 110 may further include another switching device 116 disposed and connected between the power conversion circuit 120 and a ground terminal. Similar to the switching devices 112 and 114, the switching device 116 may also be a bidirectional disconnect switch and may be configured to interrupt power flow in both directions in response to a control signal CS from the controller 130. The circuit configuration and / or components used to realize the switching device 116 may be similar to those used to realize the switching devices 112 and 114.

[0056] During normal operation, the switching device 116 may be turned on to allow power flow between the power conversion circuit 120 and the ground terminal GND. When a fault occurs, the controller 130 may output a corresponding control signal CS to one or more of the switching devices 112, 114, and 116 in the protection circuit 110 to turn off the switching devices 112, 114, and 116 and prevent undesirable current from flowing through the power conversion circuit 120 in both directions.

[0057] For example, in the embodiment shown in FIG. 9A, when the input voltage Vin is shorted, the capacitor in the power conversion circuit 120 can be prevented from discharging by turning off the switching device 116 connected to ground, and can prevent current from flowing between the first terminal 102 and the second terminal 104 by turning off the switching device 114 connected to the second terminal 104. In the embodiment shown in FIG. 9B, when the input voltage Vin is shorted, the power converter 900b can turn off the switching device 112 connected to the first terminal 102, thereby preventing the capacitor in the power conversion circuit 120 from discharging and can also prevent current from flowing between the first terminal 102 and the second terminal 104. The switching devices 114 and 116 can also be turned off to provide backup redundancy protection for the protection circuit 110.

[0058] FIG. 10A is a circuit diagram illustrating an example circuit configuration of the power converter 900b of FIG. 9B according to some embodiments of the present disclosure. In the embodiment illustrated in FIG. 10A, the power conversion circuit 120 may be a Dickson charge pump that controls the connection of a supply voltage across the load through the capacitors C1-C4 using switches SW0-SW4, SWA-SWD. As illustrated in FIG. 10A, the switching device 116 may be electrically connected between a ground terminal and a node connecting the switches SWB and SWD. In response to a control signal CS, the switching device 116 may be configured to open a current path between the ground terminal GND and the switching network. Thus, the power converter 900b may prevent current from flowing through the power conversion circuit 120 via the ground terminal GND in both directions.

[0059] In some embodiments, the power conversion circuit 120 and the switching device 116 may share one or more power switches to further reduce the cost and / or chip area of ​​the circuit design. FIG. 10B is a circuit diagram illustrating another exemplary circuit configuration of the power converter 900b of FIG. 9B according to some embodiments of the present disclosure. For example, compared to the embodiment of FIG. 10A, in the circuit configuration shown in FIG. 10B, the switching device 116 may include power MOSFET devices 1162 and 1164 and switches SWB and SWD in a switching network. Similar to the switching device 112 of FIG. 8B and the switching device of FIG. 8D, the switching device 116 may be merged into the power conversion circuit 120 by sharing switches SWB and SWD. In FIG. 10B, the body diode of the power MOSFET device 1162 and the switch SWD, which are switched on or off together, may form a back-to-back configuration in an anti-series connection. The body diode of the power MOSFET device 1164 and the switch SWB, which are switched on or off together, may form another back-to-back configuration in an anti-series connection. Thus, power converter 900b can prevent current from flowing through power conversion circuitry 120 in both directions by controlling switching device 116, which can be implemented by multiple power switches.

[0060] 11 is a circuit diagram illustrating an example detection circuit 140 applied to detect a fault condition at capacitor C4 in power conversion circuit 120 according to some embodiments of the present disclosure. In various embodiments, a similar circuit can be used to monitor the voltage at each of capacitors C2, C3, and C4, or to monitor the input voltage Vin or the output voltage Vout. Again, in the embodiment of FIG. 11, a 5:1 step-down Dickson charge pump is shown as the power conversion circuit 120, but in some other embodiments, the step-up configuration can be applied to all possible charge pump ratios and series-parallel charge pump topologies.

[0061] 11, the detection circuit 140 may include resistors R1 and R2, a switch 142, a PMOS device 144, a filtering capacitor C5, and comparators CMP1 and CMP2. In some embodiments, the PMOS device 144 may be selected to operate at a higher voltage across C4. The resistor R1 may be electrically connected between a first terminal of the capacitor C4 and a source terminal of the PMOS device 144. The resistor R2 may be electrically connected between a ground terminal and a drain terminal of the PMOS device 144. The gate terminal of the PMOS device 144 may be electrically connected to a second terminal of the capacitor C4. The switch 142 may be electrically connected between the drain terminal of the PMOS device 144 and a first terminal of the filtering capacitor C5 in the detection circuit 140. The positive input terminal of the comparator CMP1 and the negative input terminal of the comparator CMP2 may also be electrically connected to a first terminal of the filtering capacitor C5 to receive the sampled signal. The negative input terminal of comparator CMP1 and the positive input terminal of comparator CMP2 can be configured to receive an overvoltage reference voltage Vref1 and an undervoltage reference voltage Vref2, respectively, which are threshold voltages for determining whether an overvoltage fault or an undervoltage fault occurs.

[0062] Typically, the current I1 through resistor R1 can be approximately proportional to the voltage across capacitor C4 with an error of the source-gate voltage of PMOS device 144. The current I2 through resistor R2 can be approximately the same as current I1. By appropriately selecting the value of resistor R2, the voltage V2 across resistor R2 can approximately provide a sampling signal of the voltage across capacitor C4, and can be scaled down as desired. Switch 142 can be used with filtering capacitor C5 to enable detection of voltage V2 when switch SWC is on (because voltage V2 can be forced to ground voltage when switch SWD is on). Comparators CMP1 and CMP2 can form a "window comparator" with reference voltages Vref1 and Vref2. An asserted overvoltage fault signal OV or undervoltage fault signal UV can indicate a fault condition, which can then trigger one or some of the implemented protection mechanisms.

[0063] For example, when a fault occurs, the detection circuit 140 electrically connected to the controller 130 outputs one or more fault signals (e.g., an overvoltage fault signal OV or an undervoltage fault signal UV), and the controller 130 can be configured to output a corresponding control signal CS in response to the one or more fault signals to turn off the switching device 112 in the protection circuit 110. In various embodiments, the detection circuit 140 can output the fault signal according to different signals, such as an input voltage Vin, an output voltage Vout, a charge pump capacitor voltage (e.g., a voltage across any one of the capacitors C1-C4), an input current, an output current, a thermal value, or a soft start timeout. Alternatively stated, the fault signal can include an input undervoltage signal, an input overvoltage signal, an output undervoltage signal, an output overvoltage signal, a thermal shutdown signal, an input or output overcurrent signal, a timeout signal, or a charge pump capacitor undervoltage or overvoltage signal, although the present disclosure is not limited to these particular types of fault signals and other types of signals can be used in conjunction with the disclosed embodiments.

[0064] 12 is a circuit diagram illustrating another exemplary detection circuit 140 applied to detect a fault condition in the output voltage Vout according to some embodiments of the present disclosure. In some embodiments, a similar circuit can be used to monitor the input voltage Vin. As shown in FIG. 12, the detection circuit 140 can include resistors R3, R4, and R5, and comparators CMP3 and CMP4. The resistors R3, R4, and R5 can be electrically connected in series between the second terminal 104 that outputs the output voltage Vout and ground.

[0065] By appropriately selecting the values ​​of resistors R3, R4 and R5, a voltage V3 across resistors R4 and R5 and a voltage V4 across resistor R5 can be obtained. The voltages V3 and V4 together can scale down the sampling signal of the output voltage Vout. For example, the values ​​of resistors R3, R4 and R5 can be selected to ensure that when the output voltage Vout is within the normal operating range, the sampled voltage V3 is greater than the reference voltage Vref3 (e.g., about 1.2V) and the reference voltage Vref3 is greater than the sampled voltage V4.

[0066] The positive input terminal of the comparator CMP3 and the negative input terminal of the comparator CMP4 are configured to receive a reference voltage Vref3, which is a threshold voltage for determining whether an overvoltage fault or an undervoltage fault occurs. The negative input terminal of the comparator CMP1 and the positive input terminal of the comparator CMP2 are respectively connected to two terminals of a resistor R4 and configured to receive voltages V3 and V4. Thus, when the output voltage Vout rises and exceeds a predetermined safe value, the rising sampled voltage V4 may exceed the reference voltage Vref3 and trigger the output terminal of the comparator CMP4 to output an overvoltage lockout signal OVLO. Similarly, when the output voltage Vout falls below a predetermined safe value, the falling sampled voltage V3 may fall below the reference voltage Vref3 and trigger the output terminal of the comparator CMP3 to output an undervoltage lockout signal UVLO. Thus, the detection circuit 140 in FIG. 12 can be configured to output a fault signal when a fault occurs in the output voltage Vout.

[0067] It should be understood that various types of detection circuits or sensors can be applied for fault detection, such as a temperature sensor for monitoring the temperature of the power converter. In some embodiments, the detection circuit can be further configured to detect the fault level, or whether the fault has been cleared, and output a corresponding signal to trigger different actions, such as automatic latch-off, automatic restart / reset, etc. For example, these actions can be set in response to a fault condition by one or more digital bits in the fault signal.

[0068] Figure 13 is a flow chart of a method 1300 for protecting a power converter according to some embodiments of the disclosure. It is understood that additional operations may be performed before, during, and / or after the method 1300 shown in Figure 13, and some other processes may only be briefly described herein. The method 1300 may be performed by the circuits and components in a charge pump power converter, such as the power converters 100, 700, 900a, and 900b shown in any of Figures 1-10B, although the disclosure is not limited to these particular circuits and the method 1300 may be performed in conjunction with other circuits.

[0069] At operation 1310, the method 1300 can convert an input voltage to an output voltage. In some embodiments, operation 1310 may include a charge pump power converter (e.g., the power conversion circuit 120 in FIG. 1 ) converting an input voltage Vin received from a first terminal (e.g., the first terminal 102 in FIG. 1 ) to an output voltage and providing an output voltage at a second terminal (e.g., the second terminal 104 in FIG. 1 ).

[0070] In operation 1320, the method 1300 can determine whether a fault has occurred. In some embodiments, operation 1320 can include one or more detection circuits (e.g., detection circuit 140 in FIG. 11 or FIG. 12) that monitor the operation of the power converter to determine whether a fault has occurred. For example, the detection circuit can detect a voltage signal, a current signal, a thermal value, or a soft start timeout event of the power converter. In some embodiments, the microcontroller or processor can include logic to receive information from one or more sensors and evaluate whether the received sensor data corresponds to a fault condition. For example, the processor can include a predefined value or combination of values ​​of voltage, current, temperature, and / or timeout data that defines when a fault condition occurs. The processor can compare the data to predefined conditions to determine whether the data matches a preprogrammed fault condition. In another example, the processor can compare the sensor data to a given limit when a certain number of limits are exceeded (e.g., a voltage above 30 volts and a temperature above 150 degrees Fahrenheit).

[0071] If no fault has occurred (operation 1320-no), method 1300 may proceed with the power converter repeating operations 1310 and 1320. When a fault is detected (operation 1320-yes), method 1300 may proceed to operation 1330, which may include the detection circuit outputting a fault signal. For example, the fault signal may be generated according to detection of an input voltage, an output voltage, a charge pump capacitor voltage, an input current, an output current, a thermal value, a soft start timeout, or any combination thereof.

[0072] At operation 1340, method 1300 may include outputting a control signal. In some embodiments, operation 1340 may include a controller (e.g., controller 130 in FIG. 1 ) outputting a control signal to a protection circuit (e.g., protection circuit 110 in FIG. 1 ) in response to a fault signal received from the detection circuit. For example, disclosed embodiments may receive the fault signal generated in operation 1330 and may generate and send a control signal to an appropriate protection circuit section based on the fault signal. In some embodiments, operation 1340 may include identifying a particular protection circuit section to which the control signal should be sent. For example, method 1300 may be used in conjunction with a circuit having multiple protection elements (e.g., switching devices 114 and 116 in power converter 900a, switching devices 112, 114 and 116 in power converter 900b), and operation 1340 may include identifying which switch to direct the control signal to.

[0073] At operation 1350, a protection circuit electrically connected to the power conversion circuit blocks power flow in both directions in response to the control signal output by the controller. Alternatively stated, the protection circuit blocks power flow from the first terminal to the second terminal and from the second terminal to the first terminal.

[0074] In some embodiments, when an output overvoltage occurs and is detected, power flow is interrupted to prevent energy from flowing back to the input until the output voltage returns to a safe level. For example, after activation of the protection circuit, a switching charge pump circuit can be used to allow the load to continue to drain energy from the power converter, causing the output voltage and the voltage within the charge pump circuit to drop accordingly to an appropriate voltage level. When the output voltage is low enough and does not cause backflow current, the power converter resumes its normal operation and reengages in power flow from the first terminal to the second terminal when the control signal is released.

[0075] Through the above-described operation, the protection circuit can interrupt the current path in both directions to protect components in the power conversion circuit and also protect upstream components in the previous stage before the power converter and downstream components in the next stage after the power converter. Thus, the power converter can avoid potential damage under fault conditions such as current exceeding one or more safe levels in either the forward or reverse direction, or input or output voltage rapidly changing and going out of a safe range. In addition, during start-up or initialization phase, the power converter can also keep the switching device off if turning on the switching device would result in unsafe or undesirable reverse power flow from the output side back to the input side.

[0076] The disclosed methods and processes (e.g., method 1300) can be implemented in hardware, software instructions, or a combination of the two. In some embodiments, method 1300 can be implemented in fixed circuitry, such as using the circuitry discussed throughout this disclosure. In some embodiments, the methods and processes can be implemented through programmable instructions, such as volatile memory, non-volatile memory, hard-coded media, and other mechanisms for storing software instructions. In some embodiments, the methods and processes can be implemented in a combination of hardware and software. For example, the fixed circuitry can be operated by a programmable controller. The controller can load instructions from on-board or off-board storage to control the circuitry to collectively perform the disclosed methods and processes.

[0077] In the above specification, the embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. Certain adaptations and modifications of the described embodiments may be made. Other embodiments may become apparent to those skilled in the art upon consideration of the specification and practice of the disclosure disclosed herein. Additionally, the order of steps depicted in the figures is intended for illustrative purposes only and is not intended to be limited to any particular order of steps. Thus, those skilled in the art may understand that the steps may be performed in different orders while implementing the same method.

[0078] It is understood that certain features herein that are described for clarity in the context of separate embodiments can also be provided in combination in a single embodiment. Conversely, various features herein that are described for brevity in the context of a single embodiment can also be provided separately or in any suitable subcombination, or in any other described embodiment herein as appropriate. Certain features described in the context of various embodiments are not to be construed as essential features of those embodiments, unless the embodiment is inoperable without those elements.

[0079] The embodiments can be further described using the following clauses. 1. A power converter comprising: a first terminal for receiving an input voltage; a second terminal for outputting an output voltage; a charge pump power conversion circuit electrically connected between the first terminal and the second terminal, the charge pump power conversion circuit converting an input voltage into an output voltage; a protection circuit electrically connected to the charge pump power conversion circuit, the protection circuit including a first switching device responsive to a control signal to interrupt power flow from the first terminal to the second terminal and from the second terminal to the first terminal; 1. A power converter comprising: 2. The power converter of clause 1, wherein the first switching device comprises a first power metal-oxide-semiconductor field effect transistor (MOSFET) device and a second power MOSFET device with body diodes connected in an anti-series connection. 3. The power converter of clause 2, wherein the first power MOSFET device and the second power MOSFET device are MOSFET devices having different power ratings. 4. The power converter of clauses 2 or 3, wherein the first power MOSFET device and the second power MOSFET device are both n-type MOSFET devices or both p-type MOSFET devices. 5. The power converter of any of clauses 2-4, wherein the first power MOSFET device and the second power MOSFET device are connected back-to-back in a common source configuration or a common drain configuration. 6. The power converter of clause 1, wherein the first switching device comprises a first power MOSFET device having a body bias selection circuit that biases a body terminal of the first power MOSFET device. 7. The power converter of clause 6, wherein the first power MOSFET device is a p-type MOSFET device, and the body bias selection circuit selectively connects the body terminal to either the source or drain terminal having the higher voltage. 8. The power converter of clause 6, wherein the first power MOSFET device is an n-type MOSFET device, and the body bias selection circuit selectively connects the body terminal to either the source or drain terminal having the lower voltage. 9. A first switching device, a microelectromechanical system (MEMS) switch that is switched from a first state to a second state in response to a control signal, the MEMS switch comprising: a first contact coupled to a first end of the first switching device; and a second contact coupled to a second end of the first switching device, the second contact being electrically connected to the first contact in a first state and electrically isolated from the first contact in a second state. 10. The power converter of clause 1, wherein the first switching device comprises one or more of a bipolar junction transistor (BJT) power device, a high electron mobility transistor (HEMT) device, a GaN device, a junction gate field effect transistor (JFET) device, or a metal semiconductor field effect transistor (MESFET) device. 11. The power converter of any of clauses 1-10, wherein the first switching device is electrically connected between the first terminal and the charge pump power conversion circuit or electrically connected between the second terminal and the charge pump power conversion circuit. 12. The protection circuit is a second switching device responsive to the control signal to interrupt power flow from the first terminal to the second terminal and from the second terminal to the first terminal; The power converter of any of clauses 1-11, wherein a first switching device is electrically connected between the first terminal and the charge pump power conversion circuit, and a second switching device is electrically connected between the second terminal and the charge pump power conversion circuit. 13. The protection circuit is 12. The power converter of any of clauses 1-11, further comprising a second switching device electrically connected between the charge pump power conversion circuitry and a ground terminal, and responsive to a control signal, interrupting power flow between the charge pump power conversion circuitry and the ground terminal. 14. A controller is further provided to output a control signal to the protection circuit in response to the fault signal; 14. The power converter of any of clauses 1-13, wherein the fault signal comprises an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal. 15. The power converter of clause 14, wherein the fault signal comprises a combination of two or more of an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal. 16. The power converter of clause 14 or 15, further comprising one or more detection circuits electrically connected to the controller and configured to output a fault signal according to detection of an input voltage, an output voltage, a charge pump capacitor voltage, an input current, an output current, a thermal value, or a soft start timeout. 17. A power converter comprising: a controller that implements a dead-time interval based at least in part on the one or more timing signals and that, in response to detecting a fault, outputs a control signal to interrupt power flow in either direction between the first terminal of the power converter and the second terminal of the power converter; a switched capacitor network electrically connected to the controller to convert a first voltage at a first terminal to a second voltage at a second terminal, the switched capacitor network comprising: 1. A power converter comprising a plurality of switches for switching between a first configuration and a second configuration, wherein a controller controls the plurality of switches to connect a plurality of capacitors to form a first capacitor network in the first configuration and a second capacitor network in the second configuration. 18. The semiconductor device further includes a first switching device electrically connected to the first terminal or the second terminal and configured to open a current path between the switched capacitor network and the first terminal or the second terminal in response to a control signal; 18. The power converter of claim 17, wherein the first switching device comprises at least one of a plurality of switches in a switched capacitor network. 19. The power converter of clause 18, further comprising a second switching device connected to the ground terminal and responsive to a control signal to open a current path between the ground terminal and the switched capacitor network, the second switching device comprising at least one of a plurality of switches in the switched capacitor network. 20. Multiple switches 20. The power converter of any of clauses 17-19, comprising a first power metal-oxide-semiconductor field effect transistor (MOSFET) device and a second power MOSFET device, the body diodes connected in an anti-series connection to open a current path between the first terminal and the second terminal in response to a control signal. 21. Multiple switches 21. The power converter of claim 20, comprising a third power MOSFET device and a fourth power MOSFET device having body diodes connected in an anti-series connection to open a current path between the first terminal and the ground terminal in response to a control signal. 22. The method further comprises: one or more detection circuits electrically connected to the controller, the detection circuits outputting one or more fault signals when a fault occurs according to the first voltage, the second voltage, the charge pump capacitor voltage, the input current, the output current, the thermal value, or the soft start timeout; 22. The power converter of any of clauses 17-21, wherein the controller outputs a control signal in response to one or more fault signals. 23. The power converter of clause 22, wherein the one or more fault signals include an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal. 24. A power converter comprising: a power conversion circuit having first, second and third terminals, the power converter converting a first voltage received from at least one of the first, second and third terminals to a second voltage output from at least one of the first, second and third terminals; two or more switching circuits electrically connected to the power conversion circuit and responsive to a fault to provide or interrupt a bidirectional current path between one of the first, second, and third terminals and another of the first, second, and third terminals according to a control signal; one or more detection circuits electrically connected to one of the first, second, and third terminals to detect whether a fault occurs; 1. A power converter comprising: 25. A power converter of clause 24, in which the two or more switching circuits comprise a pair of power metal-oxide-semiconductor field-effect transistor (MOSFET) devices with their body diodes connected in an anti-series connection. 26. The power converter of clause 24, wherein the two or more switching circuits include a first power MOSFET device having a body bias selection circuit that biases a body terminal of the first power MOSFET device. 27. The power converter of clause 24, wherein the two or more switching circuits comprise microelectromechanical system (MEMS) switches that are switched between on and off states in response to a control signal. 28. The power converter of clause 24, wherein the two or more switching circuits comprise one or more of bipolar junction transistor (BJT) power devices, high electron mobility transistor (HEMT) devices, GaN devices, junction gate field effect transistor (JFET) devices, or metal semiconductor field effect transistor (MESFET) devices. 29. Two or more switching circuits, a first switching device electrically connected between the power conversion circuit and one of the first, second, and third terminals, the first switching device responsive to a fault to disconnect the power conversion circuit from one of the first, second, and third terminals; a second switching device electrically connected between the power conversion circuit and another one of the first, second, and third terminals, and configured to disconnect the power conversion circuit from the other one of the first, second, and third terminals in response to a fault; 29. The power converter of any of clauses 24 to 28, comprising: 30. Two or more switching circuits, The power converter of clause 29, further comprising a third switching device electrically connected between the power conversion circuit and yet another one of the first, second and third terminals, and responsive to a fault, disconnecting the power conversion circuit from the yet another one of the first, second and third terminals. 31. The power converter of any of clauses 24-30, wherein the power conversion circuit and one of the two or more switching circuits share at least one power switch. 32. A power conversion circuit comprising a switched capacitor network, the switched capacitor network comprising: a plurality of switches for switching between a first configuration and a second configuration; a plurality of capacitors forming a first capacitor network in response to a first configuration of the plurality of switches and forming a second capacitor network in response to a second configuration of the plurality of switches; 32. The power converter of any of clauses 24 to 31, comprising: 33. A method for protecting a charge pump power conversion circuit that receives a first voltage from a first terminal and provides a second voltage at a second terminal, comprising: converting the first voltage to a second voltage by a charge pump power conversion circuit; interrupting power flow from the first terminal to the second terminal and from the second terminal to the first terminal with a protection circuit electrically connected to the charge pump power conversion circuit in response to the control signal; A method comprising: 34. The method further includes the step of outputting a control signal to the protection circuit in response to the fault signal; 34. The method of clause 33, wherein the fault signal comprises an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal. 35. The method of clause 34, wherein the fault signal comprises a combination of two or more of an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal. 36. The method of clause 34 or 35, further comprising the step of outputting a fault signal in response to detection of the first voltage, the second voltage, the charge pump capacitor voltage, the input current, the output current, a thermal value, or a soft start timeout.

[0080] The above summarizes the features of some embodiments so that those skilled in the art can better understand the aspects of the present disclosure. Those skilled in the art should understand that the present disclosure can be easily used as a basis for designing or modifying other processes and structures to carry out the same purpose and / or achieve the same advantages of the embodiments introduced herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of the present disclosure, and that various modifications, substitutions, and alterations can be made without departing from the spirit and scope of the present disclosure.

Claims

1. 1. A power converter comprising: a first terminal for receiving an input voltage; a second terminal for outputting an output voltage; a charge pump power conversion circuit electrically connected between the first terminal and the second terminal, the charge pump power conversion circuit converting the input voltage into the output voltage; a protection circuit electrically connected to the charge pump power conversion circuit, the protection circuit having a first switching device responsive to a control signal to interrupt power flow from the first terminal to the second terminal and from the second terminal to the first terminal; The power converter.

2. 2. The power converter of claim 1 , wherein the first switching device comprises a first power metal-oxide-semiconductor field effect transistor (MOSFET) device and a second power MOSFET device with body diodes connected in an anti-series connection.

3. 3. The power converter of claim 2, wherein the first power MOSFET device and the second power MOSFET device are MOSFET devices having different power ratings.

4. 3. The power converter of claim 2, wherein the first power MOSFET device and the second power MOSFET device are both n-type MOSFET devices or both p-type MOSFET devices.

5. 3. The power converter of claim 2, wherein the first power MOSFET device and the second power MOSFET device are connected back-to-back in a common source or common drain configuration.

6. 2. The power converter of claim 1, wherein the first switching device comprises a first power MOSFET device having a body bias selection circuit that biases a body terminal of the first power MOSFET device.

7. 7. The power converter of claim 6, wherein the first power MOSFET device is a p-type MOSFET device and the body bias selection circuit selectively connects the body terminal to either the source or drain terminal having a higher voltage.

8. 7. The power converter of claim 6, wherein the first power MOSFET device is an n-type MOSFET device and the body bias selection circuit selectively connects the body terminal to the source or drain terminal having a lower voltage.

9. The first switching device comprises: a microelectromechanical system (MEMS) switch that is switched from a first state to a second state in response to the control signal, the MEMS switch comprising: a first contact coupled to a first end of the first switching device; 2. The power converter of claim 1 , wherein the first switching device is electrically connected to the first contact in the first state and electrically isolated from the first contact in the second state.

10. 2. The power converter of claim 1, wherein the first switching device comprises one or more of a bipolar junction transistor (BJT) power device, a high electron mobility transistor (HEMT) device, a GaN device, a junction gate field effect transistor (JFET) device, or a metal semiconductor field effect transistor (MESFET) device.

11. 2. The power converter of claim 1, wherein the first switching device is electrically connected between the first terminal and the charge pump power conversion circuit or between the second terminal and the charge pump power conversion circuit.

12. The protection circuit comprises: a second switching device responsive to the control signal to interrupt the flow of power from the first terminal to the second terminal and from the second terminal to the first terminal; 2. The power converter of claim 1, wherein the first switching device is electrically connected between the first terminal and the charge pump power conversion circuit, and the second switching device is electrically connected between the second terminal and the charge pump power conversion circuit.

13. The protection circuit comprises:

2. The power converter of claim 1, further comprising: a second switching device electrically connected between the charge pump power conversion circuitry and a ground terminal, responsive to the control signal to interrupt power flow between the charge pump power conversion circuitry and the ground terminal.

14. a controller that outputs the control signal to the protection circuit in response to a fault signal; 2. The power converter of claim 1, wherein the fault signal comprises an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal.

15. 15. The power converter of claim 14, wherein the fault signals include a combination of two or more of the input under-voltage signal, the input over-voltage signal, the output under-voltage signal, the output over-voltage signal, the thermal shutdown signal, the input or output over-current signal, the timeout signal, or the charge pump capacitor under-voltage or over-voltage signal.

16. 15. The power converter of claim 14, further comprising one or more detection circuits electrically connected to the controller and configured to output the fault signal in response to detection of the input voltage, the output voltage, a charge pump capacitor voltage, an input current, an output current, a thermal value, or a soft start timeout.

17. 1. A power converter comprising: a controller that implements dead-time intervals based at least in part on one or more timing signals and that, in response to detecting a fault, outputs a control signal to interrupt power flow in either direction between a first terminal of the power converter and a second terminal of the power converter; a switched capacitor network electrically connected to the controller and configured to convert a first voltage at the first terminal to a second voltage at the second terminal, the switched capacitor network comprising:

1. The power converter comprising a plurality of switches configured to switch between a first configuration and a second configuration, the controller controlling the plurality of switches to connect a plurality of capacitors to form a first capacitor network in the first configuration and a second capacitor network in the second configuration.

18. a first switching device electrically connected to the first terminal or the second terminal, the first switching device responsive to the control signal to open a current path between the switched capacitor network and the first terminal or the second terminal; The power converter of claim 17 , wherein the first switching device comprises at least one of the plurality of switches in the switched capacitor network.

19. 20. The power converter of claim 18, further comprising a second switching device coupled to a ground terminal and responsive to the control signal to open a current path between the ground terminal and the switched capacitor network, the second switching device comprising at least one of the plurality of switches in the switched capacitor network.

20. The plurality of switches are 20. The power converter of claim 17, comprising a first power metal-oxide-semiconductor field effect transistor (MOSFET) device and a second power MOSFET device having body diodes connected in an anti-series connection to open a current path between the first terminal and the second terminal in response to the control signal.

21. The plurality of switches are 21. The power converter of claim 20, comprising a third power MOSFET device and a fourth power MOSFET device having body diodes connected in an anti-series connection to open a current path between the first terminal and a ground terminal in response to the control signal.

22. one or more detection circuits electrically connected to the controller, the detection circuits outputting one or more fault signals when the fault occurs according to the first voltage, the second voltage, a charge pump capacitor voltage, an input current, an output current, a thermal value, or a soft start timeout; The power converter of claim 17 , wherein the controller outputs the control signal in response to the one or more fault signals.

23. 23. The power converter of claim 22, wherein the one or more fault signals include an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal.

24. 1. A power converter comprising: a power conversion circuit having first, second and third terminals, converting a first voltage received from at least one of the first, second and third terminals into a second voltage output from at least one of the first, second and third terminals; two or more switching circuits electrically connected to the power conversion circuit and responsive to a fault to provide or interrupt a bidirectional current path between one of the first, second, and third terminals and another of the first, second, and third terminals according to a control signal; one or more detection circuits electrically connected to the one of the first, second, and third terminals, the detection circuits detecting whether the fault occurs; The power converter.

25. 25. The power converter of claim 24, wherein the two or more switching circuits comprise a pair of power metal oxide semiconductor field effect transistor (MOSFET) devices with body diodes connected in an anti-series connection.

26. 25. The power converter of claim 24, wherein the two or more switching circuits comprise a first power MOSFET device having a body bias selection circuit that biases a body terminal of the first power MOSFET device.

27. 25. The power converter of claim 24, wherein the two or more switching circuits comprise micro-electromechanical system (MEMS) switches switched between on and off states in response to the control signal.

28. 25. The power converter of claim 24, wherein the two or more switching circuits comprise one or more of bipolar junction transistor (BJT) power devices, high electron mobility transistor (HEMT) devices, GaN devices, junction gate field effect transistor (JFET) devices, or metal semiconductor field effect transistor (MESFET) devices.

29. The two or more switching circuits are a first switching device electrically connected between the power conversion circuit and one of the first, second, and third terminals, the first switching device responsive to the fault to disconnect the power conversion circuit from the one of the first, second, and third terminals; a second switching device electrically connected between the power conversion circuit and another one of the first, second, and third terminals, and responsive to the fault, disconnecting the power conversion circuit from the other one of the first, second, and third terminals; 25. The power converter of claim 24 comprising:

30. The two or more switching circuits are a third switching device electrically connected between the power conversion circuit and a still further one of the first, second, and third terminals, the third switching device responsive to the fault for disconnecting the power conversion circuit from the still further one of the first, second, and third terminals.

30. The power converter of claim 29 comprising:

31. The power converter of claim 24 , wherein the power conversion circuit and one of the two or more switching circuits share at least one power switch.

32. The power conversion circuit comprises a switched capacitor network, the switched capacitor network comprising: a plurality of switches for switching between a first configuration and a second configuration; a plurality of capacitors forming a first capacitor network in response to the first configuration of the plurality of switches and forming a second capacitor network in response to the second configuration of the plurality of switches; 25. The power converter of claim 24 comprising:

33. 1. A method for protecting a charge pump power conversion circuit that receives a first voltage from a first terminal and provides a second voltage at a second terminal, comprising: converting the first voltage to the second voltage by the charge pump power conversion circuit; interrupting power flow from the first terminal to the second terminal and from the second terminal to the first terminal with a protection circuit electrically connected to the charge pump power conversion circuit in response to a control signal; The method comprising:

34. further comprising the step of outputting the control signal to the protection circuit in response to a fault signal; 34. The method of claim 33, wherein the fault signal comprises an input under-voltage signal, an input over-voltage signal, an output under-voltage signal, an output over-voltage signal, a thermal shutdown signal, an input or output over-current signal, a time-out signal, or a charge pump capacitor under-voltage or over-voltage signal.

35. 35. The method of claim 34, wherein the fault signal comprises a combination of two or more of the input under-voltage signal, the input over-voltage signal, the output under-voltage signal, the output over-voltage signal, the thermal shutdown signal, the input or output over-current signal, the timeout signal, or the charge pump capacitor under-voltage or over-voltage signal.

36. 35. The method of claim 34, further comprising outputting the fault signal according to detection of the first voltage, the second voltage, a charge pump capacitor voltage, an input current, an output current, a thermal value, or a soft start timeout.

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