Display panel and display device

Abstract

The display panel includes a base (310), a circuit structure layer (20), a light emitting structure layer, and a plurality of conductive layers. The conductive layer is located between the circuit structure layer (20) and the light emitting structure layer and includes a plurality of conductive lines. At least one second pixel driving circuit of the plurality of second pixel driving circuits is electrically connected to at least one second light emitting device of the second light emitting devices through the conductive lines, and the at least one second pixel driving circuit is configured to drive the emission of the at least one second light emitting device. There is an overlapping portion in the orthogonal projection on the base (310) of the conductive lines of at least two of the plurality of conductive layers extending along a first direction (D1).

Description

[Technical field]

[0001] This application claims priority to an international patent application filed on March 1, 2022, bearing application number PCT / CN2022 / 078680, and entitled "Display panel and its manufacturing method, and display device," the contents of which are hereby incorporated by reference.

[0002] The present disclosure relates to the field of display technology, but is not limited thereto, and in particular to display panels and display devices. [Background technology]

[0003] Organic Light Emitting Diodes (OLED) and Quantum-dot Light Emitting Diodes (QLED) are active light-emitting display devices, which have the advantages of autonomous light emission, wide viewing angle, high contrast ratio, low power consumption, extremely fast response speed, lightweight, bendable, and low cost. Under-screen camera technology is a new technology proposed to increase the screen-to-body ratio of display devices. Summary of the Invention [Problem to be solved by the invention]

[0004] The following is a summary of the subject matter described herein. This summary is not intended to limit the scope of protection of the claims. [Means for solving the problem]

[0005] An embodiment of the present disclosure provides a display panel and a display device.

[0006] In one aspect, an embodiment of the present disclosure provides a display panel having a display area, the display area including a first area and a second area that do not overlap each other, the first area being located at at least one side of the second area. The display panel includes a base, a circuit structure layer, a light emitting structure layer, and a plurality of conductive layers. The circuit structure layer is located at one side of the base and includes a plurality of second pixel driving circuits located in the first area. The light emitting structure layer is located on a side of the circuit structure layer away from the base and includes a plurality of second light emitting devices located in the second area. The plurality of conductive layers are located between the circuit structure layer and the light emitting structure layer and include a plurality of conductive lines. At least one second pixel driving circuit of the plurality of second pixel driving circuits is electrically connected to at least one second light emitting device of the plurality of second light emitting devices via a conductive line of the at least one conductive layer of the plurality of conductive layers, and the at least one second pixel driving circuit is configured to drive the emission of the at least one second light emitting device. There is an overlapping portion in the orthogonal projection on the base of the conductive lines of at least two conductive layers of the plurality of conductive layers extending along a first direction.

[0007] In some exemplary embodiments, the plurality of second light-emitting devices in the second region include a plurality of first type of second light-emitting devices and a plurality of second type of second light-emitting devices, the first type of second light-emitting devices configured to emit light of a first color and the second type of second light-emitting devices configured to emit light of a second color, the second color of light being different from the first color of light.

[0008] In some exemplary embodiments, the plurality of second light emitting devices in the second region include a plurality of sets of second light emitting devices, the second light emitting devices in each set of the plurality of sets of second light emitting devices being arranged along the first direction and the second light emitting devices in the plurality of sets being arranged along a second direction, the second direction intersecting the first direction. In the at least one set of second light emitting devices, a plurality of second pixel driving circuits electrically connected to the plurality of first type second light emitting devices are closer to the second region than each second pixel driving circuit of a plurality of second pixel driving circuits electrically connected to the plurality of second type second light emitting devices.

[0009] In some exemplary embodiments, the plurality of conductive layers include a first transparent conductive layer, a second transparent conductive layer, and a third transparent conductive layer disposed in sequence along a side away from the base. The first transparent conductive layer includes a plurality of first transparent conductive lines, the second transparent conductive layer includes a plurality of second transparent conductive lines, and the third transparent conductive layer includes a plurality of third transparent conductive lines. An overlapping portion exists in an orthogonal projection on the base between a portion where the first transparent conductive line of the first transparent conductive layer extends along the first direction and a portion where the second transparent conductive line of the second transparent conductive layer extends along the first direction. An overlapping portion does not exist in an orthogonal projection on the base between a portion where the third transparent conductive line of the third transparent conductive layer extends along the first direction and a portion where the first transparent conductive line of the first transparent conductive layer and the second transparent conductive line of the second transparent conductive layer extend along the first direction.

[0010] In some exemplary embodiments, of the at least one set of second light-emitting devices in the second region, a first type of multiple second light-emitting devices near an edge of the second region are electrically connected to a first type of multiple second pixel driving circuits via second transparent conductive lines of the second transparent conductive layer, and a first type of multiple second light-emitting devices near a center of the second region are electrically connected to a first type of multiple second pixel driving circuits via first transparent conductive lines of the first transparent conductive layer.

[0011] In some exemplary embodiments, the second transparent conductive lines and the first transparent conductive lines electrically connected to the plurality of first type second light-emitting devices of at least one set of second light-emitting devices in the second region are located on opposite sides or on the same side of the second light-emitting devices of the set in the second direction.

[0012] In some exemplary embodiments, of the at least one set of second light-emitting devices in the second region, a plurality of second type second light-emitting devices near an edge of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via second transparent conductive lines of the second transparent conductive layer, and a plurality of second type second light-emitting devices near a center of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via third transparent conductive lines of the third transparent conductive layer.

[0013] In some exemplary embodiments, the second transparent conductive lines and the third transparent conductive lines electrically connected to the plurality of second type second light-emitting devices of at least one set of second light-emitting devices in the second region are located on opposite sides or on the same side of the second light-emitting devices of the set in the second direction.

[0014] In some exemplary embodiments, of at least one set of second light-emitting devices in the second region, the second transparent conductive lines electrically connected to the first type of second light-emitting devices and the second transparent conductive lines electrically connected to the second type of second light-emitting devices are located on opposite sides of the second light-emitting devices of the set in the second direction.

[0015] In some exemplary embodiments, of at least one set of second light-emitting devices in the second region, a first transparent conductive line electrically connected to a first type of second light-emitting device and a third transparent conductive line electrically connected to a second type of second light-emitting device are located on the same side of the second light-emitting device of the set in the second direction.

[0016] In some exemplary embodiments, among the at least one set of second light-emitting devices in the second region, a first type of multiple second light-emitting devices near an edge of the second region are electrically connected to a first type of multiple second pixel driving circuits in the first region via first transparent conductive lines in the first transparent conductive layer, and a first type of multiple second light-emitting devices near a center of the second region are electrically connected to a first type of multiple second pixel driving circuits in the first region via second transparent conductive lines in the second transparent conductive layer. The first transparent conductive lines and the second transparent conductive lines electrically connected to the first type of second light-emitting devices are located on the same side of the set of second light-emitting devices in the second direction.

[0017] In some exemplary embodiments, among the at least one set of second light-emitting devices in the second region, a plurality of second type second light-emitting devices near an edge of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via second transparent conductive lines in the second transparent conductive layer, and a plurality of second type second light-emitting devices near a center of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via third transparent conductive lines in the third transparent conductive layer. The second transparent conductive lines electrically connected to the second type second light-emitting devices and the second transparent conductive lines electrically connected to the first type second light-emitting devices are located on opposite sides of the set of second light-emitting devices in the second direction.

[0018] In some exemplary embodiments, the second region is partitioned into a first sub-region and a second sub-region, the second sub-region surrounding the first sub-region and adjacent to the first region, and a parasitic capacitance between an anode connection node of at least one first type of second light-emitting device located in the first sub-region and an anode connection node of the second type of second light-emitting device is less than or equal to a maximum parasitic capacitance between an anode connection node of a first type of second light-emitting device located in the second sub-region and an anode connection node of a second type of second light-emitting device.

[0019] In some exemplary embodiments, the first color of light is green light and the second color of light includes at least one of blue light and red light.

[0020] In some exemplary embodiments, the circuit structure layer further includes a plurality of first pixel driving circuits located in the first region, and the light emitting structure layer further includes a plurality of first light emitting devices located in the first region, at least one first pixel driving circuit of the plurality of first pixel driving circuits is electrically connected to at least one first light emitting device of the plurality of first light emitting devices, and the at least one first pixel driving circuit is configured to drive the emission of the at least one first light emitting device.

[0021] In another aspect, an embodiment of the present disclosure provides a display device, comprising the display panel described above.

[0022] In some exemplary embodiments, the display device further comprises a sensor located on a non-display side of the display panel, wherein there is an overlap between an orthogonal projection of the sensor on the display panel and a second region of the display panel.

[0023] Other aspects will be understood after reading and understanding the drawings and detailed description.

[0024] The drawings are intended to provide a further understanding of the technical solution of the present disclosure, to be a part of the specification, and to interpret the technical solution of the present disclosure together with the embodiments of the present disclosure, and are not intended to limit the technical solution of the present disclosure. The shape and size of one or more parts in the drawings do not reflect actual proportions, and are intended to diagrammatically explain the contents of the present disclosure. [Brief description of the drawings]

[0025] [Figure 1] FIG. 1 is a perspective view of a display panel in accordance with at least one embodiment of the present disclosure. [Diagram 2] FIG. 1 is a schematic diagram of a display panel in accordance with at least one embodiment of the present disclosure. [Diagram 3] FIG. 2 is an equivalent circuit diagram of a pixel driving circuit in accordance with at least one embodiment of the present disclosure. [Figure 4] 1 is a schematic partial view of a display panel in accordance with at least one embodiment of the present disclosure. [Diagram 5] FIG. 13 is a schematic diagram of a simulation of the effect of a light emitting device emitting blue light on a light emitting device emitting green light. [Figure 6A] FIG. 2 is a schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. [Figure 6B] 6B is a schematic diagram showing the connection of the first transparent conductive wires of the first transparent conductive layer in FIG. 6A. FIG. [Figure 6C] 6B is a schematic diagram showing the connection of the second transparent conductive wire of the second transparent conductive layer in FIG. 6A. FIG. [Figure 6D] 6B is a schematic diagram showing the connection of a third transparent conductive line of the third transparent conductive layer in FIG. 6A. FIG. [Figure 7] 6B is a schematic diagram of a parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection nodes of the second blue and red light-emitting devices of the display panel shown in FIG. 6A. [Figure 8A] FIG. 11 is another schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. [Figure 8B] 8B is a schematic diagram showing the connection of the first transparent conductive wires of the first transparent conductive layer in FIG. 8A. FIG. [Figure 8C] 8B is a schematic diagram showing the connection of the second transparent conductive wire of the second transparent conductive layer in FIG. 8A. [Figure 8D] 8B is a schematic diagram showing the connection of a third transparent conductive line of a third transparent conductive layer in FIG. 8A. FIG. [Figure 9] FIG. 8B is a schematic diagram of a parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection nodes of the second blue and red light-emitting devices of the display panel shown in FIG. 8A. [Figure 10A] FIG. 11 is another schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. [Figure 10B] 10B is a schematic diagram showing the connection of the first transparent conductive wires of the first transparent conductive layer in FIG. 10A. [Figure 10C] 10B is a schematic diagram showing the connection of the second transparent conductive wire of the second transparent conductive layer in FIG. 10A. [Figure 10D]10B is a schematic diagram showing the connection of a third transparent conductive line of the third transparent conductive layer in FIG. 10A. FIG. [Figure 11] 10B is a schematic diagram of a parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection nodes of the second blue and red light-emitting devices of the display panel shown in FIG. 10A. [Figure 12] 1 is a schematic partial view of a display panel in accordance with at least one embodiment of the present disclosure. [Figure 13A] 13 is a schematic local top view of region S1 in FIG. 12. FIG. [Figure 13B] 13 is a schematic local top view of region S2 in FIG. 12. FIG. [Figure 14A] 13B is a schematic local cross-sectional view taken along the PP' direction in FIG. 13A. FIG. [Figure 14B] 13B is a schematic local cross-sectional view taken along the QQ' direction in FIG. 13A. FIG. [Figure 14C] 13B is a schematic local cross-sectional view taken along the RR' direction in FIG. 13A. FIG. [Figure 15A] 13B is a schematic top view of the display panel after the first transparent conductive layer in FIG. 13A is formed. FIG. [Figure 15B] 13C is a schematic top view of the display panel after the first transparent conductive layer in FIG. 13B is formed. FIG. [Figure 16A] 13B is a schematic top view of the display panel after the second transparent conductive layer in FIG. 13A is formed. FIG. [Figure 16B] 13C is a schematic top view of the display panel after the second transparent conductive layer in FIG. 13B is formed. FIG. [Figure 17A] 13B is a schematic top view of the display panel after the third transparent conductive layer in FIG. 13A is formed. FIG. [Figure 17B] 13C is a schematic top view of the display panel after the third transparent conductive layer in FIG. 13B is formed. FIG. [Figure 18] 1 is a schematic partial view of a display panel in accordance with at least one embodiment of the present disclosure. [Figure 19] 19 is a schematic top view of the circuit structure layer in the region S3 in FIG. 18. FIG. [Figure 20] 20 is a schematic local cross-sectional view taken along the UU' direction in FIG. 19. FIG. [Figure 21A] 20 is a schematic top view of the display panel after the semiconductor layer in FIG. 19 is formed. [Figure 21B] 20 is a schematic top view of the display panel after the first gate metal layer in FIG. 19 is formed. FIG. [Figure 21C] 20 is a schematic top view of the display panel after the second gate metal layer in FIG. 19 is formed. FIG. [Figure 21D] 20 is a schematic top view of the display panel after the third insulating layer in FIG. 19 is formed. FIG. [Figure 21E] 20 is a schematic top view of the display panel after the first source / drain metal layer in FIG. 19 is formed. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the drawings. The embodiments may be implemented in many different forms. As can be easily understood by those skilled in the art, the manner and content may be converted into other forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited only to the description of the following embodiments. If there is no conflict, the embodiments and features of the embodiments of the present disclosure may be combined with each other.

[0027] In the drawings, the size, thickness or area of ​​one or more components may be enlarged for clarity. Therefore, one embodiment of the present disclosure is not limited to the size, and the shape and size of one or more parts in the drawings do not reflect actual proportions. In addition, the drawings are schematic illustrations of ideal examples, and one embodiment of the present disclosure is not limited to the shapes or numerical values ​​shown in the drawings.

[0028] In this specification, ordinal numbers such as "first," "second," and "third" are used to avoid confusion of components and are not intended to be limiting in terms of quantity. The term "plurality" in this disclosure indicates a quantity of two or more.

[0029] In this specification, for convenience, the positions of components are described with reference to the drawings using terms indicating orientation or positional relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. However, this is for the purpose of explaining and simplifying the specification, and is not intended to indicate or suggest that the described device or element has a specific orientation and must be configured and operated in a specific orientation. Therefore, it is not intended to limit the present disclosure. The positional relationship of components is appropriately changed depending on the orientation of the components described. Therefore, it is not limited to the terms described in the specification, and can be appropriately changed in some cases.

[0030] In this specification, unless otherwise specified and limited, the terms "attached", "coupled" and "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection. It may be a mechanical connection or connection. It may be a direct connection, an indirect connection via a linker, or an internal communication between two elements. Those skilled in the art can understand the meaning of the above terms in the present disclosure according to the specific situation.

[0031] In this specification, "electrical connection" includes cases where components are connected via an element having a certain electrical function. The "element having a certain electrical function" is not particularly limited as long as it can transmit an electrical signal between the components being connected. Examples of the "element having a certain electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and elements having many other types of functions.

[0032] In this specification, a transistor refers to an element including at least three terminals, a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and a current can flow through the drain electrode, the channel region, and the source electrode. In this specification, a channel region refers to a region through which a current mainly flows.

[0033] In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. The functions of the "source electrode" and the "drain electrode" may be interchanged, such as when using transistors with opposite polarity or when the current direction during operation in the circuit is changed. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged. Also, the gate electrode may be referred to as a control electrode.

[0034] In this specification, "parallel" refers to a state in which the angle between two straight lines is between -10° and 10°, including a state in which the angle is between -5° and 5°, and "perpendicular" refers to a state in which the angle between two straight lines is between 80° and 100°, including a state in which the angle is between 85° and 95°.

[0035] The triangles, rectangles, trapezoids, pentagons, hexagons, etc. in this specification are not intended to be exact, and may be approximate triangles, rectangles, trapezoids, pentagons, hexagons, etc., and may have small deformations due to tolerances, and may have lead angles, arc sides, and deformations.

[0036] "Light transmittance" in this disclosure refers to the ability of light rays to pass through a medium, and is the percentage of the luminous flux passing through a transparent or translucent object compared to its incident luminous flux.

[0037] In this disclosure, the terms "about" and "approximately" refer to cases where the boundaries are not strictly defined but allow for process and measurement error. In this disclosure, "almost the same" refers to cases where the difference in the values ​​is within 10%.

[0038] At least one embodiment of the present disclosure provides a display device, which includes a display panel. The display device may be a product having a function of displaying an image (including a static image or a dynamic image, where the dynamic image may be a video). For example, the display device may be any one of the following products: a display, a television, a signboard, a digital frame, a laser printer with a display function, a telephone, a mobile phone, a paint screen, a personal digital assistant (PDA, Personal Digital Assistant), a digital camera, a portable camcorder, a finder, a navigator, a vehicle, a large-area wall, an information query device (e.g., a business query device in the e-government affairs, bank, hospital, power, etc. sector), a monitor, etc. The display device may also be any one of the following products: a microdisplay, a VR device or an AR device including a microdisplay, etc.

[0039] FIG. 1 is a perspective view of a display device according to at least one embodiment of the present disclosure. FIG. 2 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure. In some exemplary embodiments, as shown in FIG. 1 and FIG. 2, the display device may include a display panel 100 and a sensor 200. The display panel 100 may be a pad that displays an image. For example, the display panel 100 may be referred to as a screen, and may be, for example, a liquid crystal display panel, an OLED display panel, or the like. For example, the sensor 200 may be an infrared sensor, an ultrasonic sensor, a LIDAR (Light Detection and Ranging) sensor, a radar sensor, a camera sensor, or the like.

[0040] In some examples, as shown in FIG. 1, the display panel 100 may have a display side 100A and a non-display side 100B. The display side 100A may be a side of the display panel 100 that can display an image. When the human eye is on the display side 100A, the image displayed by the display panel 100 is seen. The non-display side 100B faces the display side 100A. The sensor 200 may be installed on the non-display side 100B of the display panel 100, and thus the sensor 200 may be referred to as an under-screen sensor. Since the sensor 200 needs to receive an optical signal passing through the display panel 100 from the outside, the display panel 100 needs to have high light transmittance in the area corresponding to the sensor 200. The display panel 100 may have a display area AA and a peripheral area SA, and the X direction in FIG. 1 may be the extension direction of one side of the display area AA, for example, the extension direction of the long side. The Y direction may be the extension direction of another side of the display area AA, for example, the extension direction of the short side. The Z direction in FIG. 1 may be the vertical direction of the display area AA.

[0041] In some examples, as shown in FIG. 2, the peripheral area SA may be located at least on one side (e.g., on one side or around, i.e., including both upper and lower and both left and right sides) outside the display area AA. The display area AA may include a sensor-corresponding area (hereinafter referred to as a second area for the sake of consistency of description) AA2 and a sensor-non-corresponding area AAN that do not overlap each other. The light transmittance of the second area AA2 is higher than the light transmittance of the sensor-non-corresponding area AAN. The orthogonal projection of the sensor 200 on the display panel 100 overlaps with the second area AA2, so that more light can pass through the display panel 100 and be received by the sensor 200. For example, a part of the orthogonal projection of the sensor 200 on the display panel 100 is located within the second area AA2. Also, for example, the entire orthogonal projection of the sensor 200 on the display panel 100 is located within the second area AA2. Furthermore, for example, the orthogonal projection of the light-sensitive window of the sensor 200 on the display panel 100 is located within the second area AA2. The sensor non-corresponding area AAN is the area of ​​the display area AA other than the second area AA2.

[0042] In some examples, as shown in FIG. 2, the second area AA2 may be located at the center of the top of the display area AA. The sensor non-corresponding area AAN may surround the periphery of the second area AA2. However, this is not limited to this embodiment. For example, the second area AA2 may be located at other positions, such as the upper left corner or upper right corner of the display area AA. Also, for example, the sensor non-corresponding area AAN may surround at least one side of the second area AA2.

[0043] In some examples, as shown in FIG. 2, the display area AA may be a rectangle, for example, a rectangle with rounded corners. The second area AA2 may be a circle. However, this is not limited to this in the present embodiment. For example, the second area AA2 may be a rectangle, another pentagon, hexagon, or other shape.

[0044] In some examples, a plurality of sub-pixels may be disposed in the display area AA. A sub-pixel may be the smallest part capable of controlling brightness. At least one sub-pixel may include a pixel driving circuit and a light-emitting device. The pixel driving circuit may be electrically connected to the light-emitting device and configured to drive the light emission of the light-emitting device connected thereto. The pixel driving circuit may include a plurality of transistors (denoted by T) and at least one capacitor (denoted by C). For example, the pixel driving circuit may be a 3T1C (i.e., three transistors and one capacitor) structure, a 7T1C (i.e., seven transistors and one capacitor) structure, a 5T1C (i.e., five transistors and one capacitor) structure, an 8T1C (i.e., eight transistors and one capacitor) structure, or an 8T2C (i.e., eight transistors and two capacitors) structure, etc.

[0045] In some examples, the light emitting device may be any one of light emitting diodes (LEDs), organic light emitting diodes (OLEDs), quantum dot light emitting diodes (QLEDs), micro LEDs (including mini-LEDs or micro-LEDs), etc. For example, the light emitting device may be an OLED, and the light emitting device may emit red light, green light, blue light, or white light, etc., under the driving of a corresponding pixel driving circuit. The light emitting color of the light emitting device may be determined according to needs. In some examples, the light emitting device may include an anode, a cathode, and an organic light emitting layer located between the anode and the cathode. The anode of the light emitting device may be electrically connected to a corresponding pixel driving circuit. However, this embodiment is not limited thereto.

[0046] In some examples, one pixel unit in the display area AA may include three sub-pixels, which may be a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively, although this embodiment is not limited thereto. In some examples, one pixel unit may include four sub-pixels, which may be a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, respectively.

[0047] In some examples, the shape of the light emitting device may be a rectangle, a rhombus, a pentagon, or a hexagon. When one pixel unit includes three sub-pixels, the light emitting devices of the three sub-pixels may be arranged in a horizontal parallel, vertical parallel, or square manner. When one pixel unit includes four sub-pixels, the light emitting devices of the four sub-pixels may be arranged in a horizontal parallel, vertical parallel, or square manner, but this embodiment is not limited thereto.

[0048] 3 is an equivalent circuit diagram of a pixel driving circuit according to at least one embodiment of the present disclosure. The pixel driving circuit according to this exemplary embodiment is described as having a 7T1C structure as an example, but this embodiment is not limited thereto.

[0049] In some exemplary embodiments, as shown in Fig. 3, the exemplary pixel driving circuit may include six switch transistors (T1, T2, T4 to T7), one driving transistor T3, and one storage capacitor Cst. The six switch transistors are a data write transistor T4, a threshold compensation transistor T2, a first emission control transistor T5, a second emission control transistor T6, a first reset transistor T1, and a second reset transistor T7. The light-emitting element EL may include an anode, a cathode, and an organic light-emitting layer disposed between the anode and the cathode.

[0050] In some exemplary embodiments, the driving transistor and the six switch transistors may be P-type transistors or N-type transistors. By adopting the same type of transistors in the pixel driving circuit, the process flow can be simplified, the process difficulty of the display panel can be reduced, and the yield rate of the product can be improved. In some possible implementations, the driving transistor and the six switch transistors may include P-type transistors and N-type transistors.

[0051] In some exemplary embodiments, the driving transistor and the six switch transistors may adopt low-temperature polysilicon film transistors, or oxide film transistors, or both low-temperature polysilicon film transistors and oxide film transistors. The active layer of the low-temperature polysilicon film transistor adopts low-temperature polysilicon (LTPS, Low Temperature Poly-Silicon), and the active layer of the oxide film transistor adopts oxide semiconductor (Oxide). The low-temperature polysilicon film transistor has advantages such as high mobility, fast charging, etc., and the oxide film transistor has advantages such as low leakage current, etc. By integrating the low-temperature polysilicon film transistor and the oxide film transistor into one display panel to form a low-temperature polycrystalline oxide (LTPO, Low Temperature Polycrystalline Oxide) display panel, the advantages of both can be utilized to realize low-frequency driving, reduce power consumption, and improve display quality.

[0052] In some exemplary embodiments, as shown in FIG. 3, the display panel may include a scan line GL, a data line DL, a first power line PL1, a second power line PL2, an emission control line EML, a first initial signal line INIT1, a second initial signal line INIT2, a first reset control line RST1 and a second reset control line RST2. In some examples, the first power line PL1 may be configured to provide a constant first voltage signal VDD to the pixel driving circuit, the second power line PL2 may be configured to provide a constant second voltage signal VSS to the pixel driving circuit, and the first voltage signal VDD is greater than the second voltage signal VSS. The scan line GL may be configured to provide a scan signal SCAN to the pixel driving circuit, the data line DL may be configured to provide a data signal DATA to the pixel driving circuit, the emission control line EML may be configured to provide an emission control signal EM to the pixel driving circuit, the first reset control line RST1 may be configured to provide a first reset control signal RESET1 to the pixel driving circuit, and the second reset control line RST2 may be configured to provide a second reset control signal RESET2 to the pixel driving circuit. In some examples, in the pixel driving circuit of the nth row, the first reset control line RST1 may be electrically connected to the scanning line GL of the pixel driving circuit of the n-1th row, and the scanning signal SCAN(n-1) may be input, that is, the first reset control signal RESET1(n) is the same as the scanning signal SCAN(n-1). The second reset control line RST2 may be electrically connected to the scanning line GL of the pixel driving circuit of the nth row, and the scanning signal SCAN(n) may be input, that is, the second reset control signal RESET2(n) is the same as the scanning signal SCAN(n). In some examples, the second reset control line RST2 electrically connected to the pixel driving circuit of the nth row and the first reset control line RST1 electrically connected to the pixel driving circuit of the n+1th row may be an integrated structure. n is an integer greater than 0. In this way, the signal lines of the display panel can be reduced to realize a narrow frame design of the display panel. However, this embodiment is not limited to this.

[0053] In some exemplary embodiments, the first initial signal line INIT1 may be configured to provide a first initial signal to the pixel driving circuit, and the second initial signal line INIT2 may be configured to provide a second initial signal to the pixel driving circuit. For example, the first initial signal may be different from the second initial signal. The first initial signal and the second initial signal may be constant voltage signals, the magnitude of which may be, for example, but not limited to, between the first voltage signal VDD and the second voltage signal VSS. In other examples, the first initial signal and the second initial signal may be the same, and only the first initial signal may be configured to provide the first initial signal.

[0054] In some exemplary embodiments, as shown in FIG. 3, the driving transistor T3 is electrically connected to the light-emitting element EL, and outputs a driving current under the control of signals such as a scan signal SCAN, a data signal DATA, a first voltage signal VDD, and a second voltage signal VSS to drive the light-emitting element EL to emit light. The gate electrode of the data write transistor T4 is electrically connected to the scan line GL, the first pole of the data write transistor T4 is electrically connected to the data line DL, and the second pole of the data write transistor T4 is electrically connected to the first pole of the driving transistor T3. The gate electrode of the threshold compensation transistor T2 is electrically connected to the scan line GL, the first pole of the threshold compensation transistor T2 is electrically connected to the gate electrode of the driving transistor T3, and the second pole of the threshold compensation transistor T2 is electrically connected to the second pole of the driving transistor T3. The gate electrode of the first light-emitting control transistor T5 is electrically connected to the light-emitting control line EML, the first pole of the first light-emitting control transistor T5 is electrically connected to the first power line PL1, and the second pole of the first light-emitting control transistor T5 is electrically connected to the first pole of the driving transistor T3. The gate electrode of the second emission control transistor T6 is electrically connected to the emission control line EML, the first electrode of the second emission control transistor T6 is electrically connected to the second electrode of the driving transistor T3, and the second electrode of the second emission control transistor T6 is electrically connected to the anode of the light-emitting element EL. The first reset transistor T1 is electrically connected to the gate electrode of the driving transistor T3 and configured to reset the gate electrode of the driving transistor T3, and the second reset transistor T7 is electrically connected to the anode of the light-emitting element EL and configured to reset the anode of the light-emitting element EL. The gate electrode of the first reset transistor T1 is electrically connected to the first reset control line RST1, the first electrode of the first reset transistor T1 is electrically connected to the first initial signal line INIT1, and the second electrode of the first reset transistor T1 is electrically connected to the gate electrode of the driving transistor T3. The gate electrode of the second reset transistor T7 is electrically connected to the second reset control line RST2, the first electrode of the second reset transistor T7 is electrically connected to the second initial signal line INIT2, and the second electrode of the second reset transistor T7 is electrically connected to the anode of the light-emitting element EL.A first capacitor plate of the storage capacitor Cst is electrically connected to the gate electrode of the driving transistor T3, and a second capacitor plate of the storage capacitor Cst is electrically connected to the first power line PL1.

[0055] In this example, the first node N1 is a connection point between the storage capacitor Cst, the first reset transistor T1, the driving transistor T3, and the threshold compensation transistor T2, the second node N2 is a connection point between the first emission control transistor T5, the data write transistor T4, and the driving transistor T3, the third node N3 is a connection point between the driving transistor T3, the threshold compensation transistor T2, and the second emission control transistor T6, and the fourth node N4 is a connection point between the second emission control transistor T6, the second reset transistor T7, and the light-emitting element EL. The fourth node N4 is an anode connection node.

[0056] The following describes the operation process of the pixel driving circuit shown in Fig. 3. The explanation will be given by taking as an example that the multiple transistors included in the pixel driving circuit shown in Fig. 3 are all P-type transistors.

[0057] In some exemplary embodiments, in a display time period of one frame, the operation process of the pixel driving circuit may include a first stage S1, a second stage S2 and a third stage S3.

[0058] The first stage S1 is called a reset stage. The first reset control signal RESET1 through the first reset control line RST1 is a low level signal, which turns on the first reset transistor T1, and the first initial signal through the first initial signal line INIT1 is provided to the first node N1 to initialize the first node N1 and clear the original data voltage in the storage capacitor Cst. The scan signal SCAN through the scan line GL is a high level signal, and the emission control signal EM through the emission control line EML is a high level signal, which turns off the data write transistor T4, the threshold compensation transistor T2, the first emission control transistor T5, the second emission control transistor T6, and the second reset transistor T7. In this stage, the light emitting element EL does not emit light.

[0059] The second stage S2 is called a data write stage or a threshold compensation stage. The scan signal SCAN through the scan line GL is a low level signal, the first reset control signal RESET1 through the first reset control line RST1 and the light emission control signal EM through the light emission control line EML are both high level signals, and the data line DL outputs a data signal DATA. In this stage, the first capacitor plate of the storage capacitor Cst is low level, so the driving transistor T3 is turned on. The scan signal SCAN is a low level signal, which turns on the threshold compensation transistor T2, the data write transistor T4 and the second reset transistor T7. With the threshold compensation transistor T2 and the data write transistor T4 turned on, the data voltage Vdata output from the data line DL is provided to the first node N1 via the second node N2, the turned-on driving transistor T3, the third node N3 and the turned-on threshold compensation transistor T2, and the difference between the data voltage Vdata output from the data line DL and the threshold voltage of the driving transistor T3 is stored in the storage capacitor Cst. The voltage of the first capacitor plate (i.e., the first node N1) of the storage capacitor Cst is Vdata-|Vth|, where Vdata is the data voltage output from the data line DL, and Vth is the threshold voltage of the driving transistor T3. When the second reset transistor T7 is turned on, the second initial signal through the second initial signal line INIT2 is provided to the anode of the light-emitting element EL to initialize (reset) the anode of the light-emitting element EL, clear the voltage previously stored therein, complete the initialization, and ensure that the light-emitting element EL does not emit light. The first reset control signal RESET1 through the first reset control line RST1 is a high level signal, which turns off the first reset transistor T1. The light-emitting control signal EM through the light-emitting control signal line EML is a high level signal, which turns off the first light-emitting control transistor T5 and the second light-emitting control transistor T6.

[0060] The third stage S3 is called a light-emitting stage. The light-emitting control signal EM through the light-emitting control signal line EML is a low-level signal, and the scan signal SCAN through the scan line GL and the first reset control signal RESET1 through the first reset control line RST1 are high-level signals. The light-emitting control signal EM through the light-emitting control signal line EML is a low-level signal, which turns on the first light-emitting control transistor T5 and the second light-emitting control transistor T6, and the first voltage signal VDD output from the first power line PL1 provides a driving voltage to the anode of the light-emitting element EL via the turned-on first light-emitting control transistor T5, the driving transistor T3 and the second light-emitting control transistor T6, thereby driving the light-emitting element EL to emit light.

[0061] In the driving process of the pixel circuit, the driving current flowing through the driving transistor T3 is determined by the voltage difference between its gate electrode and the first electrode. Since the voltage of the first node N1 is Vdata-|Vth|, the driving current of the driving transistor T3 is expressed by the following formula: I = K × (Vgs - Vth) 2 =K × [(VDD - Vdata + |Vth|) - Vth] 2 =K × [VDD-Vdata] 2 In the formula, I is the driving current flowing through the driving transistor T3, i.e., the driving current that drives the light-emitting element EL, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the driving transistor T3, Vth is the threshold voltage of the driving transistor T3, Vdata is the data voltage output by the data line DL, and VDD is the first voltage signal output by the first power line PL1.

[0062] As can be seen from the above formula, the current flowing through the light emitting element EL is not related to the threshold voltage of the driving transistor T3, so the pixel driving circuit of this embodiment can well compensate for the threshold voltage of the driving transistor T3.

[0063] 4 is a partial schematic diagram of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 4, the display area AA of the display panel 100 may include a first area AA1 and a second area AA2. The first area AA1 may be located at least on one side (e.g., on one side or around, i.e., including both upper and lower and both left and right sides) of the second area AA2. The first area AA1 may be located in the sensor-unsupported area AAN in FIG. 2.

[0064] In this example, an area occupied by one pixel driving circuit may be referred to as one subpixel area. The first area AA1 may include a plurality of subpixel areas arranged in an array. The subpixel areas in the first area AA1 may include a normal subpixel area 120A and a dummy subpixel area 120B, and a first pixel driving circuit may be disposed in the normal subpixel area 120A. A first light-emitting device electrically connected to the first pixel driving circuit and the first pixel driving circuit may both be located in the first area AA1, and all or a part of the first light-emitting device may be located in the normal subpixel area 120A. A second pixel driving circuit or an inactive pixel driving circuit may be disposed in the dummy subpixel area 120B, and a second light-emitting device 112B electrically connected to the second pixel driving circuit may be located in the second area AA2. The inactive pixel circuit may contribute to improving uniformity in the etching process of components in multiple film layers. For example, the disable pixel circuit may have substantially the same structure as the first pixel drive circuit and the second pixel drive circuit of a given row or a given column, and is not electrically connected to any light emitting device.

[0065] In some examples, as shown in FIG. 4, the second region AA2 may include a plurality of second light-emitting devices 112B arranged in an array. At least one second light-emitting device 112B in the second region AA2 may be electrically connected to a second pixel driving circuit 111B in a dummy subpixel region 120B in the first region AA1 and driven to emit light. At least one second pixel driving circuit in the dummy subpixel region 120B in the first region AA1 may be electrically connected to at least one second light-emitting device 112B in the second region AA2 via a conductive line 113 (e.g., a transparent conductive line). In this embodiment, each second light-emitting device 112B in the second region AA2 may be electrically connected to a second pixel driving circuit in one dummy subpixel region 120B in the first region AA1 via at least one conductive line 113. The second pixel driving circuit for driving the second light emitting device 112B is disposed in the first area AA1, thereby reducing the blocking of the pixel driving circuit to the light and increasing the transmittance of the second area AA2.

[0066] 4, the display area AA of the display panel 100 may further include a third area AA3 in addition to the first area AA1 and the second area AA2. The third area AA3 may include a plurality of subpixel areas arranged in an array, and each of the subpixel areas may be a normal subpixel area 120A. A first pixel driving circuit located in one normal subpixel area 120A and a first light-emitting device electrically connected to the first pixel driving circuit may both be located in the third area AA3.

[0067] In some examples, the third region AA3 may include a normal subpixel region and a dummy subpixel region, and the arrangement of the normal subpixel region and the dummy subpixel region in the third region AA3 may be the same as the arrangement of the normal subpixel region and the dummy subpixel region in the first region AA1. The dummy subpixel region in the third region AA3 may include an invalid pixel driving circuit.

[0068] In some examples, as shown in FIG. 4, the second area AA2 may include a plurality of second light emitting devices, and the first area AA1 may include a plurality of first light emitting devices and a plurality of pixel driving circuits. The plurality of pixel driving circuits may include a plurality of first pixel driving circuits, a plurality of second pixel driving circuits, and a plurality of invalid pixel driving circuits. At least one second pixel driving circuit of the plurality of second pixel driving circuits may be electrically connected to at least one second light emitting device of the plurality of second light emitting devices via the conductive line 113, and there may be no overlap between the orthogonal projection at the base of the at least one second pixel driving circuit and the orthogonal projection at the base of the at least one second light emitting device. The at least one second pixel driving circuit may be configured to provide a driving signal to the second light emitting device electrically connected thereto to drive the emission of the second light emitting device. At least one first pixel driving circuit of the plurality of first pixel driving circuits may be electrically connected to at least one first light emitting device of the plurality of first light emitting devices. The orthogonal projection on the base of the at least one pixel driving circuit and the orthogonal projection on the base of the at least one first light emitting device may overlap. The conductive line 113 may be electrically connected to the second pixel driving circuit at one end and electrically connected to the second light emitting device at the other end. The conductive line 113 may extend from the first area AA1 to the second area AA2, although this embodiment is not limited thereto.

[0069] In some examples, the conductive lines 113 may employ a transparent conductive material, for example, a conductive oxide material such as indium tin oxide (ITO), although this embodiment is not limited thereto.

[0070] In some examples, the first area AA1 may have a larger number of pixel driving circuits than the first light-emitting devices, since the first area AA1 has not only a first pixel driving circuit electrically connected to the first light-emitting device, but also a second pixel driving circuit 111B electrically connected to the second light-emitting device 112B. In this example, as shown in FIG. 4, the size of the first pixel driving circuit in the Y direction may be reduced to obtain an installation area for the second pixel driving circuit. For example, the size of the pixel driving circuit in the Y direction may be smaller than the size of the first light-emitting device in the Y direction. In this example, as shown in FIG. 4, the original pixel driving circuits of each a column may be compressed along the Y direction to add an arrangement space for one column of pixel driving circuits, and the pixel driving circuits of the a columns before compression and the pixel driving circuits of the a+1 columns after compression may occupy the same space. a may be an integer larger than 1. In this example, a may be equal to 4. However, this embodiment is not limited to this. For example, a may be equal to 2 or 3. In another example, the original b rows of pixel driving circuits may be compressed along the X direction to add an arrangement space for one row of pixel driving circuits, and the space occupied by the b rows of pixel driving circuits before compression is the same as that occupied by the b+1 rows of pixel driving circuits after compression, where b is an integer greater than 1. Alternatively, the size of the first pixel driving circuit in the X direction and the Y direction may be reduced to obtain an installation area for the second pixel driving circuit.

[0071] In the embodiment of the present disclosure, a row of light emitting devices may refer to the pixel driving circuits connected to the light emitting devices in the row being all connected to the same gate line (e.g., scan line). A row of pixel driving circuits may refer to the pixel driving circuits in the row being all connected to the same gate line. However, this embodiment is not limited thereto.

[0072] In some implementations, in order to increase the light transmittance of the second region, a second pixel driving circuit electrically connected to the second light-emitting device in the second region is installed in the first region, and the anode of the second light-emitting device is electrically connected to the second pixel driving circuit through a conductive line. Taking the pixel driving circuit as an example of a 7T1C pixel driving circuit shown in FIG. 3, the conductive line may have one end electrically connected to the fourth node N4 of the second pixel driving circuit, and the other end electrically connected to the anode of the second light-emitting device. Since the conductive line must extend from the first region to the second region to realize the electrical connection between the second pixel driving circuit and the second light-emitting device, the conductive line increases the capacitance of the fourth node N4 (i.e., the anode connecting node). The capacitance of the anode connecting node may include a capacitor between the conductive line and the pixel driving circuit, and a parasitic capacitor between different conductive lines. The parasitic capacitor of the anode connecting nodes of different second pixel driving circuits will cause crosstalk between the second light-emitting devices, which will affect the display effect.

[0073] FIG. 5 is a schematic diagram of a simulation of the effect of a light emitting device emitting blue light on a light emitting device emitting green light. In FIG. 5, the dashed line shows the change curve of the current of the anode connection node of the light emitting device emitting green light in one frame when crosstalk exists between the anode connection node of the light emitting device emitting green light and the anode connection node of the light emitting device emitting blue light. The solid line shows the change curve of the current of the anode connection node of the light emitting device emitting green light in one frame when crosstalk does not exist between the anode connection node of the light emitting device emitting green light and the anode connection node of the light emitting device emitting blue light. As can be seen from FIG. 5, when crosstalk exists between the anode connection node of the light emitting device emitting green light and the anode connection node of the light emitting device emitting blue light, the current of the anode connection node of the light emitting device emitting green light is easily pulled up by the anode connection node of the light emitting device emitting blue light, and the luminance of the light emitting device emitting green light that has been subjected to crosstalk increases, resulting in display defects in the second region.

[0074] The plurality of second light-emitting devices in the second region of the display panel according to this embodiment may include a plurality of first type second light-emitting devices and a plurality of second type second light-emitting devices. The first type second light-emitting devices may be configured to emit a first color of light, and the second type second light-emitting devices may be configured to emit a second color of light. The first color of light may be different from the second color of light. In some examples, the first color of light may be green light, and the second color of light may include at least one of red light and blue light. In some examples, the first type of second light-emitting devices may include light-emitting devices that emit green light, and the second type of second light-emitting devices may include light-emitting devices that emit blue light and light-emitting devices that emit red light.

[0075] In some exemplary embodiments, the second region may be divided into a first sub-region and a second sub-region. The second sub-region may surround the first sub-region and be adjacent to the first sub-region. A parasitic capacitance between an anode connection node of at least one first type of second light-emitting device located in the first sub-region and an anode connection node of a second type of second light-emitting device may be equal to or less than a maximum parasitic capacitance between an anode connection node of the first type of second light-emitting device located in the second sub-region and an anode connection node of a second type of second light-emitting device. In this example, the parasitic capacitance between the anode connection node of the first type of second light-emitting device in the first sub-region and the anode connection node of the second type of second light-emitting device can be reduced to improve the crosstalk situation between the first type of first light-emitting device and the second type of first light-emitting device, thereby improving the display consistency of the second region and improving the display effect.

[0076] In some exemplary embodiments, the plurality of second light emitting devices in the second region may include a plurality of sets of second light emitting devices. The second light emitting devices in each set of the plurality of sets of second light emitting devices may be arranged along a first direction, and the plurality of sets of second light emitting devices may be arranged along a second direction. The second direction intersects with the first direction, e.g., the second direction and the first direction are perpendicular to each other. For example, the first direction may be parallel to the Y direction, and the second direction may be parallel to the X direction.

[0077] In some exemplary embodiments, the display panel may include three transparent conductive layers, and the three transparent conductive layers may include a first transparent conductive layer, a second transparent conductive layer, and a third transparent conductive layer disposed in sequence along a side away from the base. The first transparent conductive layer may include a plurality of first transparent conductive lines, the second transparent conductive layer may include a plurality of second transparent conductive lines, and the third transparent conductive layer may include a plurality of third transparent conductive lines. An overlapping portion may be present in an orthogonal projection on the base between a portion where the first transparent conductive line of the first transparent conductive layer extends along the first direction and a portion where the second transparent conductive line of the second transparent conductive layer extends along the first direction, i.e., there is no overlapping wiring. An overlapping portion may not be present in an orthogonal projection on the base between a portion where the third transparent conductive line of the third transparent conductive layer extends along the first direction and a portion where the first transparent conductive line of the first transparent conductive layer and the second transparent conductive line of the second transparent conductive layer extend along the first direction, i.e., there is no overlapping wiring. For example, a portion of the first transparent conductive line of the first transparent conductive layer extending along the first direction, a portion of the second transparent conductive line of the second transparent conductive layer extending along the first direction, and a portion of the third transparent conductive line of the third transparent conductive layer extending along the first direction may have approximately the same length in the second direction.

[0078] In some examples, the first transparent conductive line of the first transparent conductive layer and the second transparent conductive line of the second transparent conductive layer have overlapping wiring. For example, the capacitance between the first transparent conductive line and the overlapping second transparent conductive line may be about 5.396 fF, and the parasitic capacitance between the first transparent conductive line and the non-overlapping second transparent conductive line may be about 0.436 fF. The third transparent conductive line of the third transparent conductive layer does not form an overlapping wiring with the first transparent conductive line and the second transparent conductive line. For example, the parasitic capacitance between the third transparent conductive line and the second transparent conductive line may be about 3.054 fF. As can be seen, the parasitic capacitance between any transparent conductive line and the non-overlapping transparent conductive line is smaller than the capacitance between the overlapping wiring. In this example, the crosstalk between the first type of second light emitting device and the second type of second light emitting device can be improved by designing the film layer in which the conductive lines electrically connected to the first type of second light emitting device and the second type of second light emitting device are located.

[0079] In the following, the display panel includes three transparent conductive layers as an example, the second region is divided into a left half region and a right half region along a center line in the first direction, and the conductive lines connected to the second light-emitting devices in the left half region and the right half region may be substantially symmetrical about the center line. In the following, the connection relationship between the part of the left half region of one set of second light-emitting devices in the second region and one row of second pixel driving circuits is described as an example. In the illustration of the following example, the first pixel driving circuit and the first light-emitting devices are omitted.

[0080] In some examples, the difference in capacitance between the conductive lines in the display panel is large. The lengths of the conductive lines of the plurality of light emitting devices located in the second region are different, which makes the change in the difference in capacitance between the light emitting devices emitting different colors of light different. Compared with the difference in capacitance between the conductive lines connected to the light emitting devices emitting red light and the difference in capacitance between the conductive lines connected to the light emitting devices emitting blue light, the difference in capacitance between the conductive lines connected to the light emitting devices emitting green light is large. Since the difference in capacitance between the conductive lines connected to the light emitting devices emitting green light is large, the light emitting time of the light emitting devices emitting green light is reduced, which causes a luminance difference in the display panel and leads to display defects. At low gray scale, the degree of failure of the light emitting devices emitting green light is greater than the degree of failure of the light emitting devices emitting red light, and the degree of failure of the light emitting devices emitting red light is greater than the degree of failure of the light emitting devices emitting blue light. For example, in the same gray scale, the driving current for driving the light emitting device emitting blue light may be greater than the driving current for driving the light emitting device emitting red light, and the driving current for driving the light emitting device emitting red light may be greater than the driving current for driving the light emitting device emitting green light. Since the driving current for driving the light emitting device emitting green light is the smallest among the three color light emitting devices, when the capacitances of the anode connection nodes of the light emitting devices emitting different lights are the same, the light emitting device emitting green light is least likely to emit light. In order to ensure the normal emission of the light emitting device emitting green light, it is necessary to reduce the length of the conductive line connected to the anode connection node of the light emitting device emitting green light, and reduce the capacitance of the anode connection node. In the following example, the second pixel driving circuit electrically connected to the light emitting device emitting green light is taken as an example to be closest to the second region, that is, the second pixel driving circuit electrically connected to the light emitting device emitting green light is preferentially arranged closer to the second region. In some examples, the proximity of element A to element B may indicate that there are no other elements A and B between element A and element B, but that there may be other elements other than element A and element B.In this example, the approach of the second pixel driving circuit electrically connected to the light emitting device that emits green light to the second region may mean that there is no second pixel driving circuit electrically connected to the light emitting devices that emit red and blue light between the second pixel driving circuit electrically connected to the light emitting device that emits green light and the second region, but the first pixel driving circuit and the invalid pixel driving circuit may be present.

[0081] In some examples, the plurality of second light-emitting devices in the second region may include a plurality of green second light-emitting devices 12A, a plurality of blue second light-emitting devices 12B, and a plurality of red second light-emitting devices 12C. The green second light-emitting devices 12A are configured to emit green light, the blue second light-emitting devices 12B are configured to emit blue light, and the red second light-emitting devices 12C are configured to emit red light. In at least one set of second light-emitting devices, the plurality of second pixel driving circuits electrically connected to the green second light-emitting devices 12A are closer to the second region than each of the plurality of second pixel driving circuits electrically connected to the blue second light-emitting devices 12B and the red second light-emitting devices 12C, thereby reducing the difference in length of the conductive lines electrically connected to the green second light-emitting devices 12A and reducing or avoiding display defects.

[0082] FIG 6A is a schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. FIG 6B is a schematic diagram of a connection between a first transparent conductive line of a first transparent conductive layer in FIG 6A. FIG 6C is a schematic diagram of a connection between a second transparent conductive line of a second transparent conductive layer in FIG 6A. FIG 6D is a schematic diagram of a connection between a third transparent conductive line of a third transparent conductive layer in FIG 6A. The first direction D1 may cross the second direction D2, for example, the first direction D1 may be perpendicular to the second direction D2. The first direction D1 may be parallel to the Y direction, and the second direction D2 may be parallel to the X direction.

[0083] In some examples, as shown in FIG. 6A to FIG. 6D, the second region AA2 may be divided into a first sub-region AA2a and a second sub-region AA2b. The second sub-region AA2b may surround the first sub-region A22a and be adjacent to the first region AA1. That is, the second sub-region AA2b may be located between the first sub-region AA2a and the first region AA1. The second sub-region AA2b may be an edge region of the second region AA2, and the first sub-region AA2a may be a central region of the second region AA2. In one set of second light-emitting devices, the number of green second light-emitting devices in the first sub-region AA2a may be equal to or less than the number of green second light-emitting devices in the second sub-region AA2b. For example, the second region AA2 is circular, and the first sub-region AA2a may be a smaller circle than the second region AA2, and the second sub-region AA2b may be a ring surrounding the first sub-region AA2a. However, this embodiment is not limited thereto.

[0084] In some examples, as shown in Figures 6A and 6B, the second green light emitting device 12A in the second sub-region AA2b of the second region AA2 may be electrically connected to the second pixel driving circuit 111B in the first region AA1 through a first transparent conductive line 331 located in the first transparent conductive layer 330. As shown in Figure 6C, the second green light emitting device 12A in the first sub-region AA2a may be electrically connected to the second pixel driving circuit 111B through a second transparent conductive line 341 located in the second transparent conductive layer 340. The first transparent conductive line 331 and the second transparent conductive line 341 electrically connected to the second green light emitting device 12A are located on the same side of the second light emitting device of the set in the second direction, for example, on the upper side.

[0085] In some examples, as shown in Figures 6C and 6D, the plurality of blue second light-emitting devices 12B and the second red light-emitting devices 12C in the second sub-region AA2b close to the first region A1 may be electrically connected to the second pixel driving circuit 111B in the first region AA1 through the second transparent conductive lines 341 located in the second transparent conductive layer 340, and the plurality of blue second light-emitting devices 12B and the second red light-emitting devices 12C away from the first region A1 may be electrically connected to the second pixel driving circuit 111B through the third transparent conductive lines 351 located in the third transparent conductive layer 350. As shown in Figure 6D, the second blue light-emitting devices 12B and the second red light-emitting devices 12C in the first sub-region AA2a may be electrically connected to the second pixel driving circuit 111B through the third transparent conductive lines 351 in the third transparent conductive layer 350. The second transparent conductive line 341 and the third transparent conductive line 351 electrically connected to the second blue light light emitting device 12B and the second red light light emitting device 12C are located on opposite sides of the second light emitting device of the set in the second direction D2, for example, the second transparent conductive line 341 may be located on the lower side and the third transparent conductive line 351 may be located on the upper side.

[0086] In this embodiment, the second green light-emitting device 12A in the second sub-region AA2b may adopt the wiring of the first transparent conductive layer 330 for the second green light-emitting device 12A in the second region AA2, and after the wiring arrangement space of the first transparent conductive layer 330 is fully utilized, the second green light-emitting device 12A away from the second sub-region AA2b may be electrically connected using the wiring of the second transparent conductive layer 340. However, this embodiment is not limited thereto. For example, the second green light-emitting device 12A away from the second sub-region AA2b may be electrically connected using the wiring of the third transparent conductive layer 350.

[0087] FIG. 7 is a schematic diagram of the parasitic capacitance between the anode connection node of the second green light-emitting device and the anode connection node of the second blue and red light-emitting devices of the display panel shown in FIG. 6A. In FIG. 7, the abscissa indicates the position of the second green light-emitting device from the edge to the center of the second region in the first direction of the second region, and the ordinate indicates the parasitic capacitance between the anode connection node of the second green light-emitting device and the anode connection node of the second blue and red light-emitting devices. In this example, the boundary between the first sub-region and the second sub-region may be between the positions of the 15th and 16th green light-emitting devices. As shown in FIG. 6A and FIG. 7, in the second sub-region AA2b, the parasitic capacitance between the first transparent conductive line electrically connected to the second green light-emitting device and the third transparent conductive line electrically connected to the other second light-emitting devices is small, and the crosstalk between the anode connection node of the second green light-emitting device and the anode connection node of the second blue and red light-emitting devices can be reduced. In the first sub-region AA2a, the second green light light-emitting device is electrically connected to the second transparent conductive line, and the second blue and red light light-emitting devices are electrically connected to the third transparent conductive line, and the parasitic capacitance between the second transparent conductive layer and the third transparent conductive layer is large, so there is a risk of increased crosstalk between the anode connection node of the second green light light-emitting device and the anode connection node of the second blue and red light light-emitting devices.

[0088] Fig. 8A is another schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. Fig. 8B is a schematic diagram of a connection between a first transparent conductive line of a first transparent conductive layer in Fig. 8A. Fig. 8C is a schematic diagram of a connection between a second transparent conductive line of a second transparent conductive layer in Fig. 8A. Fig. 8D is a schematic diagram of a connection between a third transparent conductive line of a third transparent conductive layer in Fig. 8A.

[0089] In some examples, as shown in Figures 8A to 8D, the second region AA2 may be divided into a first sub-region AA2a and a second sub-region AA2b. The second sub-region AA2b may surround the first sub-region A22a and be adjacent to the first region AA1. In one set of second light-emitting devices, the number of green second light-emitting devices in the first sub-region AA2a may be equal to or less than the number of green second light-emitting devices in the second sub-region AA2b.

[0090] In some examples, as shown in Figures 8A and 8B, among at least one set of second light-emitting devices in the second region, a plurality of green second light-emitting devices 12A near the edge of the second region A2 may be electrically connected to a plurality of second pixel driving circuits 111B in the first region A1 via second transparent conductive lines 341 of the second transparent conductive layer 340, and a plurality of green second light-emitting devices 12A near the center of the second region A2 may be electrically connected to a plurality of second pixel driving circuits 111B in the first region A1 via first transparent conductive lines 331 of the first transparent conductive layer 330. Some of the green second light-emitting devices 12A close to the first region AA1 in the second sub-region AA2b of the second region AA2 may be electrically connected to the second pixel driving circuit 111B in the first region AA1 via the second transparent conductive line 341 located in the second transparent conductive layer 340, and some of the green second light-emitting devices 12A away from the first region AA1 in the second sub-region AA2b may be electrically connected to the second pixel driving circuit 111B via the first transparent conductive line 331 located in the first transparent conductive layer 330. The green second light-emitting devices 12A in the first sub-region AA2a of the second region AA2 may be electrically connected to the second pixel driving circuit 111B via the first transparent conductive line 331 located in the first transparent conductive layer 330. The second transparent conductive line 341 and the first transparent conductive line 331 electrically connected to the second green light light-emitting device 12A in the second area AA2 may be located on opposite sides of the second light-emitting device of the set in the second direction D2, for example, the first transparent conductive line 331 may be located on the upper side and the second transparent conductive line 341 may be located on the lower side.

[0091] In some examples, as shown in Figures 8A and 8D, among at least one set of second light-emitting devices in the second region A2, a plurality of blue second light-emitting devices 12B and a second red light light-emitting device 12C near the edge of the second region A2 may be electrically connected to a plurality of second pixel driving circuits 111B in the first region A1 via second transparent conductive lines 341 of the second transparent conductive layer 340, and a plurality of blue second light-emitting devices 12B and a second red light light-emitting device 12C near the center of the second region A2 may be electrically connected to a plurality of second pixel driving circuits 111B in the first region A1 via third transparent conductive lines 351 of the third transparent conductive layer 350. The second blue light emitting device 12B and the second red light emitting device 12C close to the first region A1 in the second sub-region AA2b of the second region A2 may be electrically connected to the second pixel driving circuit 111B via the second transparent conductive line 341 located in the second transparent conductive layer 340, and the second blue light emitting device 12B and the second red light emitting device 12C away from the first region A1 may be electrically connected to the second pixel driving circuit 111B via the third transparent conductive line 351 located in the third transparent conductive layer 350. The second blue light emitting device 12B and the second red light emitting device 12C in the first sub-region AA2a may be electrically connected to the second pixel driving circuit 111B via the third transparent conductive line 351 located in the third transparent conductive layer 350. In the second region A2, the second transparent conductive line 341 and the third transparent conductive line 351 electrically connected to the second blue light light emitting device 12B may be located on the same side of the second light emitting device of the set in the second direction D2, for example, the second transparent conductive line 341 may be located on the lower side and the third transparent conductive line 351 may be located on the upper side. The second transparent conductive line 341 and the third transparent conductive line 351 electrically connected to the second red light light emitting device 12C may be located on the same side of the second light emitting device of the set in the second direction D2, for example, the second transparent conductive line 341 may be located on the lower side and the third transparent conductive line 351 may be located on the upper side.

[0092] Fig. 9 is a schematic diagram of a parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection nodes of the second blue and red light-emitting devices of the display panel shown in Fig. 8A. In Fig. 9, the abscissa indicates the position of the second green light-emitting device in the first direction of the second region from the edge to the center of the second region, and the ordinate indicates the parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection nodes of the second blue and red light-emitting devices. In this example, the boundary between the first sub-region and the second sub-region may be between the positions of the 15th and 16th green light-emitting devices. As shown in Figures 8A and 9, in the first sub-region AA2a, the second green light light-emitting device 12A is electrically connected to the first transparent conductive line located in the first transparent conductive layer, and the second blue light light-emitting device 12B and the second red light light-emitting device 12C are electrically connected to the third transparent conductive line located in the third transparent conductive layer, so that the parasitic capacitance between the first transparent conductive layer and the third transparent conductive layer is small, and the crosstalk between the anode connection node of the second green light light-emitting device and the anode connection nodes of the second blue and red light light-emitting devices can be reduced. As shown in FIG. 9, the parasitic capacitances between the multiple green second light-emitting devices 12A (e.g., the 16th to 22nd green second light-emitting devices) in the first sub-region AA2a of this example and the anode connection nodes of the blue second light-emitting device 12B and the red second light-emitting device 12C may all be smaller than the maximum parasitic capacitance between the green second light-emitting device 12A and the anode connection nodes of the blue second light-emitting device 12B and the red second light-emitting device 12C in the second sub-region AA2b (e.g., the parasitic capacitance between the 15th green second light-emitting device and the anode connection electrodes of the other color light-emitting devices).

[0093] Fig. 10A is another schematic diagram of a connection between a second light-emitting device and a second pixel driving circuit according to at least one embodiment of the present disclosure. Fig. 10B is a schematic diagram of a connection between a first transparent conductive line of a first transparent conductive layer in Fig. 10A. Fig. 10C is a schematic diagram of a connection between a second transparent conductive line of a second transparent conductive layer in Fig. 10A. Fig. 10D is a schematic diagram of a connection between a third transparent conductive line of a third transparent conductive layer in Fig. 10A.

[0094] In some examples, as shown in Figures 10A to 10D, the second area AA2 may be divided into a first sub-area AA2a and a second sub-area AA2b. The second sub-area AA2b may surround the first sub-area A22a and be adjacent to the first area AA1. In one set of second light-emitting devices, the number of green second light-emitting devices in the first sub-area AA2a may be greater than the number of green second light-emitting devices in the second sub-area AA2a.

[0095] 10A-10C, the second green light emitting device 12A in the second sub-region AA2b of the second region AA2 may be electrically connected to the second pixel driving circuit 111B in the first region AA1 via a second transparent conductive line 341 located in the second transparent conductive layer 340. The second green light emitting device 12A in the first sub-region A2a may be electrically connected to the second pixel driving circuit 111B in the first region AA1 via a first transparent conductive line 331 in the first transparent conductive layer 330. The second transparent conductive line 341 and the first transparent conductive line 331 electrically connected to the second green light emitting device 12A in the second region AA2 may be located on the same side of the second light emitting device of the set in the second direction D2, for example, on the upper side.

[0096] In some examples, as shown in Figures 10A to 10D, the second blue light emitting device 12B and the second red light emitting device 12C in the second sub-region AA2b of the second region AA2 may be electrically connected to the second pixel driving circuit 111B in the first region AA1 through a second transparent conductive line 341 located in the second transparent conductive layer 340. The second blue light emitting device 12B and the second red light emitting device 12C in the first sub-region AA2a may be electrically connected to the second pixel driving circuit 111B in the first region AA1 through a third transparent conductive line 351 located in the third transparent conductive layer 350. The second transparent conductive line 341 and the third transparent conductive line 351 electrically connected to the second blue light emitting device 12B in the second region AA2 may be located on opposite sides of the second light emitting device of the set in the second direction D2, for example, the second transparent conductive line 341 may be located on the lower side and the third transparent conductive line 351 may be located on the upper side. The second transparent conductive line 341 and the third transparent conductive line 351 electrically connected to the second red light light emitting device 12C in the second area AA2 may be located on opposite sides of the second light emitting device of the set in the second direction D2, for example, the second transparent conductive line 341 may be located on the lower side and the third transparent conductive line 351 may be located on the upper side. The third transparent conductive line 351 electrically connected to the second blue light light emitting device 12B and the second red light light emitting device 12C and the first transparent conductive line 331 electrically connected to the second green light light emitting device 12A may be located on the same side of the second light emitting device of the set in the second direction D2.

[0097] Fig. 11 is a schematic diagram of a parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection node of the second blue and red light-emitting devices of the display panel shown in Fig. 10A. In Fig. 11, the abscissa indicates the position of the second green light-emitting device in the first direction of the second region from the edge to the center of the second region, and the ordinate indicates the parasitic capacitor between the anode connection node of the second green light-emitting device and the anode connection node of the second blue and red light-emitting devices. In this example, the boundary between the first sub-region and the second sub-region may be between the positions of the eighth and ninth green light-emitting devices. As shown in Figures 10A and 11, in the first sub-region AA2a, the second green light light-emitting device 12A is electrically connected to the first transparent conductive line located on the first transparent conductive layer, and the second blue light light-emitting device 12B and the second red light light-emitting device 12C are electrically connected to the third transparent conductive line located on the third transparent conductive layer, which can reduce to a certain extent the crosstalk between the anode connection node of the second green light light-emitting device and the anode connection nodes of the second blue and red light light-emitting devices, and improve the display effect. As shown in FIG. 11, the parasitic capacitance between the multiple green second light-emitting devices 12A (e.g., the 9th to 14th green second light-emitting devices) and the anode connection nodes of the blue second light-emitting device 12B and the red second light-emitting device 12C in the first sub-region AA2a in this example may be smaller than the maximum parasitic capacitance between the green second light-emitting device 12A and the anode connection nodes of the blue second light-emitting device 12B and the red second light-emitting device 12C in the second sub-region AA2b (e.g., the parasitic capacitance between the 8th green second light-emitting device and the anode connection nodes of the other color light-emitting devices).

[0098] In some exemplary embodiments, in the examples shown in Figures 6A, 8A and 10A, the crosstalk between the anode connection nodes of the second green light-emitting device and the second blue and red light-emitting devices in the second sub-region AA2b is small, and in the examples shown in Figures 8A and 10A, the crosstalk between the anode connection nodes of the second green light-emitting device and the second blue and red light-emitting devices in the first sub-region AA2a can also be improved. The display panel according to this embodiment can improve the crosstalk between the anode connection nodes of the second green light-emitting device and the second blue and red light-emitting devices in the second region, thereby improving the display effect of the second region.

[0099] FIG. 12 is a partial schematic diagram of a display panel according to at least one embodiment of the present disclosure. In some exemplary embodiments, as shown in FIG. 12, the second area AA2 may be divided into a first sub-area AA2a and a second sub-area AA2b. The second sub-area AA2b may surround the first sub-area A22a and be adjacent to the first area AA1. The first sub-area AA2a may be a central area of ​​the second area AA2, and the second sub-area AA2b may be an edge area of ​​the second area AA2. The film layer structure of the display panel of this embodiment will be described below with reference to the wiring example shown in FIG. 10A.

[0100] Fig. 13A is a schematic local top view of region S1 in Fig. 12. Fig. 13B is a schematic local top view of region S2 in Fig. 12. Fig. 14A is a schematic local cross-sectional view along the P-P' direction in Fig. 13A. Fig. 14B is a schematic local cross-sectional view along the Q-Q' direction in Fig. 13A. Fig. 14C is a schematic local cross-sectional view along the R-R' direction in Fig. 13A.

[0101] In some examples, as shown in FIG. 13A, the plurality of first light-emitting devices in the first area AA1 may include a plurality of green first light-emitting devices 11Aa and 11Ab, a plurality of blue first light-emitting devices 11B, and a plurality of red first light-emitting devices 11C. At least one pixel unit may include one blue first light-emitting device 11B, one red first light-emitting device 11C, one green first light-emitting device 11Aa, and one green first light-emitting device 11Ab. The blue first light-emitting device 11B and the red first light-emitting device 11C may be arranged at intervals along the first direction D1 and the second direction D2, respectively, and the green first light-emitting device 11Aa and the green first light-emitting device 11Ab may be arranged at intervals along the first direction D1 and the second direction D2. There is a misalignment between the row in which the blue first light emitting device 11B and the red first light emitting device 11C are located and the row in which the green first light emitting devices 11Aa and 11Ab are located, and there is also a misalignment between the column in which the blue first light emitting device 11B and the red first light emitting device 11C are located and the column in which the green first light emitting devices 11Aa and 11Ab are located. In some examples, the shape and size of the green first light emitting devices 11Aa and 11Ab may be substantially the same, for example, substantially rectangular. The blue first light emitting device 11B and the red first light emitting device 11C may be substantially rectangular, and the blue first light emitting device 11B may be larger than the red first light emitting device 11B.

[0102] In some examples, as shown in Figures 13A and 13B, the plurality of second light-emitting devices in the second area AA2 may include a plurality of second green light-emitting devices 12Aa and 12Ab, a plurality of second blue light-emitting devices 12B, and a plurality of second red light-emitting devices 12C. At least one pixel unit may include one second blue light-emitting device 12B, one second red light-emitting device 12C, one second green light-emitting device 12Aa, and one second green light-emitting device 12Ab. The arrangement of the second blue light-emitting device 12B, the second red light-emitting device 12C, and the second green light-emitting devices 12Aa and 12Ab may be substantially the same as the arrangement of the first blue light-emitting device 11B, the first red light-emitting device 11C, and the first green light-emitting devices 11Aa and 11Ab, and will not be described again here.

[0103] In some examples, the area of ​​the anode 412 of the second light-emitting device may be smaller than the area of ​​the anode 411 of the first light-emitting device emitting light of the same color. For example, the orthogonal projection of the anode of the second light-emitting device 12Aa and 12Ab of green light at the base may be a combination shape of an approximately elliptical body and a rectangular connection block. The orthogonal projection of the anode of the second light-emitting device 12B of blue light at the base may be a combination shape of an approximately circular body and a rectangular connection block, similar to the shape of a hot air balloon. The orthogonal projection of the anode of the second light-emitting device 12C of red light at the base may be a combination shape of an approximately elliptical body and a rectangular connection block, similar to the shape of a water drop. In this example, the corner smoothing design of the anode of the second light-emitting device in the second region can contribute to reducing diffraction during shooting by a sensor (e.g., a camera sensor) below the second region of the display panel, thereby improving the shooting effect.

[0104] In some examples, as shown in FIG. 13A, the shape and size of the anode of at least one first light-emitting device in the first region AA1 near the edge region of the second region AA2 may be approximately the same as the shape and size of the anode of a second light-emitting device in the second region AA2 that emits light of the same color.

[0105] In some examples, as shown in FIG. 14A and FIG. 14C, in the direction perpendicular to the display panel, the display panel of the first area AA1 and the second area AA2 may include a base 310, a circuit structure layer 20 disposed on the base 310, a first transparent conductive layer 330, a second transparent conductive layer 340, a third transparent conductive layer 350, and a light-emitting structure layer. The circuit structure layer 20 of the first area AA1 may include a plurality of pixel driving circuits. The circuit structure layer 20 of the second area AA2 may include a plurality of insulating layers disposed in a stacked manner. A first flat layer 21 may be disposed between the first transparent conductive layer 330 and the second transparent conductive layer 340, and a second flat layer 22 may be disposed between the second transparent conductive layer 340 and the third transparent conductive layer 350. A third flat layer 23 may be disposed between the third transparent conductive layer 350 and the light-emitting structure layer. The light-emitting structure layer may include an anode layer 41, a pixel definition layer, an organic light-emitting layer, and a cathode layer. The first flat layer 21 to the third flat layer 23 may be organic material layers, but this is not limited thereto in this embodiment. In other examples, the display panel may include two or more transparent conductive layers.

[0106] Fig. 15A is a schematic top view of the display panel after the formation of the first transparent conductive layer in Fig. 13A. Fig. 15B is a schematic top view of the display panel after the formation of the first transparent conductive layer in Fig. 13B. Fig. 16A is a schematic top view of the display panel after the formation of the second transparent conductive layer in Fig. 13A. Fig. 16B is a schematic top view of the display panel after the formation of the second transparent conductive layer in Fig. 13B. Fig. 17A is a schematic top view of the display panel after the formation of the third transparent conductive layer in Fig. 13A. Fig. 17B is a schematic top view of the display panel after the formation of the third transparent conductive layer in Fig. 13B.

[0107] In some examples, as shown in Figures 15A and 15B, the first transparent conductive layer 330 may include a plurality of first transparent conductive lines 331, a plurality of first anode connecting electrodes 332a, and a plurality of second anode connecting electrodes 332b and 332c. The plurality of first transparent conductive lines 331 may extend from the first area AA1 to the second area AA2. The plurality of first anode connecting electrodes 332a may be located in the first area AA1, and the plurality of second anode connecting electrodes 332b and 332c may be located in the second area AA2. One second anode connecting electrode 332c and one first transparent conductive line 331 may be electrically connected, for example, may be an integrated structure.

[0108] In some examples, as shown in Figures 16A and 16B, the second transparent conductive layer 340 may include a plurality of second transparent conductive lines 341, a plurality of third anode connecting electrodes 342a, and a plurality of fourth anode connecting electrodes 342b and 342c. The plurality of second transparent conductive lines 341 may extend from the first area AA1 to the second area AA2. The plurality of third anode connecting electrodes 342a may be located in the first area AA1, and the plurality of fourth anode connecting electrodes 342b and 342c may be located in the second area AA2. One fourth anode connecting electrode 342c and one second transparent conductive line 341 may be electrically connected, for example, may be an integrated structure.

[0109] In some examples, as shown in Figures 17A and 17B, the third transparent conductive layer 350 may include a plurality of third transparent conductive lines 351, a plurality of fifth anode connecting electrodes 352a, and a plurality of sixth anode connecting electrodes 352b and 352c. The plurality of third transparent conductive lines 351 may extend from the first area AA1 to the second area AA2. The plurality of fifth anode connecting electrodes 352a may be located in the first area AA1, and the plurality of sixth anode connecting electrodes 352b and 352c may be located in the second area AA2. One third transparent conductive line 351 and one sixth anode connecting electrode 352c may be electrically connected, for example, may be an integrated structure.

[0110] In some examples, as shown in Figures 13A to 17B, the orthogonal projection at the base of the portion of the second transparent conductive line 341 extending along the first direction D1 and the portion of the first transparent conductive line 331 extending along the first direction D1 may have an overlapping portion. For example, the orthogonal projection at the base of the portion of the second transparent conductive line 341 extending along the first direction D1 may overlap with the orthogonal projection at the base of the portion of the first transparent conductive line 331 extending along the first direction D1, i.e., the portions of the first transparent conductive line 331 and the second transparent conductive line 341 extending along the first direction D1 may have approximately the same length in the second direction D2. However, this is not limited to this embodiment.

[0111] In some examples, as shown in Figures 13A to 17B, there may be no overlap between the orthogonal projection at the base of the portion where the third transparent conductive line 351 extends along the first direction D1 and the orthogonal projection at the base of the portions where the first transparent conductive line 331 and the second transparent conductive line 341 extend along the first direction D1. As shown in Figure 14A, the orthogonal projection at the base of the portion where the third transparent conductive line 351 extends along the first direction D1 may be located between the orthogonal projections at the base of the portions where two adjacent second transparent conductive lines 341 extend along the first direction D1. However, this is not limited to this embodiment.

[0112] 13A and 13B, the anode layer 41 may include an anode 411 of a first light-emitting device located in a first region AA1 and an anode 412 of a second light-emitting device located in a second region AA2. In some examples, the area of ​​the anode of the first light-emitting device may be larger than the area of ​​the anode of a second light-emitting device emitting light of the same color, thereby improving the light transmittance of the second region.

[0113] In some examples, as shown in FIG. 13A, the anode 411 of the first light-emitting device in the first region AA1 may be electrically connected to the fifth anode-connecting electrode 352a of the third transparent conductive layer 350 through a via (e.g., the seventh via K7) opened in the third flat layer 23. As shown in FIG. 17A, the fifth anode-connecting electrode 352a may be electrically connected to the third anode-connecting electrode 342a of the second transparent conductive layer 340 through a via (e.g., the fourth via K4) opened in the second flat layer 22. As shown in FIG. 16A and FIG. 15A, the third anode-connecting electrode 342a may be electrically connected to the first anode-connecting electrode 332a of the first transparent conductive layer 330 through a via (e.g., the first via K1) opened in the first flat layer 21. The first anode-connecting electrode 332a may be electrically connected to the first pixel driving circuit of the circuit structure layer 20. In this embodiment, the anode 411 of the first light-emitting device in the first region AA1 may be electrically connected to the circuit structure layer through the anode connecting electrodes located on the three transparent conductive layers, but this embodiment is not limited thereto. In another embodiment, the anode of the first light-emitting device in the first region AA1 is directly electrically connected to the anode connecting electrode of a transparent conductive layer, and then the anode connecting electrode is directly electrically connected to the corresponding first pixel driving circuit.

[0114] In some examples, as shown in Figures 13A and 13B, at least one anode 412 in the second region AA2 may be electrically connected to the sixth anode-connecting electrode 352b of the third transparent conductive layer 350 through a via (e.g., the eighth via K8) opened in the third flat layer 23, or may be electrically connected to the sixth anode-connecting electrode 352c of the third transparent conductive layer 350 through a via (e.g., the ninth via K9) opened in the third flat layer 23. The sixth anode-connecting electrode 352b may be electrically connected to the fourth anode-connecting electrode 342b or 342c of the second transparent conductive layer 340 through a via (e.g., the fifth via K5) opened in the second flat layer 22. The sixth anode-connecting electrode 352c may be electrically connected to the fourth anode-connecting electrode 342b of the second transparent conductive layer 340 through a via (e.g., the sixth via K6) opened in the second flat layer 22. The fourth anode-connecting electrode 342b may be electrically connected to the second anode-connecting electrode 332b or 332c of the first transparent conductive layer 330 through a via (for example, the third via K3) opened in the first flat layer 21. The fourth anode-connecting electrode 342c may be electrically connected to the second anode-connecting electrode 332b of the first transparent conductive layer 330 through a via (for example, the second via K2) opened in the first flat layer 21. In this example, the anode 412 of the second light-emitting device in the second area AA2 may be electrically connected to the second pixel driving circuit of the circuit structure layer through the anode connecting electrodes located in the three transparent conductive layers. However, this embodiment is not limited thereto. In another example, the anode of the second light-emitting device in the second area AA2 is electrically connected to the anode connecting electrode of a transparent conductive layer, and then the anode connecting electrode is directly electrically connected to the second pixel driving circuit of the circuit structure layer. Also, for example, the anode of the second light-emitting element in the second display area A2 may be directly electrically connected to the second pixel circuit.

[0115] FIG. 18 is a partial schematic diagram of a display panel according to at least one embodiment of the present disclosure. In some examples, as shown in FIG. 18, the second sub-area AA2a of the second area AA2 may include a transition area AA2-1. The transition area AA2-1 may be provided with wiring and an invalid pixel driving circuit. The areas in the second area AA2 other than the transition area AA2-1 are all transparent areas. The orthogonal projection of the base of the light-sensitive area of ​​the sensor below the display panel may be located in the transparent area of ​​the second area AA2. The transparent area may not be provided with pixel driving circuits and metal wiring. The transition area AA2-1 may surround the periphery of the transparent area. In some examples, the transition area AA2-1 may be provided with a first connection line 51 and a second connection line 52. The first connection line 51 may connect the first initial signal line INIT1 disconnected by the second area AA2, and the second connection line 52 may connect the second initial signal line INIT2 disconnected by the second area AA2.

[0116] Fig. 19 is a schematic top view of the circuit structure layer in region S3 in Fig. 18. Fig. 20 is a schematic local cross-sectional view along the U-U' direction in Fig. 19. Fig. 21A is a schematic top view of the display panel after the semiconductor layer is formed in Fig. 19. Fig. 21B is a schematic top view of the display panel after the first gate metal layer is formed in Fig. 19. Fig. 21C is a schematic top view of the display panel after the second gate metal layer is formed in Fig. 19. Fig. 21D is a schematic top view of the display panel after the third insulating layer is formed in Fig. 19. Fig. 21E is a schematic top view of the display panel after the first source-drain metal layer is formed in Fig. 19.

[0117] 19 and 20, the circuit structure layer 20 in the transition area AA2-1 of the first area AA1 and the second area AA2 may include a semiconductor layer 200, a first insulating layer 211, a first gate metal layer 201, a second insulating layer 212, a second gate metal layer 202, a third insulating layer 213, a first source drain metal layer 203, a fourth insulating layer 214, a second source drain metal layer 204, and a fifth insulating layer 215, which are sequentially stacked on the base 310. The circuit structure layer 20 in the light transmitting area of ​​the second area AA2 may include a first insulating layer 211, a second insulating layer 212, a third insulating layer 213, a fourth insulating layer 214, and a fifth insulating layer 215, which are sequentially stacked on the base 310. In some examples, the first insulating layer 211 to the fourth insulating layer 214 may be inorganic material layers, and the fifth insulating layer 215 may be an organic material layer, or the first insulating layer 211 to the third insulating layer 213 may be inorganic material layers, and the fourth insulating layer 214 and the fifth insulating layer 215 may be organic material layers. However, this embodiment is not limited to this.

[0118] In some examples, as shown in Fig. 19, the first area AA1 may include a first circuit area AA1-1 and a second circuit area AA1-2. The first circuit area AA1-1 may include a plurality of first pixel driving circuits, and the second circuit area AA1-2 may include a plurality of second pixel driving circuits, or a plurality of second pixel driving circuits and an invalid pixel driving circuit. In this example, four first pixel driving circuits in the first circuit area AA1-1 and one second pixel driving circuit in the second circuit area AA1-2 are shown as an example. Two invalid pixel driving circuits are shown as an example for the transition area AA2-1.

[0119] The structure of the display panel will be described below by taking an example of the manufacturing process of the display panel. The "patterning process" described in the embodiments of the present disclosure includes processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping for metal materials, inorganic materials, or transparent conductive materials, and organic material coating, mask exposure, and development for organic materials. The deposition may employ any one or more of sputtering, deposition coating, and chemical vapor deposition. The coating may employ any one or more of spray coating, spin coating, and inkjet printing. The etching may employ any one or more of dry etching and wet etching. This disclosure is not limited thereto. A "thin film" refers to a layer of a thin film fabricated by deposition, coating, or other process on a base using a certain material. If the "thin film" does not require a patterning process in the entire manufacturing process, the "thin film" is also referred to as a "layer". If the "thin film" requires a patterning process in the entire manufacturing process, it is referred to as a "thin film" before the patterning process and as a "layer" after the patterning process. After the patterning process, a "layer" contains at least one "pattern."

[0120] In some exemplary embodiments, the manufacturing process of the display panel may include the following operations: The equivalent circuit diagram of the pixel driving circuit of the first area AA1 may be as shown in Figure 3. The structure of the first pixel driving circuit is taken as an example below, and the structures of the second pixel driving circuit and the invalid pixel driving circuit are similar.

[0121] (1) Provide the base. In some exemplary embodiments, the base 310 may be a flexible substrate or a rigid substrate, such as a glass substrate, although this embodiment is not limited thereto.

[0122] (2) The semiconductor layer 200 is formed. In some exemplary embodiments, a semiconductor thin film is deposited on the base 310 of the first area AA1 and the transition area AA2-1, and the semiconductor thin film is patterned by a patterning process to form a semiconductor layer 200 in the first area A1 and the transition area AA2-1. As shown in FIG. 19 and FIG. 21A, the semiconductor layer 200 may include active layers of multiple transistors of the pixel driving circuit (for example, including the active layer T10 of the first reset transistor T1, the active layer T20 of the threshold compensation transistor T2, the active layer T30 of the driving transistor T3, the active layer T40 of the data write transistor T4, the active layer T50 of the first emission control transistor T5, the active layer T60 of the second emission control transistor T6, and the active layer T70 of the second reset transistor T7 of the pixel driving circuit). The active layers of the seven transistors of one pixel driving circuit may be an integrated structure connected to each other.

[0123] In some exemplary embodiments, the material of the semiconductor layer 200 may include, for example, polysilicon. The active layer may include at least one channel region, and first and second areas located on either side of the channel region. The channel region may be undoped with impurities and may have semiconducting properties. The first and second areas may be located on either side of the channel region and are doped with impurities and therefore conductive. The impurities may vary depending on the type of transistor. In some examples, the doped areas of the active layer may be interpreted as source or drain electrodes of the transistor. The portions of the active layer between the transistors may be interpreted as wiring that is doped with impurities and may be used to electrically connect the transistors.

[0124] (3) forming a first gate metal layer; In some exemplary embodiments, a first insulating thin film and a first metal thin film are sequentially deposited on the base 310 on which the above structure is formed, and the first metal thin film is patterned by a patterning process to form a first insulating layer 211 covering the semiconductor layer 200, and a first gate metal layer 201 disposed on the first insulating layer 211 in the first region AA1 and the transition region AA2-1. As shown in FIG. 19 and FIG. 21B, the first gate metal layer 201 may include gate electrodes of a plurality of transistors of a pixel driving circuit, a first capacitor plate Cst-1 of a storage capacitor Cst, a first reset control line RST1, a second reset control line RST2, a scanning line GL, and an emission control line EML. The first reset control line RST1 and the gate electrode of the first reset transistor T1 of the pixel driving circuit of the same row may be an integrated structure. The scanning line GL and the gate electrode of the data writing transistor T4 and the gate electrode of the threshold compensation transistor T2 of the pixel driving circuit of the same row may be an integrated structure. The gate electrode of the driving transistor T3 and the first capacitor plate Cst-1 of the storage capacitor Cst in the same pixel driving circuit may be integrated. The light emission control line EML and the gate electrodes of the first light emission control transistor T5 and the second light emission control transistor T61 in the pixel driving circuit in the same row may be integrated. The second reset control line RST2 and the gate electrode of the second reset transistor T7 in the pixel driving circuit in the same row may be integrated.

[0125] (4) forming a second gate metal layer; In some exemplary embodiments, a second insulating thin film and a second metal thin film are sequentially deposited on the base 310 on which the above structure is formed, and the second metal thin film is patterned by a patterning process to form a second insulating layer 212 covering the first gate metal layer 201, and a second gate metal layer 202 disposed on the second insulating layer 212 in the first region AA1 and the transition region AA2-1. As shown in FIG. 19 and FIG. 21C, the second gate metal layer 202 may include a second capacitor plate Cst-2 of the storage capacitor Cst of the pixel driving circuit, a first initial signal line INIT1, and a second initial signal line INIT2. At least one of the first initial signal line INIT1 and the second initial signal line INIT2 may extend to the transition region AA2-1 along a first direction D1.

[0126] (5) forming a third insulating layer and a first source / drain metal layer; In some exemplary embodiments, a third insulating thin film is deposited on the base 310 on which the above structure is formed, and a patterning process is used to form a third insulating layer 213. A number of pixel vias are opened in the third insulating layer 213. Then, a third metal thin film is deposited, and a patterning process is used to pattern the third metal thin film to form a first source drain metal layer 203 disposed on the third insulating layer 213 in the first region AA1 and the transition region AA2-1.

[0127] In some examples, as shown in FIG. 19 and FIG. 21D, the third insulating layer 213 in the first circuit area AA1-1 of the first area AA1 may have a plurality of pixel vias, for example including the first pixel via V1 to the tenth pixel via V10. The third insulating layer 213, the second insulating layer 212 and the first insulating layer 211 in the first pixel via V1 to the sixth pixel via V6 are removed to expose the surface of the semiconductor layer 200. The third insulating layer 213 and the second insulating layer 212 in the seventh pixel via V7 are removed to expose the surface of the first gate metal layer 201. The third insulating layer 213 in the eighth pixel via V8 to the tenth pixel via V10 are removed to expose the surface of the second gate metal layer 202. The third insulating layer 213 in the transition area AA2-1 may further have a plurality of eleventh pixel vias V11 and a twelfth pixel via V12, and the third insulating layer 213 in the eleventh pixel via V11 is removed to expose the surface of the first initial signal line INIT1, and the third insulating layer 213 in the twelfth pixel via V12 is removed to expose the surface of the second initial signal line INIT2.

[0128] In some examples, as shown in FIG. 19 and FIG. 21E, the first source-drain metal layer 203 of the first circuit area AA1-1 of the first area AA1 may include a data line DL, a first power line PL1, and a plurality of connection electrodes (for example, the first connection electrode CP1 to the sixth connection electrode CP6). The first connection electrode CP1 may be electrically connected to a first area of ​​the active layer T10 of the first reset transistor T1 through the first pixel via V1, and may further be electrically connected to the first initial signal line INIT1 through the eighth pixel via V8. The second connection electrode CP2 may be electrically connected to the gate electrode of the driving transistor T3 through the seventh pixel via V7, and may further be electrically connected to a first area of ​​the active layer T20 of the threshold compensation transistor T2 through the second pixel via V2. The third connection electrode CP3 may be electrically connected to a first area of ​​the active layer T40 of the data write transistor T4 through the third pixel via V3. The fourth connection electrode CP4 may be electrically connected to a first area of ​​the active layer T50 of the first emission control transistor T5 through a fourth pixel via V4, and may further be electrically connected to the second capacitor plate Cst-2 of the storage capacitor Cst through a ninth pixel via V9. The fifth connection electrode CP5 may be electrically connected to a second area of ​​the active layer T60 of the second emission control transistor T6 through a fifth pixel via V5. The sixth connection electrode CP6 may be electrically connected to a first area of ​​the active layer T70 of the second reset control transistor T7 through a sixth pixel via V6, and may further be electrically connected to the second initial signal line INIT2 through a tenth pixel via V10.

[0129] In some examples, the first source-drain metal layer 203 of the transition area AA2-1 may include a first connection line 51 and a second connection line 52. The first connection line 51 may be located on a side of the second connection line 52 that is away from the first area AA1. The first connection line 51 may be electrically connected to the first initial signal line INIT1 through the eleventh pixel via V11. The second connection line 52 may be electrically connected to the second initial signal line INIT2 through the twelfth pixel via V12. In this example, the first connection line and the second connection line are provided to surround the second area, thereby realizing the transmission of the first initial signal and the second initial signal in the areas on both sides of the second area in the first direction D1.

[0130] In some examples, the first source-drain metal layer 203 in the transition area AA2-1 may further include a third connection line 53. The third connection line 53 may extend from the transition area AA2-1 to the second circuit area AA1-2 in the first area AA1 along the first direction D1. In this example, the second light-emitting device in the transition area AA2-1 may be electrically connected to the second pixel driving circuit in the first area AA1 (e.g., the second pixel driving circuit in the first area AA1 that is closest to the second area AA2) via the third connection line 53. As shown in FIG. 21E, the third connection line 53 may have one end integral with the fifth connection electrode of the ineffective pixel driving circuit in the transition area AA2-1, and the other end integral with the fifth connection electrode of the second pixel driving circuit in the second circuit area AA1-2. The fifth connection electrode of the ineffective pixel circuit and the semiconductor layer may not be electrically connected. In this example, the wiring located in the first source-drain metal layer realizes the electrical connection between the second light-emitting device and the second pixel driving circuit in the transition region AA2-1, thereby contributing to reducing the conductive lines in the transparent conductive layer, rationally arranging the conductive lines in the transparent conductive layer, and avoiding the impact of an excess of conductive lines on the wiring arrangement.

[0131] (6) forming a second source / drain metal layer; In some exemplary embodiments, a fourth metal thin film is deposited on the base 310 on which the above structure is formed, and the fourth metal thin film is patterned by a patterning process to form a second source-drain metal layer 204 disposed on the fourth insulating layer 214 in the first area AA and the transition area AA2-1. In some examples, as shown in FIG. 19, the second source-drain metal layer 204 may include a data line DL, a first power line PL1, and a connecting electrode (e.g., a seventh connecting electrode CP7). The seventh connecting electrode CP7 in the first circuit area AA1-1 may be electrically connected to the fifth connecting electrode CP5 through a fifteenth via V15 opened in the fourth insulating layer 214, and further, the seventh connecting electrode CP7 may be electrically connected to the anode of the first light-emitting device through an anode connecting electrode. The seventh connecting electrode CP7 in the second circuit area AA1-2 may not be electrically connected to the fifth connecting electrode of the second pixel driving circuit. The seventh connecting electrode in the transition area AA2-1 may not be electrically connected to the invalid pixel driving circuit, and may be electrically connected to the third connecting line 53, so as to be later electrically connected to the anode of the second light-emitting device, thereby realizing the electrical connection between the second pixel driving circuit and the anode of the second light-emitting device via the third connecting line 53.

[0132] In some exemplary embodiments, a fifth insulating thin film is applied to the base 310 on which the above structures are formed, and a fifth insulating layer 215 is formed by a patterning process.

[0133] Up to this point, the manufacture of the circuit structure layer 20 is completed. The light-transmitting area of ​​the second area AA2 may include a base 310, a first insulating layer 211, a second insulating layer 212, a third insulating layer 213, a fourth insulating layer 214 and a fifth insulating layer 215 stacked on the base 310.

[0134] (7) Forming a first transparent conductive layer. In some exemplary embodiments, as shown in Figures 15A and 15B, a first transparent conductive thin film is deposited on a base 310 on which the above structure is formed, and the first transparent conductive thin film is patterned by a patterning process to form a first transparent conductive layer 330 that is placed on the fifth insulating layer 215.

[0135] (8) forming a first flat layer and a second transparent conductive layer; In some exemplary embodiments, a first planar thin film is applied to the base 310 on which the above structures are formed, and a patterning process is used to form the first planar layer 21. Then, a second transparent conductive thin film is deposited, and the second transparent conductive thin film is patterned by a patterning process to form a second transparent conductive layer 340 disposed on the first planar layer 21, as shown in Figures 16A and 16B.

[0136] (9) forming a second flat layer and a third transparent conductive layer; In some exemplary embodiments, a second planar thin film is applied to the base 310 on which the above structures are formed, and a patterning process is used to form the second planar layer 22. Then, a third transparent conductive thin film is deposited, and a patterning process is used to pattern the third transparent conductive thin film to form a third transparent conductive layer 350 disposed on the second planar layer 22, as shown in Figures 17A and 17B.

[0137] (10) Form a light-emitting structure layer. In some exemplary embodiments, a third planar thin film is applied to the base 310 on which the above structure is formed, and a third planar layer 23 is formed by a patterning process. Then, an anode conductive thin film is deposited, and the anode conductive thin film is patterned by a patterning process to form an anode layer 41 disposed on the third planar layer 23. Then, a pixel defining thin film is applied to the base substrate on which the above pattern is formed, and a pixel defining layer (PDL, Pixel Define Layer) is formed by a mask, exposure and development process. A plurality of pixel openings are formed in the pixel defining layer to expose the anode layer. An organic light emitting layer is formed in the above formed pixel openings, and the organic light emitting layer is connected to the anode. Then, a cathode thin film is deposited, and the cathode thin film is patterned by a patterning process to form a cathode pattern, and the cathode is electrically connected to the organic light emitting layer and the second power line, respectively. Then, an encapsulating layer is formed on the cathode, and the encapsulating layer may include a laminated structure of inorganic material / organic material / inorganic material.

[0138] In some exemplary embodiments, the first gate metal layer 201, the second gate metal layer 202, the first source drain metal layer 203 and the second source drain metal layer 204 may adopt a metal material, such as one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy material of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and may be a single layer structure or a multi-layer composite structure, such as Mo / Cu / Mo. The first transparent conductive layer 330 to the third transparent conductive layer 350 may adopt a transparent conductive material, such as indium tin oxide (ITO). The first insulating layer 211, the second insulating layer 212, the third insulating layer 213 and the fourth insulating layer 214 may adopt one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), and may be a single layer, a multi-layer or a composite layer. The fifth insulating layer 215 and the first to third flat layers 21 to 23 may be made of organic materials such as polyimide, acrylic, or polyethylene terephthalate. The pixel definition layer may be made of organic materials such as polyimide, acrylic, or polyethylene terephthalate. The anode layer 41 may be made of a reflective material such as metal, and the cathode may be made of a transparent conductive material. However, this is not limited to this embodiment.

[0139] The structure of the display panel and its manufacturing process in this embodiment are merely illustrative. In some exemplary embodiments, the corresponding structure can be changed or the patterning process can be increased or decreased according to actual needs. The manufacturing process according to this exemplary embodiment can be realized by using currently mature manufacturing equipment, has good compatibility with conventional manufacturing processes, is simple to realize and easy to implement, has high production efficiency, low production cost, and high yield rate.

[0140] In other exemplary embodiments, the conductive lines of the second and third transparent conductive layers may overlap in the first direction, but the conductive lines of the first transparent conductive layer may not overlap in the orthogonal projection at the base between the conductive lines of the first transparent conductive layer and the conductive lines of the other two conductive layers. For example, the second light-emitting devices of the first type in the first sub-region of the second region may be electrically connected to the second pixel driving circuit via the first transparent conductive line of the first transparent conductive layer, and the second light-emitting devices of the second type may be electrically connected to the second pixel driving circuit via the second transparent conductive line of the second transparent conductive layer. Also, for example, the second light-emitting devices of the first type in the first sub-region may be electrically connected to the second pixel driving circuit via the second transparent conductive line of the second transparent conductive layer, and the second light-emitting devices of the second type may be electrically connected to the second pixel driving circuit via the first transparent conductive line of the first transparent conductive layer.

[0141] In other exemplary embodiments, there may be overlap between the conductive lines of the first and third transparent conductive layers extending along the first direction, and there may be no overlap between the conductive lines of the second transparent conductive layer extending along the first direction and the conductive lines of the other two conductive layers extending along the first direction in an orthogonal projection at the base. For example, the second light-emitting devices of the first type in the first sub-region of the second region may be electrically connected to the second pixel driving circuit via the first transparent conductive line of the first transparent conductive layer, and the second light-emitting devices of the second type may be electrically connected to the second pixel driving circuit via the second transparent conductive line of the second transparent conductive layer. Also, for example, the second light-emitting devices of the first type in the first sub-region may be electrically connected to the second pixel driving circuit via the second transparent conductive line of the second transparent conductive layer, and the second light-emitting devices of the second type may be electrically connected to the second pixel driving circuit via the first transparent conductive line of the first transparent conductive layer.

[0142] In other exemplary embodiments, the display panel may include four or more transparent conductive layers. The transparent conductive lines electrically connected to the first type of second light-emitting devices and the second type of second light-emitting devices in the first sub-region of the second region may be located in two different transparent conductive layers, and the two different transparent conductive layers may be separated by at least one transparent conductive layer.

[0143] In the display panel according to this embodiment, by adjusting the film layer of the transparent conductive line electrically connected to the first type of second light-emitting device and the second type of second light-emitting device in the first region, the crosstalk between the first type of second light-emitting device and the second type of second light-emitting device is reduced, the display uniformity of the second region is improved, and the display effect of the second region is enhanced.

[0144] At least one embodiment of the present disclosure further provides a display device, comprising the above-mentioned display panel.

[0145] The drawings in this disclosure only relate to the structures related to this disclosure, and other structures may refer to the general design. Where there is no conflict, the embodiments and features of the embodiments in this disclosure may be combined with each other to obtain new embodiments. As can be understood by those skilled in the art, modifications or equivalent substitutions may be made to the technical solution of this disclosure without departing from the spirit and scope of the technical solution of this disclosure. Any such modifications or equivalent substitutions should be included in the scope of the claims of this disclosure. [Explanation of symbols]

[0146] 12A Green second light emitting device 12B Blue light second light emitting device 12C Red light second light emitting device 111B second pixel driving circuit 330 First transparent conductive layer 331 1st transparent conductive wire 340 Second transparent conductive layer 341 2nd transparent conductive wire 350 Third transparent conductive layer 351 3rd transparent conductive wire

Claims

1. A display panel having a display area, the display area including a first area and a second area that do not overlap each other, the first area being located on at least one side of the second area, The display panel includes: With the base, a circuit structure layer disposed on one side of the base, the circuit structure layer including a plurality of second pixel driving circuits disposed in the first region; a light emitting structure layer located on a side of the circuit structure layer away from the base, the light emitting structure layer including a plurality of second light emitting devices located in the second region; a plurality of conductive layers located between the circuit structure layer and the light emitting structure layer, the conductive layers including a plurality of conductive lines, wherein at least one second pixel driving circuit among the plurality of second pixel driving circuits is electrically connected to at least one second light emitting device among the plurality of second light emitting devices via the conductive lines of the at least one conductive layer among the plurality of conductive layers, and the at least one second pixel driving circuit is configured to drive the emission of the at least one second light emitting device; The display panel, wherein there is an overlapping portion when orthogonally projected onto the base of portions of the conductive lines of at least two of the plurality of conductive layers extending along a first direction.

2. 2. The display panel of claim 1, wherein the plurality of second light-emitting devices in the second region include a plurality of first type second light-emitting devices and a plurality of second type second light-emitting devices, the first type second light-emitting devices are configured to emit light of a first color, and the second type second light-emitting devices are configured to emit light of a second color, the second color light being different from the first color light.

3. The plurality of second light emitting devices in the second region include a plurality of sets of second light emitting devices, the second light emitting devices in each set of the plurality of sets of second light emitting devices are arranged along the first direction, the plurality of sets of second light emitting devices are arranged along a second direction, and the second direction intersects with the first direction; 3. The display panel of claim 2, wherein in at least one set of the second light-emitting devices, a plurality of second pixel driving circuits electrically connected to the plurality of first type second light-emitting devices are closer to the second region than each of a plurality of second pixel driving circuits electrically connected to the plurality of second type second light-emitting devices.

4. the plurality of conductive layers include a first transparent conductive layer, a second transparent conductive layer and a third transparent conductive layer disposed in sequence along a side away from the base; the first transparent conductive layer includes a plurality of first transparent conductive lines, the second transparent conductive layer includes a plurality of second transparent conductive lines, and the third transparent conductive layer includes a plurality of third transparent conductive lines; a portion where a first transparent conductive line of the first transparent conductive layer extends along the first direction and a portion where a second transparent conductive line of the second transparent conductive layer extends along the first direction overlap with each other when orthogonally projected on the base; 3. The display panel of claim 2, wherein there is no overlapping portion between a portion where the third transparent conductive line of the third transparent conductive layer extends along the first direction and a portion where the first transparent conductive line of the first transparent conductive layer and the second transparent conductive line of the second transparent conductive layer extend along the first direction when projected orthogonally on the base.

5. 5. The display panel of claim 4, wherein, of at least one set of second light-emitting devices in the second region, a first type of second light-emitting devices near an edge of the second region are electrically connected to a first type of second pixel driving circuit via a second transparent conductive line of the second transparent conductive layer, and a first type of second light-emitting devices near a center of the second region are electrically connected to a first type of second pixel driving circuit via a first transparent conductive line of the first transparent conductive layer.

6. 6. The display panel of claim 5, wherein among at least one set of second light-emitting devices in the second region, the second transparent conductive lines and the first transparent conductive lines electrically connected to the plurality of first type second light-emitting devices are located on opposite sides or on the same side of the second light-emitting devices of the set in the second direction.

7. 6. The display panel of claim 5, wherein, of at least one set of second light-emitting devices in the second region, a plurality of second type second light-emitting devices near an edge of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via second transparent conductive lines of the second transparent conductive layer, and a plurality of second type second light-emitting devices near a center of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via third transparent conductive lines of the third transparent conductive layer.

8. 8. The display panel of claim 7, wherein the second transparent conductive lines and the third transparent conductive lines electrically connected to the plurality of second type second light-emitting devices of at least one set of second light-emitting devices in the second region are located on opposite sides or on the same side of the second light-emitting devices of the set in the second direction.

9. 8. The display panel of claim 7, wherein, among at least one set of second light-emitting devices in the second region, a second transparent conductive line electrically connected to the first type of second light-emitting device and a second transparent conductive line electrically connected to the second type of second light-emitting device are located on opposite sides of the second light-emitting device of the set in the second direction.

10. 8. The display panel of claim 7, wherein among at least one set of second light-emitting devices in the second region, a first transparent conductive line electrically connected to the first type of second light-emitting device and a third transparent conductive line electrically connected to the second type of second light-emitting device are located on the same side of the second light-emitting device of the set in the second direction.

11. Among the at least one set of second light-emitting devices in the second region, a first group of second light-emitting devices near an edge of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via first transparent conductive lines of the first transparent conductive layer, and a first group of second light-emitting devices near a center of the second region are electrically connected to a plurality of second pixel driving circuits in the first region via second transparent conductive lines of the second transparent conductive layer; 5. The display panel of claim 4, wherein the first transparent conductive line and the second transparent conductive line electrically connected to the first type of second light-emitting device are located on the same side of the second light-emitting device of the set in the second direction.

12. Among the at least one set of second light-emitting devices in the second region, a second group of second light-emitting devices near an edge of the second region are electrically connected to a second group of second pixel driving circuits in the first region via second transparent conductive lines of the second transparent conductive layer, and a second group of second light-emitting devices near a center of the second region are electrically connected to a second group of second pixel driving circuits in the first region via third transparent conductive lines of the third transparent conductive layer; 12. The display panel of claim 11, wherein the second transparent conductive line electrically connected to the second type of second light-emitting device and the second transparent conductive line electrically connected to the first type of second light-emitting device are located on opposite sides of the second light-emitting device of the set in the second direction.

13. the second region is partitioned into a first sub-region and a second sub-region, the second sub-region surrounds the first sub-region and is adjacent to the first region; 3. The display panel of claim 2, wherein a parasitic capacitance between an anode connection node of at least one first type of second light-emitting device located in the first sub-region and an anode connection node of the second type of second light-emitting device is less than or equal to a maximum parasitic capacitance between an anode connection node of a first type of second light-emitting device located in the second sub-region and an anode connection node of a second type of second light-emitting device.

14. The display panel of claim 2 , wherein the first color light is green light, and the second color light includes at least one of blue light and red light.

15. The circuit structure layer further includes a plurality of first pixel driving circuits located in the first region, and the light emitting structure layer further includes a plurality of first light emitting devices located in the first region; 2. The display panel of claim 1, wherein at least one first pixel drive circuit of the plurality of first pixel drive circuits is electrically connected to at least one first light-emitting device of the plurality of first light-emitting devices, and the at least one first pixel drive circuit is configured to drive the emission of light from the at least one first light-emitting device.

16. A display device comprising the display panel according to claim 1.

17. The display device according to claim 16 , further comprising a sensor located on a non-display surface side of the display panel, wherein there is an overlapping portion between the orthogonal projection of the sensor on the display panel and the second region of the display panel.

Images