System and method for template matching for adaptive MVD resolution - Patents.com
By employing template matching methods for adaptive MVD resolution in video coding, the challenges of compressing video data while maintaining quality are addressed, resulting in improved efficiency and performance.
Patent Information
- Application Number
- JP2023566877
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-03-14
- Filing Date
- 2023-03-15
- Publication Date
- 2025-04-11
AI Technical Summary
Existing video coding technologies face challenges in efficiently compressing video data while maintaining video quality, particularly in adapting motion vector difference (MVD) resolution to optimize bandwidth usage and storage efficiency.
The implementation of template matching methods for adaptive MVD resolution, which involves determining whether an adaptive MVD resolution mode is signaled based on inter prediction syntax elements, searching for a template of a predictive video block, and refining the motion vector based on the identified template and MVD to reconstruct the video block.
This approach enhances video coding efficiency by adaptively adjusting MVD resolution, thereby improving compression performance and maintaining video quality, especially in scenarios with limited bandwidth and storage resources.
Smart Images

Figure 2025509014000001_ABST
Abstract
Description
[Technical field]
[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 320,488, entitled "Template Matching for Adaptive MVD Resolution," filed March 16, 2022, and is a continuation of and claims priority to U.S. Provisional Patent Application No. 18 / 121,438, entitled "Systems and Methods for Template Matching for Adaptive MVD Resolution," filed March 14, 2023, all of which are incorporated by reference in their entireties herein.
[0002] The disclosed embodiments relate generally to video coding, including, but not limited to, systems and methods for template matching for adaptive motion vector difference (MVD) resolution. [Background technology]
[0003] Digital video is supported by a variety of electronic devices, such as digital televisions, laptop or desktop computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smart phones, video remote conferencing devices, video streaming devices, etc. The electronic devices transmit and receive or otherwise communicate digital video data over communication networks and / or store the digital video data on storage devices. Due to the limited bandwidth capacity of communication networks and the limited memory resources of storage devices, video coding may be used to compress the video data according to one or more video coding standards before the video data is communicated or stored.
[0004] Several video codec standards have been developed. For example, video coding standards include AOMedia Video 1 (AV1), Versatile Video Coding (VVC), Joint Exploration test Model (JEM), High-Efficiency Video Coding (HEVC / H.265), Advanced Video Coding (AVC / H.264), and Moving Picture Expert Group (MPEG) coding. Video coding generally employs prediction methods (e.g., inter-prediction, intra-prediction, etc.) that exploit the redundancy inherent in video data. Video coding aims to compress video data into a form that uses a lower bitrate while avoiding or minimizing degradation of video quality.
[0005] HEVC, also known as H.265, is a video compression standard designed as part of the MPEG-H project. ITU-T and ISO / IEC published the HEVC / H.265 standard in 2013 (version 1), 2014 (version 2), 2015 (version 3), and 2016 (version 4). Versatile Video Coding (VVC), also known as H.266, is a video compression standard intended as a successor to HEVC. ITU-T and ISO / IEC published the VVC / H.266 standard in 2020 (version 1), and 2022 (version 2). AV1 is an open video coding format designed as a replacement for HEVC. The effective version 1.0.0 with Errata 1 of the specification was released on January 8, 2019. Summary of the Invention
[0006] This disclosure describes advanced video coding techniques, and more specifically, template matching methods for adaptive motion vector difference resolution (MVD).
[0007] According to some embodiments, a method of video coding is performed by a computing system, the method comprising the steps of: determining whether an adaptive motion vector difference (MVD) resolution mode is signaled based on a value of an inter prediction syntax element from a video stream, the adaptive MVD resolution mode being an inter prediction mode having an adaptive motion vector difference (MVD) pixel resolution; receiving a motion vector difference (MVD) of a video block from the video stream; and in response to determining that the adaptive MVD resolution mode is signaled, searching for a first template of a prediction video block for the video block, the first template being a neighboring reconstructed / predicted sample of the prediction video block, the prediction video block being a first template of a prediction video block. The method includes the steps of: identifying a first template of a predicted video block that best matches a second template of the video block, the second template being a neighboring reconstructed / predicted sample of the video block that corresponds to a temporally co-located template of the first template; refining a motion vector (MV) of the video block based at least on the second template, the identified first template, and the MVD; and reconstructing / processing the video block based at least on the refined MV.
[0008] According to some embodiments, a computing system, such as a streaming system, a server system, a personal computer system, or other electronic device, is provided. The computing system includes control circuitry and a memory that stores one or more instruction sets. The one or more instruction sets include instructions for performing any of the methods described herein. In some embodiments, the computing system includes an encoder component and / or a decoder component.
[0009] According to some embodiments, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium stores one or more sets of instructions for execution by a computing system. The one or more sets of instructions include instructions for performing any of the methods described herein.
[0010] Thus, devices and systems are disclosed along with methods for coding video. Such methods, devices and systems may complement or replace conventional methods, devices and systems for video coding.
[0011] The features and advantages described in the specification are not necessarily all-inclusive, and in particular, certain additional features and advantages will be apparent to those of ordinary skill in the art upon consideration of the drawings, specification, and claims provided in this disclosure.Further, it should be noted that the language used in the specification has been selected primarily for ease of reading and educational purposes, and not necessarily to describe or limit the subject matter described herein. [Brief description of the drawings]
[0012] In order that the present disclosure may be more fully understood, a more particular description may be made by reference to features of various embodiments, some of which are illustrated in the accompanying drawings. However, the accompanying drawings merely illustrate the pertinent features of the present disclosure and are therefore not necessarily considered limiting, since the description may recognize other useful features as those skilled in the art may read and understand this disclosure.
[0013] [Figure 1] 1 is a block diagram illustrating an exemplary communication system, according to some embodiments.
[0014] [Figure 2A] 2 is a block diagram illustrating exemplary elements of an encoder component according to some embodiments.
[0015] [Figure 2B] 2 is a block diagram illustrating exemplary elements of a decoder component according to some embodiments.
[0016] [Diagram 3] FIG. 1 is a block diagram illustrating an exemplary server system, according to some embodiments.
[0017] [Figure 4] FIG. 1 illustrates an example template matching (TM) according to some embodiments.
[0018] [Diagram 5] 1 is an exemplary flow diagram illustrating a method for coding video according to some embodiments.
[0019] According to common practice, the various features illustrated in the drawings are not necessarily drawn to scale and like reference numerals may be used to denote like features throughout the specification and drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0020] 1 is a block diagram illustrating a communication system 100 according to some embodiments. The communication system 100 includes a source device 102 and a plurality of electronic devices 120 (e.g., electronic devices 120-1 through 120-m) communicatively coupled to each other via one or more networks. In some embodiments, the communication system 100 is a streaming system for use with video-enabled applications, such as, for example, video conferencing applications, digital TV applications, media storage and distribution applications, etc.
[0021] The source device 102 includes a video source 104 (e.g., a camera component or media storage) and an encoder component 106. In some embodiments, the video source 104 is a digital camera (e.g., configured to create an uncompressed video sample stream). The encoder component 106 generates one or more encoded video bitstreams from the video stream. The video stream from the video source 104 may be high in data volume compared to the encoded video bitstream 108 generated by the encoder component 106. Because the encoded video bitstream 108 is low in data volume (less data) compared to the video stream from the video source, the encoded video bitstream 108 requires less bandwidth to transmit and less storage space to store compared to the video stream from the video source 104. In some embodiments, the source device 102 does not include the encoder component 106 (e.g., configured to transmit uncompressed video data to the network 110).
[0022] The one or more networks 110 represent any number of networks that carry information between the source device 102, the server system 112, and / or the electronic device 120, including, for example, wired and / or wireless communication networks. The one or more networks 110 may exchange data over circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet.
[0023] The one or more networks 110 include a server system 112 (e.g., a distributed / cloud computing system). In some embodiments, the server system 112 is or includes a streaming server (e.g., configured to store and / or distribute video content, such as an encoded video stream from the source device 102). The server system 112 includes a coder component 114 (e.g., configured to encode and / or decode video data). In some embodiments, the coder component 114 includes an encoder component and / or a decoder component. In various embodiments, the coder component 114 is instantiated as hardware, software, or a combination thereof. In some embodiments, the coder component 114 is configured to decode the encoded video bitstream 108 and re-encode the video data using a different encoding standard and / or methodology to generate the encoded video data 116. In some embodiments, the server system 112 is configured to generate multiple video formats and / or encodings from the encoded video bitstream 108.
[0024] In some embodiments, server system 112 functions as a Media-Aware Network Element (MANE). For example, server system 112 may be configured to prune encoded video bitstream 108 to tailor a potentially different bitstream to one or more of electronic devices 120. In some embodiments, a MANE is provided separate from server system 112.
[0025] Electronic device 120-1 includes a decoder component 122 and a display 124. In some embodiments, decoder component 122 is configured to decode encoded video data 116 to generate an output video stream that can be rendered on a display or other type of rendering device. In some embodiments, one or more of electronic devices 120 do not include a display component (e.g., are communicatively coupled to an external display device and / or include media storage). In some embodiments, electronic device 120 is a streaming client. In some embodiments, electronic device 120 is configured to access server system 112 to obtain encoded video data 116.
[0026] The source device and / or the electronic devices 120 may be referred to as “terminal devices” or “user devices.” In some embodiments, the source device 102 and / or one or more of the electronic devices 120 are instances of a server system, a personal computer, a portable device (e.g., a smartphone, tablet, or laptop), a wearable device, a videoconferencing device, and / or other types of electronic devices.
[0027] In an exemplary operation of the communication system 100, the source device 102 transmits an encoded video bitstream 108 to the server system 112. For example, the source device 102 may code a stream of pictures captured by the source device. The server system 112 may receive the encoded video bitstream 108 and / or decode and / or encode the encoded video bitstream 108 using a coder component 114. For example, the server system 112 may apply encoding to the video data that is more optimal for network transmission and / or storage. The server system 112 may transmit the encoded video data 116 (e.g., one or more coded video bitstreams) to one or more of the electronic devices 120. Each electronic device 120 may decode the encoded video data 116 to recover and optionally display the video pictures.
[0028] In some embodiments, the above-mentioned transmission is a unidirectional data transmission. The unidirectional data transmission may be utilized in media service applications, etc. In some embodiments, the above-mentioned transmission is a bidirectional data transmission. The bidirectional data transmission may be utilized in video conferencing applications, etc. In some embodiments, the encoded video bitstream 108 and / or the encoded video data 116 are encoded and / or decoded according to any of the video coding / compression standards described herein, such as HEVC, VVC, and / or AV1.
[0029] 2A is a block diagram illustrating exemplary elements of an encoder component, according to some embodiments. The encoder component 106 receives a source video sequence from a video source 104. In some embodiments, the encoder component includes a receiver (e.g., a transceiver) component configured to receive the source video sequence. In some embodiments, the encoder component 106 receives a video sequence from a remote video source (e.g., a video source that is a component of a device different from the encoder component 106). The video source 104 may provide the source video sequence in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, or 12-bit), any color space (e.g., BT.601 Y CrCB, or RGB), and any suitable sampling structure (e.g., Y CrCb 4:2:0 or Y CrCb 4:4:4). In some embodiments, the video source 104 is a storage device that stores previously captured / prepared video. In some embodiments, the video source 104 is a camera that captures local image information as a video sequence. Video data may be provided as a number of individual pictures that, when viewed in a sequence, give motion. The pictures themselves may be organized as a spatial array of pixels, each of which may contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art can readily understand the relationship between pixels and samples. The following discussion focuses on samples.
[0030] The encoder component 106 is configured to code and / or compress pictures of a source video sequence into a coded video sequence 216 in real-time or under other time constraints required by an application. Enforcing an appropriate coding rate is one function of the controller 204. In some embodiments, the controller 204 controls and is operatively coupled to other functional units described below. Parameters set by the controller 204 may include rate control related parameters (e.g., picture skip, quantizer, and / or lambda values for rate-distortion optimization techniques), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. Those skilled in the art can readily identify other functions of the controller 204 as they may be relevant to an optimized encoder component 106 for a particular system design.
[0031] In some embodiments, the encoder component 106 is configured to operate in a coding loop. In a simplified example, the coding loop includes a source coder 202 (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded and a reference picture) and a (local) decoder 210. The decoder 210 reconstructs the symbols to create sample data in a similar manner to a (remote) decoder (when the compression between the symbols and the coded video bitstream is lossless). The reconstructed sample stream (sample data) is input to a reference picture memory 208. Since the decoding of the symbol stream produces bit-wise accurate results that are independent of the decoder location (local or remote), the content in the reference picture memory 208 is also bit-wise accurate between the local and remote encoders. In this way, the prediction part of the encoder interprets the same sample values as reference picture samples that the decoder interprets when using prediction during decoding. This basic principle of reference picture synchrony (e.g., if synchrony cannot be maintained due to channel errors, drift results) is well known to those skilled in the art.
[0032] The operation of the decoder 210 may be the same as that of a remote decoder, such as the decoder component 122, which is described in more detail below in conjunction with Figure 2B. With brief reference to Figure 2B, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder 214 and the parser 520 may be lossless, the entropy decoding portion of the decoder component 122, including the buffer memory (252) and the parser (520), may not be fully implemented in the local decoder 210.
[0033] At this point, it is recognized that any decoder technique other than analysis / entropy decoding present in a decoder must necessarily be present in a corresponding encoder in substantially the same functional form. For this reason, the disclosed subject matter focuses on the decoder operation. A description of the encoder technique can be omitted since it is the inverse of the decoder technique described generically. Only in certain areas is a more detailed description necessary and is provided below.
[0034] As part of its operation, the source coder 202 may perform motion compensated predictive coding, which predictively codes an input frame with reference to one or more previously coded frames from the video sequence designated as reference frames. In this manner, the coding engine 212 codes differences between pixel blocks of the input frame and pixel blocks of reference frames that may be selected as prediction references for the input frame. The controller 204 may manage the coding operations of the source coder 202, including, for example, setting parameters and subgroup parameters used to encode the video data.
[0035] The decoder 210 may decode the coded video data of frames that may be designated as reference frames based on symbols created by the source coder 202. The operation of the coding engine 212 may advantageously be a lossy process. When the coded video data is decoded in a video decoder (not shown in FIG. 2A), the reconstructed video sequence may be a replica of the source video sequence, typically with some errors. The decoder 210 may replicate the decoding process that may be performed on the reference frames by a remote video decoder, such that the reconstructed reference frames are stored in the reference picture cache 208. In this way, the encoder component 106 locally stores copies of reconstructed reference frames that have common content with the reconstructed reference frames that would be obtained by the far-end video decoder (absent transmission errors).
[0036] The predictor 206 may perform a prediction search for the coding engine 212. That is, for a new frame to be coded, the predictor 206 may search the reference picture memory 208 for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc. that may serve as suitable prediction references for the new picture. The predictor 206 may operate on a sample block-by-pixel block basis to find suitable prediction references. In some cases, the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory 208, as determined by the search results obtained by the predictor 206.
[0037] The output of all the aforementioned functional units may undergo entropy coding in entropy coder 214. Entropy coder 214 converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques known to those skilled in the art (e.g., Huffman coding, variable length coding, and / or arithmetic coding).
[0038] In some embodiments, the output of the entropy coder 214 is coupled to a transmitter. The transmitter may be configured to buffer the coded video sequence created by the entropy coder 214 and prepare it for transmission over a communication channel 218, which may be a hardware / software link to a storage device that will store the encoded video data. The transmitter may be configured to merge the coded video data from the source coder 202 with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown). In some embodiments, the transmitter may transmit additional data along with the encoded video. The source coder 202 may include such data as part of the coded video sequence. The additional data may include other forms of redundant data, such as temporal / spatial / SNR enhancement layers, redundant pictures and slices, Supplementary Enhancement Information (SEI) messages, Visual Usability Information (VUI) parameter set fragments, etc.
[0039] The controller 204 may manage the operation of the encoder component 106. During coding, the controller 204 may assign a particular coded picture type to each coded picture, which may affect the coding technique applied to the respective picture. For example, a picture may be assigned as an intra picture (I picture), a predictive picture (P picture), or a bidirectionally predictive picture (B picture). An intra picture may be coded and decoded without using any other frame in the sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, Independent Decoder Refresh (IDR) pictures. Those skilled in the art will recognize these variations of I pictures and their respective uses and characteristics, so they will not be repeated here. A predictive picture picture may be coded and decoded using intra prediction or inter prediction, using at most one motion vector and reference index to predict the sample values of each block. Bidirectionally predicted pictures may be coded and decoded using intra- or inter-prediction, using at most two motion vectors and reference indices to predict the sample values of each block. Similarly, multi-predictive pictures can use more than two reference pictures and associated metadata for the reconstruction of one block.
[0040] A source picture is typically spatially subdivided into a number of sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples, respectively) and may be coded on a block-by-block basis. Blocks may be predictively coded with reference to other (already coded) blocks, as determined by the coding assignment applied to the respective picture of the block. For example, blocks of an I-picture may be coded non-predictively, or they may be predictively coded with reference to already coded blocks of the same picture (spatial prediction or intra prediction). Pixel blocks of a P-picture may be coded non-predictively, via spatial prediction with reference to one previously coded reference picture, or via temporal prediction. Blocks of a B-picture may be coded non-predictively, via spatial prediction with reference to one or two previously coded reference pictures, or via temporal prediction.
[0041] A video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits correlation (temporal or other) between pictures. In one example, a particular picture under encoding / decoding, called the current picture, is partitioned into blocks. When a block in the current picture resembles a reference block in a previously coded and still buffered reference picture in the video, the block in the current picture may be coded by a vector, called a motion vector. A motion vector points to a reference block in a reference picture and may have a third dimension that identifies the reference picture when multiple reference pictures are in use.
[0042] Encoder component 106 may perform coding operations according to a given video coding technique or standard, such as any of those described herein. In doing so, encoder component 106 may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.
[0043] 2B is a block diagram illustrating example elements of the decoder component 122, according to some embodiments. The decoder component 122 of FIG. 2B is coupled to the channel 218 and the display 124. In some embodiments, the decoder component 122 includes a transmitter coupled to the loop filter 256 and configured to transmit data to the display 124 (e.g., via a wired or wireless connection).
[0044] In some embodiments, the decoder component 122 includes a receiver coupled to the channel 218 and configured to receive data from the channel 218 (e.g., via a wired or wireless connection). The receiver may be configured to receive one or more coded video sequences to be decoded by the decoder component 122. In some embodiments, the decoding of each coded video sequence is independent of the other coded video sequences. The coded video sequences may be received from the channel 218, which may be a hardware / software link to a storage device that stores the encoded video data. The receiver may receive the encoded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be transferred using respective entities (not shown). The receiver may separate the coded video sequence from the other data. In some embodiments, the receiver receives additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence. The additional data may be used by the decoder component 122 to decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial or SNR enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.
[0045] According to some embodiments, the decoder component 122 includes a buffer memory 252, an analyzer 254 (sometimes referred to as an entropy decoder), a scaler / inverse transform unit 258, an intra-picture prediction unit 262, a motion compensated prediction unit 260, an aggregator 268, a loop filter unit 256, a reference picture memory 266, and a current picture memory 264. In some embodiments, the decoder component 122 is implemented as an integrated circuit, a series of integrated circuits, and / or other electronic circuitry. In some embodiments, the decoder component 122 is implemented at least partially in software.
[0046] The buffer memory 252 is coupled between the channel 218 and the analyzer 254 (e.g., to deal with network jitter). In some embodiments, the buffer memory 252 is separate from the decoder component 122. In some embodiments, a separate buffer memory is provided between the output of the channel 218 and the decoder component 122. In some embodiments, in addition to the buffer memory 252 inside the decoder component 122 (e.g., configured to handle playout timing), a separate buffer memory is provided outside the decoder component 122 (e.g., to deal with network jitter). When receiving data from a storage / forwarding device with sufficient bandwidth and controllability or from an isochronous network, the buffer 252 may not be needed or may be small. For use with best-effort packet networks such as the Internet, the buffer memory 252 may be required and may be relatively large, advantageously adaptively sized, and may be implemented at least in part in an operating system or similar element (not shown) outside the decoder component 122.
[0047] The analyzer 254 is configured to reconstruct symbols 270 from the coded video sequence. The symbols may include, for example, information used to manage the operation of the decoder component 122 and / or information for controlling a rendering device such as the display 124. The control information for the rendering device may be in the form of a supplemental enhancement information (SEI) message or a video usability information (VUI) parameter set fragment (not shown). The analyzer 254 analyzes (entropy decodes) the coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow principles well known to those skilled in the art, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The analyzer 254 may extract a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder from the coded video sequence based on at least one parameter corresponding to the group. The subgroup may include a group of pictures (GOP), a picture, a tile, a slice, a macroblock, a coding unit (CU), a block, a transform unit (TU), a prediction unit (PU), etc. The analyzer (254) may also extract information from the coded video sequence, such as transform coefficients, quantization parameter values, motion vectors, and the like.
[0048] The reconstruction of symbols 270 may involve several different units, depending on the type of coded video picture or portion thereof (e.g., inter-picture and intra-picture, inter-block and intra-block) and other factors. Which units are involved and how they are involved may be controlled by subgroup control information parsed from the coded video sequence by parser 254. The flow of such subgroup control information between parser 254 and the following units is not shown for clarity.
[0049] Besides the functional blocks already mentioned, the decoder component 122 may be conceptually subdivided into several functional units, as described below. In a practical implementation operating under commercial constraints, many of these units may closely interact with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the conceptual subdivision into the following functional units is maintained:
[0050] The scalar / inverse transform unit 258 receives the quantized transform coefficients along with control information (such as the transform to use, the block size, the quantization factor, and / or the quantization scaling matrix) as symbols 270 from the analyzer 254. The scalar / inverse transform unit 258 may output blocks containing sample values that may be input to an aggregator 268.
[0051] In some cases, the output samples of the scaler / inverse transform unit 258 may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but can use prediction information from a previously reconstructed part of the current picture. Such prediction information may be provided by the intra-picture prediction unit 262. The intra-picture prediction unit 262 may generate blocks of the same size and shape as the block being reconstructed using surrounding already reconstructed information fetched from the current (partially reconstructed) picture from the current picture buffer 264. The aggregator 268 adds the prediction information generated by the intra-prediction unit 262 to the output sample information provided by the scaler / inverse transform unit 258 on a sample-by-sample basis.
[0052] In other cases, the output samples of the scaler / inverse transform unit 258 are inter-coded and potentially relate to motion compensated blocks. In such cases, the motion compensated prediction unit 260 may access the reference picture memory 266 to fetch samples used for prediction. After motion compensation of the fetched samples according to the symbols 270 related to the block, these samples may be added by an aggregator (268) to the output of the scaler / inverse transform unit (258) (in this case referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference picture memory 266 from which the motion compensated prediction unit 260 fetches the prediction samples may be controlled by a motion vector. The motion vector may be available to the motion compensated prediction unit 260 in the form of the symbols 270, which may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolation of sample values fetched from the reference picture memory 266 when sub-sample accurate motion vectors are in use, motion vector prediction mechanisms, etc.
[0053] The output samples of aggregator 268 may be subjected to various loop filtering techniques in loop filter unit 256. Video compression techniques are controlled by parameters contained in the coded video bitstream and made available to loop filter unit 256 as symbols 270 from analyzer 254, but may include in-loop filter techniques that may be responsive to meta-information obtained during decoding of previous portions (in decoding order) of the coded picture or coded video sequence, and may also be responsive to previously reconstructed loop filtered sample values.
[0054] The output of the loop filter unit (256) may be a sample stream that can be output to a rendering device 124, such as a display 124, and also stored in a reference picture memory 266 for use in future inter-picture prediction.
[0055] Once a particular coded picture is fully reconstructed, it may be used as a reference picture for future prediction. Once a coded picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by analyzer 254), the current reference picture may be made part of reference picture buffer 266, and fresh current picture memory may be reallocated before beginning reconstruction of a later coded picture.
[0056] The decoder component 122 may perform decoding operations according to a given video compression technique, which may be documented in a standard, such as any of the standards described herein. The coded video sequence may conform to a syntax specified by the video compression technique or standard being used, in the sense of conforming to the syntax of the video compression technique or standard as specified in the video compression technique document or standard, and in particular in a profile document therein. Also, for compliance with some video compression techniques or standards, the complexity of the coded video sequence may be within a range defined by a level of the video compression technique or standard. In some cases, the level limits a maximum picture size, a maximum frame rate, a maximum reconstruction sample rate (e.g., measured in megasamples per second), a maximum reference picture size, etc. The limits set by the level may in some cases be further limited via a Hypothetical Reference Decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.
[0057] 3 is a block diagram illustrating a server system 112, according to some embodiments. The server system 112 includes a control circuit 302, one or more network interfaces 304, a memory 314, a user interface 306, and one or more communication buses 312 for interconnecting these components. In some embodiments, the control circuit 302 includes one or more processors (e.g., a CPU, a GPU, and / or a DPU). In some embodiments, the control circuit includes one or more field programmable gate arrays (FPGAs), hardware accelerators, and / or one or more integrated circuits (e.g., application specific integrated circuits).
[0058] The network interface 304 may be configured to interface with one or more communication networks (e.g., wireless, wired, and / or optical networks). The communication networks may be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include local area networks such as Ethernet, cellular networks including WLAN, GSM, 3G, 4G, 5G, LTE, etc., TV wired and wireless wide area digital networks including cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial including CANBus, etc. Such communications may be one-way receive only (e.g., broadcast TV), one-way transmit only (e.g., from the CANbus to a particular CANbus device), or bidirectional (e.g., to other computer systems using local or wide area digital networks). Such communications may include communications to one or more cloud computing networks.
[0059] The user interface 306 includes one or more output devices 308 and / or one or more input devices 310. The input devices 310 may include one or more of a keyboard, a mouse, a trackpad, a touch screen, a data glove, a joystick, a microphone, a scanner, a camera, etc. The output devices 308 may include one or more of an audio output device (e.g., a speaker), a visual output device (e.g., a display or monitor), etc.
[0060] Memory 314 may include high-speed random access memory (such as DRAM, SRAM, DDR RAM, and / or other random access solid-state memory devices) and / or non-volatile memory (such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, and / or other non-volatile solid-state storage devices). Memory 314 optionally includes one or more storage devices located remotely from control circuitry 302. Memory 314, or alternatively a non-volatile solid-state memory device within memory 314, includes a non-transitory computer-readable storage medium. In some embodiments, memory 314, or the non-transitory computer-readable storage medium of memory 314, stores the following programs, modules, instructions, and data structures, or a subset or superset thereof: An operating system 316 that handles various basic system services and contains instructions for performing hardware-dependent tasks. · A network communications module 318 that is used to connect the server system 112 to other computing devices via one or more network interfaces 304 (eg, via wired and / or wireless connections). A coding module 320 for performing various functions related to encoding and / or decoding of data, such as video data. In some embodiments, the buffer memory 320 is an instance of the coder component 114. The coding module 320 may include, but is not limited to, one or more of the following: A decoding module 322 for performing various functions relating to decoding the encoded data, such as those functions described above with respect to the decoder component 122. An encoding module 340 for performing various functions relating to encoding data, such as those functions described above with respect to the encoder component 106 . A picture memory 352 for storing pictures and picture data, e.g., for use with the coding module 320. In some embodiments, the picture memory 352 includes one or more of the reference picture memory 208, the buffer memory 252, the current picture memory 264, and the reference picture memory 266.
[0061] In some embodiments, the decoding module 322 includes an analysis module 324 (e.g., configured to perform the functions described above with respect to the analyzer 254), a transform module 326 (e.g., configured to perform the various functions described above with respect to the scalar / inverse transform unit 258), a prediction module 328 (e.g., configured to perform the various functions described above with respect to the motion compensated prediction unit 260 and / or the intra-picture prediction unit 262), and a filter module 330 (e.g., configured to perform the various functions described above with respect to the loop filter 256).
[0062] In some embodiments, the encoding module 340 includes a code module 342 (e.g., configured to perform various functions described above with respect to the source coder 202 and / or the coding engine 212) and a prediction module 344 (e.g., configured to perform various functions described above with respect to the predictor 206). In some embodiments, the decoding module 322 and / or the encoding module 340 include a subset of the modules shown in FIG. 3. For example, a shared prediction module is used by both the decoding module 322 and the encoding module 340.
[0063] Each of the above identified modules stored in memory 314 corresponds to a set of instructions for performing functions described herein. The above identified modules (e.g., sets of instructions) need not be implemented as separate software programs, procedures, or modules, and thus various subsets of these modules may be combined or otherwise rearranged in various embodiments. For example, coding module 320 optionally does not include separate decoding and encoding modules, but rather uses the same set of modules to perform both sets of functions. In some embodiments, memory 314 stores a subset of the above identified modules and data structures. In some embodiments, memory 314 stores additional modules and data structures not described above, such as an audio processing module.
[0064] In some embodiments, server system 112 includes a web or Hypertext Transfer Protocol (HTTP) server, a File Transfer Protocol (FTP) server, and web pages and applications implemented using Common Gateway Interface (CGI) scripts, Hyper-text Preprocessor (PHP), Active Server Pages (ASP), HyperText Markup Language (HTML), Extensible Markup Language (XML), Java, JavaScript, Asynchronous JavaScript and XML (AJAX), XHP, Javelin, Wireless Universal Resource File (WUFL), and the like.
[0065] 3 illustrates a server system 112 according to some embodiments, but is intended as a functional description of various features that may be present in one or more server systems, rather than a structural schematic of the embodiments described herein. In practice, items shown separately may be combined and some items may be separated, as will be recognized by those skilled in the art. For example, some items shown separately in FIG. 3 may be implemented on a single server, and a single item may be implemented by one or more servers. The actual number of servers used to implement the server system 112, and how functionality is allocated among them, will vary from implementation to implementation and will optionally depend in part on the amount of data traffic the server system processes during peak and average usage periods.
[0066] In some implementations, the predictive blocks (PBs or coding blocks (CBs), also referred to as PBs when not further partitioned into predictive blocks) obtained from any of the partitioning schemes can become individual blocks for coding via either intra-prediction or inter-prediction. For inter-prediction for the current PB, a residual between the current block and the predictive block is generated, coded, and included in the coded bitstream.
[0067] In some implementations, inter prediction may be implemented, for example, in single reference mode or mixed reference mode. In some implementations, a skip flag may be included in the bitstream for the current block (or higher level) first to indicate whether the current block is inter-coded and should not be skipped. If the current block is inter-coded, another flag may be further included in the bitstream to signal whether single reference mode or mixed reference mode is used for predicting the current block. In a single reference mode, one reference block may be used to generate a prediction block for the current block. In a mixed reference mode, two or more reference blocks may be used to generate a prediction block, for example, by weighted averaging. A mixed reference mode may be referred to as a multiple reference mode, a two-reference mode, or a multi-reference mode. The reference block(s) may be identified using a reference frame index(es) and further using corresponding motion vector(s) indicating a shift between the reference block(s) and the current block in position, for example, horizontal and vertical pixels. For example, in the single reference mode, an inter-predicted block for the current block may be generated from a single reference block identified by one motion vector in a reference frame as a predictive block, while in the mixed reference mode, a predictive block may be generated by a weighted average of two reference blocks in two reference frames indicated by two reference frame indexes and two corresponding motion vectors. The motion vectors may be coded in various manners and included in the bitstream.
[0068] In some implementations, the encoding or decoding system may maintain a decoded picture buffer (DPB). Some images / pictures are kept in the DPB waiting to be displayed (in the decoding system), and some images / pictures in the DPB may be used as reference frames to enable inter prediction (in the decoding system or encoding system). In some implementations, the reference frames in the DPB may be tagged as either short-term or long-term references for the current image being encoded or decoded. For example, short-term reference frames may include frames used for inter prediction for blocks in the current frame or in a predetermined number (e.g., 2) of subsequent video frames closest to the current frame in decoding order. Long-term reference frames may include frames in the DPB that may be used to predict image blocks in frames that are more than a predefined number of frames away from the current frame in decoding order. Information regarding such tags for short-term and long-term reference frames may be referred to as a Reference Picture Set (RPS) and may be added to the header of each frame in the encoded bitstream. Each frame in the encoded video stream may be identified by a Picture Order Counter (POC), which may be numbered according to the playback sequence in an absolute manner, or may be numbered relative to a group of pictures starting, for example, with an I-frame.
[0069] In some implementations, one or more reference picture lists may be formed that include identification of short-term and long-term reference frames for inter prediction based on the information in the RPS. For example, a single picture reference list may be formed for unidirectional inter prediction, denoted as L0 reference (or reference list 0), while two picture reference lists may be formed for bidirectional inter prediction, denoted as L0 (or reference list 0) and L1 (or reference list 1) for each of the two prediction directions. The reference frames included in the L0 and L1 lists may be ordered in various predefined manners. The lengths of the L0 and L1 lists may be signaled in the video bitstream. The unidirectional inter prediction may be a single reference mode or a mixed reference mode when multiple references for weighted averaging to generate a prediction block in a mixed prediction mode are on the same side of the block to be predicted. The bidirectional inter prediction may be a mixed mode only in that it involves at least two reference blocks.
[0070] In some implementations, a merge mode (MM) for inter prediction may be implemented. In general, in a merge mode, one or more of the motion vectors in single reference prediction or mixed reference prediction for a current PB may be derived from other motion vectors, rather than being computed and signaled independently. For example, in an encoding system, a current motion vector for a current PB may be represented by a difference between the current motion vector and one or more other already encoded motion vectors (called reference motion vectors). Such differences in motion vectors, rather than the entire current motion vector, may be encoded and included in the bitstream and linked to the reference motion vector. Similarly, in a decoding system, a motion vector corresponding to a current PB may be derived based on a decoded motion vector difference and a decoded reference motion vector linked thereto. As a specific form of a general merge mode (MM) inter prediction, such inter prediction based on a motion vector difference may be referred to as MMVD (Merge Mode with Motion Vector Difference). Thus, MM in general, or MMVD in particular, may be implemented to exploit correlations between motion vectors associated with different PBs to improve coding efficiency. For example, adjacent PBs may have similar motion vectors, and thus MVDs may be small and efficiently coded. In another example, motion vectors may be temporally correlated (between frames) for similarly located / positioned blocks in space.
[0071] In some example implementations, an MM flag may be included in the bitstream during the encoding process to indicate whether the current PB is in merge mode. Additionally or alternatively, an MMVD flag may be included during the encoding process and signaled in the bitstream to indicate whether the current PB is in MMVD mode. The MM and / or MMVD flags or indicators may be provided at the PB level, coding block (CB) level, coding unit (CU) level, coding tree block (CTB) level, coding tree unit (CTU) level, slice level, picture level, etc. In a particular example, both an MM flag and an MMVD flag may be included for the current CU, and the MMVD flag may be signaled immediately after the skip flag and the MM flag to specify whether the MMVD mode is used for the current CU.
[0072] In some example implementations of MMVD, a list of reference motion vector (RMV) or MV predictor candidates for motion vector prediction may be formed for the block being predicted. The list of RMV candidates may include a predetermined number (e.g., two) of MV predictor candidate blocks, whose motion vectors may be used to predict the current motion vector. The RMV candidate blocks may include blocks selected from adjacent blocks in the same frame and / or temporal blocks (e.g., blocks at the same location in a previous or subsequent frame of the current frame). These options represent blocks at a spatial or temporal location relative to the current block, which are likely to have a similar or identical motion vector as the current block. The size of the list of MV predictor candidates may be pre-determined. For example, the list may include two or more candidates. To be on the list of RMV candidates, a candidate block may be required to have the same reference frame (or frames) as the current block, for example, must exist (e.g., if the current block is near the edge of a frame, a boundary check needs to be performed), and must have already been encoded during the encoding process and / or must have already been decoded during the decoding process. In some implementations, the list of merge candidates may be first populated with spatially adjacent blocks (specifically scanned in a predefined order) if available and satisfy the above conditions, and then with temporal blocks if space is still available in the list. The adjacent RMV candidate blocks may be selected, for example, from the blocks to the left and above the current block. The list of RMV predictor candidates may be dynamically formed at various levels (sequence, picture, frame, slice, superblock, etc.) as a dynamic reference list (DRL). The DRL may be signaled in the bitstream.
[0073] In some implementations, the actual MV predictor candidate used as the reference motion vector for predicting the motion vector of the current block may be signaled. A one-bit flag called a merge candidate flag may be used to indicate the selection of the reference merge candidate when the RMV candidate list contains two candidates. When the current block is predicted in a mixed mode, each of the multiple motion vectors predicted using the MV predictor may be associated with a reference motion vector from the merge candidate list. The encoder may determine which of the RMV candidates more accurately predicts the current coding block and signal the selection as an index into the DRL.
[0074] In some implementations of MMVD, after an RMV candidate is selected and used as a base motion vector predictor (MVP) for a predicted motion vector, a motion vector difference (MVD or delta MV representing the difference between the predicted motion vector and a reference candidate motion vector) may be calculated in the encoding system. Such an MVD may include information representing the magnitude of the MV difference and the direction of the MV difference, both of which may be signaled in the bitstream. The magnitude of the motion difference and the direction of the motion difference may be signaled in various manners.
[0075] In some exemplary implementations of MMVD, a distance index may be used to specify motion vector difference magnitude information and indicate one of a set of predefined offsets representing a predefined motion vector difference from a starting point (reference motion vector). The MV offset according to the signaled index may then be added to either the horizontal or vertical component of the starting (reference) motion vector. Whether the horizontal or vertical component of the reference motion vector should be offset may be determined by the MVD's orientation information. An exemplary predefined relationship between the distance index and the defined offset is specified in Table 1. [Table 1]
[0076] In some exemplary implementations of MMVD, a direction index may be further signaled and used to represent the direction of the MVD relative to the reference motion vector. In some implementations, the direction may be limited to one of the horizontal and vertical directions. An example of an exemplary 2-bit direction index is shown in Table 2. In the example of Table 2, the interpretation of the MVD may be different according to the information of the start / reference MV. For example, when the start / reference MV corresponds to a single-predicted block or a bi-predicted block where both reference frame lists point to the same side of the current picture (i.e., the POCs of the two reference pictures are both larger than the POC of the current picture or both smaller than the POC of the current picture), the code in Table 2 may specify the sign (direction) of the MV offset added to the start / reference MV. If the start / reference MV corresponds to a bi-predictive block with two reference pictures on different sides of the current picture (i.e., the POC of one reference picture is larger than that of the current picture, and the POC of the other reference picture is smaller than that of the current picture), and the difference between the reference POC in picture reference list 0 and the current frame is larger than the difference between the reference POC in picture reference list 1 and the current frame, then the code in Table 2 specifies the sign of the MV offset added to the reference MV corresponding to the reference picture in picture reference list 0, and the sign of the offset of the MV corresponding to the reference picture in picture reference list 1 may have an inverse value (opposite sign of the offset). Otherwise, if the difference between the reference POC in picture reference list 1 and the current frame is larger than the difference between the reference POC in picture reference list 0 and the current frame, then the code in Table 2 specifies the sign of the MV offset added to the reference MV associated with picture reference list 1, and the sign of the offset to the reference MV associated with picture reference list 0 has an inverse value. [Table 2]
[0077] In some implementations, the MVD may be scaled according to the difference in POC in each direction. If the difference in POC in both lists is the same, no scaling is necessary. On the other hand, if the difference in POC in reference list 0 is larger than that in reference list 1, the MVD for reference list 1 is scaled. If the difference in POC in reference list 1 is larger than list 0, the MVD for list 0 may be scaled as well. If the starting MV is uni-predicted, the MVD is added to the available or reference MV.
[0078] In some implementations of MVD coding and signaling for bidirectional mixed prediction, in addition to or instead of coding and signaling two MVDs separately, symmetric MVD coding may be implemented such that only one MVD needs to be signaled and the other MVD is derived from the signaled MVD. In such implementations, motion information including reference picture indexes for both list 0 and list 1 is signaled. However, for example, only the MVD associated with reference list 0 is signaled, and the MVD associated with reference list 1 is derived without being signaled. Specifically, at the slice level, a flag called mvd_l1_zero_flag may be included in the bitstream to indicate whether reference list 1 is not signaled in the bitstream. If this flag is 1, indicating that reference list 1 is equal to 0 (and thus not signaled), a bidirectional prediction flag called "BiDirPredFlag" may be set to 0, meaning that there is no bidirectional prediction. Otherwise, if mvd_l1_0_flag is 0, BiDirPredFlag may be set to 1 if the closest reference picture in list-0 and the closest reference picture in list-1 form a forward-backward or backward-forward reference picture pair, and both reference pictures in list 0 and list 1 are short-term reference pictures. Otherwise, BiDirPredFlag is set to 0. A BiDirPredFlag of 1 indicates that a symmetric mode flag is additionally signaled in the bitstream. A decoder may extract the symmetric mode flag from the bitstream when BiDirPredFlag is 1. The symmetric mode flag may, for example, be signaled at the CU level (if necessary) and may indicate whether a symmetric MVD coding mode is used for the corresponding CU.When the symmetric mode flag is 1, it indicates the use of a symmetric MVD coding mode and that only the reference picture indexes of both list 0 and list 1 (called "mvp_l0_flag" and "mvp_l1_flag") are signaled along with the MVD associated with list 0 (called "MVD0"), and that the other motion vector difference "MVD1" should be derived rather than signaled. For example, MVD1 may be derived as -MVD0. In this way, only one MVD is signaled in the exemplary symmetric MVD mode. In some other exemplary implementations for MV prediction, a harmonized scheme may be used to implement a general merged mode MMVD, as well as some other types of MV prediction, for both single reference mode and mixed reference mode MV prediction. Various syntax elements may be used to signal the manner in which the MV for the current block is predicted.
[0079] For example, for a single reference mode, the following MV prediction modes may be signaled:
[0080] It directly uses one of the motion vector predictors (MVPs) in the list indicated by the Dynamic Reference List (DRL) index without NEARMV-MVD.
[0081] One of the motion vector predictors (MVPs) in the list signaled by the NEWMV-DRL index is used as a reference, and the delta is applied to the MVP (eg, using MVD).
[0082] GLOBALMV - Use motion vectors based on frame-level global motion parameters.
[0083] Similarly, for a mixed reference inter prediction mode using two reference frames corresponding to the two MVs to be predicted, the following MV prediction modes may be signaled:
[0084] NEAR_NEARMV - For each of the two MVs being predicted, use one of the motion vector predictors (MVPs) in the list signaled by the DRL index without the MVD.
[0085] NEAR_NEWMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference MV without MVD to predict the first of the two motion vectors, and use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference MV together with an additionally signaled delta MV (MVD) to predict the second of the two motion vectors.
[0086] NEW_NEARMV - use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference MV without MVD to predict the second of two motion vectors, and use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference MV together with an additionally signaled delta MV (MVD) to predict the first of two motion vectors.
[0087] NEW_NEWMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference MV and use it in conjunction with an additionally signaled MV to predict each of the two MVs.
[0088] GLOBAL_GLOBALMV - Use MV from each reference based on frame-level global motion parameters.
[0089] Thus, the term "NEAR" above refers to MV prediction using a reference MV without MVD as a general merge mode, while the term "NEW" refers to MV prediction using a reference MV and offsetting it with the signaled MVD as in the MMVD mode. In the case of composite inter prediction, both the reference-based motion vector and the above motion vector delta may be correlated, generally different between the two references, or independent, and such correlation may be exploited to reduce the amount of information required to signal the two motion vector deltas. In such a situation, joint signaling of the two MVDs is implemented and indicated in the bitstream.
[0090] The dynamic reference list (DRL) described above may be used to hold a dynamically maintained set of indexed motion vectors that are considered as candidate motion vector predictors.
[0091] In some example implementations, a predefined resolution for the MVD may be allowed. For example, a motion vector accuracy (or precision) of 1 / 8 pixels may be allowed. The above MVD in different MV prediction modes may be constructed and signaled in different manners. In some implementations, different syntax elements may be used to signal the above motion vector difference in reference frame list 0 or list 1.
[0092] For example, a syntax element called "mv_joint" may specify which components of the motion vector difference associated with it are non-zero. In the case of MVD, this is signaled jointly for all non-zero components. For example, mv_joint has the following values: · 0 may indicate no non-zero MVD along either the horizontal or vertical direction. · 1 may indicate that there is only non-zero MVD along either the horizontal or vertical direction. 2 may indicate that there is only non-zero MVD along the vertical direction. 3 may indicate that there is non-zero MVD along both the horizontal and vertical directions.
[0093] When the "mv_joint" syntax element for an MVD signals that there are no non-zero MVD components, no further MVD information may be signaled. However, when the "mv_joint" syntax signals that there are one or two non-zero components, additional syntax elements may be further signaled for each of the non-zero MVD components, as described below.
[0094] For example, a syntax element called "mv_sign" may be used to further specify whether the corresponding motion vector difference component is positive or negative.
[0095] In another example, a syntax element called "mv_class" may be used to specify a class of motion vector difference between a predefined set of classes for a corresponding non-zero MVD component. For example, predefined classes of motion vector differences may be used to divide a continuous magnitude space of motion vector differences into non-overlapping ranges, each range corresponding to an MVD class. The signaled MVD class thus indicates the magnitude range of the corresponding MVD component. In the example implementation shown in Table 3 below, higher classes correspond to motion vector differences with a larger magnitude range. In Table 3, the symbol (n,m] is used to represent a range of motion vector differences greater than n pixels and less than or equal to m pixels. [Table 3]
[0096] In some other examples, a syntax element called "mv_bit" may further be used to specify the integer portion of the offset between a non-zero motion vector difference component and the starting magnitude of the correspondingly signaled MV class magnitude range. The number of bits required in "mv_bit" to signal the full range of each MVD class may vary as a function of the MV class. For example, MV_CLASS 0 and MV_CLASS 1 in the implementation of Table 3 may only require a single bit to indicate an integer pixel offset of 1 or 2 from a starting MVD of 0, and each higher MV_CLASS in the implementation of Table 3 may require progressively one more bit for "mv_bit" than the previous MV_CLASS.
[0097] In some other examples, a syntax element called "mv_fr" may be further used to specify the first two fractional bits of the motion vector difference for the corresponding non-zero MVD component, and a syntax element called "mv_hp" may be further used to specify the third fractional bit (high resolution bit) of the motion vector difference for the corresponding non-zero MVD component. The two bits "mv_fr" essentially provide ¼ pixel MVD resolution, while the "mv_hp" bits may provide further ⅛ pixel resolution. In some other implementations, two or more "mv_hp" bits may be used to provide MVD pixel resolution finer than ⅛ pixel. In some implementations, additional flags may be signaled at one or more of various levels to indicate whether ⅛ pixel or higher MVD resolution is supported. If MVD resolution does not apply to a particular coding unit, the above syntax elements for the corresponding unsupported MVD resolution may not be signaled.
[0098] In some implementations of the above, the fractional resolution may be independent of different classes of MVD. In other words, similar options for motion vector resolution may be provided using a predefined number of "mv_fr" and "mv_hp" bits to signal fractional MVD of non-zero MVD components, regardless of the magnitude of the motion vector difference.
[0099] However, in some other implementations, the resolution of the motion vector difference in various MVD magnitude classes may be differentiated. Specifically, a high-resolution MVD for a large MVD magnitude of a higher MVD class may not provide a statistically significant improvement in compression efficiency. As such, the MVD may be coded at a decreasing resolution (integer pixel resolution or fractional pixel resolution) for a larger MVD magnitude range corresponding to a higher MVD magnitude class. Similarly, the MVD may be coded at a decreasing resolution (integer pixel resolution or fractional pixel resolution) for a larger MVD value in general. Such MVD class-dependent or MVD amplitude-dependent MVD resolution may be generally referred to as adaptive MVD resolution, amplitude-dependent adaptive MVD resolution, or magnitude-dependent MVD resolution. The term "resolution" may also be referred to as "pixel resolution". The adaptive MVD resolution may be implemented in various matters, as described by the following exemplary implementations, to achieve an overall better compression efficiency. In particular, the reduction in the number of signaling bits by targeting a less accurate MVD may be greater than the additional bits required to code the inter-prediction residual as a result of such a less accurate MVD, due to the statistical observation that processing MVD resolution for large magnitude or high class MVDs at a similar level as for small magnitude or low class MVDs in a non-adaptive manner does not significantly increase the inter-prediction residual coding efficiency for blocks with large magnitude or high class MVDs. In other words, using a higher MVD resolution for large magnitude or high class MVDs may not produce greater coding gain than using a lower MVD resolution.
[0100] In some typical embodiments, the pixel resolution or precision for the MVD may decrease or not increase with increasing MVD class. A decrease in pixel resolution for the MVD corresponds to a coarser MVD (or a larger step from one MVD level to the next). In some implementations, the correspondence between MVD pixel resolution and MVD class may be specified, predefined, or preset, and thus may not need to be signaled in the encoded bitstream.
[0101] In some example implementations, each of the MV classes in Table 3 may be associated with a different MVD pixel resolution.
[0102] In some example implementations, each MVD class may be associated with a single allowed resolution. In some other implementations, one or more MVD classes may be associated with two or more optional MVD pixel resolutions. Thus, a signal in the bitstream for a current MVD component having such an MVD class may be followed by additional signaling to indicate which optional pixel resolution has been selected for the current MVD component.
[0103] In some example implementations, the adaptively allowed MVD pixel resolutions may include, but are not limited to, 1 / 64 pel (pixel), 1 / 32 pel, 1 / 16 pel, 1 / 8 pel, 1-4 pel, 1 / 2 pel, 1 pel, 2 pel, 4 pel... (in descending order of resolution). Thus, each of the ascending MVD classes may be associated with one of these resolutions in a non-ascending manner. In some implementations, an MVD class may be associated with two or more resolutions above, where the higher resolution may be equal to or less than the lower resolution for the preceding MVD class. For example, if MV_CLASS_3 in Table 3 may be associated with optional 1-pel and 2-pel resolutions, then the highest resolution to which MV_CLASS_4 in Table 3 may be associated may be 2-pel. In some other implementations, the highest allowed resolution for an MV class may be higher than the lowest allowed resolution of the preceding (lower) MV class. However, the average of allowed resolutions for the ascending MV classes may only be in non-ascending order.
[0104] In some implementations, when fractional pixel resolution higher than 1 / 8 pel is allowed, the "mv_fr" and "mv_hp" signaling may be correspondingly extended to a total of 3 or more fractional bits.
[0105] In some implementations, fractional pixel resolution may be allowed only for MVD classes equal to or less than the threshold MVD class. For example, fractional pixel resolution may be allowed only for MVD-CLASS 0 and not for all other MV classes in Table 3. Similarly, fractional pixel resolution may be allowed only for MVD classes equal to or less than any one of the other MV classes in Table 3. For other MVD classes above the threshold MVD class, only integer pixel resolution for the MVD is allowed. In this way, fractional resolution signaling such as one or more of the "mv-fr" and / or "mv-hp" bits may not need to be signaled for MVDs signaled in MVD classes equal to or greater than the threshold MVD class. For MVD classes with resolution less than one pixel, the number of bits in the "mv-bit" signaling may be further reduced. For example, for MV_CLASS_5 in Table 3, the range of MVD pixel offsets is (32, 64], and therefore 5 bits are required to signal the full range at 1 pixel resolution. However, if MV_CLASS_5 were associated with a 2 pixel MVD resolution (a lower resolution than 1 pixel resolution), then 4 bits would be required for "mv-bit" instead of 5 bits, and neither "mv-fr" nor "mv-hp" would need to be signaled as MV-CLASS_5 following the signaling of "mv_class".
[0106] In some example implementations, fractional pixel resolution may be allowed only for MVDs with integer values less than a threshold integer pixel value. For example, fractional pixel resolution may be allowed only for MVDs smaller than 5 pixels. Corresponding to this example, fractional resolution may be allowed for MV_CLASS_0 and MV_CLASS_1 in Table 3, and not allowed for all other MV classes. In another example, fractional pixel resolution may be allowed only for MVDs smaller than 7 pixels. Corresponding to this example, fractional resolution may be allowed for MV_CLASS_0 and MV_CLASS_1 in Table 3 (range less than 5 pixels), and not allowed for MV_CLASS_3 and above (range greater than 5 pixels). For MVDs belonging to MV_CLASS_2, whose pixel range encompasses 5 pixels, fractional pixel resolution for the MVD may or may not be allowed depending on the "mv-bit" value. If the "m-bit" value is signaled as 1 or 2 (such that the integer part of the signaled MVD is 5 or 6 and is calculated as the start of the pixel range for MV_CLASS_2 with offset 1 or 2 as indicated by "m-bit"), fractional pixel resolution may be allowed. Otherwise, if the "mv-bit" value is signaled as 3 or 4 (such that the integer part of the signaled MVD is 7 or 8), fractional pixel resolution may not be allowed.
[0107] In some other implementations, only a single MVD value may be allowed for MV classes equal to or greater than the threshold MV class. For example, such a threshold MV class may be MV_CLASS_2. Thus, MV_CLASS_2 and above are only allowed to have a single MVD value and no fractional pixel resolution. The single allowed MVD value for these MV classes may be predefined. In some examples, the single allowed value may be the higher end value of the respective range for these MV classes in Table 3. For example, MV_CLASS_2 through MV_CLASS_10 may be equal to or greater than the threshold class of MV_CLASS 2, and the single allowed MVD values for these classes may be predefined as 8, 16, 32, 64, 128, 256, 512, 1024, and 2048, respectively. In some other examples, the single allowed value may be the middle value of the respective range for these MV classes in Table 3. For example, MV_CLASS_2 through MV_CLASS_10 may exceed the class thresholds, and the single allowed MVD values for these classes may be predefined as 3, 6, 12, 24, 48, 96, 192, 384, 768, and 1536, respectively. Any other value within that range may also be defined as the single allowed resolution for the respective MVD class.
[0108] In the above implementation, only the "mv_class" signaling is sufficient to determine the MVD value when the signaled "mv_class" is equal to or greater than a predefined MVD class threshold. The magnitude and direction of the MVD are determined using "mv_class" and "mv_sign".
[0109] Therefore, when an MVD is signaled only for one reference frame (either from reference frame list 0 or list 1, but not both), or when it is signaled jointly for two reference frames, the accuracy (or resolution) of the MVD may depend on the associated class of motion vector difference in Table 3 and / or the magnitude of the MVD.
[0110] In some other implementations, the pixel resolution or precision for the MVD may decrease or not increase with increasing MVD magnitude. For example, the pixel resolution may depend on the integer part of the MVD amplitude. In some implementations, fractional pixel resolution may only be allowed for MVD amplitudes below an amplitude threshold. For a decoder, the integer part of the MVD amplitude is first extracted from the bitstream. The pixel resolution may then be determined, and then a determination may be made as to whether any fractional MVD is present in the bitstream and needs to be analyzed (e.g., if fractional pixel resolution is not allowed for a particular extracted MVD integer magnitude, fractional MVD bits may not be included in the bitstream that requires extraction). The exemplary implementations described above related to MVD class-dependent adaptive MVD pixel resolution are applied to MVD amplitude-dependent adaptive MVD pixel resolution. For a particular example, MVD classes above or encompassing a magnitude threshold may be allowed to have only one predefined value.
[0111] The various exemplary implementations above apply to single reference modes. These implementations also apply to the examples in combined prediction under MMVD, such as NEW_NEARMV, NEAR_NEWMV, and / or NEW_NEWMV modes. These implementations generally apply to adaptive resolution for any MVD.
[0112] In some example implementations, adaptive MVD resolution is further described below. For NEW_NEARMV and NEAR_NEWMV modes, the accuracy of the MVD depends on the associated class and the magnitude of the MVD.
[0113] In some instances, fractional MVDs are only allowed if the magnitude of the MVD is less than or equal to one pixel.
[0114] In some examples, only one MVD value is allowed when the associated MV class value is MV_CLASS_1 or greater, and the MVD value in each MV class is derived as 4, 8, 16, 32, 64 for MV classes 1 (MV_CLASS_1), 2 (MV_CLASS_2), 3 (MV_CLASS_3), 4 (MV_CLASS_4), or 5 (MV_CLASS_5).
[0115] The permissible MVD values for each MV class are illustrated in Table 4. [Table 4]
[0116] In some examples, one context is used to signal mv_joint or mv_class if the current block is coded as NEW_NEARMV or NEAR_NEWMV mode, and another context is used to signal mv_joint or mv_class otherwise.
[0117] In some example implementations, adaptive MVD resolution improvement is described below.
[0118] In some examples, a new inter-coding mode named AMVDMV is added to the single reference case, which indicates that adaptive MVD (AMVD) is applied to the signal MVD when the AMVDMV mode is selected.
[0119] In some examples, one flag named amvd_flag is added under JOINT_NEWMV mode to indicate whether AMVD is applied to joint MVD coding mode. When adaptive MVD resolution is applied to joint MVD coding mode, MVDs for two reference frames are jointly signaled, and the accuracy of MVD is implicitly determined by the size of MVD. Otherwise, MVDs for two (or more) reference frames are jointly signaled, and conventional MVD coding is applied.
[0120] In some implementations, template matching (TM) is used, as further described below.
[0121] FIG. 4 is a diagram illustrating an example template matching (TM) according to some embodiments.
[0122] In some examples, the neighboring reconstructed (or predicted) samples of the current block, the forward and / or the backward predicted block are also referred to as the template of the current block, the template of the forward and / or the backward predicted block, respectively. For example, the neighboring reconstructed samples 402 of the current block 404 are the templates of the current block, the neighboring reconstructed samples 404 of the backward predicted block P0 406 are the templates of the backward predicted block P0, and the neighboring reconstructed samples 408 of the forward predicted block P1 410 are the templates of the forward predicted block P1. As illustrated in FIG. 4, the templates indicating the neighboring reconstructed (or predicted) samples are shown as texture parts, for example, as the top and left samples of the block.
[0123] In some examples, the template matching method exploits the correlation between pixels in the block and pixels in the template. The TM method is very close to the block matching (BM) method. In the BM method, the best match for a given pixel block in a frame is found with the corresponding pixel block in the reference frame. The pixel values of the block to be encoded / decoded are compared with the pixel values of each block in the reference frame, and the block with the closest match is selected. The pixels in the current block are predicted based on the closest matching block of the pixel in the reference frame. Compared to the BM method, in the TM method, the template pixels to the left and above the current block are predicted instead of the block itself, and the template pixels are used to find the best match. In some examples, the search process for the best match of the template for the current block (in the reference frame) is done both on the encoder side and the decoder side, so the motion vector (MV) for the best match of the template is not sent to the decoder. Once the best matching template for the current block is found, the neighboring blocks of the reference template, such as P0 and P1 in FIG. 4, are used as predictors for the current block.
[0124] In some implementations, when an adaptive MVD resolution method is applied, the accuracy of the MVD depends on the size of the MVD. The accuracy of the MVD decreases as the size of the MVD increases. As a result, when adaptive MVD resolution is applied, the prediction may be less accurate for large MVDs.
[0125] In some embodiments, the methods disclosed herein may be used separately or combined in any order. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. The term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU.
[0126] In this disclosure, the orientation of the reference frame may be determined according to whether the reference frame is before the current frame in display order or after the current frame in display order.
[0127] In this disclosure, maximum or highest precision of MVD signaling refers to the finest granularity of MVD precision, for example, 1 / 16-pel MVD signaling represents a higher level of precision than 1 / 8-pel MVD signaling.
[0128] In this disclosure, the finest MVD resolution allowed refers to the resolution at which the MVD is signaled. For example, when adaptive MVD decomposition is applied, the MVD may be signaled at 1 / 4 pixel. However, when template matching is also applied, the actual MVD used for motion compensation may be refined to 1 / 8 pel or higher precision without further signaling.
[0129] In some implementations, motion vector predictor (MVP) and motion vector difference (MVD) are two important parameters used to represent the motion vector (MV) of a current block. In inter prediction mode, MVP and MVD are used to represent the motion vector of a current block relative to reference blocks in previous and next frames.
[0130] For example, MVP is typically computed by using motion vectors of neighboring blocks in the same frame or by using motion vectors of corresponding blocks in a reference frame. The goal of MVP is to predict the motion of a current block based on the motion of neighboring or corresponding blocks in a reference frame.
[0131] For example, MVD is the difference between the motion vector of the current block and the MVP. MVD represents the deviation between the actual motion vector of the current block and a predicted motion vector based on adjacent or corresponding blocks in a reference frame. MVD is typically encoded and transmitted to a decoder together with the motion vector predictor to enable the decoder to reconstruct the motion vector of the current block.
[0132] In some aspects / embodiments, when adaptive MVD resolution is applied, template matching may be used to further refine the MV for the current block. The starting point of MV refinement with template matching is the MV of the current block, which is the sum of the MVP and MVD for the current block. MV refinement with template matching is performed on both the encoder and decoder sides, and the difference between the refined MV and the starting point of the MV refinement is not signaled in the bitstream.
[0133] 5 is an example flow diagram illustrating a method 500 of coding video according to some embodiments. Method 500 may be performed in a computing system (e.g., server system 112, source device 102, or electronic device 120) having control circuitry and memory storing instructions for execution by the control circuitry. In some embodiments, method 500 may be performed by executing instructions stored in a memory (e.g., memory 314) of the computing system. Method 500 may be performed by an encoder (e.g., encoder 106) and / or a decoder (e.g., decoder 122).
[0134] Referring to FIG. 5, in one aspect, a video decoder (e.g., decoder 122 of FIG. 2B) and / or a video encoder (e.g., encoder 106 of FIG. 2B) determines whether an adaptive motion vector difference (MVD) resolution mode is signaled based on an inter prediction syntax element from a video stream, and the adaptive MVD resolution mode is an inter prediction mode having an adaptive motion vector difference (MVD) pixel resolution (510).
[0135] A video decoder / encoder receives a motion vector difference (MVD) for a video block from a video stream (520).
[0136] In response to determining that the adaptive MVD resolution mode is signaled, the video decoder / encoder searches for a first template of a predictive video block for the video block, where the first template is an adjacent reconstructed / predicted sample of the predictive video block, and the predictive video block is a reconstructed / predicted forward or backward video block of the video block (530).
[0137] The video decoder / encoder identifies a first template of the predicted video block that best matches a second template of the video block, the second template being a neighboring reconstructed / predicted sample of the video block that corresponds to the temporally collocated template of the first template (540).
[0138] The video decoder / encoder refines a motion vector (MV) for the video block based at least on the second template, the identified first template, and the MVD (550).
[0139] A video decoder / encoder reconstructs / processes video blocks based at least on the refined MV.
[0140] In one embodiment and / or any combination of embodiments disclosed herein, the size of the search area for template matching may depend on the size of the MVD (or associated MV magnitude class) for the current block when the adaptive MVD resolution is applied. For example, searching (530) for a first template of a prediction video block for the video block includes determining a size of the search area based on the size of the MVD and performing the search based on the size of the search area.
[0141] In one embodiment and / or any combination of embodiments disclosed herein, the size of the search region increases monotonically or remains unchanged for template matching as the size of the MVD increases. For example, determining the size of the search region based on the size of the MVD may include increasing the search region as the size of the MVD increases or the search region remains unchanged as the size of the MVD increases.
[0142] In one embodiment and / or any combination of embodiments disclosed herein, the size of the search region is the same for all MVDs in one MV class. For example, determining the size of the search region based on the size of the MVD includes determining the same search region when the MVDs are in the same MV class.
[0143] In one embodiment, the size of the search region is the same for all MVDs in a MV class when the MV class of the MVD is greater than or equal to a threshold, such as MV_CLASS_1. For example, determining the size of the search region based on the size of the MVD includes determining the same search region when the size of the MVD is greater than or equal to a threshold.
[0144] In one embodiment and / or any combination of embodiments disclosed herein, the precision / granularity of MV refinement within a given search space for template matching may depend on the size of the MVD or the associated MV class. The precision may include, but is not limited to, 1 / 64 pel, 1 / 32 pel, 1 / 16 pel, 1 / 8 pel, 1 / 4 pel, 1 / 2 pel, 1 pel, 2 pel, 3 pel, 4 pel, ..., n pel precision, where n is an integer.
[0145] In an embodiment and / or any combination of embodiments disclosed herein, fractional precision MV refinement by template matching is allowed only when the magnitude of the MVD is less than or equal to one threshold or the associated MV class is less than or equal to another threshold. For example, determining the MV refinement granularity based on the magnitude of the MVD includes implementing fractional precision MV refinement only when the magnitude of the MVD is less than or equal to a threshold. In one example, fractional precision MV refinement by template matching is allowed only when the magnitude of the MVD is less than or equal to one pel sample. In one example, fractional precision MV refinement by template matching is allowed only when the associated MV class is less than or equal to MV_CLASS_0.
[0146] In one embodiment and / or any combination of embodiments disclosed herein, the precision / granularity of the MV refinement involving template matching may become monotonically coarser as the magnitude of the MVD increases. For example, refining (550) the MV of the video block includes determining a refinement granularity of the MV based on the magnitude of the MVD.
[0147] In an embodiment and / or any combination of embodiments disclosed herein, when adaptive MVD resolution is applied, the finest MVD resolution allowed depends on whether template matching is applied. For example, when adaptive MVD decomposition mode is signaled, the finest MVD decomposition allowed depends on whether template matching mode is signaled. In one example, the finest MVD resolution allowed when template matching is applied is lower than the finest MVD resolution allowed when template matching is not applied. In one example, when adaptive MVD resolution is applied, if the finest MVD resolution allowed when template matching is not applied is 1 / 8 pel, the finest MVD resolution allowed when template matching is applied is 1 / 4 or 1 / 2 pel.
[0148] In one embodiment and / or any combination of embodiments disclosed herein, MV refinement for template matching is restricted to a particular predefined direction, e.g., horizontal, vertical, or diagonal. For example, refining 550 the MV of a video block includes restricting the MV to one or more predefined directions during refinement. The predefined search direction may be signaled at a high level syntax, such as at the sequence level, frame level, and / or slice level.
[0149] In an embodiment and / or any combination of embodiments disclosed herein, the search direction for MV refinement with template matching may depend on the direction of the MVD. For example, searching the first template of the prediction video block for the video block (530) includes determining a search direction based on the direction of the MVD and performing a search based on the search direction. In one example, if the direction of the MVD is along the horizontal or vertical direction, the search direction for MV refinement with template matching is also limited to the horizontal or vertical direction. In another example, the search direction for MV refinement with template matching may be the same as the direction of the MVD or vertical.
[0150] In an embodiment and / or any combination of embodiments disclosed herein, one high-level syntax may be signaled to indicate whether template matching is applied to the adaptive MVD resolution. For example, prior to the search, it is determined whether a template matching mode is signaled for one or more video blocks based on a second syntax element from the video stream, and the search is performed in response to determining that the template matching mode is signaled. In one example, the high-level syntax may be signaled at a sequence level, a frame level, and / or a slice level. For example, the second syntax element is signaled at one or more of a sequence level, a frame level, and / or a slice level.
[0151] 5 illustrates multiple logical stages in a particular order, these are not order dependent and may be reordered and other stages may be combined or occur. Some reordering or other groupings not specifically mentioned will be apparent to one of ordinary skill in the art, and thus the ordering and groupings presented herein are not exhaustive. Further, it should be recognized that these stages may be implemented in hardware, firmware, software, or any combination thereof.
[0152] In another aspect, some embodiments include a computing system (e.g., server system 112) including a control circuit (e.g., control circuit 302) and a memory (e.g., memory 314) coupled to the control circuit, the memory storing one or more instruction sets configured to be executed by the control circuit, the one or more instruction sets including instructions for performing any of the methods described herein.
[0153] In yet another aspect, some embodiments include a non-transitory computer-readable storage medium storing one or more instruction sets for execution by control circuitry of a computing system, the one or more instruction sets including instructions for performing any of the methods described herein.
[0154] Although terms such as "first," "second," and the like may be used herein to describe various elements, it will be understood that these elements are not to be limited by these terms. These terms are used only to distinguish one element from another.
[0155] The technical terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the scope of the claims. When used in the description of the embodiments and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. The term "and / or" as used herein will also be understood to refer to and include any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "comprise" and / or "comprising" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0156] As used herein, the term "if" may be interpreted to mean "when" or "when," "in response to determining" or "in accordance with a determination of," or "in response to detecting," depending on the context. Similarly, "if it is determined that [the stated precondition is true]," "[if the stated precondition is true]," or "when [the stated precondition is true]" may be interpreted to mean "upon determining," "in response to determining," or "in accordance with a determination of," or "upon detecting" or "in response to detecting," depending on the context.
[0157] The foregoing description has been described with reference to specific embodiments for purposes of explanation. However, the exemplary discussion above is not intended to be exhaustive or to limit the scope of the claims to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments have been chosen and described in order to best explain the principles of operation and practical applications so as to enable others skilled in the art to do so.
Claims
1. 1. A method of decoding a video stream executed in a computing system having a memory and control circuitry, comprising: determining whether an adaptive motion vector difference (MVD) resolution mode is signaled based on a value of an inter prediction syntax element from the video stream, the adaptive MVD resolution mode being an inter prediction mode having an adaptive motion vector difference (MVD) pixel resolution; receiving a motion vector difference (MVD) of a video block from the video stream; in response to determining that the adaptive MVD resolution mode is signaled, searching for a first template of a prediction video block for the video block, the first template being a neighboring reconstructed sample of the prediction video block, the prediction video block being a reconstructed forward or backward video block of the video block; identifying a first template for the prediction video block that best matches a second template for the video block, the second template being a neighboring reconstructed sample of the video block that corresponds to a temporally co-located template of the first template; refining a motion vector (MV) of the video block based at least on the second template, the identified first template, and the MVD; and reconstructing the video block based at least on the refined MV.
2. 2. The method of claim 1 , wherein searching the first template of the prediction video block for the video block comprises: determining a size of a search area based on a magnitude of the MVD; and searching based on the size of the search area.
3. 3. The method of claim 2, wherein determining a size of the search area based on the magnitude of the MVD comprises increasing the search area as the magnitude of the MVD increases or keeping the search area unchanged as the magnitude of the MVD increases.
4. The method of claim 2 , wherein determining the size of the search area based on the magnitude of the MVD comprises determining the same search area when the MVDs are in the same MV class.
5. The method of claim 2 , wherein determining a size of the search area based on the magnitude of the MVD comprises determining the same search area when the magnitude of the MVD is greater than or equal to a threshold.
6. The method of claim 1 , wherein refining the MV of the video block comprises determining a refinement granularity of the MV based on a size of the MVD.
7. 7. The method of claim 6, wherein determining the MV refinement granularity based on the magnitude of the MVD comprises implementing fractional fine MV refinement only when the magnitude of the MVD is less than or equal to a threshold value.
8. The method of claim 1 , wherein refining the MV of the video block comprises constraining the MV to one or more predetermined directions during refinement.
9. 2. The method of claim 1 , wherein searching the first template of the prediction video block for the video block comprises: determining a search direction based on a direction of the MVD; and searching based on the search direction.
10. 2. The method of claim 1 , further comprising, prior to searching, determining whether a template matching mode is signaled for one or more of the video blocks based on a second syntax element from the video stream, and performing a search in response to determining that the template matching mode is signaled.
11. The method of claim 10 , wherein the second syntax element is signaled at one or more of a sequence level, a frame level, and / or a slice level.
12. The method of claim 10 , wherein when the adaptive MVD resolution mode is signaled, the finest MVD resolution allowed depends on whether the template matching mode is signaled.
13. A computing system comprising a memory for storing computer instructions and a control circuit in communication with said memory, said control circuit being configured, when executing said computer instructions, to cause said computing system to perform a method according to any one of claims 1 to 12 for decoding a video stream.
14. A program which, when executed by a control circuit of a computing system, causes the computing system to perform a method according to any one of claims 1 to 12 for decoding a video stream.