Piezoelectric-on-insulator (POI) substrate and process for manufacturing the same - Patents.com

Abstract

The present invention relates to a piezoelectric-on-insulator (POI) substrate (100, 200) comprising a support substrate (102) having a first acoustic impedance, a piezoelectric layer (104), a dielectric layer (110) having a second acoustic impedance and sandwiched between the piezoelectric layer (104) and the support substrate (102), and an intermediate layer (106) positioned between the support substrate (102) and the dielectric layer (110), characterized in that the intermediate layer (106) is a layer having a variable composition, more specifically a variable composition such that the acoustic impedance of the intermediate layer (106) varies particularly gradually between the first acoustic impedance value and the second acoustic impedance value along a thickness of the intermediate layer (106).

Description

[Technical field]

[0001] The present invention relates to a piezoelectric-on-insulator (POI) substrate and a process for manufacturing such a piezoelectric-on-insulator (POI) substrate. [Background technology]

[0002] Piezoelectric-on-insulator (POI) substrates comprise a thin layer of piezoelectric material on a supporting substrate bonded together by a dielectric layer of silicon oxide that provides good adhesion between the layer of piezoelectric material and the supporting substrate.

[0003] Such substrates are used in acoustic wave devices, such as sensors or filters, which have a higher quality value Q and electromechanical coupling coefficient k compared to other substrates of the prior art. 2 It has good performance due to

[0004]

[0004] However, the fact that the supporting substrate material is silicon-based means that there is a significant difference between the acoustic impedance of the supporting substrate and the acoustic impedance of the silicon oxide dielectric layer. This difference in acoustic impedance in the structure of the piezoelectric substrate causes a loss in the performance of acoustic wave devices fabricated on the POI substrate. This is because the difference in acoustic impedance between the supporting substrate and the silicon oxide dielectric layer can give rise to parasitic modes in the frequency band used for acoustic wave devices (SAW).

[0005]

[0005] The object of the present invention is to overcome the above-mentioned drawbacks, in particular to design a piezoelectric-on-insulator (POI) substrate having better properties for use in acoustic wave devices (SAW). Summary of the Invention

[0006]

[0006] The object of the invention is achieved by a piezoelectric-on-insulator (POI) substrate comprising a support substrate having a first acoustic impedance, a piezoelectric layer, in particular a layer of lithium tantalate (LTO), lithium niobate (LNO), aluminum nitride (AlN), lead zirconate titanate (PZT), langasite or langatate, a dielectric layer having a second acoustic impedance and sandwiched between the piezoelectric layer and the support substrate, and an intermediate layer positioned between the support substrate and the dielectric layer, characterized in that the intermediate layer is a layer having a variable composition, more specifically a variable composition such that along the thickness of the intermediate layer the acoustic impedance of the intermediate layer changes particularly gradually between the value of the first acoustic impedance and the value of the second acoustic impedance. The change in acoustic impedance of the intermediate layer thus allows a gradual reduction in the difference in acoustic impedance between the dielectric layer and the support substrate in the piezoelectric-on-insulator (POI) substrate, thereby reducing the loss of performance.

[0007] According to one embodiment, the support substrate may be a silicon-based substrate, the dielectric layer is a layer of silicon oxide, and the intermediate layer is a layer of silicon oxynitride SiO 2 having a variable oxygen and / or nitrogen composition. x N y The use of a nitrogen-based intermediate layer located between the piezoelectric layer and the support substrate makes it possible to obtain an intermediate layer with variable composition while reducing the diffusion of lithium or hydrogen into the support substrate.

[0008] According to one embodiment, the change in oxygen composition and / or nitrogen composition of the intermediate layer is a gradual linear change or a stepwise change. By changing the amount qt of the silicon oxynitride layer, it is possible to gradually change the acoustic impedance of the intermediate layer. According to one embodiment, the intermediate silicon oxynitride SiO x N y The variable composition of the layer is defined by the quantity qt=y / (y+x), and the intermediate silicon oxynitride SiO x N yThe amount qt may vary along the thickness of the layer, more specifically, qt is 0 at the interface with the dielectric layer and qt is at least 0.4 at the interface with the supporting substrate. Varying the amount qt along the thickness of the silicon oxynitride layer allows for a gradual decrease in the difference in acoustic impedance between the dielectric layer and the supporting substrate.

[0009] According to one embodiment for longitudinal waves, the quantity qt at the interface with the support substrate is 19.4*10 for a support substrate of type Si(100) with acoustic impedance Z. 6 Since the surface area is equal to Pa·s / m, it can be approximately equal to qt=0.5, and the quantity x is Z=21.1*10 for a Si(110) type support substrate. 6 Since the qt is in Pa·s / m, it can be approximately equal to qt=0.68, and the quantity qt is Z=21.6*10 for a Si(111) type support substrate. 6 Since Pa·s / m, it can be approximately equal to qt=0.7. The change in the quantity qt at the interface with the supporting substrate makes it possible to adjust the acoustic impedance to that of the supporting substrate depending on its crystalline orientation.

[0010] Other optimized values ​​may be determined depending on the mode of propagation associated with the acoustic device, ie, either longitudinally propagating waves or slow or fast shear waves.

[0011] According to one embodiment, a silicon oxynitride SiO x N y The layer volume qt can be varied to increase, in particular stepwise or linearly, between the interface of the piezoelectric layer with the dielectric layer and the interface with the support substrate, in such a way that it is again possible to further reduce the adverse effects of differences in acoustic impedance.

[0012] According to one embodiment, the Piezoelectric-on-insulator (POI) substrate may further comprise a trapping layer, in particular a polycrystalline silicon-based layer, on the solid support substrate. The presence of the trapping layer on the support substrate allows the Piezoelectric-on-insulator substrate to be improved while reducing the energy losses in the support substrate. Thus, if the trapping layer is silicon-based like the support substrate, an intermediate layer in contact with the trapping layer can be used, making it possible to reduce the acoustic impedance difference in the same way as above.

[0013]

[0013] It is also an object of the present invention to provide a method for producing a piezoelectric substrate, in particular a silicon-based substrate, having a first acoustic impedance, and a piezoelectric substrate, in particular a lithium tantalate (LTO), lithium niobate (LNO), aluminum nitride (AlN), lead zirconate titanate (PZT), langasite or langatate substrate, forming on the piezoelectric substrate a dielectric layer, in particular a layer of silicon oxide, having a second acoustic impedance, and forming on the free surface of the support substrate an intermediate layer, in particular a silicon oxynitride SiO x N y This is achieved by a process for manufacturing a piezoelectric-on-insulator (POI) substrate, comprising the steps of forming a layer based on POI, the intermediate layer having a variable composition, more specifically a variable composition such that the acoustic impedance of the intermediate layer varies particularly gradually along the thickness of the intermediate layer between a first acoustic impedance value and a second acoustic impedance value, and bonding a piezoelectric substrate having a dielectric layer and a support substrate having the intermediate layer. The change in acoustic impedance of the intermediate layer thus allows the difference in acoustic impedance between the dielectric layer and the support substrate in the piezoelectric-on-insulator substrate to be gradually reduced, thereby reducing the loss of performance in the piezoelectric-on-insulator (POI) substrate.

[0014] According to one embodiment, the bonding between the piezoelectric substrate and the support substrate can be achieved between the intermediate layer and the dielectric layer. x N y system, the bonding interface results in the formation of oxide-oxide type bonds, which are known to be stable.

[0015] According to one embodiment, the process may further comprise the step of forming a dielectric layer on the intermediate layer of the support substrate prior to the bonding step, such that bonding is then achieved between the dielectric layer of the support substrate and the dielectric layer of the piezoelectric substrate. The bonding interface between the support substrate and the piezoelectric layer is created at the interface of the two dielectric layers and has an oxide-oxide type bond, more particularly a silicon oxide-silicon oxide type bond, which is a stable bond.

[0016] According to one embodiment, the step of forming an intermediate layer on the support substrate comprises forming a silicon oxynitride layer on the support substrate. x N y and the formation of a layer based on silicon oxynitride SiO defined by the quantity qt1=y / (y+x). x N y The variable composition in the layer, qt, is silicon oxynitride SiO x N y The impedance of the intermediate layer varies along the thickness of the layer, more specifically, qt1 is 0 at the interface with the dielectric layer and qt1 is at least 0.4 at the interface with the support substrate. If the impedance of the intermediate layer varies between a value close to the impedance value of the dielectric layer at the interface with the dielectric layer and a value close to the impedance value of the support substrate, the intermediate layer allows adjusting the acoustic impedance of the different piezoelectric-on-insulator (POI) substrate materials obtained by the process so as to reduce the difference in the acoustic impedance of the piezoelectric-on-insulator substrate. The piezoelectric-on-insulator (POI) substrate thus obtained has an acoustic impedance that is more adapted to the use of the substrate in an acoustic wave device, since it results in a reduction of parasitic effects in the frequency band used in the acoustic wave device.

[0017] According to one embodiment, the step of forming an intermediate layer on the support substrate comprises forming a silicon oxynitride layer on the support substrate. x N y The formation of a layer based on silicon oxynitride SiO defined by qt2=y / (y+x) x N y The layer volume qt2 is silicon oxynitride SiO x N y The thickness of the layer varies, more specifically, qt2 is at least 0.4 at the interface with the support substrate, and the process includes depositing a SiO x N y The bonding may further include forming a layer of SiO 2 on the support substrate. x N y SiO layer and piezoelectric substrate x N y The SiO x N y The layer is SiO x N y Silicon oxynitride SiO defined by qt3=y / (y+x) which varies along the layer thickness x N y More specifically, qt3=0 at the interface between the piezoelectric substrate and the dielectric layer, and qt2 is the amount of SiO x N y SiO layer and supporting substrate x N y At the interface between the layers it is equal to qt3.

[0018] The bonding interface between the support substrate and the piezoelectric layer is made of silicon oxynitride SiO x N y The interface between the two intermediate layers is created based on SiO 2 and has an oxide-oxide type bond that allows a stable bond.

[0019]

[0019] According to one embodiment, the process may further comprise the step of forming a trapping layer on the support substrate, in particular on the polycrystalline silicon-based layer. The presence of the trapping layer on the support substrate allows the improvement of the piezoelectric-on-insulator substrate while reducing the energy losses in the support substrate. Thus, if the trapping layer is silicon-based like the support substrate, an intermediate layer in contact with the trapping layer can be used, which allows the acoustic impedance difference to be reduced in the same way as above.

[0020] According to one embodiment, the step of forming the intermediate layer may be performed by radio frequency sputtering in a mixed atmosphere of oxygen and nitrogen.

[0021]

[0021] The object of the present invention is also achieved by an acoustic wave device (SAW) comprising the above-mentioned piezoelectric-on-insulator substrate, which exhibits reduced parasitic effects in the frequency band in which the device operates by adjusting the acoustic impedance between the support substrate and the dielectric layer of the piezoelectric-on-insulator (POI) substrate.

[0022] The invention and its advantages are explained in more detail below by preferred embodiments and are supported in particular by the following accompanying drawings in which reference numerals identify features of the invention. [Brief description of the drawings]

[0023] [Figure 1] FIG. 1 is a schematic diagram of a piezoelectric-on-insulator (POI) substrate according to a first embodiment of the present invention. [Diagram 2] 4 shows the variation in sound speed in the intermediate layer as a function of the amount qt of the composition of the intermediate layer for qt values ​​corresponding to qt=0, qt=0.33, qt=0.50, qt=0.68, and qt=1 according to a first embodiment of the present invention. [Diagram 3] 4 shows the change in acoustic impedance of the intermediate layer as a function of the amount of intermediate layer qt according to a first embodiment of the present invention. [Figure 4] FIG. 2 is a schematic diagram of a piezoelectric-on-insulator (POI) substrate according to a first variant of the first embodiment of the present invention. [Figure 5a] 5A-5C are schematic diagrams of a process for manufacturing a piezoelectric-on-insulator (POI) substrate according to a second embodiment of the present invention. [Figure 5b] 5A-5D are schematic diagrams of a process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to a first variant of the second embodiment of the present invention; [Figure 5c] 5A-5D are schematic diagrams of a process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to a second variant of the second embodiment of the present invention; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024]

[0030] The present invention will now be described in more detail using advantageous embodiments, in an exemplary manner and with reference to the drawings. It should be noted that the described embodiments are merely possible configurations, and that individual features as mentioned above can be provided independently of one another or can be omitted entirely during the implementation of the present invention.

[0025]

[0031] FIG. 1 is a schematic diagram of a piezoelectric-on-insulator (POI) substrate according to a first embodiment of the present invention.

[0026]

[0032] Piezoelectric-on-insulator (POI) substrate 100 comprises a support substrate 102 bonded to a piezoelectric layer 104 via an intermediate layer 106 positioned on support substrate 102 in direct contact with support substrate 102 at interface 108 and in direct contact with a dielectric layer 110 at interface 112. Dielectric layer 110 is in direct contact with piezoelectric layer 104 at interface 114.

[0027]

[0033] The support substrate 102 may be a silicon-based substrate, in particular a silicon-based solid substrate. The support substrate 102 may be a crystalline substrate or a polycrystalline substrate. The support substrate 102 based on crystalline silicon may have an orientation (111), an orientation (100), or an orientation (110). Silicon (100) has a lattice constant of 19.4*10 6 Silicon (111) has an acoustic impedance Z equal to Pa s / m, Z=21.6*10 6 The silicon (110) has an acoustic impedance of 21.1*10 Pa·s / m. 6 It has an acoustic impedance of Pa·s / m.

[0028]

[0034] According to the present invention, the dielectric layer 110 is a silicon oxide based layer having a thickness of 100-900 nm, more specifically 200-700 nm. 6 Pa·s / m~14*10 6 Pa·s / m, more specifically, approximately 13.7*10 6 The dielectric layer 110 has an acoustic impedance of Pa·s / m and therefore has a second acoustic impedance different from the first acoustic impedance of the support substrate 102. In one variant, the dielectric layer 110 is also a silicon nitride based layer or a combination of silicon nitride and silicon oxide, SiO 2 , where the amount of nitride in the layer is constant. x N y It may be a layer comprising:

[0029]

[0035] The piezoelectric layer 104 is a layer based on a piezoelectric material having a thickness of 200 nm to 700 nm. The piezoelectric material may be, for example, lithium tantalate (LTO), lithium niobate (LNO), aluminum nitride (AlN), lead zirconate titanate (PZT), langasite, or langatate.

[0030]

[0036] The intermediate layer 106 is a layer having a variable composition, more specifically, a variable composition along a thickness e1 of the intermediate layer 106. The variation in composition of the intermediate layer 106 is such that the acoustic impedance of the intermediate layer 106 varies between a first acoustic impedance value of the respective support substrate 102 and a second acoustic impedance value of the dielectric layer 110. The variable acoustic impedance of the intermediate layer 106 allows for limiting the effect of the difference in acoustic impedance between the dielectric layer 110 and the support substrate 102 of the POI substrate 100 in the gradual transition from the first impedance value to the second impedance value.

[0031]

[0037] According to one embodiment of the present invention, the intermediate layer 106 is made of silicon oxynitride, SiO x N y The intermediate layer 106 has a thickness e1 of 100 nm to 1000 nm, more specifically, 200 nm to 1000 nm.

[0032]

[0038] Silicon oxynitride SiO according to the invention x N y The intermediate layer 106 has a stoichiometry that varies with the thickness e1 of the intermediate layer 106 to adjust the acoustic impedance of the intermediate layer 106. This is because the acoustic impedance of the layer depends on the change in the amount of oxygen and / or the change in the amount of nitrogen in the layer.

[0033]

[0039] The values ​​of x and y are set such that a desired or predetermined change in acoustic impedance is observed. The amounts of oxygen and nitrogen in the intermediate layer 106 are determined by the SiO x N y The thickness of the layer depends on the manufacturing process used to deposit the layer.

[0034]

[0040] According to one embodiment, the intermediate layer is an intermediate silicon oxynitride SiO 2 that varies according to qt1(e1)=y / (y+x). x N yThe stoichiometry of layer 106 is obtained as described by Grahn et al.: “Elastic properties of silicon oxynitride films determined by picosecond acoustics”, Applied Physics Letters 53, 2281, 1988. SiO x N y The layer is produced by radio frequency sputtering (RF sputtering) in a mixed atmosphere of oxygen and nitrogen. Thus, SiO x N y The composition of the layer is controlled by varying the amount of nitrogen and the ratio y / (y+x), which corresponds to the amount of nitrogen and oxygen, in the atmosphere during deposition.

[0035]

[0041] Silicon oxynitride SiO x N y The change in the amount qt of the layer 106 is the change in the thickness e1 of the layer 106 between the two surfaces of the intermediate layer 106. In this first embodiment, silicon oxynitride SiO x N y The change in volume qt1 of layer 106 is an incremental change between interface 112 with dielectric layer 110 and interface 108 with support substrate 102. The change may be, for example, a step increase or a linear increase.

[0036]

[0042] FIG. 2 shows the velocity V of the longitudinal sound wave in the intermediate layer 106 as a function of the amount qt of nitrogen (N) in the intermediate layer 106, where the amount qt in the intermediate layer 106 is 0, 0.33, 0.50, 0.68, and 1. longi This figure is published in "Elastic properties of silicon oxynitride films determined by picosecond acoustics" by Grahn et al., Applied Physics Letters 53, 2281, 1988.

[0037]

[0043] It can also be seen that there is a linear increase in the velocity of the longitudinal sound waves as the amount qt of the intermediate layer 106 increases. The line representing the linear change is a least squares fit to the data points.

[0038]

[0044] Starting from the data in Figure 2, the acoustic impedance is calculated according to Grahn et al.: "Elastic properties of silicon oxynitride films determined by picosecond acoustics", Applied Physics Letters 53, 2281 (1988), V longi is the velocity of the longitudinal sound wave Z=V longi * Obtained by calculating the acoustic impedance Z, which is the density.

[0039]

[0045] SiO according to the amount qt x N y The change in the acoustic impedance of the layer is shown in FIG. 3. When the quantity qt is equal to 0, the value of the acoustic impedance Z is equal to the value of the acoustic impedance Z of the layer of silicon oxide, which is 13.7*10 6 As the quantity qt increases, the acoustic impedance of the intermediate layer 106 increases continuously. For values ​​of the quantity qt between 0.5 and 0.7, the acoustic impedance Z becomes comparable to the acoustic impedance Z of silicon, which is 19.4*10 6 Pa·s / m~21.8*10 6 Pa·s / m. For qt=1, the resulting acoustic impedance Z is the acoustic impedance of Si3N4, which is 25.5*10 6 It is of the order of Pa·s / m. However, this value of the acoustic impedance Z depends on the deposition technique employed.

[0040]

[0046] Thus, by varying the amount qt1 of the intermediate layer 106, a change in the acoustic impedance value of the layer 106 can be obtained, which can vary between the acoustic impedance value of a layer of Si3N4 and that of a layer of silicon oxide. Starting from the values ​​shown in FIG.x N y It is possible to set the value of the quantity qt depending on the position within the layer thickness e1.

[0041]

[0047] 3, qt1(e1) is set to 0 at the intermediate layer 106 at the interface 112 with the dielectric layer 110. Then, qt1 increases with thickness e1 until it reaches a quantity qt1(e1=0)≧0.4, more specifically qt1(e1=0)=0.7, at the interface with the support substrate. Thus, the acoustic impedance (e1=0) of the intermediate layer 106 at the interface 108 with the support substrate 102 is on the order of the first acoustic impedance of the support substrate 102.

[0042]

[0048] Thus, the intermediate layer 106 makes it possible to reduce the difference in acoustic impedance between the support substrate 102 and the silicon oxide dielectric layer 110, with the acoustic impedance of the intermediate layer 106 being between the impedance of the support substrate 102 and the impedance of the dielectric layer 110.

[0043]

[0049] Additionally, the interface 112 between the dielectric layer 110 and the intermediate layer 106 is an interface that is nitrogen (N) free and includes a silicon oxide-silicon oxide bond, which is known to be a stable bond that improves adhesion.

[0044]

[0050] In addition, the intermediate layer 106 is SiO x N y If it is a system layer, the presence of nitrogen in the intermediate layer 106 makes it possible to reduce the diffusion of lithium or hydrogen into the support substrate 102 .

[0045]

[0051] Thus, the piezoelectric-on-insulator (POI) substrate 100 according to the present invention exhibits improved stability and improved characteristics for use in a piezoelectric-on-insulator (POI) substrate 100 in a surface wave device (SAW) such as a sensor or filter. Reducing the acoustic impedance difference in the piezoelectric-on-insulator (POI) substrate 100 reduces undesired modes in the desired frequency range for operation of the surface wave device (SAW).

[0046]

[0052] Figure 4 shows a variant of the first embodiment of the present invention. The only difference between the POI substrate 100 and the variant POI substrate 200 is the presence of a trapping layer 116 between the support substrate 102 and the intermediate layer 106. All other features of the POI substrate are the same as those described in Figure 1. Features common to the first embodiment that adopt the same reference numbers as above will not be described again, but refer to the detailed description of the features above.

[0047]

[0053] The trapping layer 116 contacts the supporting substrate 102 at an interface 118 and also contacts the intermediate layer 106 at an interface 120. The trapping layer 116 is sandwiched between the supporting substrate 102 and the intermediate layer 106.

[0048]

[0054] The trapping layer 116 is a layer based on polycrystalline, amorphous or porous silicon and has a thickness of 200 nm to 5 μm, more specifically, 500 nm to 2 μm. 6 There is a third acoustic impedance having a value of Pa·s / m, which is close to the average acoustic impedance value of the three possible silicon orientations mentioned above.

[0049]

[0055] In this variant, silicon oxynitride SiO x N y The value of the amount of variable composition qt1 of layer 106 is changed such that the acoustic impedance of intermediate layer 106 at interface 120 with trapping layer 116 is on the order of the third acoustic impedance of trapping layer 116 .

[0050]

[0056] The piezoelectric-on-insulator (POI) substrate 200 has the same advantages as the piezoelectric-on-insulator (POI) substrate 100 described in FIG.

[0051]

[0057] Figure 5a is a schematic diagram of a process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to a second embodiment of the invention, to obtain a POI substrate as described above in Figures 1 and 4 according to a first embodiment of the invention. Elements having the same reference numbers and their characteristics will not be described again, but reference is made to the above description.

[0052]

[0058] The process of manufacturing a piezoelectric-on-insulator (POI) substrate 200 starts with step I) of providing a support substrate 102, in particular a silicon-based substrate, more particularly a crystalline or polycrystalline silicon substrate.

[0053]

[0059] According to the invention, step II) consists of forming a trapping layer 116 on the free surface 122 of the support substrate 102. The formation of the trapping layer 116 can be achieved by thermal or plasma-assisted growth techniques such as PECVD (plasma-enhanced chemical vapor deposition) or PVD (physical vapor deposition).

[0054]

[0060] The trapping layer 116 formed on the support substrate 102 is a layer based on silicon, particularly polycrystalline silicon. The thickness of the trapping layer 116 is 200 nm to 5 μm, more specifically 500 nm to 2 μm. The trapping layer 116 has a fourth acoustic impedance that may be the same as or different from the acoustic impedance of the support substrate 102.

[0055]

[0061] In step III), the intermediate layer 106 is formed on the free surface 124 of the trapping layer 116 .

[0056]

[0062] Formation of the intermediate layer 106 may be accomplished by thermal or plasma-assisted growth techniques, such as LPCVD (low pressure chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition).

[0057]

[0063] The intermediate layer 106 is silicon oxynitride SiO x N y The thickness of the intermediate layer 106 is 100 nm to 1000 nm, more specifically, 200 nm to 1000 nm.

[0058]

[0064] To obtain a variable composition in the intermediate layer 106, the deposition parameters are varied during deposition to modify the amount of nitrogen and / or oxygen in the thickness of the deposited layer to achieve the gradual change in composition of the deposited layer 106 necessary to obtain the desired acoustic impedance at the free upper surface 126 of the deposited layer 106, as described above.

[0059]

[0065] Silicon oxynitride SiO x N y The change in composition of the deposited layer is defined by qt=y / (y+x).

[0060]

[0066] The change in the amount qt1 is due to the change in the interface 108 with the support substrate 102 and the silicon oxynitride SiO x N y 1. There is a decreasing change between the free upper surface 126 of the layer 106 and the surface 126 of the layer 106. The change may be a stepwise decrease or a linear decrease.

[0061]

[0067] At the interface 118 with the support substrate 102, the quantity qt1 is at least equal to 0.4, more specifically, the quantity qt1 is on the order of 0.7. Thus, the acoustic impedance of the intermediate layer 106 at the interface 118 with the support substrate 102 is on the order of, or more specifically, the same as, the first acoustic impedance of the support substrate 102.

[0062]

[0068] For a free surface 126 of the intermediate layer 106 that is intended to contact another layer in a subsequent process step, the quantity qt1 is defined by the acoustic impedance value of the layer that will be brought into contact with the free surface 126 .

[0063]

[0069] In step IV), a piezoelectric substrate 128 is provided.

[0064]

[0070] In step V), the dielectric layer 110 is produced on the free surface 130 of the piezoelectric substrate 128. Before forming the dielectric layer 110, one or more steps of cleaning, brushing or polishing the surface 130 of the piezoelectric substrate 128 can remove the presence of particles and dust in order to obtain a cleaner free surface 130, which makes it possible to obtain a deposited dielectric layer 110 of better quality.

[0065]

[0071] Formation of the dielectric layer 110 on the free surface 130 of the piezoelectric substrate 128 may be accomplished by thermal or plasma-assisted growth techniques such as LPECVD at reduced pressure and / or low temperature. A heat treatment may be performed after deposition of the dielectric layer 110 to densify the dielectric layer 110.

[0066]

[0072] According to one variant, a surface treatment step on the free surface 130 of the piezoelectric substrate 128 may be carried out before the formation of the dielectric layer 110. Examples include surface activation treatments such as plasma treatments or ozone-based treatments.

[0067]

[0073] In accordance with the present invention, dielectric layer 110 is a layer of silicon oxide.

[0068]

[0074] According to the invention, the piezoelectric substrate 128 obtained after step V) is then bonded to the support substrate 102 obtained in step III) during a bonding step VI) to form a support substrate-piezoelectric substrate assembly 132. Bonding of the piezoelectric substrate 128 onto the support substrate 102 is achieved by positioning the intermediate layer 106 in contact with the dielectric layer 110 of the piezoelectric substrate 128, such that the intermediate layer 106 is sandwiched between the dielectric layer 110 of the piezoelectric substrate 128 and the support substrate 102. The intermediate layer 106 is thus in direct contact with the dielectric layer 110 of the piezoelectric substrate 128 at the interface 112.

[0069]

[0075] In this structure, the acoustic impedance of the intermediate layer 106 at the free surface 126 is on the order of the acoustic impedance of the silicon oxide dielectric layer 110. In addition, the bond between the substrates is created at the interface 112, which is made of essentially the same material on both sides of the interface 112.

[0070]

[0076] After the two substrates are bonded, a step VII) (not shown) of thinning the piezoelectric substrate 128 may be performed to obtain a thinner piezoelectric layer 104. For example, the thinning step may be performed by grinding or by forming and fracturing a weakened zone in the piezoelectric substrate 128 so as to define the piezoelectric layer 104 to be transferred onto the support substrate 102. This step of forming the weakened zone is performed by implanting atomic or ionic species in the piezoelectric substrate 128. The atomic or ionic implantation may be performed such that the weakened zone is located inside the piezoelectric substrate 128 and separates the piezoelectric layer 104 from the rest of the piezoelectric substrate 128.

[0071]

[0077] This is followed by a step of fracturing the support substrate-piezoelectric substrate assembly 132 by input of thermal and / or mechanical energy at the weakened zone of the piezoelectric substrate 128, so as to obtain a Piezoelectric-on-Insulator (POI) substrate 200 having a thinner piezoelectric layer 104 on the support substrate 102, as shown in step VII) of FIG. 5a and in FIG. 4.

[0072]

[0078] This method can also be applied to obtain the substrate of FIG.

[0073]

[0079] FIG. 5b is a schematic illustration of a process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to a first variant of the second embodiment of the present invention.

[0074]

[0080] The features common to the second embodiment which bear the same reference numerals as above will not be described again, but reference is made to the detailed description thereof.

[0075]

[0081] The only difference between this process and the process of Fig. 5a consists of the formation IIIc) of a dielectric layer 134 on the free surface of the intermediate layer 106 after step III) of Fig. 5a. The dielectric layer 134 has the same material as the dielectric layer 110, namely silicon oxide. The dielectric layer 134 can be manufactured in the same way as the dielectric layer 110.

[0076]

[0082] Thus, in a bonding step VI), the dielectric layer 134 is brought into contact with the dielectric layer 110 of the piezoelectric substrate 128 at the interface 138. An assembly 140 is thus created by molecular adhesion between the two dielectric layers 110 and 134 made of the same material, in this case silicon oxide, which improves the bond between the substrates 102 and 128.

[0077]

[0083] All other process steps in this variant are the same as those of the process according to the second embodiment described in FIG. 5a to obtain a (POI) substrate 200.

[0078]

[0084] FIG. 5c is a schematic illustration of a process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to a second variant of the second embodiment of the present invention.

[0079]

[0085] The features common to the second embodiment and its variants which bear the same reference numerals as above will not be described again, but reference is made to the above detailed description.

[0080]

[0086] The only difference between this process and the process of Fig. 5a consists in separating the intermediate layer 106 into two parts. Step III) of Fig. 5a is replaced by two steps IIIa) and IIIb). In step IIIa), a first intermediate layer 144 is formed on the trap rich layer 116. In step IIIb), a second intermediate layer 150 is fabricated on the dielectric layer 110.

[0081]

[0087] Regarding the first intermediate layer 144 formed on the support substrate 102, and thus on the trap rich layer 116, the first layer 144 is a first silicon oxynitride SiO x N y The layer 144 is deposited in step IIIa) such that the amount of variable composition qt2 of the layer 144 varies along the thickness of the first layer 144, and qt2(0) is at least 0.4 at the interface 146 with the trap rich layer 116 of the supporting substrate 102.

[0082]

[0088] The first layer 144 is a first silicon oxynitride SiO x N y The layer 144 is deposited such that its volume qt2 varies decreasingly along the thickness of the first intermediate layer 144 .

[0083]

[0089] At the free surface 148 of the first intermediate layer 144, the quantity qt2 is set to the same value as that of the layer contacted in step VII), in this case for example qt2(e2)=0.2.

[0084]

[0090] Regarding the second intermediate layer 150 formed on the piezoelectric substrate 128, the second layer 150 is formed by depositing a second silicon oxynitride SiO x N y The layer 150 is deposited such that the amount of variable composition qt3 varies along the thickness of the second layer 150, and qt3 (e3=0) is zero at the interface 152 of the second layer 150 with the dielectric layer 110.

[0085]

[0091] The second layer 150 is a second silicon oxynitride SiO x N y The layer 150 is deposited such that its volume qt3 varies incrementally along the thickness e3 of the intermediate layer 150.

[0086]

[0092] At the free surface 154 of the second intermediate layer 150, the quantity qt3 is the same as the quantity qt2 at the free surface 148 of the first intermediate layer 144. Thus, in this case, qt3(e3)=0.2.

[0087]

[0093] Thus, in the bonding step VI), the first intermediate layer 144 of the support substrate 102 is brought into contact with the second intermediate layer 150 of the piezoelectric substrate 128 .

[0088]

[0094] As with the other processes described in connection with FIGS. 5a and 5b, the acoustic impedance varies across the first and second intermediate layers 144 and 150 between a value in the trap rich layer 116 and a value in the dielectric layer 110.

[0089]

[0095] The assembly 156 is created by molecular adhesion between the two substrates 102 and 128 at the interface 158 between the first intermediate layer 144 and the second intermediate layer 150. The assembly 156 therefore has essentially the same material at the interface, in this case silicon oxynitride SiO 2 with qt=0.2. x N y The layer is created by molecular adhesion between the two intermediate layers 144 and 150. This improves the bond between the substrates 102 and 128.

[0090]

[0096] All other process steps in this variant are the same as those of the process according to the second embodiment described in FIG. 5a to obtain a (POI) substrate 200.

[0091]

[0097] The process according to the second embodiment may also be used to fabricate a piezoelectric-on-insulator (POI) substrate 100 according to FIG. 1 without the presence of a trap rich layer 116 on the supporting substrate 102.

[0092]

[0098] It should be noted that the described embodiments are merely possible configurations, and that individual features of the different embodiments may be combined with one another or provided independently of one another.

Claims

1. a support substrate (102) having a first acoustic impedance; a piezoelectric layer (104), in particular a layer of lithium tantalate (LTO), lithium niobate (LNO), aluminum nitride (AlN), lead zirconate titanate (PZT), langasite or langatate; a dielectric layer (110) having a second acoustic impedance and sandwiched between the piezoelectric layer (104) and the support substrate (102); an intermediate layer (106) positioned between the support substrate (102) and the dielectric layer (110); A piezoelectric-on-insulator (POI) substrate (100, 200) comprising: the intermediate layer (106) is a layer having a variable composition, more particularly a variable composition such that the acoustic impedance of the intermediate layer (106) varies particularly gradually between the first acoustic impedance value and the second acoustic impedance value along the thickness of the intermediate layer (106), Piezoelectric-on-insulator (POI) substrate (100, 200).

2. The support substrate (102) is a silicon-based substrate, the dielectric layer (110) is a layer of silicon oxide, and the intermediate layer (106) is a silicon oxynitride SiO 2 layer having a variable oxygen and / or nitrogen composition. ｘ N ｙ 2. The piezoelectric-on-insulator (POI) substrate (100, 200) of claim 1, wherein the layer is:

3. 3. The piezoelectric-on-insulator (POI) substrate (100, 200) of claim 1 or 2, wherein the change in the composition of the intermediate layer (106) is a gradual linear change or a step change.

4. The silicon oxynitride SiO ｘ N ｙ The intermediate silicon oxynitride SiO of the variable composition amount qt of the layer (106) ｘ N ｙ The variable composition of the layer (106) is defined by qt=y / (y+x), and the intermediate silicon oxynitride SiO ｘ N ｙ 3. The piezoelectric-on-insulator (POI) substrate (100, 200) of claim 1 or 2, wherein qt varies along the thickness of the layer (106), more specifically, qt is 0 at the interface (112) with the dielectric layer (110) and qt is at least 0.4 at the interface (108) with the support substrate (102).

5. 5. The piezoelectric-on-insulator (POI) substrate (100, 200) of claim 4, wherein the quantity qt at the interface (108) with the support substrate (102) is equal to about 0.5 for a support substrate (102) of the type in which Si has a (100) orientation, qt is equal to about 0.68 for a support substrate (102) of the type in which Si has a (110) orientation, and qt is equal to about 0.7 for a support substrate (102) of the type in which Si has a (111) orientation.

6. The silicon oxynitride SiO ｘ N ｙ 5. The piezoelectric-on-insulator (POI) substrate (100, 200) of claim 4, wherein the quantity qt of the layer (106) varies in an increasing manner, in particular in a stepwise or linear manner, between the interface (112) of the piezoelectric layer (104) with the dielectric layer (110) and the interface (108) with the support substrate (102).

7. The piezoelectric-on-insulator (POI) substrate (100, 200) according to claim 1 or 2, further comprising a trapping layer (116), in particular a polycrystalline silicon-based layer, on said support substrate (102).

8. providing a support substrate, in particular a silicon-based substrate, having a first acoustic impedance; Providing a piezoelectric substrate, in particular a lithium tantalate (LTO), lithium niobate (LNO), aluminum nitride (AlN), lead zirconate titanate (PZT), langasite or langatate substrate; forming a dielectric layer, particularly a silicon oxide layer, having a second acoustic impedance on the piezoelectric substrate; On the free surface of the support substrate, an intermediate layer, in particular silicon oxynitride SiO ｘ N ｙ forming a layer based on , wherein the intermediate layer has a variable composition, more particularly a variable composition such that along a thickness e of the intermediate layer the acoustic impedance of the intermediate layer varies particularly gradually between the value of the first acoustic impedance and the value of the second acoustic impedance; bonding the piezoelectric substrate having the dielectric layer to the support substrate having the intermediate layer; 3. A process for manufacturing a piezoelectric-on-insulator (POI) substrate according to claim 1 or 2, comprising:

9. 9. The process for manufacturing a piezoelectric-on-insulator (POI) substrate according to claim 8, wherein the bonding between the piezoelectric substrate and the support substrate is achieved between the intermediate layer and the dielectric layer.

10. 9. The process for manufacturing a piezoelectric-on-insulator (POI) substrate according to claim 8, further comprising the step of forming a dielectric layer on the intermediate layer of the support substrate before the bonding step, and then bonding is achieved between the dielectric layer of the support substrate and the dielectric layer of the piezoelectric substrate.

11. The step of forming the intermediate layer on the support substrate comprises forming a silicon oxynitride film on the support substrate. ｘ N ｙ forming a layer based on qt １ = y / (y + x) ｘ N ｙ The amount of nitrogen relative to oxygen in the silicon oxynitride SiO ｘ N ｙ Layer thickness e １ More specifically, qt １ is 0 at the interface with the dielectric layer, and qt １ 9. The process for manufacturing a piezoelectric-on-insulator (POI) substrate of claim 8, wherein is at least 0.4 at the interface with the support substrate.

12. The step of forming the intermediate layer on the support substrate comprises forming a silicon oxynitride film on the support substrate. ｘ N ｙ forming a layer based on qt ２ = y / (y + x) ｘ N ｙ Layer amount qt ２ However, the silicon oxynitride SiO ｘ N ｙ Layer thickness e ２ More specifically, qt ２ is at least 0.4 at the interface with the supporting substrate, The process includes forming a SiO 2 layer on the dielectric layer of the piezoelectric substrate before the bonding step. ｘ N ｙ The method further includes forming a layer of SiO. ｘ N ｙ The layer is ｘ N ｙ Layer thickness e ３ qt changes along ３ = y / (y + x) ｘ N ｙ Layer amount qt ３ More specifically, at the interface between the piezoelectric substrate and the dielectric layer, ３ = 0, The bonding is then performed on the SiO ｘ N ｙ the SiO layer and the piezoelectric substrate ｘ N ｙ This is achieved between the layers, and qt ２ The SiO of the piezoelectric substrate ｘ N ｙ the SiO layer and the support substrate ｘ N ｙ At the interface between the layers, qt ３ is equal to, A process for manufacturing the piezoelectric-on-insulator (POI) substrate of claim 8.

13. The process for manufacturing a Piezoelectric-on-Insulator (POI) substrate according to claim 8, further comprising the step of forming a trapping layer, in particular a polycrystalline silicon based layer, on said support substrate.

14. 9. The process for manufacturing a piezoelectric-on-insulator (POI) substrate as claimed in claim 8, wherein said forming step of said intermediate layer is performed by radio frequency sputtering in a mixed atmosphere of oxygen and nitrogen.

15. A surface acoustic wave device (SAW) comprising a piezoelectric-on-insulator substrate (100, 200) according to claim 1 or 2.

Images