Systems, methods and programs for frequency dependent coefficient coding
By selecting the frequency-dependent transform coefficient subset in the video data and predicting the coefficient code, the problem of inefficient video encoding in the prior art is solved, and more efficient video encoding and optimized encoding quality is achieved.
Patent Information
- Application Number
- JP2024513195
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-03-14
- Filing Date
- 2023-03-15
- Publication Date
- 2025-04-15
AI Technical Summary
When existing video encoding technology processes transform coefficients, it is difficult to efficiently encode frequency-dependent coefficient codes, resulting in low encoding efficiency.
By obtaining the transformation coefficients in the video data, selecting a subset of the transformation coefficients based on the frequency, and predicting the coefficient code based on the context information, reconstructing the video block.
Improves the efficiency of video encoding, reduces calculation costs and processing time, and optimizes encoding quality.
Smart Images

Figure 2025510440000001_ABST
Abstract
Description
[Technical field]
[0001] Related Applications This application claims priority to U.S. Provisional Patent Application No. 63 / 327,213, entitled "FREQUENCY-DEPENDENT COEFFICIENT SIGN ENCODING," filed April 4, 2023, and is a continuation of and claims priority to U.S. Provisional Patent Application No. 18 / 121,422, entitled "SYSTEM AND METHOD FOR FREQUENCY-DEPENDENT COEFFICIENT SIGN ENCODING," filed March 14, 2023, all of which are incorporated herein by reference in their entireties.
[0002] Technical Field The disclosed embodiments relate generally to video encoding, including, but not limited to, systems and methods for coefficient code encoding for transform coefficients. [Background technology]
[0003] Digital video is supported by a variety of electronic devices, such as digital televisions, laptop or desktop computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smartphones, video teleconferencing devices, video streaming devices, etc. The electronic devices transmit, receive, or otherwise communicate digital video data over communication networks and / or store the digital video data in storage devices. Due to the limited bandwidth capacity of communication networks and the limited memory resources of storage devices, video encoding may be used to compress the video data according to one or more video encoding standards before it is communicated or stored.
[0004] Several video codec standards have been developed. For example, video coding standards include AOMedia Video 1 (AV1), Versatile Video Coding (VVC), Joint Exploration Experimental Model (JEM), High Efficiency Video Coding (HEVC / H.265), Advanced Video Coding (AVC / H.264), and Moving Picture Experts Group (MPEG) Coding. Video coding generally uses prediction methods (e.g., inter-prediction, intra-prediction, etc.) that exploit the redundancy inherent in the video data. Video coding aims to compress the video data into a form that uses a lower bitrate while avoiding or minimizing degradation of the video quality.
[0005] HEVC, also known as H.265, is a video compression standard designed as part of the MPEG-H project. ITU-T and ISO / IEC published the HEVC / H.265 standard in 2013 (version 1), 2014 (version 2), 2015 (version 3), and 2016 (version 4). Versatile Video Coding (VVC), also known as H.266, is a video compression standard intended as a successor to HEVC. ITU-T and ISO / IEC published the VVC / H.266 standard in 2020 (version 1) and 2022 (version 2). AV1 is an open video coding format designed as a replacement for HEVC. Validated version 1.0.0 with errata 1 to the specification was released on January 8, 2019. Summary of the Invention [Problem to be solved by the invention]
[0006] As mentioned above, video codec techniques include intra-coding. In intra-coding, sample values are represented without reference to samples or other data from a previously reconstructed reference picture. In some cases, a picture is spatially subdivided into blocks of samples. When all blocks of samples are coded in intra mode, the picture may be an intra picture. Intra pictures and their derivatives, such as independent decoder refresh pictures, may be used to reset the decoder state and therefore may be used as the first picture in a coded video bitstream and video session or as a still image. Samples of an intra block may be subjected to a transform and the transform coefficients may be quantized prior to entropy coding. Intra prediction may reduce / minimize sample values in the pre-transform domain. In some cases, the smaller the DC value after the transform and the smaller the AC coefficients, the fewer bits are required at a given quantization step size to represent the block after entropy coding. [Means for solving the problem]
[0007] According to some embodiments, a method of video encoding is provided, the method including: (i) obtaining video data including a plurality of blocks including a first block; (ii) determining a plurality of transform coefficients associated with the first block; (iii) selecting a subset of the plurality of transform coefficients based on a frequency corresponding to each transform coefficient of the plurality of transform coefficients; (iv) predicting respective coefficient signs for the selected subset of transform coefficients associated with the first block based on respective context information; and (v) reconstructing the first block based on the plurality of transform coefficients and the predicted respective coefficient signs.
[0008] According to some embodiments, a computing system, such as a streaming system, a server system, a personal computer system, or other electronic device, is provided. The computing system includes control circuitry and a memory that stores one or more instruction sets. The one or more instruction sets include instructions for performing any of the methods described herein. In some embodiments, the computing system includes an encoder component and / or a decoder component.
[0009] According to some embodiments, a non-transitory computer-readable storage medium is provided that stores one or more sets of instructions for execution by a computing system, the one or more sets of instructions including instructions for performing any of the methods described herein.
[0010] Thus, disclosed are devices and systems with methods for encoding video. Such methods, devices and systems may complement or replace conventional methods, devices and systems for video encoding.
[0011] The features and advantages described herein are not necessarily all-inclusive. Some additional features and advantages will become apparent to those skilled in the art, particularly in light of the drawings, specification, and claims provided in this disclosure. Furthermore, it should be noted that the language used herein has been selected primarily for ease of reading and educational purposes, and not necessarily to define or limit the subject matter described herein. [Brief description of the drawings]
[0012] So that the present disclosure can be understood in more detail, a more particular description can be had by reference to the features of the various embodiments, some of which are illustrated in the accompanying drawings, which, however, merely illustrate the relevant features of the present disclosure and should not therefore be considered as necessarily limiting, as the description may acknowledge other useful features as those skilled in the art would understand upon reading the present disclosure.
[0013] [Figure 1] 1 is a block diagram illustrating an example communication system in accordance with some embodiments.
[0014] [Figure 2A] A block diagram illustrating example elements of an encoder component according to some embodiments.
[0015] [Figure 2B] A block diagram illustrating example elements of a decoder component according to some embodiments.
[0016] [Diagram 3] FIG. 1 is a block diagram illustrating an exemplary server system according to some embodiments.
[0017] [Figure 4] 5A-5D show exemplary coding tree structures according to some embodiments.
[0018] [Figure 5A] 1 illustrates an exemplary line graph transformation (LGF) in accordance with some embodiments.
[0019] [Figure 5B] 4 illustrates an example pixel location within a transform block and adjacent rows and columns according to some embodiments.
[0020] [Figure 5C]4 illustrates an example scan order and example low frequency pixels within a transform block in accordance with some embodiments.
[0021] [Figure 6] 1 is a flow diagram illustrating an example method for encoding video, according to some embodiments.
[0022] According to common practice, the various features illustrated in the drawings are not necessarily drawn to scale and like reference numerals may be used to refer to like features throughout the specification and drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] This disclosure describes, among other things, predicting coefficient signs during encoding of transform blocks. For example, certain coefficients are identified (e.g., based on frequency and / or magnitude) for sign prediction. The identified coefficients may be selected based on potential prediction accuracy. Performing sign prediction only on selected coefficients reduces computational cost and / or processing time.
[0024] Exemplary Systems and Devices 1 is a block diagram illustrating a communication system 100 according to some embodiments. Communication system 100 includes a source device 102 and multiple electronic devices 120 (e.g., electronic devices 120-1 through 120-m) communicatively coupled to each other via one or more networks. In some embodiments, communication system 100 is a streaming system for use with video-enabled applications, such as, for example, video conferencing applications, digital TV applications, and media storage and / or distribution applications.
[0025] The source device 102 includes a video source 104 (e.g., a camera component or media storage) and an encoder component 106. In some embodiments, the video source 104 is a digital camera (e.g., configured to create an uncompressed video sample stream). The encoder component 106 generates one or more encoded video bitstreams from the video stream. The video stream from the video source 104 may be of a high data volume compared to the encoded video bitstream 108 generated by the encoder component 106. Because the encoded video bitstream 108 is of a lower data volume (less data) compared to the video stream from the video source, the encoded video bitstream 108 requires less bandwidth to transmit and less storage space to store compared to the video stream from the video source 104. In some embodiments, the source device 102 does not include the encoder component 106 (e.g., configured to transmit uncompressed video data to the network(s) 110).
[0026] The one or more networks 110 represent any number of networks that carry information between the source device 102, the server system 112, and / or the electronic device 120, including, for example, wireline and / or wireless communication networks. The one or more networks 110 may exchange data over circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet.
[0027] The one or more networks 110 include a server system 112 (e.g., a distributed / cloud computing system). In some embodiments, the server system 112 is or includes a streaming server (e.g., configured to store and / or distribute video content, such as an encoded video stream from the source device 102). The server system 112 includes a coder component 114 (e.g., configured to encode and / or decode video data). In some embodiments, the coder component 114 includes an encoder component and / or a decoder component. In various embodiments, the coder component 114 is instantiated as hardware, software, or a combination thereof. In some embodiments, the coder component 114 is configured to decode the encoded video bitstream 108 and re-encode the video data using a different encoding standard and / or methodology to generate the encoded video data 116. In some embodiments, the server system 112 is configured to generate multiple video formats and / or encodings from the encoded video bitstream 108.
[0028] In some embodiments, server system 112 functions as a Media-Aware Network Element (MANE). For example, server system 112 may be configured to prune encoded video bitstream 108 to tailor potentially different bitstreams to one or more of electronic devices 120. In some embodiments, a MANE is provided separate from server system 112.
[0029] Electronic device 120-1 includes a decoder component 122 and a display 124. In some embodiments, decoder component 122 is configured to decode encoded video data 116 to generate an outgoing video stream that can be rendered on a display or other type of rendering device. In some embodiments, one or more of electronic devices 120 do not include a display component (e.g., are communicatively coupled to an external display device and / or include media storage). In some embodiments, electronic device 120 is a streaming client. In some embodiments, electronic device 120 is configured to access server system 112 to obtain encoded video data 116.
[0030] The source device and / or the plurality of electronic devices 120 are sometimes referred to as “terminal devices” or “user devices.” In some embodiments, the source device 102 and / or one or more of the electronic devices 120 are instances of a server system, a personal computer, a portable device (e.g., a smartphone, tablet, or laptop), a wearable device, a videoconferencing device, and / or other types of electronic devices.
[0031] In an exemplary operation of the communication system 100, the source device 102 transmits an encoded video bitstream 108 to the server system 112. For example, the source device 102 may encode a stream of pictures captured by the source device. The server system 112 may receive the encoded video bitstream 108 and decode and / or encode the encoded video bitstream 108 using a coder component 114. For example, the server system 112 may apply a more optimal encoding to the video data for network transmission and / or storage. The server system 112 may transmit the encoded video data 116 (e.g., one or more encoded video bitstreams) to one or more of the electronic devices 120. Each electronic device 120 may decode the encoded video data 116 to recover, and optionally display, the video pictures.
[0032] In some embodiments, the transmission discussed above is a one-way data transmission. One-way data transmission may be utilized in media serving applications, etc. In some embodiments, the transmission discussed above is a two-way data transmission. Two-way data transmission may be utilized in video conferencing applications, etc. In some embodiments, the encoded video bitstream 108 and / or the encoded video data 116 are encoded and / or decoded according to any of the video encoding / compression standards described herein, such as HEVC, VVC, and / or AV1.
[0033] FIG. 2A is a block diagram illustrating exemplary elements of the encoder component 106 according to some embodiments. The encoder component 106 receives a source video sequence from a video source 104. In some embodiments, the encoder component includes a receiver (e.g., a transceiver) component configured to receive the source video sequence. In some embodiments, the encoder component 106 receives a video sequence from a remote video source (e.g., a video source that is a component of a device different from the encoder component 106). The video source 104 may provide the source video sequence in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, or 12-bit), any color space (e.g., BT.601 Y CrCb, or RGB), and any suitable sampling structure (e.g., YCrCb 4:2:0 or YCrCb 4:4:4). In some embodiments, the video source 104 is a storage device that stores previously captured / prepared video. In some embodiments, the video source 104 is a camera that captures local image information as a video sequence. The video data may be provided as a number of individual pictures that, when viewed sequentially, give the appearance of motion. The pictures themselves may be organized as a spatial array of pixels, each of which may contain one or more samples depending on the sampling structure, color space, etc. used. Those skilled in the art can readily appreciate the relationship between pixels and samples. The following discussion focuses on samples.
[0034] The encoder component 106 is configured to encode and / or compress pictures of a source video sequence into an encoded video sequence 216 in real-time or under other time constraints required by an application. Enforcing an appropriate encoding rate is one function of the controller 204. In some embodiments, the controller 204 controls and is operatively coupled to other functional units, as described below. Parameters set by the controller 204 may include rate control related parameters (e.g., picture skip, quantizer, and / or lambda values for rate-distortion optimization techniques), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. One skilled in the art can readily identify other functions of the controller 204 as they may be relevant to the encoder component 106 being optimized for certain system designs.
[0035] In some embodiments, the encoder component 106 is configured to operate in an encoding loop. In a simplified example, the encoding loop includes a source coder 202 (responsible for creating symbols, such as a symbol stream, based on an input picture to be encoded and a reference picture(s)) and a (local) decoder 210. The decoder 210 reconstructs the symbols to create sample data in a manner similar to a (remote) decoder (when the compression between the symbols and the encoded video bitstream is lossless). The reconstructed sample stream (sample data) is input to a reference picture memory 208. Since the decoding of the symbol stream produces bit-wise accurate results that are independent of the location of the decoder (local or remote), the contents of the reference picture memory 208 are also bit-wise accurate between the local and remote encoders. In this way, the predictive part of the encoder interprets the same sample values as reference picture samples as the decoder interprets when using predictions during decoding. This principle of reference picture synchronization (and the resulting drift if synchronization cannot be maintained, for example due to channel errors) is known to those skilled in the art.
[0036] The operation of the decoder 210 may be the same as that of a remote decoder, such as the decoder component 122, described in detail below in connection with Figure 2B. However, referring briefly to Figure 2B, because symbols are available and the encoding / decoding of the symbols into the encoded video sequence by the entropy encoder 214 and parser 254 may be lossless, the entropy decoding portion of the decoder component 122, including the buffer memory 252 and parser 254, may not be fully implemented in the local decoder 210.
[0037] An observation that can be made at this point is that any decoder technique, except for parsing / entropy decoding, that is present in the decoder necessarily needs to be present in a corresponding encoder in substantially the same functional form. For this reason, the disclosed subject matter focuses on the decoder operation. A description of the encoder techniques may be omitted, since they are the inverse of the decoder techniques that are described generically. Only in certain areas is more detailed description required, and is provided below.
[0038] As part of its operation, the source coder 202 may perform motion compensated predictive coding, which predictively codes an input frame with reference to one or more previously coded frames from the video sequence designated as reference frames. In this manner, the coding engine 212 codes differences between pixel blocks of the input frame and pixel blocks of reference frame(s) that may be selected as prediction reference(s) for the input frame. The controller 204 may manage the coding operations of the source coder 202, including, for example, setting parameters and subgroup parameters used to encode the video data.
[0039] The decoder 210 decodes the encoded video data of frames that may be designated as reference frames based on symbols created by the source coder 202. The operation of the encoding engine 212 may advantageously be a lossy process. When the encoded video data is decoded in a video decoder (not shown in FIG. 2A), the reconstructed video sequence may be a replica of the source video sequence with some errors. The decoder 210 may replicate the decoding process that may be performed by a remote video decoder on the reference frames and store the reconstructed reference frames in the reference picture memory 208. In this way, the encoder component 106 locally stores copies of reconstructed reference frames that have common content with the reconstructed reference frames that would be obtained by the remote video decoder (in the absence of transmission errors).
[0040] The predictor 206 may perform a prediction search for the coding engine 212. That is, for a new frame to be coded, the predictor 206 may search the reference picture memory 208 for sample data (as candidate reference pixel blocks) or certain metadata such as reference picture motion vectors, block shapes, etc., that can serve as a suitable prediction reference for the new picture. The predictor 206 may operate on a sample block / pixel block basis to find a suitable prediction reference. In some cases, as determined by the search results obtained by the predictor 206, the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory 208.
[0041] The output of all the aforementioned functional units may be entropy coded in an entropy coder 214. The entropy coder 214 converts the symbols produced by the various functional units into an encoded video sequence by losslessly compressing the symbols according to techniques known to those skilled in the art (e.g., Huffman coding, variable length coding, and / or arithmetic coding).
[0042] In some embodiments, the output of the entropy coder 214 is coupled to a transmitter. The transmitter may be configured to buffer the coded video sequences created by the entropy coder 214 and prepare them for transmission over a communication channel 218, which may be a hardware / software link to a storage device that will store the encoded video data. The transmitter may be configured to merge the coded video data from the source coder 202 with other data to be transmitted, e.g., coded audio data and / or auxiliary data streams (sources not shown). In some embodiments, the transmitter may transmit additional data along with the encoded video. The source coder 202 may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, Supplemental Enhancement Information (SEI) messages, Visual Usability Information (VUI) parameter set fragments, etc.
[0043] The controller 204 may manage the operation of the encoder component 106. During encoding, the controller 204 may assign to each encoded picture a type of encoding picture that may affect the encoding technique applied to the respective picture. For example, a picture may be assigned as an intra picture (I picture), a predictive picture (P picture), or a bidirectionally predictive picture (B picture). An intra picture may be encoded and decoded without using other frames in the sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, Independent Decoder Refresh (IDR) pictures. Those skilled in the art will recognize these variations of I pictures, as well as their respective uses and characteristics, and therefore they will not be repeated here. A predictive picture may be encoded and decoded using intra prediction or inter prediction, which uses at most one motion vector and reference index to predict sample values of each block. A bidirectionally predictive picture may be encoded and decoded using intra prediction or inter prediction, which uses at most two motion vectors and reference indexes to predict sample values of each block. Similarly, a multi-predictive picture can use more than two reference pictures and associated metadata for the reconstruction of a single block.
[0044] A source picture is typically spatially subdivided into multiple sample blocks (e.g., blocks of 4×4, 8×8, 4×8, or 16×16 samples each) and may be coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks as determined by a coding assignment applied to the respective picture of the block. For example, blocks of an I picture may be non-predictively coded or predictively coded with reference to already coded blocks of the same picture (spatial or intra prediction). Pixel blocks of a P picture may be coded non-predictively, via spatial prediction, or via temporal prediction with reference to one previously coded reference picture. Blocks of a B picture may be coded non-predictively, via spatial prediction, or via temporal prediction with reference to one or two previously coded reference pictures.
[0045] A video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation in a given picture, while inter-picture prediction exploits correlation (temporal or other) between pictures. In one example, a particular picture being encoded / decoded, called the current picture, is partitioned into blocks. When a block in the current picture resembles a reference block in a previously coded, yet buffered, reference picture in the video, the block in the current picture may be coded by a vector called a motion vector. A motion vector points to a reference block in the reference picture and may have a third dimension that identifies the reference picture if multiple reference pictures are used.
[0046] The encoder component 106 may perform encoding operations according to a given video encoding technique or standard, such as any of those described herein. In so doing, the encoder component 106 may perform various compression operations, including predictive encoding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the encoded video data may conform to a syntax specified by the video encoding technique or standard being used.
[0047] 2B is a block diagram illustrating example elements of the decoder component 122, according to some embodiments. The decoder component 122 of FIG. 2B is coupled to the channel 218 and the display 124. In some embodiments, the decoder component 122 includes a transmitter coupled to a loop filter unit 256 and configured to transmit data to the display 124 (e.g., via a wired or wireless connection).
[0048] In some embodiments, the decoder component 122 includes a receiver coupled to the channel 218 and configured to receive data from the channel 218 (e.g., via a wired or wireless connection). The receiver may be configured to receive one or more encoded video sequences to be decoded by the decoder component 122. In some embodiments, the decoding of each encoded video sequence is independent of the other encoded video sequences. Each encoded video sequence may be received from the channel 218, which may be a hardware / software link to a storage device that stores the encoded video data. The receiver may receive the encoded video data along with other data, e.g., encoded audio data and / or auxiliary data streams, which may be forwarded to a respective using entity (not shown). The receiver may separate the encoded video sequence from the other data. In some embodiments, the receiver receives additional (redundant) data along with the encoded video. The additional data may be included as part of the encoded video sequence(s). The additional data may be used by the decoder component 122 to decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or SNR enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.
[0049] According to some embodiments, the decoder component 122 includes a buffer memory 252, a parser 254 (sometimes referred to as an entropy decoder), a scaler / inverse transform unit 258, an intra picture prediction unit 262, a motion compensated prediction unit 260, an aggregator 268, a loop filter unit 256, a reference picture memory 266, and a current picture memory 264. In some embodiments, the decoder component 122 is implemented as an integrated circuit, a series of integrated circuits, and / or other electronic circuitry. In some embodiments, the decoder component 122 is implemented at least partially in software.
[0050] The buffer memory 252 is coupled between the channel 218 and the parser 254 (e.g., to address network jitter). In some embodiments, the buffer memory 252 is separate from the decoder component 122. In some embodiments, a separate buffer memory is provided between the output of the channel 218 and the decoder component 122. In some embodiments, in addition to the buffer memory 252 in the decoder component 122 (e.g., configured to handle playout timing), a separate buffer memory is provided external to the decoder component 122 (e.g., to address network jitter). When receiving data from a storage / forwarding device with sufficient bandwidth and controllability or from an isochronous network, the buffer memory 252 may not be needed or may be small. For use over a best-effort packet network such as the Internet, the buffer memory 252 may be needed, may be relatively large, may be advantageously of an adaptive size, and may be implemented at least in part in an operating system or similar element (not shown) external to the decoder component 122.
[0051] The parser 254 is configured to reconstruct symbols 270 from the coded video sequence. The symbols may include, for example, information used to manage the operation of the decoder component 122 and / or information for controlling a rendering device, such as the display 124. The control information for the rendering device may be in the form of, for example, a Supplemental Enhancement Information (SEI) message or a Video Usability Information (VUI) parameter set fragment (not shown). The parser 254 parses (entropy decodes) the coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow principles well known to those skilled in the art, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser 254 may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups may include groups of pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. Parser 254 may also extract information from the coded video sequence, such as transform coefficients, quantizer parameter values, motion vectors, etc.
[0052] The reconstruction of symbols 270 may involve a number of different units, depending on the type of coded video picture or portion thereof (inter-picture and intra-picture, inter-block and intra-block, etc.), and other factors. Which units are involved and how they are involved may be controlled by subgroup control information parsed from the coded video sequence by parser 254. The flow of such subgroup control information between parser 254 and the following units is not shown for clarity.
[0053] In addition to the functional blocks already mentioned, the decoder component 122 can be conceptually subdivided into a number of functional units, as described below. In a practical implementation operating under commercial constraints, many of these units will interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the conceptual subdivision into the following functional units will be maintained:
[0054] The scalar / inverse transform unit 258 receives the quantized transform coefficients as well as control information (such as which transform to use, block size, quantization factor, and / or quantization scaling matrix) from the parser 254 as symbol(s) 270. The scalar / inverse transform unit 258 may output blocks containing sample values that may be input to an aggregator 268.
[0055] In some cases, the output samples of the scalar / inverse transform unit 258 relate to intra-coded blocks, i.e. blocks that do not use prediction information from a previously reconstructed picture, but may use prediction information from a previously reconstructed part of the current picture. Such prediction information may be provided by an intra picture prediction unit 262, which may generate a block of the same size and shape as the block being reconstructed using surrounding already reconstructed information retrieved from the current (partially reconstructed) picture from the current picture memory 264. The aggregator 268 may add, on a sample-by-sample basis, the prediction information generated by the intra picture prediction unit 262 to the output sample information provided by the scalar / inverse transform unit 258.
[0056] In other cases, the output samples of the scalar / inverse transform unit 258 relate to an inter-coded, potentially motion-compensated block. In such cases, the motion compensated prediction unit 260 may access the reference picture memory 266 to fetch samples used for prediction. After motion compensating the fetched samples according to the symbols 270 for that block, these samples may be added by the aggregator 268 to the output of the scalar / inverse transform unit 258 (in this case referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference picture memory 266 from which the motion compensated prediction unit 260 fetches the prediction samples may be controlled by a motion vector. The motion vector may be available to the motion compensated prediction unit 260 in the form of a symbol 270, which may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolation of sample values fetched from the reference picture memory 266 when sub-sample-wise accurate motion vectors are used, motion vector prediction mechanisms, etc.
[0057] The output samples of aggregator 268 may be subjected to various loop filtering techniques in loop filter unit 256. The in-loop filter techniques, which may include video compression techniques, are controlled by parameters contained in the coded video bitstream and made available to loop filter unit 256 as symbols 270 from parser 254, but may also be responsive to meta-information obtained during decoding of a previous part (in decoding order) of the coded picture or coded video sequence, or may be responsive to previously reconstructed loop filtered sample values.
[0058] The output of the loop filter unit 256 may be a sample stream that may be output to a rendering device, such as the display 124, or stored in a reference picture memory 266 for use in future inter-picture prediction.
[0059] Certain coded pictures, once fully reconstructed, may be used as reference pictures for future predictions. Once a coded picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by parser 254), the current reference picture may become part of reference picture memory 266, and a fresh current picture memory may be reallocated before beginning reconstruction of a subsequent coded picture.
[0060] The decoder component 122 may perform decoding operations according to a given video compression technique, which may be documented in a standard, such as any of the standards described herein. The coded video sequence may conform to a syntax specified by the video compression technique or standard being used, in the sense of conforming to the syntax of the video compression technique or standard, as specified in the video compression technique document or standard, particularly in a profile document therein. Also, to conform to some video compression techniques or standards, the complexity of the coded video sequence may be within a range as defined by the level of the video compression technique or standard. In some cases, the level constrains a maximum picture size, a maximum frame rate, a maximum reconstruction sample rate (e.g., measured in units of megasamples per second), a maximum reference picture size, etc. The limitations set by the level may be further constrained in some cases through a Hypothetical Reference Decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.
[0061] 3 is a block diagram illustrating a server system 112 according to some embodiments. The server system 112 includes a control circuit 302, one or more network interfaces 304, a memory 314, a user interface 306, and one or more communication buses 312 for interconnecting these components. In some embodiments, the control circuit 302 includes one or more processors (e.g., a CPU, a GPU, and / or a DPU). In some embodiments, the control circuit includes one or more field programmable gate arrays (FPGAs), hardware accelerators, and / or one or more integrated circuits (e.g., application specific integrated circuits).
[0062] The network interface 304 may be configured to interface with one or more communication networks (e.g., wireless, wireline, and / or optical networks). The communication networks may be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of communication networks include local area networks such as Ethernet, cellular networks including WLAN, GSM, 3G, 4G, 5G, LTE, etc., TV wired or wireless wide area digital networks including cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial including CANBus, etc. Such communications may be one-way, receive only (e.g., broadcast TV), one-way transmit only (e.g., CANbus to certain CANbus devices), or bidirectional (e.g., to other computer systems using local or wide area digital networks). Such communications may include communications to one or more cloud computing networks.
[0063] The user interface 306 includes one or more output devices 308 and / or one or more input devices 310. The input devices 310 may include one or more of a keyboard, a mouse, a trackpad, a touch screen, a data glove, a joystick, a microphone, a scanner, a camera, etc. The output devices 308 may include one or more of an audio output device (e.g., a speaker), a visual output device (e.g., a display or monitor), etc.
[0064] The memory 314 may include high-speed random access memory (such as DRAM, SRAM, DDR RAM, and / or other random access solid-state memory devices) and / or non-volatile memory (such as one or more magnetic storage devices, optical disk storage devices, flash memory devices, and / or other non-volatile solid-state storage devices). The memory 314 optionally includes one or more storage devices located remotely from the control circuitry 302. The memory 314, or alternatively, the non-volatile solid-state memory devices within the memory 314, include a non-transitory computer-readable storage medium. In some embodiments, the memory 314, or the non-transitory computer-readable storage medium of the memory 314, stores the following programs, modules, instructions, and data structures, or a subset or superset thereof: • An operating system 316 that handles various basic system services and contains procedures for performing hardware-dependent tasks; ● a network communications module 318 used to connect the server system 112 to other computing devices via one or more network interfaces 304 (e.g., via wired and / or wireless connections); An encoding module 320 for performing various functions related to encoding and / or decoding data, such as video data. In some embodiments, the encoding module 320 is an instance of the coder component 114. The encoding module 320 may include, but is not limited to: o A decode module 322 for performing various functions in connection with decoding the encoded data, such as those previously described in connection with the decoder component 122; An encoding module 340 for performing various functions with respect to encoding data, such as those previously described with respect to the encoder component 106. Contains one or more of the following; ● Picture memory 352 for storing pictures and picture data, e.g., for use with encoding module 320. In some embodiments, picture memory 352 includes one or more of reference picture memory 208, buffer memory 252, current picture memory 264, and reference picture memory 266.
[0065] In some embodiments, the decode module 322 includes a parsing module 324 (e.g., configured to perform various functions previously described with respect to the parser 254), a transform module 326 (e.g., configured to perform various functions previously described with respect to the scalar / inverse transform unit 258), a prediction module 328 (e.g., configured to perform various functions previously described with respect to the motion compensated prediction unit 260 and / or the intra picture prediction unit 262), and a filter module 330 (e.g., configured to perform various functions previously described with respect to the loop filter unit 256).
[0066] In some embodiments, the encoding module 340 includes a code module 342 (e.g., configured to perform various functions previously described with respect to the source coder 202, the coding engine 212, and / or the entropy coder 214) and a prediction module 344 (e.g., configured to perform various functions previously described with respect to the predictor 206). In some embodiments, the decoding module 322 and / or the encoding module 340 include a subset of the modules shown in FIG. 3. For example, a shared prediction module is used by both the decoding module 322 and the encoding module 340.
[0067] Each of the above identified modules stored in memory 314 corresponds to a set of instructions for performing functions described herein. The above identified modules (e.g., sets of instructions) need not be implemented as separate software programs, procedures, or modules, and thus various subsets of these modules may be combined or otherwise rearranged in various embodiments. For example, encoding module 320 optionally does not include separate decode and encode modules, but rather uses the same set of modules to perform both sets of functions. In some embodiments, memory 314 stores a subset of the above identified modules and data structures. In some embodiments, memory 314 stores additional modules and data structures not described above, such as an audio processing module.
[0068] In some embodiments, the server system 112 includes a web or HyperText Transfer Protocol (HTTP) server, a File Transfer Protocol (FTP) server, as well as web pages and applications implemented using Common Gateway Interface (CGI) scripts, PHP HyperText Preprocessor (PHP), Active Server Pages (ASP), HyperText Markup Language (HTML), Extensible Markup Language (XML), Java, JavaScript, Asynchronous JavaScript and XML (AJAX), XHP, Javelin, Wireless Universal Resource Files (WURFL), or the like.
[0069] Although FIG. 3 illustrates a server system 112 according to some embodiments, FIG. 3 is not intended as a structural schematic diagram of the embodiments described herein, but rather as a functional description of various features that may be present in one or more server systems. In practice, items shown separately may be combined and some items may be separated, as will be recognized by those skilled in the art. For example, some items shown separately in FIG. 3 may be implemented on a single server, and a single item may be implemented by one or more servers. The actual number of servers used to implement server system 112, and how functionality is allocated among them, will vary from implementation to implementation and will optionally depend in part on the amount of data traffic the server system handles during peak usage periods as well as during average usage periods.
[0070] Examples of encoding techniques 4A-4D show exemplary coding tree structures according to some embodiments. As shown in the first coding tree structure (400) in FIG. 4A, some coding techniques (e.g., V9) use a 4-way partition tree starting from the 64×64 level down to the 4×4 level, with some additional restrictions for blocks 8×8. In FIG. 4A, the partition designated as R may be called recursive in that the same partition tree is repeated at lower scales until the lowest 4×4 level is reached.
[0071] As shown in the second coding tree structure (402) in FIG. 4B, some coding schemes (e.g., AV1) extend the partition tree to a 10-way structure and increase the maximum size (e.g., called superblock in V9 / AV1 terminology) to start from 128×128. The second coding tree structure includes a 4:1 / 1:4 rectangular partition that is not included in the first coding tree structure. The partition type with three subpartitions in the second stage in FIG. 4B is called a T-type partition. The rectangular partitions in this tree structure cannot be further subdivided. In addition to the coding block size, the coding tree depth may be defined to indicate the division depth from the root node. For example, the coding tree depth for a root node, e.g., 128×128, is set to 0, and after the tree block is further divided once, the coding tree depth is increased by 1.
[0072] As an example, instead of enforcing a fixed transform unit size as in VP9, AV1 allows luma coding blocks to be partitioned into transform units of multiple sizes that can be represented by recursive partitions up to two levels down. To incorporate AV1's expanded coding block partitions, 4x4 to 64x64 square, 2:1 / 1:2, and 4:1 / 1:4 transform sizes are supported. For chroma blocks, only the largest possible transform unit is allowed.
[0073] As an example, a CTU may be divided into CUs by using a quadtree structure, denoted as a coding tree, to accommodate various local characteristics in HEVC and the like. In some embodiments, the decision on whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction is made at the CU level. Each CU may be further divided into one, two, or four PUs according to the PU partition type. Within one PU, the same prediction process is applied and related information is sent to the decoder for each PU. After obtaining the residual block by applying the prediction process based on the PU partition type, the CU may be partitioned into TUs according to another quadtree structure, such as a coding tree for CUs. One of the important features of the HEVC structure is to have multiple partition concepts, including CUs, PUs, and TUs. In HEVC, a CU or TU can only be square in shape, while a PU can be square or rectangular in shape for inter-predicted blocks. In HEVC, one coding block may be further divided into four square sub-blocks and a transform is performed for each sub-block (TU). Each TU can be further divided recursively (using quad-tree partitioning) into smaller TUs, which are called Residual Quad-Tree (RQT). At picture boundaries such as HEVC, implicit quad-tree partitioning may be employed, whereby a block continues to be quad-tree partitioned until its size fits into the picture boundary.
[0074] A quadtree with nested multi-type trees using bisection and trisection segmentation structures such as in VVC may replace the concept of multiple partition unit types, e.g., removing the separation of CU, PU, and TU concepts except as required for CUs with sizes too large for the maximum transform length, and supporting further flexibility in CU partition shapes. In the coding tree structure, CUs can have either square or rectangular shapes. CTUs are first split by a quadtree (also called a quadtree) structure. The quadtree leaf nodes can be further split by a multi-type tree structure. As shown in the third coding tree structure (404) in FIG. 4C, the multi-type tree structure includes four split types. For example, the multi-type tree structure includes a vertical bisection split (SPLIT_BT_VER), a horizontal bisection split (SPLIT_BT_HOR), a vertical trisection split (SPLIT_TT_VER), and a horizontal trisection split (SPLIT_TT_HOR). The multi-type tree leaf nodes are called CUs, and this segmentation is used for prediction and transform processing without further division, as long as the CU is not too large for the maximum transform length. This means that in most cases, CUs, PUs, and TUs have the same block size in a quadtree with a nested multi-type tree coding block structure. An exception occurs when the maximum supported transform length is smaller than the width or height of a color component of the CU. An example of block partitioning for one CTU (406) is shown in FIG. 4D, which shows an example quadtree with a nested multi-type tree coding block structure.
[0075] As in VVC, the maximum supported luma transform size may be 64x64 and the maximum supported chroma transform size may be 32x32. When the width or height of the CB is larger than the maximum transform width or height, the CB is automatically split in the horizontal and / or vertical direction to meet the transform size limitation in that direction.
[0076] The coding tree method supports that luma and chroma can have separate block tree structures, like VTM7. In some cases, for P and B slices, the luma CTB and chroma CTB in one CTU share the same coding tree structure. However, for I slices, luma and chroma can have separate block tree structures. When the separate block tree mode is applied, the luma CTB is divided into CUs by one coding tree structure, and the chroma CTB is divided into chroma CUs by another coding tree structure. This means that a CU in an I slice may contain or consist of a coding block of the luma component or a coding block of two chroma components, and a CU in a P or B slice may always contain or consist of coding blocks of all three color components, unless the video is monochrome.
[0077] To support extended coding block partitions, multiple transform sizes (e.g., ranging from 4 points to 64 points in each dimension) and transform shapes (e.g., square or rectangular with width / height ratios of 2:1 / 1:2 and 4:1 / 1:4) may be utilized, such as in AV1.
[0078] The two-dimensional transform process may involve the use of a hybrid transform kernel (e.g., composed of a different one-dimensional transform for each dimension of the coded residual block). The primary one-dimensional transform may include at least one of a) a 4-point, 8-point, 16-point, 32-point, 64-point discrete cosine transform DCT-2, b) a 4-point, 8-point, 16-point asymmetric discrete sine transform (DST-4, DST-7) and their inverted versions, or c) a 4-point, 8-point, 16-point, 32-point identity transform. The basis functions for the DCT-2 and asymmetric DST as used in AV1 are listed in Table 1, where "→" and "↓" indicate the horizontal and vertical dimensions,
number
[0079] The availability of hybrid transform kernels may be based on the transform block size and prediction mode. Examples of dependencies are listed in Table 2 below. [Table 2]
[0080] For chroma components, the transform type selection is performed in an implicit manner. For intra-predicted residuals, the transform type is selected according to the intra-prediction mode, e.g., as specified in Table 3. For inter-predicted residuals, the transform type may be selected according to the transform type selection of the co-located luma block. Therefore, for chroma components, no transform type signaling in the bitstream is required. [Table 3]
[0081] The line graph transform (LGT) has been introduced with a view to replacing and extending the above mentioned 1D DST (by introducing 32 and 64 points).
[0082] A graph is a general mathematical structure that contains or consists of a set of vertices and edges that are used to model affinity relationships between objects of interest. Weighted graphs (where a set of weights are assigned to the edges and potentially also to the vertices) provide a sparse representation for robust modeling of signals / data. LGT can improve coding efficiency by providing better adaptation for diverse block statistics. A separable LGT is designed and optimized by learning a line graph from the data to model the underlying row- and column-wise statistics of blocks in the residual signal, and the associated generalized graph Laplacian (GGL) matrix is used to derive the LGT. Figure 5A shows the self-loop weights v c1 , v c2 , and edge weight w c 1 shows an exemplary LGT characterized by:
[0083] Given a weighted graph G(W,V), the GGL matrix may be defined as: L c =D-W+V where W is the non-negative edge weight w c where D is a diagonal degree matrix, and V is a weighted self-loop v c1 , v c2 The matrix L is a diagonal matrix that indicates c can be expressed as follows:
number
[0084] LGT can be implemented as a matrix multiplication. The 4p LGT core is c In v c1 =2w c This means that it is a DST-4. The 8p LGT core is c In v c1 =1.5w c The 16p, 32p, and 64p LGT cores can be derived by setting c In v c1 =w c which means it is DST-7.
[0085] In one example of residual coding in AV1, for each transform unit, coefficient coding starts by signaling a skip code, followed by the transform kernel type and the end of block (EOB) position (when the skip code is 0). Then, each coefficient value is mapped to multiple level maps and codes. After the EOB position is coded, the lower level map and the mid-level map can be coded in reverse scan order, the former indicating whether the absolute value of the coefficient is between 0 and 2, and the latter indicating whether the range is between 3 and 14. The next step, in forward scan order, is to code the signs of the coefficients and the residual values of coefficients greater than 14 with an Exponential-Golomb code.
[0086] For the use of context modeling in AV1, the coding of the low-level maps incorporates the transform size and direction, as well as up to five neighboring coefficient information. On the other hand, the coding of the mid-level maps follows a similar approach to that of the low-level maps, except that the number of neighboring coefficients goes down to two. The exponential-Golomb codes for the residual levels and the signs of the AC coefficients are coded without a context model, and the signs of the DC coefficients are coded using the DC codes of their neighboring transform units. A weighted average of the DC code values of the upper and left neighboring blocks is used to derive the context information (as shown in Equation 1 below). The weighting depends on the intersection length of the neighboring transform blocks with the current transform block.
number
[0087] The derived context information is used as an index to access three different contexts for coding the DC sign: sum If =0, dc ctx = 0, and dc sum If <0 then dc ctx = 1, and dc sum If >0, dc ctx = 2. The code values of the other coefficients are coded directly without using a context model.
[0088] For entropy coding of transform coefficients, the coefficient signs may be coded separately from the magnitude / level (absolute value of the coefficient value) using a bypass mode. Separate coding means that each coefficient sign takes one bit to code, which is costly. To improve the efficiency of entropy coding of the coefficient signs, sign prediction techniques may be used. For example, instead of signaling the sign value, a flag indicating whether the predicted sign is the same as the actual sign may be entropy coded using a context. The context value may depend on the level (absolute value of the coefficient value) of the coefficient, since a larger level value results in a more accurate predicted sign value.
[0089] In one example, a group of transform coefficients whose associated signs need to be predicted is identified. A set of hypotheses for predicted sign values of these coefficients is then generated. For example, for three coefficients, the number of hypotheses can be up to 8 (2^3). To predict the sign values, there is a cost value associated with each hypothesis, and the hypothesis with the smallest cost is used to specify the predicted sign values for the coefficients covered by that hypothesis.
[0090] 5B illustrates an example of a transformed block 500 and pixel locations in adjacent rows 502 and adjacent columns 504. In some embodiments, the cost for each hypothesis is calculated as follows: A reconstructed block associated with a given hypothesis (hypothesis reconstruction) is generated following a reconstruction process (e.g., dequantization, inverse transform), and the boundary samples of the reconstructed block, e.g., p 0,y and p x,0 For each reconstructed pixel p 0,y For , a simple linear prediction is performed using the two previously reconstructed neighboring pixels to the left, and the prediction, pred 0,y =(2p -1,y -p -2,y ) and the reconstructed pixel p 0,yThe absolute difference between pred and the cost of the hypothesis is added to the cost of the hypothesis. A similar process is performed for the pixels in the top row of the reconstructed block, and each prediction pred x,0 =(2p x,-1 -p x,-2 ) and the reconstructed pixel p x,0 The absolute differences between , and are then summed up. Thus, the cost calculation for each coefficient sign prediction hypothesis is given by Equation 3 below.
number
[0091] 5C illustrates an example scan order and example low-frequency pixels in a transform block 550, according to some embodiments. The transform block 550 includes 64 pixels (corresponding to 8 columns and 8 rows). In the example of FIG. 5C, a box 552 represents a low-frequency pixel of the transform block 550 (e.g., pixel P 0,0 ~P 2,2 In other examples, box 552 may have a rectangular shape and include more or fewer rows and / or columns (e.g., box 552 may include P 3,n columns and / or P n,3 FIG. 5C also illustrates an example scan order 554 (e.g., P 0,0 From P 7,7 In some embodiments, other scan orders are used.
[0092] 6 is a flow diagram illustrating a method 600 for coding video according to some embodiments. Method 600 may be performed in a computing system (e.g., server system 112, source device 102, or electronic device 120) having control circuitry and memory storing instructions for execution by the control circuitry. In some embodiments, method 600 is performed by executing instructions stored in a memory (e.g., memory 314) of the computing system.
[0093] The system obtains video data including a plurality of blocks including a first block (602). The system determines a plurality of transform coefficients associated with the first block (604). In some embodiments, the system determines a context for a predicted coefficient sign using previously encoded information (606). The system selects a subset of the plurality of transform coefficients based on a frequency corresponding to each transform coefficient of the plurality of transform coefficients (608). The system predicts respective coefficient signs for the selected subset of transform coefficients associated with the first block based on the respective context information (610). The system reconstructs the first block based on the plurality of transform coefficients and the predicted respective coefficient signs (612). In some embodiments, the system sets a flag for a set of elements of the first block (614), the flag indicating whether the predicted sign is the same as an actual sign for the element.
[0094] As used herein, the term "block" may refer to coefficients in a transform block. A block may be a luma and / or chroma block. As used herein, the term "row" may refer to a row of coefficients in a transform block. As used herein, the term "column" may refer to a column of coefficients in a transform block. As used herein, the term "DC coefficient" may refer to the top left coefficient in a transform coefficient block, or the coefficient in the top row in a transform coefficient block, or the coefficient in the left column in a transform coefficient block.
[0095] In some embodiments, to code the transform coefficients, the signs of the low frequency coefficients and selected higher frequency coefficients are predicted and / or explicitly signaled, and the predicted and / or explicit code values are context coded and different contexts are applied. In some embodiments, the low frequency coefficients are coded using the DC coefficient (e.g., pixel P 0,0), in some embodiments, the low frequency coefficients include DC and a selected set of AC coefficients. In one example, the selected set of AC coefficients include low frequency AC coefficients located in a predefined top-left area of the transform block (examples of top-left areas include, but are not limited to, 2×2, 3×3, 4×4, ...). In another example, the selected set of AC coefficients include the first N AC coefficients (example values of N include, but are not limited to, 1, 2, 3, ...) along the scan order (e.g., scan order 554).
[0096] In some embodiments, the high frequency coefficients include selected AC coefficients from outside a predefined low frequency coefficient area (examples include, but are not limited to, the top left 1×1, 2×2, 3×3, ... area) in the transform block. In one example, the selected high frequency AC coefficients include all coefficients located outside a predefined top left area of the transform block (examples of top left areas include, but are not limited to, the 1×1, 2×2, 3×3, ... area). In another example, the selected high frequency AC coefficients include the first M coefficients along the scan order (example values for M include, but are not limited to, 1, 2, 3, ...). In another example, the selected high frequency AC coefficients include the largest N coefficients (example values for N include, but are not limited to, 1, 2, 3, ...). In another example, the selected high frequency AC coefficients include the first N coefficients along the scan order that are located at a position greater than a predefined threshold.
[0097] In some embodiments, the context for coding the signs and / or predicted signs of the low frequency coefficients and the selected high frequency coefficients is designed using already coded information in the current transform block and / or neighboring transform blocks. In one example, the coded information used as the context for coding the signs / predicted signs of the low frequency coefficients includes, but is not limited to, the signs and / or absolute values of the coefficients of the spatially neighboring blocks and / or blocks specified by the motion vector(s) in the reference frame(s). In another example, the coded information used as the context for coding the signs / predicted signs of the selected high frequency coefficients includes the band, plane, block size and / or transform type of the transform block or its neighboring blocks.
[0098] In some embodiments, the signs of the low frequency coefficients and the selected high frequency coefficients are predicted using already coded information in neighboring blocks. In one example, the signs of the low frequency coefficients are predicted using the signs of the low frequency coefficients in spatially neighboring blocks and / or blocks specified by the motion vector(s) in the reference frame(s). In another example, the signs of the selected high frequency coefficients are predicted using the top A rows (exemplary values of A include, but are not limited to, 1, 2, 3, ...) and / or the left B columns (exemplary values of B include, but are not limited to, 1, 2, 3, ...) of reconstructed pixels adjacent to the transform block, and / or the top A rows and / or the left B columns in the current transform block.
[0099] In some embodiments, instead of explicitly encoding the code value, a flag is encoded indicating whether the predicted code is the same as the actual code, and code prediction may be achieved by the methods described above.
[0100] 6 depicts some logical stages in a particular order, but order-independent stages may be reordered and other stages may be combined or broken down. Some reordering or other groupings not specifically mentioned will be apparent to those of ordinary skill in the art, and thus the ordering and groupings presented herein are not exhaustive. Additionally, it should be recognized that the various stages may be implemented in hardware, firmware, software, or any combination thereof.
[0101] Reference will now be made to some exemplary embodiments. (A1) In one aspect, some embodiments include a method (e.g., method 600) of video coding. In some embodiments, the method is implemented in a computing system (e.g., server system 112) having memory and control circuitry. In some embodiments, the method is implemented in an encoding module (e.g., encoding module 320). In some embodiments, the method is implemented in an entropy encoder (e.g., entropy encoder 214). In some embodiments, the method is implemented in a parser (e.g., parser 254). The method includes (i) obtaining video data including a plurality of blocks including a first block; (ii) determining a plurality of transform coefficients associated with the first block; (iii) selecting a subset of the plurality of transform coefficients based on a frequency corresponding to each transform coefficient of the plurality of transform coefficients; (iv) predicting respective coefficient signs for the selected subset of transform coefficients associated with the first block based on respective context information; and (v) reconstructing the first block based on the plurality of transform coefficients and the predicted respective coefficient signs. For example, the plurality of blocks are transform blocks. In some embodiments, the predicted coefficient sign has the lowest cost (e.g., according to Equation 3 above). In some embodiments, the predicted coefficient sign is the one that results in smooth block boundaries.
[0102] (A2) In some embodiments of A1, the method further includes refraining from predicting respective coefficient signs for remaining ones of the plurality of transform coefficients associated with the first block.
[0103] (A3) In some embodiments of A1 or A2, the subset of the plurality of transform coefficients is selected based on one or more of a frequency-based criterion and an absolute value-based criterion, for example, elements of the set of elements having associated frequencies less than a pre-set threshold frequency.
[0104] (A4) In some embodiments of A1 or A2, the subset of the plurality of transform coefficients is selected based on an absolute value based criterion, for example, elements of a set of elements having coefficient absolute values greater than a preset threshold absolute value.
[0105] (A5) In some embodiments of any of A1-A4, the subset of the plurality of transform coefficients includes a set of low frequency elements and a set of higher frequency elements.
[0106] (A6) In some embodiments of A5, the set of low frequency components consists of a DC coefficient element. In some embodiments, the subset of the plurality of transform coefficients consists of the DC coefficient element. In some embodiments, the subset of the plurality of transform coefficients includes the DC coefficient element and one or more elements that satisfy the one or more criteria (e.g., have a coefficient absolute value greater than a pre-set threshold). In some embodiments, the set of low frequency components includes the DC coefficient element and one or more other elements proximate to the DC coefficient element.
[0107] (A7) In some embodiments of A5 or A6, the set of higher frequency elements consists of a set of P first elements along a certain scan order of the first block. For example, P is in the range of 1 to 16. In some embodiments, the set of higher frequency elements includes a set of P first elements along a certain scan order of the first block.
[0108] (A8) In some embodiments of A5 or A6, the set of higher frequency elements comprises a set of P first elements along a certain scan order of the first block and outside a predefined area of the first block. In some embodiments, the set of higher frequency elements comprises a sequence of elements starting at a predefined position in the scan order. For example, the set of higher frequency elements comprises elements 5-8 along the scan order. In some embodiments, the set of higher frequency elements includes a set of P first elements along a certain scan order of the first block and outside a predefined area of the first block.
[0109] (A9) In some embodiments of A5 or A6, the set of higher frequency elements includes the element with the largest set of P coefficients in the first block. In some embodiments, the set of higher frequency elements consists of the elements with the largest set of P coefficients in the first block. For example, the set of higher frequency elements consists of the 5 elements in the first block having the largest coefficient absolute values.
[0110] (A10) In some embodiments of A5 or A6, the set of low frequency elements corresponds to a predefined area of the first block, and the set of higher frequency elements consists of elements outside the predefined area. For example, the predefined area is an N×N area or N×M in the top left of the first block, such as a 1×1, 2×2, 2×3, 3×2, 4×3, or 3×4 area.
[0111] (A11) In some embodiments of A10, the set of higher frequency elements may be the elements along the perimeter of a predefined area (e.g., P 3,0 , P 3,1 , P 3,2 , P 3,3 , P 2,3 , P 1,3 and / or P 0,3 In some embodiments, the set of higher frequency elements includes elements along the perimeter of the predefined area.
[0112] (A12) In some embodiments of any of A1 to A11, the subset of the plurality of transform coefficients includes a DC coefficient element and one or more AC coefficient elements.
[0113] (A13) In some embodiments of A12, the one or more AC coefficient elements are located in a predefined area of the first block. In some embodiments, the predefined area is a top-left area of the first block. In some embodiments, the predefined area is an N×N area of the first block (e.g., a 2×2, 3×3, or 4×4 area). In some embodiments, the predefined area is an N×M area of the first block (e.g., a 2×3, 3×2, or 4×3 area).
[0114] (A14) In some embodiments of A12 or A13, the one or more AC coefficient elements are the lowest frequency AC elements of the first block. In some embodiments, the one or more AC coefficient elements are the lowest frequency non-zero AC elements of the first block. For example, coefficients with an absolute value of zero are excluded from the sign prediction process.
[0115] (A15) In some embodiments of any of A12 to A14, the one or more AC coefficient elements are or include a set of N first elements in a scan order of a first block. In some embodiments, N is in the range of 1 to 12.
[0116] (A16) In some embodiments of any of A1-A15, the method further includes determining a context for the predicted coefficient sign using previously coded information.
[0117] (A17) In some embodiments of A16, the previously encoded information corresponds to one or more of the first block and a neighboring block, for example, the neighboring block is a spatial neighbor of the first block or a temporal neighbor of the first block.
[0118] (A18) In some embodiments of A16 or A17, the previously encoded information corresponds to a reference frame, e.g., the previously encoded information corresponds to a block specified by a motion vector in the reference frame.
[0119] (A19) In some embodiments of any of A16 to A18, the previously coded information includes signs of the coefficients and / or absolute values of the coefficients.
[0120] (A20) In some embodiments of any of A16-A19, the previously encoded information includes one or more of a band, a plane, a block size, and a transform type.
[0121] (A21) In some embodiments of any of A1-A20, the sign of each coefficient is predicted based on block coding information.
[0122] (A22) In some embodiments of A21, the block coding information corresponds to one or more of the first block, a neighboring block, and a block specified by the motion vector, for example, the neighboring block is a spatial neighbor of the first block or a temporal neighbor of the first block.
[0123] (A23) In some embodiments of A21 or A22, the block coding information includes a sign of each of the one or more low frequency coefficients.
[0124] (A24) In some embodiments of any of A1 to A23, the sign of each coefficient is predicted based on one or more reconstructed pixels.
[0125] (A25) In some embodiments of A24, the one or more reconstructed pixels correspond to a portion of a first block or of a block adjacent to the first block, for example, the reconstructed pixels correspond to the top A rows and / or left B columns of the first block and / or the adjacent block.
[0126] (A26) In some embodiments of any of A1 to A25, the method further includes setting a flag for a set of elements of the first block, the flag indicating whether the predicted code is the same as an actual code for the element.
[0127] The methods described herein may be used separately or combined in any order. Each of the methods may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In some embodiments, the processing circuit executes a program stored on a non-transitory computer-readable medium.
[0128] In another aspect, some embodiments include a computing system (e.g., server system 112) including control circuitry (e.g., control circuitry 302) and a memory (e.g., memory 314) coupled to the control circuitry, the memory storing one or more sets of instructions configured to be executed by the control circuitry, the one or more sets of instructions including instructions for performing any of the methods described herein (e.g., A1-A26 above).
[0129] In yet another aspect, some embodiments include a non-transitory computer-readable storage medium storing one or more sets of instructions for execution by control circuitry of a computing system, the one or more sets of instructions including instructions for performing any of the methods described herein (e.g., A1-A26 above).
[0130] In this specification, terms such as "first," "second," and the like may be used to describe various elements, but it will be understood that these elements are not to be limited by these terms, but rather are used only to distinguish one element from another.
[0131] The terms used herein are merely for the purpose of describing specific embodiments and are not intended to limit the scope of the claims. Where used in the description of the embodiments and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "having" and / or "including" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0132] As used herein, the term "if..." may be interpreted to mean "when" or "upon" or "in response to determining that..." or "according to a determination that..." or "in response to detecting...", depending on the context. Similarly, the phrases "if [the stated antecedent condition is determined to be true]" or "if [the stated antecedent condition is true]" or "when [the stated antecedent condition is true]" may be interpreted to mean "upon determining" or "in response to determining" or "according to a determination that" or "upon detecting" or "in response to detecting" the stated antecedent condition is true, depending on the context.
[0133] The foregoing description has been described with reference to specific embodiments for purposes of explanation. However, the exemplary discussion above is not intended to be exhaustive or to limit the scope of the claims to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments have been selected and described in order to best explain the principles of operation and practical applications, thereby enabling others skilled in the art to practice.
Claims
1. 1. A method of video coding performed by a computing system having a memory and one or more processors, the method comprising: obtaining video data including a plurality of blocks including a first block; determining a plurality of transform coefficients associated with the first block; selecting a subset of the plurality of transform coefficients based on a frequency corresponding to each transform coefficient of the plurality of transform coefficients; predicting respective coefficient signs for a selected subset of the transform coefficients associated with the first block based on respective context information; reconstructing the first block based on the plurality of transform coefficients and the predicted respective coefficient signs. method.
2. The method of claim 1 , further comprising: refraining from predicting respective coefficient signs for a remainder of the plurality of transform coefficients associated with the first block.
3. The method of claim 1 , wherein the subset of the plurality of transform coefficients is selected based on one or more of a frequency-based criterion and an absolute value-based criterion.
4. The method of claim 1 , wherein the subset of the plurality of transform coefficients comprises a set of low frequency elements and a set of higher frequency elements.
5. 5. The method of claim 4, wherein the set of higher frequency elements is along a scanning order of the first block and includes a set of P first elements that are outside a predefined area of the first block.
6. The method of claim 4 , wherein the set of higher frequency elements includes elements with the largest set of P coefficients in the first block.
7. The method of claim 4 , wherein the set of low frequency elements corresponds to a predefined area of the first block, and the set of higher frequency elements consists of elements outside the predefined area.
8. The method of claim 1 , wherein the subset of the plurality of transform coefficients comprises a DC transform coefficient and one or more AC transform coefficients.
9. The method of claim 8 , wherein the one or more AC transform coefficients are lowest frequency AC transform coefficients associated with the first block.
10. The method of claim 1 , further comprising determining a context for a predicted coefficient sign using previously coded information.
11. The method of claim 10 , wherein the previously coded information comprises signs of coefficients and / or absolute values of coefficients.
12. The method of claim 1 , wherein the sign of each coefficient is predicted based on block coding information.
13. The method of claim 12 , wherein the block coding information corresponds to one or more of the first block, a neighboring block, and a block specified by a motion vector.
14. The method of claim 12 , wherein the block coding information includes a sign for each of one or more low frequency coefficients.
15. The method of claim 1 , wherein the sign of each coefficient is predicted based on one or more reconstructed pixels.
16. A control circuit; and a memory storing a computer program for causing said control circuit to carry out the method according to any one of claims 1 to 15. Computing systems.
17. A computer program product for causing a computer to carry out the method according to any one of claims 1 to 15.