Bilateral Matching-Based Scaling Coefficient Derivation for JMVD

Abstract

A method for video coding includes the steps of obtaining a coding block of video data, determining whether joint coding of motion vector differentials (JMVD) is used to predict the coding block, obtaining a list of scaling coefficients and the JMVD from a video bitstream based on a determination that JMVD is used to predict the coding block, deriving a predicted scaling coefficient based on the list of scaling coefficients, deriving a motion vector differential (MVD) of a reference list based on at least the joint motion vector differential and the predicted scaling coefficient, and reconstructing the coding block based on the derived MVD.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 332,563, filed April 19, 2022, and U.S. Patent Application No. 17 / 982,171, filed November 7, 2022, which are hereby expressly incorporated by reference in their entireties.

[0002] This disclosure is directed to a set of advanced image and video coding techniques, and more specifically, to an improved scheme for joint coding of motion vector differentials (JMVD). [Background technology]

[0003] AOMedia Video 1 (AV1) is an open video coding format designed for video transmission over the Internet. It was developed as a successor to VP9 by the Alliance for Open Media (AOMedia), a consortium founded in 2015 with the participation of semiconductor companies, video-on-demand providers, video content producers, software developers, and web browser vendors. Many of the components of the AV1 project were contributed from previous research efforts by members of the alliance. Individual contributors started experimental technology platforms several years ago: Xiph / Mozilla's Daala, which had already released its code in 2010, Google's experimental VP9 evolution project VP10, announced on September 12, 2014, and Cisco's Thor, on August 11, 2015. Building on the VP9 code base, AV1 incorporates additional technologies, some of which were developed in these experimental formats. The first version 0.1.0 of the AV1 reference codec was released on April 7, 2016. The Alliance announced the release of the AV1 Bitstream Specification on March 28, 2018, along with reference software-based encoders and decoders. The specification's working version 1.0.0 was released on June 25, 2018. The specification's working version 1.0.0, including Errata 1, was released on January 8, 2019. The AV1 Bitstream Specification includes reference video codecs.

[0004] ITU-T VCEG (Q6 / 16) and ISO / IEC MPEG (JTC 1 / SC 29 / WG 11) published the H.265 / HEVC (High Efficiency Video Coding) standard in 2013 (version 1), 2014 (version 2), 2015 (version 3) and 2016 (version 4). Since then, they have been studying the potential need for standardization of future video coding technologies that may significantly exceed HEVC in compression capabilities. In October 2017, they announced a Joint Call for Proposals on Video Compression with Capability beyond HEVC (CfP). By February 15, 2018, a total of 22 CfP responses for Standard Dynamic Range (SDR), 12 CfP responses for High Dynamic Range (HDR), and 12 CfP responses for 360 video categories had been submitted, respectively. In April 2018, all received CfP responses were evaluated at the 122 MPEG / 10th JVET (Joint Video Exploration Team-Joint Video Expert Team) meeting. After careful evaluation, JVET officially started the standardization of the next generation video coding beyond HEVC, namely the so-called Versatile Video Coding (VVC).

[0005] Also, in JMVD, there are technical problems in assuming linear motion in the JMVD coding mode, since the motion between two reference frames is not always linear, for example, the motion can be slower or faster from a backward reference frame to a forward reference frame. Therefore, a technical solution to such problems is desired. Summary of the Invention [Means for solving the problem]

[0006] According to an aspect of some embodiments, there is provided a method for video coding executed by at least one processor, the method including obtaining a coding block of a video bitstream, determining whether joint coding of motion vector difference (JMVD) is used to predict the coding block, obtaining a list of scaling coefficients and the JMVD from the video bitstream based on a determination that JMVD is used to predict the coding block, for each of the scaling coefficients in the list of scaling coefficients, generating a prediction block, and signaling a selection of one of the scaling coefficients based on a weight difference between a cost criterion and each of the prediction blocks.

[0007] According to further aspects of some embodiments, there is also provided an apparatus and computer readable medium consistent with this method.

[0008] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Diagram 2] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Diagram 3] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 4] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Diagram 5] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 6] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 7] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 8] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 9A] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 9B] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 10A] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 10B] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 10C] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 11] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 12] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 13] FIG. 1 is a simplified diagram of a simplified flow diagram according to some embodiments. [Figure 14] FIG. 1 is a simplified diagram of a diagram according to some embodiments. [Figure 15] FIG. 1 is a schematic diagram of a diagram according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The proposed functions described below may be used separately or combined in any order. Furthermore, the embodiments may be implemented by processing circuitry (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. To address one or more different technical problems, according to some embodiments, a method and apparatus are provided that includes a memory configured to store computer program code and one or more processors configured to access the computer program code and operate as instructed by the computer program code. The computer program code includes: an acquisition code configured to cause at least one hardware processor to acquire a coding block of a video bitstream; a decision code configured to cause the at least one hardware processor to determine whether joint coding of motion vector difference (JMVD) is used to predict the coding block; a further acquisition code configured to cause the at least one hardware processor to acquire a list of scaling coefficients and the JMVD from the video bitstream in response to a determination that the JMVD is used to predict the coding block; a derivation code configured to cause the at least one hardware processor to derive a predicted scaling factor based on the list of scaling coefficients; a further derivation code configured to cause the at least one hardware processor to derive a motion vector difference (MVD) of a reference list based on at least the joint motion vector difference and the predicted scaling factor; and a reconstruction code configured to cause the at least one hardware processor to reconstruct the coding block based on the derived MVD. According to some embodiments, the computer program code further includes generation code configured to cause the at least one hardware processor to generate a prediction block for each of the scaling coefficients in the list of scaling coefficients, and signaling code configured to cause the at least one hardware processor to signal a selection of one of the scaling coefficients based on a weighted difference between a cost criterion and each of the prediction blocks, wherein the prediction block is generated based on each of the scaling coefficients.

[0011] According to some embodiments, each prediction block is generated based on a motion vector that is equal to the sum of a motion vector prediction and a scaled motion vector differential scaled by one of the scaling factors.

[0012] According to some embodiments, the cost metric is based on at least one of the sum of absolute differences (SAD), the sum of squared errors (SSE), and the sum of absolute transformed differences (SATD).

[0013] According to some embodiments, the computer program code includes further signaling code configured to cause the at least one hardware processor to signal an index of one of the scaling coefficients and at least one of the flags, and entropy coding code configured to cause the at least one hardware processor to entropy code the flag based on at least one of the scaling coefficients.

[0014] According to some embodiments, the computer program code includes additional signaling code configured to cause the at least one hardware processor to signal whether the signaling of at least one of the index and the flag is explicit or implicit in the bitstream.

[0015] According to some embodiments, the computer program code includes permutation code configured to cause at least one hardware processor to permutate the scaling coefficients, and further signaling code configured to cause the at least one hardware processor to signal an index of the permuted scaling coefficients.

[0016] According to some embodiments, the scaling factor is derived based on at least one of a quantization step size, a quantization parameter, a block size, an inter prediction mode, a motion vector differential (MVD) class, an MVD resolution, a reference picture, a motion vector prediction (MVP) index, and an MVD scaling factor of a neighboring block.

[0017] According to some embodiments, the computer program code includes derivation code configured to cause the at least one hardware processor to derive a motion vector prediction (MVP) for at least one coding block following the coding block based on one of the scaling factors.

[0018] According to some embodiments, in the computer program code, a selection of one of the scaling factors is signaled in at least one of a frame header, a slice header, and a sequence header.

[0019] FIG. 1 illustrates a simplified block diagram of a communication system 100 according to an embodiment of the present disclosure. The communication system 100 may include at least two terminals 102, 103 interconnected via a network 105. For unidirectional transmission of data, a first terminal 103 may code video data at a local location for transmission to the other terminal 102 via the network 105. The second terminal 102 may receive the coded video data of the other terminal from the network 105, decode the coded data, and display the recovered video data. Unidirectional data transmission may be common in media serving applications, etc.

[0020] 1 illustrates a second pair of terminals 101 and 104 provided to support bidirectional transmission of coded video, such as may occur during a video conference. For the bidirectional transmission of data, each terminal 101 and 104 may code captured video data at a local location for transmission to the other terminal over network 105. Each terminal 101 and 104 may also receive coded video data transmitted by the other terminal, decode the coded data, and display the recovered video data on a local display device.

[0021] In FIG. 1, terminals 101, 102, 103, and 104 may be illustrated as servers, personal computers, and smartphones, although the principles of the present disclosure are not so limited. Embodiments of the present disclosure find application with laptop computers, tablet computers, media players, and / or dedicated video conferencing equipment. Network 105 represents any number of networks that convey coded video data between terminals 101, 102, 103, and 104, including, for example, wired and / or wireless communication networks. Communication network 105 may exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this discussion, the architecture and topology of network 105 may not be important to the operation of the present disclosure unless described below herein.

[0022] 2 illustrates the arrangement of a video encoder and a video decoder in a streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter is equally applicable to other video-enabled applications, such as, for example, video conferencing, digital television, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0023] The streaming system may include a capture subsystem 203, which may include a video source 201, such as a digital camera, that creates an uncompressed video sample stream 213. The sample stream 213 may be depicted in bold to emphasize the large amount of data when compared to an encoded video bitstream, and may be processed by an encoder 202 coupled to the camera 201. The encoder 202 may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video bitstream 204 may be emphasized as a lower amount of data compared to the sample stream, and may be stored on a streaming server 205 for future use. One or more streaming clients 212 and 207 may access the streaming server 205 to retrieve copies 208 and 206 of the encoded video bitstream 204. The client 212 may include a video decoder 211 that may decode the incoming copy 208 of the encoded video bitstream and create an outgoing video sample stream 210 that may be rendered on a display 209 or other rendering device (not shown). In some streaming systems, the video bitstreams 204, 206, and 208 may be encoded according to a particular video coding / compression standard, examples of which are mentioned above and described further herein.

[0024] FIG. 3 may be a functional block diagram of a video decoder 300 according to one embodiment of the present invention.

[0025] The receiver 302 may receive one or more codec video sequences to be decoded by the decoder 300, in the same or another embodiment, one coded video sequence at a time, with the decoding of each coded video sequence being independent of the other coded video sequences. The coded video sequences may be received from a channel 301, which may be a hardware / software link to a storage device that stores the coded video data. The receiver 302 may receive the coded video data along with other data, coded audio data and / or auxiliary data streams, which may be forwarded to a respective usage entity (not shown). The receiver 302 may separate the coded video sequences from the other data. To combat network jitter, a buffer memory 303 may be coupled between the receiver 302 and an entropy decoder / parser 304 (hereinafter, "parser"). When the receiver 302 is receiving data from a storage / forwarding device with sufficient bandwidth and controllability, or from an isosynchronous network, the buffer 303 may not be needed or may be small. For use in a best effort packet network such as the Internet, buffer 303 may be required and may be relatively large, and may advantageously be of adaptive size.

[0026] The video decoder 300 may include a parser 304 for reconstructing symbols 313 from the entropy coded video sequence. These categories of symbols include information used to manage the operation of the decoder 300 and potentially information for controlling a rendering device, such as a display 312, that is not an integral part of the decoder but may be coupled to it. The control information for the rendering device may be in the form of supplemental enhancement information (SEI message) or a video usability information parameter set fragment (not shown). The parser 304 may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow principles well known to those skilled in the art, including variable length coding, Huffman coding, arithmetic coding with or without contextual dependency, etc. The parser 304 may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups may include groups of pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The entropy decoder / parser may also extract information from the coded video sequence, such as transform coefficients, quantizer parameter values, motion vectors, etc.

[0027] The parser 304 may perform an entropy decoding / parsing operation on the video sequence received from the buffer 303 to create symbols 313. The parser 304 may receive the encoded data and selectively decode particular symbols 313. Additionally, the parser 304 may determine whether the particular symbol 313 should be provided to the motion compensated prediction unit 306, the scaler / inverse transform unit 305, the intra prediction unit 307, or the loop filter 311.

[0028] The reconstruction of symbols 313 may involve several different units depending on the type of coded video picture or part thereof (inter-picture and intra-picture, inter-block and intra-block, etc.), as well as other factors. Which units are involved and how may be governed by subgroup control information parsed from the coded video sequence by parser 304. The flow of such subgroup control information between parser 304 and the following units is not shown for clarity.

[0029] In addition to the functional blocks already mentioned, the decoder 300 can be conceptually subdivided into several functional units, as described below. In an actual implementation operating under commercial constraints, many of these units will interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the following conceptual subdivision into functional units is appropriate:

[0030] The first unit is a scalar / inverse transform unit 305. The scalar / inverse transform unit 305 receives quantized transform coefficients and control information including the transform to use, block size, quantization coefficients, quantization scaling matrix, etc. as symbols 313 from the parser 304. It can output blocks containing sample values ​​that can be input to the aggregator 310.

[0031] In some cases, the output samples of the scalar / inverse transform 305 may relate to intra-coded blocks, i.e. blocks that do not use prediction information from a previously reconstructed picture, but can use prediction information from a previously reconstructed part of the current picture. Such prediction information may be provided by the intra-picture prediction unit 307. In some cases, the intra-picture prediction unit 307 uses surrounding already reconstructed information fetched from the current (partially reconstructed) picture 309 to generate a block of the same size and shape as the block being reconstructed. The aggregator 310 adds, possibly on a sample-by-sample basis, the prediction information generated by the intra-prediction unit 307 to the output sample information provided by the scalar / inverse transform unit 305.

[0032] In other cases, the output samples of the scalar / inverse transform unit 305 may relate to an inter-coded, potentially motion-compensated block. In such a case, the motion compensation prediction unit 306 may access the reference picture memory 308 to fetch samples used for prediction. After motion compensating the fetched samples according to the symbols 313 relating to the block, these samples may be added by the aggregator 310 to the output of the scalar / inverse transform unit to generate output sample information (in this case referred to as residual samples or residual signals). The addresses in the reference picture memory format from which the motion compensation unit fetches the prediction samples may be controlled by a motion vector and may be made available to the motion compensation unit in the form of symbols 313 that may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolation of sample values ​​fetched from the reference picture memory when sub-sample accurate motion vectors are used, motion vector prediction mechanisms, etc.

[0033] The output samples of aggregator 310 may be subject to various loop filtering techniques in loop filter unit 311. The video compression techniques may include in-loop filter techniques controlled by parameters contained in the coded video bitstream and made available to loop filter unit 311 as symbols 313 from parser 304, but may also be responsive to meta-information obtained during decoding of a previous part (in decoding order) of a coded picture or coded video sequence, or to previously reconstructed and loop filtered sample values.

[0034] The output of the loop filter unit 311 may be a sample stream that can be output to the rendering device 312 as well as stored in the reference picture memory 557 for use in future inter-picture prediction.

[0035] Once fully reconstructed, a particular coded picture can be used as a reference picture for future prediction. Once a coded picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser 304), the current reference picture 309 can become part of the reference picture buffer 308, and a new current picture memory can be reallocated before starting reconstruction of the following coded picture.

[0036] The video decoder 300 may perform decoding operations according to a given video compression technique, which may be documented in a standard, such as ITU-T Rec. H.265. The coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense of adhering to the syntax of the video compression technique or standard, as specified in the video compression technique document or standard, specifically in a profile document therein. Also, what is required for compliance may be that the complexity of the coded video sequence is within a range defined by the level of the video compression technique or standard. In some cases, the level limits the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. The limits set by the level may be further limited in some cases by the specification of a hypothetical reference decoder (HRD) and metadata for HRD buffer management signaled within the coded video sequence.

[0037] In an embodiment, the receiver 302 may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence. The additional data may be used by the video decoder 300 to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, a temporal layer, a spatial layer, or a signal-to-noise ratio (SNR) enhancement layer, redundant slices, redundant pictures, forward error correction codes, etc.

[0038] FIG. 4 may be a functional block diagram of a video encoder 400 according to an embodiment of the present disclosure.

[0039] The encoder 400 may receive video samples from a video source 401 (not part of the encoder), which may capture video images to be coded by the encoder 400 .

[0040] The video source 401 may provide a source video sequence to be coded by the encoder (303) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 Y CrCB, RGB, ...) and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media serving system, the video source 401 may be a storage device that stores previously prepared video. In a video conferencing system, the video source 401 may be a camera that captures local image information as a video sequence. The video data may be provided as a number of separate pictures that give motion when viewed in sequence. The pictures themselves may be organized as a spatial array of pixels, each pixel may contain one or more samples, depending on the sampling structure, color space, etc. in use. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0041] According to an embodiment, the encoder 400 may code and compress pictures of a source video sequence into a coded video sequence 410 in real time or under any other time constraint required by the application. Providing an appropriate coding rate is one function of the controller 402. The controller controls and is operatively coupled to other functional units, as described below. For clarity, couplings are not depicted. Parameters set by the controller may include rate control related parameters (picture skip, quantizer, lambda value for rate distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. One skilled in the art may easily identify other functions of the controller 402 as they may relate to the video encoder 400 being optimized for a particular system design.

[0042] Some video encoders operate in what those skilled in the art will easily recognize as a "coding loop." As an oversimplified explanation, the coding loop may consist of an encoding part of the encoder 402 (hereafter "source coder") (responsible for creating symbols based on the input image to be coded and reference pictures), and a (local) decoder 406 built into the encoder 400 that reconstructs the symbols to create sample data that the (remote) decoder will also create (since any compression between the symbols and the coded video bitstream is lossless in the video compression techniques considered in the disclosed subject matter). The reconstructed sample stream is input to a reference picture memory 405. Since the decoding of the symbol stream results in bit-exact results regardless of the location of the decoder (local or remote), the reference picture buffer contents are also bit-exact between the local and remote encoders. In other words, the predictive part of the encoder "sees" exactly the same sample values ​​as the decoder "sees" when using prediction during decoding as reference picture samples. This basic principle of reference picture synchrony (and the resulting drift when synchrony cannot be maintained, for example due to channel errors) is well known to those skilled in the art.

[0043] The operation of the "local" decoder 406 may be the same as that of the "remote" decoder 300, which has already been described in detail above in relation to Figure 3. However, with brief reference also to Figure 4, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder 408 and the parser 304 may be lossless, the entropy decoding portion of the decoder 300, including the channel 301, the receiver 302, the buffer 303 and the parser 304, may not be fully implemented in the local decoder 406.

[0044] At this point, it can be said that any decoder technique, other than analysis / entropy decoding, present in the decoder must necessarily also be present in the corresponding encoder in substantially the same functional form. A description of the encoder techniques can be omitted, since they are the inverse of the decoder techniques described generically. Only in certain areas is a more detailed description necessary, which is provided below.

[0045] As part of its operation, the source coder 403 may perform motion compensated predictive coding, which predictively codes an input frame with reference to one or more previously coded frames from the video sequence, designated as “reference frames.” In this manner, the coding engine 407 codes differences between pixel blocks of the input frame and pixel blocks of reference frames that may be selected as predictive references for the input frame.

[0046] The local video decoder 406 may decode the coded video data of the frames that may be designated as reference frames based on the symbols created by the source coder 403. The operation of the coding engine 407 may advantageously be a lossy process. When the coded video data may be decoded in a video decoder (not shown in FIG. 4), the reconstructed video sequence may be a copy of the source video sequence, usually with some errors. The local video decoder 406 may replicate the decoding process that may be performed by the video decoder on the reference frames, and store the reconstructed reference frames in the reference picture cache 405. In this way, the encoder 400 may locally store copies of the reconstructed reference frames that have common content as the reconstructed reference frames that will be obtained by the far-end video decoder (without transmission errors).

[0047] The predictor 404 may perform a predictive search for the coding engine 407. That is, for a new frame to be coded, the predictor 404 may search the reference picture memory 405 for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc., that may serve as suitable predictive references for the new picture. The predictor 404 may operate on a pixel block-by-pixel block basis to find suitable predictive references. In some cases, as determined by the search results obtained by the predictor 404, the input picture may have predictive references drawn from multiple reference pictures stored in the reference picture memory 405.

[0048] The controller 402 may manage the coding operations of the video coder 403, including, for example, setting parameters and subgroup parameters used to encode the video data.

[0049] The output of all the aforementioned functional units may undergo entropy coding in an entropy coder 408. The entropy coder converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques known to those skilled in the art, such as, for example, Huffman coding, variable length coding, arithmetic coding, etc.

[0050] The transmitter 409 may buffer the coded video sequence created by the entropy coder 408 in preparation for transmission over a communication channel 411, which may be a hardware / software link to a storage device that stores the encoded video data. The transmitter 409 may merge the coded video data from the video coder 403 with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0051] The controller 402 may manage the operation of the encoder 400. During coding, the controller 405 may assign a particular coded picture type to each coded picture, which may affect the coding technique that may be applied to the respective picture. For example, pictures may often be assigned as one of the following frame types:

[0052] An intra picture (I-picture) may be a picture that can be coded and decoded without using any other frame in a sequence as a source of prediction. Some video codecs allow various types of intra pictures, including, for example, independent decoder refresh pictures. Those skilled in the art are aware of these variations of I-pictures and their respective uses and characteristics.

[0053] A predictive picture (P picture) may be a picture that can be coded and decoded using intra- or inter-prediction, which uses at most one motion vector and reference index to predict sample values ​​for each block.

[0054] A bidirectionally predicted picture (B-picture) may be a picture that can be coded and decoded using intra- or inter-prediction that uses up to two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, a multi-predicted picture may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0055] A source picture may generally be spatially subdivided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples, respectively) and coded block by block. A block may be predictively coded with reference to other (already coded) blocks as determined by the coding assignment applied to the block's respective picture. For example, a block of an I-picture may be non-predictively coded or predictively coded with reference to already coded blocks of the same picture (spatial or intra prediction). A pixel block of a P-picture may be non-predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. A pixel block of a B-picture may be non-predictively coded via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures.

[0056] Video coder 400 may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Rec. H.265. In its operation, video coder 400 may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.

[0057] In one embodiment, the transmitter 409 may transmit additional data along with the encoded video. The source coder 403 may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, Supplemental Enhancement Information (SEI) messages, Visual Usability Information (VUI) parameter set fragments, etc.

[0058] FIG. 5 illustrates the intra prediction modes used in HEVC and JEM. To capture any edge direction presented in natural video, the number of directional intra modes is expanded from 33 used in HEVC to 65. The additional directional modes in JEM above HEVC are shown as dotted arrows in FIG. 1(b), while the planar and DC modes remain the same. These denser directional intra prediction modes apply to all block sizes and to both luma and chroma intra prediction. As shown in FIG. 5, directional intra prediction modes identified by dotted arrows associated with odd intra prediction mode indexes are referred to as odd intra prediction modes. Directional intra prediction modes identified by solid arrows associated with even intra prediction mode indexes are referred to as even intra prediction modes. In this specification, the directional intra prediction modes indicated by solid or dotted arrows in FIG. 5 are also referred to as angular modes.

[0059] In JEM, a total of 67 intra prediction modes are used for luma intra prediction. To code intra modes, a Most Probable Mode (MPM) list of size 6 is constructed based on the intra modes of neighboring blocks. If the intra mode is not from the MPM list, a flag is signaled to indicate whether the intra mode belongs to the selected modes. In JEM-3.0, there are 16 selected modes, which are uniformly selected for each of the four angle modes. In JVET-D0114 and JVET-G0060, 16 secondary MPMs are derived to replace the uniformly selected modes.

[0060] 6 illustrates N reference layers utilized for the intra-directional mode. There is a block unit 611, a segment A 601, a segment B 602, a segment C 603, a segment D 604, a segment E 605, a segment F 606, a first reference layer 610, a second reference layer 609, a third reference layer 608, and a fourth reference layer 607.

[0061] In both HEVC and JEM, as well as some other standards such as H.264 / AVC, the reference samples used to predict the current block are limited to the nearest reference line (row or column). In the method of multiple reference line intra prediction, the number of candidate reference lines (rows or columns) is increased from 1 (i.e., the nearest) to N for intra-directive mode, where N is an integer equal to or greater than 1. Figure 2 cites a 4x4 prediction unit (PU) as an example to illustrate the concept of the multiple line intra-directional prediction method. The intra-directional mode can arbitrarily select one of N reference layers to generate a predictor. In other words, the predictor p(x, y) is generated from one of the reference samples S1, S2, ..., SN. A flag is signaled to indicate which reference layer is selected for the intra-directional mode. If N is set to 1, the intra-directional prediction method is the same as the conventional method of JEM2.0. In Fig. 6, the reference lines 610, 609, 608 and 607 are composed of six segments 601, 602, 603, 604, 605 and 606 with an upper-left reference sample. In this specification, the reference hierarchy is also called a reference line. The coordinates of the upper-left pixel in the current block unit are (0,0), and the upper-left pixel of the first reference line is (-1,-1).

[0062] In JEM, for the luma component, the neighboring samples used for intra prediction sample generation are filtered before the generation process. The filtering is controlled by a given intra prediction mode and transform block size. If the intra prediction mode is DC or the transform block size is equal to 4×4, the neighboring samples are not filtered. If the distance between a given intra prediction mode and the vertical mode (or horizontal mode) is greater than a predefined threshold, the filtering process is enabled. [1,2,1] and bilinear filters are used for filtering the neighboring samples.

[0063] The position-dependent intra prediction synthesis (PDPC) method is an intra prediction method that invokes the combination of unfiltered boundary reference samples and HEVC-style intra prediction with filtered boundary reference samples. Each prediction sample pred[x][y] located at (x, y) is calculated as follows: pred[x][y]=(wL*R -1,y +wT*R x,-1 +wTL*R -1,-1 +(64-wL-wT-wTL)*pred[x][y]+32)≫6 (Formula 2-1) In the formula, R x,-1 , R -1,y denote the unfiltered reference samples located above and to the left of the current sample (x,y), respectively, and R -1,-1 represents the unfiltered reference sample located in the top-left corner of the current block. The weights are calculated as follows: wT = 32≫((y≪1)≫shift) (Eq. 2-2) wL=32≫((x≪1)≫shift) (Eq. 2-3) wTL=-(wL≫4)-(wT≫4) (Formula 2-4) Shift = (log2(width) + log2(height) + 2)≫2 (Equation 2-5)

[0064] FIG. 7 illustrates a diagram 700 of DC mode PDPC weights (wL, wT, wTL) for (0,0) and (1,0) positions in one 4×4 block. When PDPC is applied to DC, planar, horizontal, and vertical intra modes, no additional boundary filters such as HEVC DC mode boundary filters or horizontal / vertical mode edge filters are required. FIG. 7 illustrates the definition of reference samples Rx,-1, R-1,y, and R-1,-1 for PDPC applied to the top right diagonal mode. The predicted sample pred(x',y') is located at (x',y') in the predicted block. The coordinate x of the reference sample Rx,-1 is given by x=x'+y'+1, and similarly the coordinate y of the reference sample R-1,y is given by y=x'+y'+1.

[0065] 8 illustrates a Local Illumination Compensation (LIC) diagram 800, which is based on a linear model of illumination changes with a scaling factor a and an offset b, and which is adaptively enabled or disabled for each coding unit (CU) coded in inter mode.

[0066] When LIC is applied to a CU, the parameters a and b are derived by using the neighboring samples of the current CU and their corresponding reference samples using a least square error method. More specifically, as illustrated in Figure 8, the subsampled (2:1 subsampled) neighboring samples of the CU and the corresponding samples in the reference picture (identified by the motion information of the current CU or sub-CU) are used. The IC parameters are derived and applied separately for each prediction direction.

[0067] When a CU is coded in merge mode, the LIC flag is copied from neighboring blocks in a manner similar to the motion information copying in merge mode, and if not, the LIC flag is signaled to the CU to indicate whether LIC is applied or not.

[0068] 9A illustrates intra-prediction modes 900 used in HEVC. In HEVC, there are a total of 35 intra-prediction modes, of which mode 10 is a horizontal mode, mode 26 is a vertical mode, and modes 2, 18, and 34 are diagonal modes. The intra-prediction modes are signaled by three Most Probable Modes (MPMs) and the remaining 32 modes.

[0069] 9B illustrates that in a VVC embodiment, there are a total of 87 intra-prediction modes, with mode 18 being the horizontal mode, mode 50 being the vertical mode, and modes 2, 34 and 66 being diagonal modes. Modes -1 through -10 and modes 67 through 76 are referred to as wide-angle intra-prediction (WAIP) modes.

[0070] A prediction sample pred(x,y) located at position (x,y) is predicted using a linear combination of reference samples according to the intra prediction mode (DC, planar, angular) and the PDPC representation. pred(x,y)=(wL×R-1,y+wT×Rx,-1-wTL×R-1,-1+(64-wL-wT+wTL)×pred(x,y)+32)>>6 where Rx,-1,R-1,y represent the reference samples located above and to the left of the current sample (x,y), respectively, and R-1,-1 represents the reference sample located in the top left corner of the current block.

[0071] In DC mode, the weights are calculated for a block having dimensions width and height as follows: wT=32>>((y<<1)>>nScale),wL=32>>((x<<1)>>nScale),wTL=(wL>>4)+(wT>>4), Here, nScale=(log2(width)-2+log2(height)-2+2)>>2, where wT represents the weighting coefficient of the reference sample located on the above reference line with the same horizontal coordinate, wL represents the weighting coefficient of the reference sample located on the left reference line with the same vertical coordinate, wTL represents the weighting coefficient of the top-left reference sample of the current block, and nScale specifies how fast the weighting coefficient decreases along the axis (wL decreases from left to right, or wT decreases from top to bottom), i.e., specifies the weighting coefficient decrease rate, which is the same along the x-axis (left to right) and y-axis (top to bottom) in the current design. And 32 represents the initial weighting coefficient of the neighboring samples, and the initial weighting coefficient is also the top (left or top-left) weighting assigned to the top-left sample in the current CB, and the weighting coefficient of the neighboring samples in the PDPC process should be less than or equal to this initial weighting coefficient.

[0072] In planar mode, wTL = 0, while in horizontal mode wTL = wT and in vertical mode wTL = wL. The PDPC weights can be calculated with additions and shifts only. The value of pred(x,y) can be calculated in one step using Equation 1.

[0073] In this specification, the proposed methods may be used separately or combined in any order. Moreover, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. In the following, the term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU.

[0074] FIG. 10A shows an example 1000 of block partitioning by using QTBT, and FIG. 10B shows the corresponding tree representation 1001. Solid lines indicate quadtree partitioning, and dotted lines indicate binary tree partitioning. At each partition (i.e., non-leaf) node of the binary tree, one flag is signaled to indicate which partition type (i.e., horizontal or vertical) is used, with 0 indicating horizontal partitioning and 1 indicating vertical partitioning. In quadtree partitioning, there is no need to specify the partition type, since quadtree partitioning always partitions a block both horizontally and vertically to generate four sub-blocks of equal size.

[0075] In HEVC, CTUs can be divided into CUs by using a quadtree structure represented as a coding tree to fit various local characteristics. The decision of whether to use inter-picture (temporal) prediction or intra-picture (spatial) prediction to code a picture area is made at the CU level. Each CU can be further divided into one, two, or four PUs depending on the PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU partition type, the CU can be divided into transform units (TUs) according to another quadtree structure, such as the coding tree of the CU. One of the important features of the HEVC structure is that it has multiple partition concepts, including CUs, PUs, and TUs.

[0076] According to an embodiment, the QTBT structure removes the concept of multiple partition types, i.e., removes the concept of separation of CU, PU, ​​and TU, and increases the flexibility of CU partition shape. In the QTBT block structure, a CU can be either square or rectangular in shape. In the flow diagram 1100 of FIG. 11, according to an exemplary embodiment, a coding tree unit (CTU) or CU obtained in S11 is first partitioned by a quadtree structure in S12. It is further determined whether the quadtree leaf node should be partitioned by a binary tree structure in S14, and if so, in S15, as illustrated in FIG. 10C, for example, there are two partition types in binary tree partitioning: symmetric horizontal partitioning and symmetric vertical partitioning. The binary tree leaf node is called a coding unit (CU), and its segmentation is used for prediction and transformation processing without further partitioning. This means that the CU, PU, ​​and TU have the same block size in the QTBT coding block structure. In VVC, a CU may be composed of coding blocks (CBs) of different color components, e.g., for P and B slices in 4:2:0 chroma format, one CU contains one luma CB and two chroma CBs, or it may be composed of a CB of a single component, e.g., for an I slice, one CU contains only one luma CB or only two chroma CBs.

[0077] According to an embodiment, the following parameters are defined for the QTBT block division scheme: -CTU size: Root node size of the quadtree, e.g., the same concept as HEVC -MinQTSize: The minimum allowable quadtree leaf node size. -MaxBTSize: Maximum allowed binary tree root node size -MaxBTDepth: Maximum allowed binary tree depth -MinBTSize: The minimum allowable binary tree leaf node size.

[0078] In one example of a QTBT partitioning structure, the CTU size is set as two blocks of 128x128 luma samples and corresponding 64x64 chroma samples, MinQTSize (QT is quadtree) is set as 16x16, MaxBTSize is set as 64x64, MinBTSize (both width and height) is set as 4x4, and MaxBTDepth is set as 4. In S12 or S15, quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. The quadtree leaf nodes may have sizes from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If the leaf quadtree node is 128x128, it will not be further partitioned by the bi-tree as its size exceeds MaxBTSize (i.e., 64x64) as checked in S14. Otherwise, the quadtree node may be further split by the binary tree in S15. Thus, the quadtree leaf node is also the root node of the binary tree, and the depth of the binary tree is 0. When the binary tree depth reaches MaxBTDepth (i.e., 4), no further splits are considered in S14. When the width of the binary tree node is equal to MinBTSize (i.e., 4), no further horizontal splits are considered in S14. Similarly, when the height of the binary tree node is equal to MinBTSize, no further vertical splits are considered in S14. A signal in S16 is provided without further splits, as described below with respect to the syntax describing the QT / TT / BT size for the progression of the binary tree leaf node, etc., to be further processed by the prediction and transformation process, in S17, and similarly as described herein with respect to such prediction and transformation process. Such signaling may also be provided in S13 after S12, as shown in FIG. 11 according to an exemplary embodiment. In JEM, the maximum CTU size is 256x256 luma samples.

[0079] In addition, according to an embodiment, the QTBT scheme supports the capability / flexibility for luma and chroma to have separate QTBT structures. Currently, in P slices and B slices, the luma coding tree block (CTB) and chroma CTB in one CTU share the same QTBT structure. However, in I slices, the luma CTB is divided into CUs by a QTBT structure, and the chroma CTB is divided into chroma CUs by another QTBT structure. This means that a CU in an I slice is composed of a coding block of a luma component or a coding block of two chroma components, and a CU in a P or B slice is composed of coding blocks of all three color components.

[0080] In HEVC, inter prediction for small blocks is restricted to not support bi-prediction for 4x8 and 8x4 blocks, and inter prediction is not supported for 4x4 blocks, in order to reduce memory access for motion compensation. In QTBT implemented in JEM-7.0, these restrictions have been removed.

[0081] FIG. 10C shows a simplified block diagram 1100 VVC for the included multi-type tree (MTT) structure 1002, which is a combination of the illustrated quadtree (QT) with nested binary tree (BT) and triple / ternary tree (TT), QT / BT / TT. A CTU or CU is first recursively divided into square shaped blocks by QT. Then, each QT leaf may be further divided by BT or TT, and the BT and TT divisions may be applied recursively and interleaved, but no further QT divisions may be applied. In all related proposals, TT divides rectangular blocks vertically or horizontally into three blocks using a 1:2:1 ratio (thus avoiding widths and heights that are not powers of two). For partition conflict prevention, typically additional partitioning constraints are imposed on the QT / BT / TT block partitioning in VVC for MTT, i.e., blocks 1103 (quadtree), 1104 (binary tree, JEM), and 1105 (ternary tree) as shown in simplified diagram 1002 of Fig. 10C to avoid overlapping partitions (e.g., prohibit vertical / horizontal bisection in intermediate partition resulting from vertical / horizontal 3-partition). Further restrictions may be set on the maximum depth of BT and TT.

[0082] An important advantage of such ternary tree partitioning, shown as ternary partition block 1105 above, as a complement to quadtree and binary tree partitioning, is that ternary tree partitioning can capture objects located at block centers, whereas quadtree and binary trees always partition block centers, and the width and height of the proposed ternary tree partitions are always powers of two so that no additional transformations are required.

[0083] The design of a two-level tree is primarily motivated by reduced complexity. In theory, the complexity of traversing a tree is T D where T represents the number of split types and D is the depth of the tree.

[0084] FIG. 11 shows an example of block partitioning in VP9 and AVI 1100, with an exemplary coding tree unit (CTU) 1111 for VP9 showing that VP9 uses a 4-way partition tree starting from the 64x64 level 1112 to the 4x4 level 1113, with some additional restrictions on blocks up to 8x8 as shown in the top half of level 1113. Note that the partitions designated as R are referred to as recursive in that the same partition tree is repeated at lower scales until the lowest 4x4 level is reached. An exemplary CTU 1104 for AV1 not only expands the partition tree to a 10-way structure 1116, but also increases the maximum size (called a superblock in VP9 / AV1 terminology) to start at the 128x128 level 1115. Note that this includes 4:1 / 1:4 rectangular partitions, which did not exist in VP9. Also, none of the rectangular partitions can be further subdivided. Furthermore, AV1 adds more flexibility in the use of partitions below the 8x8 level, in the sense that 2x2 chroma inter prediction is allowed in certain cases.

[0085] Also, in HEVC, coding tree units (CTUs) may be divided into coding units (CUs) by using a quadtree structure represented as a coding tree to fit various local characteristics. The decision of whether to use inter-picture (temporal) prediction or intra-picture (spatial) prediction to code a picture area is made at the CU level. Each CU may be further divided into one, two, or four prediction units (PUs) according to the PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU partition type, the CU may be divided into transform units (TUs) according to another quadtree structure, such as the coding tree of the CU. One of the important features of the HEVC structure is to have multiple partition concepts, including CUs, PUs, and TUs. In HEVC, a CU or TU can only be square in shape, while a PU can be square or rectangular in shape for inter-predicted blocks. In HEVC, one coding block may be further divided into four square sub-blocks, and transformation is performed on each sub-block (i.e., TU). Each TU can be further divided recursively (using quadtree partitioning) into smaller TUs called residual quadtrees (RQTs), and at picture boundaries, HEVC uses implicit quadtree partitioning so that a block continues to be quadtree partitioned until its size fits within the picture boundary.

[0086] FIG. 12 also shows an example 1200 related to a merge mode with motion vector difference (MMVD) according to an exemplary embodiment. For example, in addition to the merge mode in which the implicitly derived motion information is directly used for the prediction sample generation of the current CU, a merge mode with motion vector difference (MMVD) is introduced into VVC. Then, an MMVD flag may be signaled immediately after sending the skip flag and the merge flag to specify whether the MMVD mode is used for the CU. And in the MMVD, after a merge candidate is selected, further information is further refined by the signaled motion vector difference (MVD) information to include a merge candidate flag, an index for specifying the magnitude of the motion, and an index for indicating the direction of the motion. In the MMVD mode, one of the first two candidates in the merge list is selected to be used as the MV basis. A merge candidate flag may be signaled to specify which one is used.

[0087] The distance index specifies the magnitude information of the motion and indicates a predefined offset from the starting point. And FIG. 12 shows L0 reference 1201 and L1 reference 1202, where the offset is added to either the horizontal or vertical component of the starting MV. The relationship between the distance index and the predefined offset is specified in Table 1. [Table 1]

[0088] According to an exemplary embodiment, the direction index represents the direction of the MVD relative to the starting point. The direction index can represent four directions as shown in Table 2 below. The meaning of the MVD code may be different according to the information of the starting MV. For example, when the starting MV is a uni-predictive MV or a bi-predictive MV with both lists pointing to the same side of the current picture (i.e., when the picture order counts (POC) of the two references are both greater than the POC of the current picture or both less than the POC of the current picture), the code in Table 2 specifies the sign of the MV offset added to the starting MV. And / or when the starting MV is a bi-predictive MV with two MVs pointing to different sides of the current picture (i.e., the POC of one reference is greater than the POC of the current picture and the POC of the other reference is less than the POC of the current picture), and the difference of the POC in list 0 is greater than the difference of the POC in list 1, the code in Table 2 specifies the sign of the MV offset added to the MV component of list 0 of the starting MV, and the sign of the MV in list 1 has an opposite value. Otherwise, if the difference in POC in List 1 is greater than the difference in POC in List 0, then the sign in Table 2 specifies the sign of the MV offset added to the MV component of List 1 of the starting MV, and the sign of the MV in List 0 has the opposite value.

[0089] According to an exemplary embodiment, the MVD may be scaled according to the difference in POC in each direction. If the difference in POC in both lists is the same, no scaling is required. Otherwise, if the difference in POC in list 0 is greater than the difference in POC in list 1, the MVD in list 1 is scaled. If the POC difference in L1 is greater than L0, the MVD in list 0 is scaled as well. If the starting MV is uni-predicted, the MVD is added to the available MV. [Table 2]

[0090] According to an exemplary embodiment, there may be symmetric MVD coding, where the MVD may be scaled according to the difference in POC in each direction. If the difference in POC in both lists is the same, no scaling is required. Otherwise, if the difference in POC in list 0 is greater than the difference in POC in list 1, the MVD in list 1 is scaled. If the POC difference in L1 is greater than L0, the MVD in list 0 is scaled as well. If the starting MV is uni-predicted, the MVD is added to the available MV.

[0091] Also, according to an exemplary embodiment, in VVC, besides the normal unidirectional prediction and bidirectional prediction mode MVD signaling, a symmetric MVD mode for bidirectional MVD signaling may be applied. In the symmetric MVD mode, the motion information including the reference picture indexes of both list 0 and list 1 and the MVD of list 1 is not signaled but is derived. The decoding process of the symmetric MVD mode is provided as follows: 1. At the slice level, the variables BiDirPredFlag, RefIdxSymL0 and RefIdxSymL1 are derived as follows: - If mvd_l1_zero_flag is 1, then BiDirPredFlag is set equal to 0. Otherwise, if the closest reference picture in list 0 and the closest reference picture in list 1 form a backward-forward pair of reference pictures of a forward-backward pair of reference pictures, then BiDirPredFlag is set to 1 and both the reference pictures in list 0 and list 1 are short-term reference pictures. Otherwise, BiDirPredFlag is set to 0. 2. At the CU level, if a CU is bi-predictively coded and BiDirPredFlag is equal to 1, a symmetric mode flag is explicitly signaled indicating whether symmetric mode is used or not.

[0092] Also, if the symmetric mode flag is true, only mvp_l0_flag, mvp_l1_flag, and MVD0 are explicitly signaled. The reference indexes of list 0 and list 1 are set equal to a pair of reference pictures, respectively. MVD1 may be set equal to (-MVD0).

[0093] According to an example embodiment, CWG-B018 may have inter mode coding, and in AV1, for each coded block in those inter frames, if the mode of the current block is an inter coding mode rather than a skip mode, another flag is signaled to indicate whether a single reference mode or a mixed reference mode is used for the current block, where in the single reference mode a predictive block is generated by one motion vector, whereas in the mixed reference mode a predictive block is generated by a weighted average of two predictive blocks derived from two motion vectors.

[0094] For example, with a single reference, the following modes may be signaled: Use one of the motion vector predictors (MVPs) in the list pointed to by the NEARMV-DRL (Dynamic Reference List) index NEWMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference and apply the delta to the MVP. GLOBALMV - Use motion vectors based on frame-level global motion parameters

[0095] In addition, in the mixed reference mode, the following modes can be signaled: NEAR_NEARMV-Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index. NEAR_NEWMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference and transmit the delta MV of the second MV. NEW_NEARMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference and transmit the delta MV of the first MV. NEW_NEWMV - Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as reference and send the delta MV of both MVs. GLOBAL_GLOBALMV - Use MV from each reference based on frame-level global motion parameters.

[0096] Also, according to an exemplary embodiment, AV1 may have motion vector differential coding as well, where AV1 allows for 1 / 8 pixel motion vector precision (or accuracy), and the following syntax is used to signal motion vector differentials for reference frame list 0 or list 1: mv_joint specifies which components of the motion vector differential are non-zero, 0 indicates no nonzero MVD along either the horizontal or vertical direction, 1 indicates that there is nonzero MVD only along the horizontal direction, 2 indicates that there is non-zero MVD only along the vertical direction, 3 indicates there is non-zero MVD along both the horizontal or vertical direction, mv_sign specifies whether the motion vector differential is positive or negative. mv_class specifies the class of the motion vector difference (as shown in Table 3, the higher the class, the larger the magnitude of the motion vector difference); [Table 3] mv_bit specifies the integer part of the offset between the motion vector differential and the starting magnitude of each MV class, mv_fr specifies the first two fractional bits of the motion vector differential, mv_hp specifies the third fractional bit of the motion vector differential.

[0097] Also, according to an example embodiment, CWG-B092 may have adaptive MVD resolution, where in NEW_NEARMV and NEAR_NEWMV modes, the accuracy of the MVD depends on the associated class and the magnitude of the MVD.

[0098] First, fractional MVD may only be allowed if the magnitude of the MVD is less than or equal to one pixel. Second, only one MVD value may be allowed if the value of the associated MV class is greater than or equal to MV_CLASS_1, and the MVD value for each MV class is derived as 4, 8, 16, 32, 64 for MV class 1 (MV_CLASS_1), 2 (MV_CLASS_2), 3 (MV_CLASS_3), 4 (MV_CLASS_4), or 5 (MV_CLASS_5). The allowed MVD values ​​for each MV class are shown in Table 4. [Table 4]

[0099] In addition, if the current block is coded in NEW_NEARMV or NEAR_NEWMV mode, one context is used to signal mv_joint or mv_class, otherwise another context is used to signal mv_joint or mv_class.

[0100] According to an example embodiment, CWG-B092 may also have Joining MVD Coding (JMVD), in which a new inter-coding mode named JOINT_NEWMV may be applied to indicate whether the MVDs of two reference lists are signaled together. When the inter-prediction mode is equal to the JOINT_NEWMV mode, the MVDs of reference list 0 and reference list 1 are signaled together. Therefore, only one MVD named joint_mvd is signaled and transmitted to the decoder, and the delta MVs of reference list 0 and reference list 1 are derived from joint_mvd.

[0101] The JOINT_NEWMV mode may be signaled together with the NEAR_NEARMV, NEAR_NEWMV, NEW_NEARMV, NEW_NEWMV, and GLOBAL_GLOBALMV modes. According to an example embodiment, no additional context is added.

[0102] Also, when JOINT_NEWMV mode is signaled and the POC distances between the two reference frames and the current frame are different, the MVD is scaled for reference list 0 or reference list 1 based on the POC distance. Specifically, the distance between reference frame list 0 and the current frame is denoted as td0 and the distance between reference frame list 1 and the current frame is denoted as td1. If td0 is greater than or equal to td1, joint_mvd is used directly for reference list 0, and the mvd of reference list 1 is derived from joint_mvd based on equation (1).

number

[0103] Otherwise, if td1 is greater than or equal to td0, then joint_mvd is used directly for reference list 1, and the mvd of reference list 0 is derived from joint_mvd based on equation (2).

number

[0104] According to an exemplary embodiment, there is also an improvement of adaptive MVD resolution in CWG-C011, in which a new inter-coding mode named AMVDMV can be added to the single reference case. When the AMVDMV mode is selected, the selection indicates that AMVD is applied to signal MVD. One flag named amvd_flag is added under the JOINT_NEWMV mode to indicate whether AMVD is applied to the joint MVD coding mode. And when the adaptive MVD resolution is applied to the joint MVD coding mode, the MVDs of two reference frames are signaled together, and the accuracy of MVD is explicitly determined by the size of MVD. Otherwise, the MVDs of two (or more) reference frames are signaled together, and other MVD coding may be applied.

[0105] Also, in JMVD, it is assumed that there is linear motion between the backward and forward reference frames, but additional improvements can be made because when the JMVD coding mode is selected for one block, one joint MVD is signaled for both reference frames, and the MVDs of the two reference frames are derived from the joint MVD based on the distance between the reference frame and the current frame. However, the motion between the two reference frames is not always linear, for example, the motion can be slower or faster from the backward reference frame to the forward reference frame.

[0106] As described herein, the orientation of the reference frame is determined by whether the reference frame is before the current frame in display order or after the current frame in display order. Also, according to an exemplary embodiment, see FIG. 13 showing a flowchart 1300, when a coding block of video data is obtained in S130 and it is determined in S131 that a JMVD mode is selected for one coding block, a list of predefined scaling coefficients may be used to derive the MVD of reference list 0 and / or 1 from the signaled joint MVD. According to an exemplary embodiment, a bilateral matching-based method is used to derive a predicted scaling coefficient from the list of predefined scaling coefficients. In S133, in an exemplary embodiment, for each candidate scaling coefficient in the predefined list, as shown in example 1400 of FIG. 14 for a current block 1401, predicted blocks P0 1402 and P1 1403 are generated in S133 using an MV equal to the sum of the MVP and the scaled MVD, and then in S134, the difference between P0 and P1 is calculated and measured by a cost criterion, and the candidate scaling coefficient having the minimum cost obtained as a result of such measurement is used as the predicted scaling coefficient (pred_scale_factor) in S135.

[0107] According to an exemplary embodiment, the cost measures include, but are not limited to, sum of absolute differences (SAD), sum of squared errors (SSE), and sum of absolute transformed differences (SATD) features.

[0108] If in S136 it is decided to signal using the index or flag of the candidate scaling coefficient (scaled_jmvd_flag), then in S137 the index or flag of the candidate scaling coefficient (scaled_jmvd_flag) is signaled, and the predicted scaling coefficient is used as a context for entropy coding of scaled_jmvd_flag in S142.

[0109] Alternatively, if in S138 it is decided to explicitly signal the index or flag (scaled_jmvd_flag) of the candidate scaling coefficient, then the index or flag (scaled_jmvd_flag) of the candidate scaling coefficient is explicitly signaled in S139 along with the pred_scale_factor used to reorder the candidate scaling coefficients, and then the index of the reordered candidate scaling coefficient is signaled and coding proceeds in S142 according to the JMVD described above.

[0110] Alternatively, if in S140 it is determined that instead of signaling an index or flag (scaled_jmvd_flag) of the candidate scaling coefficient, pred_scale_factor is directly used as the scaling coefficient for deriving the final MVD used to generate the predictive block, then in S141 pred_scale_factor is directly used as the scaling coefficient for deriving the final MVD used to generate the predictive block, and then coding proceeds in S142 according to the above-mentioned JMVD.

[0111] Alternatively, other coding processes may be performed at S132, such as any of the processes described above for the coding block obtained at S130.

[0112] According to an exemplary embodiment, the MVD scaling process is the same as the method described in U.S. Patent No. 63 / 328,062, filed April 6, 2022, which is incorporated herein in its entirety.

[0113] According to an exemplary embodiment, the index or flag of the candidate scaling factor (scaled_jmvd_flag) can be either explicitly signaled in the bitstream or implicitly derived from the bilateral matching method (pred_scale_factor), and the choice between explicit signaling and implicit derivation is also signaled in S142.

[0114] According to an example embodiment, the predicted scaling coefficients may be derived from a different group of candidate scaling coefficients compared to an explicitly signaled group of candidate scaling coefficients, and for example, the explicitly signaled candidate scaling coefficients may include a limited number of candidates (e.g., 1, 1 / 2, 2), whereas the predicted scaling coefficients may be derived from a larger set of candidates (e.g., 1, 1 / 8, 2 / 8, 3 / 8, 4 / 8, .., 15 / 8, 16 / 8, ..., 32 / 8).

[0115] According to an example embodiment, motion vector prediction (MVP) may use only MVs of neighboring blocks derived using MVDs with explicitly signaled or default scale factors (e.g., 1) to derive the MVP of a subsequent coding block, such as S130 after S142. If the MV of such a neighboring block is instead derived using an MVD with a scale factor derived using bilateral matching, then the MV of that neighboring block is not used to derive the MVP of such subsequent coding block.

[0116] According to an example embodiment, the candidate scaling coefficients are provided based on coded information including, but not limited to, any one or more of the following: quantization step size or quantization parameter, block size, inter prediction mode, MVD class, MVD resolution, reference picture, MVP index, and MVD scaling coefficients of neighboring blocks.

[0117] According to an example embodiment, the candidate scaling factors are signaled in a high level syntax, including but not limited to, any of the frame headers, slice headers, and sequence headers.

[0118] The techniques described above may be implemented using computer readable instructions, as computer software physically stored on one or more computer readable media, or by one or more tangibly configured hardware processors. For example, FIG. 15 illustrates a computer system 1500 suitable for implementing certain embodiments of the disclosed subject matter.

[0119] The computer software can be coded using any suitable machine code or computer language that can be subjected to mechanisms such as assembly, compilation, linking, etc. to create code containing instructions that can be executed by a computer central processing unit (CPU), graphics processing unit (GPU), etc. directly, or via interpretation, microcode execution, etc.

[0120] The instructions may be executed on various types of computers or computer components including, for example, personal computers, tablet computers, servers, smart phones, gaming consoles, Internet of Things devices, and the like.

[0121] 15 for computer system 1500 are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure, nor should the arrangement of components be interpreted as having a dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of computer system 1500.

[0122] The computer system 1500 may include certain human interface input devices. Such human interface input devices may be responsive to input by one or more human users, such as, for example, tactile input (keystrokes, swipes, data glove movements, etc.), audio input (voice, clapping, etc.), visual input (gestures, etc.), olfactory input (not shown), etc. The human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (e.g., voice, music, ambient sounds), images (e.g., scanned images, photographic images obtained from still image cameras), video (2D video, 3D video including stereoscopic video, etc.).

[0123] The input human interface devices may include one or more of a keyboard 1501, a mouse 1502, a trackpad 1503, a touch screen 1510, a joystick 1505, a microphone 1506, a scanner 1508, and a camera 1507 (only one of each is shown).

[0124] The computer system 1500 may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the senses of a human user, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen 1510, or a joystick 1505, although there may be haptic feedback devices that do not function as input devices), audio output devices (such as speakers 1209, headphones (not shown)), visual output devices (such as screens 1510, including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capabilities, each with or without haptic feedback capabilities, some of which may be capable of outputting two-dimensional visual output, or output in more than three dimensions, via means such as stereographic output, virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown).

[0125] The computer system 1500 may also include human accessible storage devices and their associated media, such as CD / DVD 1511 or CD / DVD ROM / RW 1520 with similar media, thumb drives 1522, removable hard drives or solid state drives 1523, legacy magnetic media such as tapes and floppy disks (not shown), optical media including specialized ROM / ASIC / PLD based devices such as security dongles (not shown), and the like.

[0126] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the subject matter of this disclosure does not encompass transmission media, carrier waves, or other transitory signals.

[0127] The computer system 1500 may also include an interface 1599 to one or more communication networks 1598. The network 1598 may be, for example, wireless, wired, optical. The network 1598 may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of the network 1598 include, for example, local area networks such as Ethernet, cellular networks including wireless LAN, GSM, 3G, 4G, 5G, LTE, etc., television wired or wireless wide area digital networks including cable television, satellite television and terrestrial television, in-vehicle and industrial networks including CANBus, etc. Certain networks 1598 generally require an external network interface adapter attached to a particular general-purpose data port or peripheral bus (1550 and 1551) (e.g., USB port of the computer system 1500, etc.), while other networks are generally built into the core of the computer system 1500 by attachment to the system bus as described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks 1598, computer system 1500 can communicate with other entities. Such communications may be one-way receive only (e.g., broadcast TV), one-way transmit only (e.g., CANbus to a particular CANbus device), or two-way, such as to other computer systems using local area or wide area digital networks. Specific protocols and protocol stacks may be used with each of these networks and network interfaces, as described above.

[0128] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be attached to the core 1540 of the computer system 1500.

[0129] The core 1540 may include one or more central processing units (CPUs) 1541, graphics processing units (GPUs) 1542, graphics adapters 1517, specialized programmable processing units in the form of field programmable gate areas (FPGAs) 1543, hardware accelerators 1544 for specific tasks, etc. These devices may be connected through a system bus 1548, along with read only memory (ROM) 1545, random access memory 1546, internal mass storage 1547 such as an internal non-user accessible hard drive, SSD, etc. In some computer systems, the system bus 1548 may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripherals may be connected to the core's system bus 1548 directly or through a peripheral bus 1551. Architectures for peripheral buses include PCI, USB, etc.

[0130] The CPU 1541, GPU 1542, FPGA 1543, and accelerator 1544 may execute certain instructions that may combine to constitute the aforementioned computer code. This computer code may be stored in ROM 1545 or RAM 1546. Transient data may also be stored in RAM 1546, while persistent data may be stored in, for example, internal mass storage 1547. Cache memory, which may be closely associated with one or more of the CPU 1541, GPU 1542, mass storage 1547, ROM 1545, RAM 1546, etc., may be used to enable fast storage and fast retrieval in any of the memory devices.

[0131] The computer-readable medium can bear computer code for performing various computer-implemented operations. The medium and computer code can be those specially designed and constructed for the purposes of the present disclosure, or they can be of the available kind well known to those skilled in the computer software arts.

[0132] By way of example and not limitation, the architecture 1500, and in particular a computer system having a core 1540, can provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media can be user-accessible mass storage as introduced above, as well as media associated with a particular storage of the core 1540 that is non-transitory in nature, such as the core internal mass storage 1547 or ROM 1545. Software implementing various embodiments of the present disclosure can be stored in such devices and executed by the core 1540. The computer-readable media can include one or more memory devices or chips, depending on the particular need. The software can cause the core 1540, and in particular the processor therein (including a CPU, GPU, FPGA, etc.) to perform a particular process or a particular portion of a particular process described herein, including defining data structures stored in RAM 1546 and modifying such data structures according to a process defined by the software. Additionally or alternatively, a computer system may provide functionality as a result of logic embodied in hardwired or otherwise circuitry (e.g., accelerator 1544), which may operate in place of or in conjunction with software to perform certain operations or certain portions of certain operations described herein. References to software may encompass logic, and vice versa, where appropriate. References to computer-readable media may encompass circuitry (such as integrated circuits (ICs)) that store software for execution, circuitry that embodies logic for execution, or both, where appropriate. The present disclosure encompasses any suitable combination of hardware and software.

[0133] The proposed methods may be used separately or combined in any order. Moreover, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. In the following, the term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU.

[0134] While this disclosure describes several exemplary embodiments, there are alterations, permutations, and various substitute equivalents that fall within the scope of this disclosure. It will thus be appreciated that those skilled in the art will be able to devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within the spirit and scope of the present disclosure. [Explanation of symbols]

[0135] 100 communication system, 101 terminal, 102 terminal, 103 terminal, 104 terminal, 105 network, 201 video source, 202 encoder, 203 capture subsystem, 204 video bitstream, 205 streaming server, 206 copy, 207 streaming client, 208 copy, 209 display, 210 outgoing video sample stream, 211 video decoder, 212 streaming client, 213 uncompressed video sample stream, 300 video decoder, 301 channel, 302 receiver, 303 buffer memory, 304 entropy decoder / parser, 305 scaler / inverse transform unit, 306 motion compensation prediction unit, 307 intra prediction unit, 308 reference picture memory, 309 current picture, 310 aggregator, 311 loop filter, 312 display, rendering device, 313 symbol, 400 Encoder, 401 Video source, 402 Controller, 403 Source coder, 404 Predictor, 405 Reference picture cache, 406 Local video decoder, 407 Coding engine, 408 Entropy coder, 409 Transmitter, 410 Coded video sequence, 411 Communication channel, 557 Reference picture memory, 601 Segment A, 602 Segment B, 603 Segment C, 604 Segment D, 605 Segment E, 606 Segment F, 607 Fourth reference layer, 608 Third reference layer, 609 Second reference layer, 610 First reference layer, 611 Block unit, 800 Local illumination compensation (LIC) diagram, 900 Intra prediction mode, 1000 Example of block partitioning, 1001 Tree representation, 1002 Multi-type tree (MTT) structure, 1100 Example of block partitioning, 1103 block, 1104 block, 1105 block, 1111 coding tree unit (CTU), 1112 64x64 level, 1113 4x4 level, 1115 128x128 level, 1116 10-way structure, 1200 merge mode with motion vector difference (MMVD), 1201 L0 reference, 1202 L1 reference, 1300 flow chart, 1401 current block, 1402prediction block P0, 1403 prediction block P1, 1500 computer system, 1501 keyboard, 1502 mouse, 1503 trackpad, 1505 joystick, 1506 microphone, 1507 camera, 1508 scanner, 1509 speaker, 1510 touch screen, 1511 CD / DVD, 1517 graphics adapter, 1520 CD / DVD ROM / RW, 1522 thumb drive, 1523 removable hard drive or solid state drive, 1540 core, 1541 central processing unit (CPU), 1542 graphics processing unit (GPU), 1543 field programmable gate area (FPGA), 1544 hardware accelerator, 1545 read only memory (ROM), 1546 random access memory, 1547 internal mass storage, 1548 system bus, 1550 General purpose data port or peripheral bus, 1551 General purpose data port or peripheral bus, 1598 communication network, 1599 interface

Claims

1. 1. A method for video coding executed by at least one processor, said method comprising: obtaining a coding block of a video bitstream; determining whether joint coding of motion vector difference (JMVD) is used to predict the coding block; based on a determination that the JMVD is used to predict the coding block, obtaining a list of scaling coefficients and the JMVD from the video bitstream; deriving predicted scaling factors based on said list of scaling factors; deriving a motion vector differential (MVD) for a reference list based on at least the joint motion vector differential and the predicted scaling factor; reconstructing the coding block based on the derived MVD; A method comprising:

2. generating a prediction block for each of the scaling factors in the list of scaling factors; signaling a selection of one of the scaling factors based on a weight difference between a cost metric and each of the predicted blocks; further comprising the prediction block is generated based on each of the scaling factors.

2. A method for video coding according to claim 1.

3. each of the prediction blocks is generated based on a motion vector equal to a motion vector prediction plus a scaled motion vector differential scaled by one of the scaling factors; 3. A method for video coding according to claim 2.

4. the cost metric is based on at least one of a sum of absolute differences (SAD), a sum of squared errors (SSE), and a sum of absolute transformed differences (SATD); 3. A method for video coding according to claim 2.

5. signaling at least one of an index of one of the scaling factors and a flag; entropy coding the flag based on the at least one of the scaling factors; The method for video coding of claim 1 further comprising:

6. 6. The method for video coding of claim 5, further comprising signaling whether the signaling of the at least one of the index and the flag is explicit or implicit in a bitstream.

7. reordering the scaling factors; signaling an index of the reordered scaling coefficients; The method for video coding of claim 1 further comprising:

8. The scaling factor is derived based on at least one of a quantization step size, a quantization parameter, a block size, an inter prediction mode, a motion vector differential (MVD) class, an MVD resolution, a reference picture, a motion vector prediction (MVP) index, and an MVD scaling factor of a neighboring block.

2. A method for video coding according to claim 1.

9. deriving a motion vector prediction (MVP) for at least one coding block subsequent to the coding block based on one of the scaling factors. The method for video coding of claim 1 further comprising:

10. a selection of one of the scaling factors is signaled in at least one of a frame header, a slice header, and a sequence header; 2. A method for video coding according to claim 1.

11. An apparatus configured to perform the method of any one of claims 1 to 10.

12. A computer program product for causing at least one processor to carry out the method of any one of claims 1 to 10.

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