IMPLANTABLE MEDICAL DEVICE CONFIGURED TO PROVIDE INTRACARDIAC PACING - Patent application

Abstract

An implantable medical device (1) configured to provide intracardiac pacing includes an electrode array (11, 12) configured to sense cardiac sense signals, and a processing circuit (15) operatively connected to the electrode array (11, 12). The processing circuit (15) starts a first timer (20) based on a ventricular sense event (Vs), and determines an atrial detection window (T) based on a first timer count output by the first timer (20). sense ) and the atrial detection window (T sense a first pacing delay (AVD) indicating a delay until a ventricular pace signal is to be triggered following a preceding atrial sensed event (As), starting a second timer (24), when an atrial sensed event (As) is identified using the cardiac sense signal after the first timer (20) is released, identifying a first timeout (TO1) based on a comparison of a second timer count output by the second timer (24) to a first pacing delay (AVD) indicating a delay until a ventricular pace signal is to be triggered following a preceding ventricular sensed event (Vs) or a ventricular pace event (Vp), the timer is configured to identify a second timeout (TO2) based on a comparison of the first timer count output by the first timer (20) to a second pacing delay (VVD) indicative of a delay to the signal; identify a third timeout (TO3) based on a comparison of the first timer count output by the first timer (20) to a basic rate interval (BRI) indicative of a longest acceptable interval without a ventricular sensed event (Vs) or a ventricular paced event (Vp); and trigger a ventricular pace signal based on identification of at least one of the first timeout (TO1), the second timeout (TO2), and the third timeout (TO3).

Description

[Technical field]

[0001] The present invention relates generally to an implantable medical device for providing intracardiac pacing, and more particularly to an implantable medical device for providing VDD pacing. [Background technology]

[0002] In an implantable medical device, for example in the form of a leadless pacemaker device, it may be desirable to provide stimulation to a ventricle of a patient's heart, for example the right ventricle, in synchronization with atrial activity To this end, a ventricular pacing action, for example in a so-called VDD pacing mode, takes into account an atrial sense signal in order to control ventricular pacing based on atrial sensed events indicative of atrial activity.

[0003] In recent years, leadless pacemakers have attracted attention. Leadless pacemakers avoid leads in that the pacemaker device itself is implanted in the heart, in contrast to pacemakers that are implanted subcutaneously using leads that extend transvenously into the heart, and the pacemaker has the shape of a capsule for implantation in cardiac tissue, particularly in the right ventricular wall of the right ventricle. Such leadless pacemakers offer the inherent advantage of not using leads, which can reduce the risks to the patient associated with leads that access the heart via a venous route, such as pneumothorax, lead dislodgment, cardiac perforation, venous thrombosis, etc.

[0004] The leadless pacemaker may be specifically designed for implantation in the right ventricle, where it is positioned, for example, along the septal wall of the right ventricle during implantation. For example, when AV node dysfunction occurs but sinus node function remains intact and adequate, the need for ventricular pacing may be indicated. In such cases, a so-called VDD pacing mode therapy may be desirable, particularly with ventricular pacing that occurs according to tracked atrial events and thus requires sensing of atrial activity in order to pace the ventricles in coordination with the intrinsic atrial contraction.

[0005] VDD pacing is specifically motivated by the hemodynamic benefits of atrioventricular (AV) synchrony in patients and takes advantage of adequate sinus node function to trigger ventricular pacing, thereby offering the potential for maximizing ventricular preload, inhibiting AV valve regurgitation, maintaining low mean atrial pressures, and even modulating autonomic and neurohumoral reflexes.

[0006] It has been found that VDD pacing generally requires tracking of atrial events, which requires information about the intrinsic heart rate and the phasing of relative atrial and ventricular events within each cardiac cycle. In the case of leadless pacemaker systems where only one device resides in the right ventricle of the patient, detection of atrial events is inherently more difficult than in traditional multi-lead transvenous embodiments, because the atrial signal is not directly measured by the leadless pacemaker through a direct physical link with the contractile / conduction activity of the heart.

[0007] No. 9,492,668 discloses a leadless pacing device configured for implantation in a ventricle of a patient's heart that is configured to switch between an atrio-ventricular synchronous pacing mode and an asynchronous ventricular pacing mode in response to detection of one or more sensed events, which may be, for example, under-sensing events.

[0008] No. 9,724,519 discloses a leadless pacing device configured to switch from a sensing without pacing mode to a ventricular pacing mode in response to determining that no intrinsic ventricular activity is detected within a ventricular event detection window over at least one cardiac cycle. The ventricular pacing mode can be selected based on whether heart rate oversensing is detected in combination with conduction loss. In some examples, an atrioventricular synchronous pacing mode is selected in response to detecting conduction loss and determining that atrial oversensing is not detected. Additionally, in some examples, an asynchronous ventricular pacing mode is selected in response to detecting both atrial oversensing and conduction loss. Summary of the Invention [Problem to be solved by the invention]

[0009] In particular, it is an object to provide an implantable medical device and a method for operating the implantable medical device that allows ventricular pacing with atrioventricular synchronization when an atrial event is detected, and that allows reliable pacing even when an atrial event cannot be detected. [Means for solving the problem]

[0010] In one aspect, an implantable medical device configured to provide intracardiac pacing includes an electrode array configured to sense cardiac sensed signals and a processing circuit operably connected to the electrode array.

[0011] The processing circuit starts a first timer based on a ventricular sensed event identified using the cardiac sense signals or based on a ventricular pace event, opens an atrial detection window based on a first timer count output by the first timer, starts a second timer if an atrial sensed event is identified using the cardiac sense signals after the atrial detection window is opened, identifies a first timeout based on a comparison of the second timer count output by the second timer to a first pacing delay indicative of a delay until a ventricular pace signal is to be triggered following a preceding atrial sensed event, and outputs a first timer count. the first timer count being output by the first timer to a basic rate interval indicating a longest allowable interval without a ventricular sensed event or a ventricular paced event; and the second pacing delay being indicative of a delay until a ventricular pace signal is to be triggered following a preceding ventricular sensed event or a ventricular paced event; the third timeout being indicative of a comparison of the first timer count output by the first timer to a basic rate interval indicating a longest allowable interval without a ventricular sensed event or a ventricular paced event; and triggering a ventricular pace signal based on an identification of at least one of the first timeout, the second timeout, and the third timeout.

[0012] In particular, the implantable medical device can be a leadless implantable medical device, such as a leadless pacemaker device, and in particular, the implantable medical device can be configured to be implanted within a ventricle of a patient's heart, such as the right ventricle, to provide stimulation within the ventricle of the patient's heart.

[0013] The implantable medical device includes a sensing array, which may include, in particular, a pair of electrodes, by which cardiac sense signals are sensed. The sensing array herein may in particular consist of a single pair of electrodes, by which cardiac sense signals are detected. Such a sensing array with a pair of electrodes may also be referred to as an electrode array. Based on the cardiac sense signals, both atrial and ventricular events are identified. In particular, the sensing array may consist of a tip electrode, in particular a distal tip electrode, located at the tip of the housing of the implantable medical device to be placed in the intracardiac tissue, and a return electrode, in particular a proximal return electrode, located at the housing of the implantable medical device at a certain distance from the tip of the implantable medical device.

[0014] Generally, when detecting an atrial event in a situation where an implantable medical device is implanted in a ventricle of a heart, the signal caused by the atrial event is small and therefore difficult to detect. Therefore, detection of an atrial event is practical only when it is performed within a specific atrial detection window, in which the contribution of other signals, particularly those related to ventricular activity, is small. In this specification, it can be assumed that an atrial event is contained within the atrial detection window when the atrial activity and the ventricular activity are synchronized. When the atrial activity and the ventricular activity are not synchronized, the atrial signal changes its phase position continuously within the cardiac cycle and is not guaranteed to be detectable within the atrial detection window.

[0015] To establish pacing that requires atrial tracking but ensures reliable pacing even when atrial event detection is uncertain, it is proposed herein to implement a timer model that utilizes multiple different timers to enable atrial event detection (when possible), but at the same time ensure that pacing is managed by extrapolating atrial timing information in the temporary absence of atrial event detection.

[0016] To aid in this balance in accessing atrial tracking while ensuring robust bradycardia mitigation in the face of difficult atrial detection, a first timer, also referred to as the main timer, is started based on a identified ventricular sensed or paced event. Thus, the start of the first timer indicates the start of a cardiac cycle.

[0017] Based on the first timer, a start of the atrial detection window is determined, for example, by comparing the first timer count output by the first timer with an atrial detection window start time, and an atrial sensed event is searched for within the atrial detection window.

[0018] If an atrial sensed event is identified within the atrial detection window, a second timer is started, thus measuring the time following detection of an atrial sensed event within the atrial detection window.

[0019] The two timers determine different timeouts, and a ventricular pace signal is triggered based on these timeouts.

[0020] That is, a first timeout is identified based on a comparison of the second timer count output by the second timer to a first pacing delay indicative of a delay until a ventricular pace signal is to be triggered following a preceding atrial sensed event. If a ventricular sensed event is not identified within a time period following a detected atrial sensed event and the first pacing delay is reached without detecting a ventricular sensed event, it can be assumed that a ventricular pace signal should be triggered, and thus a first timeout is identified.

[0021] In addition, the processing circuit is configured to identify a second timeout based on a comparison of the first timer count output by the first timer with a second pacing delay indicative of a delay until a ventricular pace signal is to be triggered following a preceding ventricular sensed or paced event. The first timeout is identified based on the second timer, while the second timeout is identified based on the first timer. If a period of time matching the second pacing delay after a preceding ventricular event (which may be a ventricular sensed or paced event) is found to have elapsed, it is assumed that a ventricular pace signal should be triggered and thus a second timeout is identified. For clarity, if an atrial detection window has been initiated, the second timeout should never occur or be considered invalid. Thus, particularly in a scenario in which an atrial sensed event is not detected within the atrial detection window and therefore the second timer is not started, the second timeout identifies that a ventricular sensed event has not been identified within the appropriate time window (indicated by the second pacing delay) following the preceding ventricular event.

[0022] In addition, the processing circuit is configured to identify a third timeout based on a comparison of the first timer count output by the first timer to a basic rate interval that indicates a longest acceptable interval without a ventricular sensed event or a ventricular paced event. The basic rate interval thus indicates a longest period of time that a patient should experience without either a ventricular sensed event or a ventricular paced event. The basic rate interval may be programmed by a clinician and defines a fallback in the event that neither the first nor the second timeout is identified within the basic rate interval or that a ventricular pace signal is not triggered within the basic rate interval based on the first or second timeout (e.g., when a so-called hysteresis mode is used, as described in more detail below).

[0023] The processing circuit is configured to trigger a ventricular pace signal to cause a pacing action based on at least one of the first timeout, the second timeout, and the third timeout. The triggering of the ventricular pacing herein is not necessarily performed immediately after identifying any one of the timeouts. In one embodiment, the processing circuit is configured to trigger the ventricular pacing based on further processing of the one or more timeouts identified based on the first timer and the second timer. A hysteresis delay can be added to either the main timer interval or the AV delay window.

[0024] In one embodiment, the processing circuitry is configured to set the atrial detection window start time based on an average cardiac cycle interval time.

[0025] Alternatively or additionally, the processing circuitry may be configured to set the first pacing delay based on an average cardiac cycle interval time.

[0026] Alternatively or additionally, the processing circuitry may be configured to set the second pacing delay based on an average cardiac cycle interval time.

[0027] Thus, in certain embodiments, the atrial detection window start time, the first pacing delay, and / or the second pacing delay may not be static, but may be adaptive in response to changes in heart rate. The average cardiac cycle interval time may be determined, for example, based on a ventricular-ventricular interval, which may be measured by using a first timer to measure the timing between subsequent ventricular events. For example, the ventricular-ventricular interval, which is indicative of the heart rate (intrinsic or paced), may be measured over multiple cardiac cycles and averaged, for example, by using a moving average filter, a weighted average filter, or another averaging mechanism, to determine the average cardiac cycle interval time. The atrial detection window start time, the first pacing delay, and / or the second pacing delay may then be set based on the average cardiac cycle interval time to adapt specific timing values ​​based on the actual heart rate indicated by the average cardiac cycle interval time.

[0028] The averaging to determine the average cardiac cycle interval time can be performed using a moving average filter requiring a predetermined number of cardiac cycles, for example between 2 and 16 cardiac cycles.

[0029] The atrial detection window start time, the first pacing delay, and / or the second pacing delay may be set based on a lookup using, for example, an average cardiac cycle interval time as an input. For example, a lookup table can be defined in which the atrial detection window start time, the first pacing delay, and / or the second pacing delay are correlated with different values ​​of the average cardiac cycle interval time, and the atrial detection window start time, the first pacing delay, and / or the second pacing delay can be set based on the lookup table.

[0030] The average cardiac cycle interval times for evaluating the atrial detection window start time, the first pacing delay, and the second pacing delay may be determined to be equal. In another embodiment, the average cardiac cycle interval times for setting the atrial detection window start time, the first pacing delay, and the second pacing delay may be determined differently. For example, when calculating a value of the average cardiac cycle interval time for setting the second pacing delay, a different number of cardiac cycles, for example only the most recent cardiac cycles, may be included in the average compared to the calculation of the average cardiac cycle interval time for setting the atrial detection window start time and the first pacing delay.

[0031] The second pacing delay, also referred to as the flywheel interval, indicates a delay before a ventricular pace is to be triggered following a preceding ventricular sensed or paced event, and may be set according to, for example, an average of the most recent ventricular-to-ventricular intervals, such as to be equal to the average of the most recent ventricular-to-ventricular intervals, or to exceed the average of the most recent ventricular-to-ventricular intervals by a predetermined factor.

[0032] Generally, in one embodiment, the processing circuit is configured to determine a ventricular-to-ventricular interval based on a first timer count at the time of a ventricular sensed or paced event, and to calculate an average cardiac cycle interval time based on the ventricular-to-ventricular interval. Thus, an average cardiac cycle interval time may be determined by continually determining a cardiac cycle length and averaging over a predetermined number of consecutive cardiac cycles, and the atrial detection window start time, the first pacing delay, and / or the second pacing delay may be set based on this average cardiac cycle interval time, e.g., using a lookup based on the average cardiac cycle interval time as an input.

[0033] If the ventricular-ventricular interval cannot be determined over a threshold number of cardiac cycles, particularly if atrial and ventricular sensed events are not available within consecutive cardiac cycles, the processing circuitry may be able to switch to another different source to determine the ventricular-ventricular interval. For example, if no ventricular sensed event is identified within a predetermined number of cardiac cycles, the processing circuitry may be configured to determine the ventricular-ventricular interval based on a sensed signal received using another sensing device other than the electrode array described above. The other sensing device may be a sensing device employing another different sensing technology, such as an accelerometer that measures a motion signal. Thus, if a ventricular sensed event cannot be detected by using a sensing array employing a pair of electrodes, and therefore the value of the ventricular-ventricular interval cannot be determined over a predetermined number of cardiac cycles, the processing circuitry may switch to an alternative source to measure the ventricular-ventricular interval and determine the average cardiac cycle interval time based on the alternative source.

[0034] In another embodiment, if no ventricular or atrial sensed events are available for a predetermined number of cardiac cycles, the average cardiac cycle interval time may be set based on a programmed resting rate.

[0035] The rate of change of heart rate, as indicated by the average cardiac cycle interval time, can be controlled by logic that limits the maximum change per cardiac cycle so that a smooth transition from the previous heart rate to the new heart rate is established.

[0036] In one embodiment, the processing circuit is configured to identify a second timeout when the first timer count matches the second pacing delay and when an atrial sensed event is not identified after the atrial detection window is opened. Thus, the second timeout is identified only if an atrial sensed event is not detected. Thus, the identification of the second timeout is gated by the detection of an atrial sensed event such that the second timeout can be reached only if an atrial sensed event is not detected. The first timeout has priority in that, if an atrial sensed event is detected, it is checked whether a ventricular sensed event is detected within a time interval defined by the first pacing delay following the detection of the atrial sensed event, and the first timeout is identified if a ventricular sensed event is not detected before the first pacing delay is reached.

[0037] In one embodiment, the processing circuit is configured to reset the first and second timers if a ventricular sense event is identified based on the cardiac sense signal or if a ventricular pace event is triggered. Thus, if a ventricular sense event is detected before the first timeout and / or the second timeout is reached, the first and second timers (if started based on detection of an atrial sense event) are reset. Thus, if a ventricular sense event is detected before any of the timeouts are reached, the timeouts are reset and the process begins anew for a new cardiac cycle following the detection of a ventricular sense event. For clarity, only the main timer may be reset and restarted according to a sensed ventricular event. The other timers are not restarted simultaneously with the reset of the main timer, although they may have been reset. However, if a ventricular sense event is not detected and a ventricular pace signal is triggered to cause a ventricular pace event based on any one of the timeouts, the first and second timers are reset as well, which causes the process to begin anew following a ventricular pace event and for a new cardiac cycle following a ventricular pace event.

[0038] In general, the ventricular pace signal may be triggered when any one of the first, second and third timeouts occurs. So far, the third timeout has been focused / tied to the base rate. The third timeout (or the first timeout for that matter) can be limited by an upper tracking rate (UTR) in atrial tracking conditions and a maximum sensor rate (MSR) in accelerometer-driven mode. Thus, when a timeout occurs, the ventricular pace signal is triggered and a ventricular pace event is generated accordingly.

[0039] In particular in scenarios where a ventricular sensed event is likely to occur based on recent history of cardiac activity, such as when recent intrinsic atrioventricular (AV) conduction is present, it may be desirable to postpone the ventricular pace and allow an additional wait period before triggering a ventricular pace signal. This is referred to as a hysteresis mode, in which ventricular sensing should be preferred over ventricular pacing.

[0040] To implement the hysteresis mode, in one embodiment, the processing circuit is configured to start a third timer based on identifying at least one of the first timeout and the second timeout, and to identify a fourth timeout based on a comparison of a third timer count output by the third timer with a hysteresis delay indicative of a delay after the first timeout or the second timeout. Thus, if the first timeout or the second timeout is identified, the ventricular pace signal is not immediately triggered, but rather, another third timer is started and the occurrence of a fourth timeout is monitored based on the timer count of the third timer. In particular, the timer count of the third timer is compared to a hysteresis delay indicative of a delay after said first timeout or said second timeout by which a ventricular pace should occur. If the hysteresis delay is reached and thus a fourth timeout is identified, a ventricular pace signal can be triggered.

[0041] The hysteresis delay may be set, for example, based on the average cardiac cycle interval time, which may be determined by the average of the ventricular-ventricular intervals of successive cardiac cycles, as described above. The hysteresis delay here may be determined based on a lookup using the average cardiac cycle interval time as an input. Alternatively, in a particularly efficient computational approach, the hysteresis delay may be set by multiplying the first pacing delay by a factor, for example in the range between 0.2 and 0.8, for example a factor of 0.5.

[0042] In one embodiment, the processing circuit is configured to automatically switch to the hysteresis mode based on processing of a preceding sensed event. In particular, in one embodiment, the processing circuit is configured to set a hysteresis active signal based on at least one preceding ventricular sensed event, and to start the aforementioned third timer only if the hysteresis active signal is set. Thus, the processing circuit is switched to the hysteresis mode if one or more ventricular sensed events have been identified within the preceding cardiac cycle. Only if the processing circuit is switched to the hysteresis mode and thus the hysteresis active signal is set, is the third timer started, thus employing an additional hysteresis delay after identification of the first or second timeout.

[0043] The hysteresis active signal may be set based on, for example, logic that compares the ratio of ventricular sense to ventricular pace. This logic may be implemented, for example, as an up / down counter. For example, for each ventricular sense event, the counter may count up, while for each ventricular pace event, the counter may count down. If the count may exceed a threshold, the hysteresis active signal may be set. Here, the up step size, the down step size, the up threshold, and the down threshold may be used to optimize the response time when AV conduction first begins to occur after a long pause, and when AV conduction stops after being detected for some time.

[0044] If the hysteresis active signal is not set and thus the hysteresis mode is not used, then the ventricular pace signal may be triggered as soon as the first or second timeout is identified, for example.

[0045] A hysteresis delay may be employed specifically after identifying the first timeout or the second timeout. In addition, a hysteresis delay mechanism may be employed in identifying the third timeout.

[0046] In one embodiment, the processing circuit is configured to reset the third timer if a ventricular sensed event is identified based on the cardiac sense signal or if a ventricular pace event is triggered. Thus, the third timer is reset if a ventricular sensed event is identified before the hysteresis delay is reached or before the end of the hysteresis delay is reached, and thus before the fourth timeout is identified. If a ventricular sensed event is not detected before the hysteresis delay is reached or before the end of the hysteresis delay, a ventricular pace signal is triggered and the third timer is similarly reset to begin the process anew.

[0047] In another aspect, a method for operating an implantable medical device configured to provide intracardiac pacing includes sensing, using an electrode array, a cardiac sense signal; using a processing circuit operably connected to the electrode array, starting a first timer based on a ventricular sensed event identified using the cardiac sense signal or based on a ventricular pace event; using the processing circuit, opening an atrial detection window based on a first timer count output by the first timer; using the processing circuit, if an atrial sensed event is identified using the cardiac sense signal after the atrial detection window is opened, starting a second timer based on a second timer count output by the second timer and a ventricular pace signal to be triggered following a preceding atrial sensed event. comparing, using the processing circuitry, the first timer count output by the first timer to a first pacing delay indicative of a delay until a ventricular pace signal is to be triggered following a preceding ventricular sensed event or a ventricular pace event to identify a first timeout; comparing, using the processing circuitry, the first timer count output by the first timer to a second pacing delay indicative of a delay until a ventricular pace signal is to be triggered following a preceding ventricular sensed event or a ventricular pace event to identify a second timeout; comparing, using the processing circuitry, the first timer count output by the first timer to a basic rate interval indicative of a longest allowable interval without a ventricular sensed event or a ventricular pace event to identify a third timeout; and triggering, using the processing circuitry, a ventricular pace signal based on an identification of at least one of the first timeout, the second timeout, and the third timeout.

[0048] The benefits and advantageous embodiments discussed above for the implantable medical device apply equally to the method, as noted above in this regard.

[0049] The various features and advantages of the present invention can be more readily understood by reference to the following detailed description and the embodiments illustrated in the drawings. [Brief description of the drawings]

[0050] [Figure 1] FIG. 1 is a schematic diagram of a human heart with a leadless implantable medical device implanted in the form of a leadless pacemaker device. [Diagram 2] FIG. 1 is a schematic diagram of a leadless implantable medical device. [Diagram 3] FIG. 1 is a schematic diagram of a processing circuit of one embodiment of a leadless implantable medical device. [Figure 4A] FIG. 2 shows a processed signal in the shape of an intracardiac electrogram (IEGM) processed by a first processing channel of the processing circuit. [Figure 4B] FIG. 4 shows a processed signal processed by a second processing channel of the processing circuit. [Diagram 5] FIG. 1 is a schematic circuit diagram of a timing stage of a processing circuit configured to set multiple timeouts, each based on a different delay. [Figure 6] FIG. 1 illustrates one embodiment of a combining module for combining different timeouts for setting ventricular paces. [Figure 7] FIG. 13 illustrates another embodiment of a combining module for combining different timeouts for setting ventricular paces. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0051] Next, embodiments of the present invention will be described in detail with reference to the drawings, in which like reference numerals refer to like structural elements.

[0052] It should be noted that the embodiments do not limit the present invention but merely represent illustrative examples.

[0053] The present invention proposes to provide a leadless implantable medical device providing intracardiac functionality, in particular ventricular pacing, specifically the so-called VDD pacing mode.

[0054] FIG. 1 shows the human heart, which includes the right atrium RA, the right ventricle RV, the left atrium LA and the left ventricle LV, in whose wall the right atrium RA is located the so-called sinoatrial node SAN, which is formed by a group of cells capable of spontaneously generating electrical impulses that travel through the electrical conduction system of the heart, causing the heart to contract and pump blood through the heart. The atrioventricular node AVN functions to regulate electrical conduction between the atria and the ventricles and is located in the inferior dorsal part of the interatrial septum near the opening of the coronary sinus. From the atrioventricular node AVN extends the so-called bundle of His Hi, which is made up of cardiac muscle cells specialized for electrical conduction and forms part of the electrical conduction system for transmitting electrical impulses from the atrioventricular node AVN through the so-called right bundle branch RBB around the right ventricle RV and the left bundle branch LBB around the left ventricle LV.

[0055] If blockage occurs at the atrioventricular node AVN, the intrinsic electrical conduction system of the heart H may be disrupted and intrinsic stimulation of ventricular activity may be insufficient, i.e., contractions of the right ventricle RV and / or left ventricle LV may be insufficient or irregular. In such cases, a need may be indicated for pacing of ventricular activity by a pacemaker device, which stimulates ventricular activity by injecting stimulation energy into intracardiac tissue, specifically the myocardium M.

[0056] In one embodiment, a leadless implantable medical device 1 is provided for ventricular pacing in the form of a leadless pacemaker device as shown generally in FIGURE 1 having a body 10 formed by a housing for the leadless pacemaker device.

[0057] Although typical leadless implantable medical devices are designed to sense ventricular activity by receiving electrical signals from the ventricle (RV, LV) in which the leadless implantable medical device is located, it can be desirable to provide pacing in the ventricle synchronous with intrinsic atrial activity to achieve atrioventricular (AV) synchrony. Such a pacing mode, also referred to as a VDD pacing mode, requires sensing atrial activity to identify atrial sensed events associated with atrial contractions and pacing the ventricle based on such atrial sensed events.

[0058] Referring now to FIGURE 2, in one embodiment a leadless implantable medical device 1 in the form of a leadless pacemaker device configured to provide intracardiac pacing, particularly in a VDD pacing mode, includes a housing 10 enclosing electrical and electronic components for operating the leadless implantable medical device 1. In particular, processing circuitry 15 is enclosed within the housing 10. Additionally, electrical and electronic components such as a battery 18 are enclosed within the housing 10. The housing 10 provides encapsulation of the components disposed therein, and the housing 10 has the shape of, for example, a cylindrical capsule, for example having a length of less than 4 centimeters, particularly less than 3 centimeters.

[0059] The leadless implantable medical device 1 is to be implanted just on or within endocardial tissue M. For this implant engagement, the leadless implantable medical device 1 has a fixation device 14 in the region of the distal tip 100, e.g. in the form of a Nitinol wire, for engaging the endocardial tissue M to anchor the leadless implantable medical device 1 to tissue in the implanted state.

[0060] The leadless implantable medical device 1 in the embodiment of FIGURE 2 does not include a lead, but rather senses signals related to cardiac activity via an electrode array disposed on the housing 10 and also emits stimulation signals via such an electrode array. In the embodiment of FIGURE 2, the leadless implantable medical device 1 includes a pair of electrodes 11, 12 that form an electrode array operative to emit a pace signal to intracardiac tissue M to provide pacing and to sense electrical signals indicative of cardiac activity, in particular atrial and ventricular contractions. The first electrode 11 is referred to herein as a pacing electrode, e.g., a cathode. The first electrode 11 is disposed at a distal end 100 of the housing 10 and configured for contact with the cardiac tissue M. The second electrode 12 is disposed on the housing 10 of the leadless implantable medical device 1 at some distance from the distal end 100, e.g., closer to an opposite end 101 of the housing 10 from the distal end 100.

[0061] The electrodes 11, 12 are operatively connected to a processing circuit 15. The processing circuit 15 is configured to cause the pair of electrodes 11, 12 to emit pace signals for providing stimulation in the ventricles. The processing circuit 15 is further configured to process signals sensed via the pair of electrodes 11, 12 to provide sensing of cardiac activity, in particular sensing of atrial and ventricular contractions.

[0062] To provide pacing in the ventricle in which the leadless implantable medical device 1 is located, particularly to enable pacing in VDD mode, sensing of atrial activity is required to time pacing in the ventricle for the purpose of achieving atrioventricular (AV) synchrony. For this function, in addition to ventricular near-field signals, atrial far-field signals need to be sensed to identify atrial events.

[0063] Referring now to FIGURE 3, the processing circuitry 15 in one embodiment includes two processing channels 16, 17 for processing signal portions associated with ventricular activity and signal portions associated with atrial activity. As used herein, an intracardiac electrogram (IEGM) typically includes signal portions associated with ventricular activity (particularly the QRS complex) and atrial activity (particularly the P waves), where the signal portions associated with atrial activity result from far-field sources and are therefore much less prominent and of much smaller amplitude than signal portions associated with ventricular activity in the near-field, i.e., in the vicinity of the implantable leadless medical device 1. For this reason, the two processing channels 16, 17 are associated with different gains G1, G2, respectively, with the first processing channel 16 operative to process sensed signals to identify ventricular sensed events Vs with a relatively low gain G1 and the second processing channel 17 configured to process sensed signals to identify atrial sensed events As with a relatively high gain G2.

[0064] To process the sensed signals, both processing channels 16, 17 are connected to an electrode array consisting of electrodes 11, 12. Herein, the signal portions sensed via a pair of electrodes 11, 12 can be distinguished by employing a windowing scheme to enable signal detection of weaker signal portions in the second processing channel 17.

[0065] The first processing channel 16 includes a first amplification stage 161 having a gain G1 and, following the amplification stage 161, a detection stage 162 configured to identify ventricular sensed events Vs.

[0066] The second processing channel 17 includes a second amplification stage 171 having a second gain G2 or another different gain G2 (higher than G1), followed by a windowing stage 172 and a second detection stage 173. The windowing stage 172 functions to identify an atrial detection window in the sensed signal using as input the detected ventricular event Vs provided to the windowing stage 172 by the detection stage 162. The detection stage 173 performs pre-processing of the sensed signal and evaluates and analyzes the processed signal to identify an atrial sensed event As.

[0067] In addition, processing circuitry 15 includes a timing stage 2 which uses timing information sensed from first processing channel 16 and second processing channel 17 to provide pace timing, in particular VDD timing, for achieving synchronous atrial-ventricular pacing, as will be described in more detail below with reference to Figures 5-7.

[0068] 4A and 4B show examples of signals S1, S2 processed in different processing channels 16, 17, with the upper Fig. 4A showing signal S1 processed by a first processing channel 16 and the lower Fig. 4B showing signal S2 processed by a second processing channel 17. As a result of the processing, ventricular sensed events Vs and atrial sensed events As are identified and corresponding markers are output.

[0069] As can be seen from FIG. 4B, the sensing of the atrial sensed event As utilizes a windowing scheme that includes a blanking window T for blanking out signal portions of the signal S2 that may be specifically related to ventricular activity. blank That is, by detecting a ventricular sensed event Vs in the first processing channel 16, the (expected) timing between the atrial measurement event As and the ventricular sensed event Vs can be determined. According to such timing, a blanking window T blankcan be set to exclude signal portions not associated with atrial activity from processing in the second processing path 17. In this manner, strong ventricular signals can be suppressed to prevent signal portions associated with ventricular activity from interfering with the detection of atrial sensed events.

[0070] In general, detection of an atrial sensed event occurs within a blanking window T blank As will be further described below with reference to FIG. sense is the blanking window T blank The restart period begins after the restart.

[0071] Generally, an atrial sensed event As occurs within an atrial detection window T as shown in FIG. sense Within the atrial sense event A s, for example, signal S2 is assumed to be present when it exceeds a sensing threshold ST. If an atrial sense event A s is detected, as is the case for the second cardiac cycle in FIG. 4B, then the atrial sense event A s is used to derive timing information for triggering a ventricular pace (if necessary).

[0072] Referring now to FIG. 5, timing stage 2 of processing circuit 15 determines the time for pacing and also the atrial sensing window T within the cardiac cycle. sense The timing herein may be based on the use of multiple different timers that cause timeouts, whereby a pacing action may be triggered based on at least one of the timeouts.

[0073] It should be noted that the timing stage 2 as described subsequently in accordance with Figures 5 to 7 may be implemented on-chip and therefore hardwired in hardware, in which case it is also possible to implement a timer model as described below in software for execution within the processor of the processing circuit 15.

[0074] Timing stage 2 as shown in one embodiment in FIG. 5 includes a main timer module 20 having the form of a counter, which uses a clock signal C as input and counts up based on this clock signal C, starting from an initial reset state.

[0075] The main timer module 20 is reset at the beginning of each cardiac cycle using a main timer reset command MTR. In particular, upon a ventricular event, which may be a ventricular sensed event Vs due to intrinsic ventricular activity or a ventricular paced event Vp due to a pacing action causing a ventricular contraction, the main timer reset command MTR causes the main timer module 20 to reset, thus starting the count at zero.

[0076] The main timer module 20 feeds its own timer count value (representing the current timer value) to a number of different comparator modules 21, 22, 23 which compare the current timer count value with predefined parameters to determine the atrial detection window T within the current cardiac cycle. sense and determines the timeouts TO2, TO3 based on the output of the main timer module 20.

[0077] The count value of the main timer module 20 is, in particular, set to 0 during the atrial detection window T sense The count value provided by the main timer module 20 is fed to a comparator module 21 which functions to trigger the start of the atrial detection window T. To this end, the comparator module 21 uses as inputs the count value of the main timer module 20 and the atrial detection window start time AWS. A latch module 210 is set based on a comparison between the current count value provided by the main timer module 20 and the atrial detection window start time AWS. That is, when the count value provided by the main timer module 20 reaches the atrial detection window start time AWS, the latch module 210 sets sense is set to a logic on state indicating the start of

[0078] Inverted output of the latch module 210

number

[0079] The positive output Q of the latch module 211 is connected to an AND gate 213, and the inverted output

number

[0080] The AND gate 213 receives the clock signal C as a further input, so that the latch module 211 detects the atrial detection window T sense If the atrial detection window T is in a logic on state, indicating that an atrial event As has been detected within the atrial detection window T, the clock signal C is provided to the timer module 24. Thus, the timer module 24 starts the atrial detection window T. sense The AV timeout TO1 is counted up starting from the detection of an atrial event As in the pacing delay time t1, and the count value is provided to a comparator module 240, which compares the count value with a first pacing delay AVD, also called an atrioventricular delay or an atrial-ventricular delay, and when the count value matches the first pacing delay, the latch module 241 is put into a logic on state. In this case, the AV timeout TO1 is notified at the positive output side of the latch module 241.

[0081] Inverted output of latch module 211

number

[0082] When the second pacing delay VVD is reached and thus the latch module 220 is set to a logic on state, and additionally, the inverted output of the latch module 211

number

[0083] The count value output by the main timer module 20 is further provided to a comparator module 23, which compares the count value with a basic rate interval BRI. When the basic rate interval BRI is reached, which indicates the longest interval that the patient should experience without either a ventricular sense or a ventricular pace occurring, e.g., as programmed by the clinician, the latch module 230 is switched to a logic on state and a third timeout TO3, i.e., the so-called basic rate timeout, is set.

[0084] The count value of the main timer module 20 is further provided to a latch module 25, which outputs the count value in the presence of a ventricular sensed event Vs or a ventricular paced event Vp as combined by an OR gate 250. Thus, the latch module 25 outputs a value for the interval between the preceding ventricular event and the currently occurring subsequent ventricular event as measured for the current cardiac cycle (VVI=VV interval in FIG. 5).

[0085] The intervals output by the latch module 25 can be used to determine an average cardiac cycle interval time, for example by employing a moving average filter in which the intervals output by the latch module 25 are averaged using a moving window over a predetermined number of cardiac cycles.

[0086] In one embodiment, an atrial detection window T sense The average cardiac cycle interval time is used to set the start time AWS for the atrial detection window. In particular, the atrial detection window start time AWS may be set using the average cardiac cycle interval time, e.g., based on a lookup in a stored lookup table.

[0087] In addition, the atrial detection window T sense may also be determined using the average cardiac cycle interval time, for example based on a lookup in a stored lookup table.

[0088] Further, the second pacing delay VVD is set based on the average cardiac cycle interval time. In particular, the second pacing delay VVD can be set to be equal to the average cardiac cycle interval time, thereby indicating the time period until a ventricular sensed event Vs that is to be expected following a preceding ventricular event, or the second pacing delay VVD may be set based on a lookup using the average cardiac cycle interval time as an input.

[0089] In addition, the first pacing delay AVD may be set based on the average cardiac cycle interval time, for example, using a lookup in a stored lookup table.

[0090] The basic rate interval BRI is programmed, for example, by a clinician and is therefore fixed. The basic rate interval BRI generally indicates the longest period of time that a patient should experience without the occurrence of a ventricular event Vp, Vs.

[0091] The atrial sensing window start time AWS, the second pacing delay VVD, the basic rate interval BRI and the first pacing delay AVD are shown in FIG. 4B.

[0092] The multiple different timeouts TO1, TO2, TO3 identified using the schematic circuit of Figure 5 are used as inputs to a combiner module 26 as shown in Figure 6. That is, the multiple different timeouts TO1, TO2, TO3 are combined by an OR gate 260, which causes a ventricular pace Vp to be triggered when any one of the timeouts TO1, TO2, TO3 is identified, thus indicating that one of the first pacing delay AVD, the second pacing delay VVD, and the basic rate interval BRI has elapsed without sensing an inherent ventricular sensed event Vs.

[0093] When a ventricular pace Vp is delivered or when a ventricular sense event Vs is detected before any of timeouts TO1, TO2, or TO3 are latched, a main timer reset command MTR is triggered as the output of OR gate 261 in FIG. 6.

[0094] 5, the main timer reset command MTR resets the main timer module 20 as well as the timer module 24 and the latch modules 210, 220, 230, 241. Thus, the timer modules 20, 24 start counting anew at 0 and the latch modules 210, 220, 230, 241 are set to their respective logic off states.

[0095] 6, a pace event Vp for implementing a ventricular pace is triggered as soon as one of timeouts TO1, TO2, TO3 is detected and thus one of delays AVD, VVD, BRI has elapsed. This corresponds to a mode in which processing circuit 15 operates without hysteresis and therefore without additional delays after the first pacing delay AVD and the second pacing delay VVD have elapsed.

[0096] Referring now to FIG. 7, in a combiner module 27 implementing the hysteresis mode, if the hysteresis state is set to active, a ventricular pace Vp is triggered when an additional hysteresis delay HD has elapsed after detection of one of timeouts TO1, TO2, which represent the elapse of the first pacing delay AVD and the second pacing delay VVD.

[0097] Specifically, timeouts TO1 and TO2 are combined using an OR gate 271, the output of which is provided to AND gates 272 and 273.

[0098] The AND gate 273 here takes as inputs the hysteresis active state (indicating that hysteresis should be used) and the clock signal C, and the output of the AND gate 273 is fed to a timer module 275, which counts up from the time when one of the timeouts TO1, TO2 is detected. The current value of the timer module 275 is fed to a comparator module 276, which compares this count value with the hysteresis delay HD and sets a latch module 277 to a logic on state if the count value output by the timer module 275 matches the hysteresis delay HD. Thus, the latch module 277 sets the hysteresis timeout TO4 if it finds that the hysteresis delay HD has elapsed.

[0099] Signals indicating hysteresis timeout TO4 and basic rate timeout TO3 are provided to OR gate 270, in addition to the output of AND gate 272, which combines the output of OR gate 271 and the hysteresis inactive state (indicating that hysteresis should not be used).

[0100] When hysteresis is inactive and therefore should not be used, the basic rate timeout TO3 along with the AV timeout TO1 and the flywheel timeout TO2 are fed to OR gate 270, which causes a ventricular pace Vp when any one of timeouts TO1, TO2, TO3 is detected. Thus, when hysteresis is inactive, combiner module 27 behaves similarly to combiner module 26 of FIG.

[0101] In contrast, if hysteresis is to be used and thus the hysteresis active state is set, then the basic rate timeout TO3 is provided to OR gate 270 along with a hysteresis timeout TO4 set by latch module 277, which indicates that one of the flywheel timeout TO2 and AV timeout TO1 plus an additional hysteresis delay HD has elapsed. Thus, if one of the basic rate timeout TO3 and hysteresis timeout TO4 is present, then a ventricular pace Vp is triggered.

[0102] If a ventricular pace Vp is triggered or if a ventricular sense event Vs is detected before any of timeouts TO1-TO4 have elapsed, OR gate 274 sets a main timer reset command MTR which resets the circuitry of FIG. 5 and the latch module 277 and timer module 275 in combiner module 27 of FIG. 7.

[0103] The hysteresis active state may be set based on the preceding detection of an atrial-ventricular conduction event in the embodiment of FIG. 7. In general, it may be assumed that a recent detection of an atrial-ventricular conduction event indicates a high probability of intrinsic ventricular activity, and therefore an additional wait time should be provided after the occurrence of timeout TO1 or timeout TO2 to favor intrinsic conduction over ventricular pacing. The hysteresis active state may be evaluated, for example, by employing an up / down counter that counts up for each ventricular sense and counts down for each ventricular pace, based on logic that compares the ratio of ventricular senses to ventricular paces. The hysteresis active state may be set by comparing the count value of the up / down counter, for example, to a threshold value, or alternatively, the hysteresis inactive state may be set such that the hysteresis mode is not employed.

[0104] 5 determines a number of different timeouts based on different delays, which are set at least in part based on the average cardiac cycle interval time. As used herein, reliable pacing depends on being able to reliably detect ventricular sensed events Vs and / or atrial sensed events As, and thus be able to determine the average cardiac cycle interval time over successive cardiac cycles.

[0105] In one embodiment, the timing stage 2 shown in FIG. 5 is based on processing cardiac sensed signals of a sensing array, such as the array of electrodes 11 and 12, hereinafter also referred to as electrode array 11, 12, as described above with reference to FIG. 2. Herein, as shown in FIG. 2, the leadless implantable medical device 1 may include another sensing array 19, which may employ another different sensing technology compared to the electrode array 11, 12. For example, the sensing array 19 may be a motion sensor, such as an accelerometer, for detecting motion signals. Alternatively, the sensing array 19 may be a pressure sensor, a flow sensor, an acoustic sensor, an ultrasonic sensor, an impedance sensor, etc. The sensing array 19 may also be referred to as a sensing device 19. The electrode arrays 11, 12 may also be referred to as sensing arrays 11, 12.

[0106] For example, if it proves impossible to reliably determine the average cardiac cycle interval time based on processing of the cardiac sensing signals output by the electrode arrays 11, 12, the additional sensing array 19 can be used as an alternative source.

[0107] For example, if processing of the sensed signals output by electrode arrays 11, 12 determines that no ventricular sensed events Vs and / or atrial sensed events As have been detected over a predetermined number of cardiac cycles, then processing may switch to an alternate source, such as the sensed signals of sensing array 19, to determine the average cardiac cycle interval time. In particular, if the number of cardiac cycles during which no ventricular sensed events Vs and / or atrial sensed events As are identified exceeds a predetermined threshold, processing may switch to an alternate source, such as the sensed signals of sensing array 19, to determine the average cardiac cycle interval time.

[0108] In the event that the average cardiac cycle interval time cannot be determined based on the electrode arrays 11, 12, and possibly even the additional sensing array 19, a preprogrammed resting rate can be used as another alternative source for setting the average cardiac cycle interval time. Thus, in the event that the average cardiac cycle interval time cannot be set based on sensed ventricular events Vs based on processing of the cardiac sense signals, a switch can be made to the preprogrammed resting rate, which in turn sets the atrial detection window T sense Preprogrammed values ​​for the average cardiac cycle interval time are used to set the start time AWS, the first pacing delay AVD and the second pacing delay VVD.

[0109] Rather than immediately switching to a value of the average cardiac cycle interval time derived based on an alternate source, in one embodiment, logic can be used to control the rate of change of the average cardiac cycle interval time to ensure a smooth transition for the value of the average cardiac cycle interval time when switching from processing the sensed signal to the alternate source. [Explanation of symbols]

[0110] 1. Leadless implantable medical device (leadless pacemaker device) 10 Main body (housing) 100 Tip 101 End 11 First electrode (pacing electrode) 12 Second electrode 14 Fixation device 15 Processing circuit 16 First Processing Channel 161 Amplification stage 162 Detection stage 17 Second Processing Channel 171 Amplification stage 172 Window Treatment Stage 173 Detection stage 18 Battery 19 Sensing device 2 Timing Stage 20 Main Timer 21 Comparator Module 210,211 Latch module 212,213 AND Gate 22 Comparator Module 220 Latch Module 23 Comparator Module 230 Latch Module 24 AV Timer 240 Comparator Module 241 Latch Module 25 Latch Module 250 OR Gates 26 Combiner Module 260,261 OR gate 27 Combiner Module 270,271 OR gate 272,273 AND Gate 274 OR Gate 275 Hysteresis Timer 276 Comparator Module 277 Latch Module As Atrial sensed event AVD First Pacing Delay AVN Atrioventricular Node AWS start time BRI Basic Rate Intervals C Clock G1,G2 gain Hi His bundle HD Hysteresis Delay LA Left atrium LV left ventricle M: Cardiac tissue (myocardium) MTR Main timer reset command RA right atrium RV right ventricle S1,S2 signal SAN sinoatrial node ST detection threshold T blank Blanking Window T sense Detection window TO1~TO4 Timeout V ventricular vector Vp Ventricular pace Vs Ventricular sensed events VVD Second pacing delay (flywheel interval)

Claims

1. An implantable medical device (1) configured to provide intracardiac pacing, wherein the implantable medical device (1) An electrode array (11, 12) configured to sense cardiac signals, A processing circuit (15) operably connected to the electrode array (11, 12), Includes, The processing circuit (15) is Based on a ventricular sensing event (Vs) identified using the cardiac sensing signal, or based on a ventricular pace event (Vp), the first timer (20) is started. Based on the first timer count output by the first timer (20), the atrial detection window (T ｓｅｎｓｅ ) open, The aforementioned atrial detection window (T ｓｅｎｓｅ If an atrial sensing event (As) is identified using the cardiac sensing signal after the opening of the second timer (24), Based on a comparison of a second timer count output by the second timer (24) and a first pacing delay (AVD) indicating the delay to the ventricular pace signal to be triggered following a preceding atrial sensing event (As), a first timeout (TO1) is identified. A second timeout (TO2) is identified based on a comparison between the first timer count output by the first timer (20) and a second pacing delay (VVD) indicating the delay to the ventricular pace signal to be triggered following a preceding ventricular sensing event (Vs) or ventricular pace event (Vp). A third timeout (TO3) is identified based on a comparison between the first timer count output by the first timer (20) and the basic rate interval (BRI) which indicates the longest acceptable interval without a ventricular sensing event (Vs) or ventricular pace event (Vp). It is configured to trigger a ventricular pace signal based on the identification of at least one of the first timeout (TO1), the second timeout (TO2), and the third timeout (TO3), Implantable medical device (1).

2. The processing circuit (15) compares the first timer count output by the first timer (20) with the atrial detection window start time (AWS) and determines the atrial detection window (T ｓｅｎｓｅ It is configured to open ) The implantable medical device (1) according to claim 1.

3. The processing circuit (15) is configured to set the atrial detection window start time (AWS) based on the average cardiac cycle interval time. The implantable medical device (1) according to claim 2.

4. The processing circuit (15) is configured to set the first pacing delay (AVD) based on the mean cardiac cycle interval time. An implantable medical device (1) according to claim 1 or 2.

5. The processing circuit (15) is configured to set the second pacing delay (VVD) based on the mean cardiac cycle interval time. An implantable medical device (1) according to claim 1 or 2.

6. The processing circuit (15) is The ventricular-ventricular interval is determined based on the first timer count at the time of the ventricular sensing event (Vs) or ventricular pace event (Vp), The system is configured to calculate the mean cardiac cycle interval time based on the ventricle-ventricle interval. The implantable medical device (1) according to claim 3.

7. The processing circuit (15) is configured to determine the ventricular-ventricular interval based on a sensing signal received using a sensing device (19) other than the electrode array (11, 12) when no ventricular sensing event (Vs) is identified within a predetermined number of cardiac cycles. The implantable medical device (1) according to claim 6.

8. The processing circuit (15) is used when the first timer count matches the second pacing delay (VVD), and the atrial detection window (T ｓｅｎｓｅ The system is configured to identify the second timeout (TO2) if no atrial sensing event (As) is identified after the opening of the valve. An implantable medical device (1) according to claim 1 or 2.

9. The processing circuit (15) is configured to reset the first timer (20) and the second timer (24) when a ventricular sensing event (Vs) is identified based on the cardiac sensing signal, or when a ventricular pace event (Vp) is triggered. An implantable medical device (1) according to claim 1 or 2.

10. The processing circuit (15) is A third timer (275) is started based on the identification of at least one of the first timeout (TO1) and the second timeout (TO2). The system is configured to identify a fourth timeout (TO4) based on a comparison between a third timer count output by the third timer (275) and a hysteresis delay (HD) indicating the delay after the first timeout (TO1) or the second timeout (TO2). An implantable medical device (1) according to claim 1 or 2.

11. The processing circuit (15) is configured to trigger a ventricular pace signal based on the identification of the fourth timeout (TO4). The implantable medical device (1) according to claim 10.

12. The processing circuit (15) is configured to set the hysteresis delay (HD) based on the mean cardiac cycle interval time. The implantable medical device (1) according to claim 10.

13. The processing circuit (15) is A hysteresis-active signal is set based on at least one preceding ventricular sensing event (Vs), The third timer (275) is configured to start only when the hysteresis active signal is set. The implantable medical device (1) according to claim 10.

14. The processing circuit (15) is configured to reset the third timer (275) when a ventricular sensing event (Vs) is identified based on the cardiac sensing signal, or when a ventricular pace event (Vp) is triggered. The implantable medical device (1) according to claim 10.

15. A method for operating an implantable medical device (1) configured to provide intracardiac pacing, wherein the method is: - A step of sensing a cardiac sensing signal using an electrode arrangement (11, 12), - A step of starting a first timer (20) using a processing circuit (15) operably connected to the electrode array (11, 12) based on a ventricular sensing event (Vs) identified using the cardiac sensing signal, or based on a ventricular pace event (Vp), - Using the processing circuit (15), the atrial detection window (T) is determined based on the first timer count output by the first timer (20). ｓｅｎｓｅ The steps to release ) and - Using the processing circuit (15), the atrial detection window (T ｓｅｎｓｅ The steps include: starting a second timer (24) when an atrial sensing event (As) is identified using the cardiac sensing signal after the opening of the ) - Using the processing circuit (15), the first step of identifying a first timeout (TO1) is obtained by comparing a second timer count output by the second timer (24) with a first pacing delay (AVD) indicating the delay to the ventricular pace signal to be triggered following a preceding atrial sensing event (As), - Using the processing circuit (15), the first timer count output by the first timer (20) and a second pacing delay (VVD) indicating the delay to the ventricular pace signal to be triggered following a preceding ventricular sensing event (Vs) or ventricular pace event (Vp) are compared to identify a second timeout (TO2). - Using the processing circuit (15), the first timer count output by the first timer (20) and the basic rate interval (BRI) indicating the longest acceptable interval without a ventricular sensing event (Vs) or ventricular pace event (Vp) are compared to identify a third timeout (TO3). - Using the processing circuit (15), trigger a ventricular pace signal based on the identification of at least one of the first timeout (TO1), the second timeout (TO2), and the third timeout (TO3), A method that includes this.

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