Vehicle Node Address Allocation Method, Apparatus, Vehicle Device, and Storage Medium

Abstract

This application discloses a method and apparatus for node address allocation in a vehicle, a vehicle device, and a storage medium. Here, the method for node address allocation in a vehicle includes obtaining a node currently waiting for address allocation from a node set by a first addressing method, where the node set includes a plurality of nodes connected to a first bus of the vehicle (step S101), obtaining the address of the node according to the number of addressing command frames in an addressing command sequence, the address carried by the addressing command frame sent to the current node, and the number of frames of the addressing command frame sent to the current node (step S102), and performing address allocation for the node according to the address of the node (step S103). By means of this solution, node allocation is performed, accurate control over the allocation of node addresses is realized, and thus the preset requirements are met.

Description

Technical Field

[0001] This application generally relates to the field of vehicles, and specifically to a method and apparatus for allocating node addresses of a vehicle, a vehicle device, and a storage medium.

Background Art

[0002] The placement rate of in-vehicle ambient lights in household cars is increasing day by day, and the use of multi-color RGB ambient lights is also becoming more and more popular. To enhance the overall atmosphere of the vehicle, the number of ambient lights placed inside the vehicle is gradually increasing. To achieve individual control of ambient lights at different positions, it is necessary to allocate addresses to each ambient light, and thus individual control of each ambient light can be realized based on the address of the ambient light.

[0003] In the prior art, since different types of chips are adopted for ambient lights, there are also differences in the address allocation means of ambient lights, that is, the addressing principles of node addressing methods. For example, the node address results obtained by adopting chips of the MLX 81 series do not match the node address results obtained by adopting chips of Indie Realplum, and thus compatibility of node control solutions cannot be realized. Therefore, the prior solutions need to develop and adapt multiple solutions for different chip addressing methods, and accurate control for requirements cannot be realized.

Summary of the Invention

Problems to be Solved by the Invention

[0004] In view of the above defects or deficiencies in the prior art, it is expected to provide a method and apparatus for allocating node addresses of a vehicle, a vehicle device, and a storage medium.

[0005] In a first aspect, this application provides a method for allocating node addresses of a vehicle, Obtain the nodes waiting for current address assignment from the node set by the first addressing method, where the node set includes a plurality of nodes connected to the first bus of the vehicle, Obtain the address of the node according to the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the frame number of the addressing command frame currently sent to the node, Include the step of performing address assignment to the node according to the address of the node.

[0006] Furthermore, the step of obtaining the nodes waiting for current address assignment from the node set by the first addressing method includes: Sequentially search for nodes from the head node to the tail node in the node set, When the first node waiting for processing without address assignment is searched, set the node waiting for processing as the current node waiting for address assignment, Or, Sequentially search for nodes from the tail node to the head node in the node set, When the first node waiting for processing without address assignment is searched, set the node waiting for processing as the current node waiting for address assignment.

[0007] Specifically, the first addressing method is one of the LSM addressing method and the BSM addressing method.

[0008] In some embodiments, the step of obtaining the address of the node according to the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the frame number of the addressing command frame currently sent to the node includes: A step of obtaining a first difference value between the number of addressing instruction frames in the addressing instruction sequence and the number of frames of the addressing instruction frames transmitted to the current node; A step of obtaining a second difference value between the address of the addressing instruction frame transmitted to the current node and the first difference value; A step of obtaining the address of the node based on the second difference value, including.

[0009] Furthermore, A step of obtaining a node waiting for current address assignment from a node set by a second addressing method; A step of obtaining the address of the node based on the address of the addressing instruction frame transmitted to the current node in the addressing instruction sequence; A step of performing address assignment to the node based on the address of the node, including.

[0010] Specifically, the second addressing method is one of the LSM addressing method and the BSM addressing method, and the second addressing method is different from the first addressing method.

[0011] In a second aspect, the present application provides a node address assignment device for a vehicle, A node determination module, which is used to obtain a node waiting for current address assignment from a node set by a first addressing method, where the node set includes a node determination module including a plurality of nodes connected to a first bus of a vehicle; An address determination module, which is used to obtain the address of the node based on the number of addressing instruction frames in the addressing instruction sequence, the address of the addressing instruction frame transmitted to the current node, and the number of frames of the addressing instruction frame transmitted to the current node; A distribution module, which is used for performing address distribution to the node according to the address of the node, is included.

[0012] Furthermore, the address determination module specifically uses the following operations: obtaining a first difference value between the number of addressing instruction frames in the addressing instruction sequence and the number of addressing instruction frames sent to the current node; obtaining a second difference value between the address carried by the addressing instruction frame sent to the current node and the first difference value; obtaining the address of the node according to the second difference value.

[0013] In a third aspect, the present application provides a vehicle, which includes a node address distribution device for the vehicle.

[0014] In a fourth aspect, the present application provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable by the processor. When the processor executes the program, the method for distributing node addresses of the vehicle according to any one of the embodiments of the present application is realized.

[0015] In a fifth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the method for distributing node addresses of the vehicle according to any one of the embodiments of the present application is realized.

[0016] From the above, based on the method, device, vehicle device, and storage medium for distributing node addresses of the vehicle of the present invention, by obtaining the number of addressing instruction frames in the addressing instruction sequence, the address carried by the addressing instruction frame sent to the current node, and the related number of addressing instruction frames sent to the current node, the address of the node is obtained. The method realizes accurate control for the distribution of the node address, and thus meets the preset requirements.

Brief Description of Drawings

[0017] Other features, objectives, and advantages of this application will become clearer by reading the detailed description of the non-limiting embodiments made with reference to the following drawings.

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Modes for Carrying Out the Invention

[0019] Hereinafter, the present application will be described in more detail by combining the attached drawings and embodiments. It should be noted that the specific embodiments described here are only used to interpret the related invention and do not limit the invention. Also, for ease of explanation, only the parts related to the invention are shown in the drawings.

[0020] Unless they are inconsistent with each other, the embodiments and features of the embodiments of the present application can be combined with each other. Hereinafter, the present application will be described in detail with reference to the drawings and in combination with the embodiments.

[0021] The present application relates to a method for allocating node addresses of a vehicle, which is exemplarily described in the following embodiments of the present application in the vehicle field.

[0022] Specifically, referring to FIG. 1 in detail, the present application provides a method for allocating node addresses of a vehicle. S101: Obtain a node currently waiting for address allocation from a node set by a first addressing method, where the node set includes a plurality of nodes connected to a first bus of the vehicle.

[0023] Specifically, obtain the node address waiting for allocation from the set of all nodes by the selected addressing method, and the node set is all the nodes connected by the current vehicle bus. For example, when the first bus of this vehicle connects three nodes, the node address waiting for allocation should be 3, and the addresses of the nodes may be 0x10, 0x0F, 0x0E, and the total number of nodes can be represented by Max NAD.

[0024] In some embodiments, the step of obtaining a node currently waiting for address allocation from a node set by a first addressing method includes: sequentially searching for nodes from the head node to the tail node in the node set; when searching for the first node waiting for processing where address allocation has not been performed, setting the node waiting for processing as the current node waiting for address allocation; or or sequentially searching for nodes from the tail node to the head node in the node set; when searching for the first node waiting for processing where address allocation has not been performed, setting the node waiting for processing as the current node waiting for address allocation.

[0025] Specifically, first, send Max NAD to distribute the maximum NAD, and distribute it in the order from the larger NAD to the smaller NAD. That is, perform node search from the head node to the tail node in the set. If the address is not assigned to the node, the node waiting for this process is regarded as the node that currently requires address assignment. Or, perform search from the tail node to the head node in the set. If the address is not assigned to the node, the node waiting for this process is regarded as the node that currently requires address assignment.

[0026] Taking an example, the BSM (Bus Shunt Method) addressing method determines the current value difference by the pull-up current source to identify the distal first LIN node, and responds to the NAD distribution waiting command from far to near. That is, perform node search from the tail node to the head node in the set. The Indie Realplum chip adopts the LSM (LIN Switch Method) addressing method. That is, by controlling the opening and closing of the LIN Switch, increase the number of online sub-nodes, start from the proximal first LIN node, turn on each subsequent sub-node from near to far to perform the NAD distribution command response. That is, perform node search from the head node to the tail node in the set. The addressing command at this time is as shown in Table 1.

Table 1

[0027] In some embodiments, the first addressing method is one of the LSM addressing method and the BSM addressing method.

[0028] Specifically, for example, conventional automatic addressing often adopts Melexis MLX81 series chips or Indie Realplum chips and communicates and controls through LIN. The MLX81 series chips adopt the BSM (Bus Shunt Method) addressing method, that is, the current value difference is judged by the pull-up current source to identify the distal first LIN node, and it responds to the NAD (Node address) distribution waiting command from far to near. The Indie Realplum chip adopts the LSM (LIN Switch Method) addressing method, that is, by controlling the opening and closing of the LIN Switch, the number of online sub-nodes is increased. Starting from the proximal first LIN node, each sub-node behind is turned on from near to far to perform the NAD distribution command response.

[0029] The internal structure of the MLX81 series chips is as shown in Figure 2. By closing the constant current source and the pull-up current source, current detection can be realized, and the LIN bus BSM can be made to automatically distribute addresses. The main steps are as follows.

[0030] 1. Turn off the pull-up current generator (Pull up current generator) and the constant current source (Rslave). 2. Test the current value and test the current offset amount. 3. Turn on the pull-up current source. 4. Test the current value at this time as a preliminary measurement. Nodes with a current value smaller than the preset current value will enter the final measurement. The preset current value is 1.2 mA. 5. Turn on the constant current source. 6. Test the current value at this time as the final measurement value. 7. Turn off the pull-up current source and the constant current source.

[0031] At this time, all LIN nodes are serially connected in daisy-chain form, and the connection method is as shown in Figure 3. When testing the current value, turn on the pull-up power supply, perform measurement in advance. If the test current value is greater than the preset current value, this node is not the last node and it is necessary to turn off the pull-up power supply. When the node with a current value smaller than the preset current value enters the final measurement, turn on the constant current source for testing, test the current value at this time, and determine whether the current is greater than the preset current value. When the current value at this time is smaller than the preset value, it is the last node and NAD address allocation is performed. The preset current value is 1.2 mA. After addressing is performed using the BSM method, the node addresses are as shown in Figure 4.

[0032] The Indie Realplum chip adopts the addressing method of LSM. The internal structure of the LIN nodes of this chip is as shown in Figure 5, and the chip LSM addressing node connection diagram is as shown in Figure 6. The next LIN node is turned on by the LIN switch inside the node, and it is identified whether the address has been allocated by judging whether NAD is the initial value. The nodes that have not been allocated NAD are identified and the new NAD is overwritten, so that the LIN bus can automatically allocate addresses. The steps are as follows.

[0033] 1. Disconnect the LIN switch of all nodes. The proximal first node is online. After receiving the NAD command and overwriting the new NAD, this node closes the LIN switch to turn on the second node. 2. After receiving the NAD allocation command, the first node already saves the new NAD. The second node is the initial NAD, and the new NAD is overwritten. This node closes the LIN switch to turn on the third node. 3. Allocate NAD to all nodes. After addressing is performed using the LSM addressing method, the node addresses are as shown in Figure 7.

[0034] S102. Obtain the address of the node based on the number of addressing instruction frames in the addressing instruction sequence, the address of the addressing instruction frame currently transmitted to the node, and the number of frames of the addressing instruction frame currently transmitted to the node.

[0035] Specifically, obtain the address of the node based on the number of addressing instruction frames in the current addressing sequence, the address of the addressing instruction, and the number of current addressing instruction frames. The number of addressings can be represented by Max NAD.

[0036] For example, if the received first frame NAD distribution command NAD is 0xX (Max NAD), all nodes save NAD as 0xX, where X is the number of addressing command frames in the addressing command sequence, and the LIN switch is disconnected, all LIN switches are disconnected. At this time, only the proximal first node is online. If the received second frame NAD distribution command NAD is 0x0(X - 1), this node saves NAD as 0x01{Max NAD - (X - 1)}, and closes the LIN switch to turn on the second node, and the first node LIN switch is closed. At this time, the proximal first node and the second node are online. The first node NAD is 0x01, and the second node NAD is 0xX. If the received NAD distribution command NAD is 0x(X - 2), while modifying the node NAD with NAD of 0xX to 0x02{Max NAD - (X - 2)}, the second node closes the LIN switch to turn on the third node, and the first node and the second node LIN switches are closed. At this time, the proximal three nodes are online. The first node NAD is 0x01, the second node NAD is 0x02, and the third node NAD is 0xX. If the received NAD distribution command NAD is 0x(X - 3), while modifying the node NAD with NAD of 0xX to 0x03{Max NAD - (X - 3)}, the second node closes the LIN switch to turn on the distal second node until it is distributed to the last node and goes online. If the received NAD distribution command NAD is 0x01, while modifying the node NAD with NAD of 0xX to 0x(X - 1), this node closes the LIN switch, and the distal first node is online. This node NAD has already been saved as 0xX.

[0037] In some embodiments, the step of obtaining the address of the node according to the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the frame number of the addressing command frame currently sent to the node is as follows: Obtaining a first difference value between the number of addressing instruction frames in the addressing instruction sequence and the number of addressing instruction frames transmitted to the current node; Obtaining a second difference value between the address carried by the addressing instruction frame transmitted to the current node and the first difference value; Obtaining the address of the node based on the second difference value.

[0038] Specifically, for example, when the number of addressing instruction frames in the addressing instruction sequence is 5, the number of addressing instruction frames transmitted to the current node is 3, the calculated difference value is 2, the current difference value is the first difference value, and based on the address 5 carried by the addressing instruction frame and the first difference value 2, the calculated difference value is 3, the current difference value is the second difference value, and thus, based on the second difference value, it is obtained that the address of the node is NAD 0x03.

[0039] S103. Performing address allocation to the node according to the address of the node.

[0040] Specifically, address allocation is performed based on the node address of the node, and the obtained addresses of each node are as shown in FIG. 4, realizing that the nodes of the LSM and BSM addressing methods are the same, and thus realizing compatibility control.

[0041] In some embodiments, further including: obtaining a node currently waiting for address allocation from the node set by a second addressing method; Obtaining the address of the node according to the address carried by the addressing instruction frame transmitted to the current node in the addressing instruction sequence; Performing address allocation to the node according to the address of the node.

[0042] Specifically, adopt the second addressing method to obtain the node with the currently allocated address from the set of nodes, and use the address carried by the addressing command frame directly sent to the current node as the address of the node. For example, if the node with the address waiting to be allocated currently is 3, the obtained address of the node is 0x03.

[0043] In some embodiments, the second addressing method is one of the LSM addressing method and the BSM addressing method, and the second addressing method is different from the first addressing method.

[0044] Specifically, when the first addressing method is the LSM addressing method, the second addressing method is the BSM addressing method; when the second addressing method is the BSM addressing method, the first addressing method is the LSM addressing method. By adopting the correspondence between the first addressing method and the second addressing method, the obtained NADs of the two addressing methods are made to coincide, thereby realizing compatibility control.

[0045] From the above, based on the vehicle node address allocation method of the present invention, by obtaining the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the related number of the addressing command frame currently sent to the node, the address of the node is obtained, and this method can realize accurate control over the allocation of the node address, and thus meet the preset requirements.

[0046] Furthermore, referring to FIG. 8, a schematic diagram of the vehicle node address allocation device in the embodiment of the present application is shown. The vehicle node address allocation device 200 includes a node determination module 210, an address determination module 220, and an allocation module 230. Here, The node determination module 210 is used to obtain the nodes waiting for current address assignment from the node set by the first addressing method, where the node set includes a plurality of nodes connected to the first bus of the vehicle. The address determination module 220 is used to obtain the address of the node according to the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the frame number of the addressing command frame currently sent to the node. The assignment module 230 is used to perform address assignment to the node according to the address of the node.

[0047] In some embodiments, the address determination module 220 specifically uses obtaining a first difference value between the number of addressing command frames in the addressing command sequence and the frame number of the addressing command frame currently sent to the node, obtaining a second difference value between the address carried by the addressing command frame currently sent to the node and the first difference value, and obtaining the address of the node according to the second difference value.

[0048] From the above, based on the node address assignment device of the vehicle of the present invention, by obtaining the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the related number of the addressing command frame currently sent to the current node, the address of the node is obtained, and the method realizes accurate control over the node address assignment, and thus meets the preset requirements.

[0049] The division of some of the modules or units mentioned in the foregoing detailed description is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied as a plurality of modules or units.

[0050] The system frameworks, functions, and operation instructions of the systems, methods, and computer program products of various embodiments of the present application are shown in the flowcharts and block diagrams in the drawings. In this regard, each block in the flowchart or block diagram can represent a module, a program segment, or a part of the code, and the module, program segment, or part of the code includes executable instructions used to implement one or more defined logic functions. In some alternative implementations, the functions annotated in the blocks can occur in an order different from the order annotated in the drawings. For example, two connected blocks can actually be executed basically in parallel, and sometimes they can be executed in the reverse order, depending on such functions. In addition, each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that executes defined functions or operation instructions, or can also be implemented by a combination of dedicated hardware and computer instructions. The above description is only an explanation of the preferred embodiments of the present application and the applied technical principles. Those skilled in the art should understand that the disclosure scope of the present application is not limited to the technical solutions formed by specific combinations of the above technical features, and other technical solutions formed by arbitrarily combining the above technical features or their equivalent features without departing from the disclosed idea should also be included. For example, a technical solution formed by mutually replacing the above features with technical features having similar functions (not limited thereto) disclosed in the present application.

[0051] In one embodiment, the present application provides a vehicle, which employs a node address allocation device 200 for the vehicle. The node address allocation device 200 for the vehicle includes a node determination module 210, which is used to obtain a node waiting for current address allocation from a node set by a first addressing method. Here, the node set includes the node determination module 210 including a plurality of nodes connected to a first bus of the vehicle, an address determination module 220, which is used to obtain the address of the node according to the number of addressing command frames in an addressing command sequence, the address carried by the addressing command frame sent to the current node, and the number of frames of the addressing command frame sent to the current node. The address determination module 220, and a distribution module 230, which is used to perform address allocation to the node according to the address of the node.

[0052] In some embodiments, the address determination module 220 is specifically used to obtain a first difference value between the number of addressing command frames in the addressing command sequence and the number of frames of the addressing command frame sent to the current node, obtain a second difference value between the address carried by the addressing command frame sent to the current node and the first difference value, and obtain the address of the node according to the second difference value.

[0053] From the above, based on the vehicle of the present invention, by obtaining the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame sent to the current node, and the related number of the addressing command frame sent to the current node, the address of the node is obtained. This method realizes accurate control over the allocation of the node address, and thus meets the preset requirements.

[0054] In one embodiment, an electronic device is provided, which includes a memory, a processor, and a computer program stored in the memory and executable by the processor. When the electronic device executes the computer program, it obtains a node waiting for current address assignment from a node set by a first addressing method, where the node set includes a plurality of nodes connected to a first bus of a vehicle; obtains the address of the node according to the number of addressing command frames in an addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the number of frames of the addressing command frame currently sent to the node; and assigns an address to the node according to the address of the node.

[0055] In one embodiment, when the processor executes the computer program, it sequentially searches for nodes from the head node to the tail node in the node set, and when it searches for the first node waiting for processing without address assignment, it sets the node waiting for processing as the current node waiting for address assignment; or sequentially searches for nodes from the tail node to the head node in the node set, and when it searches for the first node waiting for processing without address assignment, it sets the node waiting for processing as the current node waiting for address assignment.

[0056] In one embodiment, when the processor executes the computer program, it obtains a first difference value between the number of addressing command frames in the addressing command sequence and the number of frames of the addressing command frame currently sent to the node; obtains a second difference value between the address carried by the addressing command frame currently sent to the node and the first difference value; and obtains the address of the node according to the second difference value.

[0057] In one embodiment, when the processor executes a computer program, it further realizes the steps of obtaining, by a second addressing method, a node waiting for current address assignment from a node set; obtaining the address of the node according to the address carried in an addressing command frame sent to the current node in an addressing command sequence; and performing address assignment to the node according to the address of the node.

[0058] The electronic device may be a terminal device, and its internal structure diagram may be as shown in FIG. 9. The terminal device includes a processor, a memory, a communication interface, a display, and an input device connected by a system bus. Here, the processor of the terminal device is used to provide computing and control capabilities. The memory of this terminal device includes a computer-readable storage medium and an internal memory. The computer-readable storage medium stores an operating system and a computer program. The internal memory provides an execution environment for the operating system and the computer program in the computer-readable storage medium. The communication interface of the terminal device is used to perform wired or wireless communication with an external terminal, and the wireless method can be realized through WIFI, a carrier network, near-field wireless communication (NFC), or other technologies. When the computer program is executed by the processor, it realizes a method for starting an application. The display of the terminal device may be a liquid crystal display or an electronic paper display, and the input device of the terminal device may be a touch layer covered on the display, buttons provided on the exterior of the terminal device, a trackball, or a touch pad, or further an external keyboard, touch pad, or mouse, etc.

[0059] Based on the above, according to the electronic device of the present invention, by obtaining the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the associated number of the addressing command frame currently sent to the node, the address of the node is obtained, and the method realizes accurate control over the distribution of node addresses, and thus meets the preset requirements.

[0060] In one embodiment, there is provided a computer-readable storage medium storing a computer program, which, when executed by a processor, realizes steps of: obtaining a node currently waiting for address assignment from a node set by a first addressing method, where the node set includes a plurality of nodes connected to a first bus of a vehicle; obtaining the address of the node according to the number of addressing command frames in the addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the number of frames of the addressing command frame currently sent to the node; and performing address assignment to the node according to the address of the node.

[0061] In one embodiment, when the processor executes the computer program, steps of: sequentially searching for nodes from the head node to the tail node in the node set; and when finding the first node waiting for processing without address assignment, setting the node waiting for processing as the node currently waiting for address assignment are realized; or steps of: sequentially searching for nodes from the tail node to the head node in the node set; and when finding the first node waiting for processing without address assignment, setting the node waiting for processing as the node currently waiting for address assignment are realized.

[0062] In one embodiment, when a processor executes a computer program, steps are implemented to obtain a first difference value between the number of addressing instruction frames in the addressing instruction sequence and the number of addressing instruction frames transmitted to the current node, to obtain a second difference value between the address carried by the addressing instruction frame transmitted to the current node and the first difference value, and to obtain the address of the node based on the second difference value.

[0063] In one embodiment, when a processor executes a computer program, steps are implemented to obtain a node waiting for current address assignment from a node set by a second addressing method, to obtain the address of the node based on the address carried by the addressing instruction frame transmitted to the current node in the addressing instruction sequence, and to perform address assignment to the node based on the address of the node.

[0064] From the above, based on the computer-readable storage medium of the present invention, by obtaining the number of addressing instruction frames in the addressing instruction sequence, the address carried by the addressing instruction frame transmitted to the current node, and the associated number of addressing instruction frames transmitted to the current node, the address of the node is obtained, and the method realizes accurate control over the assignment of the node address, and thus meets the preset requirements.

[0065] Those skilled in the art can understand that all or part of the processes in the above-described method of the embodiment can be realized by using a computer program to instruct related hardware, and the computer program can be stored in a computer-readable storage medium. When the computer program is executed, it can include the processes in the embodiments of each of the above methods. Here, any reference to the memory, database, or other media used in each embodiment provided in this application can include at least one type of computer-readable storage medium and computer-unreadable storage medium. The computer-readable memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical memory, etc. The volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be obtained in many forms, for example, static random access memory (SRAM) and dynamic random access memory (DRAM), etc.

[0066] It should be noted that the orientation or positional relationship indicated by terms such as "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is the orientation or positional relationship shown based on the drawings, which is only for facilitating the description of the present invention and simplifying the description, and does not indicate or imply that the indicated device or element should have a specific orientation and be configured and operated in a specific orientation. Therefore, it should not be understood as limiting the present invention.

[0067] Also, the terms "first" and "second" are only used to explain the purpose, and should not be understood as indicating or implying relative importance or indicating the number of technical features to be indicated. Therefore, the features limited by "first" and "second" can expressly or implicitly include one or more of the said features. In the description of the present invention, the meaning of "a plurality" is two or more unless there are other clear and specific limitations.

[0068] Unless otherwise defined, the technical and scientific terms used in this specification have the same meaning as commonly understood by those skilled in the technical field of the present invention. The terms used in this specification are for the purpose of explaining specific implementation purposes and are not intended to limit the present invention. Terms such as "provided" that appear in this specification can indicate that one component is directly attached to another component, and can also indicate that one component is attached to another component via an intermediate member. In this specification, unless a feature cannot be applied to another embodiment or there is other explanation, the features described in one embodiment can be applied to another embodiment alone or in combination with other features.

[0069] It should be noted that although the present invention has been described by the above embodiments, the above embodiments are only for the purpose of illustration and explanation, and are not intended to limit the present invention within the scope of the described embodiments. Those skilled in the art should understand that more variations and modifications can be made according to the teachings of the present invention, and all of these variations and modifications are included in the claimed scope of the present invention.

Claims

1. A method for allocating node addresses of a vehicle, comprising: obtaining a node currently waiting for address allocation from a node set by a first addressing method, where the node set includes a plurality of nodes connected to a first bus of the vehicle; obtaining the address of the node according to the number of addressing command frames in an addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the number of frames of the addressing command frame currently sent to the node; performing address allocation to the node according to the address of the node. A method for allocating node addresses of a vehicle, characterized by the above.

2. The step of obtaining a node currently waiting for address allocation from a node set by a first addressing method includes: sequentially searching for nodes from the head node to the tail node in the node set; when searching for the first node waiting for processing without address allocation, setting the node waiting for processing as the node currently waiting for address allocation, or or sequentially searching for nodes from the tail node to the head node in the node set; when searching for the first node waiting for processing without address allocation, setting the node waiting for processing as the node currently waiting for address allocation. The node address allocation method according to claim 1, characterized by the above.

3. The first addressing method is one of an LSM addressing method and a BSM addressing method. The node address allocation method according to claim 2, characterized by the above.

4. The step of obtaining the address of the node according to the number of addressing command frames in an addressing command sequence, the address carried by the addressing command frame currently sent to the node, and the number of frames of the addressing command frame currently sent to the node includes: obtaining a first difference value between the number of addressing command frames in the addressing command sequence and the number of frames of the addressing command frame currently sent to the node; obtaining a second difference value between the address carried by the addressing command frame currently sent to the node and the first difference value; A step of obtaining the address of the node according to the second difference value, and the node address allocation method according to any one of claims 1 to 3, characterized in that it includes this.

5. A step of obtaining a node waiting for address allocation from a node set by a second addressing method, A step of obtaining the address of the node according to the address of the addressing command frame sent to the current node in the addressing command sequence, A step of performing address allocation to the node according to the address of the node, and further including this, the node address allocation method according to claim 1, characterized in that it includes this.

6. The second addressing method is one of the LSM addressing method and the BSM addressing method, and the second addressing method is different from the first addressing method, the node address allocation method according to claim 5, characterized in that it includes this.

7. A node address allocation device for a vehicle, A node determination module, which is used to obtain a node waiting for address allocation from a node set by a first addressing method, where the node set includes a node determination module including a plurality of nodes connected to a first bus of the vehicle, An address determination module, which is used to obtain the address of the node according to the number of addressing command frames in the addressing command sequence, the address of the addressing command frame sent to the current node, and the number of frames of the addressing command frame sent to the current node. An address determination module, A distribution module, which is a distribution module used to perform address allocation to the node according to the address of the node, and includes this, the node address allocation device for a vehicle, characterized in that it includes this.

8. The address determination module is Obtaining a first difference value between the number of addressing command frames in the addressing command sequence and the number of frames of the addressing command frame sent to the current node, Obtaining a second difference value between the address of the addressing command frame sent to the current node and the first difference value, Specifically used for obtaining the address of the node according to the second difference value, the node address allocation device for a vehicle according to claim 7, characterized in that it includes this.

9. A vehicle, comprising the node address allocation device for a vehicle according to claim 7 or 8. A vehicle characterized by the above.

10. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein when the processor executes the program, the node address allocation method for a vehicle according to any one of claims 1 to 6 is realized. An electronic device characterized by the above.

11. A computer-readable storage medium, having a computer program stored therein, wherein when the program is executed by a processor, the node address allocation method for a vehicle according to any one of claims 1 to 6 is realized. A computer-readable storage medium characterized by the above.

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