Display device

Abstract

The present application discloses a display device, the display device including a first scanning line, a second scanning line, a first data line, a second data line, a first sub-pixel, and a second sub-pixel, the first sub-pixel including a first thin-film transistor, the second sub-pixel including a second thin-film transistor, the first thin-film transistor being connected to the first scanning line and the first data line, the second thin-film transistor being connected to the second scanning line and the second data line, and the first thin-film transistor being provided alternately with the second thin-film transistor.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to display devices.

Background Art

[0002] VR (Virtual Reality) utilizes simulation technology, computer graphics human-computer interaction technology, multimedia technology, sensing technology, network technology, etc. to simulate the user's vision and provide the user with an immersive experience. With the development of VR displays, the resolution of VR display devices has been increasing, but existing VR display devices cannot improve the resolution due to hardware and software limitations.

Summary of the Invention

[0003] This application provides a display device that can improve the resolution and achieve a high-resolution display effect.

[0004] On the other hand, an embodiment of this application provides a display device, which includes a plurality of scanning lines, a plurality of data lines, and a plurality of sub-pixels. The plurality of scanning lines include a first scanning line and a second scanning line. The first scanning line and the second scanning line are provided at intervals along a first direction. The plurality of data lines include a first data line and a second data line. The first data line and the second data line are provided at intervals along a second direction. The plurality of sub-pixels include a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first thin film transistor. The second sub-pixel includes a second thin film transistor. The first thin film transistor is connected to the first scanning line and the first data line. The second thin film transistor is connected to the second scanning line and the second data line. The first thin film transistor is provided alternately with the second thin film transistor.

[0005] Preferably, in some embodiments of the present application, the extending direction of the channel of the first thin film transistor is mirror symmetric in the second direction with the extending direction of the channel of the adjacent second thin film transistor.

[0006] Preferably, in some embodiments of the present application, the first data lines are alternately arranged along the second direction with the second data lines, and the first scanning lines are alternately arranged along the first direction with the second scanning lines.

[0007] Preferably, in some embodiments of the present application, the plurality of sub-pixels include a plurality of sub-pixel groups, the sub-pixel groups include a first sub-pixel group and a second sub-pixel group, both the first sub-pixel group and the second sub-pixel group include a first sub-pixel row and a second sub-pixel row, the first sub-pixel row includes a plurality of the first sub-pixels provided at intervals along the first direction, the second sub-pixel row includes a plurality of the second sub-pixels provided at intervals along the first direction, wherein the first sub-pixel group is alternately provided with the second sub-pixel group along the second direction, and the first sub-pixel group is mirror symmetric with the second sub-pixel group in the second direction.

[0008] Preferably, in some embodiments of the present application, the display panel includes a plurality of light-shielding portions arranged in one-to-one correspondence with the sub-pixel groups.

[0009] Preferably, in some embodiments of the present application, the display panel includes a substrate and spacers, the light-shielding portion has a front projection on the substrate covering the front projection of the spacer on the substrate, the spacer is provided between two adjacent first sub-pixels along the second direction, and / or the spacer is provided between two adjacent second sub-pixels along the second direction.

[0010] Preferably, in some embodiments of the present application, the front projection of the spacer on the substrate at least partially overlaps with the front projection of the second scanning line on the substrate.

[0011] Preferably, in some embodiments of the present application, the display device includes a substrate, the first data line is provided on the substrate, the second data line is provided on a side of the first data line away from the substrate, and a front projection of the first data line on the substrate at least partially overlaps with a front projection of the second data line on the substrate.

[0012] Preferably, in some embodiments of the present application, the display device includes a display area and a non-display area provided around the display area. The sub-pixels are provided in the display area, and a first driving module, a second driving module, a multi-cascaded first gate driving unit, and a multi-cascaded second gate driving unit are provided in the non-display area. The first driving module is connected to the first gate driving unit, the second driving module is connected to the second gate driving unit, and the first gate driving unit and the second gate driving unit are respectively located on opposite sides facing each other along the second direction in the non-display area. Among them, the first gate driving unit is connected to at least two of the scanning lines, and the second gate driving unit is connected to at least two of the scanning lines.

[0013] Preferably, in some embodiments of the present application, the scanning line includes a first sub-scanning line and a second sub-scanning line. The first sub-scanning line and the second sub-scanning line are arranged at intervals along the second direction. The first sub-scanning line is connected to the first gate driving unit, and the second sub-scanning line is connected to the second gate driving unit.

[0014] Preferably, in some embodiments of the present application, the first gate driving unit is connected to two adjacent first sub-scanning lines, and the second gate driving unit is connected to two adjacent second sub-scanning lines.

[0015] Preferably, in some embodiments of the present application, the first gate driving unit is connected to the first scanning line, and the second gate driving unit is connected to the second scanning line.

[0016] Preferably, in some embodiments of the present application, the first gate driving unit is connected to two adjacent first scanning lines, and / or the second gate driving unit is connected to two adjacent second scanning lines.

[0017] Preferably, in some embodiments of the present application, a source driving chip is further provided in the non-display area, the source driving chip includes a plurality of first source driving chips and a plurality of second source driving chips, the first driving module is connected to the first source driving chip, the second driving module is connected to the second source driving chip, and the source driving chip is connected to the data line.

[0018] Preferably, in some embodiments of the present application, the first source driving chip, the second source driving chip, the first driving module, and the second driving module are located on the same side along the first direction in the non-display area.

[0019] Preferably, in some embodiments of the present application, the plurality of first source driving chips are respectively connected to a plurality of first data lines, and the plurality of second source driving chips are respectively connected to a plurality of second data lines.

[0020] Preferably, in some embodiments of the present application, the first gate driving unit is connected to two adjacent first scanning lines, and / or the second gate driving unit is connected to two adjacent second scanning lines.

[0021] Preferably, in some embodiments of the present application, the first driving module and the second driving module are located on both sides along the first direction in the non-display area.

[0022] Preferably, in some embodiments of the present application, the sub-pixel further includes an opening area, and the cross-sectional shape of the opening area along the horizontal direction is substantially "P" shaped.

[0023] Preferably, in some embodiments of the present application, the first sub-pixel includes a first opening region, the second sub-pixel includes a second opening region, and two adjacent second opening regions along the second direction are mirror-symmetrical along the first direction, and two adjacent first opening regions along the second direction are mirror-symmetrical along the first direction.

Advantages of the Invention

[0024] The display device provided by the present application includes a plurality of scanning lines, a plurality of data lines, and a plurality of sub-pixels. The plurality of scanning lines include a first scanning line and a second scanning line. The first scanning line and the second scanning line are provided at intervals along a first direction. The plurality of data lines include a first data line and a second data line. The first data line and the second data line are provided at intervals along a second direction. The plurality of sub-pixels include a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first thin film transistor, and the second sub-pixel includes a second thin film transistor. The first thin film transistor is connected to the first scanning line and the first data line, and the second thin film transistor is connected to the second scanning line and the second data line. The first thin film transistor is provided alternately with the second thin film transistor. The display device provided by the present application provides a first data line and a second data line, so that the first sub-pixel is connected to the first data line, and the second sub-pixel is connected to the second data line, that is, without increasing the load of the pixel driving circuit, and the sub-pixels in odd-numbered columns and the sub-pixels in even-numbered columns are provided with data signals by different data lines respectively, and thus the resolution of the display device is effectively improved, and a high-resolution display effect is realized.

Brief Description of the Drawings

[0025]

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Embodiments for Carrying Out the Invention

[0026] As shown in FIG. 1, the embodiment of the present application provides a display device 100. The display device 100 includes a display panel 110. The display panel 110 includes a plurality of scanning lines 10, a plurality of data lines 20, and a plurality of sub-pixels 30. The plurality of scanning lines 10 includes a first scanning line 11 and a second scanning line 12. The first scanning line 11 and the second scanning line 12 are provided at intervals along the first direction Y. The plurality of data lines 20 includes a first data line 21 and a second data line 22. The first data line 21 and the second data line 22 are provided at intervals along the second direction X. The plurality of sub-pixels 30 includes a first sub-pixel 31 and a second sub-pixel 32. The first sub-pixel 31 includes a first thin film transistor 311. The second sub-pixel 32 includes a second thin film transistor 321. The first thin film transistor 311 is connected to the first scanning line 11 and the first data line 21. The second thin film transistor 321 is connected to the second scanning line 12 and the second data line 22. The first thin film transistor 311 and the second thin film transistor 321 are provided alternately.

[0027] The display device provided by the present application provides the first data line 21 and the second data line 22, connects the first thin film transistor 311 to the first data line 21, and connects the second thin film transistor 321 to the second data line 22. That is, while not increasing the load of the pixel driving circuit, the sub-pixels 30 in odd-numbered columns and the sub-pixels 30 in even-numbered columns are provided with data signals by different data lines 20 respectively. As a result, the resolution of the display device is effectively improved, and a high-resolution display effect is realized.

[0028] In an embodiment of the present application, the first data line 21 and the second data line 22 are alternately arranged along the second direction X, and the first scanning line 11 and the second scanning line 12 are alternately arranged along the first direction Y. Specifically, the first direction Y is the extending direction of the data line 20, and the second direction X is the extending direction of the scanning line 10.

[0029] In an embodiment of the present application, the pixel unit includes one first sub-pixel 31 and two second sub-pixels 32, or includes one second sub-pixel 32 and two first sub-pixels 31. That is, each pixel cell is driven by two data lines 20 (the first data line 21 and the second data line 22).

[0030] In an embodiment of the present application, the display device 100 includes a display area AA and a non-display area NA provided around the display area AA. In the display area AA, sub-pixels 30, a scanning line 10 and a data line 20 connected to the sub-pixels 30 are provided. In the non-display area NA, a first driving module 40, a second driving module 50, a multi-cascade first gate driving unit 61, and a multi-cascade second gate driving unit 62 are provided. The first driving module 40 is connected to the second gate driving unit 62, the second driving module 50 is connected to the second gate driving unit 62, and the first gate driving unit 61 and the second gate driving unit 62 are respectively located on both sides facing each other along the second direction X in the non-display area NA. Among them, the first gate driving unit 61 is connected to at least two scanning lines 10, and the second gate driving unit 62 is connected to at least two scanning lines 10.

[0031] In the embodiment of the present application, the scanning line 10 includes a first sub-scanning line 13 and a second sub-scanning line 14. The first sub-scanning line 13 and the second sub-scanning line 14 are provided at intervals along the second direction X. The first sub-scanning line 13 is connected to the first gate driving unit 61, and the second sub-scanning line 14 is connected to the second gate driving unit 62. Specifically, both the first scanning line 11 and the second scanning line 12 include the first sub-scanning line 13 and the second sub-scanning line 14. Since the number of sub-pixels 30 connected to the first sub-scanning line 13 is equal to the number of sub-pixels 30 connected to the second sub-scanning line 14, the loads on the first gate driving unit 61 and the second gate driving unit 62 are the same, and luminance unevenness of the display device due to a load difference can be avoided.

[0032] Furthermore, the length of the first sub-scanning line 13 is equal to the length of the second sub-scanning line 14. The plurality of sub-pixels 30 connected to the first sub-scanning line 13 and the sub-pixels 30 connected to the second sub-scanning line 14 are symmetrically distributed along the central axis of the display area AA, and luminance uniformity of the display device can be further ensured.

[0033] In the embodiment of the present application, the first gate driving unit 61 is connected to two adjacent first sub-scanning lines 13, and the second gate driving unit 62 is connected to two adjacent second sub-scanning lines 14. Specifically, the first gate driving unit 61 is respectively connected to the first sub-scanning line 13 of the first scanning line 11 and the first sub-scanning line 13 of the adjacent second scanning line 12. Correspondingly, the second gate driving unit 62 is respectively connected to the second sub-scanning line 14 of the first scanning line 11 and the second sub-scanning line 14 of the adjacent second scanning line 12. Thereby, a scanning signal is input to the same pixel unit by one of the first gate driving unit 61 or the second gate driving unit 62, which is advantageous for improving the charging time of the sub-pixel 30 and improving the cascade stability of the gate driving circuit.

[0034] In the embodiment of the present application, a source driving chip 70 is further provided in the non-display area NA. The source driving chip 70 includes a plurality of first source driving chips 71 and a plurality of second source electrode driving chips 72. The first driving module 40 is connected to the first source driving chip 71, the second movable module is connected to the second source driving chip 72, and the source electrode driving chip 70 is connected to the data line 20.

[0035] Specifically, the plurality of first source driving chips 71 and the plurality of second source driving chips 72 are both provided at intervals along the second direction X. The first driving module 40 and the first source driving chip 71 are provided corresponding to each other along the first direction Y, and the second driving module 50 is provided corresponding to the second source driving chip 72 along the first direction Y. By connecting the first source driving chip 71 / second source driving chip 72 to a plurality of data lines 20 respectively, a scanning signal is input to three or more sub-pixels 30 in the same pixel unit by the same first gate driving unit 61 / second gate driving unit 62, and a data signal is input by the same first source driving chip 71 / second source driving chip 72, ensuring the identity of the scanning signal and the data signal, and avoiding display anomalies caused by differences in signal input.

[0036] In the embodiment of the present application, the first source driving chip 71, the second source driving chip 72, the first driving module 40, and the second driving module 50 are located on the same side as the first direction Y of the non-display area NA.

[0037] In the embodiment of the present application, the display device further includes a light-emitting substrate 101 including a plurality of light-emitting regions, and a plurality of light-emitting elements are provided in the light-emitting regions. The light-emitting elements include micro light-emitting diodes or sub-millimeter light-emitting diodes. The on / off or brightness / darkness degree of the light-emitting elements in each light-emitting region depends on the gradation of the corresponding position in the image displayed on the display device. During the period of the display screen of one frame, the light-emitting regions emit light sequentially. The time when the light-emitting regions emit light is synchronized with the writing time of the display data, and the light-emitting regions start to emit light with a delay of half a frame from the writing time of the display data. The diffusion range of the light rays emitted by the light-emitting elements is within 1 to 3 adjacent light-emitting regions. The light-emitting regions that emit light simultaneously account for 5% to 25% of all the light-emitting regions.

[0038] In the embodiment of the present application, the display device further includes an image processing module. The image processing module processes the image signal input from the host side and is used to output image data to the backlight driving circuit. The image data includes a backlight driving signal and a synchronization signal, and the synchronization signal is used to ensure the synchronization between the backlight and the display image. As shown in FIG. 2, the display image of one frame includes three sub-frames, and the image processing module simultaneously outputs a backlight driving signal and a synchronization signal to the backlight driving circuits corresponding to the three sub-frames. Specifically, the sub-frame image and the backlight data newly generated by the image processing module are stored in the corresponding buffers respectively. The first driving module and the second driving module realize the synchronization of the display image under the control of the synchronization signal output by the image processing module.

[0039] In the embodiments of the present application, there may be one driving module. The first source driving chip and the corresponding second source driving chip are controlled to output data signals synchronously under the control of the synchronization signal output by the image processing module, and the first gate driving unit and the corresponding second gate driving unit are controlled to output scanning signals synchronously, ensuring that the backlight and the display panel are driven according to a preset sequence. At the same time, it is ensured that a plurality of sub-frame screens are displayed synchronously, and abnormal screens caused by asynchrony of image data can be avoided.

[0040] As shown in FIG. 3, the extending direction of the channel of the first thin film transistor 311 and the extending direction of the channel of the adjacent second thin film transistor 321 are mirror-symmetrical in the second direction X. Thereby, the design patterns of the first thin film transistor 311 and the second thin film transistor 321 are made to coincide, and the design patterns of adjacent sub-pixels 30 are different due to the influence of process variations. As a result, the channel lengths of the thin film transistors in the sub-pixel 30 do not coincide, and differences in device performance are generated, which can avoid affecting the display effect.

[0041] In the embodiments of the present application, the number of the first sub-pixels 31 connected to the first data line 21 is the same as the number of the second sub-pixels 32 connected to the second data line 22. The first sub-pixels 31 are located in odd rows, and the second sub-pixels 32 are located in even rows. Alternatively, the first sub-pixels 31 are located in even rows, and the second sub-pixels 32 are located in odd rows.

[0042] As shown in FIG. 4, the plurality of sub-pixels 30 include a plurality of sub-pixel groups 33. The sub-pixel group 33 includes a first sub-pixel group 331 and a second sub-pixel group 332. Both the first sub-pixel group 331 and the second sub-pixel group 332 include a first sub-pixel row and a second sub-pixel row. The first sub-pixel row includes first sub-pixels 31 provided at intervals along a plurality of first directions Y. The second sub-pixel row includes second sub-pixels 32 provided at intervals along a plurality of first directions Y. Among them, the first sub-pixel group 331 is alternately provided with the second sub-pixel group 332 along the second direction X. The first sub-pixel group 331 is mirror-symmetrical with the second sub-pixel group 332 in the second direction X. That is, the sub-pixel group 33 includes four pixel rows. The sub-pixel group 33 includes a first sub-pixel row, a second sub-pixel row, a second sub-pixel row, and a first sub-pixel row in the second direction X, respectively.

[0043] In the embodiment of the present application, two adjacent first sub-pixels 31 are mirror-symmetrical in the second direction X, and two adjacent second sub-pixels 32 are mirror-symmetrical in the second direction X. Specifically, the extending directions of the channels of two adjacent first thin film transistors 311 are mirror-symmetrical in the second direction X, and the extending directions of the channels of two adjacent second thin film transistors 321 are mirror-symmetrical in the second direction X. Thereby, the design patterns of the first thin film transistor 311 and the second thin film transistor 321 are made to coincide, and the design patterns of adjacent sub-pixels 30 are different due to the influence of process variations. As a result, the channel lengths of the thin film transistors in the sub-pixels 30 do not coincide, and differences in device performance occur, which can avoid affecting the display effect.

[0044] In the embodiment of the present application, the number of first sub-pixels 31 connected to the first data line 21 is the same as the number of second sub-pixels 32 connected to the second data line 22. The sum of the number of first sub-pixels 31 connected to one first data line 21 and the number of second sub-pixels 32 connected to one second data line 22 is equal to the number of scanning lines provided at intervals along the first direction Y. Among them, the first sub-pixels 31 are located in odd rows, and the second sub-pixels 32 are located in even rows. Alternatively, the first sub-pixels 31 are located in even rows, and the second sub-pixels 32 are located in odd rows.

[0045] As shown in FIG. 5, the display device includes a plurality of light-shielding portions 80, and the light-shielding portions 80 are provided in a one-to-one correspondence with the sub-pixel groups 33. That is, one light-shielding portion 80 is provided corresponding to the non-display area in one sub-pixel group 33. The non-display area includes a space area between the scanning lines 10 (the first scanning line 11 and the second scanning line 12), the data lines 20 (the first data line 21 and the second data line 22), the thin film transistors, and the sub-pixels 30 (the first sub-pixel 31 and the second sub-pixel 32).

[0046] In the embodiment of the present application, two second sub-pixels 32 adjacent in the second direction X and two first sub-pixels 31 adjacent along the second direction X in the same sub-pixel group 33 are repeat units, that is, each four sub-pixels 30 arranged in a "field" shape in the same sub-pixel group 33 are repeat units. Specifically, the light-shielding portions 80 may be provided in a one-to-one correspondence with the repeat units, that is, the plurality of light-shielding portions 80 may be arranged in an array.

[0047] In the embodiment of the present application, the sub-pixel 30 further includes an opening region 34. Specifically, the first sub-pixel 31 includes a first opening region 341, the second sub-pixel 32 includes a second opening region 342, two second opening regions 342 adjacent along the second direction X are mirror-symmetrical along the first direction Y, and two first opening regions 341 adjacent along the second direction X are mirror-symmetrical along the first direction Y. Specifically, the cross-sectional shape of the opening region 34 in the horizontal direction is substantially "P" shaped. Accordingly, the positions of the light-shielding portion 80 corresponding to two adjacent second thin film transistors 321 in the same sub-pixel group 33 are substantially rhombic.

[0048] In an embodiment of the present application, the display device includes a substrate 101 and spacers 90. The light-shielding portion 80 has a projection on the substrate 101 that covers the projection of the spacer 90 on the substrate 101. The spacer 90 is provided between two adjacent second sub-pixels 32 along the second direction X. Specifically, the spacer 90 is provided between two adjacent second thin-film transistors 321 in the same sub-pixel group 33 and is located in a substantially rhombus-shaped region of the light-shielding portion 80.

[0049] In an embodiment of the present application, the projection of the spacer 90 on the substrate 101 at least partially overlaps with the projection of the second scanning line 12 on the substrate 101. Among two adjacent sub-pixel groups 33 in FIG. 5, a spacer 90 is provided between two adjacent second sub-pixels 32 along the second direction X, and the projection of the spacer 90 on the substrate 101 partially overlaps with the projection of the second scanning line 12 on the substrate 101.

[0050] In an embodiment of the present application, the spacer 90 may be provided between two adjacent first sub-pixels 31 along the second direction X. Specifically, among two adjacent sub-pixel groups 33, a plurality of spacers 90, such as two, three, four, five, six, etc., may be provided between two adjacent first sub-pixels 31 along the second direction X. The cross-sectional areas of the plurality of spacers 90 along the first direction Y / second direction X may be equal, or may not be equal. That is, the sizes of the plurality of spacers 90 may be the same, or may be different. By providing the light-shielding portion 80 on the spacer 90 only, the light-shielding portion 80 provided only on the spacer 90 can be omitted, which is advantageous for simplifying the process and improving the aperture ratio of the pixel at the same time.

[0051] In an embodiment of the present application, the spacer 90 may be provided between two adjacent first sub-pixels 31 along the second direction X and between two adjacent second sub-pixels 32 along the second direction X.

[0052] As shown in FIG. 6, the display device includes a substrate 101. The first data line 21 is provided on the substrate 101. The second data line 22 is provided on the side of the first data line 21 away from the substrate 101. At least a part of the orthographic projection of the first data line 21 on the substrate 101 overlaps with the orthographic projection of the second data line 22 on the substrate 101. Preferably, the first data line 21 and the second data line 22 are arranged to overlap along the thickness direction of the substrate 101. Further, the polarities of the data signals of the first data line 21 and the second data line 22 arranged to overlap along the thickness direction of the substrate 101 are the same, and may be the same positive polarity or negative polarity.

[0053] Specifically, the display device further includes a light-shielding portion 80, a first insulating layer 102, an active layer 103, a second insulating layer 104, a gate layer 105, a gate insulating layer 106, a first data line 21, a third insulating layer 107, a second data line 22, and a drain electrode 23, which are sequentially provided on the substrate 101. Among them, the first sub-pixel 31 is connected to the first data line 21. The source electrode 21 of the first sub-pixel 31 is arranged in the same layer as the first data line 21. The drain electrode 23 is provided in the same layer as the second data line 22. The second sub-pixel 32 is connected to the second data line 22. Accordingly, the source electrode 22 of the second sub-pixel 32 is provided in the same layer as the second data line 22. The drain electrode 23 is provided in the same layer as the second data line 22. Thereby, the space occupation rate of the data line 20 in the display area AA can be reduced, and the aperture ratio of the pixel can be improved.

[0054] As shown in FIG. 7, the first sub-pixel 31 is connected to the first scanning line 11. The second sub-pixel 32 is connected to the second scanning line 12. The first sub-pixel 31 is connected to the first data line 21. The first sub-pixel 31 is located on the first side of the first data line 21 / second data line 22. The second sub-pixel 32 is connected to the second data line 22 arranged to overlap. The second sub-pixel 32 is located on the second side opposite to the first side of the second data line 22 / first data line 21. Thereby, the first sub-pixel 31 and the second sub-pixel 32 are alternately connected to the first data line 21 and the second data line 22 along the first direction Y.

[0055] As shown in FIG. 8, the first sub-pixel 31 is connected to the first scanning line 11, the second sub-pixel 32 is connected to the second scanning line 12, the first sub-pixel 31 is connected to the first data line 21, the second sub-pixel 32 is connected to the second data line 22 arranged overlappingly, the first sub-pixel 31 and the second sub-pixel 32 are located on the same side of the second data line 22 / the first data line 21, whereby the first sub-pixel 31 and the second sub-pixel 32 are alternately connected to the first data line 21 and the second data line 22 along the first direction Y.

[0056] As shown in FIG. 9, the present application further provides a display device 200. The difference between the display device 200 and the display device 100 is that in the display device 200, a plurality of first source driving chips 71 are respectively connected to a plurality of first data lines 21, and a plurality of second source driving chips 72 are respectively connected to a plurality of second data lines 22.

[0057] Specifically, the display device 200 includes a plurality of scanning lines 10, a plurality of data lines 20, and a plurality of sub-pixels 30. The plurality of scanning lines 10 include a first scanning line 11 and a second scanning line 12. The first scanning line 11 and the second scanning line 12 are provided at intervals along the first direction Y. The plurality of data lines 20 include a first data line 21 and a second data line 22. The first data line 21 and the second data line 22 are provided at intervals along the second direction X. The plurality of sub-pixels 30 include a first sub-pixel 31 and a second sub-pixel 32. The first sub-pixel 31 is connected to the first scanning line 11 and the first data line 21, and the second sub-pixel 32 is connected to the second scanning line 12 and the second data line 22. The first sub-pixel 31 is provided alternately with the second sub-pixel 32.

[0058] In the embodiment of the present application, the first data line 21 and the second data line 22 are alternately arranged along the second direction X, and the first scanning line 11 and the second scanning line 12 are alternately arranged along the first direction Y. Specifically, the first direction Y is the extending direction of the data line 20, and the second direction X is the extending direction of the scanning line 10.

[0059] In the embodiments of the present application, a pixel unit includes one first sub-pixel 31 and two second sub-pixels 32, or includes one second sub-pixel 32 and two first sub-pixels 31. That is, each pixel cell is driven by two data lines 20 (a first data line 21 and a second data line 22).

[0060] In the embodiments of the present application, the display device 200 includes a display area AA and a non-display area NA provided around the display area AA. In the display area AA, sub-pixels 30, a scanning line 10 and a data line 20 connected to the sub-pixels 30 are provided. In the non-display area NA, a first driving module 40, a second driving module 50, a multi-cascade first gate driving unit 61, and a multi-cascade second gate driving unit 62 are provided. The first driving module 40 is connected to the second gate driving unit 62, the second driving module 50 is connected to the second gate driving unit 62, and the first gate driving unit 61 and the second gate driving unit 62 are respectively located on both opposite sides along the second direction X in the non-display area NA. Among them, the first gate driving unit 61 is connected to at least two scanning lines 10, and the second gate driving unit 62 is connected to at least two scanning lines 10. The source driving chip 70 includes a plurality of first source driving chips 71 and a plurality of second source driving chips 72. The first driving module 40 is connected to the first source driving chip 71, the second driving module is connected to the second source driving chip 72, and the source driving chip 70 is connected to the data line 20.

[0061] In the embodiment of the present application, the first gate driving unit 61 is connected to two adjacent first scanning lines 11, and / or the second gate driving unit 62 is connected to two adjacent second scanning lines 12. The plurality of multi-cascaded first gate driving units 61 and the plurality of multi-cascaded second gate driving units 62 are respectively connected to corresponding clock signal lines CK (CK1, CK2, CK3, CK4, CK5, CK6, CK7, CK8 ···). The first gate driving units 61 and the second gate driving units 62 of the same level are connected to the same clock signal line. For example, the first-level first gate driving unit 61 and the first-level second gate driving unit 62 are both connected to CK1. Specifically, the first gate driving unit 61 may be connected to a plurality of first scanning lines 11, and the second gate driving unit 62 may be connected to a plurality of second scanning lines 12.

[0062] In the embodiment of the present application, the first driving module 40 and the second driving module 50 are located on both sides of the non-display area NA along the first direction Y. The first driving module 40 is provided on the side away from the display area AA of the first source driving chip 71, and the second driving module 50 is provided on the side away from the display area AA of the second source driving chip 72. Specifically, the plurality of first source driving chips 71 and the second source driving chips 72 are all provided at intervals along the second direction X.

[0063] As shown in FIG. 10, the clock signal lines CK (CK1, CK2, CK3, CK4, CK5, CK6, CK7, CK8, ···) connected in one-to-one correspondence with the first gate driving units 61 of the multi-cascade sequentially input high-level signals to the corresponding first gate driving units 61. The first gate driving units 61 sequentially output high-level scanning signals (Gate1, Gate2, ···, GateMK) to the sub-pixels 30 of the corresponding rows under the control of the high-level clock signals. Accordingly, the clock signal lines CK (CK1, CK2, CK3, CK4, CK5, CK6, CK7, CK8, ···) connected in one-to-one correspondence with the second gate driving units 62 of the multi-cascade sequentially input high-level signals to the corresponding second gate driving units 62. The second gate driving units 62 sequentially output high-level scanning signals (Gate1, Gate2, ···, GateMK) to the sub-pixels 30 of the corresponding rows under the control of the high-level clock signals. Among them, a predetermined time is set in the period from when the clock signal of the previous clock line among two adjacent clock lines changes from high level to low level until when the clock signal of the next clock line changes from low level to high level, so as to ensure that the clock signal of the previous clock line has changed to low level before the clock signal of the next clock line changes to high level, and the occurrence of display abnormalities due to the charge miss phenomenon can be avoided. Since each of the sub-pixels within the same pixel unit is connected to two adjacent scanning lines and two data lines, the charging time of the same pixel unit includes the scanning time of the sub-pixels in two rows and the input time of the data voltage twice, which is equivalent to twice the charging time of the pixel unit in the prior art.

[0064] The display device 200 provided by this application provides the first data line 21 and the second data line 22, connects the first sub-pixel 31 to the first data line 21, connects the second sub-pixel 32 to the second data line 22, and the sub-pixels 30 in odd-numbered columns and the sub-pixels 30 in even-numbered columns are provided with data signals by different data lines 20 respectively. As a result, while reducing the load of the data line 20, the charging time of the sub-pixel 30 can be improved to improve the charging situation and the signal transmission stability of the display device can be improved.

[0065] As described above, the display device provided by the embodiments of this application has been described in detail. However, the description of the above embodiments is for helping to understand the inventive concept of this application, and the above description should not be understood as limiting the scope of this application.

Description of Reference Numerals

[0066] 100 Display device 110 Display panel 10 Scanning line 11 First scanning line 12 Second scanning line 20 Data line 21 First data line 22 Second data line 30 Sub-pixel 31 First sub-pixel 32 Second sub-pixel 311 First thin film transistor 321 Second thin film transistor

Claims

1. A display device including a display panel, wherein the display panel includes a first scanning line and a second scanning line, the first scanning line and the second scanning line being a plurality of scanning lines provided at intervals along a first direction, a first data line and a second data line, the first data line and the second data line being a plurality of data lines provided at intervals along a second direction, a first sub-pixel and a second sub-pixel, the first sub-pixel including a first thin film transistor, the second sub-pixel including a second thin film transistor, the first thin film transistor being connected to the first scanning line and the first data line, and the second thin film transistor being connected to the second scanning line and the second data line, and including a plurality of sub-pixels, the first thin film transistor being provided alternately with the second thin film transistor, a display device.

2. The extending direction of the channel of the first thin film transistor is mirror-symmetrical in the second direction with the extending direction of the channel of the adjacent second thin film transistor. The display device according to Claim 1.

3. The first data line and the second data line are alternately arranged along the second direction, and the first scanning line and the second scanning line are alternately arranged along the first direction. The display device according to Claim 2.

4. The plurality of sub-pixels include a plurality of sub-pixel groups, the sub-pixel groups including a first sub-pixel group and a second sub-pixel group, both the first sub-pixel group and the second sub-pixel group including a first sub-pixel row and a second sub-pixel row, the first sub-pixel row including a plurality of the first sub-pixels provided at intervals along the first direction, and the second sub-pixel row including a plurality of the second sub-pixels provided at intervals along the first direction. Among them, the first sub-pixel group is alternately provided with the second sub-pixel group along the second direction, and the first sub-pixel group is mirror-symmetrical with the second sub-pixel group in the second direction. The display device according to Claim 2.

5. The display panel includes a plurality of light-shielding portions arranged in a one-to-one correspondence with the sub-pixel groups. The display device according to Claim 4.

6. The display panel includes a substrate and a spacer, the light-shielding portion having a positive projection on the substrate covering the positive projection of the spacer on the substrate, the spacer being provided between two adjacent first sub-pixels along the second direction, and / or The spacer is provided between two adjacent second sub-pixels along the second direction. The display device according to claim 5.

7. The orthographic projection of the spacer on the substrate at least partially overlaps the orthographic projection of the second scanning line on the substrate. The display device according to claim 6.

8. The display device includes a substrate. The first data line is provided on the substrate, the second data line is provided on a side farther from the substrate of the first data line, and the orthographic projection of the first data line on the substrate at least partially overlaps the orthographic projection of the second data line on the substrate. The display device according to claim 1.

9. The display device includes a display area and a non-display area provided around the display area. The sub-pixels are provided in the display area, and a first driving module, a second driving module, a multi-cascade first gate driving unit, and a multi-cascade second gate driving unit are provided in the non-display area. The first driving module is connected to the first gate driving unit, the second driving module is connected to the second gate driving unit, and the first gate driving unit and the second gate driving unit are respectively located on both sides facing each other along the second direction in the non-display area. Among them, the first gate driving unit is connected to at least two of the scanning lines, and the second gate driving unit is connected to at least two of the scanning lines. The display device according to claim 4.

10. The scanning line includes a first sub-scanning line and a second sub-scanning line. The first sub-scanning line and the second sub-scanning line are arranged at intervals along the second direction. The first sub-scanning line is connected to the first gate driving unit, and the second sub-scanning line is connected to the second gate driving unit. The display device according to claim 9.

11. The first gate driving unit is connected to two adjacent first sub-scanning lines, and the second gate driving unit is connected to two adjacent second sub-scanning lines. The display device according to claim 10.

12. The first gate driving unit is connected to the first scanning line, and the second gate driving unit is connected to the second scanning line. The display device according to claim 9.

13. The first gate driving unit is connected to two adjacent first scanning lines, and / or The second gate driving unit is connected to two adjacent second scanning lines. The display device according to claim 9.

14. A source driving chip is further provided in the non-display area. The source driving chip includes a plurality of first source driving chips and a plurality of second source driving chips. The first driving module is connected to the first source driving chips, the second driving module is connected to the second source driving chips, and the source driving chip is connected to the data line. The display device according to claim 9.

15. The first source driving chip, the second source driving chip, the first driving module, and the second driving module are located on the same side along the first direction in the non-display area. The display device according to claim 14.

16. The plurality of first source driving chips are respectively connected to a plurality of first data lines, and the plurality of second source driving chips are respectively connected to a plurality of second data lines. The display device according to claim 14.

17. The first gate driving unit is connected to two adjacent first scanning lines, and / or The second gate driving unit is connected to two adjacent second scanning lines. The display device according to claim 16.

18. The first driving module and the second driving module are located on both sides along the first direction in the non-display area. The display device according to claim 16.

19. The sub-pixel further includes an opening area, and the cross-sectional shape of the opening area along the horizontal direction is substantially "P" shaped. The display device according to claim 1.

20. The first sub-pixel includes a first opening area, the second sub-pixel includes a second opening area, two adjacent second opening areas along the second direction are mirror-symmetrical along the first direction, and two adjacent first opening areas along the second direction are mirror-symmetrical along the first direction. The display device according to claim 19.

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