Display substrate and display device

Abstract

It is a display substrate and a display device. The display substrate includes a first display area and a second display area located on at least one side of the first display area, and the light transmittance of the first display area is greater than that of the second display area. A plurality of first light-emitting devices are provided in the first display area, a plurality of first pixel driving circuits and a plurality of second pixel driving circuits are provided in the second display area, and a plurality of second light-emitting devices are further provided in the second display area. The first pixel driving circuit is configured to drive the first light-emitting device, and the second pixel driving circuit is configured to drive the second light-emitting device. The second display area is respectively connected to the plurality of first pixel driving circuits and the plurality of second pixel driving circuits, and further includes a plurality of initialization signal lines configured to apply an initialization signal to the first light-emitting device and the second light-emitting device. The first pixel driving circuit and the second pixel driving circuit are respectively connected to different initialization signal lines. As a result, the difference in display between the first display area and the second display area can be improved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a display substrate and a display device.

Background Art

[0002] With the continuous development of display technology, the display technology of Organic Light Emitting Diode (OLED) is increasingly used in various electronic products due to advantages such as self-luminescence, wide viewing angle, high contrast, low power consumption, and high response speed.

[0003] On the other hand, the requirements for the screen occupancy rate of display devices such as smartphones and tablet computers are increasing. The design of arranging some functional components of these display devices under the screen has become a new research hotspot. For example, the design of a Full Display Camera (FDC) realizes an extremely high screen occupancy rate by arranging the camera of the display device under the screen.

Summary of the Invention

[0004] Embodiments of the present disclosure provide a display substrate and a display device. By connecting the first pixel driving circuit in the first display area and the second pixel driving circuit in the second display area to different initialization signal lines, different initialization signals can be applied to the first light-emitting device and the second light-emitting device respectively. Thereby, the difference in display between the first display area and the second display area can be improved, and the display effect can be enhanced.

[0005] At least one embodiment of the present disclosure provides a display substrate including a first display area and a second display area located on at least one side of the first display area. The light transmittance of the first display area is greater than that of the second display area. In the first display area, a plurality of first light-emitting devices are arranged in an array along a first direction and a second direction intersecting each other. In the second display area, a plurality of first pixel driving circuits and a plurality of second pixel driving circuits are arranged in an array along the first direction and the second direction. In the second display area, a plurality of second light-emitting devices are further provided. The first pixel driving circuit is configured to drive the first light-emitting device, and the second pixel driving circuit is configured to drive the second light-emitting device. The second display area is connected to the plurality of first pixel driving circuits and the plurality of second pixel driving circuits respectively, and further includes a plurality of initialization signal lines configured to apply an initialization signal to the first light-emitting device and the second light-emitting device. The first pixel driving circuit and the second pixel driving circuit are connected to different ones of the initialization signal lines respectively.

[0006] For example, in the display substrate provided by an embodiment of the present disclosure, the first pixel driving circuit and the second pixel driving circuit located in the same row are connected to different ones of the initialization signal lines, and / or the first pixel driving circuit and the second pixel driving circuit located in the same column are connected to different ones of the initialization signal lines.

[0007] For example, in the display substrate provided by an embodiment of the present disclosure, the different initialization signal lines respectively connected to the first pixel driving circuit and the second pixel driving circuit are configured to be independently driven.

[0008] For example, in a display substrate provided according to an embodiment of the present disclosure, the second display area includes a plurality of dummy rows and the plurality of dummy columns, a plurality of normal rows are provided between each two adjacent dummy rows, and a plurality of normal columns are provided between each two adjacent dummy columns. The plurality of first pixel driving circuits are arranged in the plurality of dummy rows or the plurality of dummy columns, and the plurality of second pixel driving circuits are located in the plurality of normal rows and the plurality of normal columns.

[0009] For example, in a display substrate provided according to an embodiment of the present disclosure, the plurality of initialization signal lines include a first initialization signal line connected to the first pixel driving circuit, extend along the first direction, and further include a second initialization signal line connected to the second pixel driving circuit located in the same row.

[0010] For example, in a display substrate provided according to an embodiment of the present disclosure, the orthographic projection of the portion of the first initialization signal line extending along the first direction on the display substrate is located within the orthographic projection of the plurality of dummy rows on the display substrate, and / or the orthographic projection of the portion of the first initialization signal line extending along the second direction on the display substrate is located within the orthographic projection of the plurality of dummy columns on the display substrate.

[0011] For example, in a display substrate provided according to an embodiment of the present disclosure, the second display area includes a first sub-display area located on at least one side of the first display area in the first direction, and at least a part of the plurality of first pixel driving circuits is arranged in the first sub-display area. The first initialization signal line includes a first sub-part located on the side of the first sub-display area away from the first display area, a second sub-part located within the first sub-display area, and a connection part connecting the first sub-part and the second sub-part.

[0012] For example, in a display substrate provided according to an embodiment of the present disclosure, the first sub-part and the second sub-part extend along the second direction, and the connection part extends along the first direction.

[0013] For example, in the display substrate provided by an embodiment of the present disclosure, the connection portion and the second initialization signal line are located in the same layer, and the first sub-portion and the second sub-portion are located in a layer different from the second initialization signal line.

[0014] For example, in the display substrate provided by an embodiment of the present disclosure, the first sub-portion is located in the dummy column of the first sub-display area that is away from the first display area, the second sub-portion is located in the dummy column within the first sub-display area, and the connection portion is located in the dummy row.

[0015] For example, in the display substrate provided by an embodiment of the present disclosure, the second sub-portion is connected to the first pixel driving circuit located in the same column within the first sub-display area.

[0016] For example, in the display substrate provided by an embodiment of the present disclosure, the second display area includes a second sub-display area located on at least one side of the first display area in the second direction, and at least a part of the plurality of first pixel driving circuits is arranged in the second sub-display area. The first initialization signal line is located outside the second sub-display area and includes a third sub-portion extending along the second direction and a fourth sub-portion extending from the outside to the inside of the second sub-display area along the first direction.

[0017] For example, in the display substrate provided by an embodiment of the present disclosure, the third sub-portion is located in the dummy column, and the fourth sub-portion is located in the dummy row.

[0018] For example, in the display substrate provided by an embodiment of the present disclosure, the fourth sub-portion and the second initialization signal line are located in the same layer, and the third sub-portion and the second initialization signal line are located in different layers.

[0019] For example, the display substrate provided by an embodiment of the present disclosure further includes a data signal line that is disposed in the normal column, extends along the second direction, and is configured to provide a data signal to the second pixel driving circuit, and the first sub-part of the first initialization signal line and the data signal line are disposed in the same layer.

[0020] For example, in the display substrate provided by an embodiment of the present disclosure, the first part of the first initialization signal line and the connection part are connected via a via hole, the connection part and the second sub-part are located in different layers and are connected via a via hole.

[0021] For example, the display substrate provided by an embodiment of the present disclosure further includes a data signal line that is disposed in the normal column, extends along the second direction, and is configured to provide a data signal to the second pixel driving circuit, and the third sub-part of the first initialization signal line and the data signal line are disposed in the same layer.

[0022] For example, in the display substrate provided by an embodiment of the present disclosure, the third sub-part of the first initialization signal line and the fourth sub-part are connected via a via hole.

[0023] For example, in the display substrate provided by an embodiment of the present disclosure, the first pixel driving circuit in the first sub-display area is disposed in the dummy column, and the first pixel driving circuit in the dummy column is connected to the corresponding first light-emitting device in the first display area via a driving connection line extending along the first direction.

[0024] For example, in the display substrate provided by an embodiment of the present disclosure, the first pixel driving circuit in the second sub-display area is disposed in the dummy row, and the first pixel driving circuit in the dummy row is connected to the corresponding first light-emitting device in the first display area via a driving connection line extending along the second direction.

[0025] For example, in the display substrate provided by an embodiment of the present disclosure, the first pixel driving circuit includes a first initialization transistor that is electrically connected to the electrode of the corresponding first light-emitting device and is configured to apply an initialization signal to the electrode. The second pixel driving circuit includes a second initialization transistor that is electrically connected to the electrode of the corresponding second light-emitting device and is configured to apply an initialization signal to the electrode.

[0026] For example, in the display substrate provided by an embodiment of the present disclosure, the first initialization signal line is electrically connected to one of the source electrode and the drain electrode of the first initialization transistor, and the other of the source electrode and the drain electrode of the first initialization transistor is electrically connected to the electrode of the first light-emitting device. The second initialization signal line is electrically connected to one of the source electrode and the drain electrode of the second initialization transistor, and the other of the source electrode and the drain electrode of the second initialization transistor is electrically connected to the electrode of the second light-emitting device.

[0027] At least one embodiment of the present disclosure provides a display device including the display substrate according to any one of claims 1 to 21.

[0028] For example, the display device provided by an embodiment of the present disclosure is located on the non-display side of the display substrate, and is configured to emit light to the display side of the display substrate through the first display area and / or receive light transmitted from the display side of the display substrate to the non-display side of the display substrate through the first display area, and further includes a functional device.

[0029] To more clearly explain the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments are briefly introduced below. Obviously, the drawings in the following description are only related to some embodiments of the present disclosure and do not limit the present disclosure.

Brief Description of the Drawings

[0030]

Figure 1A

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Figure 10

Embodiments for Carrying out the Invention

[0031] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions according to the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. All other embodiments obtained by those skilled in the art based on the described embodiments of the present disclosure without creative efforts are included within the protection scope of the present disclosure.

[0032] Unless otherwise defined, technical terms or scientific terms used in this disclosure shall have the ordinary meanings understood by those skilled in the technical field to which this disclosure pertains. The terms "first", "second", and similar words used in this disclosure do not indicate any order, quantity, or importance, and are only used to distinguish different components. Similar words such as "comprising" or "containing" mean that the elements or things appearing before such words include the elements or things listed after such words and their equivalents without excluding other elements or things. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, and can include direct or indirect electrical connections.

[0033] Unless otherwise defined, features such as "parallel", "perpendicular", and "same" used in the embodiments of this disclosure all include cases of "parallel", "perpendicular", "same" in a strict sense, and there are some errors in cases such as "substantially parallel", "substantially perpendicular", and "substantially same". For example, the above "substantially" can mean that the difference between the comparison objects is within 10% or 5% of the average value of the comparison objects. In the following embodiments of this disclosure, when the number of components or elements is not specified, it means that the component or element may be one or more, or can be understood as at least one. "At least one" refers to one or more, and "a plurality" refers to at least two. "Disposed in the same layer" in the embodiments of this disclosure refers to the relationship between a plurality of film layers formed through the same process (for example, a one-step patterning process) with the same material. Here, "the same layer" does not necessarily mean that the thicknesses of the plurality of film layers are the same, or that the heights in the cross-sectional views of the plurality of film layers are the same.

[0034] As consumers' demands for the integrity of display screens increase, the popularity of display-integrated cameras is on the rise. For example, the display screen is divided into a light-transmitting display area and a normal display area located on at least one side of the light-transmitting display area. The camera may be disposed in the light-transmitting display area. For example, it is disposed on the opposite side of the light-emitting surface of the display screen so as to be able to capture the image light passing through the light-transmitting display area. Currently, in the OLED field, in order to support high-definition and high PPI (Pixel Per Inch) display of the light-transmitting display area, usually only the light-emitting device part is left in the light-transmitting display area, and the driving pixel circuit part is disposed in the normal display area. Then, the light-emitting device in the first display area and its corresponding driving circuit are connected through a transparent conductive oxide material to drive the light-emitting device. For example, the pixel driving circuit in the normal display area is compressed to ensure space for arranging the pixel driving circuit in the light-transmitting display area, and indium tin oxide (ITO) is used to connect the light-emitting device in the light-transmitting display area to its corresponding driving circuit to drive the light-emitting device. At the same time, in order to improve the transmittance of the light-transmitting display area, the light-emitting area of the light-emitting device is made smaller and different from the light-emitting area of the light-emitting device in the normal display area. Therefore, the pixel driving circuit of the light-emitting device driving the light-transmitting display area is disposed in the normal display area, and the light-emitting area of the light-emitting device is different from the light-emitting area of the light-emitting device in the normal display area, so that the display effect of the light-transmitting display area of the display screen is different from the display effect of the normal display area.

[0035] Correspondingly, embodiments of the present disclosure provide a display substrate and a display device. The display substrate includes a first display region and a second display region located on at least one side of the first display region, and the light transmittance of the first display region is greater than that of the second display region. In the first display region, a plurality of first light-emitting devices arranged in an array are provided along a first direction and a second direction intersecting each other. In the second display region, a plurality of first pixel driving circuits and a plurality of second pixel driving circuits arranged in an array are provided along the first direction and the second direction. In the second display region, a plurality of second light-emitting devices are further provided. The first pixel driving circuit is configured to drive the first light-emitting device, and the second pixel driving circuit is configured to drive the second light-emitting device. The second display region is connected to the plurality of first pixel driving circuits and the plurality of second pixel driving circuits respectively, and further includes a plurality of initialization signal lines configured to apply an initialization signal to the first light-emitting device and the second light-emitting device. The first pixel driving circuit and the second pixel driving circuit are connected to different initialization signal lines respectively. Therefore, by connecting the first pixel driving circuit and the second pixel driving circuit in the second display region to different initialization signal lines, different initialization signals can be applied to the first light-emitting device and the second light-emitting device respectively, thereby improving the difference in display between the first display region and the second display region and improving the display effect.

[0036] Hereinafter, with reference to the accompanying drawings, the display substrate and the display device provided by embodiments of the present disclosure will be described in detail.

[0037] FIG. 1A is a schematic plan view of a display substrate provided by some embodiments of the present disclosure. FIG. 1B is a partial plan schematic view of the display substrate shown in FIG. 1A.

[0038] As shown in FIGS. 1A and 1B, the display substrate 10 includes a display area AA and a peripheral area BB which is a non-display area. The display area AA of the display substrate 10 includes a first display area 100 and a second display area 200 located on at least one side of the first display area 100. The light transmittance of the first display area 100 is greater than that of the second display area 200. For example, the first display area 100 can be a light-transmissive display area, and thus, other optical functional elements such as an integrated display camera or an optical sensor can be provided at a position corresponding to the first display area 100. It should be noted that the light transmittance of the second display area 200 may be zero or a value other than zero. For example, here, the light transmittance can be defined as the transmittance of light such as visible light and infrared light used in the above-described optical functional elements.

[0039] In some examples, as shown in FIGS. 1A and 1B, the second display area 200 can be located on at least one side of the first display area 100. For example, the second display area 200 may surround the first display area 100. That is, the first display area 100 can be surrounded by the second display area 200. For example, the first display area 100 may be disposed at a central position close to the upper edge of the display substrate 10, or other positions such as the upper left corner or the upper right corner of the display substrate 10. The embodiments of the present disclosure are not limited thereto. As shown in FIGS. 1A and 1B, a plurality of first light-emitting devices 120 arranged in an array are provided in the first display area 100 along a first direction X and a second direction Y intersecting each other, and a plurality of first pixel driving circuits 130 and a plurality of second pixel driving circuits 230 arranged in an array are provided in the second display area 200 along the first direction X and the second direction Y. In addition, a plurality of second light-emitting devices 220 are further provided in the second display area 200. The first pixel driving circuit 130 is configured to drive the first light-emitting device 120, and the second pixel driving circuit 230 is configured to drive the second light-emitting device 220. The second pixel driving circuit 230 and the second light-emitting device 220 driven thereby form a light-emitting unit 210.

[0040] Note that the orthographic projection of the second light-emitting device 220 in the second display area 200 and the corresponding second pixel driving circuit 230 on the display substrate may at least partially overlap. In some embodiments, the second light-emitting device 220 may also at least partially overlap with the orthographic projection of the adjacent first pixel driving circuit 130 on the display substrate. In order to increase the light-emitting area, the plurality of second light-emitting devices 220 arranged in the second display area 200 can occupy as large an area as possible within the second display area 200. According to the embodiments of the present disclosure, the arrangement of the plurality of second light-emitting devices 220 within the second display area 200 is not particularly limited.

[0041] For example, as shown in FIGS. 1A and 1B, the first pixel driving circuit 130 is connected to the first light-emitting device 120 to drive the first light-emitting device 120, and the second pixel driving circuit 230 is connected to the second light-emitting device 220 to drive the second light-emitting device 220. For example, the plurality of first light-emitting devices 120 located in the first display area 100 and arranged in an array along the first direction X and the second direction Y are respectively connected to the plurality of first pixel driving circuits 130 located in the second display area 200 via the driving connection lines 420. For example, the driving connection lines 420 can extend along the first direction X or the second direction Y. For example, the driving connection lines 420 can extend along a direction having a predetermined inclination angle with respect to the first direction X or the second direction Y (i.e., an oblique direction). For example, the driving connection lines 420 may be a bent line composed of driving connection lines 420 extending along at least two different directions. The embodiments of the present disclosure do not limit the wiring form of the driving connection lines 420.

[0042] For example, the driving connection lines 420 are made of a transparent conductive oxide such as indium tin oxide (ITO). Therefore, when the driving connection lines 420 are connected to the first display area 100, the light transmittance of the first display area 100 is not affected.

[0043] For example, the first pixel driving circuit 130 and the first light-emitting device 120 connected to each other form a first display sub-pixel, and the light-emitting unit 210 forms a second display sub-pixel. Both the first display sub-pixel and the second display sub-pixel may be color sub-pixels. For example, they can include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. However, according to the embodiments of the present disclosure, it is not limited thereto, and they may be display sub-pixels of other colors. Different forms of the first display sub-pixel and the second display sub-pixel include that the orthographic projections of the first pixel driving circuit 130 and the first light-emitting device 120 of the first display sub-pixel on the display substrate are separated from each other, and the orthographic projections of the second pixel driving circuit 230 and the second light-emitting device 220 of the second display pixel on the display substrate may at least partially overlap.

[0044] For example, a plurality of first pixel driving circuits 130 and a plurality of second pixel driving circuits 230 are arranged in a mixed manner. The plurality of first pixel driving circuits 130 may be arranged at some array positions arranged along the first direction and the second direction. However, the plurality of second pixel driving circuits 230 are arranged at other array positions arranged along the first direction and the second direction. It should be noted that the plurality of second pixel driving circuits 230 and the plurality of first pixel driving circuits 130 do not have to fill all the positions of the two-dimensional array arranged along the first direction and the second direction. Some positions may be empty, or other elements or structures can be arranged. Hereinafter, the configuration examples of the first pixel driving circuit 130 and the second pixel driving circuit 230 will be described in more detail.

[0045] For example, the first light-emitting device 120 and the second light-emitting device 220 may be light-emitting devices that emit colored light or may be light-emitting devices that emit white light. For example, the first light-emitting device 120 and the second light-emitting device 220 can include an anode, a cathode, and a light-emitting layer between the anode and the cathode. For example, the first light-emitting device 120 and the second light-emitting device 220 may be organic light-emitting diodes, in which case the light-emitting layer may be an organic light-emitting layer. Further, the first light-emitting device 120 and the second light-emitting device 220 can include auxiliary functional film layers such as an electron transport layer, an electron injection layer, a hole transport layer, and a hole injection layer. The embodiments of the present disclosure have no particular limitation on the type and specific structure of the light-emitting device, and thus any suitable light-emitting device can be used.

[0046] For example, the first pixel driving circuit 130 and the second pixel driving circuit 230 are respectively connected to the first light-emitting device 120 and the second light-emitting device 220 to drive the light-emitting devices. The embodiments of the present disclosure have no particular limitation on the specific structure and type of the pixel driving circuit, and thus any suitable pixel driving circuit can be used. Here, a 7T1C pixel driving circuit will be described as an example. For example, the first pixel driving circuit 130 and the second pixel driving circuit 230 have the same equivalent circuit structure.

[0047] FIG. 2 is a schematic equivalent circuit diagram of the first pixel driving circuit and the second pixel driving circuit in the display substrate provided by some embodiments of the present disclosure.

[0048] For example, as shown in FIG. 2, the first driving pixel driving circuit 130 and the second pixel driving circuit 230 include a driving transistor T1, a data writing transistor T2, a compensation transistor T3, a first light emission control transistor T4, a second light emission control transistor T5, a third initialization transistor T6 for initializing the gate electrode of the driving transistor T1, and a storage capacitor Cst. Further, the first driving pixel circuit 130 and the second pixel driving circuit 230 each further include an initialization transistor for initializing the first light emitting device 120 and the second light emitting device 220. For example, the initialization transistor is used to apply an initialization signal to the pixel electrodes (for example, anodes) of the first light emitting device 120 and the second light emitting device 220. For the sake of convenience of explanation, the initialization transistor for initializing the first light emitting device 120 in the first driving pixel circuit 130 is referred to as the first initialization transistor T7, and the initialization transistor for initializing the second light emitting device 220 in the second driving pixel circuit 230 is referred to as the second initialization transistor T7'. However, naming the first driving pixel driving circuit 130 and the second driving pixel driving circuit 230 respectively is for the convenience of explanation, and there is not necessarily a difference in their two structures. It should be noted that they may have the same structure or different structures. Similarly, naming the first initialization transistor T7 and the second initialization transistor T7' respectively is for the convenience of explanation, and there is not necessarily a difference in their two structures. They may have the same structure or different structures.

[0049] The first pole of the first initialization transistor T7 or the second initialization transistor T7' is connected to the first node N1 with the first pole of the first light emission control transistor T4. The first pole of the third initialization transistor T6 and the first pole of the compensation transistor T3 are connected to the second node N2, and the gate electrode of the driving transistor T1 is electrically connected to the first electrode plate CE1 of the storage capacitor Cst. The third initialization transistor T6 can simultaneously provide a third initialization signal to the gate electrode of the driving transistor T1 and the first electrode plate CE1 of the storage capacitor Cst through the second node N2, whereby the gate electrode of the driving transistor T1 and the first electrode plate CE1 of the storage capacitor Cst can be initialized. The first pole of the driving transistor T1, the second pole of the first light emission control transistor T4, and the second pole of the compensation transistor T3 are connected to the third node N3, and the second pole of the driving transistor T1, the first pole of the data writing transistor T2, and the first pole of the second light emission control transistor T5 are connected to the fourth node N4. The second pole of the second light emission control transistor T5 and the second electrode plate CE2 of the storage capacitor Cst are respectively connected to the power supply line.

[0050] The operation mode of the first pixel driving circuit 130 described above will be schematically described below. First, a reset signal is transmitted to the gate electrode of the first initialization transistor T7 through the first reset signal line 191 to turn on the first initialization transistor T7, and a first initialization signal Vinit1 is provided to the second pole of the first initialization transistor T7 through the first initialization signal line 310. At this time, the residual current on the anode of the first light emitting device 120 is discharged through the first initialization transistor T7, whereby the light emission due to the residual current on the anode of the light emitting device is suppressed.

[0051] Subsequently, a reset signal is transmitted to the gate electrode of the third initialization transistor T6 via the second reset signal line 192 to turn on the third initialization transistor T6. At this time, via the third initialization signal line 531, a third initialization signal Vinit3 is transmitted to the second pole of the third initialization transistor T6. At this time, the third initialization signal Vinit3 can apply the third initialization signal Vinit3 to the gate electrode of the driving transistor T1 and the first electrode plate CE1 of the storage capacitor Cst through the third initialization transistor T6. Thereby, the gate electrode of the driving transistor T1 and the first electrode plate CE1 of the storage capacitor Cst are initialized.

[0052] For example, since the operation mode of the second pixel driving circuit 230 is the same as that of the first pixel driving circuit 130, it will not be repeatedly described here.

[0053] For example, as shown in FIG. 2, the first pixel driving circuit 130 is electrically connected to the electrode of the corresponding first light-emitting device 120 and is configured to apply a first initialization signal Vinit1 to the electrode, and includes a first initialization transistor T7 capable of initializing the electrode of the first light-emitting device 120. For example, here, the electrode of the first light-emitting device 120 connected to the first initialization transistor T7 is a pixel electrode. In some examples, the pixel electrode is the anode of the light-emitting device, but the embodiments of the present disclosure are not limited thereto and may be the cathode of the light-emitting device.

[0054] For example, as shown in FIG. 2, the first initialization signal line 310 is electrically connected to one of the source electrode and the drain electrode of the first initialization transistor T7, and the other of the source electrode and the drain electrode is electrically connected to the electrode of the first light-emitting device 120.

[0055] For example, as shown in FIG. 2, the first initialization transistor T7 provides a first initialization signal Vinit1 to the anode of the first light-emitting device 120 via the first node N1 to initialize the anode of the first light-emitting device 120.

[0056] For example, as shown in FIG. 2, the second pixel driving circuit 230 is electrically connected to the electrode of the corresponding second light-emitting device 220 and is configured to apply a second initialization signal Vinit2 to the electrode, and includes a second initialization transistor T7' that can initialize the electrode of the second light-emitting device 220. For example, here, the electrode of the second light-emitting device 220 connected to the second initialization transistor T7' is a pixel electrode. In some examples, the pixel electrode is the anode of the light-emitting device, but the embodiments of the present disclosure are not limited thereto and may also be the cathode of the light-emitting device.

[0057] For example, as shown in FIG. 2, the second initialization signal line 320 is electrically connected to one of the source electrode and the drain electrode of the second initialization transistor T7', and the other of the source electrode and the drain electrode is electrically connected to the electrode of the second light-emitting device 220.

[0058] For example, as shown in FIG. 2, the second initialization transistor T7' provides a second initialization signal Vinit2 to the anode of the second light-emitting device 220 via the first node N1 to initialize the anode of the second light-emitting device 220.

[0059] In the above embodiments, the 7T1C pixel driving circuit is taken as an example for description, but the embodiments of the present disclosure are not limited thereto. For example, the first pixel driving circuit 130 or the second pixel driving circuit 230 may have a 3T1C (i.e., three transistors and one capacitor) structure, a 5T1C (i.e., five transistors and one capacitor) structure, an 8T1C (i.e., eight transistors and one capacitor) structure, a structure of eight transistors and one capacitor, or an 8T2C (i.e., eight transistors and two capacitors) structure, etc.

[0060] Note that the transistors used in the embodiments of the present disclosure may be triode transistors, thin film transistors, field effect transistors, or other similar transistors. In this specification, in order to distinguish between two poles of a transistor excluding the control pole, one of the two poles is referred to as the first pole, and the other is referred to as the second pole. For example, when the transistor is a triode transistor, the first pole is the collector, and the second pole is the emitter. When the transistor is a thin film transistor or a field effect transistor, the first pole may be the drain electrode, and the second pole may be the source electrode. Of course, the embodiments of the present disclosure include, but are not limited to, this. The types of electrodes indicated by the above-mentioned first pole and second pole are interchangeable with each other.

[0061] FIG. 3A is a schematic plan view of another display substrate provided by some embodiments of the present disclosure. FIG. 3B is a partial plan schematic view of the display substrate shown in FIG. 3A. As shown in FIGS. 3A and 3B, the display substrate includes a display area AA and a peripheral area BB. The display area AA of the display substrate 10 includes a first display area 100 and a second display area 200 located around the first display area 100.

[0062] As shown in FIGS. 3A and 3B, in the first display area 100, a plurality of first light-emitting devices 120 are arranged in an array along a first direction X and a second direction Y that intersect each other. In the second display area 200, a plurality of first pixel driving circuits 130 and a plurality of second pixel driving circuits 230 are arranged in an array along the first direction X and the second direction Y. In the second display area 200, a plurality of second light-emitting devices 220 are further provided. The first pixel driving circuit 130 is configured to drive the first light-emitting device 120, and the second pixel driving circuit 230 is configured to drive the second light-emitting device 220. The second pixel driving circuit 230 and the corresponding second light-emitting device 220 form a light-emitting unit 210. In FIG. 3A, the second light-emitting device 220 is schematically shown, and the orthographic projections of the second pixel driving circuit 230 and the corresponding second light-emitting device 220 on the display substrate overlap at least partially (for example, overlap with each other in a direction perpendicular to the display substrate). However, the embodiments of the present disclosure are not limited thereto. For details, please refer to the foregoing description, and thus will not be repeated here.

[0063] For example, as shown in FIG. 3A, the second display area 200 is provided above, below, to the left, and to the right of the first display area 100. For example, the portion of the second display area 200 disposed on the left side of the first display area 100 and the portion of the second display area 200 disposed on the right side of the first display area 100 are symmetric to each other.

[0064] FIG. 3C and FIG. 3D are schematic diagrams of the connection wiring between the first pixel driving circuit and the first light-emitting device of the display substrate shown in FIG. 3A. As shown in FIG. 3C, the first light-emitting devices 120 located in the first display area 100 and arranged in an array along the first direction X are connected to the first pixel driving circuit 130 located in the second display area 200 via driving connection lines 420 extending along the first direction X. As shown in FIG. 3D, the first light-emitting devices 120 located in the first display area 100 and arranged along the second direction Y are connected to the first pixel driving circuit 130 located in the second display area 200 through the driving connection lines 420 extending along the second direction Y. Naturally, the embodiments of the present disclosure include, but are not limited to, this. The driving connection lines 420 extending along a direction having a certain inclination angle with respect to the first direction X or the second direction Y (i.e., the diagonal direction) of the first light-emitting devices 120 located in the first display area 100 are connected to the first pixel driving circuit 130 located in the second display area 200. For example, the driving connection line 420 may be a bent line composed of driving connection lines 420 extending along at least two different directions.

[0065] For example, the driving connection line 420 is made of a transparent conductive oxide such as indium tin oxide (ITO). Therefore, when the driving connection line 420 is connected to the first display area 100, it does not affect the light transmittance of the first display area 100.

[0066] For example, the first initialization transistor T7 of the first pixel driving circuit 130 is electrically connected to the electrode of the corresponding first light-emitting device 120 and is configured to apply an initialization signal to the electrode.

[0067] For example, the second initialization transistor T7' of the second pixel driving circuit 230 is electrically connected to the electrode of the corresponding second light-emitting device 220 and is configured to apply an initialization signal to the electrode of the second light-emitting device 220.

[0068] For example, as shown in FIGS. 3A and 3B, a plurality of first pixel driving circuits 130 and a plurality of second pixel driving circuits 230 are arranged in a mixed manner. The plurality of first pixel driving circuits 130 may be arranged at some array lattice point positions arranged along the first direction X and the second direction Y. However, the plurality of second pixel driving circuits 230 are arranged at other array lattice point positions arranged along the first direction X and the second direction Y. Note that the plurality of second pixel driving circuits 230 and the plurality of first pixel driving circuits 130 do not have to fill all the positions of the two-dimensional array lattice points arranged along the first direction X and the second direction Y. Some positions may be vacant, or other elements or structures may be arranged. The array lattice point positions in the figure are also the positions of the rectangular lattice arranged in the second display area. Each lattice point position defines the area of the first pixel circuit or the second pixel circuit arranged at that lattice point position.

[0069] For example, as shown in FIGS. 3A and 3B, a part of the first pixel driving circuit 130 and a part of the second pixel driving circuit 230 may be arranged along the first direction X and are called the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same row. A part of the first pixel driving circuit 130 and a part of the second pixel driving circuit 230 may be arranged along the second direction Y and are called the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same column. For example, when viewed in a plan view, a straight line along the first direction X can pass through all the first pixel driving circuits 130 and all the second pixel driving circuits 230 located in the same row, and a straight line along the second direction Y can pass through all the first pixel driving circuits 130 and all the second pixel driving circuits 230 located in the same column.

[0070] As shown in FIGS. 3A and 3B, the second display area 200 is further included with a plurality of initialization signal lines 300 which are respectively connected to a plurality of first pixel driving circuits 130 and a plurality of second pixel driving circuits 230 and are configured to apply different initialization signals to the first light emitting device 120 and the second light emitting device 220.

[0071] In the display substrate provided by the embodiments of the present disclosure, the first pixel driving circuit 130 in the first display area 100 and the second pixel driving circuit 230 in the second display area 200 are connected to different initialization signal lines 300 respectively. Therefore, different initialization signals can be applied to the first light-emitting device 120 and the second light-emitting device 220 respectively. When initializing the anodes of the first light-emitting device 120 and the second light-emitting device 220, the difference in display caused by the difference in the light-emitting area of the first pixel driving circuit of the first light-emitting device 120 from the light-emitting area of the second display area 200 can be improved, thereby improving the display effects of the first display area 100 and the second display area 200. For example, the different initialization signal lines 300 respectively connected to the first pixel driving circuit 130 in the first display area 100 and the second pixel driving circuit 230 in the second display area 200 can be driven independently, thereby applying different initialization signals to the first pixel driving circuit 130 and the second pixel driving circuit 230 respectively. For example, the potentials of the initialization signals of different initialization signal lines may be different.

[0072] In some examples, as shown in FIGS. 3A and 3B, the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same row of the display substrate 10 are connected to different initialization signal lines. For example, in the left and right regions of the first display area 100 shown in FIGS. 3A and 3B, at least a part of the first pixel driving circuit 130 and the second pixel driving circuit 230 are located in the same row, but the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same row are connected to different initialization signal lines 310 and 320. The specific wiring method of these two initialization signal lines will be further described in detail in the following embodiments.

[0073] In some examples, as shown in FIGS. 3A and 3B, the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same column of the display substrate 10 are connected to different initialization signal lines. For example, in the upper region of the first display area 100 shown in FIGS. 3A and 3B, at least a part of the first pixel driving circuit 130 and the second pixel driving circuit 230 are located in the same column, but the first pixel driving circuit 130 and the second pixel driving circuit 230 located in the same column are respectively connected to different initialization signal lines 310 and 320. Note that only a schematic plan view of the first pixel circuit 130 located on the left, right, and upper sides of the first display area 100 is shown in the figure, but the embodiments of the present disclosure are not limited thereto, and the first pixel circuit 130 can also be arranged below the first display area 100. Since its arrangement and wiring are the same as those on the upper side, it will not be repeatedly described here.

[0074] In some examples, as shown in FIGS. 3A and 3B, the second display area 200 of the display substrate 10 includes a plurality of dummy rows 400R and a plurality of dummy columns 400C. Between two adjacent dummy rows, a plurality of normal rows 410R are provided, and between two adjacent dummy columns 400C, a plurality of normal columns 410C are provided. For example, the dummy rows, dummy columns, normal rows, and normal columns here are only used to distinguish the arrangement status of the lattice point positions of two arrays arranged along the first direction and the second direction. For example, the positions of some lattice points are in both the dummy column and the dummy row, the positions of some lattice points are in both the dummy column and the normal row, the positions of some lattice points are in both the normal column and the dummy row, and the positions of some lattice points are in both the normal column and the normal row.

[0075] In some examples, as shown in FIGS. 3A and 3B, a part of the plurality of first pixel driving circuits 130 is located in the dummy row 400R, or a part of the first pixel driving circuit 130 is located in the dummy column 400C. The second pixel driving circuits 230 in the plurality of light emitting units 210 are located in both the normal row 410R and the normal column 410C.

[0076] In some examples, as shown in FIGS. 3A and 3B, some of the plurality of first pixel driving circuits 130 are located in both the dummy row 400R and the normal column 410C, or some of the first pixel driving circuits 130 are located in both the dummy column 400C and the normal row 410R. For example, in the left and right regions of the first display area 100, the plurality of first pixel driving circuits 130 are located in both the dummy column 400C and the normal row 410R. For example, in the upper region of the first display area 100, the plurality of first pixel driving circuits 130 are located in both the dummy row 400R and the normal column 410C. For example, the second pixel driving circuits 230 in the plurality of light emitting units 210 are located in both the normal row 410R and the normal column 410C. At the lattice point positions where the first pixel driving circuit 130 and the second pixel driving circuit 230 are not provided, that is, at the lattice point positions where the first pixel driving circuit 130 is not provided in the dummy row 400R or the dummy column 400C, dummy pixel driving circuits that are not used for driving any light emitting device may be arranged. However, the embodiments of the present disclosure are not limited thereto, and other structures or elements may be provided at the lattice point positions in both the dummy row and the dummy column.

[0077] For example, as shown in FIGS. 3A and 3B, between two adjacent dummy rows 400R, a plurality of normal rows 410R, for example, four normal rows 410R are provided. By compressing the pixel circuits of the original four normal rows 410R in the second direction Y, the arrangement space for the pixel circuits of the new dummy row 400R is increased, and the spaces occupied by the pixel circuits of the four normal rows 410R before compression, the pixel circuits of the four normal rows 410R after compression, and the pixel circuits of the newly added dummy row 400R are the same. Similarly, between two adjacent dummy columns 400C, a plurality of normal columns 410C, for example, four normal columns 410C are provided. By compressing the pixel circuits of the original four normal columns 410C along the first direction X, the arrangement space for the pixel circuits of the new dummy column 400C is increased, and the spaces occupied by the pixel circuits of the four normal columns 410C before compression, the pixel circuits of the four normal columns 410C after compression, and the pixel circuits of the newly added dummy column 400C are the same. Therefore, the pixel circuits of the newly added dummy row 400R and the pixel circuits of the dummy column 400C do not affect the display effect of the second display area. Of course, the embodiments of the present disclosure include this, but are not limited thereto.

[0078] In some examples, as shown in FIGS. 3A and 3B, a plurality of initialization signal lines 300 are connected to the first pixel driving circuit 130 and include a first initialization signal line 310 configured to apply an initialization signal to the first light-emitting device 120. The plurality of initialization signal lines 300 extend along the first direction X and are further connected to a second pixel driving circuit 230 located in the same row and include a second initialization signal line 320 configured to apply an initialization signal to the second light-emitting device 220. Therefore, by connecting the first pixel driving circuit 130 in the first display area 100 and the second pixel driving circuit 230 in the second display area 200 to different initialization signal lines, different initialization signals can be applied to the first light-emitting device 120 and the second light-emitting device 220 respectively, thereby improving the difference in display between the first display area 100 and the second display area 200 and improving the display effect.

[0079] In some examples, as shown in FIGS. 3A and 3B, the orthographic projection of the portion of the first initialization signal line 310 extending along the first direction X on the display substrate is located within the orthographic projection of the plurality of dummy rows 400R on the display substrate.

[0080] FIG. 3A schematically shows only that the orthographic projection of the portion of the first initialization signal line 310 extending along the first direction X on the display substrate is located in only a partial region of the orthographic projection of the plurality of dummy rows 400R in the X direction, that is, it does not occupy the entire dummy row in the X direction. However, the embodiments of the present disclosure are not limited thereto, and the orthographic projection of the portion of the first initialization signal line 310 extending along the first direction X on the display substrate can be located in all regions of the orthographic projection of the plurality of dummy rows 400R in the X direction, that is, it can occupy the entire dummy row in the X direction. For more clearly explaining this situation, this is schematically shown in FIG. 3B. As shown in FIG. 3B, the portion of the first initialization signal line 310 extending along the X direction extends through the entire dummy row 400R.

[0081] In some examples, as shown in FIGS. 3A and 3B, the portion of the first initialization signal line 310 extending along the second direction Y, its orthographic projection on the display substrate is located within the orthographic projection of the plurality of dummy columns 400R on the display substrate.

[0082] As shown in FIG. 3A, the peripheral region BB of the display substrate 10 further includes a first initialization bus 310A and a second initialization bus 320A. The first initialization bus 310A is connected to a plurality of first initialization signals 310 within the display area AA and provides the first initialization signal Vinit1 to the plurality of first initialization signals 310. The second initialization bus 320A is connected to a plurality of second initialization signal lines 320 within the display area AA and provides the second initialization signal Vinit2 to the plurality of second initialization signal lines 320. The first initialization bus 310A and the second initialization bus 320A are connected to the integrated circuit 590.

[0083] FIG. 4A is a partial enlarged schematic view of region A in FIG. 3B. FIG. 4B is a partial enlarged schematic view of region B in FIG. 3B.

[0084] In some examples, as shown in FIGS. 3B and 4A, the second display area 200 is located on at least one side of the first display area 100 in the first direction X. At least a part of the plurality of first pixel driving circuits 130 is arranged in the first sub-display area 240. The first initialization signal line 310 includes a first sub-part 310a located on the side of the first sub-display area 240 away from the first display area 100, a second sub-part 310b located within the first sub-display area 240, and a connection part 310c connecting the first sub-part 310a and the second sub-part 310b. For example, the second sub-part 310b of the first initialization signal line 310 located within the first sub-display area 240 is connected to the first pixel driving circuit 130 located within the first sub-display area 240.

[0085] In some examples, as shown in FIGS. 3B and 4A, the first sub-part 310a and the second sub-part 310b extend along the second direction Y, and the connection part 310c extends along the first direction X.

[0086] In some examples, as shown in FIGS. 1 and 4A, the first sub-part 310a is located in the dummy column 400C of the first sub-display area 240 away from the first display area 100, the second sub-part 310b is located in the dummy column 400C within the first sub-display area 240, and the connection part 310c is located in the dummy row 400R. The dummy column 400C of the first sub-display area 240 is provided with the first pixel driving circuit 130 and can be connected to the first pixel driving circuit 130 through the second sub-part 310b.

[0087] In some examples, as shown in FIGS. 3B and 4A, the connection portion 310c and the second initialization signal line 320 are located in the same layer, and the first sub-portion 310a and the second sub-portion 310b are located in a layer different from the second initialization signal line 320. For example, the connection portion 310c extends along the first direction X and is located in the dummy row 400R, and the second initialization signal line 320 also extends along the first direction and is located in the normal row 410R. Therefore, the connection portion 310c may be provided in the same layer as the second initialization signal line 320. The first sub-portion 310a and the second sub-portion 310b extend along a second direction Y different from the extending direction of the second initialization signal line 320, and they are arranged in a layer different from the second initialization signal line 320.

[0088] In some examples, as shown in FIGS. 3B and 4A, the second sub-portion 310b is connected to the first pixel driving circuit 130 located in the same column within the first sub-display region 240.

[0089] For example, on the side of the second display region 200 away from the first sub-display region 240 along the first direction X, a first pixel driving circuit may be provided. Since its arrangement and wiring are the same as those of the first sub-display region 240, they will not be repeatedly described here. For example, the side of the second display region 200 away from the first sub-display region 240 along the first direction X may be symmetric to the first sub-display region 240, and the first sub-display region 240 may be symmetric to the first display region 100.

[0090] In some examples, as shown in FIGS. 3B and 4B, the second display area 200 includes a second sub-display area 250 located on at least one side of the first display area 100 in the first direction Y, and at least a part of the plurality of first pixel driving circuits 130 is disposed within the second sub-display area 250. The first initialization signal line 310 includes a third sub-part 310d located outside the second sub-display area 250 and a fourth sub-part 310e extending from outside the second sub-display area 250 into the second sub-display area 250. The third sub-part 310d extends along the second direction Y, and the fourth sub-part 310e extends along the first direction X. The fourth sub-part 310e extending into the second sub-display area 250 is connected to the first pixel driving circuit 130 disposed within the second sub-display area 250.

[0091] In some examples, as shown in FIGS. 3B and 4B, the third sub-part 310d is located in the dummy column 400C, and the fourth sub-part 310e is located in the dummy row 400R. The dummy column 400C of the second sub-display area 250 is provided with the first pixel driving circuit 130, and can be connected to the first pixel driving circuit 130 via the fourth sub-part 310e.

[0092] In some examples, as shown in FIGS. 3B and 4B, the fourth sub-part 310e and the second initialization signal line 320 are located in the same layer, and the third sub-part 310d is located in a layer different from the second initialization signal line 320. For example, the fourth sub-part 310e extends along the first direction X, and the second initialization signal line 320 also extends along the first direction, and thus, the connection part 310c may be provided in the same layer as the second initialization signal line 320. The third sub-part 310d extends along the second direction Y different from the extending direction of the second initialization signal line 320, and they are disposed in a layer different from the second initialization signal line 320.

[0093] For example, on the side away from the second sub-display area 250 along the second direction Y of the second display area 200, a first pixel driving circuit may be provided. Since its arrangement and wiring are the same as those of the second sub-display area 240, they will not be repeatedly described here. For example, the side away from the second sub-display area 250 along the second direction Y of the second display area 200 and the second sub-display area 250 may also be symmetric with respect to the first display area 100.

[0094] In some examples, as shown in FIGS. 3B and 4A, the display substrate 10 is arranged in the normal column 410C and further includes a data signal line 430 extending along the second direction Y. The data signal line is configured to provide a data signal to the second pixel driving circuit 230, and the first sub-part 310a of the first initialization signal line 310 is arranged in the same layer as the data signal line 430. Therefore, the data signal line 430 can be formed while forming the first sub-part 310a of the first initialization signal line 310. For example, the first sub-part 310a of the first initialization signal line 310 may have the same pattern as the data signal line 430 and is used for different signal wirings. Also, a data signal line for providing a data signal to the second pixel driving circuit 230 is provided in the normal column 410C passing through the first sub-display area. A data signal line for providing a data signal to the first pixel driving circuit 230 is also provided in the dummy column 400C passing through the first sub-display area, but it will not be repeatedly described here.

[0095] In some examples, as shown in FIGS. 3B and 4A, the first sub-part 310a and the connection part 310c of the first initialization signal line 310 are connected via a via hole H1, and the connection part 310c and the second sub-part 310b are located in different layers and are connected via a via hole H2.

[0096] In some examples, as shown in FIGS. 3B and 4B, the display substrate 10 is arranged in the normal column 410C and further includes data signal lines 430 extending along the second direction Y. The data signal lines 430 are configured to provide data signals to the second pixel driving circuit 230, and the third sub - portion 310d of the first initialization signal line 310 is arranged in the same layer as the data signal lines 430. Therefore, the data signal lines 430 can be formed while forming the third sub - portion 310d of the first initialization signal line 310. For example, the third sub - portion 310d of the first initialization signal line 310 may have the same pattern as the data signal lines 430 and is used for different signal wirings. Also, data signal lines for providing data signals to the first pixel driving circuit 130 and the second pixel driving circuit 230 are provided in the normal column 410C passing through the first sub - display area, but this will not be repeatedly described here.

[0097] In some examples, as shown in FIGS. 3B and 4B, the third sub - portion 310d and the fourth portion 310e of the first initialization signal line 310 are connected via a via hole H1.

[0098] For example, as shown in FIGS. 3B and 4B, the fourth sub - portion 310e may be connected to the fifth sub - portion 310f via a via hole H2. Of course, the fifth sub - portion 310f may not be arranged.

[0099] The above - mentioned first sub - display area 240 and second sub - display area 250 are part of the second display area 200. In addition to the second pixel driving circuit for driving the light - emitting devices in this area, a first pixel driving circuit for driving the light - emitting devices in the first display area 100 is further provided in the first sub - display area 240 and the second sub - display area 250. In the portion of the second display area 200 outside the first sub - display area 240 and the second sub - display area 250, only the second pixel driving circuit for driving the light - emitting devices in this area can be provided.

[0100] FIG. 5 is a schematic diagram of partial wiring of another display substrate provided according to some embodiments of the present disclosure. As shown in FIG. 5, the display substrate 10 includes a first display area 100 and a plurality of second display areas 200 located on at least one side of the first display area 100. The second display area 200 of the display substrate 10 includes a plurality of dummy rows 400R and a plurality of dummy columns 400C. Between two adjacent dummy rows 400R, a plurality of normal rows 410R (not shown, located between two dummy rows 400R) are provided, and between two adjacent dummy columns 400C, a plurality of normal columns 410C are provided (not shown, located between two dummy columns 400C). The second display area 200 includes a first sub-display area 240 located on at least one side of the first display area 100 in the first direction X, and at least a part of the plurality of first pixel driving circuits 130 is arranged in the first sub-display area 240. At least a part of the plurality of first pixel driving circuits 130 is located in both the plurality of dummy columns 400C and the normal rows 410R in the first sub-display area 240, and the second pixel driving circuits 230 in the plurality of light-emitting units 210 are located in both the plurality of normal rows 410R and the normal columns 410C.

[0101] The first initialization signal line 310 is connected to the first pixel driving circuit 130. The first initialization signal line 310 includes a first sub-part 310a located on the side away from the first display area 100 of the first sub-display area 240, a second sub-part 310b located in the first sub-display area 240, and a connection part 310c connecting the first sub-part 310a and the second sub-part 310b. The second sub-part 310b of the first initialization signal line 310 is connected to the first pixel driving circuit 130 located in the first sub-display area 240.

[0102] For example, as shown in FIG. 5, the first sub-part 310a and the second sub-part 310b extend along the second direction Y, and the connection part 310c extends along the first direction X.

[0103] For example, as shown in FIG. 5, the first sub-part 310a is located in the dummy column 400C of the first sub-display area 240 that is away from the first display area 100, the second sub-part 310b is located in the dummy column 400C within the first sub-display area 240, and the connection part 310c is located in the dummy row 400R. The dummy column 400C of the first sub-display area 240 is provided with the first pixel driving circuit 130 and can be connected to the first pixel driving circuit 130 via the second sub-part 310b.

[0104] For example, as shown in FIG. 5, the second sub-part 310b is connected to the first pixel driving circuit 130 located in the same column within the first sub-display area 240.

[0105] FIGS. 6A and 6B are schematic views of a partial planar structure of a second display area of another display substrate provided by some embodiments of the present disclosure.

[0106] As shown in FIG. 6A, the second display area 200 of the display substrate 10 includes a plurality of dummy rows 400R and a plurality of dummy columns 400C. Between every two adjacent dummy rows 400R, a plurality of normal rows 410R are provided, and between every two adjacent dummy columns 400C, a plurality of normal columns 410C are provided.

[0107] For example, as shown in FIG. 6A, between every two adjacent dummy rows 400R of the display substrate 10, four normal rows 410R are provided, and between every two adjacent dummy columns 400C, four normal columns 410C are provided.

[0108] For example, as shown in FIG. 6B, the second display area 200 includes a first sub-display area 240 located on at least one side of the first display area 100 in the first direction X, and at least a part of the plurality of first pixel driving circuits 130 is arranged within the first sub-display area 240. For example, in the first sub-display area 240 of FIG. 6B, the second sub-part 310b of the first initialization signal line can be seen.

[0109] For example, as shown in FIG. 6B, the first pixel driving circuit 130 provided in the first sub-display area 240 is located in both the dummy column 400C and the normal row 410R. The second pixel driving circuit 230 in the plurality of light-emitting units 210 is located in both the normal row 410R and the normal column 410C.

[0110] As shown in FIG. 6B, the plurality of initialization signal lines 300 of the display substrate 10 are connected to the first pixel driving circuit 130 and include a first initialization signal line 310 configured to apply an initialization signal to the first light-emitting device 120. The plurality of initialization signal lines 300 extend along the first direction X and are further connected to the second pixel driving circuit 230 located in the same row and include a second initialization signal line 320 configured to apply an initialization signal to the second light-emitting device 220. Therefore, by connecting the first pixel driving circuit 130 in the first display area 100 and the second pixel driving circuit 230 in the second display area 200 to different initialization signal lines respectively, different initialization signals can be applied to the first light-emitting device 120 and the second light-emitting device 220 respectively, thereby improving the difference in display between the first display area 100 and the second display area 200 and improving the display effect.

[0111] In some examples, as shown in FIG. 6B, the first initialization signal line 310 includes a first sub-part 310a located on the side away from the first display area 100 in the first sub-display area 240, a second sub-part 310b located in the first sub-display area 240, and a connection part 310c connecting the first sub-part 310a and the second sub-part 310b. The second sub-part 310b of the first initialization signal line 310 located in the first sub-display area 240 is connected to the first pixel driving circuit 130 located in the first sub-display area 240. In the schematic diagram of the following hierarchical structure, each part of the first initialization signal line is shown more clearly.

[0112] In some examples, as shown in FIG. 6B, the first sub-part 310a and the second sub-part 310b extend along the second direction Y, and the connection part 310c extends along the first direction X.

[0113] In some examples, as shown in FIG. 6B, the first sub - portion 310a is located in the dummy column 400C of the first sub - display area 240 away from the first display area 100, the second sub - portion 310b is located in the dummy column 400C within the first sub - display area 240, and the connection portion 310c is located in the dummy row 400R. The dummy column 400C of the first sub - display area 240 is provided with the first pixel driving circuit 130 and can be connected to the first pixel driving circuit 130 via the second sub - portion 310b.

[0114] In some examples, as shown in FIG. 6B, the connection portion 310c and the second initialization signal line 320 are located in the same layer, and the first sub - portion 310a and the second sub - portion 310b are located in layers different from the second initialization signal line 320. For example, the connection portion 310c extends along the first direction X and is located in the dummy row 400R, and the second initialization signal line 320 also extends along the first direction and is located in the normal row 410R. Therefore, the connection portion 310c may be provided in the same layer as the second initialization signal line 320. The first sub - portion 310a and the second sub - portion 310b extend along the second direction Y different from the extending direction of the second initialization signal line 320, and therefore, they are arranged in layers different from the second initialization signal line 320.

[0115] In some examples, as shown in FIG. 6B, the second sub - portion 310b is connected to the first pixel driving circuit 130 located in the same column within the first sub - display area 240.

[0116] In some examples, as shown in FIG. 6B, the display substrate 10 further includes a data signal line 430 arranged in the normal column 410C provided outside the first sub - display area 240 and extending along the second direction Y. The data signal line 430 is configured to provide a data signal to the second pixel driving circuit 230, and the first sub - portion 310a of the first initialization signal line 310 is arranged in the same layer as the data signal line 430.

[0117] In some examples, as shown in FIG. 6B, the first sub - portion 310a and the connection portion 310c of the first initialization signal line 310 are connected via via - hole H1, and the connection portion 310c and the second sub - portion 310b are located in different layers and are connected via via - hole H2.

[0118] FIGS. 7A - 7E are schematic diagrams of partial film layers of the first pixel driving circuit and the second pixel driving circuit of the second display area provided by some embodiments of the present disclosure.

[0119] In some examples, as shown in FIG. 7A, the display substrate 10 includes a base substrate (not shown) and a first semiconductor layer 510 on the base substrate.

[0120] For example, as shown in FIG. 7B, the display substrate 10 includes a first gate electrode layer 520 located on the side of the first semiconductor layer 510 away from the base substrate. The reset signal line 521, the gate line 522, the first electrode plate CE1 of the capacitor, and the light emission control line 523 are located on the first gate electrode layer 520.

[0121] For example, as shown in FIG. 7C, the display substrate 10 further includes a second gate electrode layer 530 located on the side of the first gate electrode layer 520 away from the base substrate. The connection portion 310c of the first initialization signal line 310, the second initialization signal line 320, the third initialization signal line 531, and the second electrode plate CE2 are located on the second gate electrode layer 530. For example, the connection portion 310c of the first initialization signal line 310 and the second initialization signal line 320 are located in the same layer, the connection portion 310c of the first initialization signal line 310 is located in the dummy row, and the second initialization signal line 320 is located in the normal row.

[0122] For example, as shown in FIG. 7D, the display substrate 10 further includes a first conductive layer 540 located on the side away from the base substrate of the second gate electrode layer 530, and the second sub-part 310b of the first initialization signal line 310 is located in the first conductive layer 540. For example, in addition to the second sub-part 310b, the first conductive layer 540 can further include a connection structure for connecting wires of different layers, but this will not be repeatedly described here.

[0123] For example, as shown in FIG. 7E, the display substrate 10 further includes a second conductive layer 550 located on the side away from the base substrate of the first conductive layer 360, and the first sub-part 310a of the first initialization signal line 310 and the data signal line 430 are located in the second conductive layer 550. For example, the first sub-part 310a of the first initialization signal line 310 and the data signal line 430 are located in the same layer, the first sub-part 310a of the first initialization signal line 310 is located in the dummy column, and the data signal line 430 is located in the normal column.

[0124] For example, as shown in FIGS. 7B to 7E, the first sub-part 310a of the first initialization signal line 310 located in the second conductive layer 550 and the connection part 310c located in the second gate electrode layer 530 are connected via a via hole H1. Therefore, the second conductive layer 550 and the first conductive layer 540 further include the via hole H1. The connection part 310c located in the second gate electrode layer 530 and the second sub-part 310b of the first initialization signal line 310 located in the first conductive layer 540 are connected via a via hole H2. Therefore, the first conductive layer 540 further includes the via hole H2. Naturally, the embodiments of the present disclosure do not limit the film layers where the first sub-part 310a, the second sub-part 310b, and the connection part 310c of the first initialization signal line 310 are located. According to different patterned film layers and wirings of the pixel driving circuit, other forms of film layer layouts are also possible. For example, the number of film layers of the first pixel driving circuit and the second pixel driving circuit is not limited to the above description.

[0125] Note that each film layer in FIGS. 7A to 7E and the specific pattern within each film layer are merely examples, and the film layers and the patterns within each film layer can be adjusted according to the embodiments of the present disclosure.

[0126] FIG. 8A is a schematic cross-sectional view taken along the cutting line EF of FIG. 4A. This portion includes the first sub-part 310a, the second sub-part 310b, and the connection part 310c of the first initialization signal line described in the above embodiment. As shown in FIG. 8A, the display substrate 10 includes a base substrate 500, a buffer layer BF disposed on the base substrate 500, a first semiconductor layer (not shown, located between the buffer layer and the first insulating layer) disposed on the buffer layer BF, a first insulating layer L1 disposed on the first semiconductor layer, a first gate electrode layer (not shown, located between the first insulating layer L1 and the second insulating layer L2) disposed on the first insulating layer L1, a second insulating layer L2 disposed on the first gate electrode layer, a second gate electrode layer 530 provided on the second insulating layer, a third insulating layer L3 disposed on the second gate electrode layer 530, a first conductive layer 540 provided on the third insulating layer, a fourth insulating layer L4 provided on the first conductive layer 540, and a second conductive layer 550 provided on the fourth insulating layer.

[0127] For example, as shown in FIG. 8A, the first sub-part 310a of the first initialization signal line 310 may be located in the second conductive layer 550, the connection part 310c of the first initialization signal line 310 may be located in the second gate electrode layer 530, the second sub-part 310b of the first initialization signal line 310 may be located in the first conductive layer 540, the first sub-part 310a and the connection part 310c may be connected to each other through the via hole H1, the connection part 310c and the second sub-part 310b may be connected to each other through the via hole H2, and the second sub-part 310b is connected to the first pixel driving circuit. For example, a data signal line 430 may be further provided in the second conductive layer 550. Of course, the embodiments of the present disclosure do not limit the film layers where the first sub-part 310a, the second sub-part 310b, and the connection part 310c of the first initialization signal line 310 are located. Depending on different patterned film layers and wirings of the pixel driving circuit, other forms of film layer layouts are also possible. For example, a pixel defining layer, a light emitting layer, a sealing layer, etc. may be provided on the side of the second conductive layer 550 away from the base substrate 500. The embodiments of the present disclosure do not limit this, and therefore, detailed illustrations and descriptions are omitted.

[0128] FIG. 8B is a schematic cross-sectional view taken along the cutting line GH of FIG. 4B. This portion includes the third sub-part 310d and the fourth sub-part 310e of the first initialization signal line described in the above embodiment. As shown in FIG. 7G, the third sub-part 310d of the first initialization signal line 310 may be located in the second conductive layer 550, and the fourth sub-part 310e of the first initialization signal line 310 may be located in the second gate electrode layer 530. The third sub-part 310d and the fourth sub-part 310e of the first initialization signal line are connected via the via hole H1, and the fourth sub-part 310e is connected to the first pixel driving circuit. Note that in this schematic cross-sectional view, the fifth sub-part 310f of FIG. 4B is omitted, and this portion may not be provided. Of course, the embodiments of the present disclosure do not limit the film layers where the first sub-part 310d and the fourth sub-part 310e of the first initialization signal line 310 are located. Depending on different patterned film layers and the wiring of the pixel driving circuit, other forms of film layer layouts are also possible. For example, on the side of the second conductive layer 550 away from the base substrate 500, a pixel definition layer, a light-emitting layer, a sealing layer, etc. may be provided. The embodiments of the present disclosure do not limit this, and therefore, detailed illustrations and descriptions are omitted.

[0129] Note that FIGS. 8A and 8B are mainly used to explain examples of the hierarchical relationship and connection relationship of each part in the cross-sectional structure of the first initialization signal line, and do not limit the cross-sectional structure of the display substrate according to the embodiments of the present disclosure. As long as the connection relationship between each part of the first initialization signal line is satisfied, the layer structures of the display device according to the embodiments of the present disclosure can add or reduce patterns and features, or change the relative positional relationship between patterns and features.

[0130] The embodiments of the present disclosure further provide a display device. FIG. 9 is a schematic diagram of a display device provided by some embodiments of the present disclosure. FIG. 10 is a schematic cross-sectional view taken along the cutting line CD of FIG. 9. As shown in FIG. 9, the display device 600 includes the display substrate 10 provided by any of the above examples. Therefore, the display device 600 can achieve the effects corresponding to the beneficial effects of the display substrate 10, but the description thereof is omitted here.

[0131] In some examples, as shown in FIGS. 9 and 10, the display device 600 further includes a functional device 610 located on the non-display side of the display substrate 10. The functional device is configured to emit light to the display side of the display substrate 10 through the first display area 100, or receive light transmitted from the display side of the display substrate 10 through the first display area 100 to the non-display side 620 of the display substrate 10, or emit light to the display side 630 of the display substrate 10 through the first display area 100, and also receive light transmitted from the display side 630 of the display substrate 10 through the first display area 100 to the non-display side 620 of the display substrate 10. Therefore, in the display device 600, a functional device may be provided on the non-display side 620 of the first display area 100, and a larger screen occupation ratio can be realized while integrating the functional device.

[0132] For example, as shown in FIG. 9, the functional device may be a camera or an infrared sensing element, but of course, the embodiments of the present disclosure are not limited thereto.

[0133] In some examples, the display device 600 may be an electronic product having a display function such as a smartphone, a tablet computer, a navigator, a monitor, or a television.

[0134] The following points need to be explained. (1) The drawings of the embodiments of the present disclosure only include the structures related to the embodiments of the present disclosure, and common designs for other structures can be referred to. (2) The features in the same and different embodiments of the present disclosure can be combined without contradiction.

[0135] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily imagined by those skilled in the art within the technical scope disclosed in the present disclosure shall be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should follow the protection scope of the claims.

Description of Symbols

[0136] 10 Display substrate 100 First display area 120 First light-emitting device 130 First pixel drive circuit 191 First reset signal line 192 Second reset signal line 200 Second display area 210 Light-emitting unit 220 Second light-emitting device 230 Second pixel drive circuit 240 First sub-display area 250 Second sub-display area 300 Initialization signal line 310 First initialization signal line 310A First initialization bus 310a First sub-part 310b Second sub-part 310c Connection part 310d Third sub-part 310e Fourth sub-part 310f Fifth sub-part 320 Second initialization signal line 320A Second initialization bus 360 First conductive layer 400C Dummy column 400R Dummy row 410C Normal column 410R Normal row 420 Drive connection line 430 Data signal line 500 Base substrate 510 First semiconductor layer 520 First gate electrode layer 521 Reset signal line 522 Gate line 523 Light emission control line 530 Second gate electrode layer 531 Third initialization signal line 540 First conductive layer 550 Second conductive layer 590 Integrated Circuit 600 Display Device 610 Functional Device 620 Non-display Side 630 Display Side

Claims

1. It includes a first display area and a second display area located on at least one side of the first display area, and the light transmittance of the first display area is greater than that of the second display area. In the first display area, a plurality of first light-emitting devices arranged in an array are provided along a first direction and a second direction intersecting each other. In the second display area, a plurality of first pixel driving circuits and a plurality of second pixel driving circuits arranged in an array are provided along the first direction and the second direction. In the second display area, a plurality of second light-emitting devices are further provided. The first pixel driving circuit is configured to drive the first light-emitting device, and the second pixel driving circuit is configured to drive the second light-emitting device. The second display area is further included with a plurality of initialization signal lines respectively connected to the plurality of first pixel driving circuits and the plurality of second pixel driving circuits, and configured to apply an initialization signal to the first light-emitting device and the second light-emitting device. The first pixel driving circuit and the second pixel driving circuit are respectively connected to different ones of the initialization signal lines, a display substrate.

2. The first pixel driving circuit and the second pixel driving circuit located in the same row are connected to different ones of the initialization signal lines, and / or the first pixel driving circuit and the second pixel driving circuit located in the same column are connected to different ones of the initialization signal lines. The display substrate according to Claim 1.

3. The different initialization signal lines respectively connected to the first pixel driving circuit and the second pixel driving circuit are configured to be independently driven. The display substrate according to Claim 2.

4. The second display area includes a plurality of dummy rows and a plurality of dummy columns. A plurality of normal rows are provided between each adjacent two dummy rows, and a plurality of normal columns are provided between each adjacent two dummy columns. The plurality of first pixel driving circuits are located in the plurality of dummy rows or the plurality of dummy columns, and the plurality of second pixel driving circuits are located in the plurality of normal rows and the plurality of normal columns. The display substrate according to any one of Claims 1 to 3.

5. The plurality of initialization signal lines include a first initialization signal line connected to the first pixel driving circuit. The display substrate according to Claim 4, further including a second initialization signal line extending along the first direction and connected to the second pixel driving circuit located in the same row.

6. The orthographic projection of the portion of the first initialization signal line extending along the first direction X on the display substrate is located within the orthographic projection of the plurality of dummy rows on the display substrate, and / or The orthographic projection of the portion of the first initialization signal line extending along the second direction on the display substrate is located within the orthographic projection of the plurality of dummy columns on the display substrate. The display substrate according to claim 5.

7. The second display area includes a first sub-display area located on at least one side of the first display area in the first direction, and at least a part of the plurality of first pixel driving circuits is arranged within the first sub-display area. The first initialization signal line includes a first sub-portion located on the side of the first sub-display area away from the first display area, a second sub-portion located within the first sub-display area, and a connection portion connecting the first sub-portion and the second sub-portion. The display substrate according to any one of claims 5 or 6.

8. The first sub-portion and the second sub-portion extend along the second direction, and the connection portion extends along the first direction. The display substrate according to claim 7.

9. The connection portion and the second initialization signal line are located in the same layer, and the first sub-portion and the second sub-portion are located in a layer different from the second initialization signal line. The display substrate according to any one of claims 7 or 8.

10. The first sub-portion is located in the dummy column of the first sub-display area away from the first display area, the second sub-portion is located in the dummy column within the first sub-display area, and the connection portion is located in the dummy row. The display substrate according to any one of claims 7 to 9.

11. The second sub-portion is connected to the first pixel driving circuit located in the same column within the first sub-display area. The display substrate according to claim 8.

12. The second display area includes a second sub-display area located on at least one side of the first display area in the second direction, and at least a part of the plurality of first pixel driving circuits is arranged within the second sub-display area. The first initialization signal line includes a third sub-portion located outside the second sub-display area and a fourth sub-portion extending from the outside to the inside of the second sub-display area. The third sub - portion 310d extends along the second direction Y, and the fourth sub - portion 310e extends along the first direction X. The display substrate according to any one of claims 5 to 11.

13. The third sub - portion is located in the dummy column, and the fourth sub - portion is located in the dummy row. The display substrate according to claim 12.

14. The fourth sub - portion and the second initialization signal line are located in the same layer, and the third sub - portion and the second initialization signal line are located in different layers. The display substrate according to any one of claims 12 or 13.

15. The display substrate further includes a data signal line disposed in the normal column, extending along the second direction, and configured to provide a data signal to the second pixel driving circuit. The first sub - portion of the first initialization signal line and the data signal line are disposed in the same layer. The display substrate according to claim 8.

16. The first sub - portion of the first initialization signal line and the connection portion are connected via a via - hole. The connection portion and the second sub - portion are located in different layers and are connected via a via - hole. The display substrate according to claim 15.

17. The display substrate further includes a data signal line disposed in the normal column, extending along the second direction, and configured to provide a data signal to the second pixel driving circuit. The third sub - portion of the first initialization signal line and the data signal line are disposed in the same layer. The display substrate according to any one of claims 12 to 14.

18. The third sub - portion and the fourth sub - portion of the first initialization signal line are connected via a via - hole. The display substrate according to claim 17.

19. The first pixel driving circuit in the first sub - display region is disposed in the dummy column. The first pixel driving circuit in the dummy column is connected to the corresponding first light - emitting device in the first display region via a driving connection line extending along the first direction. The display substrate according to any one of claims 7 to 11.

20. The first pixel driving circuit in the second sub - display region is disposed in the dummy row. The first pixel driving circuit in the dummy row is connected to the corresponding first light - emitting device in the first display region via a driving connection line extending along the second direction. The display substrate according to any one of claims 12 to 14.

21. The first pixel driving circuit includes a first initialization transistor that is electrically connected to an electrode of the corresponding first light-emitting device and is configured to apply an initialization signal to the electrode. The second pixel driving circuit includes a second initialization transistor that is electrically connected to an electrode of the corresponding second light-emitting device and is configured to apply an initialization signal to the electrode. The display substrate according to any one of claims 5 to 20.

22. The first initialization signal line is electrically connected to one of a source electrode and a drain electrode of the first initialization transistor, and the other of the source electrode and the drain electrode of the first initialization transistor is electrically connected to an electrode of the first light-emitting device. The second initialization signal line is electrically connected to one of a source electrode and a drain electrode of the second initialization transistor, and the other of the source electrode and the drain electrode of the second initialization transistor is electrically connected to an electrode of the second light-emitting device. The display substrate according to claim 21.

23. A display device including the display substrate according to any one of claims 1 to 22.

24. The display device according to claim 23, further including a functional device that is located on a non-display side of the display substrate and is configured to emit light to a display side of the display substrate through the first display area and / or receive light that passes through the first display area from the display side of the display substrate to the non-display side.

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