Method and apparatus for adaptive quantization of symmetric meshes

Abstract

The method, performed by at least one processor of the encoder, includes performing a symmetry detection process on an input 3D mesh to estimate a splitting plane. The method further includes splitting the input 3D mesh into a first side and a second side based on the splitting plane, where the first side is opposite the second side and a first vertex of the first side is symmetric with respect to a second vertex of the second side. The method further includes pairwise quantizing the first vertex and the second vertex to reduce quantization errors and symmetry prediction errors associated with the first vertex and the second vertex.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 418,394, filed October 21, 2022, and U.S. Patent Application No. 18 / 471,803, filed September 21, 2023, the disclosures of which are incorporated herein by reference in their entireties.

[0002] This disclosure is directed to a set of advanced video coding techniques, and more particularly, to adaptive quantization of symmetric meshes. [Background technology]

[0003] VMesh is an in-progress MPEG standard for compressing meshes. The current VMesh reference software compresses meshes based on a decimated base mesh, displacement vectors, and a motion field. Displacements are calculated by finding the closest point on the input mesh for each vertex of the subdivision base mesh. The displacement vectors are converted to wavelet coefficients using a linear lifting method, which are then quantized and encoded by a video or arithmetic codec.

[0004] Reflection symmetry is a common feature of mesh encoding, especially computer-generated meshes. Symmetry can be exploited to compress symmetric meshes. Vertices are divided into left and right halves of a symmetry plane. The left portion is encoded by mesh encoding, and the right portion is encoded by symmetry prediction and displacement coding. Unfortunately, quantization errors can significantly affect and degrade these symmetries. Conventional quantization introduces errors in symmetry estimation. For example, a pair of symmetric vertices may no longer have symmetry after quantization. Furthermore, conventional quantization cannot exploit the quantization of the remaining half-symmetric mesh. Summary of the Invention [Means for solving the problem]

[0005] According to one or more embodiments, a method executed by at least one processor of an encoder includes performing a symmetry detection process on an input 3D mesh to estimate a splitting plane. The method further includes splitting the input 3D mesh into a first side and a second side based on the splitting plane, where the first side is opposite the second side and a first vertex of the first side is symmetric with respect to a second vertex of the second side. The method further includes pairwise quantizing the first vertex and the second vertex to reduce quantization errors and symmetry prediction errors associated with the first vertex and the second vertex.

[0006] According to one or more embodiments, an encoder includes at least one memory configured to store program code and at least one processor configured to read the program code and operate as instructed by the program code. The program code includes execution code configured to cause the at least one processor to perform a symmetry detection process on an input 3D mesh to estimate a splitting plane. The program code further includes partitioning code configured to cause the at least one processor to split the input 3D mesh into a first side and a second side based on the splitting plane, where the first side is opposite the second side and a first vertex of the first side is symmetric with respect to a second vertex of the second side. The program code further includes quantization code configured to cause the at least one processor to pairwise quantize the first vertex and the second vertex to reduce quantization errors and symmetry prediction errors associated with the first vertex and the second vertex.

[0007] According to one or more embodiments, a non-transitory computer-readable medium has stored therein instructions that, when executed by a processor in an encoder, cause a method to be performed on an input 3D mesh, the method including performing a symmetry detection process to estimate a splitting plane. The method further includes splitting the input 3D mesh into a first side and a second side based on the splitting plane, the first side being opposite the second side and a first vertex of the first side being symmetric with respect to a second vertex of the second side. The method further includes pairwise quantizing the first vertex and the second vertex to reduce quantization errors and symmetry prediction errors associated with the first vertex and the second vertex.

[0008] Further features, nature and various advantages of the subject matter of the present disclosure will become more apparent in the following detailed description and accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic diagram of a block diagram of a communication system according to an embodiment of the present disclosure. [Figure 2] FIG. 1 is a schematic diagram of a block diagram of a streaming system, according to an embodiment of the present disclosure. [Figure 3] FIG. 10 illustrates an example of UV parameterized mapping from a 3D mesh segment to a 2D chart, according to an embodiment of the present disclosure. [Figure 4] FIG. 1 illustrates an example of distortion to a symmetric mesh caused by quantization, according to an embodiment of the present disclosure. [Figure 5] FIG. 1 illustrates an exemplary framework for performing symmetry quantization of vertices in a 3D mesh, according to an embodiment of the present disclosure. [Figure 6] FIG. 1 illustrates an exemplary framework for performing adaptive quantization with symmetry plane refinement, according to embodiments of the present disclosure. [Figure 7] FIG. 1 illustrates an exemplary framework for performing adaptive quantization of 2D meshes, according to embodiments of the present disclosure. [Figure 8] 1 is a flowchart of an example embodiment for performing symmetric quantization, according to embodiments of the present disclosure. [Figure 9] FIG. 1 illustrates a computer system suitable for implementing embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0010] The following detailed description of the exemplary embodiments refers to the accompanying drawings, in which the same reference numbers in different drawings may identify the same or similar elements.

[0011] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit implementations to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the implementations. Moreover, one or more features or components of one embodiment may be incorporated into or combined with other embodiments (or one or more features of other embodiments). Furthermore, in the flowcharts and descriptions of operations provided below, it should be understood that one or more operations may be omitted, one or more operations may be added, one or more operations may occur (at least partially) concurrently, and the order of one or more operations may be rearranged.

[0012] It will be apparent that the systems and / or methods described herein may be implemented in different forms, such as hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods is not intended to limit the scope of the invention. Thus, the operation and behavior of the systems and / or methods are described herein without reference to specific software code, and it will be understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0013] Although particular feature combinations are recited in the claims and / or disclosed herein, these combinations are not intended to limit the disclosure of possible embodiments. Indeed, many of these features may be combined in ways not specifically recited in the claims and / or disclosed herein. Although each dependent claim listed below may depend directly on only one claim, the disclosure of possible embodiments includes each dependent claim in combination with all other claims in the claim set.

[0014] No element, act, or instruction used herein should be construed as critical or required unless explicitly described as such. Also, as used herein, the articles "a" and "an" are intended to include one or more items and may be used interchangeably with "one or more." Where only one item is intended, the term "one" or similar language is used. Also, as used herein, terms such as "has," "have," "having," "include," and "including" are intended to be open-ended terms. Furthermore, the phrase "based on" is intended to mean "based at least in part on," unless otherwise specified. Furthermore, phrases such as "at least one of [A] and [B]" or "at least one of [A] or [B]" should be understood to include A only, B only, or both A and B.

[0015] Throughout this specification, references to "one embodiment," "an embodiment," or similar language mean that a particular feature, structure, or characteristic described in connection with the illustrated embodiment is included in at least one embodiment of the solution. Thus, the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.

[0016] Furthermore, the described features, advantages, and characteristics of the present disclosure may be combined in any suitable manner in one or more embodiments. In light of the description herein, those skilled in the art will recognize that the present disclosure can be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the present disclosure.

[0017] 1-2, one or more embodiments of the present disclosure for implementing the encoding and decoding structures of the present disclosure are described.

[0018] 1 illustrates a simplified block diagram of a communication system 100 according to one embodiment of the present disclosure. The system 100 may include at least two terminals 110, 120 interconnected through a network 150. In a unidirectional transmission of data, a first terminal 110 may encode video data, which may include mesh data, at a local location for transmission to another terminal 120 through the network 150. A second terminal 120 may receive the other terminal's encoded video data from the network 150, decode the encoded data, and display the recovered video data. Unidirectional data transmission may be common in media distribution applications, etc.

[0019] 1 illustrates a second pair of terminals 130, 140 provided to support bidirectional transmission of encoded video, such as may occur during a video conference. For bidirectional transmission of data, each terminal 130, 140 may encode video data captured at a local location for transmission to the other terminal over network 150. Each terminal 130, 140 may receive the encoded video data transmitted by the other terminal, may decode the encoded data, and may display the recovered video data on a local display device.

[0020] In FIG. 1 , terminals 110-140 may be, for example, servers, personal computers, smartphones, and / or any other type of terminal. For example, terminals 110-140 may be laptop computers, tablet computers, media players, and / or dedicated videoconferencing equipment. Network 150 represents any number of networks that convey encoded video data among terminals 110-140, including, for example, wired and / or wireless communication networks. Communication network 150 may exchange data over circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this discussion, the architecture and topology of network 150 may be irrelevant to the operation of the present disclosure, unless described below.

[0021] 2 illustrates the placement of a video encoder and decoder in a streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter may also be used in other video-enabled applications including, for example, video conferencing, digital television, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0022] 2, the streaming system 200 may include a capture subsystem 213 that includes a video source 201 and an encoder 203. The streaming system 200 may further include at least one streaming server 205 and / or at least one streaming client 206.

[0023] The video source 201 may, for example, create a stream 202 including a 3D mesh and metadata associated with the 3D mesh. The video source 201 may, for example, include a 3D sensor (e.g., a depth sensor) or 3D imaging technology (e.g., digital camera(s)) and a computing device configured to generate a 3D mesh using data received from the 3D sensor or 3D imaging technology. The sample stream 202 may have a high amount of data compared to an encoded video bitstream and may be processed by an encoder 203 coupled to the video source 201. The encoder 203 may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoder 203 may also further generate an encoded video bitstream 204. The encoded video bitstream 204 may have a low amount of data compared to the uncompressed stream 202 and may be stored on a streaming server 205 for later use. One or more streaming clients 206 may access the streaming server 205 to retrieve a video bitstream 209 , which may be a copy of the encoded video bitstream 204 .

[0024] The streaming client 206 may include a video decoder 210 and a display 212. The video decoder 210 may, for example, decode a video bitstream 209, which is a copy of the input encoded video bitstream 204, and create an output video sample stream 211 that may be rendered on the display 212 or another rendering device (not shown). In some streaming systems, the video bitstreams 204, 209 may be encoded according to a particular video coding / compression standard.

[0025] A mesh may be a collection of vertices, edges, and faces that define a shape or object. A 3D mesh may include multiple vertices, each associated with a 3D coordinate in 3D space (e.g., x, y, z). A 2D mesh may include multiple vertices, each associated with a 2D coordinate in 2D space (e.g., x and y). The vertices may be connected to form edges, and a collection of vertices may define a face.

[0026] According to one or more embodiments, a 3D mesh may be divided into several segments (or patches / charts). Each segment may consist of a set of connected vertices associated with their geometry, attributes, and connectivity information. As illustrated in FIG. 3, the UV parameterization process maps a mesh segment 300 onto 2D charts (302, 304) in a 2D UV atlas. Each vertex in the mesh segment may be assigned a 2D UV coordinate in the 2D UV atlas. The vertices in the 2D charts may form connected components with their 3D counterparts. The geometry and connectivity information of each vertex may be inherited from their 3D counterparts as well. Thus, the UV coordinates map vertices in 2D space to 3D space based on the associated UV attributes, including the geometry and connectivity information.

[0027]

[0003] Embodiments of the present disclosure relate to adaptive quantization of symmetric meshes. Quantization is known to introduce distortion, which causes errors in symmetry estimation. For example, Figure 4 shows an original mesh object 400 and resulting reconstructed objects 402 and 404. The reconstructed object 402 is quantized at a bit depth of 15, and the reconstructed object 404 is quantized at a bit depth of 12. Both the reconstructed objects 402 and 404 exhibit distortion, particularly symmetric distortion, but the reconstructed object 402 exhibits less distortion than the reconstructed object 404.

[0028] The embodiments of the present disclosure may be used separately or combined in any order and may be used with any surface-symmetric polygon mesh. In one or more examples, a surface-symmetric mesh may be defined as a mesh that has a symmetric surface but does not necessarily have one-to-one symmetry between the left and right sides of a given symmetry plane. That is, the right vertex may be projected across the symmetry plane at a small displacement from the left vertex. Embodiments of the present disclosure relate to symmetry-preserving symmetric meshes, particularly quantizing pairs of symmetric vertices within a mesh. In one or more examples, two vertices that are symmetric to each other have the same distance from the splitting plane along the same axis. For example, in UV space, a first vertex with UV coordinates (5, 5) is symmetric to a second vertex with UV coordinates (-5, 5), or a third vertex (5, -5), or a fourth vertex (-5, -5).

[0029] 5 illustrates an example framework 500 for performing symmetry quantization of vertices in a 3D mesh, according to an embodiment of the present disclosure. In particular, FIG. 5 illustrates an example framework for adaptive symmetry quantization. As shown in FIG. 5, a symmetry detection process 502 may be performed on an input mesh M to estimate a symmetry plane p. In one or more examples, the input mesh M is a 3D mesh.

[0030] Based on the symmetry plane p, a symmetrization process 504 is performed to map the vertices of the input mesh M to V as left, right, and in-plane vertices, respectively. L , V R , V I In one or more examples, the sizes of the left and right vertex sets do not need to be the same because a one-to-one mapping is not required for planar symmetry. Therefore, in one or more examples, a symmetrization process 504 is performed to

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[0031] According to one or more embodiments, the symmetric quantization process 506 implements a quantization method to preserve symmetry. In one or more examples, each symmetric pair

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[0032] In one or more examples, the associated error of the i-th symmetry pair of vertices may be calculated as follows: Formula (2):

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[0033] In one or more examples, for quantization, uniform quantization may be performed as follows. Formula (3):

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[0034] In one or more examples, the corresponding dequantized vertices may be derived as follows: Formula (4):

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[0035] In one or more examples, using symmetry prediction, the final distortion error can be calculated as follows: Formula (5):

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[0036] In the final distortion error equation, the parameter α may be a scalar weighting coefficient. In one or more examples, α>0. This equation may correspond to the quantization error of the left plus symmetric prediction error. In one or more examples, the final distortion error equation may be expressed as

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[0037] According to one or more embodiments, the best quantized vertex from the search space S is

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[0038] Best quantized vertex

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[0039] Therefore, based on this formula, the search space S is determined by finding the best quantization vertex that minimizes distortion.

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[0040] In one or more examples, K is selected as 1 and the weighting factor α=1.

[0041] FIG. 6 illustrates an exemplary framework 600 for performing adaptive quantization with symmetry plane refinement, according to an embodiment of the present disclosure. The framework 600 can perform iterative symmetry quantization refinement on a plane p. In one or more examples, the symmetric pairs are divided into multiple subgroups, resulting in K symmetric pairs. In one or more examples, each subgroup is formed randomly. In one or more examples, each subgroup is formed based on the order of the symmetric prediction error. For example, pairs with the highest symmetric prediction error may be grouped together, and pairs with the lowest symmetric prediction error may be grouped together.

[0042] In one or more examples, the symmetry quantization process 506 calculates the current symmetry plane p i After the symmetry quantization process 506 is performed, a symmetry plane update process 602 can be performed to refine the plane pi based on the quantized vertices to reduce the symmetry prediction error. In one or more examples, processes 506 and 602 update the plane p until the change in this plane is below a threshold (e.g., a small change is observed). i is executed iteratively for

[0043] 7 illustrates an exemplary framework 700 for performing adaptive quantization for a 2D mesh, according to an embodiment of the present disclosure. In FIG. 7, symmetry detection process 502, symmetrization process 504, and symmetry quantization process 506 may correspond to symmetry detection process 502, symmetrization process 504, and symmetry quantization process 506, respectively, in FIG. 5.

[0044] The framework 700 can perform symmetric quantization of UV attributes. A UV matching process 702 can be performed on the output of the symmetrization process 502. The UV matching process 702 can match vertex pairs

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[0045] A UV segmentation process 704 may be performed to segment the 2D mesh into K multiple disjoint symmetric parts. A symmetry detection process 706 is performed for the jth UV part to find the 2D transformation q j A symmetric quantization process 708 is performed to estimate the quantized symmetric pair

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[0046] In one or more examples, the distortion error for selecting the quantization of the jth UV segment may be determined as follows: Formula (8):

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[0047]

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[0048] In contrast to point attributes in 3D coordinates, for UV attributes the optimal search space in 2D coordinates can be defined as follows: Formula (10):

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[0049] Therefore, the best 2D vertex that minimizes the quantization distortion and symmetry prediction error

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[0050] FIG. 8 shows a flowchart of an example process 800 for performing symmetric quantization in accordance with one or more embodiments of the present disclosure.

[0051] The process may begin at operation S802, where a symmetry detection process may be performed on an input 3D mesh to estimate a splitting plane. The splitting plane may be a plane that divides the 3D mesh into a first side (e.g., a left side) and a second side (e.g., a right side). For example, a symmetry detection process 502 may be performed on the input mesh M to estimate a splitting plane p.

[0052] The process continues to operation S804, where the input 3D mesh is split and symmetrized into a first side and a second side based on a splitting plane p. For example, the splitting plane p may split the input 3D mesh into a left side (e.g., a first side) and a right side (e.g., a second side), and the vertices in the input 3D mesh are classified as left side vertices, right side vertices, or in-plane vertices.

[0053] The process proceeds to operation S806, where the first vertex and the second vertex are quantized based on a symmetric quantization process that minimizes the quantization error and the symmetric prediction error. For example, the best quantized vertex that minimizes the distortion and the symmetric prediction error is

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[0054] The techniques described above may be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, Figure 9 illustrates a computer system 900 suitable for implementing certain embodiments of the present disclosure.

[0055] Computer software may be coded using any suitable machine code or computer language that can be subjected to mechanisms such as assembly, compilation, linking, etc. to create code containing instructions that can be executed by a computer central processing unit (CPU), graphics processing unit (GPU), etc. directly, or via interpretation, microcode execution, etc.

[0056] The instructions may be executed on various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, Internet of Things devices, and the like.

[0057] 9 for computer system 900 are examples and are not intended to suggest any limitation on the scope of use or functionality of the computer software implementing embodiments of the present disclosure. The arrangement of components should not be interpreted as having a dependency or requirement regarding any one or combination of components illustrated in the non-limiting embodiment of computer system 900.

[0058] Computer system 900 may include certain human interface input devices. Such human interface input devices may respond to input by one or more human users, for example, via tactile input (e.g., keystrokes, swipes, data glove movements), audio input (e.g., voice, clapping), visual input (e.g., gestures), or olfactory input (not shown). Human interface devices may also be used to capture certain media not necessarily directly related to conscious human input, such as sound (e.g., speech, music, ambient sounds), images (e.g., scanned images, photographic images obtained from a still image camera), and video (e.g., three-dimensional video, including stereoscopic video).

[0059] The input human interface devices may include one or more of a keyboard 901, a mouse 902, a trackpad 903, a touchscreen 910, a data glove, a joystick 905, a microphone 906, a scanner 907, and a camera 908 (only one of each is shown).

[0060] The computer system 900 may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, through tactile output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touchscreen 910, data gloves, or joystick 905, although haptic feedback devices that do not function as input devices may also be present). For example, such devices may include audio output devices (such as speakers 909, headphones (not shown)), visual output devices (such as screens 910, including CRT screens, LCD screens, plasma screens, and OLED screens, each with or without touchscreen input capabilities, each with or without haptic feedback capabilities, some of which may output two-dimensional visual output or output in more than three dimensions through means such as stereographic output, virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown).

[0061] The computer system 900 may also include human-accessible storage devices and their associated media, such as optical media including CD / DVD ROM / RW 920 with CD / DVD or similar media 921, thumb drives 922, removable hard drives or solid state drives 923, legacy magnetic media such as tape and floppy disks (not shown), and specialized ROM / ASIC / PLD-based devices (not shown) such as security dongles.

[0062] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the subject matter of this disclosure does not encompass transmission media, carrier waves or other transitory signals.

[0063] The computer system 900 may also include interfaces to one or more communication networks. The networks may be wireless, wired, or optical. The networks may further be local, wide area, metropolitan, vehicular, industrial, real-time, delay-tolerant, etc. Examples of networks include local area networks such as Ethernet, cellular networks including WLAN, GSM, 3G, 4G, 5G, LTE, etc., television wired or wireless wide area digital networks including cable, satellite, and terrestrial television, vehicular, and industrial networks including CANBus, etc. Particular networks generally require an external network interface adapter connected to a particular general-purpose data port or peripheral bus 949 (e.g., a USB port on computer system 900); others are commonly integrated into the core of computer system 900 by connection to a system bus as described below (e.g., an Ethernet interface to a PC computer system, or a cellular network interface to a smartphone computer system). Using any of these networks, computer system 900 may communicate with other entities. Such communications may be unidirectional receive only (e.g., broadcast TV), unidirectional transmit only (e.g., a CANbus to certain CANbus devices), or bidirectional, e.g., to other computer systems using local-area or wide-area digital networks. Such communications may include communications to a cloud computing environment 955. Particular protocols and protocol stacks may be used with each of these networks and network interfaces, as described above.

[0064] The aforementioned human interface devices, human-accessible storage devices, and network interface 954 may be attached to the core 940 of the computer system 900 .

[0065] The core 940 may include one or more central processing units (CPUs) 941, graphics processing units (GPUs) 942, dedicated programmable processing units in the form of field programmable gate arrays (FPGAs) 943, hardware accelerators 944 for specific tasks, etc. These devices may be connected via a system bus 948, along with read-only memory (ROM) 945, random access memory 946, and internal mass storage 947, such as a non-user-accessible internal hard drive or SSD. In some computer systems, the system bus 948 may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be attached directly to the core's system bus 948 or via a peripheral bus 949. Architectures for peripheral buses include PCI, USB, etc. A graphics adapter 950 may be included in the core 940.

[0066] The CPU 941, GPU 942, FPGA 943, and accelerator 944 may combine to execute specific instructions that may constitute the aforementioned computer code. That computer code may be stored in ROM 945 or RAM 946. Temporary data may also be stored in RAM 946, while persistent data may be stored in, for example, internal mass storage 947. Rapid storage and retrieval from any of the memory devices may be enabled through the use of cache memory, which may be closely associated with one or more of the CPU 941, GPU 942, mass storage 947, ROM 945, RAM 946, etc.

[0067] The computer-readable medium may bear computer code for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those skilled in the computer software arts.

[0068] By way of example and not limitation, computer system 900 having the architecture, and specifically core 940, may provide functionality as a result of processor(s) (including CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media may be user-accessible mass storage as introduced above, as well as media associated with specific storage of core 940 that is non-transitory in nature, such as core-internal mass storage 947 or ROM 945. Software implementing various embodiments of the present disclosure may be stored on such devices and executed by core 940. Computer-readable media may include one or more memory devices or chips, depending on particular needs. The software may cause core 940, and specifically the processors therein (including CPU, GPU, FPGA, etc.), to perform particular processes or particular portions of particular processes described herein, including defining data structures stored in RAM 946 and modifying such data structures according to the software-defined processes. Additionally, or alternatively, a computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator 944) that may operate to perform particular processes or portions of particular processes described herein in place of, or in conjunction with, software. References to software may encompass logic, and vice versa, as appropriate. References to computer-readable media may encompass circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both. The present disclosure encompasses any suitable combination of hardware and software.

[0069] While this disclosure describes several non-limiting embodiments, there are modifications, permutations, and various substitute equivalents that fall within the scope of this disclosure. It will thus be appreciated that those skilled in the art will be able to devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within the spirit and scope of the present disclosure.

[0070] The above disclosure also encompasses the embodiments listed below.

[0071] (1) A method performed by at least one processor of an encoder, comprising: 1. A method comprising: performing a symmetry detection process on an input 3D mesh to estimate a splitting plane; splitting the input 3D mesh into a first side and a second side based on the splitting plane, wherein the first side is opposite to the second side and a first vertex of the first side is symmetric to a second vertex of the second side; and pairwise quantizing the first vertex and the second vertex to reduce quantization errors and symmetry prediction errors associated with the first vertex and the second vertex.

[0072] (2) The method of feature (1), wherein the quantization error is based on an error between the first vertex and a quantization of the first vertex.

[0073] (3) The method of feature (2), wherein the quantization error is further based on a difference between the second vertex and the quantization of the second vertex.

[0074] (4) The method of feature (3), wherein the quantization of the second vertex is determined based on a symmetry prediction performed on the quantized first vertex and the splitting plane.

[0075] (5) The method of any one of features (1) to (4), wherein the quantizing step further includes performing a search in 3D space around the quantized first vertex to find a best first side vertex and a best second side vertex that reduce quantization error and symmetry prediction error.

[0076] (6) A method according to any one of features (1) to (5), wherein quantization is performed on the K symmetric pairs based on the partition plane, and the partition plane is updated based on the quantization performed on the K symmetric pairs.

[0077] (7) The method according to feature (6), wherein the quantizing step is performed for K symmetric pairs, and the updating step of the splitting plane is performed iteratively until a change in the splitting plane between the first iteration and the second iteration is less than a threshold.

[0078] (8) The method of any one of features (1) to (7), further comprising: determining a 2D mesh based on a 2D matching process performed on the partitioned input 3D mesh; segmenting the 2D mesh into a plurality of unconnected segments; performing a symmetry detection process for at least one unconnected segment of the plurality of unconnected segments to determine a transformation that splits the at least one unconnected segment into a first side and a second side opposite the first side, wherein the first side includes a first 2D vertex and the second side includes a second 2D vertex that is symmetrical to the first 2D vertex; and pairwise quantizing the first 2D vertex and the second 2D vertex to reduce a quantization error associated with the first 2D vertex and a symmetry prediction error associated with the second 2D vertex.

[0079] (9) The method of feature (8), wherein the quantization error associated with the first 2D vertex is based on an error between the first 2D vertex and a quantization of the first 2D vertex.

[0080] (10) The method of feature (9), wherein the quantization error associated with the first 2D vertex is further based on a difference between the second 2D vertex and a quantization of the second 2D vertex.

[0081] (11) The method of feature (10), wherein the quantization of the second 2D vertices is determined based on a symmetry prediction and a transformation performed on the quantized first 2D vertices.

[0082] (12) The method of any one of features (8) to (11), wherein the step of quantizing the first 2D vertex and the second 2D vertex further includes performing a search in a 2D space around the quantized first 2D vertex to find a best vertex for a first side of the at least one non-connected segment and a best vertex for a second side of the at least one non-connected segment, which reduces quantization error and symmetry prediction error.

[0083] (13) An encoder including at least one memory configured to store program code; and at least one processor configured to read the program code and operate as instructed by the program code, the program code including: execution code configured to cause the at least one processor to perform a symmetry detection process on an input 3D mesh to estimate a splitting plane; partitioning code configured to cause the at least one processor to split the input 3D mesh into a first side and a second side based on the splitting plane, wherein the first side is opposite to the second side and a first vertex of the first side is symmetric to a second vertex of the second side; and quantization code configured to cause the at least one processor to pairwise quantize the first vertex and the second vertex to reduce quantization error and symmetry prediction error associated with the first vertex and the second vertex.

[0084] (14) The encoder of feature (13), wherein the quantization error is based on an error between the first vertex and a quantization of the first vertex.

[0085] (15) The encoder of feature (14), wherein the quantization error is further based on a difference between the second vertex and a quantization of the second vertex.

[0086] (16) The encoder of feature (15), wherein the quantization of the second vertex is determined based on a symmetry prediction performed on the quantized first vertex and the splitting plane.

[0087] (17) The encoder of any one of features (13) to (16), wherein the quantizing step further includes performing a search in 3D space around the quantized first vertex to find a best first side vertex and a best second side vertex that reduce quantization error and symmetric prediction error.

[0088] (18) An encoder according to any one of features (13) to (17), wherein the quantization step is performed for K symmetric pairs based on a division plane, and the division plane is updated based on the output of the quantization performed for the K symmetric pairs.

[0089] (19) The encoder of feature (18), wherein the quantizing step performed on the K symmetric pairs and the updating step of the splitting plane are performed iteratively until a change in the splitting plane between a first iteration and a second iteration is less than a threshold.

[0090] (20) A non-transitory computer-readable medium having instructions stored thereon that, when executed by a processor in an encoder, cause the processor to perform a method including: performing a symmetry detection process on an input 3D mesh to estimate a splitting plane; splitting the input 3D mesh into a first side and a second side based on the splitting plane, wherein the first side is opposite the second side and a first vertex of the first side is symmetric with respect to a second vertex of the second side; and quantizing the first vertex and the second vertex in a pair that reduces quantization error and symmetry prediction error associated with the first vertex and the second vertex. [Explanation of symbols]

[0091] 100 Communication system, system 110~140 terminals 150 Network 200 Streaming System 201 Video Sources 202 Stream 202 Sample Stream 203 Encoder 204 Video Bitstream 205 Streaming Server 206 Streaming Client 209 Video Bitstream 210 Video Decoder 211 video sample streams 212 Display 213 Capture Subsystem 300 3D meshes, mesh segments 302 2D Charts 304 2D mesh, 2D chart 400 mesh objects 402 Rebuild Object 404 Rebuild Object 500 Framework 502 Symmetry Detection Process 504 Symmetrization Process 506 Symmetric Quantization Process 600 Framework 602 Symmetry Plane Update Process 700 Framework 702 UV Matching Process 704 UV Segmentation Process 706 Symmetry Detection Process 708 Symmetric Quantization Process 800 processes 900 Computer Systems 901 Keyboard 902 Mouse 903 Trackpad 905 Joystick 906 Mike 907 Scanner 908 Camera 909 Speaker 910 Touchscreen 940 cores 946 Random Access Memory 947 Mass Storage 948 System Bus 949 Peripheral Bus 950 graphics adapter

Claims

1. 1. A method performed by at least one processor of an encoder, comprising: performing a symmetry detection process on an input 3D mesh to estimate a splitting plane; Dividing the input 3D mesh into a first side and a second side based on the dividing plane, wherein the first side is opposite to the second side and a first vertex of the first side is symmetrical with respect to a second vertex of the second side; pairwise quantizing the first vertex and the second vertex to reduce quantization error and symmetric prediction error associated with the first vertex and the second vertex; A method comprising:

2. The method of claim 1 , wherein the quantization error is based on an error between the first vertex and a quantization of the first vertex.

3. The method of claim 2 , wherein the quantization error is further based on a difference between the second vertex and a quantization of the second vertex.

4. The method of claim 3 , wherein the quantization of the second vertex is determined based on a symmetry prediction performed on the quantized first vertex and the splitting plane.

5. 2. The method of claim 1 , wherein the quantizing step further comprises performing a search in a 3D space around the quantized first vertex to find a best vertex of the first side and a best vertex of the second side that reduces the quantization error and the symmetric prediction error.

6. the quantizing step is performed on K symmetric pairs based on the splitting plane; the splitting plane is updated based on the quantizing step performed on the K symmetric pairs; The method of claim 1.

7. 7. The method of claim 6, wherein the steps of quantizing for the K symmetric pairs and updating the splitting plane are performed iteratively until a change in the splitting plane between a first iteration and a second iteration is less than a threshold.

8. determining a 2D mesh based on a 2D matching process performed on the segmented input 3D mesh; segmenting the 2D mesh into a plurality of disconnected segments; performing a symmetry detection process on at least one unconnected segment of the plurality of unconnected segments to determine a transformation that splits the at least one unconnected segment into a first side and a second side opposite the first side, the first side including a first 2D vertex and the second side including a second 2D vertex that is symmetrical to the first 2D vertex; pairwise quantizing the first 2D vertex and the second 2D vertex to reduce a quantization error associated with the first 2D vertex and a symmetric prediction error associated with the second 2D vertex; The method of claim 1 further comprising:

9. The method of claim 8 , wherein the quantization error associated with the first 2D vertex is based on an error between the first 2D vertex and a quantization of the first 2D vertex.

10. The method of claim 9 , wherein the quantization error associated with the first 2D vertex is further based on a difference between the second 2D vertex and a quantization of the second 2D vertex.

11. The method of claim 10 , wherein the quantization of the second 2D vertex is determined based on a symmetry prediction performed on the quantized first 2D vertex and the transformation.

12. 9. The method of claim 8, wherein the step of quantizing the first 2D vertex and the second 2D vertex further comprises performing a search in a 2D space around the quantized first 2D vertex to find a best vertex for the first side of the at least one unconnected segment and a best vertex for the second side of the at least one unconnected segment that reduces the quantization error and the symmetric prediction error.

13. 1. An encoder comprising: at least one memory configured to store program code; at least one processor configured to read the program code and to operate as instructed by the program code, the program code comprising: Executable code configured to cause the at least one processor to perform a symmetry detection process for an input 3D mesh to estimate a splitting plane; partitioning code configured to cause the at least one processor to partition the input 3D mesh into a first side and a second side based on the partitioning plane, the first side being opposite the second side and a first vertex of the first side being symmetrical with respect to a second vertex of the second side; and quantization code configured to cause the at least one processor to pairwise quantize the first vertex and the second vertex to reduce a quantization error and a symmetric prediction error associated with the first vertex and the second vertex; Including, an encoder.

14. The encoder of claim 13 , wherein the quantization error is based on an error between the first vertex and a quantization of the first vertex.

15. The encoder of claim 14 , wherein the quantization error is further based on a difference between the second vertex and a quantization of the second vertex.

16. The encoder of claim 15 , wherein the quantization of the second vertex is determined based on a symmetry prediction performed on the quantized first vertex and the splitting plane.

17. 14. The encoder of claim 13, wherein the quantizing step further comprises performing a search in a 3D space around the quantized first vertex to find a best vertex of the first side and a best vertex of the second side that reduces the quantization error and the symmetric prediction error.

18. the quantizing step is performed on K symmetric pairs based on the splitting plane; the splitting plane is updated based on the output of the quantizing step performed on the K symmetric pairs; The encoder of claim 13.

19. 20. The encoder of claim 18, wherein the steps of quantizing for the K symmetric pairs and updating the splitting planes are performed iteratively until a change in the splitting planes between a first iteration and a second iteration is less than a threshold.

20. A non-transitory computer-readable medium having stored thereon instructions that, when executed by a processor in an encoder, cause the processor to performing a symmetry detection process on an input 3D mesh to estimate a splitting plane; Dividing the input 3D mesh into a first side and a second side based on the dividing plane, wherein the first side is opposite to the second side and a first vertex of the first side is symmetrical with respect to a second vertex of the second side; pairwise quantizing the first vertex and the second vertex to reduce quantization error and symmetric prediction error associated with the first vertex and the second vertex; A non-transitory computer-readable medium for performing a method comprising:

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