Display substrate, display module and display device

Abstract

The display substrate (100) includes N first light-emitting element groups (10) located in a first display region (A) and arranged sequentially in a first direction (X), N first pixel circuit groups (20) located in a second display region (B) and arranged sequentially in the first direction (X), and a wiring group (30) connecting one first light-emitting element group (10) to one first pixel circuit group (20). The first light-emitting element group (10) includes M first light-emitting elements (P1) arranged sequentially along the first direction (X), the first pixel circuit group (20) includes M first pixel circuits (C1) arranged sequentially along the first direction (X), and the wiring group (30) includes M wires (L) arranged in parallel. Here, the N first pixel circuit groups (20) are located on the same side of the N first light-emitting element groups (10), N≧2, M≧2, and both N and M are integers. The first first light emitting element group (101) is electrically connected to one first pixel circuit group (20) other than the first first pixel circuit group (201), and / or the Nth first light emitting element group (10 N ) is the Nth first pixel circuit group (20 N ) is electrically connected to one of the first pixel circuit groups (20).

Description

[Technical Field]

[0001] The present disclosure relates to the field of display technology, and more particularly to a display substrate, a display module, and a display device. [Background technology]

[0002] With the further development of display technology, display substrates with full screens will become the trend of future display technology development, but the necessary functional elements such as front cameras have become a major factor limiting full screens.

[0003] A full display with camera (FDC) is a display that increases the display area of ​​the display board by installing a front camera under the display board. If the front camera is not used, images can be displayed normally on the part of the display board above the front camera, achieving a full-screen display effect. Summary of the Invention [Means for solving the problem]

[0004] In one aspect, a display substrate is provided. The display substrate has a first display region and a second display region, and the second display region surrounds at least a portion of the first display region. The display substrate includes: N first light-emitting element groups located in the first display region and arranged sequentially in a first direction; N first pixel circuit groups located in the second display region and arranged sequentially in the first direction; and a wiring group connecting one first light-emitting element group to one first pixel circuit group. The N first pixel circuit groups are located on the same side of the N first light-emitting element groups. The first light-emitting element groups include M first light-emitting elements arranged sequentially along the first direction. Along the positive side of the first direction, the N first light-emitting element groups are respectively the 1st to Nth first light-emitting element groups, and the M first light-emitting element groups are respectively the 1st to Mth first light-emitting elements, where N≧2 and M≧2, and N and M are both integers. The first pixel circuit group includes M first pixel circuits sequentially arranged along the first direction. Along the negative side of the first direction, the N first pixel circuit groups are the 1st to Nth first pixel circuit groups, respectively, and the M first pixel circuits are the 1st to Mth first pixel circuits, respectively. The wiring group includes M wires arranged in parallel. The i-th first light-emitting element in the first light-emitting element group is electrically connected to the i-th first pixel circuit in the first pixel circuit group via the i-th wire, where i=1 to M. The 1st first light-emitting element group is electrically connected to one first pixel circuit group other than the 1st first pixel circuit group, and / or the Nth first light-emitting element group is electrically connected to one first pixel circuit group other than the N-th first pixel circuit group.

[0005] In some embodiments, wires electrically connected to the same first light-emitting element group are located on the same layer, and wires electrically connected to different first light-emitting element groups are located on different layers.

[0006] In some embodiments, the orthographic projections of the M wires in the same wire group onto the plane in which the display substrate lies do not overlap.

[0007] In some embodiments, the length of the i-th wire among M wires in the same wiring group is equal to the distance between the i-th first light-emitting element and the i-th first pixel circuit, or differs by a predetermined length.

[0008] In some embodiments, the progression of M wire lengths is an arithmetic progression.

[0009] In some embodiments, the Pth first light-emitting element group is electrically connected via respective wirings and the (N-P+1)th first pixel circuit group, where P=1 to N.

[0010] In some embodiments, the display substrate includes two repeat units located in the first display area and sequentially arranged along the first direction, each repeat unit including the N first light-emitting element groups. The two repeat units are located on either side of a reference line, the reference line being a straight line extending along a second direction and passing through the first display area, the second direction being perpendicular to the first direction. The first pixel circuit groups electrically connected to the two repeat units are located on either side of the first display area in the first direction. Wiring groups electrically connected to the two repeat units are located on either side of the reference line, the first display area has a center, and the reference line is a straight line passing through the center.

[0011] In some embodiments, the number of first light-emitting element groups included in the two repeating units is the same.

[0012] In some embodiments, the wiring electrically connected to the j-th first light-emitting element group in each repeat unit is located in the same layer, where j=1 to N.

[0013] In some embodiments, the display substrate includes two columns of repeat units located in the first display area and arranged sequentially along the first direction, and each column of repeat units includes at least two rows of repeat units arranged sequentially along the second direction. First pixel circuit groups electrically connected to repeat units in the same column are located on the same side of the first display area and arranged sequentially along the second direction. Wiring groups electrically connected to repeat units in the same column are arranged sequentially along the second direction.

[0014] In some embodiments, among the repeat units in the same column, the wiring electrically connected to the j-th first light-emitting element group of the repeat unit in each row is located in the same layer, where j=1 to N.

[0015] In some embodiments, the number of first light-emitting elements included in each first light-emitting element group is the same.

[0016] In some embodiments, the first light-emitting element group and the first pixel circuit group electrically connected thereto are provided in the same row, and a main portion of each wire in the wire group extends along a first direction.

[0017] In some embodiments, the display substrate includes a base, a pixel circuit layer provided on one side of the base, a light-emitting element layer provided on a side of the pixel circuit layer away from the base, and a multilayer wiring layer provided between the pixel circuit layer and the light-emitting element layer and stacked in sequence. The N first pixel circuit groups are located in the pixel circuit layer. The N first light-emitting element groups are located in the light-emitting element layer. One wiring group is located in one wiring layer. The material of the multilayer wiring layer includes a light-transmitting conductive material.

[0018] In some embodiments, the number of the multi-wiring layers is the same as the number of the N first light-emitting element groups.

[0019] In some embodiments, the display substrate further includes a plurality of second pixel circuits located in the second display region, and a plurality of second light-emitting elements located in the second display region and electrically connected to the plurality of second pixel circuits, respectively. In the first pixel circuit group, at least one second pixel circuit is provided between two adjacent first pixel circuits.

[0020] In another aspect, a display module is provided, comprising: a display substrate according to any one of the above embodiments; and an image collecting unit provided on a non-light-emitting side of the display substrate and positioned in the first display region of the display substrate.

[0021] In yet another aspect, a display device is provided, the display device comprising a display module according to any of the above embodiments. [Brief explanation of the drawings]

[0022] In order to more clearly explain the technical solutions according to the present disclosure, the drawings used in some embodiments of the present disclosure will be briefly described below. It is clear that the drawings in the following description are only a portion of the drawings in some embodiments of the present disclosure. Those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings in the following description can be considered as schematic diagrams and do not limit the actual dimensions of the products according to the embodiments of the present disclosure. [Figure 1] 1A and 1B are structural diagrams of a display substrate according to some embodiments of the present disclosure. [Figure 2] FIG. 10 is a structural diagram of another display substrate according to some embodiments of the present disclosure. [Figure 3] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view taken along the line CC' in FIG. [Figure 5] FIG. 4 is a cross-sectional view taken along the line DD′ of FIG. 3. [Figure 6] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 7] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 8] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 9] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 10] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 11] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 12] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 13] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 14] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 15] 1 is a structural diagram of a display module according to some embodiments of the present disclosure. [Figure 16] FIG. 1 is a diagram illustrating the configuration of a display device according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, several embodiments of the present disclosure will be described clearly and completely with reference to the drawings. Of course, the embodiments described herein are only a part of the embodiments of the present disclosure, and are not all of the embodiments. All other embodiments that can be obtained by those skilled in the art based on the embodiments in the present disclosure shall fall within the scope of protection of the present disclosure.

[0024] Unless the context indicates otherwise, in this specification and claims, the term "comprise" and other forms thereof, such as the third-person singular "comprises" and the present participle form "comprising," should be interpreted in an open, inclusive sense, i.e., "including, but not limited to." In the description, the terms "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," "some examples," and the like, are intended to indicate that a particular feature, structure, material, or characteristic associated with this embodiment or examples is included in at least one embodiment or example of the present disclosure. General references to the above terms do not necessarily refer to the same embodiment or example. Furthermore, a described particular feature, structure, material, or characteristic may be included in any one or more embodiments or examples in any appropriate manner.

[0025] Hereinafter, the terms "first" and "second" are for descriptive purposes only and should not be understood as indicating or implying the relative importance or quantity of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In describing the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0026] In describing some embodiments, the term "connected" and its derivatives may be used. For example, in describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. The embodiments described herein are not necessarily limited to the present specification.

[0027] "A and / or B" includes three combinations: A only, B only, and a combination of A and B.

[0028] Additionally, the use of "based on" is meant to be open and inclusive, as a process, step, calculation, or other action performed "based on" one or more of the conditions or values ​​may, in fact, be based on additional conditions or beyond the values.

[0029] As used herein, "about," "approximately," or "approximately" includes the stated value and the mean within an acceptable range of deviation of the specified value, where the acceptable range of deviation is determined by one of ordinary skill in the art considering the measurement and the error associated with measuring the specified quantity (i.e., limitations of the measurement system).

[0030] As used herein, "parallel," "perpendicular," and "equal" include the described situation and situations that are similar to the described situation, and this range of similar situations is within an acceptable deviation range, which is determined by taking into account the measurement considered by a person skilled in the art and the error associated with measuring a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes true parallel and approximately parallel, where an acceptable deviation range for approximately parallel may be, for example, a deviation within 5°, and "perpendicular" includes true perpendicular and approximately perpendicular, where an acceptable deviation range for approximately perpendicular may be, for example, a deviation within 5°. "Equal" includes absolutely equal and approximately equal, where, within the acceptable deviation range for approximately equal, for example, the difference between the two equals is 5% or less.

[0031] When a layer or element is referred to as being on another layer or substrate, it is understood that the layer or element may be located directly on the other layer or substrate, or there may be an intermediate layer between the layer or element and the other layer or substrate.

[0032] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized illustrative drawings. In the drawings, thicknesses of layers and regions are exaggerated for clarity. As such, variations in shape relative to the drawings due, for example, to manufacturing techniques and / or tolerances are to be expected. Thus, the exemplary embodiments are not limited to the shapes of regions shown herein and should be construed to include shape deviations due, for example, to manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions shown in the drawings are schematic in nature, and the shapes are not intended to represent the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

[0033] 1, some embodiments of the present disclosure provide a display substrate 100. The display substrate 100 has a first display area A and a second display area B, where the second display area B surrounds at least a portion of the first display area A.

[0034] For example, the second display area B surrounds a part of the first display area A, that is, a part of the boundary of the second display area B and a part of the boundary of the first display area A overlap with each other.

[0035] For example, the second display area B and the first display area A are sequentially arranged along a direction parallel to the plane on which the display substrate 100 is located.

[0036] For example, as shown in FIG. 1, the second display area B surrounds the first display area A, that is, the second display area B surrounds the first display area A with the second display area B at the center.

[0037] For example, the first display area A is located inside the second display area B.

[0038] For example, as shown in FIG. 1, the area of ​​the first display region A is smaller than the area of ​​the second display region B.

[0039] The present disclosure is not limited to the shape of the first display area A, and may be selectively set according to actual needs.

[0040] For example, the shape of the first display area A may be a circle, an ellipse, or a polygon. The polygon may be a square, a pentagon, a hexagon, or the like. The square may be a rectangle, for example.

[0041] In some examples, as shown in Figures 4 and 5, the display substrate 100 includes a base 1, a pixel circuit layer 2 provided on one side of the base 1, and a light-emitting element layer 3 provided on the side of the pixel circuit layer 2 away from the base 1.

[0042] The structure of the base 1 may be varied and may be selectively set as required.

[0043] For example, the base 1 may be a rigid base. The rigid base may be a glass base or a PMMA (Polymethyl methacrylate) base. In this case, the display substrate 100 may be a rigid display substrate.

[0044] Furthermore, for example, the base 1 may be a flexible base. The flexible base may be, for example, a PET (Polyethylene terephthalate) base, a PEN (Polyethylene naphthalate two formal acid glycolester) base, or a PI (Polyimide) base. In this case, the display substrate 100 may be a flexible display substrate.

[0045] Exemplarily, the pixel circuit layer 2 includes a plurality of pixel circuits C.

[0046] The pixel circuit C may have various configurations and may be selectively set as needed. For example, the structure of the pixel circuit C may include a "2T1C", "6T1C", "7T1C", "6T2C", or "7T2C" structure, where "T" represents a transistor, the number before "T" represents the number of transistors, "C" represents a storage capacitor, and the number before "C" represents the number of storage capacitors.

[0047] For example, the plurality of pixel circuits C may be arranged in an array, and the plurality of pixel circuits C may be arranged in a plurality of lines along a first direction X and a plurality of lines along a second direction Y, where the first direction X and the second direction Y are, for example, perpendicular to each other.

[0048] For example, the light emitting element layer 3 includes a plurality of light emitting elements P.

[0049] Alternatively, the light emitting element P may be an OLED (Organic Light Emitting Diode).

[0050] For example, the light emitting element P includes an anode, a light emitting layer, and a cathode, which are stacked one on the other.

[0051] For example, the light-emitting element P may further include at least one of a hole injection layer, a hole transport layer, and an electron blocking layer provided between the anode and the light-emitting layer, and at least one of an electron injection layer, an electron transport layer, and a hole blocking layer provided between the cathode and the light-emitting layer, thereby improving the luminous efficiency of the light-emitting element P.

[0052] For example, the anode structure may be a laminated composite structure in which transparent conductive oxide / metal / transparent conductive oxide are sequentially laminated, where the transparent conductive oxide material is, for example, either ITO (indium tin oxide) or IZO (indium zinc oxide), and the metal material is, for example, either gold (Au), silver (Ag), nickel (Ni), or platinum (Pt).

[0053] For example, the material of the cathode may be any of aluminum (Al), silver (Ag) and magnesium (Mg), or any of magnesium-silver alloy and aluminum-lithium alloy.

[0054] The present disclosure does not limit the electrical connection relationship between the light-emitting element P and the pixel circuit C, and may be selectively set according to actual needs.

[0055] For example, multiple pixel circuits C may be electrically connected to one light-emitting element P. The multiple pixel circuits C may supply a drive signal to the corresponding one light-emitting element P to drive the corresponding one light-emitting element P to emit light.

[0056] Furthermore, for example, one pixel circuit C may be electrically connected to multiple light-emitting elements P. The single pixel circuit C may supply drive signals to the corresponding multiple light-emitting elements P to drive the corresponding multiple light-emitting elements P to emit light.

[0057] Furthermore, for example, one pixel circuit C may be electrically connected to one light-emitting element P. The one pixel circuit C may supply a drive signal to the one corresponding light-emitting element P to drive the one corresponding light-emitting element P to emit light.

[0058] Hereinafter, in this disclosure, the configuration of the display substrate 100 will be described schematically, taking as an example a case where one pixel circuit C is electrically connected to one light-emitting element P.

[0059] 2 and 3, the plurality of pixel circuits C includes a plurality of first pixel circuits C1 and a plurality of second pixel circuits C2. For example, the first pixel circuits C1 and the second pixel circuits C2 have the same configuration.

[0060] For example, among the pixel circuits C in the same row along the first direction X, at least one second pixel circuit C2 is provided between two adjacent first pixel circuits C1.

[0061] For example, the number of second pixel circuits C2 located between two adjacent first pixel circuits C1 may be 1, 2, 4, 7, 10, or the like.

[0062] The number of second pixel circuits C2 provided between any two adjacent first pixel circuits C1 may be the same or different, and specifically may be selectively set as necessary.

[0063] For example, the number of second pixel circuits C2 provided between any two adjacent first pixel circuits C1 is the same.

[0064] For example, as shown in FIG. 2, one second pixel circuit C2 is provided between any two adjacent first pixel circuits C1.

[0065] Furthermore, as shown in FIG. 3, two second pixel circuits C2 are provided between any two adjacent first pixel circuits C1.

[0066] 2 and 3, the plurality of light-emitting elements P includes a plurality of first light-emitting elements P1 and a plurality of second light-emitting elements P2. For example, the configuration of the first light-emitting elements P1 and the configuration of the second light-emitting elements P2 are the same.

[0067] Exemplarily, the plurality of first pixel circuits C1 may be electrically connected to the plurality of first light-emitting elements P1, respectively, and may supply drive signals to the plurality of first light-emitting elements P1 to drive the plurality of first light-emitting elements P1 to emit light. The plurality of second pixel circuits C2 may be electrically connected to the plurality of second light-emitting elements P2, respectively, and may supply drive signals to the plurality of second light-emitting elements P2 to drive the plurality of second light-emitting elements P2 to emit light.

[0068] For example, the plurality of first light-emitting elements P1 are located in the first display region A, and the plurality of second light-emitting elements P2 are located in the second display region B. In this manner, both the portion of the display substrate 100 located in the first display region A and the portion of the display substrate 100 located in the second display region B can display images. This allows the display substrate 100 to have a larger display area.

[0069] For example, a first pixel circuit C1 electrically connected to the first light emitting element P1 and a second pixel circuit C2 electrically connected to the second light emitting element P2 are both located in the second display region B.

[0070] It is understood that the material of the pixel circuit C includes a metal material, which has low light transmittance and a high light blocking effect. In the present disclosure, the first pixel circuit C1 electrically connected to the first light-emitting element P1 is provided in the second display region B, so that when external light enters the portion of the display substrate 100 located in the first display region A, the external light is not blocked. This allows the external light to pass through the gap between two adjacent first light-emitting elements P1 and exit, allowing the portion of the display substrate 100 located in the first display region A to have high light transmittance.

[0071] In this way, when the display substrate 100 is applied to a display module, an image collection unit is provided on the non-light-emitting side of the display substrate 100, and the image collection unit is provided within the first display area A, external light can pass through the part of the display substrate 100 located in the first display area A and enter the image collection unit, and be collected by the image collection unit, allowing the image collection unit to operate normally.

[0072] In some examples, the display substrate 100 further includes a plurality of wirings L, as shown in FIG.

[0073] For example, the first pixel circuit C1 and the first light-emitting element P1 are electrically connected via a wiring L.

[0074] In one embodiment, the first pixel circuit C1 and the first light-emitting element P1 are electrically connected in a "near-near connection, far-far connection" manner. That is, among the multiple first light-emitting elements P1 located in the same row, the first light-emitting element P1 closest to the boundary of the first display area A is electrically connected to the first pixel circuit C1 closest to the boundary of the first display area A, and accordingly, the wiring length connecting this first light-emitting element P1 and the first pixel circuit C1 is the shortest, and the first light-emitting element P1 second closest to the boundary of the first display area A is electrically connected to the first pixel circuit C1 second closest to the boundary of the first display area A, and accordingly, this first light-emitting element P1 and the first pixel circuit C1 are connected. The first light-emitting element P1, which has the second shortest wiring length, ..., and is second farthest from the boundary of the first display area A, is electrically connected to the first pixel circuit C1, which is second farthest from the boundary of the first display area A, and accordingly, the first light-emitting element P1, which has the second longest wiring length and is farthest from the boundary of the first display area A, is electrically connected to the first pixel circuit C1, which is farthest from the boundary of the first display area A, and accordingly, the wiring length connecting the first light-emitting element P1 and the first pixel circuit C1 is longest.

[0075] Here, there is a large difference in length between the longest wire and the shortest wire (for example, a difference of at least 65 times). Thus, there is a large difference in the area where the longest wire and the shortest wire overlap with other signal lines (for example, data lines, gate lines, voltage signal lines, etc.). Furthermore, there is a large difference in the parasitic capacitance between each of the longest and shortest wires and other signal lines. As a result, there is a large difference in the losses that occur when the driving signals output by different first pixel circuits C1 are transmitted through each wiring, there is a large difference in the driving signals transmitted to different light-emitting elements P1, and there is a large difference in the brightness of the light emitted by different light-emitting elements P1, resulting in unevenness on the display screen.

[0076] In another embodiment, an external optical compensation (demura) method is typically used to compensate for the brightness difference between different first light-emitting elements P1, where the key step in the demura method is to use the demura algorithm to process the brightness data of the light emitted by different first light-emitting elements P1, thereby generating the necessary compensation data for the different first light-emitting elements P1, thereby compensating for the brightness difference of the light emitted by different first light-emitting elements P1 and improving the non-uniformity phenomenon of the display screen.

[0077] In the above embodiment, the brightness difference between the light emitted by different first light-emitting elements P1 is large, and therefore the Demura algorithm has a high difficulty in compensating for the brightness difference between different first light-emitting elements P1, which can reduce the compensation accuracy of the Demura algorithm.

[0078] Based on this, in the present disclosure, the plurality of first light-emitting elements P1, the plurality of first pixel circuits C1, and the plurality of wirings L are divided.

[0079] 6, in the present disclosure, among the plurality of first light-emitting elements P1, a plurality of first light-emitting elements P1 sequentially arranged along the first direction X are divided into N first light-emitting element groups 10, and the N first light-emitting element groups 10 are sequentially arranged along the first direction. Here, each first light-emitting element group 10 includes M first light-emitting elements P1 sequentially arranged along the first direction X. Along the positive direction of the first direction X, the N first light-emitting element groups are the 1st to Nth first light-emitting element groups 10, respectively, and the M first light-emitting elements are the 1st to Mth first light-emitting elements, respectively. N≧2, M≧2, and both N and M are integers.

[0080] Taking FIG. 1 as an example, the positive direction of the first direction X may be a direction along the first direction X and pointing from the left side of the display substrate 100 to the right side of the display substrate 100, or a direction along the first direction X and pointing from the right side of the display substrate 100 to the left side of the display substrate 100.

[0081] Illustratively, N is 2, 3, 4, 5, 6, etc.

[0082] 7, when N=2, the display substrate 100 includes two first light-emitting element groups 10. Along the positive direction of the first direction X, the two first light-emitting element groups 10 are a first first light-emitting element group 101 and a second first light-emitting element group 102, respectively.

[0083] 8 to 12, when N=3, the display substrate 100 includes three first light-emitting element groups 10. Along the positive direction of the first direction X, the three first light-emitting element groups 10 are a first first light-emitting element group 101, a second first light-emitting element group 102, and a third first light-emitting element group 103, respectively.

[0084] Illustratively, M is 5, 10, 20, 50, 100, etc.

[0085] 7, when M=5, the first light-emitting element group 10 includes five first light-emitting elements P1. Along the positive direction of the first direction X, the five first light-emitting elements P1 are a first first light-emitting element P11, a second first light-emitting element P12, a third first light-emitting element P13, a fourth first light-emitting element P14, and a fifth first light-emitting element P15, respectively.

[0086] 6, in the present disclosure, among the plurality of first pixel circuits C1, the plurality of first pixel circuits C1 arranged sequentially along the first direction X are divided into N first pixel circuit groups 20, and the N first pixel circuit groups 20 are arranged sequentially along the first direction X. Here, the N first pixel circuit groups 20 are located on the same side of the N first light-emitting element groups 10. Each first pixel circuit group 20 includes M first pixel circuits C1 arranged sequentially along the first direction X. Along the negative direction of the first direction X, the N first pixel circuit groups 20 are the 1st to Nth first pixel circuit groups 20, respectively, and the M first pixel circuits are the 1st to Mth first pixel circuits C1, respectively.

[0087] 1, when the positive direction of the first direction X is a direction along the first direction X that points from the left side of the display substrate 100 to the right side of the display substrate 100, the negative direction of the first direction X is a direction along the first direction X that points from the right side of the display substrate 100 to the left side of the display substrate 100. When the positive direction of the first direction X is a direction along the first direction X that points from the right side of the display substrate 100 to the left side of the display substrate 100, the negative direction of the first direction X is a direction along the first direction X that points from the left side of the display substrate 100 to the right side of the display substrate 100.

[0088] Illustratively, N is 2, 3, 4, 5, 6, etc.

[0089] 7, when N=2, the display substrate 100 includes two first pixel circuit groups 20. Along the negative direction of the first direction X, the two first pixel circuit groups 20 are a first first pixel circuit group 201 and a second first pixel circuit group 202, respectively.

[0090] 8 to 12, when N=3, the display substrate 100 includes three first pixel circuit groups 20. Along the negative direction of the first direction X, the three first pixel circuit groups 20 are a first first pixel circuit group 201, a second first pixel circuit group 202, and a third first pixel circuit group 203, respectively.

[0091] Illustratively, M is 5, 10, 20, 50, 100, etc.

[0092] 7, when M=5, the first pixel circuit group 20 includes five first pixel circuits C1. Along the negative direction of the first direction X, the five first pixel circuits C1 are a first first pixel circuit C11, a second first pixel circuit C12, a third first pixel circuit C13, a fourth first pixel circuit C14, and a fifth first pixel circuit C15, respectively.

[0093] 4, in the present disclosure, among the plurality of wirings L, a plurality of wirings L that connect one first light-emitting element group 10 and one first pixel circuit group 20 are distinguished as one wiring group 30. Here, the wiring group 30 includes M wirings L.

[0094] For example, in the first light-emitting element group 10, the first pixel circuit group 20, and the wiring group 30 that are connected, the number of first light-emitting elements P1, the number of first pixel circuits C1, and the number of wirings L are the same.

[0095] Note that the above M and N generally refer to multiple numbers, and do not limit the number of first light-emitting elements P1 included in each first light-emitting element group 10 to be the same, do not limit the number of first pixel circuits C1 included in each first pixel circuit group 20 to be the same, and do not limit the number of wirings L included in each wiring group 30 to be the same.

[0096] For example, the M wires L included in the wiring group 30 are arranged in parallel, which can prevent crossings between the M wires and the resulting short circuit problem.

[0097] For example, the i-th first light-emitting element P1 in the first light-emitting element group 10 is electrically connected to the i-th first pixel circuit C1 in the first pixel circuit group 20 via the i-th wiring L, where i=1 to M.

[0098] 7, the number M of first light-emitting elements P1 included in one first light-emitting element group 10 is five, the number of first pixel circuits C1 included in the first pixel circuit group 20 electrically connected to the first light-emitting element group 10 is five, and the number of wiring groups 30 electrically connected to the first light-emitting element group 10 is five. In this case, the first first light-emitting element P11 is electrically connected to the first first pixel circuit C11 via the first wiring L, the second first light-emitting element P12 is electrically connected to the second first pixel circuit C12 via the second wiring L, the third first light-emitting element P13 is electrically connected to the third first pixel circuit C13 via the third wiring L, the fourth first light-emitting element P14 is electrically connected to the fourth first pixel circuit C14 via the fourth wiring L, and the fifth first light-emitting element P15 is electrically connected to the fifth first pixel circuit C15 via the fifth wiring L.

[0099] In this way, among the first light-emitting elements P1 and first pixel circuits C1 electrically connected to the same wiring L, the arrangement number of the first light-emitting element P1 in the first light-emitting element group 10 is the same as the arrangement number of the first pixel circuit C1 in the first pixel circuit group 20. That is, in the electrically connected first light-emitting element group 10 and first pixel circuit group 20, the first light-emitting element P1 closest to the boundary of the first display area A is electrically connected to the first pixel circuit C1 closest to the boundary of the first display area A, the first light-emitting element P1 second closest to the boundary of the first display area A is electrically connected to the first pixel circuit C1 second closest to the boundary of the first display area A, ..., the first light-emitting element P1 second farthest from the boundary of the first display area A is electrically connected to the first pixel circuit C1 second farthest from the boundary of the first display area A, and the first light-emitting element P1 farthest from the boundary of the first display area A is electrically connected to the first pixel circuit C1 farthest from the boundary of the first display area A.

[0100] In such a same wiring group 30, the lengths of the plurality of wirings L vary with high regularity, and the parasitic capacitances occurring between the plurality of wirings L and other signal lines also vary with high regularity.

[0101] Therefore, when the Demura method is applied to the display substrate 100, the computational difficulty of the Demura algorithm can be reduced, and the compensation accuracy of the Demura algorithm can be improved.

[0102] The first light-emitting element group 10 and the first pixel circuit group 20 electrically connected thereto may be located in the same row or in different rows, and specifically, may be selectively set according to actual needs.

[0103] For example, as shown in FIGS. 6 to 12, the first light emitting element group 10 and the first pixel circuit group 20 electrically connected thereto are provided in the same row.

[0104] For example, the main body of each wire L in the wire group 30 extends in the first direction X. Here, the main body of the wire L refers to the portion of the wire that extends the longest in the same direction.

[0105] Exemplarily, the first light emitting element group 10 and the first pixel circuit group 20 electrically connected thereto are located in different rows.

[0106] For example, each wire L in the wire group 30 extends in a direction in which the first light-emitting element group 10 points toward the first pixel circuit group 20. Optionally, the included angle between the extension direction of the wire and the first direction is, for example, 45°.

[0107] In some examples, as shown in FIGS. 7 to 12, the first first light-emitting element group 101 is electrically connected to one first pixel circuit group 20 other than the first first pixel circuit group 201. And / or, the Nth first light-emitting element group 10 N is the Nth first pixel circuit group 20 N The first pixel circuit group 20 is electrically connected to one of the first pixel circuits 20 other than the first pixel circuit group 20.

[0108] Hereinafter, the electrical connection methods between the first light emitting element group 10 and the first pixel circuit group 20 will be described schematically with reference to FIGS.

[0109] For example, the first first light-emitting element group 101 is electrically connected to one first pixel circuit group 20 other than the first first pixel circuit group 201.

[0110] That is, the first first light-emitting element group 101 may be electrically connected to any of the second to Nth first pixel circuit groups 20. The first first pixel circuit group 20 may be electrically connected to any of the second to Nth first light-emitting element groups 10.

[0111] For example, as shown in FIG. 7, when N=2, the first light-emitting element group 101 is electrically connected to the second pixel circuit group 202.

[0112] For example, as shown in Figures 8 and 10 to 12, when N=3, the first first light-emitting element group 101 is electrically connected to the second first pixel circuit group 202. Alternatively, the first first light-emitting element group 101 is electrically connected to the third first pixel circuit group 203.

[0113] 8 and 10 to 12, when N=3, the first pixel circuit group 201 may be electrically connected to the second first light-emitting element group 102. Alternatively, the first pixel circuit group 201 may be electrically connected to the third first light-emitting element group 103.

[0114] It is understood that the wiring L having the shortest length in each wiring group 30 is the wiring L that connects the first light-emitting element P11 in a certain first light-emitting element group 10 and the first first pixel circuit C11 in a certain first pixel circuit group 20. Furthermore, it does not occur simultaneously that this certain first light-emitting element group 10 is the first first light-emitting element group 101 and that this certain first pixel circuit group 20 is the first first pixel circuit group 201.

[0115] In this case, among the multiple wirings L included in the display substrate 100, the shortest wiring L minAt least one first pixel circuit group 20 and / or at least one first light emitting element group 10 are spaced apart between the first light emitting element P1 and the first pixel circuit C1, which are electrically connected to the shortest wiring L min A plurality of first pixel circuits C1 and / or a plurality of first light-emitting elements P1 are spaced apart between the first light-emitting element P1 and the first pixel circuit C1, which are electrically connected to the first light-emitting element P1. min The length of the shortest wiring is greater than the length of the shortest wiring in the above embodiment.

[0116] In addition, the Nth first light-emitting element group 10 N The Mth first light-emitting element P1 in the first display area A is the first light-emitting element P1 farthest from the boundary of the first display area A, and the Nth first pixel circuit group 20 N The M-th first pixel circuit C1 in the first display area A is the first pixel circuit C1 that is farthest from the boundary of the first display area A. N and the N-th first pixel circuit group 20 N When the N-th first light-emitting element group 10 is electrically connected to the N-th first light-emitting element group 10, N The Mth first light-emitting element P1 and the Nth first pixel circuit group 20 in N The wiring L connecting the M-th first pixel circuit C1 in each wiring group 30 is the wiring L having the longest length. max Here, the longest wiring L max The length of the N-th first light-emitting element group 10 is approximately equal to the length of the longest wiring in the above embodiment. N is the Nth first pixel circuit group 20 N The N-th first pixel circuit group 20 may be electrically connected to a first pixel circuit group 20 other than the N-th first pixel circuit group 20. N is the Nth first light-emitting element group 10 N Therefore, in the present disclosure, the longest wiring L max The length is equal to or less than the length of the longest wiring in the above embodiment.

[0117] That is, in this example, the shortest wiring L minThe length of the longest wiring L is longer than the length of the shortest wiring in the above embodiment. max The length of the shortest wiring L is equal to or less than the length of the longest wiring in the above embodiment. min Length and longest wiring L max This effectively reduces the difference in length between the two.

[0118] For example, the Nth first light-emitting element group 10 N is the Nth first pixel circuit group 20 N The first pixel circuit group 20 is electrically connected to one of the first pixel circuits 20 other than the first pixel circuit group 20.

[0119] That is, the Nth first light-emitting element group 10 N may be electrically connected to any of the 1st to (N-1)th first pixel circuit groups 20. N may be electrically connected to any of the 1st to (N-1)th first light-emitting element groups 10.

[0120] For example, as shown in FIG. 7, when N=2, the second first light-emitting element group 102 is electrically connected to the first first pixel circuit group 201.

[0121] 9 to 12, when N=3, the third first light-emitting element group 103 is electrically connected to the first first pixel circuit group 201. Alternatively, the third first light-emitting element group 103 is electrically connected to the second first pixel circuit group 202.

[0122] 9 to 12, when N=3, the third first pixel circuit group 203 is electrically connected to the first first light-emitting element group 101. Alternatively, the third first pixel circuit group 203 is electrically connected to the second first light-emitting element group 102.

[0123] It is understood that the wiring L having the longest length in each wiring group 30 is the wiring that connects the first light-emitting element P11 in a certain first light-emitting element group 10 to the first pixel circuit C11 in a certain first pixel circuit group 20. Also, this certain first light-emitting element group 10 is the Nth first light-emitting element group 10. N Then, the first pixel circuit group 20 is the Nth first pixel circuit group 20 N The things that are do not occur simultaneously.

[0124] In this case, the longest wiring L among the wirings L included in the display substrate 100 is max At least (M-1) first pixel circuits C1 are spaced apart between the first pixel circuit C1 electrically connected to the longest wiring L and the first pixel circuit C1 farthest from the boundary of the first display area A. max Between the first light-emitting element P1 electrically connected to the first light-emitting element P1 and the first light-emitting element P1 farthest from the boundary of the first display area A, at least (M-1) first light-emitting elements P1 are spaced apart. max In comparison with the embodiment described above, the length of the longest wiring in the embodiment described above is smaller than the length of the longest wiring in the embodiment described above.

[0125] The first first light-emitting element P11 in the first first light-emitting element group 101 is the first light-emitting element P1 closest to the boundary of the first display area A, and the first first pixel circuit C11 in the first first pixel circuit group 201 is the first pixel circuit C1 closest to the boundary of the first display area A. When the first first light-emitting element group 101 and the first first pixel circuit group 201 are electrically connected, the wiring L connecting the first first light-emitting element P11 in the first first light-emitting element group 101 and the first first pixel circuit C11 in the first first pixel circuit group 201 is the wiring L having the shortest length in each wiring group 30. min Here, the shortest wiring L min The length of the first light-emitting element group 10 is approximately equal to the length of the shortest wiring in the above embodiment. Nmay be electrically connected to a first pixel circuit group 20 other than the first first pixel circuit group 201, or the first first pixel circuit group 201 may be electrically connected to a first light-emitting element group 10 other than the first first light-emitting element group 101. min The length of the wiring is equal to or greater than the length of the shortest wiring in the above embodiment.

[0126] That is, in this example, the longest wiring L max The length of the shortest wiring L is smaller than the length of the longest wiring in the above embodiment. min The length of the shortest wiring L is equal to or greater than the length of the shortest wiring in the above embodiment. min Length and longest wiring L max This effectively reduces the difference in length between the two.

[0127] For example, the first first light-emitting element group 101 is electrically connected to the first pixel circuit groups 20 other than the first first pixel circuit group 201. N is the Nth first pixel circuit group 20 N The first pixel circuit group 20 is electrically connected to one of the first pixel circuits 20 other than the first pixel circuit group 20.

[0128] That is, the first first light-emitting element group 101 may be electrically connected to any of the second to (N-1)th first pixel circuit groups, and the Nth first light-emitting element group 10N may be electrically connected to any of the first to (N-1)th first pixel circuit groups 20.

[0129] For example, as shown in Figure 7, when N = 2, the first first light-emitting element group 101 is electrically connected to the second first pixel circuit group 202, and the second first light-emitting element group 102 is electrically connected to the first first pixel circuit group 201.

[0130] For example, as shown in Figures 10 to 12, when N=3, the first first light-emitting element group 101 is electrically connected to the second first pixel circuit group 202 or the third first pixel circuit group 203, and the third first light-emitting element group 103 is electrically connected to the first first pixel circuit group 201 or the second first pixel circuit group 202.

[0131] In this way, among the multiple wirings L included in the display substrate 100, the shortest wiring L min At least one first pixel circuit group 20 and / or at least one first light emitting element group 10 are spaced apart between the first light emitting element P1 and the first pixel circuit C1, which are electrically connected to the longest wiring L max At least (M-1) first pixel circuits C1 are spaced apart between the first pixel circuit C1 electrically connected to the longest wiring L and the first pixel circuit C1 farthest from the boundary of the first display area A. max Between the first light-emitting element P1 electrically connected to the first display area A and the first light-emitting element P1 farthest from the boundary of the first display area A, at least (M-1) first light-emitting elements P1 are spaced apart.

[0132] In this example, the shortest wiring L min The length of the longest wiring L max This means that the length of the shortest wiring L min Length and longest wiring L max The difference in length between

[0133] Hereinafter, taking an example where the number N of the first light emitting element groups 10 is two and the number N of the first light emitting element groups 10 is three, the correspondence between the N first light emitting element groups 10 and the N first pixel circuit groups 20, and the shortest wiring L among the multiple wirings L will be described. min and the longest wiring L max A specific example of this will be explained schematically.

[0134] For example, as shown in Figure 7, when N = 2, the first first light-emitting element group 101 is electrically connected to the second first pixel circuit group 202 via the wiring group 301, and the second first light-emitting element group 102 is electrically connected to the first first pixel circuit group 201 via the wiring group 302.

[0135] The first pixel circuit group 201 is spaced apart between the first light-emitting element group 101 and the second first pixel circuit group 202, and the first light-emitting element group 101 is spaced apart between the second first light-emitting element group 102 and the first first pixel circuit group 201.

[0136] Therefore, among the plurality of wirings L included in the wiring group 301, the first pixel circuit group 201 is separated between the first light-emitting element P1 electrically connected to the shortest wiring and the first pixel circuit C1, i.e., at least M first pixel circuits C1 are separated. Among the plurality of wirings L included in the wiring group 302, the first pixel circuit group 10 is separated between the first light-emitting element P1 electrically connected to the shortest wiring and the first pixel circuit C1, i.e., M first light-emitting elements P1 are separated. Therefore, among the plurality of wirings L included in each wiring group 30 in this example, the shortest wiring L min The length of the shortest wiring is greater than the length of the shortest wiring in the above embodiment.

[0137] On the other hand, among the multiple wirings L included in the wiring group 301, the first pixel circuit C1 electrically connected to the longest wiring is the first pixel circuit C1 farthest from the boundary of the first display area A, and the first light-emitting element P1 electrically connected to the longest wiring belongs to the first first light-emitting element group 101, and there are (M-1) first light-emitting elements P1 spaced apart between the first light-emitting element P1 electrically connected to the longest wiring and the first light-emitting element P1 farthest from the boundary of the first display area A. Therefore, the length of the longest wiring in the wiring group 301 is shorter than the length of the longest wiring in the above embodiment.

[0138] Of the multiple wires L included in the wire group 302, the first light-emitting element P1 electrically connected to the longest wire is the first light-emitting element P1 farthest from the boundary of the first display area A, the first pixel circuit C1 electrically connected to the longest wire belongs to the first first pixel circuit group, and (M-1) first pixel circuits C1 are spaced apart between the first pixel circuit C1 electrically connected to the longest wire and the first pixel circuit C1 farthest from the boundary of the first display area A. Therefore, the length of the longest wire in the wire group 302 is shorter than the length of the longest wire in the above embodiment.

[0139] Therefore, in each wiring group 30, the longest wiring L max The length of the longest wiring is smaller than the length of the shortest wiring L min The length of the longest wiring L in this example is greater than the length of the shortest wiring in the above embodiment. max Length and longest wiring L max The difference in length between the first and second inputs is reduced compared to the first implementation.

[0140] For example, as shown in FIGS. 8 to 12, when N=3, there are various options for the electrical connection method between the first light emitting element group 10 and the first pixel circuit group 20.

[0141] 8, the first first light-emitting element group 101 is electrically connected to the second first pixel circuit group 202 via a wiring group 303. The second first light-emitting element group 102 is electrically connected to the first first pixel circuit group 201 via a wiring group 304, and the third first light-emitting element group 103 is electrically connected to the third first pixel circuit group 203 via a wiring group 305.

[0142] Here, the distance between the third first light emitting element group 103 and the third first pixel circuit group 203 is the longest, and the longest wiring L among the multiple wirings L included in the wiring group 305 is max is the longest wiring L among the multiple wirings L included in each wiring group 30. max This longest wiring L max The length of the wiring is approximately equal to the length of the longest wiring in the above embodiment.

[0143] However, the first pixel circuit group 201 is spaced between the first light-emitting element group 101 and the second pixel circuit group 202, and the first light-emitting element group 101 is spaced between the second light-emitting element group 102 and the first pixel circuit group 201.

[0144] Among the multiple wirings L included in the wiring group 303, the first pixel circuit group 20 is separated between the first light-emitting element P1 electrically connected to the shortest wiring and the first pixel circuit C1, i.e., at least M first pixel circuits C are separated. Among the multiple wirings L included in the wiring group 304, the first pixel circuit group 10 is separated between the first light-emitting element P1 electrically connected to the shortest wiring and the first pixel circuit C1, i.e., M first light-emitting elements P1 are separated. Therefore, among the wirings L included in each wiring group 30 in this example, the shortest wiring L min The length of the shortest wiring is greater than the length of the shortest wiring in the above embodiment.

[0145] Therefore, the shortest wiring L in this example min The length of the shortest wiring L min Therefore, the length of the longest wiring L max Length and shortest wiring L min The difference in length is small.

[0146] Also, as shown in Figure 9, the first first light-emitting element group 101 is electrically connected to the first first pixel circuit group 201 via wiring group 306, the second first light-emitting element group 102 is electrically connected to the third first pixel circuit group 203 via wiring group 307, and the third first light-emitting element group 103 is electrically connected to the second first pixel circuit group 202 via wiring group 308.

[0147] Here, the distance between the first light emitting element group 101 and the first pixel circuit group 201 is the shortest, and the wiring L is the shortest among the wirings L included in the wiring group 306. minis the shortest wiring L among the multiple wirings L included in each wiring group 30. min This shortest wiring L min The length of the wiring is approximately equal to the length of the shortest wiring in the above embodiment.

[0148] However, among the multiple wirings L included in the wiring group 307, the first pixel circuit C1 electrically connected to the longest wiring is the first pixel circuit C1 farthest from the boundary of the first display area A, and there is a distance of (M-1) first light-emitting elements P1 between the first light-emitting element P1 electrically connected to the longest wiring and the first light-emitting element P1 farthest from the boundary of the first display area A. Therefore, the length of the longest wiring in the wiring group 307 is shorter than the length of the longest wiring in the above embodiment.

[0149] Of the multiple wires L included in the wire group 308, the first light-emitting element P1 electrically connected to the longest wire is the first light-emitting element P1 farthest from the boundary of the first display area A, and there are (M-1) first pixel circuits C1 spaced apart between the first pixel circuit C1 electrically connected to the longest wire and the first pixel circuit C1 farthest from the boundary of the first display area A. Therefore, the length of the longest wire in the wire group 308 is shorter than the length of the longest wire in the above-described embodiment.

[0150] Therefore, the longest wiring L max The length of the longest wiring L in the above embodiment is max Therefore, the length of the longest wiring L max Length and shortest wiring L min The difference in length is small.

[0151] 10, the first light-emitting element group 101 is electrically connected to the third pixel circuit group 203 via the wiring group 309. The second light-emitting element group 102 is electrically connected to the third pixel circuit group 203 via the wiring group 309. 10 The third first light emitting element group 103 is electrically connected to the second first pixel circuit group 202 via the wiring group 30. 112. The first pixel circuit group 201 is electrically connected to the first pixel circuit group 201 via the first pixel circuit group 201.

[0152] In this case, two first pixel circuit groups 20 are spaced apart between the first first light-emitting element group 101 and the third first pixel circuit group 203. One first light-emitting element group 10 and one first pixel circuit group 20 are spaced apart between the second first light-emitting element group 102 and the second first pixel circuit group 202. Two first light-emitting element groups 10 are spaced apart between the third first light-emitting element group 103 and the first first pixel circuit group 201.

[0153] In this example, the shortest wiring L among all the wirings L min and the longest wiring length L max For the explanation of the above, please refer to the explanation procedures in some examples, and the explanation will be omitted here.

[0154] The shortest wiring in this example is L min The length of the longest wiring L is longer than the length of the shortest wiring in the above embodiment. max The length of the longest wire in this example is smaller than the length of the longest wire in the embodiment described above. max and the shortest wiring L min The difference is small.

[0155] As shown in FIG. 11, the first light emitting element group 101 is connected to the wiring group 30. 12 The second first light emitting element group 102 is electrically connected to the second first pixel circuit group 202 via the wiring group 30. 13 The third first light emitting element group 103 is electrically connected to the third first pixel circuit group 203 via the wiring group 30. 14 2. The first pixel circuit group 201 is electrically connected to the first pixel circuit group 201 via the first pixel circuit group 201.

[0156] In this case, one first pixel circuit group 20 is spaced between the first first light-emitting element group 101 and the second first pixel circuit group 202. Two first pixel circuit groups 20 and one first light-emitting element group 10 are spaced between the second first light-emitting element group 102 and the third first pixel circuit group 203. Two first light-emitting element groups 10 are spaced between the third first light-emitting element group 103 and the first first pixel circuit group 201.

[0157] In this example, the shortest wiring L among all the wirings L min and the longest wiring length L max For the explanation of the above, please refer to the explanation procedures in some examples, and the explanation will be omitted here.

[0158] The shortest wiring in this example is L min The length of the longest wiring L is longer than the length of the shortest wiring in the above embodiment. max The length of the longest wire in this example is smaller than the length of the longest wire in the embodiment described above. max and the shortest wiring L min The difference is small.

[0159] As shown in FIG. 12, the first light emitting element group 101 is connected to the wiring group 30. 15 The second first light emitting element group 102 is electrically connected to the third first pixel circuit group 203 via the wiring group 30. 16 The third first light emitting element group 103 is electrically connected to the first pixel circuit group 201 via the wiring group 30. 17 The first pixel circuit group 202 is electrically connected to the second first pixel circuit group 202 via the first pixel circuit group 202 .

[0160] In this case, two first pixel circuit groups 20 are spaced apart between the first first light-emitting element group 101 and the third first pixel circuit group 203. One first light-emitting element group 10 is spaced apart between the second first light-emitting element group 102 and the first first pixel circuit group 201. Two first light-emitting element groups 10 and one first pixel circuit group 20 are spaced apart between the third first light-emitting element group 103 and the second first pixel circuit group 202.

[0161] In this example, the shortest wiring L among all the wirings L min and the longest wiring length L max For the explanation of the above, please refer to the explanation procedures in some examples, and the explanation will be omitted here.

[0162] The shortest wiring in this example is L min The length of the longest wiring L is longer than the length of the shortest wiring in the above embodiment. max The length of the longest wire in this example is smaller than the length of the longest wire in the embodiment described above. max and the shortest wiring L min The difference is small.

[0163] Therefore, the display substrate 100 provided in some embodiments of the present disclosure divides a plurality of first light-emitting elements P1 located in the first display region A into N first light-emitting element groups 10, and divides a plurality of first pixel circuits C1 located in the second display region B into N first pixel circuit groups 20, so that one first light-emitting element group 10 and one first pixel circuit group 20 are electrically connected via one wiring group 30.

[0164] The first first light emitting element group 101 is electrically connected to one first pixel circuit group 20 other than the first first pixel circuit group 201, so that the shortest wiring L min At least one first pixel circuit group 20 and / or at least one first light emitting element group 10 is ensured to be spaced apart between the first light emitting element P1 and the first pixel circuit C1 electrically connected to the shortest wiring L min ensure that the length of the longest wire L is greater than the length of the shortest wire in the above embodiment; max Length and shortest wiring L min This effectively reduces the difference in length between the two.

[0165] Nth first light-emitting element group 10 N is the Nth first pixel circuit group 20 NBy electrically connecting to one of the first pixel circuit groups 20 other than max The first pixel circuit C1 electrically connected to the first display area A is a first pixel circuit C1 other than the first pixel circuit C1 farthest from the boundary of the first display area A, and / or the longest wiring L max It is ensured that the first light emitting element P1 electrically connected to the first display area A is a first light emitting element P1 other than the first light emitting element P1 farthest from the boundary of the first display area A, and this longest wiring L max ensure that the length of the longest wire L is smaller than the length of the longest wire in the above embodiment, max Length and shortest wiring L min This effectively reduces the difference in length between the

[0166] The first light-emitting element group 101 is electrically connected to the first pixel circuit group 20 other than the first pixel circuit group 201, and the Nth light-emitting element group 10 N is the Nth first pixel circuit group 20 N By electrically connecting to one of the first pixel circuit groups 20 other than max The length of the shortest wiring L among all the wirings L is shorter than the length of the longest wiring in the above embodiment. min ensure that the length of the longest wire L is greater than the length of the shortest wire in the above embodiment, max Length and shortest wiring L min This effectively reduces the difference in length between the

[0167] Therefore, among all the wirings L included in the display substrate 100 in some embodiments of the present disclosure, the shortest wiring L min Length and longest wiring L max The difference in length between the shortest wiring L min The magnitude of the parasitic capacitance that occurs between the signal line and other signal lines, and the longest wiring L maxThis reduces the difference in the magnitude of parasitic capacitance between the wiring L and other signal lines, and correspondingly reduces the difference in the magnitude of parasitic capacitance between the wiring L and other signal lines. In this way, the difference in loss occurring when the driving signals generated by the different first pixel circuits C1 are transmitted along the different wirings L is small, thereby preventing large differences in the driving signals transmitted to the different first light-emitting elements P1. This reduces the difference in luminance of the light emitted by the different first light-emitting elements P1, thereby preventing unevenness on the display screen. Meanwhile, when the Demura method is applied to the display substrate 100, the small difference in luminance of the light emitted by the different first light-emitting elements P1 can reduce the computational complexity of the Demura algorithm, reduce the difficulty of compensation by the Demura algorithm, and further improve the compensation accuracy of the Demura algorithm.

[0168] In some embodiments, the number of first pixel circuits C1 included in different first pixel circuit groups 20 may be the same or different. The number of first light-emitting elements P1 included in different first light-emitting element groups 10 may be the same or different. Specifically, this may be selectively set as necessary.

[0169] 7 to 12, the number of first pixel circuits C1 included in each first pixel circuit group 20 is the same. The number of first light-emitting elements P1 included in each first light-emitting element group 10 is the same.

[0170] In this way, when the Demura method is applied to the display substrate 100, the Demura algorithm processes the same amount of brightness data when compensating for the brightness difference of the first light-emitting element P1 in different first light-emitting element groups 10, which can simplify the computational complexity of the Demura algorithm.

[0171] In some embodiments, the display substrate 100 further includes three multi-layer wiring layers 4 that are provided between the pixel circuit layer 2 and the light emitting element layer and are stacked in sequence.

[0172] In some examples, one wiring group 30 is located in one wiring layer 4. In this case, the multiple wirings L located in one wiring group 30 are located in the same wiring layer 4.

[0173] For example, one wiring layer 4 may include a plurality of wiring groups 30 located in the same wiring layer 4.

[0174] For example, each wiring layer 4 includes at least two wirings L.

[0175] For example, the material of the multi-wiring layer 4 includes a light-transmitting conductive material.

[0176] It is understood that a light-transmitting conductive material has high transmittance. By forming the wiring layer 4 using a light-transmitting conductive material, the plurality of wires L located on the wiring layer 4 can have high transmittance, and it is possible to avoid blocking external light that passes through the portion of the display substrate 100 located in the first display region A, thereby ensuring high transmittance in the portion of the display substrate 100 located in the first display region A.

[0177] For example, the optically transparent conductive material may include at least one of materials such as indium tin oxide, indium zinc oxide, and indium gallium zinc oxide.

[0178] In some examples, the wirings L electrically connected to the same first light-emitting element group 10 are located in the same layer.

[0179] For example, the plurality of wires in the wiring group electrically connected to the first first light-emitting element group are provided in the same layer. The plurality of wires in the wiring group electrically connected to the second first light-emitting element group are provided in the same layer. ... The Nth first light-emitting element group 10 N The wirings L in the wiring group electrically connected to the wirings are provided in the same layer.

[0180] For example, when N=3, the wiring L electrically connected to the first first light-emitting element group 101 is provided in the same layer. The wiring L electrically connected to the second first light-emitting element group 102 is provided in the same layer. The wiring L electrically connected to the third first light-emitting element group 103 is provided in the same layer.

[0181] The term "same layer" as used herein refers to a layer structure formed by forming a film layer for forming a specific pattern using the same film formation process, followed by a first patterning process using the same mask template. Depending on the specific pattern, the first patterning process may include multiple exposure, development, or etching processes. The specific pattern in the formed layer structure may be continuous or discontinuous, and these specific patterns may be at different heights or have different thicknesses. This allows multiple wirings L electrically connected to the same first light-emitting element group 10 to be simultaneously formed in the primary patterning process, which is advantageous for simplifying the manufacturing process of the display substrate 100.

[0182] The wiring L electrically connected to the plurality of different first light-emitting element groups 10 may be installed in a plurality of ways.

[0183] For example, the wirings L electrically connected to a plurality of different first light-emitting element groups 10 are disposed in different layers. That is, the wirings L electrically connected to different first light-emitting element groups 10 along the thickness direction of the display substrate 100 are located in different wiring layers 4. This makes it possible to avoid short circuits between the wirings L electrically connected to different first light-emitting element groups 10.

[0184] For example, among the wirings L electrically connected to a plurality of different first light-emitting element groups 10, the wirings L electrically connected to some of the first light-emitting element groups 10 are located on the same layer, and the wirings L electrically connected to other parts of the first light-emitting element groups 10 are located on the same layer, and the two parts of the wirings L are located on different layers. This simplifies the manufacturing process of the display substrate 100 and can avoid the problem of short circuits between the wirings L electrically connected to different first light-emitting element groups 10.

[0185] In some examples, the number of the above-mentioned multilayer wiring layers 4 is the same as the number of the N first light-emitting element groups 10. That is, when the number of the first light-emitting element groups 10 is N, the number of the wiring layers 4 is also N. This makes it possible to reduce the number of wiring layers 4 required for the display substrate 100, simplify the manufacturing process of the display substrate 100, and avoid an increase in the thickness of the display substrate 100.

[0186] For example, the number of first light-emitting element groups 10 is two, and the number of wiring layers 4 is also two.

[0187] For example, the number of first light-emitting element groups 10 is three, and the number of wiring layers 4 is also three.

[0188] 4 to 5 and 8 to 12, in some examples, the orthogonal projections of the M wires in the same wiring group 30 on the plane on which the display substrate 100 is located do not overlap. Therefore, there is a gap between two adjacent wires L. This makes it possible to avoid short-circuit problems between multiple wires L located on the same layer.

[0189] For example, the gaps between any two adjacent wirings L have the same width in the second direction Y.

[0190] In some examples, among the M wirings L in the same wiring group 30, the length of the i-th wiring L is equal to the distance between the i-th first light-emitting element P1 and the i-th first pixel circuit C1, or differs by a predetermined length.

[0191] For example, the length of some of the M wirings L is equal to the distance between the first light-emitting element P1 and the first pixel circuit C1 electrically connected to the wiring L.

[0192] For example, the main body of this part of the wiring L extends in the first direction X. Here, the main body of the wiring L refers to the portion of the wiring that extends the longest in the same direction.

[0193] For example, the length of some of the M wirings L differs from the distance between the first light-emitting element P1 and the first pixel circuit C1 electrically connected to the wiring L by a preset length ΔL.

[0194] For example, one end of this portion of the wiring L is electrically connected to the first light-emitting element P1, first extends along the second direction Y away from the first light-emitting element P1, then extends along the first direction X from the first display area A to the second display area B, and finally extends along the second direction Y towards the first pixel circuit C1, and is electrically connected to the first pixel circuit C1.

[0195] For example, the progression of the plurality of preset lengths ΔL is an arithmetic progression, i.e., the difference between the preset lengths ΔL of any two adjacent wires L in this part of the wiring L is equal.

[0196] In this way, it is advantageous to improve the regularity of the length changes of the multiple wirings L in the wiring group 30 and further improve the regularity of the parasitic capacitance formed in different wirings L, thereby reducing the difficulty of compensation of the Demura algorithm when the Demura method is applied to the display substrate 100, improving the compensation accuracy of the Demura algorithm, and further reducing the brightness difference of the light emitted by the first light-emitting element P1.

[0197] In some examples, the progression of lengths of the M wires L in the same wire group 30 is an arithmetic progression, that is, the difference in length between any two adjacent wires L is equal.

[0198] For example, the length of the first wiring L is a, and the difference in length between any two adjacent wirings L is b. In this case, the sequence of lengths of the M wirings L is a, a+b, a+2b, a+3b... a+(M-2)b, a+(M-1)b.

[0199] By making the progression of the lengths of the M wires L an arithmetic progression, it is possible to ensure that the changes in the lengths of the M wires L are uniform, thereby ensuring that the changes in the overlapping areas between the M wires and other signal lines are regular, the changes in the magnitude of the generated parasitic capacitance values ​​are also regular, and ultimately that the changes in the amount of loss generated by the driving signal during transmission along the M wires are relatively regular, and that the differences in brightness of the light emitted by different first light-emitting elements P1 are relatively regular. Therefore, when the Demura method is applied to the display substrate 100, it is convenient for the Demura algorithm to compensate for the brightness of the light emitted by different first light-emitting elements P1, which is advantageous in reducing the difficulty of the Demura algorithm's compensation and improving the compensation accuracy of the Demura algorithm.

[0200] In some examples, the Pth first light-emitting element group 10 is electrically connected to the (N-P+1)th first pixel circuit group 20 via the corresponding wiring group 30, where P=1 to N. In this case, among the electrically connected first light-emitting element groups 10 and first pixel circuit groups 20, the array number of the first light-emitting element group 10 and the array number of the first pixel circuit group 20 are reversed.

[0201] That is, the first light-emitting element group 10 closest to the boundary of the first display area A is electrically connected to the first pixel circuit group 20 farthest from the boundary of the first display area A, the first light-emitting element group 10 second closest to the boundary of the first display area A is electrically connected to the first pixel circuit group 20 second farthest from the boundary of the first display area A, ..., the first light-emitting element group 10 farthest from the boundary of the first display area A is electrically connected to the first pixel circuit group 20 closest to the boundary of the first display area A.

[0202] 7, for example, N=2, the first first light-emitting element group 101 and the second first pixel circuit group 202 are electrically connected. The second first light-emitting element group 102 and the first first pixel circuit group 201 are electrically connected.

[0203] For example, as shown in Figure 10, when N=3, the first first light-emitting element group 101 and the third first pixel circuit group 203 are electrically connected, the second first light-emitting element group 102 and the second first pixel circuit group 202 are electrically connected, and the third first light-emitting element group 103 and the first first pixel circuit group 201 are electrically connected.

[0204] As a result, when N first light-emitting element groups 10 and N first pixel circuit groups 20 are electrically connected in the manner of this example, the sum of the numbers of first light-emitting element groups 10 and / or first pixel circuit groups 20 spaced between each pair of first light-emitting element group 10 and first pixel circuit group 20 is the same, thereby reducing the difference in length of the wiring L in different wiring groups 30. This can further reduce the difficulty of compensation in the Demura algorithm and improve the compensation accuracy of the Demura algorithm.

[0205] 14 , the display substrate 100 includes two repeat units 40 located in the first display region A and sequentially arranged along the first direction X, and each repeat unit 40 includes N first light-emitting element groups 10. The two repeat units 40 are located on either side of a reference line Z, which is a straight line extending along the second direction Y and passing through the first display region A. The first pixel circuit groups 20 electrically connected to the two repeat units 40 are located on either side of the first direction X in the first display region A. The wiring groups 30 electrically connected to the two repeat units 40 are located on either side of the reference line Z.

[0206] Illustratively, as shown in FIG. 14, the two repeat units 40 described above are arranged in the same row.

[0207] 14, one of the two repeat units 40, the first pixel circuit group 20 electrically connected to this repeat unit 40, and the wiring group 30 electrically connected to this repeat unit 40 are located along the first direction X of the reference line Z and on the side pointing from the first display region A to the second display region B. The other of the two repeat units 40, the first pixel circuit group 20 electrically connected to this repeat unit 40, and the wiring group 30 electrically connected to this repeat unit 40 are located along the first direction X of the reference line Z and on the side pointing from the second display region B to the other side of the first display region A.

[0208] In this case, the display substrate 100 can be provided with the wiring lines L on both opposing sides of the first display region A. This allows the length of the wiring lines L in each wiring group 30 to be shortened.

[0209] Illustratively, the reference line Z divides the first display area A into two areas.

[0210] The number of first light-emitting element groups 10 included in the two repeat units 40 may be the same or different.

[0211] For example, if the numbers of first light-emitting element groups 10 included in the two repeat units 40 are different, the sizes of the two regions will also be different.

[0212] Furthermore, when the number of first light-emitting element groups 10 included in the two repeat units 40 is the same, the sizes of the two regions are also the same.

[0213] Illustratively, the number of first light-emitting element groups 10 included in the two repeat units 40 is the same. Thus, the number of wiring groups 30 required to connect the two repeat units 40 is also the same. This means that the amount of data encountered when processing multiple wirings L in different repeat units 40 in the Demura algorithm is relatively fixed, which can simplify the computational difficulty of the Demura algorithm.

[0214] 13, the first display area A has a center O, and the reference line Z is a straight line passing through the center O. In this case, the reference line Z divides the first display area A into two symmetrical areas, and two repeat units 40 are located in the two symmetrical areas, respectively.

[0215] For example, the configuration of the N wiring groups 30 corresponding to each of the two repeat units 40 may be symmetrical with respect to the reference line Z. This simplifies the structure of the display substrate 100 and strengthens the regularity between the lengths of the multiple wirings L included in the display substrate 100. This reduces the difficulty of compensation in the Demura algorithm and improves the compensation accuracy of the Demura algorithm.

[0216] For example, the wiring groups 30 electrically connected to the j-th first light-emitting element groups 10 in each repeat unit 40 are located in the same layer, where j=1 to N. That is, of two repeat units 40, two wiring groups 30 electrically connected to two first light-emitting element groups 10 having the same array number are provided in the same layer. This allows the multiple wirings L that form the two wiring groups 30 to be simultaneously produced in the first patterning process, simplifying the manufacturing process of the display substrate 100 and reducing the number of wiring layers 4.

[0217] When the two repeat units 40 include the same number of first light-emitting element groups 10, the number of wiring layers 4 required to provide the wiring group 30 is the same as the number of first light-emitting element groups 10 included in the repeat unit 40. When the two repeat units 40 include different numbers of first light-emitting element groups 10, the number of wiring layers 4 required to provide the wiring group 30 is the same as the larger number of first light-emitting element groups 10 included in the repeat unit 40.

[0218] For example, the number of first light-emitting element groups 10 included in the two repeat units 40 is the same, that is, three.

[0219] In this case, the wiring group 30 electrically connected to the first first light-emitting element group 10 in each repeat unit 40 is located on the same layer. The wiring group 30 electrically connected to the second first light-emitting element group 10 in each repeat unit 40 is located on the same layer. The wiring group 30 electrically connected to the third first light-emitting element group 10 in each repeat unit 40 is located on the same layer.

[0220] In this way, only three wiring layers are required to provide six wiring groups 30, reducing the number of required wiring layers 4 and simplifying the manufacturing process of the display substrate 100.

[0221] For example, the number of first light-emitting element groups 10 included in two repeating units 40 is different, with one repeating unit 40 including four first light-emitting element groups 10 and the other repeating unit 40 including three first light-emitting element groups 10.

[0222] In this case, the wiring group 30 electrically connected to the fourth first light-emitting element group 10 included in the repeating unit 40 may be located in one wiring layer 4 alone.

[0223] In this way, only four wiring layers are required to install the seven wiring groups 30, reducing the number of required film layers and simplifying the manufacturing process of the display substrate 100.

[0224] In some examples, as shown in FIG. 14 , the display substrate 100 is located in the first display area A and includes two columns of repeat units arranged sequentially along the first direction X, and each column of repeat units includes at least two rows of repeat units 40 arranged sequentially along the second direction Y.

[0225] The number of first light-emitting element groups 10 included in the repeating units 40 located in the same column may be the same or different.

[0226] For example, the number of first light-emitting element groups 10 included in repeat units 40 located in the same column is the same. In this way, the number of wiring groups 30 required for different repeat units 40 located in the same column is also the same. As a result, the amount of data that the Demura algorithm faces when processing multiple wirings L in different repeat units 40 located in the same column is relatively fixed, which can simplify the computational difficulty of the Demura algorithm.

[0227] For example, the first pixel circuit groups 20 electrically connected to the repeat units 40 in the same column are located on the same side of the first display area A and are sequentially arranged along the second direction Y. In this way, the arrangement method of the plurality of first pixel circuits C1 included in the display substrate 100 can be simplified, and the difficulty of manufacturing the display substrate 100 can be reduced.

[0228] For example, the first pixel circuit group 20 electrically connected to the repeating units 40 located in the same column are all located along the first direction X of the first repeating units 40 and on the side pointing from the first display area A to the second display area B.

[0229] For example, among the repeat units 40 in the same column, the wiring groups 30 electrically connected to the j-th first light-emitting element groups 10 in the repeat units in each row are located in the same layer, where j = 1 to N. That is, among the N first light-emitting element groups 10 included in each repeat unit 40, the wiring groups 30 electrically connected to first light-emitting element groups 10 having the same array number are provided in the same layer. This makes it possible to simultaneously produce multiple wires L that form each of the wiring groups in the first patterning process, which is advantageous for simplifying the manufacturing process of the display substrate 100.

[0230] Furthermore, the number of wiring groups 30 required when there are multiple repeat units 40 in each column is the same as the number of wiring groups 30 required when there is only one repeat unit 40. Because one wiring group 30 is located in one wiring layer 4, an increase in the number of repeat units 40 does not require an increase in the number of required wiring layers 4, and therefore does not require an increase in the number of film layers of the display substrate 100, thereby simplifying the manufacturing technology for the display substrate 100 and avoiding an increase in the thickness of the display substrate 100.

[0231] In some embodiments, as shown in FIG. 15, a display module 1000 is provided, which includes a display substrate 100 described in some of the above embodiments and an image collection unit 200 provided on the non-light-emitting side of the display substrate 100 and located in a first display area A of the display substrate 100.

[0232] 15, when the display substrate 100 includes a base 1 and a light-emitting element layer 3 located on one side of the base 1, the non-light-emitting side refers to the side of the base 1 of the display substrate 100 that is farther away from the light-emitting element layer 3. In this case, the side of the light-emitting element layer 3 of the display substrate 100 that is farther away from the base 1 is the light-emitting side.

[0233] Illustratively, the image acquisition unit 200 includes a camera or an infrared sensor.

[0234] In the present disclosure, the image collecting unit 200 is a camera.

[0235] For example, during operation of the camera, the pixel circuits C are not provided in the portion of the display substrate 100 located in the first display region A, so that the pixel circuits C do not block external light, and external light can pass through the portion of the display substrate 100 located in the first display region A. This allows the camera to collect this light and achieve a photographing function.

[0236] For example, when the camera is not operating, the portion located in the first display area A of the display substrate 100 can also be displayed, and the entire display substrate 100 can display an image, thereby realizing a full-screen display.

[0237] As a result, by installing a camera in the first display area A of the display substrate 100 and positioning it on the non-light-emitting side of the display substrate 100, the display substrate 100 can achieve full-screen display while having an imaging function.

[0238] The display substrate 100 included in the display module 1000 in some embodiments of the present disclosure has the same structure and beneficial effects as the display substrate 100 provided in the above-mentioned embodiments, and will not be described here.

[0239] In some embodiments, as shown in FIG. 16, a display device 2000 is provided, which includes the display module 1000 described in some of the embodiments above.

[0240] For example, the display device 2000 may include a frame, a circuit board provided in the frame, a display driver IC (Integrated Circuit), and other electronic components.

[0241] Illustratively, the display device 2000 may be any product or component having a display function and an image collection function, such as a mobile phone, a tablet, a notebook computer, a laptop, a personal computer, a display, a wearable device, and the like.

[0242] The display module 1000 included in the display device 2000 in some embodiments of the present disclosure has the same structure and beneficial effects as the display module 1000 provided in some of the above-mentioned embodiments, and will not be described here.

[0243] The above are only specific embodiments of the present disclosure, and the scope of protection of the present disclosure is not limited thereto. Any modifications or replacements that can be easily thought of by a person skilled in the art within the technical scope of the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be governed by the scope described in the claims.

Claims

1. a display substrate having a first display area and a second display area, the second display area surrounding at least a portion of the first display area; The display substrate is N first light-emitting element groups located in the first display area and sequentially arranged in a first direction, the first light-emitting element groups including M first light-emitting elements sequentially arranged along the first direction, the N first light-emitting element groups being 1st to Nth first light-emitting element groups along the positive direction of the first direction, and the M first light-emitting element groups being 1st to Mth first light-emitting element groups along the positive direction of the first direction, N≧2, M≧2, and both N and M are integers; N first pixel circuit groups located in the second display area and sequentially arranged in the first direction, the N first pixel circuit groups being located on the same side of the N first light-emitting element groups, and the first pixel circuit groups including M first pixel circuits sequentially arranged along the first direction, the N first pixel circuit groups being 1st to Nth first pixel circuit groups, respectively, along a negative direction of the first direction, and the M first pixel circuits being 1st to Mth first pixel circuits, respectively; a wiring group connecting one first light-emitting element group and one first pixel circuit group, the wiring group including M wires arranged in parallel, an i-th first light-emitting element in the first light-emitting element group electrically connected to an i-th first pixel circuit in the first pixel circuit group via the i-th wire, and a wiring group where i=1 to M; the first first light-emitting element group is electrically connected to one first pixel circuit group other than the first first pixel circuit group, and / or the Nth first light-emitting element group is electrically connected to one first pixel circuit group other than the Nth first pixel circuit group; Display board.

2. Wirings electrically connected to the same first light-emitting element group are located in the same layer, Wirings electrically connected to different first light-emitting element groups are located on different layers. The display substrate according to claim 1 .

3. Orthogonal projections of M wires in the same wiring group on a plane on which the display substrate is located do not overlap. The display substrate according to claim 1 or 2.

4. The length of the i-th wire among the M wires in the same wire group is equal to or differs from the interval between the i-th first light-emitting element and the i-th first pixel circuit by a predetermined length. The display substrate according to claim 1 or 2.

5. The sequence consisting of the lengths of the M wires is an arithmetic sequence. The display substrate according to claim 1 or 2.

6. The P-th first light-emitting element group is electrically connected via respective wirings and the (N-P+1)-th first pixel circuit group, where P=1 to N. The display substrate according to claim 1 or 2.

7. the display substrate includes two repeat units located in the first display area and sequentially arranged along the first direction, each repeat unit including the N first light-emitting element groups, the two repeat units being located on both sides of a reference line, the reference line being a straight line extending along a second direction and passing through the first display area, and the second direction being perpendicular to the first direction; the first pixel circuit groups electrically connected to the two repeat units are located on both sides of the first display area in the first direction, wiring groups electrically connected to the two repeat units are located on both sides of the reference line, the first display area has a center, and the reference line is a straight line passing through the center; The display substrate according to claim 1 or 2.

8. The number of first light-emitting element groups included in the two repeat units is the same. The display substrate according to claim 7 .

9. The wiring electrically connected to the j-th first light-emitting element group in each repeat unit is located in the same layer, and j=1 to N. The display substrate according to claim 7 .

10. the display substrate is located in the first display area and includes two columns of repeat units sequentially arranged along the first direction, and each column of repeat units includes at least two rows of repeat units sequentially arranged along the second direction; a first pixel circuit group electrically connected to the repeating units in the same column is located on the same side of the first display area and is sequentially arranged along the second direction; The wiring groups electrically connected to the repeat units in the same column are sequentially arranged along the second direction. The display substrate according to claim 7 .

11. Among the repeat units in the same column, the wiring electrically connected to the j-th first light-emitting element group of the repeat unit in each row is located in the same layer, where j=1 to N. The display substrate according to claim 10 .

12. The number of first light-emitting elements included in each first light-emitting element group is the same. The display substrate according to claim 1 or 2.

13. the first light-emitting element group and the first pixel circuit group electrically connected thereto are provided in the same row, a main body portion of each wiring in the wiring group extends along a first direction; The display substrate according to claim 1 or 2.

14. The display substrate is With the base, a pixel circuit layer provided on one side of the base, wherein the N first pixel circuit groups are located on the pixel circuit layer; a light emitting element layer provided on a side of the pixel circuit layer away from the base, wherein the N first light emitting element groups are light emitting element layers located in the light emitting element layer; a multilayer wiring layer provided between the pixel circuit layer and the light emitting element layer and stacked in sequence, One of the wiring groups is located in one wiring layer, the material of the multilayer wiring layer includes a light-transmitting conductive material; The display substrate according to claim 1 or 2.

15. the number of the multilayer wiring layers is the same as the number of the N first light-emitting element groups; The display substrate according to claim 14 .

16. The display substrate is a plurality of second pixel circuits located in the second display region, wherein at least one second pixel circuit is provided between two adjacent first pixel circuits in the first pixel circuit group; a plurality of second light-emitting elements located in the second display area and electrically connected to the plurality of second pixel circuits, respectively; The display substrate according to claim 1 or 2.

17. The display substrate according to claim 1 or 2; an image collecting unit provided on a non-light emitting side of the display substrate and positioned in the first display area of ​​the display substrate; Display module.

18. A display module according to claim 17, Display device.

Images