Multiplexer and communication device

Abstract

The present embodiment discloses a multiplexer and a communication device. The multiplexer includes a transmit port, at least one receive port, at least one antenna port, a filter group, and a switch. The fixed end of the switch is connected to a first TDD filter in the filter group, the first free end of the switch is connected to an output end of a second TDD filter in the filter group, and the second free end of the switch is connected to one of the at least one receive port. The transmit port is connected to an input end of an FDD transmit filter in the filter group and an input end of the second TDD filter, and the output end of the FDD receive filter in the filter group is connected to one of the at least one receive port. The output end of the FDD transmit filter, the input end of the FDD receive filter, and the first TDD filter are each connected to one of the at least one antenna port. According to the present embodiment, while ensuring reliable operation of FDD and TDD, the port multiplexing rate can be improved and the circuit area can be reduced.

Description

[Technical Field]

[0001] FIELD Embodiments of the present application relate to the field of communication technology, and more particularly to multiplexers and communication devices. [Background technology]

[0002] Full-duplex communication technologies are classified into time division duplexing (TDD) and frequency division duplexing (FDD). In devices that support both TDD and FDD, the FDD and TDD systems are prone to interference with each other. Specifically, in the TDD receive slot, the FDD transmit (TX) channel operates continuously, so nonlinear spurious emissions from the FDD transmit signal are likely to interfere with the TDD receive frequency band, thereby affecting the normal operation of the TDD receiver (RX). Therefore, to prevent FDD transmission from affecting TDD reception, multiple filters are often required within the multiplexer to suppress signals in the corresponding frequency band. In addition, the multiplexer must have separate transmit ports for the FDD and TDD systems to improve isolation between them. This prevents FDD transmit spurious emissions from leaking into the TDD receive channel and affecting the TDD receive signal in the TDD receive slot.

[0003] However, providing two different transmission ports for the TDD system and the FDD system is likely to lead to an excessive circuit interface, an increase in circuit connection lines, and an increase in circuit area, which increases the production and manufacturing costs of the device.

[0004] Therefore, when the reliability of FDD and TDD is ensured, a method for improving the multiplexing rate of the transmission ports and reducing the circuit area is an urgent issue to be solved. Summary of the Invention

[0005] The embodiments of the present application provide a multiplexer and a communication device that can improve the multiplexing rate of a transmission port and reduce the circuit area while ensuring the reliability of FDD and TDD.

[0006] According to a first aspect, an embodiment of the present application provides a multiplexer. The multiplexer includes a transmit port, at least one receive port, at least one antenna port, a filter group, and a switch. The filter group includes a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter. A fixed end of the switch is connected to the first TDD filter, a first free end of the switch is connected to an output end of the second TDD filter, and a second free end of the switch is connected to one receive port of the at least one receive port. The transmit port is connected to the input terminal of the FDD transmit filter and the input terminal of the second TDD filter, the output terminal of the FDD receive filter is connected to one of the at least one receive port, and the output terminal of the FDD transmit filter, the input terminal of the FDD receive filter and the first TDD filter are each connected to one of the at least one antenna port.

[0007] This embodiment of the present application improves the structure of a conventional multiplexer. In this embodiment of the present application, the multiplexer is configured with only one transmit port so that the transmit channels of the TDD system and the FDD system can share one transmit port. This embodiment of the present application also adds a switch between the TDD transmit channel and the TDD receive channel. The switch includes one fixed end and two free ends (e.g., a first free end and a second free end), where the first free end and the second free end may be located in the TDD transmit channel and the TDD receive channel, respectively. The fixed end of the switch can be switched between the first free end and the second free end for electrical connection, thereby realizing switching between TDD transmit and receive. Based on the above multiplexer architecture, when the TDD is in a transmit slot, the second free end of the switch is electrically connected to the fixed end. In this case, due to the physical separation between the first free end and the second free end, a series of nonlinear spurious signals generated by the FDD transmit signal at the transmit port will not leak into the TDD receive channel, thereby avoiding the impact of FDD transmission on TDD reception. Furthermore, in practical applications, given the high switching frequency of the switch, i.e., the fixed end is rapidly switched between the first free end and the second free end for electrical connection, there is a possibility that the FDD transmit spurious signal will leak into the TDD receive channel through the first free end and the second free end. Therefore, in the multiplexer of this embodiment of the present application, an additional TDD filter (e.g., a second TDD filter) is provided between the first free end and the transmit port to suppress signals outside the TDD frequency band and prevent the FDD transmit signal generated at the transmit port from being transmitted to the TDD transmit channel. Thus, in this embodiment of the present application, compared to the prior art solution in which TDD and FDD cannot share a transmit port, resulting in excessive interfaces, complex circuits, and a large circuit area, the improved multiplexer structure allows the FDD system and TDD system to share a single transmit port while ensuring reliable operation of both FDD and TDD, thereby improving the transmit port multiplexing rate and reducing circuit connection lines and circuit area, further reducing production and manufacturing costs and meeting user requirements.

[0008] In a possible embodiment, when the first free end of the switch is electrically connected to the fixed end, the second TDD filter is configured to receive the TDD transmit signal output by the transmit port, suppress signals outside the TDD transmit frequency band, and output the TDD transmit signal to the first TDD filter. The first TDD filter is also configured to suppress signals outside the TDD transmit frequency band and output the TDD transmit signal to the antenna port, where the frequency band of the TDD transmit signal is within the TDD transmit frequency band. When the second free end of the switch is electrically connected to the fixed end, the first TDD filter is configured to receive the TDD receive signal input by the antenna port, suppress signals outside the TDD receive frequency band, and output the TDD receive signal to the receive port, where the frequency band of the TDD receive signal is within the TDD receive frequency band.

[0009] In this embodiment of the present application, the fixed end of the switch can be switched between the first free end and the second free end for electrical connection, thereby realizing switching between TDD transmission and reception. When the first free end is electrically connected to the fixed end and the TDD system is in a transmission slot, the second TDD filter receives the TDD transmission signal output from the transmission port, suppresses signals outside the TDD transmission frequency band, and outputs the TDD transmission signal to the first TDD filter via the first free end and the fixed end. The first TDD filter suppresses signals outside the TDD transmission frequency band and finally outputs the TDD transmission signal to the corresponding antenna port for transmission. When the second free end of the switch is electrically connected to the fixed end and the TDD system is in a reception slot, the first TDD filter receives the TDD reception signal input from the antenna port, suppresses signals outside the TDD reception frequency band, and outputs the TDD reception signal to the corresponding reception port via the fixed end and the second free end. Thus, in this embodiment of the present application, the multiplexer architecture is improved to ensure reliable operation of TDD transmission and reception when FDD and TDD systems share one transmit port, and to meet user requirements.

[0010] In a possible embodiment, the second TDD filter is specifically configured to suppress signals in the first frequency band and output the TDD transmit signal to the first TDD filter, and the first TDD filter is specifically configured to suppress signals in the second and third frequency bands and output the TDD transmit signal to the antenna port, where the first, second, and third frequency bands are all outside the TDD transmit frequency band.

[0011] In this embodiment of the present application, both the first TDD filter and the second TDD filter in the multiplexer may suppress signals outside the TDD transmission frequency band, or the first TDD filter and the second TDD filter may suppress different frequency bands. Thus, in this embodiment of the present application, multiple TDD filters are configured to respectively suppress multiple interference signals outside the TDD transmission frequency band, thereby ensuring the effect of suppressing interference signals, ensuring normal operation of TDD transmission, and reducing the difficulty of implementing a single filter.

[0012] In a possible embodiment, the filter group further includes a third TDD filter, the input end of which is connected to the second free end of the switch, and the output end of which is connected to one of the at least one receive ports.

[0013] The first TDD filter is specifically configured to suppress signals in the second and third frequency bands and output the TDD receive signal to the third TDD filter, which is configured to suppress signals in the fourth frequency band and output the TDD receive signal to the receive port, where the second, third, and fourth frequency bands are all outside the TDD receive frequency band.

[0014] In this embodiment of the present application, in addition to the first TDD filter, an additional TDD filter (e.g., a third TDD filter) may be added to the TDD receiving channel. The input end of the third TDD filter is connected to the second free end of the switch, and the output end is connected to the corresponding receiving port. Both the first TDD filter and the third TDD filter may suppress signals outside the TDD receiving frequency band, or the first TDD filter and the third TDD filter may suppress different frequency bands. In this way, in this embodiment of the present application, multiple TDD filters are configured to respectively suppress multiple interfering signals outside the TDD receiving frequency band, thereby ensuring the effect of interfering signal suppression, ensuring normal operation of TDD receiving, and reducing the difficulty of implementing a single filter.

[0015] In some possible embodiments, the second and third TDD filters may be bandpass or bandstop filters. A bandpass filter is a filter that passes a specific range of frequency components but attenuates most other frequency components to extremely low levels. This is the opposite of the concept of a bandstop filter. A bandstop filter is a filter that passes most frequency components but attenuates a specific range of frequency components to extremely low levels. This is the opposite of the concept of a bandpass filter.

[0016] In a possible implementation, the number of the at least one receiving port is 1, and the receiving port is separately connected to the output end of the FDD receiving filter and the second free end of the switch.

[0017] The receive port is configured to receive the FDD receive signal output by the FDD receive filter, and when the second free end of the switch is electrically connected to the fixed end, the receive port is further configured to receive the TDD receive signal output by the first TDD filter.

[0018] In this embodiment of the present application, the multiplexer may include only one receive port, which may be separately connected to the FDD receive filter and the second free end of the switch. The receive port may be configured to receive the FDD receive signal output by the FDD filter and the TDD receive signal output by the first TDD filter. Thus, in this embodiment of the present application, the multiplexer structure is further improved by realizing the sharing of the transmit port. While ensuring reliable operation of the FDD and TDD, the FDD and TDD can share the receive port, improving the multiplexing rate of the receive port and further reducing the circuit connection lines and circuit area.

[0019] In a possible implementation, the number of the at least one receiving port is one, and the receiving port is separately connected to the output of the FDD receiving filter and the output of the third TDD filter.

[0020] The receive port is configured to receive the FDD receive signal output by the FDD receive filter, and when the second free end of the switch is electrically connected to the fixed end, the receive port is further configured to receive the TDD receive signal output by the third TDD filter.

[0021] In this embodiment of the present application, the multiplexer may include only one receive port, which may be separately connected to the FDD receive filter and the third TDD filter. The receive port may be configured to receive the FDD receive signal output by the FDD filter and the TDD receive signal output by the third TDD filter. In this way, in this embodiment of the present application, the multiplexer structure is further improved based on the sharing of the transmit port, and while ensuring reliable operation of FDD and TDD, the FDD and TDD can share the receive port, improving the multiplexing rate of the receive port and further reducing the circuit connection lines and circuit area.

[0022] In a possible implementation, the at least one receive port includes an FDD receive port and a TDD receive port, the FDD receive port being connected to the output end of the FDD receive filter, and the TDD receive port being connected to the second free end of the switch.

[0023] the FDD receive port is configured to receive the FDD receive signal output by the FDD receive filter; When the second free end of the switch is electrically connected to the fixed end, the TDD receive port is configured to receive the TDD receive signal output by the first TDD filter.

[0024] In this embodiment of the present application, the multiplexer includes two receive ports. One is an FDD receive port connected to the FDD receive filter, and the other is a TDD receive port connected to the second free end. The FDD receive port is configured to receive the FDD receive signal output by the FDD filter, and the TDD receive port is configured to receive the TDD receive signal output by the first TDD filter. In this way, in this embodiment of the present application, by providing two independent receive ports to avoid interference from the TDD transmit signal to the FDD receive signal, it is possible to increase isolation between TDD transmission and FDD reception.

[0025] In a possible embodiment, the at least one receive port includes an FDD receive port and a TDD receive port, the FDD receive port being connected to the output of the FDD receive filter and the TDD receive port being connected to the output of the third TDD filter.

[0026] The FDD receive port is configured to receive the FDD receive signal output by the FDD receive filter, and when the second free end of the switch is electrically connected to the fixed end, the TDD receive port is configured to receive the TDD receive signal output by the third TDD filter.

[0027] In this embodiment of the present application, the multiplexer includes two receive ports. One is an FDD receive port connected to the FDD receive filter, and the other is a TDD receive port connected to the third TDD filter. The FDD receive port is configured to receive the FDD receive signal output by the FDD filter, and the TDD receive port is configured to receive the TDD receive signal output by the third TDD filter. In this way, in this embodiment of the present application, by providing two independent receive ports to avoid interference from the TDD transmit signal to the FDD receive signal, it is possible to increase isolation between TDD transmission and FDD reception.

[0028] In a possible embodiment, the number of the at least one antenna port is one, and the antenna port is separately connected to the output of the FDD transmit filter, the input of the FDD receive filter and the first TDD filter.

[0029] In this embodiment of the present application, the multiplexer can include an antenna port. The antenna port is separately connected to the FDD transmit filter, the FDD receive filter, and the first TDD filter, and can transmit FDD transmit signals and TDD transmit signals, and receive FDD receive signals and TDD receive signals, respectively. In this way, in this embodiment of the present application, by realizing the sharing of the transmit port, the FDD and TDD share the antenna port, which improves the multiplexing rate of the antenna port and further reduces the circuit connection lines and circuit area.

[0030] In a possible implementation, the at least one antenna port includes a first antenna port and a second antenna port, where the first antenna port is connected to an output end of an FDD transmit filter and an input end of an FDD receive filter, and the second antenna port is connected to the first TDD filter.

[0031] In this embodiment of the present application, the multiplexer may include two antenna ports, a first antenna port and a second antenna port. The first antenna port may be connected to an FDD transmit filter and an FDD receive filter and configured to transmit an FDD transmit signal and receive an FDD receive signal. The second antenna port may be connected to a first TDD filter and configured to transmit a TDD transmit signal and receive a TDD receive signal. In this manner, in this embodiment of the present application, the provision of two independent antenna ports can improve isolation between TDD and FDD, thereby ensuring normal transmission and reception of TDD and FDD, while further reducing filter suppression and implementation difficulty.

[0032] In a possible implementation, the at least one antenna port includes a first antenna port and a second antenna port, the first antenna port being connected to the output end of the FDD transmit filter and the first TDD filter, and the second antenna port being connected to the input end of the FDD receive filter.

[0033] In this embodiment of the present application, the multiplexer may include two antenna ports, a first antenna port and a second antenna port. The first antenna port may be connected to an FDD transmit filter and a first TDD filter and configured to transmit an FDD transmit signal and a TDD transmit signal and receive a TDD receive signal. The second antenna port may be connected to an FDD receive filter and configured to receive an FDD receive signal. In this manner, in this embodiment of the present application, the provision of two independent antenna ports can improve isolation between TDD and FDD, thereby ensuring normal transmission and reception of TDD and FDD, and further reducing filter suppression and implementation difficulty.

[0034] In a possible implementation, the at least one antenna port includes a first antenna port and a second antenna port, where the first antenna port is connected to the output terminal of the FDD transmit filter, and the second antenna port is connected to the input terminal of the FDD receive filter and the first TDD filter.

[0035] In this embodiment of the present application, the multiplexer may include two antenna ports, a first antenna port and a second antenna port. The first antenna port may be connected to an FDD transmit filter and configured to transmit an FDD transmit signal. The second antenna port is connected to an FDD receive filter and a first TDD filter and configured to receive an FDD receive signal and a TDD receive signal and transmit a TDD transmit signal. In this way, in this embodiment of the present application, by providing two independent antenna ports, isolation between TDD and FDD can be improved, thereby ensuring normal transmission and reception of TDD and FDD, and further reducing filter suppression and implementation difficulty.

[0036] In an embodiment, the FDD transmit filter is configured to receive an FDD transmit signal output from the transmit port, suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port, where the frequency band of the FDD transmit signal is within the FDD transmit frequency band. The FDD receive filter is configured to receive an FDD receive signal input by the antenna port, suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the receive port, where the frequency band of the FDD receive signal is within the FDD receive frequency band.

[0037] In this embodiment of the present application, regardless of how the multiplexer switches are selectively turned on, the FDD system can always transmit and receive normally. Thus, in this embodiment of the present application, the multiplexer architecture is improved so that, when reliable operation of FDD and TDD is guaranteed, the FDD system and the TDD system can share one transmit port, and the FDD system and the TDD system can also share one receive port or one antenna port. This can significantly reduce the number of circuit connection lines and circuit area, reduce production and manufacturing costs, and meet user requirements.

[0038] According to a second aspect, an embodiment of the present application provides a communication device, the communication device including a transmitting circuit, a receiving circuit, an antenna system, and a multiplexer according to any one of the implementations of the first aspect, wherein the transmitting circuit is connected to a transmitting port of the multiplexer, the receiving circuit is connected to at least one receiving port of the multiplexer, and the antenna system is connected to at least one antenna port of the multiplexer.

[0039] In a possible embodiment, the antenna system comprises an antenna, the number of at least one antenna port is one, and the antenna is connected to the antenna port.

[0040] In a possible embodiment, the antenna system includes a first antenna and a second antenna, the at least one antenna port includes a first antenna port and a second antenna port, the first antenna is connected to the first antenna port, and the second antenna is connected to the second antenna port.

[0041] It should be noted that the communication device provided in the second aspect of the present application is consistent with the technical solution in the first aspect of the present application. For specific details and advantageous effects of the communication device, please refer to the multiplexer provided in the first aspect of the present application. Details will not be described again here. The communication device may be a base station having the above-described structure and functions, or a terminal device, such as a smart wearable device, a smartphone, a tablet computer, or a notebook computer. The communication device may also be a part of the base station or the terminal device, for example, a component including a transceiver and an antenna in the base station or the terminal device. This is not specifically limited in this embodiment of the present application.

[0042] According to a third aspect, an embodiment of the present application provides a communication method applied to a communication device. The communication device includes a multiplexer, the multiplexer including a transmit port, at least one receive port, at least one antenna port, a filter group, and a switch. The filter group includes a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter. A fixed end of the switch is connected to the first TDD filter, a first free end of the switch is connected to an output end of the second TDD filter, and a second free end of the switch is connected to one receive port of the at least one receive port. The transmit port is connected to the input terminal of the FDD transmit filter and the input terminal of the second TDD filter, the output terminal of the FDD receive filter is connected to one of the at least one receive port, and the output terminal of the FDD transmit filter, the input terminal of the FDD receive filter and the first TDD filter are each connected to one of the at least one antenna port.

[0043] Controlling the first free end of the switch to be electrically connected to the fixed end includes: a second TDD filter receiving the TDD transmit signal output by the transmit port, suppressing signals outside the TDD transmit frequency band, and outputting the TDD transmit signal to the first TDD filter; The first TDD filter suppresses signals outside the TDD transmission frequency band, and outputs a TDD transmission signal to the antenna port, where the frequency band of the TDD transmission signal is within the TDD transmission frequency band.

[0044] The second free end of the switch electrically connecting to the fixed end includes: The first TDD filter receives a TDD reception signal input by the antenna port, suppresses signals outside the TDD reception frequency band, and outputs the TDD reception signal to the reception port, where the frequency band of the TDD reception signal is within the TDD reception frequency band.

[0045] It should be noted that the method steps provided in the third aspect of the present application are consistent with the technical solution in the first aspect of the present application. For the specific content and advantageous effects of the method steps, please refer to the multiplexer provided in the first aspect of the present application. The details will not be described again here.

[0046] According to a fourth aspect, an embodiment of the present application provides a communication device. The communication device may include a processor and a memory. The memory is configured to store program code, and the processor is configured to invoke the program code to implement functions related to the communication method procedures provided in the third aspect. The communication device may further include a communication interface used for communication between the communication device and another device or a communication network.

[0047] According to a fifth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program that, when executed by a processor, performs functions associated with the communication method steps provided in the third aspect.

[0048] According to a sixth aspect, an embodiment of the present application provides a computer program comprising instructions which, when executed by a computer, enable the computer to perform functions relating to the communication method steps provided in the third aspect.

[0049] According to a seventh aspect, an embodiment of the present application provides a chip, the chip including a processor and a communication interface, the processor configured to retrieve instructions from the communication interface and execute the instructions, the execution of the instructions by the processor enabling the chip to perform functions related to the communication method procedures provided in the third aspect.

[0050] According to an eighth aspect, an embodiment of the present application provides a chip system. The chip system includes a multiplexer according to any one of the implementations of the first aspect and is configured to perform functions related to the communication method steps provided in the third aspect. In a possible design, the chip system further includes a memory. The memory is configured to store program instructions and data required for the communication method. The chip system may include a chip, or may include a chip and another individual component. [Brief explanation of the drawings]

[0051] To more clearly describe the technical solutions in the embodiments of the present application, the following describes the accompanying drawings which are used to describe the embodiments or background of the present application.

[0052] [Figure 1] FIG. 1 is an operational diagram of a TDD according to an embodiment of the present application.

[0053] [Figure 2] FIG. 1 is an operational diagram of an FDD according to an embodiment of the present application;

[0054] [Figure 3] FIG. 1 is a diagram of transmit and receive duplexing in TDD according to an embodiment of the present application.

[0055] [Figure 4] FIG. 1 is a diagram of transmit and receive duplexing in FDD according to an embodiment of the present application.

[0056] [Figure 5a] FIG. 1 is a diagram of transmit and receive isolation in FDD according to an embodiment of the present application.

[0057] [Figure 5b] FIG. 10 is a diagram of another type of transmit and receive isolation in FDD according to an embodiment of the present application.

[0058] [Figure 6] FIG. 1 is a block diagram of a multiplexer in which TDD and FDD share a transmit port according to an embodiment of the present application.

[0059] [Figure 7] FIG. 1 is a diagram of interference in a TDD receive slot according to an embodiment of the present application.

[0060] [Figure 8] FIG. 1 is a block diagram of a multiplexer in which TDD and FDD do not share an antenna according to an embodiment of the present application.

[0061] [Figure 9] FIG. 1 is a diagram illustrating the configuration of a multiplexer in which TDD and FDD share an antenna according to an embodiment of the present application.

[0062] [Figure 10] FIG. 1 is a diagram of a system architecture according to an embodiment of the present application.

[0063] [Figure 11] FIG. 1 is a structural diagram of a multiplexer according to an embodiment of the present application;

[0064] [Figure 12] FIG. 10 is a structural diagram of another multiplexer according to an embodiment of the present application;

[0065] [Figure 13] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0066] [Figure 14] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0067] [Figure 15] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0068] [Figure 16a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0069] [Figure 16b] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0070] [Figure 17a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0071] [Figure 17b] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0072] [Figure 18a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0073] [Figure 18b] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0074] [Figure 19a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0075] [Figure 19b]FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0076] [Figure 20a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0077] [Figure 20b] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0078] [Figure 21a] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0079] [Figure 21b] FIG. 10 is a structural diagram of yet another multiplexer according to an embodiment of the present application;

[0080] [Figure 22] 1 is a structural diagram of a communication device according to an embodiment of the present application;

[0081] [Figure 23] 1 is a schematic flowchart of a communication method according to an embodiment of the present application; DETAILED DESCRIPTION OF THE INVENTION

[0082] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0083] In the specification, claims, and accompanying drawings of this application, the terms "first," "second," "third," "fourth," "first," "second," "third," "fourth," etc. are intended to distinguish between different objects and do not indicate a particular order. Furthermore, the terms "comprise" and "have," and other variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include unlisted steps or units, or may optionally further include other inherent steps or units of the process, method, product, or apparatus.

[0084] It should be understood that in this application, "at least one" means one or more, and "multiple" means two or more. The term "and / or" describes an association relationship between associated objects and indicates that three relationships may exist. For example, "A and / or B" may represent three cases: only A is present, only B is present, or both A and B are present, where A and B may be singular or plural. The character " / " typically indicates an "or" relationship between associated objects. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of a single item or multiple items. For example, "at least one of a, b, or c" may refer to a, b, c, a and b, a and c, b and c, or a, b, c, where a, b, and c may be singular or plural.

[0085] Reference to an "embodiment" herein means that a particular feature, structure, or characteristic described with reference to the embodiment may be included in at least one embodiment of the present invention. Phrases appearing in various places in the specification do not necessarily refer to the same embodiment, nor are they exclusive, independent of another embodiment, or any embodiment. Those skilled in the art understand, both explicitly and implicitly, that an embodiment described in the specification can be combined with another embodiment.

[0086] As used herein, terms such as "component," "module," and "system" are used to refer to computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. As illustrated using the figures, both a computing device and an application running on a computing device may be a component. One or more components may reside within a process and / or thread of execution, and a component may be located on one computer and / or distributed between two or more computers. Furthermore, these components may execute from various computer-readable media that store various data structures. For example, components may communicate using local and / or remote processes, e.g., based on signals comprising one or more data packets (e.g., data from two components interacting with another component, interacting with another system using such signals, within a local system, within a distributed system, and / or across a network such as the Internet).

[0087] To help those skilled in the art better understand, some terms in the embodiments of the present application will first be explained.

[0088] (1) Full duplex refers to simultaneous two-way communication. Both communication parties can send and receive data at the same time. Full duplex communication technologies are further classified into Time Division Duplexing (TDD) and Frequency Division Duplexing (FDD).

[0089] (2) Time Division Duplex. By allocating different slots, a TDD system can perform transmission and reception operations using a single frequency band. Figure 1 is a diagram illustrating the operation of TDD according to one embodiment of the present application. As shown in Figure 1, the uplink (i.e., transmission) and downlink (i.e., reception) frequency bands may be the same, but there is a specific slot interval between the uplink and downlink. In some TDD systems, equal slots may be allocated to the uplink and downlink. However, in practical applications, the uplink and downlink slots may be asymmetric.

[0090] (3) Frequency Division Duplex. An FDD system has two independent communication channels, and sufficient spacing is required between the two channels to prevent transmission and reception from interfering with each other. The FDD system must filter or shield signals to prevent a signal transmitter from affecting an adjacent receiver. Figure 2 is an operational diagram of an FDD system according to an embodiment of the present application. As shown in Figure 2, the FDD system can simultaneously transmit and receive using two communication channels. However, the frequency bands for transmission and reception are different, and there is a certain isolation between the two frequency bands.

[0091] (4) Multiplexer. A component that allows multiple channels to share one port is called a "multiplexer." Duplexers, triplexers, quadplexers, etc. are sometimes collectively called "multiplexers." For example, a component that allows two channels to share one port is called a "duplexer" (e.g., 1T1R), and a component that allows four channels to share one port is called a "quadplexer" (e.g., 2T2R).

[0092] Note that a multiplexer typically includes a single input port and multiple output ports. However, the multiplexer provided in the embodiments of the present application represents a combination of multiple filters to support simultaneous operation in multiple frequency bands and multiple standards. The implementation form of the multiplexer may be single-input multiple-output, multiple-input multiple-output, etc. Furthermore, the multiplexer provided in the embodiments of the present application includes a group of non-overlapping filters. The combination method ensures that the filters do not overload each other and that the outputs are highly isolated from each other. That is, the frequency bands that the multiple filters suppress are different from each other, and the frequency bands of the output signals are different from each other.

[0093] FIG. 3 is a diagram of transmit / receive duplexing in TDD according to one embodiment of the present application. As shown in FIG. 3, in the TDD system, the duplexer may include one filter, one antenna (ANT) port, and one TX / RX port (TX and RX share a port in TDD). The filter is separately connected to the antenna port and the TX / RX port. As shown in FIG. 3, the TDD system further includes a circulator and a switch. The circulator is separately connected to the TX / RX port, a power amplifier (PA) of the TDD transmit channel, and one end of the switch, the other end of which is connected to a low noise amplifier (LNA) of the TDD receive channel. The switch is mainly configured to switch the TX channel and the RX channel for electrical connection to realize time division duplexing. For example, when the switch is on, the TDD system is in a receive slot, and the TDD receive signal received by the antenna is filtered by the filter and enters the LNA. For example, when the switch is off, the TDD system is in the transmit slot, and the TDD transmit signal output by the PA is filtered by the filter and transmitted via the antenna. As mentioned above, the frequency band of the TDD receive signal is the same as the frequency band of the TDD transmit signal. The filter shown in Figure 3 is configured to suppress signals outside the TDD transmit / receive frequency band so that TDD transmission and reception can operate normally.

[0094] FIG. 4 is a diagram of transmit / receive duplexing in FDD according to an embodiment of the present application. Compared with TDD, a duplexer is commonly used in FDD wireless applications. As shown in FIG. 4, in an FDD system, two filters, Filter 1 and Filter 2, are combined to form a duplexer, which further includes one antenna port, one TX port, and one RX port. Filter 1 is a receive filter, and Filter 2 is a transmit filter. The input end of Filter 1 is connected to the antenna port, and the output end of Filter 1 is connected to the RX port. The RX port is configured to be connected to a receiving device, such as an LNA, in an FDD receive channel. The output end of Filter 2 is connected to the antenna port, and the input end of Filter 2 is connected to the TX port. The TX port is configured to be connected to a transmitter, such as a PA, in an FDD transmit channel via a circulator. As shown in FIG. 4, Filter 1 and Filter 2 share a common node (i.e., the antenna port), allowing the devices to transmit and receive simultaneously. For example, as shown in FIG. 4, an FDD transmit signal output from a PA is filtered by Filter 2 and transmitted via an antenna. For example, as shown in Figure 4, the FDD receive signal received from the antenna is filtered by Filter 1 and input to the LNA. As mentioned above, the frequency band of the FDD receive signal is different from the frequency band of the FDD transmit signal. Therefore, in an FDD system, the duplexer must be designed so that the passband of each filter does not overload other filters. In particular, the transmit filter must provide significant suppression in the receive frequency band to prevent nonlinear spurious emissions from the PA from interfering with the receive frequency band. This isolation is often referred to as transmit / receive isolation at the transmit frequency. For example, to ensure normal FDD transmission and reception, Filter 1 shown in Figure 4 must suppress signals outside the FDD receive frequency band (particularly in the FDD transmit frequency band) and output the FDD receive signal. Filter 2 must suppress signals outside the FDD transmit frequency band (particularly in the FDD receive frequency band) and output the FDD transmit signal.

[0095] 5a is a diagram of transmit / receive isolation in an FDD system according to one embodiment of the present application. As shown in FIG. 5a, if an FDD system does not include Filter 1 and Filter 2, the nonlinear spurious emissions generated by FDD transmission cannot be sufficiently suppressed, and the power attenuation of spurious signals IM3, IM5, and IM7 compared to the FDD transmission signal is only 45 dB, 50 dB, and 55 dB, respectively. The frequency band of spurious signal IM7 overlaps with the FDD reception frequency band, affecting the FDD reception signal and preventing normal operation of FDD reception.

[0096] FIG. 5b illustrates another type of transmit / receive isolation in an FDD system according to an embodiment of the present application. When an FDD system includes Filter 1 and Filter 2, as shown in FIG. 5b, nonlinear spurious emissions generated by FDD transmission can be sufficiently suppressed by Filter 1. Compared with FIG. 5a, the spurious signals IM3, IM5, and IM7 shown in FIG. 5b have significantly more attenuation. Compared with the FDD transmission signal, the power attenuation of the spurious signal IM7 is reduced to 155 dB. This has little impact on the FDD reception signal and ensures normal operation of the FDD reception. Generally, conventional FDD base stations require transmit / receive isolation of at least 150 dBc. In particular, signals in the transmission frequency band appearing at the output of the receive filter must be significantly attenuated to avoid overdriving the reception front end.

[0097] Furthermore, when a device supports both TDD and FDD, a triplexer is often required. A triplexer includes three filters. The passband load and isolation targets of a triplexer are the same as those of a duplexer. Figure 6 is a diagram of a multiplexer in which TDD and FDD share a transmit port according to an embodiment of the present application. As shown in Figure 6, the triplexer includes Filter 1, Filter 2, and Filter 3, and uses one TX port in a conventional FDD solution. That is, TDD and FDD share one TX and one PA. In the multiplexer configuration shown in Figure 6, if the TDD is in the receive slot (switched on), the FDD system operates continuously, and the PA cannot be turned off, nonlinear spurious emissions output by the PA will leak into the TDD receive channel through the switched-on switch. This will affect the normal operation of the TDD receiver and not meet the system application requirements. For example, Figure 7 illustrates interference in a TDD receive slot according to an embodiment of the present application. As shown in Figure 7, the nonlinear spurious emissions of the PA may be IM3, IM5, and IM7. Because there is no filter between the PA and the receiving channel, IM3, IM5, and IM7 are not sufficiently suppressed. The frequency band of IM7 overlaps with the TDD frequency band, and IM7 is not attenuated very much. This increases the TDD uplink noise floor, affecting the RX operation of the TDD.

[0098] Therefore, in practical applications, FDD and TDD systems are prone to interference with each other, especially in the TDD receiving slot, where FDD transmission spurious emissions may interfere with the TDD receiving frequency band, so complete isolation between FDD TX and TDD RX is often required to meet specific requirements for use. To facilitate understanding of the embodiments of this application, the technical problems to be specifically solved in this application are further analyzed and proposed. In the prior art, the multiplexer structure in a TDD+FDD scenario includes multiple technical solutions. Two common solution examples are given below.

[0099] Solution 1:

[0100] FIG. 8 is a block diagram of a multiplexer in which TDD and FDD do not share an antenna according to one embodiment of the present application. As shown in FIG. 8, the multiplexer (also called a triplexer) includes Filter 1, Filter 2, and Filter 3, two TX ports (TX1 and TX2), two RX ports (RX1 and RX2), and two antenna ports (ANT1 and ANT2). ANT1 is connected to Filter 1 and Filter 2 in an FDD system, and ANT2 is connected to Filter 3 in a TDD system. The output of Filter 1 is connected to LNA 1 of the FDD receive channel via the RX1 port, the input of Filter 2 is connected to PA 1 of the FDD transmit channel via the TX1 port and Circulator 1, and Filter 3 is connected to PA 2 of the TDD transmit channel and LNA 2 of the TDD receive channel via TX2 / RX2 and Circulator 2, respectively. As shown in FIG. 8, during the TDD receive slot (when the switch is on), PA 2 stops operating and does not generate spurious emissions that affect TDD reception. In addition, there is sufficient isolation between PA1 and the TDD receive channel, so TDD reception is not affected. Thus, in Solution 1, different TX ports are provided for the FDD system and the TDD system to ensure normal operation in the TDD receive slot.

[0101] Solution 2:

[0102] FIG. 9 is a block diagram of a multiplexer in which TDD and FDD systems share an antenna according to one embodiment of the present application. As shown in FIG. 9, multiplexer 9 includes Filter 1, Filter 2, and Filter 3, two TX ports (TX1 and TX2), two RX ports (RX1 and RX2), and one antenna port. ANT is connected to Filter 1 and Filter 2 in the FDD system and Filter 3 in the TDD system. For the specific configuration of FIG. 9, please refer to the description of the embodiment corresponding to FIG. 8 above. Details will not be described again here. As shown in FIG. 9, during the TDD receive slot (when the switch is on), PA2 stops operating and does not generate spurious emissions that affect TDD reception. Furthermore, since there is sufficient isolation between PA1 and the TDD receive channel, there is no impact on TDD reception. Thus, in Solution 2, different TX ports are provided for the FDD system and the TDD system to ensure normal operation during the TDD receive slot.

[0103] Both Solution 1 and Solution 2 have the following drawbacks:

[0104] (1) The FDD system and the TDD system each have one PA input and two different TX ports, and the TX ports cannot be multiplexed. This results in excessive circuit interfaces and makes the system complex. In this case, using two independent PAs prevents power sharing between the FDD system and the TDD system, reducing flexibility.

[0105] (2) The FDD system and the TDD system have different RX ports, and the RX ports cannot be multiplexed, resulting in excessive circuit interfaces and system complexity.

[0106] Therefore, in order to solve the problem that the multiplexer structure in the current TDD+FDD scenario does not meet the actual service requirements, the technical problem to be actually solved in this application includes the following aspects: while ensuring the reliable operation of FDD and TDD, improve the multiplexer structure so that FDD and TDD share one transmit port and also FDD and TDD share one receive port, allowing the PA and LNA to be shared, thereby significantly reducing the circuit interface and connecting lines, thereby reducing the circuit area and lowering production and manufacturing costs.

[0107] FIG. 10 is a diagram of a system architecture according to one embodiment of the present application. As shown in FIG. 10, the system architecture may include a baseband 21, a transceiver 22, and an antenna system 23, which are connected in series. As shown in FIG. 10, the transceiver 22 may include a multiplexer 10. The multiplexer 10 may include only one transmit port. The transmit port is connected to the output of the PA and configured to receive the FDD transmit signal and the TDD transmit signal output by the PA, such that the FDD and TDD share the transmit port. Furthermore, the multiplexer 10 may further include a receive port. The receive port is connected to the input of the LNA and configured to input the FDD receive signal and the TDD receive signal to the LNA, such that the FDD and TDD share the receive port. As shown in FIG. 10, in some implementations, the input of the PA is connected to a digital-to-analog (DA) conversion module, and the output of the LNA is connected to an analog-to-digital (AD) conversion module.

[0108] Optionally, the multiplexer 10 may alternatively include multiple receive ports. The multiple receive ports may be connected to multiple input ports of the LNA in a one-to-one correspondence, respectively, to achieve complete receive isolation between FDD and TDD. For details, see the following embodiments. Details will not be described here. Also, as shown in FIG. 10, the multiplexer 10 may alternatively include one or more antenna ports. The one or more antenna ports may be connected to one or more antennas in the antenna system 23 in a one-to-one correspondence, to receive FDD receive signals and TDD receive signals and transmit FDD transmit signals and TDD transmit signals via corresponding antennas.

[0109] The multiplexer 10 provided in this embodiment of the present application can be used in the wireless communication field, specifically in communication devices such as base stations and terminal devices. The terminal device may be, for example, a smart wearable device, a smartphone, a tablet computer, a notebook computer, an in-vehicle computer, a server, a server cluster including multiple servers, or a cloud computing service center. This is not specifically limited in this embodiment of the present application. The multiplexer 10 provided in this embodiment of the present application can be applied to communication devices that need to support both TDD and FDD standards. As shown in FIG. 10 , the multiplexer 10 may be specifically disposed at the end of a transceiver 22 of the communication device and configured to connect an antenna system 23 to a PA, LNA, etc. In this embodiment of the present application, the multiplexer structure is improved to enable FDD and TDD systems to multiplex one transmit port when reliable operation of FDD and TDD is guaranteed, thereby simplifying hardware implementation, reducing circuit area, power consumption, and cost. Furthermore, the FDD and TDD systems can also multiplex one receive port, significantly reducing circuit interfaces, circuit area, etc.

[0110] FIG. 11 is a structural diagram of a multiplexer according to an embodiment of the present application. As shown in FIG. 11, the multiplexer 10 includes one transmit port, at least one receive port, and at least one antenna port. Specifically, the multiplexer 10 includes a transmit port 101, N receive ports 102, and M antenna ports 103, where N and M are integers equal to or greater than 1. As shown in FIG. 11, the multiplexer 10 further includes a filter group and a switch 108. Specifically, the filter group may include an FDD transmit filter 104, an FDD receive filter 105, a first TDD filter 106, and a second TDD filter 107. The switch 108 may include a fixed end (i.e., end A shown in FIG. 11), a first free end (i.e., end B shown in FIG. 11), and a second free end (i.e., end C shown in FIG. 11). For example, the switch 108 may be a single-pole, double-throw switch.

[0111] 11 , terminal A of switch 108 is connected to first TDD filter 106, terminal B of switch 108 is connected to the output terminal of second TDD filter 107, and terminal C of switch 108 is connected to one of N receive ports 102. Transmit port 101 is connected to the input terminal of FDD transmit filter 104 and the input terminal of second TDD filter 107. The output terminal of FDD receive filter 105 is connected to one of N receive ports 102. The output terminal of FDD transmit filter 104, the input terminal of FDD receive filter 105, and first TDD filter 106 are each connected to one of M antenna ports 103.

[0112] The FDD transmit filter 104 is configured to receive the FDD transmit signal output from the transmit port 101, suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port 103. The frequency band of the FDD transmit signal is within the FDD transmit frequency band. For example, if the FDD transmit frequency band is 1 to 2 GHz, the frequency band of the FDD transmit signal is within the 1 to 2 GHz frequency band. The FDD transmit filter 104 is configured to suppress other signals outside the 1 to 2 GHz frequency band, and signals (for example, 3 to 4 GHz signals or 2 to 3 GHz signals like TDD transmit signals) are significantly attenuated after passing through the FDD transmit filter 104.

[0113] The FDD receive filter 105 is configured to receive an FDD receive signal input from the antenna port 103, suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the receive port 102. The frequency band of the FDD receive signal is within the FDD receive frequency band. For example, if the FDD receive frequency band is 3 to 4 GHz, the frequency band of the FDD receive signal is within the 3 to 4 GHz frequency band. The FDD receive filter 105 is configured to suppress other signals outside the 3 to 4 GHz frequency band, and signals (for example, 1 to 2 GHz signals or 2 to 3 GHz signals such as TDD transmit signals) are significantly attenuated after passing through the FDD receive filter 105.

[0114] When terminal A of switch 108 is electrically connected to terminal B,

[0115] The second TDD filter 107 is configured to receive the TDD transmission signal output from the transmission port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter .

[0116] The first TDD filter 106 is configured to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port 103. The frequency band of the TDD transmission signal is within the TDD transmission frequency band. For example, if the TDD transmission frequency band is 2 to 3 GHz, the frequency band of the TDD transmission signal is within the 2 to 3 GHz frequency band. The second TDD filter 107 and the first TDD filter 106 suppress other signals outside the 2 GHz to 3 GHz frequency band, and signals (for example, signals between 1 GHz and 1.5 GHz or signals between 3 GHz and 4 GHz, such as FDD transmission signals) are significantly attenuated after passing through the second TDD filter 107 and the first TDD filter 106. The second TDD filter is mainly configured to separate the FDD transmission signal and the TDD transmission signal output from the transmission port 101, and more specifically, to suppress the FDD transmission signal, thereby preventing the FDD transmission signal from flowing into the TDD transmission channel.

[0117] Optionally, the second TDD filter 107 may be configured to suppress signals outside the first frequency band, and the first TDD filter 106 may be configured to suppress signals outside the second and third frequency bands. The first, second, and third frequency bands are all outside the TDD transmission frequency band. For example, if the TDD transmission frequency band is 2 to 3 GHz, the first frequency band may be 0 to 1.5 GHz, the second frequency band may be 1.5 to 2 GHz, and the third frequency band may be 3 to 3.5 GHz. In this manner, in this embodiment of the present application, multiple TDD filters are configured to respectively suppress multiple interfering signals outside the TDD transmission frequency band, thereby ensuring the effect of interfering signal suppression, ensuring normal operation of TDD transmission, and reducing the difficulty of implementing a single filter.

[0118] When terminal A of switch 108 is electrically connected to terminal C,

[0119] The first TDD filter 106 is configured to receive the TDD reception signal input from the antenna port 103, suppress signals outside the TDD reception frequency band, and output the TDD reception signal to the reception port 102. The frequency band of the TDD reception signal is within the TDD reception frequency band. As described above, the TDD transmission frequency band is the same as the TDD reception frequency band. Taking 2 to 3 GHz as an example, the frequency band of the TDD reception signal is within the frequency band of 2 to 3 GHz. The first TDD filter 106 suppresses other signals outside the frequency band of 2 to 3 GHz, and signals (for example, signals between 1 GHz and 1.5 GHz or signals between 3 GHz and 4 GHz, such as FDD transmission signals) are significantly attenuated after passing through the first TDD filter 106.

[0120] Optionally, the switch 108 may be connected to a corresponding control circuit (not shown), which is configured to output a control signal. The switch 108 may electrically connect the terminal A to the terminal B, or may electrically connect the terminal A to the terminal C under the influence of the control signal, to implement switching between TDD transmission and reception.

[0121] In this way, by selectively electrically connecting terminal A between terminal B and terminal C of switch 108, isolation between the FDD system and the TDD system can be improved. In particular, in the TDD receiving slot (i.e., when terminal A is electrically connected to terminal C), the physical isolation between terminal B and terminal C can effectively prevent FDD transmission spurious emissions from leaking into the TDD receiving channel, thereby avoiding affecting the normal operation of TDD reception. In addition, in practical applications, considering the high switching frequency of switch 108, the FDD transmission signal and the corresponding transmission spurious signals may leak into the TDD receiving channel located at terminal C via terminal B of switch 108. Therefore, in the multiplexer 10 of this embodiment of the present application, a second TDD filter 107 is further provided between the transmission port 101 and terminal B of the switch. The second TDD filter 107 suppresses the FDD transmission signal, thereby preventing the FDD transmission signal and corresponding transmission spurious signals from flowing into the TDD transmission channel and leaking into the TDD reception channel via terminals B and C, thereby fully ensuring the normal operation of the TDD reception.

[0122] In conclusion, according to the multiplexer 10 of the embodiment of the present application, when ensuring the reliable operation of FDD and TDD, the FDD system and the TDD system share one transmit port, thereby improving the multiplexing rate of the transmit port and reducing the circuit connection lines and circuit area, thereby further reducing production and manufacturing costs and meeting user requirements.

[0123] Based on the description of the embodiment corresponding to FIG. 11, several possible configurations of the multiplexer 10 will be described in detail below with reference to the drawings.

[0124] Embodiment 1. The multiplexer 10 includes a single transmit port, dual receive ports, and a single antenna port.

[0125] 12 is a structural diagram of another multiplexer according to an embodiment of the present application. As shown in FIG. 12, multiplexer 10 includes one transmit port, two receive ports, and one antenna port, specifically, transmit port 101, TDD receive port 1021, FDD receive port 1022, and antenna port 103. As shown in FIG. 12, multiplexer 10 further includes a filter group and a switch 108. The filter group specifically may include an FDD transmit filter 104, an FDD receive filter 105, a first TDD filter 106, and a second TDD filter 107. Switch 108 may include terminal A, terminal B, and terminal C. For example, switch 108 may be a single-pole, double-throw switch.

[0126] 12, terminal A of switch 108 is connected to first TDD filter 106, terminal B of switch 108 is connected to the output terminal of second TDD filter 107, and terminal C of switch 108 is connected to TDD receive port 1021. Transmit port 101 is connected to the input terminal of FDD transmit filter 104 and the input terminal of second TDD filter 107. The output terminal of FDD receive filter 105 is connected to FDD receive port 1022. The output terminal of FDD transmit filter 104, the input terminal of FDD receive filter 105, and first TDD filter 106 are each connected to antenna port 103.

[0127] 12, the input end of transmit port 101 is connected to the output end of the PA, the output end of TDD receive port 1021 is connected to the input end of the LNA-TDD (i.e., the LNA in the TDD receive channel), the output end of FDD receive port 1022 is connected to the input end of the LNA-FDD (i.e., the LNA in the FDD receive channel), and antenna port 103 is connected to antenna 109. An FDD transmit signal and a TDD transmit signal, both generated by the PA with corresponding powers, may be input to the FDD transmit channel and the TDD transmit channel via transmit port 101.

[0128] The FDD transmit filter 104 is configured to receive the FDD transmit signal output from the transmit port 101 , suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port 103 .

[0129] Antenna port 103 is configured to transmit an FDD transmit signal via antenna 109 .

[0130] Antenna port 103 is further configured to receive an FDD receive signal via antenna 109 .

[0131] The FDD receive filter 105 is configured to receive an FDD receive signal input from the antenna port 103 , suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the FDD receive port 1022 .

[0132] The FDD receive port 1022 is configured to input the FDD receive signal to the LNA-FDD for amplification for further processing.

[0133] When terminal A of switch 108 is electrically connected to terminal B,

[0134] The second TDD filter 107 is configured to receive the TDD transmission signal output from the transmission port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter .

[0135] The first TDD filter 106 is configured to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port 103 .

[0136] Antenna port 103 is configured to transmit a TDD transmit signal via antenna 109 .

[0137] When terminal A of switch 108 is electrically connected to terminal C,

[0138] Antenna port 103 is configured to receive a TDD receive signal via antenna 109 .

[0139] The first TDD filter 106 is configured to receive the TDD reception signal input from the antenna port 103 , suppress signals outside the TDD reception frequency band, and output the TDD reception signal to the reception port 1021 .

[0140] The TDD receive port 1021 is configured to input and amplify the TDD receive signal into the LNA-TDD for further processing.

[0141] Optionally, for specific functions of the parts of the multiplexer 10 shown in Figure 12, please refer to the description of the embodiment corresponding to Figure 11. The details will not be described again here.

[0142] 13 is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 13, the filter group of multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to terminal C of switch 108, and the output end of the third TDD filter 110 is connected to TDD receive port 1021.

[0143] When terminal A of switch 108 is electrically connected to terminal C,

[0144] The first TDD filter 106 is configured to receive the TDD reception signal input from the antenna port 103 , suppress signals outside the TDD reception frequency band, and output the TDD reception signal to the third TDD filter 110 .

[0145] The third TDD filter 110 is configured to suppress signals outside the TDD reception frequency band and output the TDD reception signal to the TDD reception port 1021 .

[0146] Optionally, the third TDD filter 110 may be configured to suppress signals outside the fourth frequency band, and the first TDD filter 106 may be configured to suppress signals outside the second and third frequency bands. The second, third, and fourth frequency bands are all outside the TDD transmission frequency band. For example, if the TDD transmission frequency band is 2 to 3 GHz, the fourth frequency band may be 3.5 to 5 GHz, the second frequency band may be 1.5 to 2 GHz, and the third frequency band may be 3 to 3.5 GHz. In this manner, in this embodiment of the present application, multiple TDD filters are configured to respectively suppress multiple interfering signals outside the TDD reception frequency band, thereby ensuring the effect of interfering signal suppression, ensuring normal operation of TDD reception, and reducing the difficulty of implementing a single filter.

[0147] As shown in Figures 12 and 13, when an FDD system and a TDD system share one transmit port, they can share one PA to achieve power sharing between the FDD system and the TDD system. For example, the maximum output power of the PA is 200W. When FDD and TDD transmit simultaneously, the PA may allocate 120W of power to FDD and 90W of power to TDD, or 100W of power to FDD and 100W of power to TDD, etc. When TDD is in the receive slot, only FDD is transmitting. In this case, the PA may allocate all 200W of power to the FDD system, or 180W of power to the FDD system. This allows flexible power sharing between the FDD system and the TDD system, reducing the number and cost of PAs.

[0148] Embodiment 2. The multiplexer 10 includes a single transmit port, a single receive port, and a single antenna port.

[0149] 14 is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 14, the multiplexer 10 includes one transmit port, one receive port, and one antenna port, specifically, includes a transmit port 101, a receive port 102, and an antenna port 103. As shown in FIG. 14, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 12. The details will not be described again here.

[0150] 12, terminal A of switch 108 is connected to first TDD filter 106, terminal B of switch 108 is connected to the output terminal of second TDD filter 107, and terminal C of switch 108 is connected to receive port 102. Transmit port 101 is connected to the input terminal of FDD transmit filter 104 and the input terminal of second TDD filter 107. The output terminal of FDD receive filter 105 is connected to receive port 102. The output terminal of FDD transmit filter 104, the input terminal of FDD receive filter 105, and first TDD filter 106 are each connected to antenna port 103.

[0151] As shown in FIG. 14, the input terminal of the transmitting port 101 is connected to the output terminal of the PA, the output terminal of the receiving port 102 is connected to the input terminal of the LNA, and the antenna port 103 is connected to an antenna 109 .

[0152] The FDD transmit filter 104 is configured to receive the FDD transmit signal output from the transmit port 101 , suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port 103 .

[0153] Antenna port 103 is configured to transmit an FDD transmit signal via antenna 109 .

[0154] Antenna port 103 is further configured to receive an FDD receive signal via antenna 109 .

[0155] The FDD receive filter 105 is configured to receive an FDD receive signal input from the antenna port 103 , suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the receive port 102 .

[0156] The receive port 102 is configured to input the FDD receive signal to an LNA for amplification for further processing.

[0157] When terminal A of switch 108 is electrically connected to terminal B,

[0158] The second TDD filter 107 is configured to receive the TDD transmission signal output from the transmission port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter .

[0159] The first TDD filter 106 is configured to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port 103 .

[0160] Antenna port 103 is configured to transmit a TDD transmit signal via antenna 109 .

[0161] When terminal A of switch 108 is electrically connected to terminal C,

[0162] Antenna port 103 is configured to receive a TDD receive signal via antenna 109 .

[0163] The first TDD filter 106 is configured to receive the TDD reception signal input from the antenna port 103 , suppress signals outside the TDD reception frequency band, and output the TDD reception signal to the reception port 102 .

[0164] The receive port 102 is configured to input the TDD receive signal to an LNA for amplification for further processing.

[0165] Optionally, for specific functions of the parts of the multiplexer 10 shown in Figure 14, please refer to the description of the embodiment corresponding to Figure 12. The details will not be described again here.

[0166] 15 is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 15, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the receive port 102.

[0167] When terminal A of switch 108 is electrically connected to terminal C,

[0168] The first TDD filter 106 is configured to receive the TDD reception signal input from the antenna port 103 , suppress signals outside the TDD reception frequency band, and output the TDD reception signal to the third TDD filter 110 .

[0169] The third TDD filter 110 is configured to suppress signals outside the TDD receive frequency band and output the TDD receive signal to the receive port 102 .

[0170] Optionally, for specific functions of the parts of the multiplexer 10 shown in Figure 15, please refer to the description of the embodiment corresponding to Figure 13. The details will not be described again here.

[0171] As shown in Figures 14 and 15, when the FDD system and the TDD system share one transmit port, in this embodiment of the present application, the TDD system and the FDD system can further share the receive port and LNA, thereby improving the multiplexing rate of the receive port and further reducing the circuit connection lines, circuit area and manufacturing costs.

[0172] 14 and 15, when the FDD system and the TDD system share one transmit port and one receive port, the interface configuration of the multiplexer 10 is the same as that of the conventional FDD multiplexer (as shown in FIG. 4), both of which include one transmit port and one receive port. In this way, the multiplexer 10 can be independently manufactured on a printed circuit board (PCB), allowing it to be used with both the FDD system and the TDD system, thereby enhancing the flexible multiplexing capability of the multiplexer.

[0173] Embodiment 3. The multiplexer 10 includes a single transmit port, dual receive ports, and dual antenna ports.

[0174] (1) TDD and FDD RX with shared antenna

[0175] 16a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 16a, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically, a transmit port 101, a TDD receive port 1021, an FDD receive port 1022, an antenna port 1031, and an antenna port 1032. As shown in FIG. 16a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 12. The details will not be described again here.

[0176] As shown in Fig. 16a, the output terminal of the FDD transmit filter 104 is connected to antenna port 1031, and the input terminal of the FDD receive filter 105 and the first TDD filter 106 are each connected to antenna port 1032. The antenna port 1031 is connected to antenna 1091, and the antenna port 1032 is connected to antenna 1092. For the connection structure of the multiplexer 10 shown in Fig. 16a, please refer to the description of the embodiment corresponding to Fig. 12. The details will not be described again here.

[0177] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0178] The antenna port 1032 is configured to receive an FDD received signal via an antenna 1092 and input the FDD received signal to the FDD receive filter 105 .

[0179] When terminal A of switch 108 is electrically connected to terminal B,

[0180] The antenna port 1032 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1092 .

[0181] When terminal A of switch 108 is electrically connected to terminal C,

[0182] The antenna port 1032 is configured to receive the TDD receive signal via the antenna 1092 and input the TDD receive signal to the first TDD filter 106 .

[0183] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 16a, please refer to the description of the embodiment corresponding to Fig. 12. The details will not be described again here.

[0184] 16b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 16b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the TDD receiving port 1021. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 13. The details will not be described again here.

[0185] (2) TDD and FDD TX with shared antenna

[0186] 17a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 17a, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically, a transmit port 101, a TDD receive port 1021, an FDD receive port 1022, an antenna port 1031, and an antenna port 1032. As shown in FIG. 17a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 12. The details will not be described again here.

[0187] As shown in Fig. 17a, the output terminal of the FDD transmit filter 104 and the first TDD filter 106 are connected to the antenna port 1031, and the input terminal of the FDD receive filter 105 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. For the connection structure of the multiplexer 10 shown in Fig. 17a, please refer to the description of the embodiment corresponding to Fig. 12. Details will not be described again here.

[0188] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0189] The antenna port 1032 is configured to receive an FDD received signal via an antenna 1092 and input the FDD received signal to the FDD receive filter 105 .

[0190] When terminal A of switch 108 is electrically connected to terminal B,

[0191] The antenna port 1031 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1091 .

[0192] When terminal A of switch 108 is electrically connected to terminal C,

[0193] The antenna port 1031 is configured to receive a TDD receive signal via the antenna 1091 and input the TDD receive signal to the first TDD filter 106 .

[0194] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 17a, please refer to the description of the embodiment corresponding to Fig. 12. The details will not be described again here.

[0195] 17b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 17b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the TDD receiving port 1021. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 13. The details will not be described again here.

[0196] (3) FDD TX and FDD RX sharing an antenna

[0197] 18a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 18a, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically, a transmit port 101, a TDD receive port 1021, an FDD receive port 1022, an antenna port 1031, and an antenna port 1032. As shown in FIG. 18a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 12. The details will not be described again here.

[0198] As shown in Fig. 18a, the output terminal of the FDD transmit filter 104 and the input terminal of the FDD receive filter 105 are connected to the antenna port 1031, and the first TDD filter 106 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. For the connection structure of the multiplexer 10 shown in Fig. 18a, please refer to the description of the embodiment corresponding to Fig. 12. Details will not be described again here.

[0199] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0200] The antenna port 1031 is further configured to receive an FDD receive signal via an antenna 1091 and input the FDD receive signal to the FDD receive filter 105 .

[0201] When terminal A of switch 108 is electrically connected to terminal B,

[0202] The antenna port 1032 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1092 .

[0203] When terminal A of switch 108 is electrically connected to terminal C,

[0204] The antenna port 1032 is configured to receive the TDD receive signal via the antenna 1092 and input the TDD receive signal to the first TDD filter 106 .

[0205] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 18a, please refer to the description of the embodiment corresponding to Fig. 12. The details will not be described again here.

[0206] 18b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 18b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the TDD receiving port 1021. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 13. The details will not be described again here.

[0207] Embodiment 4. The multiplexer 10 includes a single transmit port, a single receive port, and dual antenna ports.

[0208] (1) TDD and FDD RX with shared antenna

[0209] 19a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 19a, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically, transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. As shown in FIG. 19a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 14. The details will not be described again here.

[0210] As shown in Fig. 19a, the output terminal of the FDD transmit filter 104 is connected to the antenna port 1031, and the input terminal of the first TDD filter 106 and the input terminal of the FDD receive filter 105 are connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. For the connection structure of the multiplexer 10 shown in Fig. 19a, please refer to the description of the embodiment corresponding to Fig. 14. Details will not be described again here.

[0211] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0212] The antenna port 1032 is configured to receive an FDD received signal via an antenna 1092 and input the FDD received signal to the FDD receive filter 105 .

[0213] When terminal A of switch 108 is electrically connected to terminal B,

[0214] The antenna port 1032 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1092 .

[0215] When terminal A of switch 108 is electrically connected to terminal C,

[0216] The antenna port 1032 is configured to receive the TDD receive signal via the antenna 1092 and input the TDD receive signal to the first TDD filter 106 .

[0217] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 19a, please refer to the description of the embodiment corresponding to Fig. 14. The details will not be described again here.

[0218] 19b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 19b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the receiving port 102. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 15. The details will not be described again here.

[0219] (2) TDD and FDD TX with shared antenna

[0220] 20a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 20a, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically, transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. As shown in FIG. 20a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 14. The details will not be described again here.

[0221] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0222] The antenna port 1032 is configured to receive an FDD received signal via an antenna 1092 and input the FDD received signal to the FDD receive filter 105 .

[0223] When terminal A of switch 108 is electrically connected to terminal B,

[0224] The antenna port 1031 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1091 .

[0225] When terminal A of switch 108 is electrically connected to terminal C,

[0226] The antenna port 1031 is configured to receive a TDD receive signal via the antenna 1091 and input the TDD receive signal to the first TDD filter 106 .

[0227] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 20a, please refer to the description of the embodiment corresponding to Fig. 14. The details will not be described again here.

[0228] 20b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 20b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the receiving port 102. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 15. The details will not be described again here.

[0229] (3) FDD TX and FDD RX sharing an antenna

[0230] 21a is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 21a, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically, transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. As shown in FIG. 21a, the multiplexer 10 further includes a filter group and a switch 108. For details, please refer to the description of the embodiment corresponding to FIG. 14. The details will not be described again here.

[0231] As shown in Fig. 21a, the output terminal of the FDD transmit filter 104 and the input terminal of the FDD receive filter 105 are connected to the antenna port 1031, and the first TDD filter 106 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. For the connection structure of the multiplexer 10 shown in Fig. 21a, please refer to the description of the embodiment corresponding to Fig. 14. The details will not be described again here.

[0232] The antenna port 1031 is configured to receive the FDD transmit signal output by the FDD transmit filter 104 and transmit the FDD transmit signal via the antenna 1091 .

[0233] The antenna port 1031 is further configured to receive an FDD receive signal via an antenna 1091 and input the FDD receive signal to the FDD receive filter 105 .

[0234] When terminal A of switch 108 is electrically connected to terminal B,

[0235] The antenna port 1032 is configured to receive the TDD transmit signal output by the first TDD filter 106 and to transmit the TDD transmit signal via the antenna 1092 .

[0236] When terminal A of switch 108 is electrically connected to terminal C,

[0237] The antenna port 1032 is configured to receive the TDD receive signal via the antenna 1092 and input the TDD receive signal to the first TDD filter 106 .

[0238] Optionally, for specific functions of the parts of the multiplexer 10 shown in Fig. 21a, please refer to the description of the embodiment corresponding to Fig. 14. The details will not be described again here.

[0239] 21b is a structural diagram of yet another multiplexer according to an embodiment of the present application. As shown in FIG. 19b, the filter group of the multiplexer 10 may further include a third TDD filter 110. The input end of the third TDD filter 110 is connected to the terminal C of the switch 108, and the output end of the third TDD filter 110 is connected to the receiving port 102. For specific functions of the third TDD filter 110, please refer to the description of the embodiment corresponding to FIG. 15. The details will not be described again here.

[0240] As shown in Figures 16a to 21b, the multiplexer 10 in the embodiment of the present application can be configured with two antenna ports to achieve wireless interface isolation for multiple frequency bands, thereby reducing the degree of filter suppression and the difficulty of implementing the filter.

[0241] In conclusion, the present embodiment innovates the conventional multiplexer structure for FDD+TDD scenarios. By providing a switch and a TDD filter between the switch and the transmit port, isolation between TDD receive and FDD transmit is improved, preventing the impact of FDD transmit spurious emissions on the TDD receive signal in the TDD receive slot. In this way, FDD and TDD can share one transmit port, reducing circuit connections and circuit area. Furthermore, the present embodiment provides a switch to separate one original TDD filter (e.g., filter 3 shown in FIG. 8 ) into three filters (first TDD filter, second TDD filter, and third TDD filter). The first TDD filter mainly supports multiplexing and combining with the FDD system and performs remote spurious suppression, while the second and third TDD filters, matched with the first TDD filter, perform transmit spurious suppression and receive blocking suppression, respectively, thereby reducing overall loss. This further facilitates FDD and TDD sharing one receive port. In conventional solutions, one filter is configured to perform both transmission spurious suppression and reception blocking suppression, which makes the filter difficult to implement, has a high order, and results in large losses. In contrast, in this embodiment of the present application, the implementation of a single filter is easy and the suppression effect is ensured.

[0242] Based on the multiplexer 10 described in the above embodiments, an embodiment of the present application further provides a communication device. FIG. 22 is a structural diagram of a communication device according to an embodiment of the present application. As shown in FIG. 22, the communication device 30 includes a transmitting circuit 31, a receiving circuit 32, an antenna system 33, and a multiplexer 10. The transmitting circuit 31 may be connected to a transmitting port 101 of the multiplexer 10, the receiving circuit 32 may be connected to at least one receiving port (e.g., N receiving ports 102) of the multiplexer 10, and the antenna system 33 may be connected to at least one antenna port (e.g., M antenna ports 103) of the multiplexer 10. Optionally, the transmitting circuit 31 may include the above-mentioned PA, and the receiving circuit 32 may include the above-mentioned LNA, etc.

[0243] Optionally, the antenna system 33 includes one antenna, for example the antenna 109 shown in Figure 12. The multiplexer 10 includes one antenna port, for example the antenna port 103. The antenna 109 is connected to the antenna port 103.

[0244] Optionally, the antenna system 33 includes two antennas, i.e., a first antenna and a second antenna, for example, antenna 1091 and antenna 1092 shown in Fig. 16a. The multiplexer 10 includes two antenna ports, for example, antenna port 1031 and antenna port 1032. Antenna 1091 is connected to antenna port 1031, and antenna 1092 is connected to antenna port 1032.

[0245] Optionally, the communication device 30 further includes a control circuit that may be connected to the multiplexer 10, particularly to the switches 108 within the multiplexer 10, and configured to output control signals for selectively controlling the electrical connections of the switches 108.

[0246] Optionally, for the structure and function of the communication device 30, please refer to the description of the embodiment corresponding to Figures 10 to 21b. Details will not be described again here. The communication device may be a base station having the above-mentioned structure and function, or a terminal device, such as a smart wearable device, a smartphone, a tablet computer, or a notebook computer. The communication device may also be a part of the base station or the terminal device, for example, a component including a transceiver and an antenna in the base station or the terminal device. This is not specifically limited in this embodiment of the present application.

[0247] Based on the above description of the device embodiment, an embodiment of the present application further provides a communication method. FIG. 23 is a schematic flowchart of the communication method according to an embodiment of the present application. The communication method may be applied to the communication device shown in FIG. 22. The communication device 30 includes at least a multiplexer 10. The multiplexer 10 may include a transmit port, at least one receive port, at least one antenna port, a filter group, a switch, etc. For details, see the description of the embodiment corresponding to FIGS. 11 to 21b. The method may include the following steps S501 to S505.

[0248] S501: The first free end of the switch is controlled to be electrically connected to the fixed end.

[0249] S502: The second TDD filter receives the TDD transmission signal output from the transmission port, suppresses signals outside the TDD transmission frequency band, and outputs the TDD transmission signal to the first TDD filter.

[0250] S503: The first TDD filter suppresses signals outside the TDD transmission frequency band, and outputs the TDD transmission signal to the antenna port.

[0251] The frequency band of the TDD transmission signal is within the TDD transmission frequency band.

[0252] S504: The second free end of the switch is controlled to be electrically connected to the fixed end.

[0253] S505: The first TDD filter receives the TDD reception signal input from the antenna port, suppresses signals outside the TDD reception frequency band, and outputs the TDD reception signal to the reception port.

[0254] The frequency band of the TDD received signal is within the TDD received frequency band.

[0255] As described above, the communication method provided in this embodiment of the present application achieves reliable switching between TDD transmission and TDD reception by controlling the fixed end of the switch to selectively electrically connect between the two free ends. Furthermore, based on the physical isolation between the two free ends of the switch, signal leakage between the TDD transmission channel and the TDD reception channel can be effectively prevented. In particular, when FDD and TDD share a transmit port, the FDD transmission signal and a series of nonlinear spurious signals generated by the FDD transmission signal can be effectively prevented from leaking into the TDD reception channel. As described above, compared with the prior art solution in which TDD and FDD cannot share a transmit port, resulting in excessive interfaces, complex circuits, and a large circuit area, this embodiment of the present application allows the FDD system and the TDD system to share a single transmit port while ensuring reliable operation of FDD and TDD. This improves the multiplexing rate of the transmit port, reduces circuit connection lines and circuit area, further reduces production and manufacturing costs, and meets user requirements.

[0256] Optionally, for details of the communication method, please refer to the description of the embodiment corresponding to Figures 11 to 21b. The details will not be described again here. The communication method may be specifically implemented by hardware or a combination of hardware and software. The hardware implementation may include logic circuits, algorithmic circuits, analog circuits, etc. The software implementation may include program instructions. The program instructions are considered as a software product and may be stored in a memory and executed by a processor to perform the associated functions.

[0257] An embodiment of the present application further provides a computer-readable storage medium. The computer-readable storage medium may store a program. When the program is executed by a processor, the processor can perform some or all of the steps recorded in any one of the above-mentioned method embodiments. The storage medium may include any medium capable of storing program code, such as a USB flash drive, a removable hard disk, a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

[0258] An embodiment of the present application further provides a computer program, which includes instructions, and when the computer program is executed by a multi-core processor, the processor can perform some or all of the steps recited in any one of the above-mentioned method embodiments.

[0259] In the above embodiments, the description of each embodiment has its own focus, and for the parts not described in detail in the embodiments, please refer to the related descriptions of other embodiments.

[0260] It should be noted that for the sake of simplicity, the above-described method embodiments are represented as a series of operations. However, those skilled in the art should understand that the present application is not limited to the order of operations described, since some steps may be performed in other orders or simultaneously according to the present application. Those skilled in the art should understand that the embodiments described herein are all exemplary embodiments, and the associated operations and modules are not necessarily required by the present application.

[0261] The above embodiments are merely intended to illustrate the technical solutions of the present application, and do not limit the present application. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they may modify the technical solutions described in the above embodiments, or make equivalent substitutions for some technical features thereof, without departing from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. a multiplexer including a transmit port, at least one receive port, at least one antenna port, a filter group, and a switch, the filter group including a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter; a fixed end of the switch is connected to the first TDD filter, a first free end of the switch is connected to an output end of the second TDD filter, and a second free end of the switch is connected to one of the at least one receive ports; a multiplexer, wherein the transmit port is connected to an input terminal of the FDD transmit filter and an input terminal of the second TDD filter, the output terminal of the FDD receive filter is connected to one receive port of the at least one receive port, and the output terminal of the FDD transmit filter, the input terminal of the FDD receive filter, and the first TDD filter are each connected to one antenna port of the at least one antenna port.

2. When the first free end of the switch is electrically connected to the fixed end, the second TDD filter is configured to receive the TDD transmit signal output from the transmit port, suppress signals outside a TDD transmit frequency band, and output the TDD transmit signal to the first TDD filter; the first TDD filter is configured to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port, the frequency band of the TDD transmission signal being within the TDD transmission frequency band; or When the second free end of the switch is electrically connected to the fixed end, 2. The multiplexer of claim 1, wherein the first TDD filter is configured to receive a TDD receive signal input from the antenna port, suppress signals outside a TDD receive frequency band, and output the TDD receive signal to the receive port, the frequency band of the TDD receive signal being within the TDD receive frequency band.

3. the second TDD filter is specifically configured to suppress signals in a first frequency band and output the TDD transmission signal to the first TDD filter; 3. The multiplexer of claim 2, wherein the first TDD filter is specifically configured to suppress signals in a second frequency band and a third frequency band and output the TDD transmit signal to the antenna port, and the first frequency band, the second frequency band, and the third frequency band are all outside the TDD transmit frequency band.

4. 4. The multiplexer of claim 3, wherein the filter group further includes a third TDD filter, an input end of the third TDD filter connected to the second free end of the switch, and an output end of the third TDD filter connected to one of the at least one receive ports.

5. the first TDD filter is specifically configured to suppress signals in the second frequency band and the third frequency band, and output the TDD received signal to the third TDD filter; 5. The multiplexer of claim 4, wherein the third TDD filter is configured to suppress signals in a fourth frequency band and output the TDD receive signal to the receive port, the second frequency band, the third frequency band, and the fourth frequency band all being outside the TDD receive frequency band.

6. The multiplexer according to any one of claims 1 to 3, wherein the number of the at least one receiving port is 1, and the receiving port is separately connected to the output end of the FDD receiving filter and the second free end of the switch.

7. the receive port is configured to receive the FDD receive signal output by the FDD receive filter; 7. The multiplexer of claim 6, wherein the receive port is further configured to receive the TDD receive signal output by the first TDD filter when the second free end of the switch is electrically connected to the fixed end.

8. 6. The multiplexer according to claim 4, wherein the number of the at least one receiving port is one, and the receiving port is separately connected to an output terminal of the FDD receiving filter and an output terminal of the third TDD filter.

9. the receive port is configured to receive the FDD receive signal output by the FDD receive filter; 9. The multiplexer of claim 8, wherein the receive port is further configured to receive the TDD receive signal output by the third TDD filter when the second free end of the switch is electrically connected to the fixed end.

10. 4. The multiplexer according to claim 1, wherein the at least one receiving port includes an FDD receiving port and a TDD receiving port, the FDD receiving port being connected to the output end of the FDD receiving filter, and the TDD receiving port being connected to the second free end of the switch.

11. the FDD receive port is configured to receive the FDD receive signal output by the FDD receive filter; 11. The multiplexer of claim 10, wherein the TDD receive port is configured to receive the TDD receive signal output by the first TDD filter when the second free end of the switch is electrically connected to the fixed end.

12. 6. The multiplexer of claim 4, wherein the at least one receive port includes an FDD receive port and a TDD receive port, the FDD receive port being connected to an output terminal of the FDD receive filter, and the TDD receive port being connected to an output terminal of the third TDD filter.

13. the FDD receive port is configured to receive the FDD receive signal output by the FDD receive filter; 13. The multiplexer of claim 12, wherein the TDD receive port is configured to receive the TDD receive signal output by the third TDD filter when the second free end of the switch is electrically connected to the fixed end.

14. 14. The multiplexer according to claim 1, wherein the number of the at least one antenna port is one, and the antenna port is separately connected to an output terminal of the FDD transmit filter, an input terminal of the FDD receive filter, and the first TDD filter.

15. 14. The multiplexer according to claim 1, wherein the at least one antenna port includes a first antenna port and a second antenna port, the first antenna port being connected to an output terminal of the FDD transmit filter and an input terminal of the FDD receive filter, and the second antenna port being connected to the first TDD filter.

16. 14. The multiplexer according to claim 1, wherein the at least one antenna port includes a first antenna port and a second antenna port, the first antenna port being connected to an output terminal of the FDD transmit filter and the first TDD filter, and the second antenna port being connected to an input terminal of the FDD receive filter.

17. 14. The multiplexer according to claim 1, wherein the at least one antenna port includes a first antenna port and a second antenna port, the first antenna port being connected to an output terminal of the FDD transmit filter, and the second antenna port being connected to an input terminal of the FDD receive filter and the first TDD filter.

18. the FDD transmit filter is configured to receive an FDD transmit signal output from the transmit port, suppress signals outside an FDD transmit frequency band, and output the FDD transmit signal to the antenna port, the frequency band of the FDD transmit signal being within the FDD transmit frequency band; The multiplexer according to any one of claims 1 to 17, wherein the FDD receive filter is configured to receive an FDD receive signal input from the antenna port, suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the receive port, and the frequency band of the FDD receive signal is within the FDD receive frequency band.

19. 15. A communications device comprising a transmitting circuit, a receiving circuit, an antenna system, and a multiplexer according to any one of claims 1 to 14, wherein the transmitting circuit is connected to a transmitting port of the multiplexer, the receiving circuit is connected to at least one receiving port of the multiplexer, and the antenna system is connected to at least one antenna port of the multiplexer.

20. 20. The communication device of claim 19, wherein the antenna system includes an antenna, the number of the at least one antenna port is one, and the antenna is connected to the antenna port.

21. 20. The communications device of claim 19, wherein the antenna system includes a first antenna and a second antenna, the at least one antenna port includes a first antenna port and a second antenna port, the first antenna connected to the first antenna port, and the second antenna connected to the second antenna port.

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