Sensor fusion for thin film segmentation

Abstract

In several examples, methods for performing semiconductor metrology by analyzing a sample surface and methods for training machine learning logic for performing semiconductor metrology by analyzing a sample surface are disclosed. In particular, in several examples, a method for performing semiconductor metrology by analyzing a sample surface is disclosed, the method including acquiring (701) a first image (711) generated using a first image modality, acquiring (701) a second image (721) generated using a second image modality, generating (711) a first label (712) by segmenting the first image (711), generating (711) a second label (722) by segmenting the second image (721), and generating (711) a third label (732) associated with the first image (711) and the second image (721) by fusing the first label (712) and the second label (722). In a further example, a processing device for performing the method is disclosed.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE The present disclosure relates generally to performing semiconductor metrology by analyzing a sample surface. [Background technology]

[0002] The fabrication of semiconductor devices relies on the precise identification of semiconductor structures and their properties. As feature sizes become smaller, scanning electron microscopes (SEMs) become increasingly important for identifying the features of fabricated semiconductor structures, particularly for determining parameters including at least one of feature morphology, size, and location.

[0003] An SEM scans the surface of a sample with a beam of primary electrons that emit a full spectrum of scattered products from the sample surface, which can be split based on energy and take-off angle to various detectors, including, for example, an in-lens secondary electron (SE) detector, an in-lens backscattered electron (BSE) detector, an external SE detector, and / or an X-ray detector.

[0004] No single detector can observe all the characteristics of the semiconductor structure that must be monitored. Furthermore, even slight deviations from the desired structure and properties in a process step of a semiconductor device manufacturing line can result in a reduction in overall yield. Process deviations generally need to be identified early in the manufacturing line. Summary of the Invention

[0005] Therefore, there may be a need for methods that facilitate detection of semiconductor structures and properties.

[0006] The above needs are addressed by the subject matter of the independent claims. Advantageous embodiments are described in the dependent claims.

[0007] An example describes a method for performing semiconductor metrology by analyzing a sample surface, the method including acquiring a first image of the sample surface generated using a first image modality, acquiring a second image of the sample surface generated using a second image modality, generating a third image by performing a nonlinear fusion of the first image and the second image, and generating a third label associated with the sample surface by segmenting the third image.

[0008] In a further example, a method is provided for performing semiconductor metrology by analyzing a sample surface, the method including acquiring a first image generated using a first image modality, acquiring a second image generated using a second image modality, generating a first label by segmenting the first image, generating a second label by segmenting the second image, and generating a third label associated with the first image and the second image by fusing the first label and the second label.

[0009] Some examples disclose a method for performing semiconductor metrology by analyzing a sample surface, the method including acquiring a first image generated using a first image modality, acquiring a second image generated using a second image modality, and generating a third label associated with the first image and the second image by processing the first image and the second image in trained machine learning logic.

[0010] A further example relates to a method for training machine learning logic for performing semiconductor metrology by analyzing a sample surface, the method including: acquiring training sets including first training images of the sample surface generated using a first image modality and second training images of the sample surface generated using a second image modality, acquiring third annotations for each of the training sets, processing the first and second sets of training images in the machine learning logic, acquiring third labels for each of the first and second sets of training images from the machine learning logic, and performing training of the machine learning logic by updating parameter values ​​of the machine learning logic based on a comparison of the third labels to the third annotations.

[0011] The computer program or computer program product or computer-readable storage medium includes program code that can be loaded and executed by at least one processor, and when executed, causes the at least one processor to perform the method as described above.

[0012] A processing device is disclosed, the processing device including a processor and a memory, the processor configured to load program code from the memory and execute the program code, the processor configured, upon execution of the program code, to perform the method as described above.

[0013] It is to be understood that the features mentioned above and those to be described hereinafter can be used not only in the respective combinations shown, but also in other combinations or alone. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a schematic diagram of a scanning electron microscope system. [Figure 2] 1 is a longitudinal cross-sectional view of a semiconductor structure. [Figure 3] 1 is a cross-sectional view of a semiconductor structure from above. [Figure 4] FIG. 1 illustrates the differences between imaging modalities. [Figure 5] 1A and 1B are diagrams illustrating a method for analyzing a sample surface. [Figure 6] 6A and 6B further illustrate a method for analyzing the surface of the sample of FIG. 5. [Figure 7] 1A and 1B are diagrams illustrating a method for analyzing a sample surface. [Figure 8] 8A and 8B further illustrate a method for analyzing the surface of the sample of FIG. 7. [Figure 9] 1A and 1B are diagrams illustrating a method for analyzing a sample surface. [Figure 10] 11A-11F further illustrate a method for analyzing the surface of the sample of FIG. 10. [Figure 11] FIG. 1 illustrates a method for training machine learning logic. [Figure 12] FIG. 1 illustrates a method for training machine learning logic. [Figure 13] FIG. 1 illustrates a method for training machine learning logic. DETAILED DESCRIPTION OF THE INVENTION

[0015] Some examples of the present disclosure generally provide multiple circuits or other electrical devices. Any references to circuits and other electrical devices and the functionality provided by each are not intended to be limited to only those shown and described herein. While specific labels may be assigned to the various disclosed circuits and other electrical devices, such labels are not intended to limit the scope of operation of those circuits and other electrical devices. Such circuits and other electrical devices can be combined and / or separated in any manner based on the particular type of electrical implementation desired. It will be recognized that any circuit or other electrical device disclosed herein may include any number of microcontrollers, graphic processor units (GPUs), integrated circuits, memory devices (e.g., FLASH, random access memory (RAM), read-only memory (ROM), electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or other suitable variations thereof), and software that cooperate with each other to perform the operations disclosed herein. Further, any one or more of the electrical devices may be configured to execute program code embodied in a non-transitory computer-readable medium that is programmed to perform any number of functions as disclosed.

[0016]

[0023] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood that the following description of the embodiments should not be construed in a limiting sense. The scope of the present invention is not intended to be limited by the embodiments described below or by the drawings, which are to be construed as exemplary only.

[0017] The drawings are considered to be schematic representations, and elements shown in the drawings are not necessarily drawn to scale. Rather, the various elements are represented so that their function and general purpose will be apparent to those skilled in the art. Any connection or coupling between functional blocks, devices, components, or other physical or functional units shown in the drawings or described herein may also be implemented by indirect connections or couplings. The functional blocks may be implemented in hardware, firmware, software, or a combination thereof.

[0018] 1 shows a system 100 for analyzing a sample surface. The system 100 comprises an SEM 110 for acquiring images of the sample surface using one or more image modalities, and a processing device 120 including a processor 121 and a memory 122. The processor 121 may be configured to load and execute program code from the memory, where the processor is configured, upon execution of the program code, to perform one of the methods for analyzing a sample surface as defined below.

[0019] The SEM 110 may obtain an image by scanning the sample surface with a primary electron beam and detecting scattered products with one or more detectors. The detectors may include at least one of an in-lens secondary electron detector (in-lens SE detector), an in-lens backscattered secondary electron (BSE) detector (in-lens BSE detector), an external secondary electron detector (external SE detector), an external BSE detector, and an X-ray detector. Acquiring an image using a particular image modality may refer to acquiring an image using one of the above detectors. For each position of the primary electron beam, a corresponding signal from a selected detector may be acquired. Typically, different channels are associated with different detectors. Thus, acquiring an image using a particular image modality may also be referred to as acquiring an image using a particular channel (or detector channel).

[0020] In some scenarios, the SEM 110 can simultaneously acquire a first image using a first image modality and a second image using a second image modality. For example, the SEM 110 can scan a sample surface with a primary electron beam and acquire signals from a first detector and a second detector in parallel. As a result of simultaneously acquiring a first image using a first image modality and a second image using a second image modality, the first image and the second image may be naturally aligned with each other. In this case, an additional alignment step can be omitted. This can reduce processing time and energy. Furthermore, alignment-induced noise can be avoided.

[0021] The SEM 110 can use a single primary electron beam or multiple primary electron beams to acquire an image. An SEM 110 that uses multiple primary electron beams is sometimes referred to as a MultiSEM or mSEM. Using multiple primary electron beams can allow for scanning a larger area of ​​a surface sample in a given time period.

[0022] It may be necessary to analyze the structures and properties of various kinds and types of semiconductors. For example, three-dimensional (3D) memory chips, such as vertical NAND (3D NAND) memory chips or 3D DRAM chips, may be analyzed. The 3D memory chips (3D NAND or 3D RAM) are composed of many columnar structures that run parallel to each other, sometimes called memory channels or "pillars." The deep-etched holes in the memory channels traverse multiple layers, for example, different conductive (e.g., metallization) or insulating layers.

[0023] 2 and 3 schematically illustrate a 3D NAND memory structure 200. FIG. 3 illustrates a cross section of the 3D NAND memory structure 200 along line 222 shown in FIG. 2. The 3D NAND cell 200 includes an active portion 201 that connects a bit line 208 of the 3D NAND cell 200 to a substrate 207. The bit line 208 may be made of a metal material, such as tungsten (W), the active portion 201 may be made of a semiconductor material, such as poly-Si, and the substrate 208 may be a Si substrate. The active portion 201 may be hollow or filled with a filler material 206. The filler material 206 may be made of SiO. The active portion 201 is surrounded by a first dielectric layer 202, a floating gate or charge trapping layer 203, a second dielectric layer 204, and a gate or word line 205. Multiple cells of the 3D NAND memory structure 200 may be separated from each other by an interlayer dielectric 209. The interlayer dielectric may be made of SiO2. In the active portion 201, a conductive channel may be formed that connects the bit lines 208 of the 3D NAND 200 to the substrate 207 depending on the voltage level of the charge trapping layer 203 and the gate or word line 205.

[0024] The first dielectric layer 202 may also be called a tunnel oxide. When a sufficient voltage is applied between the gate 205 and the active portion 201, electrons may tunnel through the first dielectric layer 202 and be trapped in the floating gate or the charge trapping layer 203. The first dielectric layer 202 may be made of SiO2. The layer 203 may be a charge trapping layer made of Si3N4. The second dielectric layer 204 may insulate the layer 203 from the gate 205. The second dielectric layer 204 may also be made of a blocking oxide. In particular, the second dielectric layer 204 may be made of Al2O3. The gate 205 may also be made of tungsten.

[0025] During semiconductor device fabrication, it may be necessary to determine deviations of fabricated semiconductor structures from desired semiconductor structures. For example, slice-and-image tomography techniques can be used to generate 3D images of the fabricated semiconductor structures. Conventionally, dual-beam devices are used. In dual-beam devices, two particle optics are arranged at an angle (column offset angle). The two particle optics can be oriented perpendicularly or at a column offset angle of 45° to 90°. The first particle optic defines an imaging column. The imaging column can be implemented by a SEM or a helium ion microscope (HIM). The second particle optic defines a milling column. The milling column can be a focused ion beam (FIB) optic, for example, using gallium (Ga) ions. The Ga FIB is used to cut a test volume of the sample slice by slice. Images depicting the cross section of the sample at various milling depths are then acquired using the imaging column.

[0026] In order to compare the fabricated semiconductor structure with the desired semiconductor structure, the features of the fabricated semiconductor structure must be identified in the image.

[0027] Depending on the imaging modality used to acquire the image, features of the fabricated semiconductor structure may be easier, harder, or not at all identifiable.

[0028] The images described herein may refer to two-dimensional images (2D images) of a sample and / or three-dimensional images (3D images) of a sample. For example, a 3D image may be obtained by performing a tomography technique. Similarly, methods of analyzing a sample surface include methods of analyzing a surface volume of a sample.

[0029] 4 schematically illustrates a first image 411 depicting a cross-section of a fabricated semiconductor structure acquired using a first imaging modality and a second image 421 depicting the same cross-section acquired using a second imaging modality. The fabricated semiconductor structure may need to be compared to the desired semiconductor structure shown in FIG. 2 or FIG. 3.

[0030] The interfaces 413 between the filler material and the channel, between the channel and the first dielectric layer, between the charge trapping layer and the second dielectric layer, and between the second dielectric layer and the gate can be easily identified in the first image 411. However, the interface 414 between the first dielectric layer and the charge trapping layer may be barely discernible.

[0031] For the second image 421, the interfaces 423 between the channel and the first dielectric layer, between the first dielectric layer and the charge trapping layer, between the charge trapping layer and the second dielectric layer, and between the second dielectric layer and the gate can be easily detected, however, the interface 425 between the filler material and the channel may be barely visible.

[0032] The examples described herein contemplate improving the use of information provided by various image modalities to assign a third label 432 to a feature, e.g., a region, of the sample surface. The third label can then be used to determine deviations of a fabricated semiconductor structure from a desired semiconductor structure. For example, the lateral offset of a fabricated semiconductor structure according to FIG. 4 and a desired semiconductor structure according to FIG. 3 can be determined. In another example, a deviation in the thickness of one of the dielectric layers can be determined. A further example can specify identifying deviations from a desired shape, such as an elliptical shape rather than a cylindrical shape.

[0033] 5 and 6 illustrate examples of analyzing a sample surface, with optional method features depicted in dotted lines. At 501, the method provides for acquiring a first image 511 of the sample surface generated using a first image modality and acquiring a second image 521 of the sample surface generated using a second image modality. FIG. 6 schematically illustrates examples of the first image 511 and the second image 521. The first image modality is different from the second image modality. For example, the first image 511 may have been acquired with a different detector than the second image 521. Furthermore, the first image 511 may have been acquired with the same detector but using different detector settings than the second image 521. In some examples, the first image 511 and the second image 521 may be aligned with one another. The first image 511 and / or the second image 521 may be retrieved from data storage. For example, the first image 511 and / or the second image 521 may be obtained from memory 122 of processing device 120. Obtaining the first image 511 and / or the second image 521 may also include acquiring the first image 511 and / or the second image 521 using an imaging device. For example, obtaining the first image 511 using the first image modality and / or obtaining the second image 521 using the second image modality includes performing scanning electron microscopy, in particular multi-beam scanning electron microscopy 110. This may include using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered detector, and an X-ray detector.

[0034] Optionally, segmentation 502 of the first image 511 and the second image 521 may be performed to obtain a first label 512 of the first image 511 and a second label 522 of the second image 521. In some scenarios, machine learning techniques are utilized for segmenting the first image 511 and the second image 521. In other scenarios, it may be provided that standard image processing techniques are used to perform the segmentation of the first image 511 and the second image 521.

[0035] A third image 531 may be generated by performing a nonlinear fusion of the first image 511 and the second image 521. The nonlinear fusion of the first image 511 and the second image 521 may include setting the value of each pixel of the third image 531 to the maximum of the value of the corresponding pixel of the first image 511 and the value of the corresponding pixel of the second image 512. The nonlinear fusion of the first image 511 and the second image 521 may also include setting the value of each pixel of the third image 531 to the multiplied value of the value of the corresponding pixel of the first image 511 and the value of the corresponding pixel of the second image 512. In some examples, prior to performing the nonlinear fusion, it may be specified to assign different weights to the value of the pixel of the first image 511 and the value of the pixel of the second image.

[0036] A segmentation 504 of the third image 531 is performed to obtain a third label 532. In some scenarios, machine learning techniques may be utilized for the segmentation, while in other scenarios it may be provided that standard image processing techniques are used to perform the segmentation.

[0037] 6, the third image 531 may contain more information that allows for better segmentation. In particular, the interfaces between different regions may be more emphasized, making segmentation easier. Thus, as a result of the segmentation, the third label 532 may be more suitable for determining parameters of the actual sample's features.

[0038] 7 and 8 show another example of analyzing a sample surface. Analyzing a sample surface begins with acquiring 701 a first image 711 of the sample surface generated using a first image modality and acquiring a second image 721 of the sample surface generated using a second image modality. Examples of the first image 711 and second image 721 are shown for illustrative purposes in FIG. 8.

[0039] The first image modality is different from the second image modality. The first image 711 may be acquired with a different detector than the second image 721. The first image 711 and the second image 721 may be acquired with the same detector but with different detector settings. Optionally, the first image 711 and the second image 721 may be registered with respect to each other. The first image 711 and / or the second image 721 may be retrieved from data storage. For example, the first image 711 and / or the second image 721 may be retrieved from memory 122 of the processing device 120.

[0040] Acquiring the first image 711 and / or the second image 721 may also include obtaining the first image 711 and / or the second image 721 using an imaging device. For example, acquiring the first image 711 using a first image modality and / or acquiring the second image 721 using a second image modality includes performing scanning electron microscopy, particularly multi-beam scanning electron microscopy 110. This may include using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered secondary electron (BSE) detector, an external backscattered detector, and an X-ray detector.

[0041] At 702, segmentation of the first image 711 and segmentation of the second image 721 may be performed to obtain a first label 712 of the first image 711 and a second label 722 of the second image 721. Machine learning techniques may be utilized for segmenting the first image 711 and the second image 721. However, the segmentation of the first image 711 and the second image 721 may also be performed using standard image processing techniques.

[0042] A third label 732 is generated at 703 from the first label 712 and the second label 722. The first label 712 and the second label 722 may be fused or combined to obtain the third label. For example, the processing device may identify that an interface 712-2 between regions identified by two first labels 712 corresponds to an interface 722-2 between regions identified by two second labels 722. A slight difference between the location of the detected interface 712-2 and the interface 722-2 may be used to improve the segmentation of the first image 711 and the segmentation of the second image 712. Furthermore, the processing device may determine that interface 712-1 was not detected when segmenting the second image 721, and that interface 722-3 was detected when segmenting the first image 711.

[0043] In some examples, a confidence level can be assigned to the third label 732. The confidence level can indicate a level of certainty that the third label properly identifies the detected semiconductor structure feature. In some examples, confidence levels can be assigned to the first label 712 and the second label 722. For example, the respective confidence levels can be assigned by the machine learning logic used to obtain the first label 712 and the second label 722. The confidence level for the third label 732 can be a multiplication of the individual confidence levels. In some examples, there is a transition region where the segmentation of the first image 711 and the segmentation of the second image 721 behave differently, and this difference in behavior can result in confusing third labels that can be assigned to known third labels with low confidence levels.

[0044] Generating a third label 732 associated with the first image 711 and the second image 721 by fusing the first label 712 and the second label 722 may include performing a logical operation on the corresponding pixel of the first label 712 and the corresponding pixel of the second label 722, for each pixel.

[0045] 9 and 10 illustrate a further method for analyzing a sample surface. At 901, a first image 911 of the sample surface generated using a first image modality and a second image 921 of the sample surface generated using a second image modality are acquired. Figure 9 shows examples of the first image 911 and the second image 921.

[0046] The first image modality and the second image modality are different. The first image 911 may be acquired with a different detector than the second image 921. The first image 911 and the second image 921 may be acquired with the same detector but with different detector settings. In some examples, the first image 911 and the second image 921 may be registered with respect to each other. The first image 911 and / or the second image 921 may be retrieved from data storage. For example, the first image 911 and / or the second image 921 may be retrieved from memory 122 of the processing device 120.

[0047] Acquiring the first image 911 and / or the second image 921 may also include obtaining the first image 911 and / or the second image 921 using an imaging device. For example, acquiring the first image 911 using a first image modality and / or acquiring the second image 921 using a second image modality includes performing scanning electron microscopy, in particular multi-beam scanning electron microscopy 110. This may include using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered secondary electron (BSE) detector, an external backscattered detector, and an X-ray detector.

[0048] Instead of separately segmenting the first image 911 to obtain the first label, segmenting the second image 921 to obtain the second label, and then fusing the first and second labels to obtain the third label, the first image 911 and the second image 912 can be processed together in trained machine learning logic to obtain the third label 932. The trained machine learning logic can be executed by a processing device.

[0049] Although examples have been described herein with a first image generated using a first image modality and a second image generated using a second image modality, in some scenarios, three or more different image modalities may be used to further improve analysis of the sample surface.

[0050] Regardless of the method used, the third label can be used to determine parameters of the sample surface features. For semiconductor structures, the third label can also indicate the material of a particular region. For example, the third label can indicate the chemical composition of the corresponding region. In other examples, the third label can indicate various solid state modifications (e.g., polycrystalline, monocrystalline, crystal orientation, polymorphism, crystallographic variation).

[0051] The third label may be used to determine characteristics and / or geometric properties of the region, and in particular, the third label allows for comparison of the fabricated semiconductor structure with the desired semiconductor structure.

[0052] According to several examples, the sample surface analyzed according to one of the above methods may be the sample surface of a semiconductor structure or the surface of an exposure mask for manufacturing a semiconductor structure.

[0053] In some examples of the method, identifying a feature of the semiconductor structure based on at least the third label may be defined. The feature may include at least one of a polygon, a rectangle, a triangle, an ellipse, a circle, and a ring. In some examples, identifying at least one geometric characteristic of the feature of the semiconductor structure may be defined. The geometric characteristic may include at least one of a thickness of the feature of the semiconductor structure, a position of the feature of the semiconductor structure, a diameter of the feature of the semiconductor structure, a center of the feature of the semiconductor structure, and an eccentricity of the feature of the semiconductor structure.

[0054] Based on the analyzed sample surface of the semiconductor structure, deviations of the fabricated semiconductor structure from the desired semiconductor structure can be identified.

[0055] 11 illustrates a method for training machine learning logic for performing semiconductor metrology by analyzing a sample surface. At 1101, the method provides for obtaining a training set including a first training image 1111 of a sample surface generated using a first image modality and a second training image 1121 of the sample surface generated using a second image modality.

[0056] For each one of the training sets, a third annotation 1133 is obtained (box 1102). Annotating may refer to manually assigning a label. In particular, annotating may refer to adding specialized knowledge. Annotating may refer to manually identifying a semiconductor structure. In some examples, the number of values ​​of the third label that exist may be finite. For example, the number of features that make up the semiconductor structure that exist may be limited. For example, the number of materials that make up the semiconductor structure that exist may be limited. The features that make up the semiconductor structure may be known to the person who assigns the third annotation.

[0057] The first and second sets of training images are processed in the machine learning logic 1120 to obtain a third label 1132 for each set of first training images 1111 and second training images 1121 from the machine learning logic 1120.

[0058] At 1104 , training 1104 of the machine learning logic 1120 is performed by updating parameter values ​​of the machine learning logic 1120 based on a comparison of the third label 1132 and the third annotation 1133 .

[0059] Obtaining 1102 a third annotation 1133 for each one of the training sets may include obtaining 1105 a first label 1113 for a first training image 1111 and a second label 1123 for a second training image 1121 for each training set, and performing 1106 a fusion and annotating operation on the first label and the second label 1123 to obtain the third annotation 1133.

[0060] The first label 1113 may be a first annotation 1113, and the second label 1123 may be a second annotation 1123. In this case, the first label 1113 and the second label 1123 may be added manually.

[0061] However, it is also contemplated that the first label 1112 and the second label 1122 may be generated automatically by processing the first training image 1111 and the second training image 1121, as shown in Figure 12. For example, trained machine learning logic may be used for this purpose.

[0062] 13 illustrates a further method for training machine learning logic for performing semiconductor metrology by analyzing a specimen surface. The method includes acquiring 1301 training sets, each of which includes a first training image 1311 of the specimen surface generated using a first image modality and a second training image 1321 of the specimen surface generated using a second image modality. For each training set, a third annotation 1333 is acquired.

[0063] Conventionally, a fusion (1305), particularly a nonlinear fusion, of the first training image 1311 and the second training image 1321 is performed to obtain a third training image 1331. The nonlinear fusion of the first training image 1311 and the second training image 1321 may be performed using the methods described above for the nonlinear fusion of the first image and the second image. Annotation (1306) of the third training image 1331 may then be performed to obtain third annotations 1333.

[0064] At 1303, a third label 1332 may be obtained from the machine learning logic 1320 for each set of the first training images 1311 and the second training images 1321, and the machine learning logic 1320 may be trained by updating parameter values ​​of the machine learning logic 1320 based on a comparison of the third label and the third annotation.

[0065] While the present invention has been shown and described with reference to specific preferred embodiments, equivalents and modifications will occur to those skilled in the art upon reading and understanding this specification. The present invention includes all such equivalents and modifications, and is limited only by the scope of the appended claims.

Claims

1. - acquiring (701) a first image (711) produced using a first image modality; - acquiring (701) a second image (721) produced using a second image modality; generating (711) a first label (712) by segmenting said first image (711); generating (711) a second label (722) by segmenting said second image (721); generating a third label (732) associated with said first image (711) and said second image (721) by fusing said first label (712) and said second label (722), A method for semiconductor metrology by analyzing the surface of a sample.

2. generating a third label (732) associated with the first image (711) and the second image (721) by fusing the first label (712) and the second label (722) includes: - Identifying the corresponding first label (712) and second label (722).

10. A method for performing semiconductor metrology by analyzing a sample surface according to claim 1, comprising:

3. generating a third label (732) associated with the first image (711) and the second image (721) by fusing the first label (712) and the second label (722) includes: - assigning a confidence level to said third label (732); 3. A method for semiconductor metrology by analyzing a sample surface according to claim 1, comprising:

4. Generating a third label (732) associated with the first image (711) and the second image (721) by fusing the first label (712) and the second label (722) includes performing a pixel-by-pixel logical operation on corresponding pixels of the first label (712) and corresponding pixels of the second label (722). A method for semiconductor metrology by analyzing the surface of a sample according to any one of claims 1 to 3, comprising:

5. - acquiring (901) a first image (911) produced using a first image modality; - acquiring (901) a second image (911) produced using a second image modality; generating (902) a third label (932) associated with said first image (911) and said second image (921) by processing said first image (911) and said second image (921) with a trained machine learning logic, in particular with a machine learning logic trained using a method according to any one of claims 18 to 21; 1. A method for performing semiconductor metrology by analyzing a sample surface, comprising:

6. 1. A method for performing semiconductor metrology by analyzing a sample surface, comprising: - acquiring (501) a first image (511) of the surface of said sample produced using a first image modality; - acquiring (501) a second image (521) of the sample surface produced using a second image modality; generating (503) a third image (531) by performing a non-linear fusion of said first image (511) and said second image (521); generating (504) a third label (532) associated with said sample surface by segmenting said third image (531); A method comprising:

7. Performing a nonlinear fusion (503) of the first image (511) and the second image (521) includes setting a pixel value of the third image (531) to the maximum of the value of the corresponding pixel of the first image (511) and the value of the corresponding pixel of the second image (521).

7. A method for performing semiconductor metrology by analyzing a sample surface according to claim 6, comprising:

8. Performing a nonlinear fusion (503) of the first image (511) and the second image (521) includes setting a pixel value of the third image (531) to a multiplication value of a corresponding pixel value of the first image (511) and a corresponding pixel value of the second image (521).

7. A method for performing semiconductor metrology by analyzing a sample surface according to claim 6, comprising:

9. Performing a nonlinear blending (503) of the first image (511) and the second image (521) includes setting a value of a pixel of the third image (531) to a division value of a value of a corresponding pixel of the first image (511) and a non-zero value of a corresponding pixel of the second image (521).

7. A method for performing semiconductor metrology by analyzing a sample surface according to claim 6, comprising:

10. assigning weights to the pixel values ​​of said first image (511) and / or to the pixel values ​​of said second image (521); 10. A method for performing semiconductor metrology by analyzing a sample surface according to claim 6, further comprising:

11. the sample surface is a sample surface of a semiconductor structure or a surface of an exposure mask for manufacturing a semiconductor structure; A method for semiconductor metrology by analyzing the surface of a sample according to any one of claims 1 to 10.

12. - identifying a characteristic of said semiconductor structure based on at least said third label; 12. The method for performing semiconductor metrology by analyzing a sample surface of claim 11, further comprising:

13. The features are: - Polygon, - rectangle, - triangle, - ellipse, - circle, - ring, 13. A method for semiconductor metrology by analyzing a sample surface according to claim 12.

14. - identifying at least one geometrical characteristic of said feature of said semiconductor structure; 14. A method for semiconductor metrology by analyzing a sample surface according to claim 12 or 13, further comprising:

15. The geometric characteristics are: - the thickness of said feature of said semiconductor structure, - the location of said features of said semiconductor structure, - the diameter of said feature of said semiconductor structure, the center of said feature of said semiconductor structure, - eccentricity of said features of said semiconductor structure, 15. A method for semiconductor metrology by analyzing a sample surface according to claim 14.

16. - identifying differences between the manufactured semiconductor structure and the desired semiconductor structure based on the sample surface of said semiconductor structure; 16. A method for semiconductor metrology by analyzing a sample surface according to any one of claims 12 to 15, further comprising:

17. acquiring (701; 801; 901) the first image (511; 711; 911) using the first image modality and / or acquiring (521; 721; 921) the second image (521; 721; 921) using the second image modality, - in-lens secondary electron detector, - an in-lens backscattered secondary electron detector; - an external secondary electron detector, - external backscatter detector, - external backscattered secondary electron detector, - X-ray detector, to perform scanning electron microscopy, in particular multi-beam scanning electron microscopy. A method for semiconductor metrology by analyzing the surface of a sample according to any one of claims 1 to 16, comprising:

18. 1. A method for training machine learning logic for semiconductor metrology by analyzing a sample surface, comprising: - obtaining a training set (1101; 1301) each comprising a first training image (1111; 1311) of a sample surface generated using a first image modality and a second training image (1121; 1321) of said sample surface generated using a second image modality; obtaining (1102; 1302) a third annotation (1133; 1333) for each of said training sets; processing (1103; 1303) said set of first training images (1111; 1311) and second training images (1121; 1321) in a machine learning logic (1120; 1320); obtaining (1103; 1303) a third label (1132; 1332) for each set of first training images (1111; 1311) and second training images (1121; 1321) from said machine learning logic (1120; 1320); training (1104; 1304) said machine learning logic (1120; 1320) by updating parameter values ​​of said machine learning logic (1120; 1320) based on a comparison of said third label (1132; 1332) and said third annotation (1133; 1333); A method comprising:

19. Obtaining (1102) a third annotation (1133) for each one of the training sets includes: - obtaining (1105) for each training set a first label (1113) for said first training image (1111) and a second label (1123) for said second training image (1121); - obtaining said third annotation (1133) by performing a fusion and annotating operation (1106) on said first label (1113) and said second label (1123); 20. A method for training machine learning logic for semiconductor metrology by analyzing a sample surface according to claim 18, comprising:

20. the first label (1113) is a first annotation (1113), The second label (1123) is a second annotation (1123).

20. A method for training machine learning logic for semiconductor metrology by analyzing a sample surface according to claim 19.

21. Obtaining 1302 a third annotation 1331 for each of the training sets includes: performing a fusion (1305), in particular a non-linear fusion, of said first training image (1311) and said second training image (1321) to obtain a third training image (1331); annotating (1306) the third training image (1331) to obtain the third annotation (1333); 20. A method for training machine learning logic for semiconductor metrology by analyzing a sample surface according to claim 18, comprising:

22. A processing device (120) comprising a processor (121) and a memory (122), the processor (121) configured to load program code from the memory (122) and execute the program code, the processor (121) configured to perform the method of any one of claims 1 to 21 when executing the program code.

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