Creating dense defect probability maps for use in computer-guided inspection machine learning models
A defect probability map generated from stacked wafer data enhances CGI models' accuracy by providing denser input, addressing sparse metrology issues and improving defect detection in IC manufacturing.
Patent Information
- Application Number
- JP2025524579
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-11-11
- Filing Date
- 2023-10-17
- Publication Date
- 2025-12-16
AI Technical Summary
Current computer-guided inspection (CGI) processes in integrated circuit (IC) manufacturing face challenges in accuracy and yield due to sparse metrology data, leading to errors in defect detection, as they rely on a limited number of data points for training machine learning models.
A defect probability map is generated by stacking defect maps from multiple wafers, providing denser data input to CGI models, which updates the model with feedback loops using inspection results, improving defect detection accuracy by incorporating more detailed historical data.
The method enhances the accuracy of CGI models by utilizing denser defect data, leading to improved defect detection and increased yield in IC manufacturing by reducing errors associated with sparse metrology data.
Smart Images

Figure 2025540579000001_ABST
Abstract
Description
[Technical Field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to U.S. patent application Ser. No. 63 / 383,456, filed Nov. 11, 2022, the entire contents of which are incorporated herein by reference.
[0002] FIELD OF THE INVENTION
[0002] Embodiments described herein relate to computer-guided inspection, and more particularly to the creation and use of defect probability maps in computer-guided inspection machine learning models. [Background technology]
[0003]
[0003] In the integrated circuit (IC) manufacturing process, unfinished or completed circuit components are inspected to ensure they are manufactured according to the design and are free of defects. Inspection systems using optical microscopes or charged particle (e.g., electron) beam microscopes, such as scanning electron microscopes (SEMs), can be employed. As the physical size of IC components continues to decrease, the accuracy and yield of defect detection become increasingly important. A variety of metrology tools have been developed and are used to check whether ICs are manufactured correctly. To improve defect inspection performance, computational guided inspection (CGI) machine learning models can be used to assist the tool by indicating areas of the wafer to inspect. Summary of the Invention
[0004]
[0004] The embodiments described herein disclose a particle beam inspection system, and more particularly, an inspection system using multiple charged particle beams.
[0005] Some embodiments provide an apparatus for training a machine learning model for inspecting wafers. The apparatus may include a memory that stores a set of instructions and at least one processor, where the at least one processor is configured to execute the set of instructions to cause the apparatus to: input wafer characteristic data for an Nth wafer into the machine learning model, where N is an integer; generate a defect probability map based on the input data for the Nth wafer; and input wafer characteristic data for an N+1th wafer into the machine learning model and input the defect probability maps generated for 1 to N wafers into the machine learning model at predetermined intervals. For example, the defect probability map is generated based on 1 to Nth wafer defect data (e.g., accumulated Nth wafer defect data). According to aspects, the probability map primarily relates to N+1, N+m wafers. After accumulating N wafers, a defect probability map is generated, and the defect probability map will provide benefits for wafers after the Nth wafer.
[0006]
[0006] Other advantages of the embodiments of the present disclosure will become apparent from the following description taken in conjunction with the accompanying drawings, in which, by way of example, specific embodiments of the invention are set forth. [Brief explanation of the drawings]
[0007]
[0007] The above and other aspects of the present disclosure will become apparent from the following description of illustrative embodiments considered in conjunction with the accompanying drawings.
[0008] [Figure 1]
[0008] FIG. 1 is a schematic diagram illustrating an example of a charged particle beam inspection system in accordance with an embodiment of the present disclosure. [Figure 2]
[0009] 2 is a schematic diagram illustrating an example of a multi-beam tool that may be part of the example charged particle beam inspection system of FIG. 1, in accordance with an embodiment of the present disclosure. [Figure 3]
[0010] FIG. 1 is a flow diagram illustrating an example of a process for using computer-guided inspection (CGI) historical data as input for training a CGI machine learning model, consistent with embodiments of the present disclosure. [Figure 4]
[0011] 1 is a flowchart illustrating an example method for creating and using a defect probability map to predict wafer areas to be scanned, consistent with embodiments of the present disclosure. [Figure 5]
[0012] FIG. 1 is a flow diagram illustrating an example process for creating a defect probability map using process window metrology consistent with an embodiment of the present disclosure. [Figure 6]
[0013] 10 is a flowchart illustrating another example method for creating and using a defect probability map to predict a wafer area to be scanned, consistent with an embodiment of the present disclosure. [Figure 7]
[0014] 1 is a flowchart illustrating an example of a method for a wafer defect scanning process consistent with an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0009]
[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] Exemplary embodiments, examples of which are illustrated in the accompanying drawings, are described in detail below. In the following description, reference will be made to the accompanying drawings, in which identical numbers in different drawings represent the same or similar elements unless otherwise specified. The implementations described in the following description of exemplary embodiments do not represent all implementations. Rather, the implementations are merely examples of apparatus and methods consistent with aspects related to the disclosed embodiments as set forth in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the present disclosure is not limited thereto. Other types of charged particle beams (e.g., including protons, ions, muons, or any other electrically charged particles) can be similarly applied. Furthermore, other imaging systems, such as optical imaging, proton detection, x-ray detection, ion detection, etc., may be used.
[0010]
[0016] Electronic devices are constructed from circuits formed on a piece of semiconductor material called a substrate. Semiconductor materials can include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium. Many circuits can be formed on the same piece of silicon, and these circuits are called integrated circuits, or ICs. The size of these circuits has been dramatically reduced to allow more circuits to be integrated onto the substrate. For example, the IC chip in a smartphone can be about the size of a thumbnail, yet still contain over 2 billion transistors, each of which can be less than 1 / 1000 the size of a human hair.
[0011]
[0017] The fabrication of these ICs, which have very small structures or components, is a complex, time-consuming, and costly process, often involving hundreds of individual steps. An error in even one step can cause defects in the finished IC, rendering it useless. Therefore, one goal of the manufacturing process is to avoid such defects and maximize the number of functional ICs produced in the process, thereby increasing the overall yield of the process.
[0012]
[0018] One element of improving yield is monitoring the chip manufacturing process to ensure that the process is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages in their formation. Inspection can be performed using a scanning charged particle microscope (SCPM). For example, an SCPM can be a scanning electron microscope (SEM). An SCPM can be used to image these very small structures, effectively taking a "picture" of the structures on the wafer. The images can be used to determine whether the structures were properly formed in the correct locations. If the structures are defective, the process can be adjusted to make the defect less likely to recur.
[0013]
[0019] As the physical size of IC components continues to shrink, accuracy and yield in defect detection become increasingly important. Metrology tools can be used to identify the number of defects present on each wafer at various levels of detail, such as the die level, care area, or image patch level, to determine whether the IC is manufacturing correctly.
[0014]
[0020] Current computer-guided inspection (CGI) processes guide inspection tools to locations on wafers where defects are more likely to occur. CGI machine learning models can be built and used to output sampling locations on wafers, allowing the inspection tool to navigate to and inspect those locations more efficiently than if the inspection tool were to inspect wafer locations based on experience (e.g., the history of past defects detected during scanning). The CGI process improves inspection tool efficiency by increasing the accuracy of detecting defects on wafers, with a higher defect detection capture rate than baseline. Machine learning-based CGI models receive input from various data sources, such as wafer characterization data (which may include scanner data, metrology data, and process data), and train the model with inspection results. The accuracy of the model depends on the quality of the data. In high-volume manufacturing environments, metrology data (e.g., measured by a critical dimension scanning electron microscope (CD-SEM)) samples a small number of data points on the wafer (e.g., 10–20 data points), which can introduce errors when attempting to fit a wafer map from the error.
[0015]
[0021] Embodiments of the present disclosure can provide a defect probability map that can be used as input to a CGI model and help improve the accuracy of the CGI model. According to some embodiments of the present disclosure, several wafers are scanned, several defects on each wafer are identified, and a defect map is created for each wafer. The defect maps for each wafer are stacked to form the defect probability map. In some embodiments, providing the defect probability map along with wafer characteristic data, such as scanner data, metrology data, and process data, allows the CGI model to be trained with more data points, resulting in a more accurate CGI model and more accurate inspection results for subsequent wafers that are inspected.
[0016]
[0022] The relative dimensions of components in the drawings may be exaggerated for clarity. In the following description of the drawings, the same or similar reference symbols refer to the same or similar components or entities, and only the differences with respect to individual embodiments are discussed. As used herein, the word "or" encompasses all possible combinations unless otherwise stated, unless it is infeasible. For example, if a component is described as being able to include A or B, the component can include A, or B, or A and B, unless otherwise stated, or unless it is infeasible. As a second example, if a component is described as being able to include A, B, or C, the component can include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C, unless otherwise stated, or unless it is infeasible.
[0017]
[0023] FIG. 1 illustrates an example of an electron beam inspection (EBI) system 100 in accordance with an embodiment of the present disclosure. The EBI system 100 can be used for imaging. As shown in FIG. 1, the EBI system 100 includes a main chamber 101, a load / lock chamber 102, a beam tool 104, and an equipment front-end module (EFEM) 106. The beam tool 104 is located within the main chamber 101. The EFEM 106 can include a first load port 106a and a second load port 106b. The EFEM 106 may include additional load ports. The first load port 106a and the second load port 106b receive wafer front-opening unified pods (FOUPs) containing wafers (e.g., semiconductor wafers or wafers made of other materials) or samples to be inspected (wafers and samples may be used interchangeably). A "lot" refers to multiple wafers that can be loaded as a batch for processing.
[0018]
[0024] One or more robot arms (not shown) in the EFEM 106 may transfer the wafer to the load / lock chamber 102. The load / lock chamber 102 is connected to a load / lock vacuum pumping system (not shown) that removes gas molecules from the load / lock chamber 102 to reach a first pressure that is less than atmospheric pressure. After reaching the first pressure, one or more robot arms (not shown) may transfer the wafer from the load / lock chamber 102 to the main chamber 101. The main chamber 101 is connected to a main chamber vacuum pumping system (not shown) that removes gas molecules from the main chamber 101 to reach a second pressure that is less than the first pressure. After reaching the second pressure, the wafer is subjected to inspection by the beam tool 104. The beam tool 104 may be a single beam system or a multi-beam system.
[0019]
[0025] The controller 109 is electronically connected to the beam tool 104. The controller 109 may be a computer configured to perform various controls of the EBI system 100. Although the controller 109 is illustrated in Figure 1 as being external to the structure including the main chamber 101, the load / lock chamber 102, and the EFEM 106, it should be understood that the controller 109 may be part of that structure.
[0020]
[0026] In some embodiments, the controller 109 may include one or more processors (not shown). A processor may be a general-purpose or specialized electronic device capable of manipulating or processing information. For example, a processor may include any number of central processing units (or "CPUs"), graphics processing units (or "GPUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general purpose array logic (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), systems-on-chips (SoCs), application-specific integrated circuits (ASICs), and any combination of any type of circuitry capable of processing data. A processor may also be a virtual processor, including one or more processors distributed across multiple machines or devices connected via a network.
[0021]
[0027] In some embodiments, the controller 109 may further include one or more memories (not shown). The memories may be general-purpose or specialized electronic devices capable of storing code and data accessible by a processor (e.g., via a bus). For example, the memories may include any number of random access memories (RAMs), read-only memories (ROMs), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, or any combination of any type of storage device. The code and data may include an operating system (OS) and one or more application programs ("apps") for specific tasks. The memory may also be a virtual memory, including one or more memories distributed across multiple machines or devices connected via a network.
[0022]
[0028] FIG. 2 shows a schematic diagram of an example multi-beam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 that may be configured for use in EBI system 100 (FIG. 1) in accordance with an embodiment of the present disclosure.
[0023]
[0029] The beam tool 104 includes a charged particle source 202, a gun aperture 204, a condenser lens 206, a primary charged particle beam 210 emitted from the charged particle source 202, a source conversion unit 212, multiple beamlets 214, 216, and 218 of the primary charged particle beam 210, a primary projection optics 220, a motorized wafer stage 280, a wafer holder 282, multiple secondary charged particle beams 236, 238, and 240, a secondary optics 242, and a charged particle detection device 244. The primary projection optics 220 may include a beam separator 222, a deflection scanning unit 226, and an objective lens 228. The charged particle detection device 244 may include detection subregions 246, 248, and 250.
[0024]
[0030] The charged particle source 202, the gun aperture 204, the condenser lens 206, the source conversion unit 212, the beam separator 222, the deflection scanning unit 226, and the objective lens 228 may be aligned with a primary optical axis 260 of the apparatus 104. The secondary optics 242 and the charged particle detection device 244 may be aligned with a secondary optical axis 252 of the apparatus 104.
[0025]
[0031] The charged particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other electrically charged particles. In some embodiments, the charged particle source 202 can be an electron source. For example, the charged particle source 202 can include a cathode, an extractor, or an anode, and primary electrons can be emitted from the cathode and extracted or accelerated to form a primary charged particle beam 210 (in this example, a primary electron beam) having a (virtual or real) crossover 208. For ease of explanation and to avoid ambiguity, electrons are used as an example in some of the descriptions herein. However, it should be noted that any charged particle can be used in any embodiment of the present disclosure, without being limited to electrons. The primary charged particle beam 210 can be visualized as being emitted from the crossover 208. The gun aperture 204 can block peripheral charged particles of the primary charged particle beam 210 to reduce Coulomb effect. Coulomb effects can cause an increase in the size of the probe spot.
[0026]
[0032] The source conversion unit 212 may include an array of image-forming elements and an array of beam-stop apertures. The array of image-forming elements may include an array of micro-polarizers or micro-lenses. The array of image-forming elements may form multiple parallel images (virtual or real) of the crossover 208 with the multiple beamlets 214, 216, and 218 of the primary charged particle beam 210. The array of beam-stop apertures may focus the multiple beamlets 214, 216, and 218. Although three beamlets 214, 216, and 218 are shown in FIG. 2 , embodiments of the present disclosure are not limited to this configuration. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of beamlets. In some embodiments, the first number of beamlets may range from 1 to 1000. In some embodiments, the first number of beamlets may range from 200 to 500. In an exemplary embodiment, the apparatus 104 may generate 400 beamlets.
[0027]
[0033] The condenser lens 206 can focus the primary charged particle beam 210. The currents of the beamlets 214, 216, and 218 downstream of the source conversion unit 212 can be varied by adjusting the focusing ability of the condenser lens 206 or by changing the radial size of corresponding beam stop apertures in the array of beam stop apertures. The objective lens 228 can focus the beamlets 214, 216, and 218 onto the wafer 230 for imaging to form multiple probe spots 270, 272, and 274 on the surface of the wafer 230.
[0028]
[0034] The beam separator 222 may be a Wien filter-type beam separator that generates electrostatic and magnetic dipole fields. In some embodiments, when applied, the force acting on the charged particles (e.g., electrons) of the beamlets 214, 216, and 218 by the electrostatic dipole field may be substantially equal in magnitude and opposite in direction to the force acting on the charged particles by the magnetic dipole field. Therefore, the beamlets 214, 216, and 218 may pass straight through the beam separator 222 with zero deflection angle. However, the total dispersion of the beamlets 214, 216, and 218 generated by the beam separator 222 may be non-zero. The beam separator 222 may separate secondary charged particle beams 236, 238, and 240 from the beamlets 214, 216, and 218 and direct the secondary charged particle beams 236, 238, and 240 toward the secondary optics 242.
[0029]
[0035] The deflection scanning unit 226 can deflect the beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 over the surface area of the wafer 230. In response to the beamlets 214, 216, and 218 impinging on the probe spots 270, 272, and 274, secondary charged particle beams 236, 238, and 240 can be emitted from the wafer 230. The secondary charged particle beams 236, 238, and 240 can comprise charged particles (e.g., electrons) having a distribution of energies. For example, the secondary charged particle beams 236, 238, and 240 can be secondary electron beams including secondary electrons (with energies ≦50 eV) and backscattered electrons (with energies from 50 eV to the landing energy of the beamlets 214, 216, and 218). The secondary optics 242 can focus the secondary charged particle beams 236, 238, and 240 onto detection subregions 246, 248, and 250 of the charged particle detection device 244. The detection subregions 246, 248, and 250 can be configured to detect the corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltages, currents, etc.) that are used to reconstruct SCPM images of structures on or below the surface area of the wafer 230.
[0030]
[0036] The generated signals may represent the intensities of the secondary charged particle beams 236, 238, and 240 and may be provided to an image processing system 290 in communication with the charged particle detection device 244, the primary projection optics 220, and the motorized wafer stage 280. The speed of movement of the motorized wafer stage 280 may be synchronized and adjusted with respect to the beam deflection controlled by the deflection scanning unit 226 to ensure that the scanning probe spots (e.g., scanning probe spots 270, 272, and 274) properly cover the target area on the wafer 230. Such synchronization and adjustment parameters may be adjusted to accommodate various materials of the wafer 230. For example, different materials of the wafer 230 may have different resistance-capacitance characteristics that may result in different signal sensitivities to the movement of the scanning probe spots.
[0031]
[0037] The intensities of the secondary charged particle beams 236, 238, and 240 can vary depending on the external or internal structure of the wafer 230, and can indicate whether the wafer 230 contains defects. Furthermore, as described above, the beamlets 214, 216, and 218 can be projected onto different locations on the top surface of the wafer 230 or onto different aspects of the local structure of the wafer 230, generating secondary charged particle beams 236, 238, and 240 that can have different intensities. Therefore, by mapping the intensities of the secondary charged particle beams 236, 238, and 240 relative to an area of the wafer 230, the image processing system 290 can reconstruct an image that reflects features of the internal or external structure of the wafer 230.
[0032]
[0038] In some embodiments, the image processing system 290 may include an image acquirer 292, a storage 294, and a controller 296. The image acquirer 292 may comprise one or more processors. For example, the image acquirer 292 may be a computer, a server, a mainframe host, a terminal, a personal computer, any type of mobile computing device, etc., or a combination thereof. The image acquirer 292 may be communicatively coupled to the charged particle detection device 244 of the beam tool 104 via a medium such as an electrical conductor, a fiber optic cable, a portable storage medium, IR, Bluetooth, the Internet, a wireless network, a radio, or a combination thereof. In some embodiments, the image acquirer 292 may receive signals from the charged particle detection device 244 and construct an image. Thus, the image acquirer 292 may acquire an SCPM image of the wafer 230. The image acquirer 292 may also perform various post-processing functions, such as generating contours and superimposing indicators on the acquired image. The image acquirer 292 may be configured to perform brightness and contrast adjustments on the acquired image. In some embodiments, storage 294 may be a storage medium such as a hard disk, a flash drive, cloud storage, random access memory (RAM), or other types of computer-readable memory. Storage 294 may be coupled to image acquirer 292 and used to store scanned raw image data as original images and post-processed images. Image acquirer 292 and storage 294 may be connected to controller 296. In some embodiments, image acquirer 292, storage 294, and controller 296 may be integrated into one control unit.
[0033]
[0039] In some embodiments, the image acquirer 292 can acquire one or more SCPM images of the wafer based on the imaging signal received from the charged particle detection device 244. The imaging signal can correspond to a scanning motion for performing charged particle imaging. The acquired image can be a single image including multiple imaging areas. The single image can be stored in the storage 294. The single image can be an original image that can be divided into multiple regions. Each of the multiple images can include an imaging area that includes a feature of the wafer 230. The acquired image can include multiple images of a single imaging area of the wafer 230 sampled multiple times over a time series. The multiple images can be stored in the storage 294. In some embodiments, the image processing system 290 can be configured to perform image processing steps using multiple images of the same location on the wafer 230.
[0034]
[0040] In some embodiments, image processing system 290 may include measurement circuitry (e.g., an analog-to-digital converter) to obtain a distribution of detected secondary charged particles (e.g., secondary electrons). The charged particle distribution data collected during the detection time window, combined with corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface, may be used to reconstruct an image of the wafer structure under inspection. The reconstructed image may be used to reveal various features of the internal or external structure of wafer 230, and thereby reveal any defects that may be present in the wafer.
[0035]
[0041] In some embodiments, the charged particles may be electrons. When electrons of the primary charged particle beam 210 are projected onto the surface of the wafer 230 (e.g., probe spots 270, 272, and 274), the electrons of the primary charged particle beam 210 may penetrate the surface of the wafer 230 to a predetermined depth and interact with particles of the wafer 230. Some electrons of the primary charged particle beam 210 may interact with the material of the wafer 230 elastically (e.g., in the form of elastic scattering or elastic collision) and be reflected or repelled from the surface of the wafer 230. In an elastic interaction, the total kinetic energy between the interacting objects (e.g., electrons of the primary charged particle beam 210) is conserved, but the kinetic energy between the interacting objects is not converted into other forms of energy (e.g., heat, electromagnetic energy, etc.). The reflected electrons generated from such an elastic interaction may be referred to as backscattered electrons (BSE). Some electrons of the primary charged particle beam 210 may interact with the material of the wafer 230 inelastically (e.g., through inelastic scattering or inelastic collisions). In an inelastic interaction, the total kinetic energy between the interacting bodies is not conserved, but rather some or all of the kinetic energy between the interacting bodies is converted into other forms of energy. For example, through an inelastic interaction, the kinetic energy of some electrons of the primary charged particle beam 210 may cause electronic excitations and atomic transitions in the material. Such an inelastic interaction may produce electrons that excite the surface of the wafer 230, which may be referred to as secondary electrons (SEs). The yield or emission rate of BSEs and SEs depends, among other things, on, for example, the material under inspection and the landing energy of the electrons of the primary charged particle beam 210 that land on the surface of the material. The energy of the electrons of the primary charged particle beam 210 may be imparted in part by their acceleration voltage (e.g., the acceleration voltage between the anode and cathode of the charged particle source 202 of FIG. 2). The number of BSEs and SEs may be greater than or less than (or equal to) the injected electrons of the primary charged particle beam 210 .
[0036]
[0042] Images generated by an SCPM can be used for defect inspection. For example, a generated image capturing a test device area of a wafer can be compared to a reference image capturing the same test device area. The reference image is predetermined (e.g., by simulation) and does not contain any known defects. If the difference between the generated image and the reference image exceeds an acceptable level, a potential defect can be identified. As another example, an SCPM may scan multiple areas of a wafer, each containing identically designed test device areas, and generate multiple images capturing those test device areas as manufactured. These multiple images can be compared to each other. If the difference between the multiple images exceeds an acceptable level, a potential defect can be identified.
[0037]
[0043] Current computer-guided inspection (CGI) processes guide inspection tools to locations on wafers with high defect probabilities. CGI machine learning models are built and used to output sampling locations on wafers, allowing the inspection tool to navigate to and inspect those locations more efficiently than if the inspection tool were to inspect wafer locations based on experience (e.g., the history of past defects detected at a given location during a scan). The CGI process increases inspection tool efficiency by improving the accuracy of detecting defects on wafers, with a higher defect detection capture rate than baseline. Machine learning-based CGI models receive input from various data sources, including wafer characteristic data such as scanner data, metrology data, and process data, and train the model with inspection results. The accuracy of this model depends on data quality; the higher the data quality, the more accurate the model. In high-volume manufacturing environments, metrology data (e.g., measured by a critical dimension scanning electron microscope (CD-SEM)) samples a small number of data points (e.g., 10–20 data points) on the wafer, which can introduce errors when trying to fit a wafer map from detected errors. To improve the accuracy of CGI machine learning models, more (i.e., more detailed) data points are needed.
[0038]
[0044] In conventional systems, inspection data (which is defect data) is output from the inspection tool. Conventional systems also do not provide feedback to the model to improve its accuracy. In the CGI tools and CGI machine learning models described herein, each wafer may have hundreds of scan locations, providing higher density data than conventional input data and containing direct defect information that can be used to improve the CGI machine learning model.
[0039]
[0045] In some embodiments, historical inspection data output from the inspection tool is used to generate a defect probability map that can be used to update the CGI machine learning model. Because inspection sampling is typically denser than metrology at mass production levels, the defect probability map created from the inspection results provides a denser wafer map for training the CGI machine learning model, helping to reduce accuracy impacts from the sparse metrology data that has traditionally been used to train the CGI machine learning model.
[0040]
[0046] The CGI machine learning model generates dynamic sampling on the wafer, and the inspection tool inspects locations based on the dynamic sampling on different wafers. Past inspection results contain a large amount of defect information for multiple wafers across the dynamic locations. In some embodiments, inspection history data output from the inspection tool is used to generate a defect probability map that can be used to update the CGI machine learning model. The CGI inspection results for the N+1 wafer are used to update the defect probability map. Because each CGI inspection sampling is different for each wafer, as inspection history data accumulates, defect probability wafer maps can be created at various defect aggregation levels, such as the die level, care area level, or image patch level.
[0041]
[0047] The defect probability per sampling area may be determined by dividing the number of defects captured within the sampling area by the number of sampled wafers. The sampling area may correspond to a defect aggregation level, which may be the die level, the care area, or the image patch level. The defect probability per sampling area may be expressed based on the following formula:
number
[0042]
[0048] The defect probability can be calculated by stacking the inspection results over past wafers. For each sampling area on the wafer, there are wafers without defects within that sampling area and wafers with defects within that sampling area. The defect probability for a given time frame on the inspected wafer can be calculated based on Equation (1).
[0043]
[0049] With hundreds of inspection areas across the wafer and the calculated defect probabilities, a dense defect probability wafer map can be created using a predetermined fitting algorithm, such as Zernike-based fitting or polynomial-based fitting. The defect probability map can be derived from historical data and by combining new wafer characteristic data, such as scanner data, metrology data, and process data, for the next wafer to be inspected. The defect probability map can then be used to update the CGI machine learning model, and the updated model can predict new inspection sampling for the next (N+1) wafer. After the N+1 wafer is inspected, its inspection results are provided to update the defect probability map, and the latest defect probability map for the next wafer to be inspected continues to improve the CGI machine learning model.
[0044]
[0050] FIG. 3 is a flow diagram illustrating a process 300 for using computer-guided inspection (CGI) historical data as input to train a CGI machine learning model, consistent with an embodiment of the present disclosure. A CGI machine learning model 302 is used as a guide to detect defects on multiple wafers (illustrated as 304a, 304b, and 304c). The defects detected on the individual wafers 304a-304c are combined to form a stacked defect map 306. In some embodiments, the stacked defect map 306 may be based on past CGI results for individual wafer scans. In some embodiments, the stacked defect map 306 may be based on defect data for individual wafer scans obtained by other sampling methods (e.g., sampling methods that do not use CGI) (e.g., defect data obtained from an SEM tool). In some embodiments, the stacked defect map 306 may be based on defect data for individual wafer scans obtained from a combination of multiple sources, including past CGI results and non-CGI-based inspection tools.
[0045]
[0051] The stacked defect map 306 is used to generate a defect probability map 308. The defect probability map 308 indicates the probability of defects on each region of the wafer. The defect probability map 308 is provided as one input for updating the CGI machine learning model 310. Additional data 312, including wafer characteristic data such as scanner data, metrology data, and process data, is also provided as input for updating the CGI machine learning model 310. The updated CGI machine learning model 310 is used to predict defects on the next scanned wafer 314 (which may also be referred to as the N+1 wafer). The defect detection results for the wafer 314 are used to update the defect probability map 308, which in turn updates the CGI machine learning model 310. The process 300 continues as a feedback loop for updating the CGI machine learning model 310.
[0046]
[0052] A feedback loop is used to update the CGI machine learning model 310 and the defect probability map 308. The feedback loop need not include data from each scanned wafer. For example, the feedback loop may be run periodically. As an example, the feedback loop may be run every X wafers (e.g., every 100 wafers). In another example, the feedback loop may be run every Y days (e.g., every 3 or 4 days).
[0047]
[0053] In addition to the feedback loop, the CGI machine learning model 310 and the defect probability map 308 may be monitored. If something in either the CGI machine learning model 310 or the defect probability map 308 appears to be “off” (e.g., if there is drift in the data and it deviates from the defect probability map), an update may be triggered (e.g., a KPI-triggered update). KPIs (Key Performance Indicators) may be CGI inspection results compared to ground truth, CGI sampling counts, CGI captured defect counts, machine learning model feature attribution scores, etc., and the KPIs may be used to update the CGI machine learning model 310 and the defect probability map 308.
[0048]
[0054] The process may be monitored during the creation of the defect probability map. For example, if a wafer is determined to be "bad" after inspection, the data from this "bad" wafer may be discarded and not used to update the defect probability map. For example, a wafer may be considered "bad" if it has a number of defects greater than a predetermined threshold. The threshold may be an absolute number of defects (e.g., if the number of defects on a wafer exceeds the threshold, the data for that wafer is discarded) or a percentage deviation from the average number of detected defects (e.g., if the average number of defects per wafer is typically around 100, but the N+1 wafer has more than 1000 defects, the data for the N+1 wafer is discarded).
[0049]
[0055] Defect probability map 308 is only one input to CGI machine learning model 310 and can be used to improve the accuracy of CGI machine learning model 310. Even if defect probability map 308 is not currently being updated (e.g., between periodic updates of defect probability map 308), CGI machine learning model 310 continues to monitor CGI machine learning model 310 using other data (e.g., wafer characteristic data such as scanner data, metrology data, and process data). In some embodiments, defect probability map 308 may be used as an input to CGI machine learning model 310 after defect probability map 308 contains data for a predetermined minimum number of wafers (e.g., 100 wafers).
[0050]
[0056] In some embodiments, defect probability map 308 may be displayed to a user. For example, defect probability map 308 may be displayed to a user monitoring operation of the CGI tool, such as at a monitoring station. In some embodiments, defect probability map 308 may be displayed to a user in a predetermined operational mode (e.g., debug mode) of the monitoring station. In some embodiments, defect probability map 308 may be displayed as a heat map that graphically illustrates defect probabilities in various areas of the wafer. In other embodiments, defect probability map 308 may be displayed in various formats. In some embodiments, defect probability map 308 may be hidden from a user, such as because it is intermediate data that is input to CGI machine learning model 310.
[0051]
[0057] The use of defect probability map 308 in CGI machine learning model 310 does not change how CGI machine learning model 310 operates during wafer inspection. Sampling is determined by an algorithm. For example, one algorithm may inspect wafer locations with the highest probability of a defect and skip wafer locations with a lower probability of a defect. In some embodiments, whether a wafer location is inspected may be determined by a threshold probability value of a defect being present at that location. If the probability value meets or exceeds the threshold, the wafer location is inspected. If the probability value is below the threshold, the wafer location is skipped.
[0052]
[0058] 4 is a flow diagram illustrating a method 400 for using CGI historical data as input for training a CGI machine learning model, consistent with embodiments of the present disclosure. The steps of method 400 may be performed on a computing device (e.g., controller 109 of FIG. 1) or by a system that otherwise uses such computing device (e.g., system 300 of FIG. 3). Of course, the illustrated method 400 may be modified by adjusting the order of steps or including additional steps.
[0053]
[0059] The plurality of wafers are scanned to detect defects on each of the plurality of wafers (step 402). Step 402 may be performed, for example, by a CGI-guided inspection tool (e.g., a CD-SEM) or other type of inspection or metrology tool. In some embodiments, the CGI machine learning model 302 may be used as a guide to detect defects on the plurality of wafers (e.g., wafers 304a-304c). In some embodiments, the areas scanned on each wafer may be the same, different, or overlapping. Dynamic sampling (e.g., varying at least a portion of the area scanned on each wafer) may be used to obtain a more complete scan of the entire wafer.
[0054]
[0060] A stacked defect map is created based on the defect detection results for each of the multiple scanned wafers (step 404). Step 404 may be performed, for example, by the CGI machine learning model 302 executing on the controller 109. The stacked defect map (e.g., stacked defect map 306) includes a cumulative defect map for all scanned wafers.
[0055]
[0061] A defect probability map is created based on the stacked defect map (step 406). Step 406 may be performed, for example, by a CGI machine learning model 302 running on the controller 109. The defect probability map (e.g., defect probability map 308) indicates the probability of defects on each region of the wafer. In some embodiments, if the defect probability map is displayed, it may be shown as a heat map with different colors or shading representing different defect levels in a given region of the wafer. Note that other formats of the defect probability map are possible, including formats that are visible to the user and formats that are not visible to the user.
[0056]
[0062] The defect probability map (e.g., defect probability map 308), along with wafer characteristic data such as scanner data, metrology data, and process data, are provided as inputs for updating a CGI machine learning model (step 408). The CGI machine learning model (e.g., CGI machine learning model 302) uses these inputs to update the CGI machine learning model (e.g., updated CGI machine learning model 310). Including a greater number of defect detection data points in the CGI machine learning model can increase the accuracy of defect location predictions made by the CGI machine learning model compared to conventional methods.
[0057]
[0063] The CGI machine learning model is used to predict defects on the next (N+1) wafer to be scanned (step 410). The CGI machine learning model (e.g., CGI machine learning model 302) can be used by a CGI-guided inspection tool to determine wafer locations to be inspected for defects.
[0058]
[0064] The defect probability map is updated based on the results of the defect detection performed on the N+1 wafer (step 412). In some embodiments, defect detection on the N+1 wafer can be performed by a combination of a CGI-guided inspection tool, a non-CGI-guided inspection tool, or a wafer scanning tool. The defects detected on the N+1 wafer (e.g., wafer 314) are combined with the defects previously detected on wafers 1 through N to update the stacked defect map (e.g., stacked defect map 306), update the defect probability map (e.g., defect probability map 308), and then feed back to the updated CGI machine learning model (e.g., updated CGI machine learning model 310). This feedback loop further trains the CGI machine learning model for the next wafer to be scanned.
[0059]
[0065] In some embodiments, the initial defect probability map used by the CGI machine learning model can be generated by a different tool, such as a process window metrology (PMW) tool. A process window is the domain (e.g., space) of values of processing parameters within which a pattern on a wafer is produced within specifications. In a lithography process, the process window of a pattern is based on the pattern specifications and the lithography process used to produce the pattern. The process window comprises an area within a two-dimensional focus-exposure matrix (FEM) plot. In the FEM plot, F is the focus value and E is the exposure dose. The process window can be defined as the area of the focus-exposed surface where a pattern is produced with a critical dimension (CD) within an acceptable tolerance of the target size.
[0060]
[0066] The critical dimension is the width of a feature patterned on a process layer. CD uniformity (CDU) is a measure of how uniformly a lithographic processing tool can process features with critical dimensions.
[0061]
[0067] The PWM model is created by a focus-exposure matrix (FEM) wafer. An FEM wafer is a wafer with a repeating pattern imaged onto the wafer at different focus settings and different exposure dose settings. The pattern includes several different features, the critical dimensions of which can be measured. Measuring the critical dimensions of the same feature at the same location on different wafers (e.g., by exposure at different focus settings) or at multiple locations on the same wafer can be used to generate defect data. Defects can be determined based on the critical dimension measurements of any features that fall outside of acceptable tolerances. According to various aspects, defects can also be determined by a direct defect inspection module.
[0062]
[0068] Using PWM modeling applied to critical dimension uniformity (CDU) wafers, a defect probability map can be predicted and further provided as training input data for a CGI machine learning model to improve model accuracy. Generating a defect probability map using a PWM tool is an alternative to generating an initial defect probability map. The defect probability map, along with wafer characteristic data such as scanner data, metrology data, and process data (similar to process 300 described above), is provided as input to the CGI machine learning model to update the CGI machine learning model. According to some embodiments, a PWM model is created by CD metrology on an FEM wafer such that the resulting defects on the FEM wafer are present at the associated dose / focus field / die.
[0063]
[0069] 5 is a flow diagram illustrating a process 500 for creating a defect probability map using process window metrology in accordance with an embodiment of the present disclosure. Critical dimension (CD) metrology is performed on a focus-exposure matrix (FEM) wafer (step 502). The FEM wafer includes a repeating pattern imaged on the wafer at different focus settings and different exposure dose settings. The pattern includes several different features, the critical dimensions of which may be measured. The CD metrology data from the FEM wafer is provided as input to a process window metrology (PWM) model (step 504). Defects in the FEM wafer may be determined based on CD measurements of features that fall outside acceptable tolerances for the FEM wafer.
[0064]
[0070] CD metrology is performed on a CD uniformity (CDU) wafer (step 506). The PWM model is applied to the CD metrology data from the CDU wafer (step 508) to predict defect probabilities and generate a defect probability map (step 510). The defect probability map is provided as input to update the CGI model (step 512). In some embodiments, the defect probability map generated by process 500 is provided as input to process 300 described above to provide additional data for the CGI machine learning model.
[0065]
[0071] In some embodiments, the defect probability map may be generated based on data obtained from other tools in the inspection process, including, but not limited to, electron beam inspection tools, bright field inspection tools, and dark field inspection tools.
[0066]
[0072] 6 is a flowchart illustrating a method 600 for creating and using a defect probability map to predict wafer areas to be scanned, consistent with an embodiment of the present disclosure. The steps of method 600 may be performed on a computing device (e.g., controller 109 of FIG. 1) or by a system that otherwise uses such computing device (e.g., system 500 of FIG. 5). It should be understood that the illustrated method 600 may be modified by adjusting the order of steps or including additional steps.
[0067]
[0073] Critical dimension (CD) metrology is performed on an FEM wafer (step 602). The FEM wafer contains a repeating pattern that is imaged onto the wafer at different focus and exposure dose settings. This pattern contains several different features, the critical dimensions of which can be measured. The CD metrology data from the FEM wafer is provided as input to update the PWM model (step 604). Defects in the FEM wafer can be determined based on CD measurements of features that fall outside acceptable tolerances for the FEM wafer. CD metrology is performed on a CD uniformity (CDU) wafer (step 606). The PWM model is applied to the CD metrology data from the CDU wafer to predict defect probabilities and generate a defect probability map (step 608).
[0068]
[0074] The defect probability map (e.g., defect probability map 510), along with wafer characteristic data such as scanner data, metrology data, and process data, are provided as inputs to update the CGI machine learning model (step 610). The CGI machine learning model uses these inputs to update the CGI machine learning model (e.g., updated CGI machine learning model 512). Including a greater number of defect detection data points in the CGI machine learning model can increase the accuracy of defect location predictions made by the CGI machine learning model compared to conventional methods.
[0069]
[0075] The CGI machine learning model is used to predict defects on the next (N+1) scanned wafer, step 612. The CGI machine learning model (e.g., CGI machine learning model 512) may be used by the CGI-guided inspection tool to determine wafer locations to be inspected for defects.
[0070]
[0076] The defect probability map is updated based on the results of the defect detection performed on the N+1 wafer (step 614). In some embodiments, defect detection on the N+1 wafer can be performed by a combination of a CGI-guided inspection tool, a non-CGI-guided inspection tool, or a wafer scanning tool. The defects detected on the N+1 wafer are combined with the defects previously detected on wafers 1 through N to update the stacked defect map, update the defect probability map, and then feed back to the updated CGI machine learning model. This feedback loop (steps 610-614) further trains the CGI machine learning model for the next wafer to be scanned.
[0071]
[0077] 7 is a flowchart illustrating a method 700 for a wafer defect scanning process in accordance with an embodiment of the present disclosure. The steps of method 700 may be performed on a computing device (e.g., controller 109 of FIG. 1) or by a system that otherwise uses such computing device (e.g., system 300 of FIG. 3 or system 500 of FIG. 5). Of course, the illustrated method 700 may be modified by adjusting the order of steps or including additional steps.
[0072]
[0078] It is determined whether conditions for updating the defect probability map are met (step 702). After a defect probability map is initially generated during a wafer scanning process (e.g., method 400 of FIG. 4 or method 600 of FIG. 6), the same defect probability map may be reused for a predetermined number of wafers, for a predetermined amount of time, or until triggered by one of several different triggers (e.g., a problem with the CGI machine learning model, a problem with the defect probability map, or another trigger). In some embodiments, a “problem” with the CGI machine learning model or the defect probability map may be due to variation in the data and indicate a deviation from the defect probability map. In some embodiments, this deviation will trigger an update if it is greater than a predetermined threshold.
[0073]
[0079] If the conditions for updating the defect probability map are not met (“No” branch at step 702), the current defect probability map is used together with current wafer characteristic data, such as current scanner data, current metrology data, and current process data, to update the CGI machine learning model (step 704). Even though the same defect probability map is used in the CGI machine learning model, the CGI machine learning model is updated with wafer characteristic data, such as scanner data, metrology data, and process data, for each wafer that is scanned. While the defect probability map is one input to the CGI machine learning model, other inputs to the CGI machine learning model (e.g., wafer characteristic data, such as scanner data, metrology data, and process data) may be continuously updated for each wafer that is scanned to provide feedback to the CGI machine learning model.
[0074]
[0080] If the conditions for updating the defect probability map are met (“Yes” branch in step 702), the defect probability map is updated (step 706). In some embodiments, the defect probability map is updated by scanning a predetermined number of wafers (e.g., similar to steps 402-406 of method 400 shown in FIG. 4), updating the stack defect map based on defects detected by scanning the predetermined number of wafers, and then updating the defect probability map based on the updated stack defect map. In some embodiments, the defect probability map is updated by scanning wafers for a predetermined time period, updating the stack defect map based on defects detected by scanning the wafers, and then updating the defect probability map based on the updated stack defect map. The update can be considered complete after the predetermined time period has expired. The updated defect probability map, along with current wafer characteristic data, such as current scanner data, current metrology data, and current process data, is used to update the CGI machine learning model (step 708).
[0075]
[0081] After the CGI machine learning model is updated (step 704 or step 708), the CGI machine learning model is used to predict defects on the next (N+1) scanned wafer (step 710). The CGI machine learning model may be used by a CGI-guided inspection tool to determine wafer locations to inspect for defects.
[0076]
[0082] The CGI machine learning model is updated based on the results of the defect detection performed on the N+1 wafer by using wafer characteristic data, such as scanner data, metrology data, and process data for the N+1 wafer (step 712). In some embodiments, the defect detection on the N+1 wafer can be performed by a CGI-guided inspection tool, a non-CGI-guided inspection tool, or a combination of wafer scanning tools. As described above, method 700 then returns to step 702.
[0077]
[0083] A non-transitory computer-readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 of FIG. 1 ) to perform, among other things, image inspection, image acquisition, stage positioning, beam focusing, field adjustment, beam bending, condenser lens adjustment, charged particle source operation, beam deflection, process 300, method 400, process 500, method 600, and method 700. Common forms of non-transitory medium include, for example, a floppy disk, flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a compact disk read-only memory (CD-ROM), any other optical data storage medium, any physical medium with a pattern of holes, random access memory (RAM), programmable read-only memory (PROM), and erasable programmable read-only memory (EPROM), FLASH-EPROM or any other flash memory, non-volatile random access memory (NVRAM), cache, registers, any other memory chip or cartridge, or networked versions thereof.
[0078]
[0084] The embodiments are further described using the following clauses: 1. A method of training a machine learning model for inspecting a wafer, comprising: inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; inputting wafer characteristic data for an (N+1)th wafer into a machine learning model, and inputting defect probability maps generated for wafers 1 to N into the machine learning model at predetermined intervals; A method comprising: 2. The method of clause 1, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 3. Generating defect probability maps for 1~N wafers is generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map; 2. The method according to clause 1 or 2. 4. The method of any one of clauses 1-3, wherein the predetermined interval is every X wafers, where X is an integer. 5. The method of any one of clauses 1 to 3, wherein the predetermined interval is based on a period of time. 6. The method of any one of clauses 1-5, wherein the machine learning model is a computer-guided inspection model and is used by an inspection tool to inspect the wafer. 7. The method of clause 6, wherein the inspection tool is a scanning electron microscope or an optical tool. 8. The method of any one of clauses 1-7, further comprising training a machine learning model based on the trigger condition. 9. The method of clause 8, wherein the trigger condition is based on a second predetermined interval. 10. The method of clause 9, wherein the second predetermined interval is every Y wafers, where Y is an integer. 11. The method of clause 9, wherein the second predetermined interval is based on a period of time. 12. The method of any one of clauses 1-11, further comprising training the machine learning model for an initial training period. 13. The method of clause 12, wherein the initial training period ends after a predetermined number of wafers have been inspected. 14. Training a machine learning model is performing critical dimension metrology and inspection on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. The method described in clause 12. 15. The method of any one of clauses 1-14, further comprising updating the defect probability map when an update condition is met. 16. The method of clause 15, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 17. The method of clause 15, wherein the update condition is that the time since the previous update of the defect probability map exceeds a second threshold. 18. The renewal conditions are based on triggers, as described in clause 15. 19. The method of clause 18, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 20. The method of clause 18, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold. 21. A method of using a machine learning model to inspect a wafer, comprising: training a machine learning model, wherein training the machine learning model includes: inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; inputting wafer characteristic data for an N+1 wafer into a machine learning model and inputting the defect probability maps generated for wafers 1 through N into the machine learning model; and using the machine learning model to guide the inspection tool to locations on the wafer to be inspected for defects. method. 22. The method of clause 21, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 23. The method of clause 21 or 22, wherein the machine learning model is a computer-guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting wafers. 24. Generating defect probability maps for 1~N wafers is generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map; 24. The method according to any one of clauses 21 to 23. 25. The method of any one of clauses 21 to 24, further comprising training a machine learning model based on the trigger condition. 26. The method according to clause 25, wherein the trigger condition is based on a predetermined interval. 27. The method of clause 26, wherein the predetermined interval is every Y wafers, where Y is an integer. 28. A method as set forth in clause 26, wherein the predetermined interval is based on a period of time. 29. The method of any one of clauses 21 to 28, further comprising training the machine learning model for an initial training period. 30. The method of clause 29, wherein the initial training period ends after a predetermined number of wafers have been inspected. 31. Training a machine learning model is performing critical dimension metrology on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. The method described in clause 29. 32. The method of any one of clauses 21-31, further comprising updating the defect probability map when an update condition is met. 33. The method of clause 32, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 34. The method of clause 32, wherein the update condition is that the time since the previous update of the defect probability map exceeds a second threshold. 35. The renewal conditions are based on triggers, as described in clause 32. 36. The method of clause 35, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 37. The method of clause 35, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold. 38. An apparatus for training a machine learning model for inspecting wafers, comprising: a memory for storing a set of instructions; at least one processor; The at least one processor executes a set of instructions to cause the device to: inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; inputting wafer characteristic data for an N+1th wafer into the machine learning model, and inputting defect probability maps generated for 1 to N wafers into the machine learning model at predetermined intervals. Device. 39. The apparatus of clause 38, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 40. In generating defect probability maps for 1 to N wafers, at least one processor executes a set of instructions to cause the apparatus to: generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map. 39. A device according to clause 38 or 39. 41. The apparatus of any one of clauses 38-40, wherein the predetermined interval is every X wafers, where X is an integer. 42. The device of any one of clauses 38-40, wherein the predetermined interval is based on a period of time. 43. The apparatus of any one of clauses 38-42, wherein the machine learning model is used by an inspection tool to inspect a wafer. 44. The apparatus described in clause 43, wherein the machine learning model is a computer-guided inspection mode and the inspection tool is a scanning electron microscope or an optical tool. 45. At least one processor executes a set of instructions to cause a device to: 45. The apparatus of any one of clauses 38 to 44, further configured to train a machine learning model based on the trigger condition. 46. The apparatus of clause 45, wherein the trigger condition is based on a second predetermined interval. 47. The apparatus of clause 46, wherein the second predetermined interval is every Y wafers, where Y is an integer. 48. The apparatus of clause 46, wherein the second predetermined interval is based on a period of time. 49. At least one processor executes a set of instructions to cause a device to: 49. The apparatus of any one of clauses 38 to 48, further configured to train the machine learning model over an initial training period. 50. The apparatus of clause 49, wherein the initial training period ends after a predetermined number of wafers have been inspected. 51. In training a machine learning model, at least one processor executes a set of instructions to cause the device to: performing critical dimension metrology on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; and further configured to apply the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. The device referred to in clause 49. 52. At least one processor executes a set of instructions to cause a device to: 52. The apparatus of any one of clauses 38 to 51, further configured to update the defect probability map when an update condition is met. 53. The apparatus of clause 52, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 54. The apparatus of clause 52, wherein the update condition is that the time since the last update of the defect probability map exceeds a second threshold. 55. The apparatus of clause 52, wherein the update condition is based on a trigger. 56. The apparatus of clause 55, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 57. The apparatus of clause 55, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold. 58. An apparatus for using a machine learning model to inspect a wafer, comprising: a memory for storing a set of instructions; at least one processor; The at least one processor executes a set of instructions to cause the device to: Training a machine learning model, inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; and training, including inputting wafer characteristic data for an N+1 wafer into the machine learning model and inputting the defect probability maps generated for wafers 1 through N into the machine learning model; and configuring the inspection tool to use the machine learning model to guide the inspection tool to locations on the wafer to be inspected for defects. Device. 59. The apparatus of clause 58, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 60. The apparatus of clause 58 or 59, wherein the machine learning model is a computer-guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting wafers. 61. In generating defect probability maps for 1 to N wafers, at least one processor executes a set of instructions to cause the apparatus to: generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map. 61. A device according to any one of clauses 58 to 60. 62. The apparatus of any one of clauses 58 to 61, wherein at least one processor is configured to execute a set of instructions to further cause the apparatus to train a machine learning model based on the trigger condition. 63. The apparatus of clause 62, wherein the trigger condition is based on a predetermined interval. 64. The apparatus of clause 63, wherein the predetermined interval is every Y wafers, where Y is an integer. 65. The apparatus of clause 63, wherein the predetermined interval is based on a period of time. 66. The apparatus of any one of clauses 58 to 65, wherein at least one processor is configured to execute a set of instructions to further cause the apparatus to train the machine learning model over an initial training period. 67. The apparatus of clause 66, wherein the initial training period ends after a predetermined number of wafers have been inspected. 68. In training a machine learning model, at least one processor executes a set of instructions to cause the device to: performing critical dimension metrology on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; and further configured to apply the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. The device described in clause 66. 69. The apparatus of any one of clauses 58-68, wherein the at least one processor is configured to execute a set of instructions to cause the apparatus to further update the defect probability map when an update condition is met. 70. The apparatus of clause 69, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 71. The apparatus of clause 69, wherein the update condition is that the time since the last update of the defect probability map exceeds a second threshold. 72. The apparatus of clause 69, wherein the update condition is based on a trigger. 73. The apparatus of clause 72, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 74. The apparatus of clause 72, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold. 75. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a computing device, the set of instructions causing the computing device to perform a method of training a machine learning model for inspecting wafers, the method comprising: inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; inputting wafer characteristic data for an N+1th wafer into a machine learning model, and inputting defect probability maps generated for wafers 1 through N into the machine learning model at predetermined intervals. Non-transitory computer-readable medium. 76. The non-transitory computer-readable medium of clause 75, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 77. In generating a defect probability map for 1 to N wafers, a set of instructions executable by one or more processors of a computing device may include causing the computing device to: generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map; 76. A non-transitory computer-readable medium according to clause 75 or 76. 78. The non-transitory computer-readable medium of any one of clauses 75-77, wherein the predetermined interval is every X wafers, where X is an integer. 79. The non-transitory computer-readable medium of any one of clauses 75-77, wherein the predetermined interval is based on a period of time. 80. The non-transitory computer-readable medium of any one of clauses 75-79, wherein the machine learning model is a computer-guided inspection model and is used by an inspection tool to inspect a wafer. 81. The non-transitory computer-readable medium of clause 80, wherein the inspection tool is a scanning electron microscope or an optical tool. 82. A non-transitory computer-readable medium described in any one of clauses 75 to 81, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to train a machine learning model based on the trigger condition. 83. The non-transitory computer-readable medium of clause 82, wherein the trigger condition is based on a second predetermined interval. 84. The non-transitory computer-readable medium of clause 83, wherein the second predetermined interval is every Y wafers, where Y is an integer. 85. The non-transitory computer-readable medium of clause 83, wherein the second predetermined interval is based on a period of time. 86. A non-transitory computer-readable medium according to any one of clauses 75 to 85, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to train the machine learning model for an initial training period. 87. The non-transitory computer-readable medium of clause 86, wherein the initial training period ends after a predetermined number of wafers have been inspected. 88. In training a machine learning model, a set of instructions executable by one or more processors of a computing device may include causing the computing device to: performing critical dimension metrology on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. 86. A non-transitory computer-readable medium as set forth in Clause 86. 89. A non-transitory computer-readable medium described in any one of clauses 75 to 88, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to update the defect probability map when an update condition is met. 90. The non-transitory computer-readable medium of clause 89, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 91. The non-transitory computer-readable medium of clause 89, wherein the update condition is that the time since the last update of the defect probability map exceeds a second threshold. 92. The non-transitory computer-readable medium of clause 89, wherein the update condition is based on a trigger. 93. The non-transitory computer-readable medium of clause 92, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 94. The non-transitory computer-readable medium of clause 92, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold. 95. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of a computing device, the set of instructions causing the computing device to perform a method of using a machine learning model to inspect a wafer, the method comprising: Training a machine learning model, inputting wafer characteristic data for an Nth wafer into a machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; and training, including inputting wafer characteristic data for an N+1 wafer into the machine learning model and inputting the defect probability maps generated for wafers 1 through N into the machine learning model; and using the machine learning model to guide the inspection tool to locations on the wafer to be inspected for defects. Non-transitory computer-readable medium. 96. The non-transitory computer-readable medium of clause 95, wherein the wafer characteristic data includes scanner data, metrology data, and process data. 97. The non-transitory computer-readable medium of clause 95 or 96, wherein the machine learning model is a computer-guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting wafers. 98. In generating a defect probability map for 1 to N wafers, a set of instructions executable by one or more processors of a computing device may include causing the computing device to: generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; generating a defect probability map for the 1 to N wafers based on the stacked defect map; A non-transitory computer-readable medium according to any one of clauses 95 to 97. 99. A non-transitory computer-readable medium described in any one of clauses 95 to 98, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to train a machine learning model based on the trigger condition. 100. The non-transitory computer-readable medium of clause 99, wherein the trigger condition is based on a predetermined interval. 101. The non-transitory computer-readable medium of clause 100, wherein the predetermined interval is every Y wafers, where Y is an integer. 102. The non-transitory computer-readable medium of clause 100, wherein the predetermined interval is based on a period of time. 103. A non-transitory computer-readable medium described in any one of clauses 95 to 102, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to train the machine learning model for an initial training period. 104. The non-transitory computer-readable medium of clause 103, wherein the initial training period ends after a predetermined number of wafers have been inspected. 105. In training a machine learning model, a set of instructions executable by one or more processors of a computing device may include causing the computing device to: performing critical dimension metrology on the focus-exposure matrix wafer; updating the process window metrology model with data from critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate a defect probability map. 103. A non-transitory computer-readable medium as set forth in Clause 103. 106. A non-transitory computer-readable medium described in any one of clauses 95 to 105, wherein the set of instructions executable by one or more processors of the computing device further causes the computing device to update the defect probability map when an update condition is met. 107. The non-transitory computer-readable medium of clause 106, wherein the update condition is that the number of scanned wafers exceeds a first threshold. 108. The non-transitory computer-readable medium of clause 106, wherein the update condition is that the time since the last update of the defect probability map exceeds a second threshold. 109. The non-transitory computer-readable medium of clause 106, wherein the update condition is based on a trigger. 110. The non-transitory computer-readable medium of clause 109, wherein the trigger is based on a deviation detected in the machine learning model, the deviation exceeding a third threshold. 111. The non-transitory computer-readable medium of clause 109, wherein the trigger is based on a deviation detected in the defect probability map, the deviation exceeding a fourth threshold.
[0079]
[0085] The block diagrams in the figures may illustrate the structure, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in the schematic diagrams may represent a specific arithmetic or logical operation that can be implemented using hardware, such as electrical circuits. A block may also represent a module, segment, or portion of code that includes one or more executable instructions for implementing a specific logical function. It should be understood that in some alternative implementations, the functions shown in the blocks may occur out of the order noted in the figures. For example, depending on the functionality involved, two blocks shown in succession may be executed or performed substantially simultaneously, or the two blocks may be executed in the reverse order. Some blocks may also be omitted. It should also be understood that each block of the block diagrams, and combinations of blocks, may be implemented by a special-purpose hardware-based system that performs specific functions or acts, or by a combination of special-purpose hardware and computer instructions.
[0080]
[0086] It is understood that embodiments of the present disclosure are not limited to the exact structures described above and illustrated in the accompanying drawings, and that various modifications and variations can be made without departing from the scope of the present disclosure. While the present disclosure has been described in connection with various embodiments, other embodiments will become apparent to those skilled in the art from consideration of the specification and practice of the technology disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
Claims
1. 1. An apparatus for training a machine learning model for inspecting a wafer, comprising: a memory for storing a set of instructions; at least one processor; The at least one processor executes the set of instructions to cause the device to: inputting wafer characteristic data for an Nth wafer into the machine learning model, where N is an integer; generating a defect probability map based on the input data for the Nth wafer; inputting wafer characteristic data for an N+1th wafer into the machine learning model, and inputting defect probability maps generated for 1 to N wafers into the machine learning model at predetermined intervals. Device.
2. The apparatus of claim 1 , wherein the wafer characteristic data includes scanner data, metrology data, and process data.
3. In generating the defect probability map for the 1 to N wafers, the at least one processor executes the set of instructions to cause the apparatus to: generating a defect map for each of the N wafers; combining the defect maps for each of the N wafers to generate a stacked defect map for all of the N wafers; and generating a defect probability map for the 1 to N wafers based on the stacked defect map.
10. The apparatus of claim 1.
4. 2. The apparatus of claim 1, wherein the predetermined interval is every X wafers, where X is an integer.
5. The apparatus of claim 1 , wherein the predetermined interval is based on a period of time.
6. 10. The apparatus of claim 1, wherein the machine learning model is a computer-guided inspection model and is used by an inspection tool to inspect wafers.
7. The apparatus of claim 6 , wherein the inspection tool is a scanning electron microscope or an optical tool.
8. The at least one processor executes the set of instructions to cause the device to: The apparatus of claim 1 , further configured to train the machine learning model based on a trigger condition.
9. The apparatus of claim 8 , wherein the trigger condition is based on a second predetermined interval.
10. 10. The apparatus of claim 9, wherein the second predetermined interval is every Y wafers, where Y is an integer.
11. The apparatus of claim 9 , wherein the second predetermined interval is based on a period of time.
12. The at least one processor executes the set of instructions to cause the device to: The apparatus of claim 1 , further configured to train the machine learning model over an initial training period.
13. 13. The apparatus of claim 12, wherein the initial training period ends after a predetermined number of wafers have been inspected.
14. In training the machine learning model, the at least one processor executes the set of instructions to cause the device to: performing critical dimension metrology on the focus-exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology for the focus-exposure matrix wafer; performing critical dimension metrology on the critical dimension uniformity wafer; applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict defect probabilities and generate the defect probability map.
13. The apparatus of claim 12.
15. The at least one processor executes the set of instructions to cause the device to: The apparatus of claim 1 , further configured to update the defect probability map when an update condition is met.