Display device

Abstract

To provide a display device which has a touch sensor function and is configured to improve display quality.SOLUTION: According to one embodiment, a display device includes a first lower electrode, a second lower electrode, and a third lower electrode arranged in order in a first direction in a display region that displays an image, an organic layer disposed on each of the first lower electrode, the second lower electrode, and the third lower electrode and including a light-emitting layer, an upper electrode disposed on the organic layer, and a detection electrode for detecting contact or approach of an object to the display region. An interval between the first lower electrode and the second lower electrode in the first direction is larger than an interval between the second lower electrode and the third lower electrode in the first direction, and the detection electrode extends in a second direction intersecting the first direction, includes a first segment located between the first lower electrode and the second lower electrode in a plan view, and does not include a segment between the second lower electrode and the third lower electrode.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]

[0002] In recent years, display devices that use organic light-emitting diodes (OLEDs) as display elements and have a touch sensor function that detects contact or proximity of an object to the display area have been put into practical use. There is a demand for improved display quality in these types of display devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-195677 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-207217 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-135325 [Patent Document 4] Japanese Patent Application Laid-Open No. 2009-32673 [Patent Document 5] Japanese Patent Application Laid-Open No. 2010-118191 [Patent Document 6] International Publication No. 2018 / 179308 [Patent Document 7] US Patent Application Publication No. 2022 / 0077251 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a display device that has a touch sensor function and is configured to improve display quality. [Means for solving the problem]

[0005] According to one embodiment, the display device comprises: In a display area for displaying an image, the display device comprises a first lower electrode, a second lower electrode, and a third lower electrode arranged in order in a first direction, organic layers including an emitting layer arranged on the first lower electrode, the second lower electrode, and the third lower electrode, respectively, an upper electrode arranged on the organic layer, and a detection electrode for detecting contact or approach of an object to the display area, wherein the distance along the first direction between the first lower electrode and the second lower electrode is greater than the distance along the first direction between the second lower electrode and the third lower electrode, and the detection electrode extends in a second direction intersecting the first direction, and includes a first segment located between the first lower electrode and the second lower electrode in a planar view, and does not include a segment between the second lower electrode and the third lower electrode. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device DSP. [Figure 2] FIG. 2 is a schematic plan view showing elements for realizing the touch sensor function. [Figure 3] FIG. 3 is a plan view schematically showing an example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA. [Figure 4] FIG. 4 is a schematic cross-sectional view of the display device DSP taken along the line AB in FIG. [Figure 5] FIG. 5 is a schematic cross-sectional view of the display device DSP taken along line CD in FIG. [Figure 6] FIG. 6 is a cross-sectional view for explaining another effect of the display device DSP. [Figure 7] FIG. 7 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA. [Figure 8] FIG. 8 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA. [Figure 9]FIG. 9 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA. [Figure 10] FIG. 10 is a schematic cross-sectional view of the display device DSP taken along line EF in FIG. [Figure 11] FIG. 11 is a schematic cross-sectional view of the display device DSP taken along line GH in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0007] The embodiments will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for the sake of clarity, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.

[0008] In addition, to facilitate understanding, the drawings will depict mutually orthogonal X, Y, and Z axes as necessary. The direction along the X axis will be referred to as the first direction X, the direction along the Y axis will be referred to as the second direction Y, and the direction along the Z axis will be referred to as the third direction Z. Viewing various elements parallel to the third direction Z is called a planar view. Terms referring to the relative positions of two or more components, such as "on top," "above," "between," and "opposite," include not only cases where the two or more components are in direct contact with each other, but also cases where they are separated from each other by a gap or another component. The positive direction of the Z axis will be referred to as "up" or "above."

[0009] The display device according to the embodiment is an organic electroluminescence display device having an organic light-emitting diode (OLED) as a display element, and can be installed in various electronic devices such as televisions, personal computers, in-vehicle devices, tablet terminals, smartphones, mobile phone terminals, and wearable terminals.

[0010] FIG. 1 is a diagram showing an example of the configuration of a display device DSP.

[0011] The display device DSP includes a display panel 100. The display panel 100 has a display area DA for displaying an image and a peripheral area SA around the display area DA, on an insulating substrate 10. The substrate 10 may be a glass substrate or a flexible resin substrate.

[0012] In the illustrated example, the shape of the substrate 10 in plan view is rectangular. However, the shape of the substrate 10 in plan view is not limited to rectangular, and may be other shapes such as square, circular, or elliptical.

[0013] The display area DA includes a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. Each pixel PX includes a plurality of subpixels SP that display different colors. In one example, the pixel PX includes a subpixel SP1 of a first color, a subpixel SP2 of a second color, and a subpixel SP3 of a third color. The first color, second color, and third color are different from each other. Note that the pixel PX may include subpixels SP of another color, such as white, in addition to or instead of the subpixels SP1, SP2, and SP3.

[0014] The subpixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switching elements formed of, for example, thin film transistors.

[0015] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the drive transistor 3 and the capacitor 4. In the drive transistor 3, one of the source electrode and drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0016] The configuration of the pixel circuit 1 is not limited to the example shown in the figure. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0017] The display element DE is, for example, an organic light-emitting diode (OLED) as a light-emitting element, and may be called an organic EL element.

[0018] The display device DSP further includes a terminal section T arranged in the peripheral area SA. The terminal section T includes a plurality of terminals and is electrically connected to, for example, an IC chip or a flexible circuit board for driving the display device DSP.

[0019] The display device DSP further includes a display controller CT1 for controlling image display in the display area DA, and a detection controller CT2 for implementing a touch sensor function that detects contact or approach of an object to the display area DA. The display controller CT1 and the detection controller CT2 are mounted on, for example, the flexible circuit board. As another example, the display controller CT1 and the detection controller CT2 may be mounted in the peripheral area SA.

[0020] FIG. 2 is a schematic plan view showing elements for realizing the touch sensor function.

[0021] The display device DSP includes a plurality of sensor units SG that function as electrodes for touch sensors. These sensor units SG are configured with detection electrodes, which will be described later.

[0022] In the illustrated example, 16 sensor units SG (SG1 to SG16) overlapping the display area DA are arranged in a matrix of 4 columns and 4 rows. However, the number and arrangement of the sensor units SG are not limited to this example.

[0023] The sensor units SG1 to SG16 are electrically connected to the terminal unit T via lead wires L1 to L16, respectively, arranged in the peripheral area SA. In the example shown, the lead wires L1 to L3 and L5 to L7 are arranged between the display area DA and an end E1 of the substrate 10 on the left side in the figure, and are routed to the terminal unit T. The lead wires L9 to L11 and L13 to L15 are arranged between the display area DA and an end E2 of the substrate 10 on the right side in the figure, and are routed to the terminal unit T. The lead wires L4, L8, L12, and L16 are arranged between the display area DA and the terminal unit T.

[0024] The sensor units SG6, SG7, SG10, and SG11 are surrounded by other sensor units SG. In the illustrated example, relay units R6, R7, R10, and R11 are arranged in the display area DA to enable connection between these sensor units SG6, SG7, SG10, and SG11 and lead wires L6, L7, L10, and L11.

[0025] The relay parts R6, R7, R10, and R11 electrically connect the sensor parts SG6, SG7, SG10, and SG11 to the lead wires L6, L7, L10, and L11, respectively. The relay parts R6 and R7 are located between the sensor parts SG2 and SG3. The relay parts R10 and R11 are located between the sensor parts SG14 and SG15.

[0026] The detection controller CT2 supplies drive signals at a predetermined cycle to each of the sensor units SG1 to SG16 via the lead wires L1 to L16. These drive signals charge the capacitance of the sensor units SG1 to SG16 themselves.

[0027] After supplying the drive signals, the detection controller CT2 reads detection signals (output voltages) from the sensor units SG1 to SG16 via the lead wires L1 to L16. The detection signals correspond to the amounts of charge stored in the capacitances of the sensor units SG1 to SG16 themselves, for example.

[0028] Such detection signals have different values ​​for the sensor unit SG that is in close proximity to an object such as a user's finger and the other sensor units SG among the sensor units SG1 to SG16 arranged in the XY plane (detection surface). Therefore, the detection controller CT2 can detect the position information of the object based on the detection signals of the sensor units SG.

[0029] During operation of the display device DSP, a display period for image display and a sensor period for touch detection are alternated. During the display period, a display voltage is written to the display element DE. During the sensor period, drive signals are supplied to and read from the sensor units SG1 to SG16. The display voltage written during the display period is maintained during the sensor period. It should be noted that the detection method using the sensor units SG1 to SG16 and the operation of the display device DSP are not limited to those exemplified here.

[0030] FIG. 3 is a plan view schematically showing an example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA.

[0031] Here, the description will be focused on four pixels PX1, PX2, PX3, and PX4 arranged in a matrix in the first direction X and the second direction Y in the display area DA.

[0032] The pixels PX1 and PX2 are aligned in the first direction X, and the pixels PX3 and PX4 are aligned in the first direction X. The pixels PX1 and PX3 are aligned in the second direction Y, and the pixels PX2 and PX4 are aligned in the second direction Y.

[0033] Each of the pixels PX1, PX2, PX3, and PX4 includes subpixels SP1, SP2, and SP3. In the illustrated example, the subpixels SP2 and SP3 are aligned in the second direction Y. The subpixels SP2 and SP1 are aligned in the first direction X, and the subpixels SP3 and SP1 are aligned in the first direction X.

[0034] When the subpixels SP1, SP2, and SP3 are laid out in this manner, the display area DA is formed with a column in which the subpixels SP2 and the subpixels SP3 are alternately arranged in the second direction Y, and a column in which a plurality of subpixels SP1 are arranged in the second direction Y. These columns are arranged alternately in the first direction X. Note that the layout of the subpixels SP1, SP2, and SP3 is not limited to the example shown in the figure.

[0035] An insulating layer 5 is disposed in the display area DA. The insulating layer 5 has openings AP1, AP2, and AP3 in the subpixels SP1, SP2, and SP3, respectively. The insulating layer 5 having these openings AP1, AP2, and AP3 is sometimes referred to as a rib. In the illustrated example, the areas of the openings AP1, AP2, and AP3 are different from one another. The area of ​​the opening AP1 is larger than the area of ​​the opening AP3, and the area of ​​the opening AP3 is larger than the area of ​​the opening AP2.

[0036] The subpixels SP1, SP2, and SP3 each include a display element DE1, DE2, and DE3, respectively. The display element DE includes a lower electrode, an upper electrode facing the lower electrode, and an organic layer between the lower and upper electrodes. However, in Fig. 3, only the lower electrode is shown, and the upper electrode and the organic layer are not shown. For example, the lower electrode corresponds to the anode of the display element DE, and the upper electrode corresponds to the cathode of the display element DE.

[0037] The display element DE1 includes a lower electrode LE1 that overlaps the opening AP1. The peripheral edge of the lower electrode LE1 overlaps the insulating layer 5 in a plan view. The lower electrode LE1 is electrically connected to the drive transistor 3 shown in FIG. 1 through a contact hole CH1.

[0038] The display element DE2 includes a lower electrode LE2 that overlaps with the opening AP2. The peripheral edge of the lower electrode LE2 overlaps the insulating layer 5 in a plan view. The lower electrode LE2 is electrically connected to the drive transistor 3 shown in FIG. 1 through a contact hole CH2.

[0039] The display element DE3 includes a lower electrode LE3 that overlaps with the opening AP3. The peripheral edge of the lower electrode LE3 overlaps the insulating layer 5 in a plan view. The lower electrode LE3 is electrically connected to the drive transistor 3 shown in FIG. 1 through a contact hole CH3.

[0040] The detection electrodes DT constitute the sensor unit shown in FIG. 2 and are formed in a lattice shape surrounding the pixels PX1, PX2, PX3, and PX4 in a plan view. That is, the detection electrodes DT include a plurality of segments DX1, DX2, and DX3 extending in the first direction X and a plurality of segments DY1, DY2, and DY3 extending in the second direction Y. The segments DX1, DX2, and DX3 are arranged in this order in the second direction Y and adjacent to each other. The segments DY1, DY2, and DY3 are arranged in this order in the first direction X and adjacent to each other. These segments DX1, DX2, and DX3 and segments DY1, DY2, and DY3 are connected to each other.

[0041] As described above, the touch sensor function is realized by detecting a change in capacitance of the sensor unit formed by the detection electrodes DT. Therefore, from the viewpoint of ensuring the capacitance of the detection electrodes DT, it is desirable that the detection electrodes DT be installed over as large an area as possible.

[0042] Such a detection electrode DT does not include a segment between the subpixels SP1 and SP2 and between the subpixels SP1 and SP3 in each of the pixels PX1, PX2, PX3, and PX4.

[0043] In other respects, the detection electrode DT does not include a segment between the lower electrode LE1 and the lower electrode LE2, and between the lower electrode LE1 and the lower electrode LE3 in plan view in each of the pixels PX1, PX2, PX3, and PX4.

[0044] Segment DY2 is located between pixels PX1 and PX2, between subpixel SP2 of pixel PX1 and subpixel SP1 of pixel PX2, and between subpixel SP3 of pixel PX1 and subpixel SP1 of pixel PX2. Segment DY2 is also located between pixels PX3 and PX4, between subpixel SP2 of pixel PX3 and subpixel SP1 of pixel PX4, and between subpixel SP3 of pixel PX3 and subpixel SP1 of pixel PX4.

[0045] From another perspective, segment DY2 is located approximately in the center between the lower electrode LE2 of pixel PX1 and the lower electrode LE1 of pixel PX2, and between the lower electrode LE3 of pixel PX1 and the lower electrode LE1 of pixel PX2, in a plan view. Segment DY2 is also located approximately in the center between the lower electrode LE2 of pixel PX3 and the lower electrode LE1 of pixel PX4, and between the lower electrode LE3 of pixel PX3 and the lower electrode LE1 of pixel PX4.

[0046] For example, pixel PX2 is surrounded by segments DX1 and DX2 and segments DY2 and DY3. That is, subpixel SP1 or lower electrode LE1, subpixel SP2 or lower electrode LE2, and subpixel SP3 or lower electrode LE3 are located between segments DY2 and DY3 in the first direction X. Furthermore, subpixel SP1 or lower electrode LE1, subpixel SP2 or lower electrode LE2, and subpixel SP3 or lower electrode LE3 are located between segments DX1 and DX2 in the second direction Y.

[0047] The interval WX1 along the first direction X between the lower electrode LE2 of pixel PX1 and the lower electrode LE1 of pixel PX2 is larger than the interval WX2 along the first direction between the lower electrode LE1 of pixel PX2 and the lower electrode LE2 of pixel PX2 (WX1 > WX2). That is, among the plurality of segments constituting the detection electrode DT, the segment DY extending in the second direction Y is arranged to overlap a region with a relatively large width between pixels PX adjacent in the first direction X, while it is not arranged in a region with a relatively small width in each pixel PX.

[0048] The width WX11 along the first direction X of the segment DY extending in the second direction Y is smaller than the interval WX1 (WX11 < WX1). For this reason, for example, the segment DY2 does not overlap the entire region between the lower electrode LE1 and the lower electrode LE2 in plan view.

[0049] Focusing on the segment DX2, the segment DX2 overlaps the lower electrode LE1 of each of the pixels PX3 and PX4 in plan view, is located between the lower electrode LE2 of pixel PX1 and the lower electrode LE3 of pixel PX3, and is also located between the lower electrode LE2 of pixel PX2 and the lower electrode LE3 of pixel PX4.

[0050] Also, the segment DX2 overlaps the contact hole CH1 in plan view and is located between the contact hole CH2 and the contact hole CH3. Thus, the contact holes CH1, CH2, and CH3 are concentrated in the vicinity of the segment DX extending linearly along the first direction X. Also, among various wirings for driving the pixel circuit 1 shown in FIG. 1, wirings such as the scanning line GL extending in the first direction X are concentrated in the vicinity of the segment DX.

[0051] Note that the segment DY extending linearly along the second direction Y does not overlap any of the lower electrodes. [[ID=!17]]

[0052] FIG. 4 is a schematic cross-sectional view of the display device DSP along the line A - B in FIG. 3.

[0053] The circuit layer 11 is disposed on the substrate 10. The circuit layer 11 includes various circuits such as the pixel circuit 1 shown in Fig. 1, various wirings such as the scanning line GL, the signal line SL, and the power supply line PL, and various insulating layers.

[0054] The insulating layer 12 is disposed on the circuit layer 11. The insulating layer 12 is, for example, an organic insulating layer that flattens the unevenness caused by the circuit layer 11.

[0055] The lower electrode LE1 of the subpixel SP1, the lower electrode LE2 of the subpixel SP2, and the lower electrode LE3 of the subpixel SP3 are disposed on the insulating layer 12 and are spaced apart from each other.

[0056] The insulating layer 5 is an inorganic insulating layer or an organic insulating layer, and is disposed on the insulating layer 12 and the lower electrodes LE1, LE2, and LE3. An opening AP1 in the insulating layer 5 overlaps the lower electrode LE1, an opening AP2 overlaps the lower electrode LE2, and an opening AP3 overlaps the lower electrode LE3. The peripheries of the lower electrodes LE1, LE2, and LE3 are covered with the insulating layer 5. The contact holes CH1, CH2, and CH3 shown in FIG. 3 are formed in the insulating layer 12 but are omitted here.

[0057] The organic layer OR1 is in contact with the lower electrode LE1 through the opening AP1, covers the lower electrode LE1 exposed from the opening AP1, and has its peripheral edge located on the insulating layer 5. The upper electrode UE1 covers the organic layer OR1.

[0058] The organic layer OR2 is in contact with the lower electrode LE2 through the opening AP2, covers the lower electrode LE2 exposed from the opening AP2, and has its peripheral edge located on the insulating layer 5. The upper electrode UE2 covers the organic layer OR2.

[0059] The organic layer OR3 is in contact with the lower electrode LE3 through the opening AP3, covers the lower electrode LE3 exposed from the opening AP3, and has its peripheral edge located on the insulating layer 5. The upper electrode UE3 covers the organic layer OR3.

[0060] In the illustrated example, subpixel SP1 has a cap layer CP1, subpixel SP2 has a cap layer CP2, and subpixel SP3 has a cap layer CP3. The cap layers CP1, CP2, and CP3 serve as optical adjustment layers that improve the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3, respectively. The cap layer CP1 is disposed on the upper electrode UE1. The cap layer CP2 is disposed on the upper electrode UE2. The cap layer CP3 is disposed on the upper electrode UE3. Note that the cap layers CP1, CP2, and CP3 may be omitted.

[0061] The sealing layer SE1 is disposed so as to cover the cap layers CP1, CP2, CP3 and the insulating layer 5.

[0062] A transparent resin layer RS1 covers the sealing layer SE1. A sealing layer SE2 covers the resin layer RS1. A transparent resin layer RS2 covers the sealing layer SE2. The optical sheet OS is, for example, a polarizing plate, and is bonded to the resin layer RS2.

[0063] The sealing layers SE1 and SE2 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0064] The lower electrodes LE1, LE2, and LE3 are multilayer structures including a transparent layer made of an oxide conductive material such as indium tin oxide (ITO) and a reflective layer made of a metal material such as silver. In one example, the lower electrodes LE1, LE2, and LE3 are multilayer structures including a reflective layer between a pair of transparent layers.

[0065] The organic layer OR1 includes an emitting layer EM1. The organic layer OR2 includes an emitting layer EM2. The organic layer OR3 includes an emitting layer EM3. The emitting layers EM1, EM2, and EM3 are formed of different materials. In one example, the emitting layer EM1 is formed of a material that emits light in the blue wavelength range, the emitting layer EM2 is formed of a material that emits light in the red wavelength range, and the emitting layer EM3 is formed of a material that emits light in the green wavelength range. Each of the organic layers OR1, OR2, and OR3 includes a plurality of functional layers such as a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0066] The upper electrodes UE1, UE2, and UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg).

[0067] The cap layers CP1, CP2, and CP3 are multilayer structures made up of multiple thin films, all of which are transparent and have different refractive indices.

[0068] The external device 200 faces the display panel 100 in the third direction Z and is disposed on the rear side of the display panel 100. The external device 200 is, for example, an optical device configured to receive light transmitted through the display panel 100 and output an electrical signal. Such an external device 200 may include an illuminance sensor or a camera. Alternatively, the external device 200 may be a communication device configured to transmit and receive radio waves via the display panel 100.

[0069] FIG. 5 is a schematic cross-sectional view of the display device DSP taken along line CD in FIG.

[0070] The detection electrode DT including the segments DY2 and DY3 is disposed on the sealing layer SE2 and covered with a resin layer RS2. The detection electrode DT is a multilayer body including, for example, an aluminum layer made of an aluminum-based material and a titanium layer made of a titanium-based material.

[0071] For example, when focusing on the subpixels SP1 and SP2 located at the center of the figure, no segment DY extending in the second direction Y is provided in the region between the lower electrodes LE1 and LE2 that are adjacent to each other at a relatively small interval in the first direction X. This makes it difficult for the segment DY to block the light Lo emitted from each of the subpixels SP1 and SP2.

[0072] As a comparative example, consider a case where a segment DY of the detection electrode DT is arranged in the region between adjacent lower electrodes LE1 and LE2, spaced relatively close to each other. If the viewing angle is defined as the angle between the position at which the display device DSP is observed and the normal to the display device DSP (a line parallel to the third direction Z), then as the viewing angle increases within the XZ plane, a portion of the light Lo emitted from the subpixel SP1 or a portion of the light Lo emitted from the subpixel SP2 is blocked by the segment DY. This reduces the luminance of the displayed image. Furthermore, if a portion of the light Lo emitted from each of the subpixels SP1, SP2, and SP3 is blocked by the segment DY, the chromaticity of the displayed image changes.

[0073] In contrast, according to the above configuration example, the light Lo emitted from each sub-pixel is less likely to be blocked by the detection electrode DT, so that undesired reductions in luminance and undesired changes in chromaticity can be suppressed.

[0074] 3, the segments DX extending in the first direction X are located near the contact holes CH1, CH2, and CH3 and are sufficiently far from the openings AP1, AP2, and AP3, respectively. Therefore, even when the viewing angle increases in the YZ plane, the light Lo emitted from each subpixel is less likely to be blocked by the detection electrodes DT, thereby suppressing undesired reductions in luminance and undesired changes in chromaticity.

[0075] Therefore, the display quality can be improved.

[0076] FIG. 6 is a cross-sectional view for explaining another effect of the display device DSP.

[0077] For example, focusing on the subpixels SP1 and SP2 located in the center of the figure, a transmissive region that allows light Li to pass through can be formed between the lower electrodes LE1 and LE2. If the external device 200 is an optical device, the external device 200 can receive the light Li that has passed through the transmissive region. Furthermore, even if the segments DY extending in the second direction Y are shifted in the first direction X when the detection electrodes DT are formed, the transmissive region will not overlap with the segments DY, and the external device 200 can reliably receive the light Li.

[0078] Furthermore, when focusing on the subpixels SP1 and SP2 located on the left side of the figure, the segment DY2 is arranged so as to overlap the region between the lower electrodes LE1 and LE2. Similarly, when focusing on the subpixels SP1 and SP2 located on the right side of the figure, the segment DY3 is arranged so as to overlap the region between the lower electrodes LE1 and LE2. As described above, the width of the segment DY extending in the second direction Y is smaller than the distance between the lower electrodes LE1 and LE2. Therefore, the segment DY does not completely block the region between the lower electrodes LE1 and LE2, and an area through which the light Li can pass can be formed. Therefore, the light Li can be received by the external device 200 even in the region where the segment DY is provided.

[0079] Therefore, the external device 200 can achieve the desired performance.

[0080] For example, if the external device 200 is an illuminance sensor, the illuminance sensor measures the illuminance of light (i.e., external light) Li incident via the display device DSP. A function can be implemented to automatically adjust the luminance of the display device DSP according to the illuminance measured by the illuminance sensor, such as setting the luminance of the display device DSP high in a bright environment and setting the luminance of the display device DSP low in a dark environment.

[0081] Although the case where the external device 200 is an optical device has been described here, even if the external device 200 is a communication device, the above-mentioned transmission area is formed as an area through which radio waves can pass. Therefore, the external device 200 can reliably transmit and receive radio waves, and can achieve desired performance.

[0082] FIG. 7 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA.

[0083] The configuration example shown in FIG. 7 differs from the configuration example shown in FIG. 3 in that the segments DX extending in the first direction X are locally wider. In the illustrated example, each of the segments DX1, DX2, and DX3 has a first portion P1 having a first width WY11 along the second direction Y and a second portion P2 having a second width WY12 along the second direction Y. The second width WY12 is larger than the first width WY11 (WY12>WY11). The distance WY1 between the lower electrodes LE2 and LE3 along the second direction Y is larger than the first width WY11 and smaller than the second width WY12 (WY11 <WY1<WY12)。

[0084] For example, the first portion P1 of the illustrated segment DX2 is adjacent to the lower electrode LE1 of pixel PX2 in the second direction Y. The second portion P2 of the segment DX2 is adjacent to the lower electrode LE2 of pixel PX2 and the lower electrode LE3 of pixel PX4 in the second direction Y, and is located between these lower electrodes LE2 and LE3. Furthermore, a portion of the first portion P1 overlaps at least a portion of the contact hole CH1 in a plan view, and a portion of the second portion P2 overlaps a portion of the contact holes CH2 and CH3 in a plan view.

[0085] By expanding the second portion P2 of the segment DX extending in the first direction X, the installation area of ​​the detection electrode DT is increased, and the capacitance of the detection electrode DT can be sufficiently secured, thereby improving the detection sensitivity of the detection electrode DT.

[0086] FIG. 8 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA.

[0087] The configuration example shown in Fig. 8 differs from the configuration example shown in Fig. 3 in that the segments DY extending in the second direction Y are discontinuously formed. Note that the segments DX extending in the first direction X are all continuously formed.

[0088] For example, in the region between segments DX1 and DX2, segments DY1 and DY3 are absent, and segment DY2 is disposed between pixels PX1 and PX2. That is, the detection electrode DT does not include a segment on the opposite side of segment DY2 across pixel PX1, nor does it include a segment on the opposite side of segment DY2 across pixel PX2. For example, in the region between lower electrodes LE2 and LE1X, which are adjacent to the right of lower electrodes LE2 and LE3 of pixel PX2, no segments extending in the second direction Y are disposed in the region between lower electrodes LE2 and LE1X and the region between lower electrodes LE3 and LE1X. A distance WX1 between lower electrodes LE2 and LE1X in the first direction X is greater than a distance WX2 between lower electrodes LE1 and LE2 of the same pixel in the first direction X.

[0089] Segment DY2 does not extend beyond segment DX1, nor does it extend beyond segment DX2, so that segments DY2 and DX1 intersect in a T-shape, and segments DY2 and DX2 intersect in a T-shape.

[0090] Next, looking at the region between segments DX2 and DX3, segments DY1 and DY3 are present, but segment DY2 is not. In other words, the detection electrode DT does not include a segment between pixels PX3 and PX4. Two pixels PX3 and PX4 adjacent to each other in the first direction X are surrounded by segments DX2 and DX3, and segments DY1 and DY3. Segments DY1 and DY3 do not extend beyond segments DX2 and DX3, respectively. Thus, segments DY1 and DX2 intersect in a T-shape, and segments DY1 and DX3 intersect in a T-shape. Segments DY3 and DX2 intersect in a T-shape, and segments DY3 and DX3 intersect in a T-shape.

[0091] In this way, each of the rectangular pixels PX is surrounded on three sides by segments of the detection electrode DT, and no segment is provided along the remaining side. Therefore, compared to the example configuration in which all four sides are surrounded by segments of the detection electrode DT as shown in Figure 3, degradation of display quality is suppressed even when observed at a larger viewing angle.

[0092] 3, in which the segments DY overlap the entire area between the adjacent lower electrodes LE1 and LE2 with a relatively large gap WX1, the segments DY do not overlap in approximately half the area, which makes it possible to expand the transmission area, thereby achieving the desired performance in the external device 200.

[0093] FIG. 9 is a plan view schematically showing another example of the layout of the pixels PX and the layout of the detection electrodes DT in the display area DA.

[0094] The configuration example shown in FIG. 9 differs from the configuration example shown in FIG. 3 in that a partition wall 6 is provided.

[0095] The partition wall 6 entirely overlaps with the insulating layer 5 and has the same planar shape as the insulating layer 5. That is, the partition wall 6 has openings in the sub-pixels SP1, SP2, and SP3, respectively. From another perspective, the insulating layer 5 and the partition wall 6 are lattice-shaped in plan view and surround each of the display elements DE1, DE2, and DE3 or each of the lower electrodes LE1, LE2, and LE3. The partition wall 6 is formed of a conductive material and serves as a wiring for supplying a common voltage to the upper electrodes of each of the display elements DE1, DE2, and DE3.

[0096] Also, the partition wall 6 has a plurality of slits ST in plan view. Each of the slits ST is located between two adjacent pixels in the first direction X and extends in the second direction Y. For example, one slit ST is located between the pixel PX1 and the pixel PX2, or between the lower electrodes LE2 and LE3 of the pixel PX1 and the lower electrode LE1 of the pixel PX2. Each of the illustrated pixels PX1, PX2, PX3, and PX4 is located between two slits ST adjacent in the first direction X. Such slits ST expose the insulating layer 5.

[0097] The width WS of the slit ST along the first direction X is smaller than the interval WX1 along the first direction X between the lower electrode LE1 and the lower electrode LE2 (WS < WX1). The width WX11 of the segment DY2 along the first direction X is smaller than the width WS and also smaller than the interval WX1.

[0098] In plan view, among the detection electrodes DT, the segments DX1, DX2, and DX3 extending in the first direction X all overlap with the partition wall 6. Also, among the detection electrodes DT, each of the segments DY1, DY2, and DY3 extending in the second direction Y overlaps with a plurality of slits ST arranged in the second direction Y. Also, each of the segments DY1, DY2, and DY3 is located at the center of the slit ST in the first direction X.

[0099] FIG. 10 is a schematic cross-sectional view of the display device DSP along the line E - F in FIG. 9. Here, descriptions overlapping with those in the description of FIG. 4 may be omitted.

[0100] The circuit layer 11 is disposed on the substrate 10. The insulating layer 12 is disposed on the circuit layer 11. The lower electrode LE1 of the subpixel SP1, the lower electrode LE2 of the subpixel SP2, and the lower electrode LE3 of the subpixel SP3 are disposed on the insulating layer 12.

[0101] The insulating layer 5 is an inorganic insulating layer that covers the insulating layer 12 and also covers the peripheral portions of the lower electrodes LE1, LE2, and LE3. An opening AP1 in the insulating layer 5 overlaps the lower electrode LE1, an opening AP2 overlaps the lower electrode LE2, and an opening AP3 overlaps the lower electrode LE3. The insulating layer 5 is formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxynitride (SiON).

[0102] The partition wall 6 has a conductive lower portion 61 disposed on the insulating layer 5 and an upper portion 62 disposed on the lower portion 61 .

[0103] In the illustrated example, the lower part 61 has a bottom layer 63 disposed on the insulating layer 5 and an axial layer 64 disposed between the bottom layer 63 and the upper part 62. The bottom layer 63 is thinner than the axial layer 64. The bottom layer 63 has a width greater than that of the axial layer 64. Both ends of the bottom layer 63 protrude from the side surfaces of the axial layer 64.

[0104] The upper part 62 is disposed on the shaft layer 64. The upper part 62 has a width greater than that of the shaft layer 64. Both ends of the upper part 62 protrude from the side surfaces of the shaft layer 64. In this specification, the side surfaces of the shaft layer 64 refer to the surfaces of the shaft layer 64 that extend between the bottom layer 63 and the upper part 62. In the illustrated example, the upper part 62 has a width greater than that of the bottom layer 63. Note that the bottom layer 63 may have a width greater than that of the upper part 62.

[0105] In the display element DE1, the organic layer OR1 is in contact with the lower electrode LE1 through the opening AP1, covers the lower electrode LE1 exposed from the opening AP1, and has its peripheral edge located on the insulating layer 5. The upper electrode UE1 covers the organic layer OR1 and is in contact with the lower part 61.

[0106] In the display element DE2, the organic layer OR2 is in contact with the lower electrode LE2 through the opening AP2, covers the lower electrode LE2 exposed from the opening AP2, and has its peripheral edge located on the insulating layer 5. The upper electrode UE2 covers the organic layer OR2 and is in contact with the lower part 61.

[0107] In the display element DE3, the organic layer OR3 is in contact with the lower electrode LE3 through the opening AP3, covers the lower electrode LE3 exposed from the opening AP3, and has its peripheral edge located on the insulating layer 5. The upper electrode UE3 covers the organic layer OR3 and is in contact with the lower part 61.

[0108] Note that contact between each of the upper electrodes UE1, UE2, UE3 and the lower portion 61 includes a case where each of the upper electrodes UE1, UE2, UE3 is in direct contact with the upper surface of the bottom layer 63, and a case where each of the upper electrodes UE1, UE2, UE3 is in direct contact with the upper surface of the bottom layer 63 and also in direct contact with the side surface of the axial layer 64. In this specification, the upper surface of the bottom layer 63 includes the surface of the bottom layer 63 that is in direct contact with the axial layer 64 and the surface that protrudes from the axial layer 64 and faces the upper portion 62.

[0109] In the illustrated example, subpixel SP1 has a cap layer CP1 and an encapsulation layer SE11, subpixel SP2 has a cap layer CP2 and an encapsulation layer SE12, and subpixel SP3 has a cap layer CP3 and an encapsulation layer SE13. Note that the cap layers CP1, CP2, and CP3 may be omitted.

[0110] The cap layer CP1 is disposed on the upper electrode UE1, the cap layer CP2 is disposed on the upper electrode UE2, and the cap layer CP3 is disposed on the upper electrode UE3.

[0111] The sealing layer SE11 is disposed on the cap layer CP1, is in contact with the partition wall 6, and continuously covers each component of the subpixel SP1. The sealing layer SE11 is in contact with the axis layer 64 and the upper portion 62 of the partition wall 6 that surrounds the display element DE1.

[0112] The sealing layer SE12 is disposed on the cap layer CP2, is in contact with the partition wall 6, and continuously covers each component of the subpixel SP2. The sealing layer SE12 is in contact with the axis layer 64 and the upper portion 62 of the partition wall 6 that surrounds the display element DE2.

[0113] The sealing layer SE13 is disposed on the cap layer CP3, is in contact with the partition wall 6, and continuously covers each component of the subpixel SP3. The sealing layer SE13 is in contact with the axis layer 64 and the upper portion 62 of the partition wall 6 that surrounds the display element DE3.

[0114] The sealing layers SE11, SE12, and SE13 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0115] In the following description, the multilayer structure including the organic layer OR1, the upper electrode UE1, and the cap layer CP1 will be referred to as the laminate film FL1, the multilayer structure including the organic layer OR2, the upper electrode UE2, and the cap layer CP2 will be referred to as the laminate film FL2, and the multilayer structure including the organic layer OR3, the upper electrode UE3, and the cap layer CP3 will be referred to as the laminate film FL3.

[0116] Each end of the sealing layers SE11, SE12, and SE13 is located on the partition wall 6. In the example shown, the sealing layer SE11 on the partition wall 6 between the subpixels SP1 and SP2 is spaced apart from the sealing layer SE12 on the partition wall 6. In addition, the sealing layer SE11 on the partition wall 6 between the subpixels SP1 and SP3 is spaced apart from the sealing layer SE13 on the partition wall 6.

[0117] The stacked films FL1, FL2, and FL3 are not formed on the partition wall 6. Cavities are formed between the sealing layer SE11 and the partition wall 6, between the sealing layer SE12 and the partition wall 6, and between the sealing layer SE13 and the partition wall 6, respectively.

[0118] The transparent resin layer RS1 covers the partition walls 6 and the sealing layers SE11, SE12, and SE13. The resin layer RS1 also fills the cavity formed on the partition walls 6.

[0119] In the lower portion 61 of the partition wall 6, the bottom layer 63 is formed of a titanium-based material such as titanium or a titanium compound. The shaft layer 64 is formed of a material different from the bottom layer 63 and the upper portion 62, and is formed of an aluminum-based material such as aluminum or an aluminum compound.

[0120] The upper portion 62 of the partition wall 6 is formed of, for example, a conductive material, but may also be formed of an insulating material. The upper portion 62 is formed of a material different from that of the lower portion 61. For example, the upper portion 62 is formed of a titanium-based material such as titanium or a titanium compound, or an oxide conductive material such as indium tin oxide (ITO).

[0121] FIG. 11 is a schematic cross-sectional view of the display device DSP taken along line GH in FIG.

[0122] The slit ST of the partition wall 6 corresponds to a portion that penetrates the bottom layer 63 and the shaft layer 64 of the lower portion 61 and the upper portion 62. The resin layer RS1 is filled in the slit ST of the partition wall 6, covers the bottom layer 63, the shaft layer 64, and the upper portion 62, and is in contact with the insulating layer 5.

[0123] The detection electrode DT including the segments DY2 and DY3 is disposed on the sealing layer SE2 and covered with a resin layer RS2. The detection electrode DT is a multilayer body including, for example, an aluminum layer made of an aluminum-based material and a titanium layer made of a titanium-based material.

[0124] For example, focusing on the subpixels SP1 and SP2 located at the center of the figure, the detection electrodes DT are not provided in the region between the lower electrodes LE1 and LE2, nor in the region overlapping with the slit ST. Therefore, as described with reference to FIG. 5, the light emitted from each of the subpixels SP1 and SP2 is less likely to be blocked by the detection electrodes DT. Therefore, as with the above configuration example, it is possible to suppress undesired reductions in luminance and undesired changes in chromaticity.

[0125] For example, when focusing on the subpixels SP1 and SP2 located on the left side of the drawing, the segment DY2 of the detection electrode DT is provided in the region between the lower electrodes LE1 and LE2 and in the region overlapping with the slit ST.

[0126] Similarly, when attention is focused on the subpixels SP1 and SP2 located on the right side of the figure, the segment DY3 of the detection electrode DT is provided in the region between the lower electrodes LE1 and LE2 and in the region overlapping with the slit ST.

[0127] The width of the segment DY is smaller than both the distance between the lower electrodes LE1 and LE2 and the width of the slit ST, so that a transmissive region through which the light Li can pass can be formed in the region where the segment DY and the slit ST overlap.

[0128] Therefore, when the external device 200 is an optical device, the external device 200 can reliably receive the light Li that has passed through the transmission region, and can achieve desired performance. Furthermore, even when the external device 200 is a communication device, the transmission area is formed as an area through which radio waves can pass, so that the external device 200 can reliably transmit and receive radio waves, thereby achieving desired performance.

[0129] In addition, for the display device DSP having the partition wall 6 described with reference to Figures 9 to 11, either a configuration example in which the segments DX extending in the first direction X are formed to be locally wide, as described with reference to Figure 7, or a configuration example in which the segments DY extending in the second direction Y are formed discontinuously, as described with reference to Figure 8, can be applied.

[0130] In the above embodiment, for example, the lower electrode LE2 of pixel PX1 corresponds to the first lower electrode, the lower electrode LE1 of pixel PX2 corresponds to the second lower electrode, the lower electrode LE2 of pixel PX2 corresponds to the third lower electrode, and the lower electrode LE1X corresponds to the fourth lower electrode.

[0131] Segment DY2 corresponds to the first segment, segment DY3 corresponds to the second segment, segment DX1 corresponds to the third segment, and segment DX2 corresponds to the fourth segment.

[0132] The sealing layers SE1, SE11, SE12, and SE13 correspond to the first sealing layer, the resin layer RS1 corresponds to the first resin layer, the sealing layer SE2 corresponds to the second sealing layer, and the resin layer RS2 corresponds to the second resin layer.

[0133] In each of the pixels PX1, PX2, PX3, and PX4, the subpixel SP1 corresponds to the first subpixel, the subpixel SP2 corresponds to the second subpixel, and the subpixel SP3 corresponds to the third subpixel.

[0134] As described above, according to this embodiment, it is possible to provide a display device that has a touch sensor function and is configured to improve display quality.

[0135] All display devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the display devices described above as embodiments of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0136] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and these modifications are also understood to fall within the scope of the present invention. For example, even if a person skilled in the art appropriately adds or deletes components or modifies the design of the above-described embodiment, or adds or omits steps or modifies conditions, these modifications are also included within the scope of the present invention as long as they maintain the gist of the present invention.

[0137] Furthermore, with regard to other effects brought about by the aspects described in the above embodiments, those that are clear from the description in this specification or that can be appropriately thought of by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0138] DSP...Display device DA...Display area PX...Pixel SP1, SP2, SP3...Subpixel LE1, LE2, LE3…lower electrode OR1, OR2, OR3…Organic layer UE1, UE2, UE3...upper electrode SE1, SE11, SE12, SE13, SE2...Sealing layer 5...insulating layer 6...partition wall 61...lower part 62...upper part ST...slit SG: Sensor part DT: Detection electrode

Claims

1. a first lower electrode, a second lower electrode, and a third lower electrode arranged in order in a first direction in a display area for displaying an image; an organic layer including a light-emitting layer, the organic layer being disposed on the first lower electrode, the second lower electrode, and the third lower electrode, respectively; an upper electrode disposed on the organic layer; a detection electrode for detecting contact or approach of an object to the display area; a distance between the first lower electrode and the second lower electrode along the first direction is larger than a distance between the second lower electrode and the third lower electrode along the first direction; the detection electrode extends in a second direction intersecting the first direction, includes a first segment located between the first lower electrode and the second lower electrode in a plan view, and does not include a segment between the second lower electrode and the third lower electrode; Display device.

2. the first segment is located centrally between the first lower electrode and the second lower electrode; The display device according to claim 1 .

3. a width of the first segment along the first direction that is smaller than a distance between the first lower electrode and the second lower electrode along the first direction; The display device according to claim 1 .

4. the detection electrode further includes a second segment extending in the second direction and adjacent to the first segment in the first direction; the second lower electrode and the third lower electrode are located between the first segment and the second segment in a plan view; The display device according to claim 1 .

5. The detection electrode further comprises: a third segment extending in the first direction; a fourth segment extending in the first direction and adjacent to the third segment in the second direction, the third segment and the fourth segment each intersect with the first segment and the second segment; the second lower electrode and the third lower electrode are located between the third segment and the fourth segment in a plan view; The display device according to claim 4 .

6. Each of the third segment and the fourth segment is between the first segment and the second segment, a first portion adjacent to the second lower electrode in the second direction and having a first width; a second portion adjacent to the third lower electrode in the second direction and having a second width greater than the first width; The display device according to claim 5 .

7. further comprising a fourth lower electrode adjacent to the third lower electrode in the first direction; a distance between the third lower electrode and the fourth lower electrode along the first direction is larger than a distance between the second lower electrode and the third lower electrode along the first direction; the detection electrode does not include a segment between the third lower electrode and the fourth lower electrode; The display device according to claim 1 .

8. The detection electrode further comprises: a third segment extending in the first direction; a fourth segment extending in the first direction and adjacent to the third segment in the second direction, the first segment is located between the third segment and the fourth segment, and does not extend beyond the third segment or the fourth segment; The display device according to claim 7 .

9. a first sealing layer formed of an inorganic insulating material and covering the upper electrode; a first resin layer disposed on the first sealing layer; a second sealing layer formed of an inorganic insulating material and disposed on the first resin layer; a second resin layer disposed on the second sealing layer, the detection electrode is disposed on the second sealing layer and covered with the second resin layer; The display device according to claim 1 .

10. the first lower electrode, the second lower electrode, and the third lower electrode are surrounded by partition walls, each of which includes a conductive lower portion in contact with the upper electrode and an upper portion protruding from a side surface of the lower portion; the partition wall has a slit that overlaps with the first segment in a plan view. The display device according to claim 1 .

11. The first segment is located at the center of the slit. The display device according to claim 10.

12. the slit extends in the second direction between the first lower electrode and the second lower electrode; a width of the slit along the first direction that is smaller than a distance between the first lower electrode and the second lower electrode along the first direction; The display device according to claim 10.

13. The detection electrode further comprises: a third segment extending in the first direction; a fourth segment extending in the first direction and adjacent to the third segment in the second direction, each of the third segment and the fourth segment intersects with the first segment; the third segment and the fourth segment overlap the partition wall in a plan view; The display device according to claim 10.

14. a first sealing layer formed of an inorganic insulating material, covering the upper electrode, and in contact with the partition wall; a first resin layer disposed on the first sealing layer, filling the slits, and contacting the partition walls; a second sealing layer formed of an inorganic insulating material and disposed on the first resin layer; a second resin layer disposed on the second sealing layer, the detection electrode is disposed on the second sealing layer and covered with the second resin layer; The display device according to claim 10.

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