Disk drive

Abstract

To appropriately perform error correction.SOLUTION: According to one embodiment, in a disk device, a controller can perform error correction for each sector in units of tracks. The controller can predict that the number of error sectors of the second track reaches the correction limit number of sectors according to the track margin specified by the first management information and the off-track amount of the first track while writing data to the first track with the head. The first track is a track of the plurality of tracks. In the first management information, track identification information and a track margin are associated with each of the plurality of tracks. The second track is a track adjacent to the first track among the plurality of tracks. For each of the plurality of tracks, the controller updates the first management information according to the reference value of the bit error rate and the bit error rate of the information read from the track.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present embodiment relates to a disk device. [Background technology]

[0002] In a disk device having a disk medium, error correction for each sector may be performed on a track-by-track basis for a disk medium in which multiple tracks each containing multiple sectors are defined. In a disk device, it is desirable that error correction be performed appropriately. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2023-119547 [Patent Document 2] US Patent Publication No. 2023 / 0260540 [Patent Document 3] U.S. Patent Application Publication No. 2023 / 0020009 [Patent Document 4] U.S. Patent Application Publication No. 2023 / 0307000 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment is to provide a disk drive that can appropriately perform error correction. [Means for solving the problem]

[0005] According to one embodiment, a disk drive is provided that includes a head, a disk medium, and a controller. The disk medium has a recording surface that can face the head. The disk medium has multiple tracks defined on the recording surface. Each of the multiple tracks includes multiple sectors. The controller is capable of performing error correction for each sector on a track-by-track basis. While writing data to a first track with the head, the controller is capable of predicting that the number of error sectors in a second track will reach a correction limit based on a track margin specified in first management information and an off-track amount of the first track. The first track is one of the multiple tracks. The first management information associates track identification information and a track margin with each of the multiple tracks. The second track is one of the multiple tracks that is adjacent to the first track. The controller updates the first management information for each of the multiple tracks based on a bit error rate reference value and the bit error rate of information read from the track. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a diagram showing the configuration of a disk device according to an embodiment. [Figure 2] FIG. 2 is a diagram showing the configuration of a disk medium and a head according to the embodiment. [Figure 3] FIG. 2 is a diagram showing the configuration of a disk medium according to the embodiment. [Figure 4] FIG. 2 is a diagram showing the configuration of a track according to the embodiment. [Figure 5] FIG. 3 is a diagram showing the configuration of update management information according to an embodiment. [Figure 6] FIG. 4 is a diagram showing the configuration of reference bit error rate management information in the embodiment. [Figure 7] FIG. 2 is a diagram showing the configuration of track margin management information (before updating) in an embodiment. [Figure 8] 10 is a flowchart showing a bit error rate inspection process according to an embodiment. [Figure 9]FIG. 10 is a diagram showing the configuration of track margin management information (after update) in the embodiment. [Figure 10] FIG. 10 is a diagram showing the configuration of a disk medium according to a first modified example of the embodiment. [Figure 11] FIG. 10 is a diagram showing the configuration of reference bit error rate management information in a first modified example of the embodiment. [Figure 12] FIG. 10 is a diagram showing the configuration of track margin management information (before updating) in a first modified example of the embodiment. [Figure 13] FIG. 10 is a diagram showing the configuration of track margin management information (after update) in the first modified example of the embodiment. [Figure 14] 10 is a flowchart showing the operation of a disk device according to a second modified example of the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] A disk drive according to an embodiment will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to this embodiment.

[0008] (Embodiment) The disk device according to the embodiment has a disk medium and performs error correction for each sector on a track-by-track basis on the disk medium on which a plurality of tracks each including a plurality of sectors are defined, but is devised to perform the error correction appropriately.

[0009] The disk device 1 can be configured as shown in Figure 1. Figure 1 is a diagram showing the configuration of the disk device 1.

[0010] The disk device 1 can be connected to a host 2 via a communication medium. The disk device 1 is connected to the host 2 and can function as a storage medium for the host 2. The disk device 1 can receive access commands from the host 2. The access commands include write commands and read commands.

[0011] The disk device 1 includes a disk medium 11, a spindle motor (SPM) 12, a ramp 13, an actuator arm 15, a voice coil motor (VCM) 16, a driver 21, a head 22, a preamplifier 24, a controller 30, a volatile memory 27, a nonvolatile memory 28, and a buffer memory 29.

[0012] The controller 30 is capable of comprehensively controlling each part of the disk device 1. The controller 30 includes a hard disk controller (HDC) 23, a read / write channel (RWC) 25, and a processor 26. The controller 30 can be configured as a system on chip (SoC).

[0013] The disk medium 11 is a disk-type storage medium, and may be, for example, a magnetic disk or a magneto-optical disk. If the disk medium 11 is a magnetic disk, a magnetic layer is formed on the surface, and information can be recorded according to the direction of magnetization.

[0014] The SPM 12 rotatably supports the disk medium 11 in a housing (not shown) of the disk device 1.

[0015] The driver 21 can drive the SPM 12 and the VCM 16 under the control of the processor 26. The driver 21 can be configured as an integrated circuit (IC).

[0016] The head 22 can face the recording surface of the disk medium 11. The head 22 writes and reads data to and from the disk medium 11 using a write element 22w and a read element 22r provided therein. The head 22 is attached to the tip of an actuator arm 15. The head 22 is moved to seek in the radial direction of the disk medium 11 by a VCM 16 driven by a driver 21.

[0017] When the disk medium 11 is not rotating, the head 22 is moved onto the ramp 13. The ramp 13 is configured to hold the head 22 at a position spaced apart from the disk medium 11.

[0018] During reading, the preamplifier 24 amplifies and outputs a signal read from the disk medium 11 by the head 22 and supplies it to the RWC 25. During writing, the preamplifier 24 amplifies a signal corresponding to data supplied from the RWC 25 and supplies it to the head 22. The preamplifier 24 can be configured as an integrated circuit (IC).

[0019] The RWC 25 performs modulation, including error correction coding, on the data supplied from the HDC 23 and supplies the result to the preamplifier 24. The RWC 25 also performs demodulation, including error correction decoding, on the signal read from the disk medium 11 and supplied from the preamplifier 24 and outputs the result to the HDC 23 as digital data.

[0020] The error correction coding performed by the RWC 25 includes the generation of parity for the track ECC, which will be described later.

[0021] The HDC 23 controls the sending and receiving of data to and from the host 2 via the I / F bus, controls the buffer memory 29, and so on.

[0022] The buffer memory 29 is used as a buffer for data transmitted to and received from the host 2. The buffer memory 29 is configured, for example, by a volatile memory capable of high-speed operation. The type of memory that configures the buffer memory 29 is not limited to a specific type. The buffer memory 29 can be configured, for example, by a dynamic random access memory (DRAM), a static random access memory (SRAM), or a combination of these.

[0023] The processor 26 is, for example, a CPU (Central Processing Unit). A volatile memory 27, a nonvolatile memory (Flash Read Only Memory) 28, and a buffer memory 29 are connected to the processor 26.

[0024] The nonvolatile memory 28 stores firmware (program data) and various operating parameters. In addition, the nonvolatile memory 28 is used as an emergency storage location for various pieces of information in the volatile memory 27 when the power supply is stopped. Note that part or all of the firmware may be stored in the disk medium 11.

[0025] The volatile memory 27 is configured by, for example, DRAM, SRAM, or a combination of these, and is used by the processor 26 as an area into which firmware is loaded, or an area into which various types of management information are cached or buffered.

[0026] The processor 26 loads firmware from the nonvolatile memory 28 into the volatile memory 27, and controls the driver 21, preamplifier 24, RWC 25, HDC 23, etc. in accordance with the loaded firmware. The processor 26 uses various management information cached or buffered in the volatile memory 27 during control.

[0027] The configuration including the RWC 25, the processor 26, and the HDC 23 can also be considered as a controller 30. In addition to these, the controller 30 may also include other elements (such as a volatile memory 27, a non-volatile memory 28, or a buffer memory 29).

[0028] Some or all of the functions of the controller 30 may be implemented by a hardware circuit such as a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC). Some or all of the functions of the controller 30 may be implemented by the processor 26 executing firmware.

[0029] The disk device 1 may have a plurality of disk media 11_1 to 11_3, a plurality of actuator arms 15_1 to 15_4, and a plurality of heads 22_1 to 22_6, as shown in Fig. 2. Fig. 2 is a diagram showing the configuration of the disk media 11_1 to 11_3 and the heads 22_1 to 22_6. Fig. 2 illustrates the configuration of the disk media 11_1 to 11_3 and the heads 22_1 to 22_6 when the disk media 11_1 to 11_3 are viewed from the side along the recording surfaces.

[0030] The plurality of disk media 11_1 to 11_3 are spaced apart along the axis of the SPM 12 and are all rotatably supported by the axis of the SPM 12. The plurality of actuator arms 15_1 to 15_4 are spaced apart along the axis of the VCM 16 and are all rotatably supported by the axis of the VCM 16. The actuator arms 15_1, 15_2, 15_3, and 15_4 can be radially sought above the disk medium 11_1, between the disk media 11_2 and 11_3, between the disk media 11_3 and 11_4, and below the disk medium 11_4, respectively.

[0031] Head 22_1 is provided at the lower tip of actuator arm 15_1 and can face the upper recording surface of disk medium 11_1. Head 22_2 is provided at the upper tip of actuator arm 15_2 and can face the lower recording surface of disk medium 11_1. Head 22_3 is provided at the lower tip of actuator arm 15_2 and can face the upper recording surface of disk medium 11_2. Head 22_4 is provided at the upper tip of actuator arm 15_3 and can face the lower recording surface of disk medium 11_2. Head 22_5 is provided at the lower tip of actuator arm 15_3 and can face the upper recording surface of disk medium 11_3. Head 22_6 is provided at the upper tip of actuator arm 15_1 and can face the lower recording surface of disk medium 11_3.

[0032] Each disk medium 11 may be configured as shown in Figure 3. Figure 3 is a diagram showing the configuration of the disk medium 11.

[0033] During the manufacturing process, servo information is written to the disk medium 11 by, for example, a servo writer or by self-servo writing (SSW). Figure 3 shows radially arranged servo areas 42 as an example of the arrangement of servo areas in which servo information is written.

[0034] The servo information includes sector / cylinder information, burst patterns, and postcodes. The sector / cylinder information can provide circumferential position information (servo sector addresses) on the disk medium 11 and radial track position information (track numbers). The track number obtained from the sector / cylinder information is an integer value representing the track position, and the burst pattern represents a decimal offset from the position represented by the track number. The postcode is a correction amount set based on the combination of the sector / cylinder information and burst pattern to correct distortion in the track shape.

[0035] The processor 26 and the driver 21 perform positioning control of the head 22, such as seeking and following, based on the servo information read from the servo area 42.

[0036] Data areas 43, in which data can be written, are provided between the servo areas 42. One servo area 42 and one data area 43 following that servo area 42 constitute a servo sector 44. A plurality of concentric tracks 41 are set in the radial direction of the disk medium 11.

[0037] A plurality of sectors are provided in the data area 43 along each track 41. Write and read operations are performed by the head 22 in sector units. The storage capacity of each sector is arbitrary, but is generally uniform across the disk medium 11.

[0038] Each track 41 may have a configuration as shown in Fig. 4. Fig. 4 is a diagram showing the configuration of the track 41. In Fig. 4, the servo area 42 is not shown.

[0039] Each sector is identified by a sector number. A sector with sector number x is denoted as sector #x. In the example shown in Figure 4, track 41 has (n+1) sectors, from sector #1 to sector #(n+1).

[0040] The last of the (n+1) sectors, i.e., sector #(n+1) with the largest sector number, is set as a dedicated sector for writing parity. Data pieces #1 to #n of sizes corresponding to the sector are written to n sectors #1 to #n, and parity generated based on the n data pieces #1 to #n written to sectors #1 to #n is written to sector #(n+1).

[0041] Therefore, when n pieces of data are written to sectors #1 to #n and parity generated based on the n pieces of data is written to sector #(n+1), the n pieces of data written to sectors #1 to #n are protected by the parity. In other words, even if a read attempt to any of the n sectors #1 to #n fails, it is possible to obtain the piece of data in an error-free state by error correction using the parity written to sector #(n+1). Note that a read failure refers to a failure to obtain a piece of data in an error-free state.

[0042] Hereinafter, a sector configured to have parity written therein, such as sector #(n+1), will be referred to as a parity sector. Also, sectors configured to have data pieces that can be used as the source for generating parity written therein, such as sectors #1 to #n, will be referred to as data sectors.

[0043] The error correction using the parity written to the parity sector is referred to as track ECC. The error correction coding method for track ECC, i.e., the method for generating parity, is not limited to a specific method. In one example, parity is generated by a bitwise XOR operation on all data pieces written to all data sectors.

[0044] With track ECC, errors are corrected for each sector on a track-by-track basis, but there is a limit to the number of sectors that can be corrected. This limit is called the correction limit. If the number of error sectors exceeds the correction limit before the last sector of a track is written, that track will experience an uncorrectable read error, and data may be lost.

[0045] In response to this, the controller 30 may have a correction limit prediction function. The controller 30 predicts whether the number of error sectors will reach the correction limit number of sectors before the final sector of the track is written. The controller 30 can predict the number of error sectors in adjacent tracks according to the track margin and the off-track amount of the head 22 during writing. If the off-track amount is within the track margin range, the controller 30 determines that the sector being written is not an error sector. If the off-track amount is outside the track margin range, the controller 30 determines that the sector being written is not an error sector. This allows the controller 30 to predict that the number of error sectors in adjacent tracks will reach the correction limit number of sectors.

[0046] The controller 30 continues off-track writing if the number of error sectors on the adjacent track has not reached the correction limit number of sectors, but if the number of error sectors on the adjacent track has reached the correction limit number of sectors, the controller 30 prohibits further off-track writing and performs a write retry on another track.

[0047] The characteristics of the disk device 1 may change over time. If the disk medium 11 is a magnetic disk, as the coercive force of the disk medium 11 deteriorates over time, the bit error rate tends to increase even for the same amount of off-track. In other words, in the disk device 1, as the bit error rate increases, the appropriate track margin tends to become stricter.

[0048] For example, if the track margin is set to a fixed value, the accuracy of determining error sectors may decrease as the characteristics of the disk device 1 change over time, and the accuracy of predicting whether the number of error sectors will reach the correction limit sector number may decrease.

[0049] Therefore, in this embodiment, in the disk device 1, the controller 30 updates the management information of the track margin according to the reference value of the bit error rate and the bit error rate of the information read from the track, thereby improving the prediction accuracy of the correction limit and thereby preventing read errors.

[0050] For example, the controller 30 may have update management information 31 as shown in Fig. 5. Fig. 5 is a diagram showing the configuration of the update management information 31.

[0051] The update management information 31 associates bit error rates with track margins for a plurality of bit error rates. The update management information 31 may be implemented in the form of a table or a function. FIG. 5 illustrates a case in which appropriate track margins are experimentally determined for a plurality of bit error rates, and the relationship between the bit error rate and the track margin is approximated by a function shown by a solid line. In FIG. 5, the vertical axis represents the track margin (TM) coefficient, and the horizontal axis represents the magnitude of the bit error rate (BER). The track margin coefficient is a coefficient used to calculate the track margin by multiplying the initial track margin value TM0 by the track margin coefficient. The track margin coefficient can be considered as information indicating the track margin.

[0052] By referring to the update management information 31, it is possible to identify an appropriate track margin coefficient value for a bit error rate value. By referring to the update management information 31, it is identified that when the bit error rate is "E1", the appropriate track margin coefficient is "K1". When the bit error rate is "E2", the appropriate track margin coefficient is "K2". When the bit error rate is "E3", the appropriate track margin coefficient is "K3". When the bit error rate is "E4", the appropriate track margin coefficient is "K4". When the bit error rate is "E5", the appropriate track margin coefficient is "K5". When the bit error rate is "E6", the appropriate track margin coefficient is "K6". When the bit error rate is "E7", the appropriate track margin coefficient is "K7".

[0053] The controller 30 may have reference bit error rate management information 32 as shown in Fig. 6. Fig. 6 is a diagram showing the configuration of the reference bit error rate management information 32.

[0054] The reference bit error rate management information 32 associates identification information of the head 22 with reference values ​​of the bit error rate for multiple heads 22. The reference bit error rate management information 32 may be implemented in the form of a table as shown in FIG. 6. The reference bit error rate management information 32 has a head identification information field 311 and a reference BER field 312. The head identification information field 311 records identification information of the head 22. The reference BER field 312 records a reference value of the bit error rate. The reference value of the bit error rate may be acquired and recorded in the reference BER field 312 during an inspection of the disk device 1 before shipment.

[0055] By referencing the reference bit error rate management information 32, it is possible to identify the reference value of the bit error rate corresponding to the identification information of the head 22. For example, by referencing the reference bit error rate management information 32, it is identified that the reference value of the bit error rate of head "22_1" is "E2". It is identified that the reference value of the bit error rate of head "22_2" is "E2". It is identified that the reference value of the bit error rate of head "22_3" is "E3". It is identified that the reference value of the bit error rate of head "22_4" is "E2". It is identified that the reference value of the bit error rate of head "22_5" is "E4". It is identified that the reference value of the bit error rate of head "22_6" is "E2".

[0056] The controller 30 may create track margin management information 33 as shown in Fig. 7 in accordance with update management information 31 as shown in Fig. 5 and reference bit error rate management information 32 as shown in Fig. 6. Fig. 7 is a diagram showing the configuration of the track margin management information 33 (before updating).

[0057] In the track margin management information 33, identification information of the head 22 is associated with a track margin for a plurality of heads 22. The track margin management information 33 may be implemented in the form of a table as shown in FIG. 7. The track margin management information 33 has a head identification information field 331 and a TM coefficient field 332. The head identification information field 331 records identification information of the head 22. The TM coefficient field 332 records a track margin coefficient value. The track margin coefficient value may be determined and recorded in the TM coefficient field 332 during inspection before shipping of the disk device 1, based on the update management information 31 as shown in FIG. 5 and the reference bit error rate management information 32 as shown in FIG. 6.

[0058] For example, according to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_1" is "E2," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E2" is "K2." Accordingly, in the track margin management information 33, "K2" is registered as the value of the track margin coefficient for head "22_1."

[0059] According to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_2" is "E2," and according to the update management information 31, the appropriate track margin coefficient when the bit error rate is "E2" is "K2." Accordingly, in the track margin management information 33, "K2" is registered as the value of the track margin coefficient of head "22_2."

[0060] According to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_3" is "E3," and according to the update management information 31, the appropriate track margin coefficient when the bit error rate is "E3" is "K3." Accordingly, in the track margin management information 33, "K3" is registered as the value of the track margin coefficient of head "22_3."

[0061] According to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_4" is "E2," and according to the update management information 31, the appropriate track margin coefficient when the bit error rate is "E2" is "K2." Accordingly, in the track margin management information 33, "K2" is registered as the value of the track margin coefficient of head "22_4."

[0062] According to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_5" is "E4," and according to the update management information 31, the appropriate track margin coefficient when the bit error rate is "E4" is "K4." Accordingly, in the track margin management information 33, "K4" is registered as the value of the track margin coefficient of head "22_5."

[0063] According to the reference bit error rate management information 32, the reference value of the bit error rate of head "22_6" is "E2," and according to the update management information 31, the appropriate track margin coefficient when the bit error rate is "E2" is "K2." Accordingly, in the track margin management information 33, "K2" is registered as the value of the track margin coefficient of head "22_6."

[0064] After the disk device 1 is shipped, the controller 30 may perform a bit error rate inspection process as shown in Fig. 8. Fig. 8 is a flowchart showing the bit error rate inspection process.

[0065] The controller 30 waits until the timing for inspection arrives (No in S1). The inspection timing may be when the disk device 1 is started up, when a predetermined period has elapsed since the previous inspection, or when the disk device 1 is idle.

[0066] When it is time to inspect (Yes in S1), the controller 30 selects an inspection target in units of track margin management. When the track margin is managed for each head 22, the controller 30 selects the head 22 to be inspected from the plurality of heads 22_1 to 22_6.

[0067] The controller 30 reads information from the disk medium 11 with the head 22 under test, and uses the read signal to determine the bit error rate (BER) of the head 22 under test (S2).

[0068] The controller 30 determines whether the bit error rate calculated in S2 exceeds a reference value of the bit error rate (reference BER) (S3).

[0069] If the bit error rate found in S2 exceeds the reference value for the bit error rate (Yes in S3), the controller 30 determines that the bit error rate has deteriorated and updates the track margin of the head 22 being inspected (S4).

[0070] For example, when the head 22 to be inspected is head 22_1, if the bit error rate calculated in S2 is E3, the bit error rate E3 exceeds the reference value E2 for the bit error rate (see FIGS. 5 and 6). Therefore, the controller 30 refers to the update management information 31 and identifies the track margin coefficient K3 corresponding to the bit error rate E3. The controller 30 accesses the track margin management information 33 as shown in FIG. 7 and updates the TM coefficient column 332 corresponding to head 22_1 by overwriting it with "K3" as shown in FIG. 9. FIG. 9 is a diagram showing the configuration of the track margin management information 33 (after update). As a result, the track margin value is updated from TM0×K2 to the stricter value TM0×K3.

[0071] If the bit error rate found in S2 is equal to or less than the reference value of the bit error rate (No in S3), the controller 30 determines that the bit error rate has not deteriorated and maintains the current track margin (S5).

[0072] For example, when the head 22 to be inspected is head 22_1, if the bit error rate calculated in S2 is E2, the bit error rate E2 is equal to or less than the reference value E2 of the bit error rate (see FIGS. 5 and 6). Therefore, the controller 30 maintains the track margin management information 33 in the state shown in FIG. 7. This maintains the track margin value at TM0×K2.

[0073] If there are other unselected examination subjects (Yes in S6), the controller 30 selects one examination subject from the unselected examination subjects and returns the process to S2.

[0074] If there are no other unselected inspection targets (No in S6), the controller 30 ends the process.

[0075] As described above, in the embodiment, in the disk device 1, the controller 30 updates the track margin management information according to the reference value of the bit error rate and the bit error rate of the information read from the track. This improves the prediction accuracy of the correction limit, thereby suppressing the occurrence of read errors.

[0076] As a first modification of the embodiment, the track margin may be managed for each head 22, and also for each zone in which a plurality of tracks on the disk medium 11 are grouped.

[0077] For example, the tracks 41 on each disk medium 11 may be grouped into zones Z1 to Z3 as shown in Figure 10. Figure 10 is a diagram showing the configuration of the disk medium 11 in a first modified example of the embodiment.

[0078] A plurality of zones Z1 to Z3 are arranged concentrically from the inner periphery to the outer periphery. Each zone Z includes two or more tracks 41. FIG. 10 illustrates a configuration in which, of the eight tracks 41, three inner tracks 41 are included in zone Z1, three middle tracks 41 are included in zone Z2, and two outer tracks 41 are included in zone Z3. The number of tracks included in each zone Z may be the same, or some zones may have a different number of tracks. The number of tracks on the disk medium 11 may be more than the number illustrated in FIG. 10, and the number of tracks included in each zone Z may be more than the number illustrated in FIG. 10.

[0079] In this case, the reference value of the bit error rate may be managed for each zone Z in addition to being managed for each head 22. The controller 30 may have reference bit error rate management information 32i as shown in Fig. 11. Fig. 11 is a diagram showing the configuration of the reference bit error rate management information 32i in a first modified example of the embodiment.

[0080] The reference bit error rate management information 32i associates identification information of the head 22, identification information of the zone Z, and reference values ​​of the bit error rate for a plurality of heads 22 and a plurality of zones Z1 to Z3. The reference bit error rate management information 32i may be implemented in the form of a table as shown in FIG. 11. The reference bit error rate management information 32i has a head identification information field 321, a zone identification information field 323, and a reference BER field 322. The head identification information field 321 records identification information of the head 22. The zone identification information field 323 records identification information of the zone Z. The reference BER field 322 records a reference value of the bit error rate. The reference value of the bit error rate may be acquired and recorded in the reference BER field 322 during an inspection of the disk device 1 before shipment.

[0081] By referencing the reference bit error rate management information 32i, it is possible to identify the reference value of the bit error rate corresponding to the identification information of the head 22. For example, by referencing the reference bit error rate management information 32i, it is identified that the reference value of the bit error rate for zone "Z1" of head "22_1" is "E2". It is identified that the reference value of the bit error rate for zone "Z2" of head "22_1" is "E2". It is identified that the reference value of the bit error rate for zone "Z3" of head "22_1" is "E3". It is identified that the reference value of the bit error rate for zone "Z1" of head "22_6" is "E2". It is identified that the reference value of the bit error rate for zone "Z2" of head "22_6" is "E3". It is identified that the reference value of the bit error rate for zone "Z3" of head "22_6" is "E3".

[0082] The controller 30 may create track margin management information 33i as shown in Fig. 12 in accordance with the update management information 31 as shown in Fig. 5 and the reference bit error rate management information 32i as shown in Fig. 11. Fig. 12 is a diagram showing the configuration of the track margin management information 33i (before updating) in a first modified example of the embodiment.

[0083] In the track margin management information 33i, identification information of the head 22, identification information of the zone Z, and a track margin are associated with each other for a plurality of heads 22. The track margin management information 33i may be implemented in the form of a table as shown in FIG. 12. The track margin management information 33i has a head identification information field 331, a zone identification information field 333, and a TM coefficient field 332. The head identification information field 331 records identification information of the head 22. The zone identification information field 333 records identification information of the zone Z. The TM coefficient field 332 records a track margin coefficient value. The track margin coefficient value may be determined and recorded in the TM coefficient field 332 in accordance with the update management information 31 as shown in FIG. 5 and the reference bit error rate management information 32i as shown in FIG. 12 during an inspection before shipping the disk device 1.

[0084] For example, according to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z1" of head "22_1" is "E2," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E2" is "K2." Accordingly, in the track margin management information 33i, "K2" is registered as the value of the track margin coefficient of zone "Z1" of head "22_1."

[0085] According to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z2" of head "22_1" is "E2," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E2" is "K2." Accordingly, in the track margin management information 33i, "K2" is registered as the value of the track margin coefficient of zone "Z2" of head "22_1."

[0086] According to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z3" of head "22_1" is "E3," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E3" is "K3." Accordingly, in the track margin management information 33i, "K3" is registered as the value of the track margin coefficient of zone "Z3" of head "22_1."

[0087] According to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z1" of head "22_6" is "E2," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E2" is "K2." Accordingly, in the track margin management information 33i, "K2" is registered as the value of the track margin coefficient of zone "Z1" of head "22_6."

[0088] According to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z2" of head "22_6" is "E3," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E3" is "K3." Accordingly, in the track margin management information 33i, "K3" is registered as the value of the track margin coefficient of zone "Z2" of head "22_6."

[0089] According to the reference bit error rate management information 32i, the reference value of the bit error rate of zone "Z3" of head "22_6" is "E3," and according to the update management information 31, the appropriate track margin coefficient for the bit error rate "E3" is "K3." Accordingly, in the track margin management information 33i, "K3" is registered as the value of the track margin coefficient of zone "Z3" of head "22_6."

[0090] After the disk device 1 is shipped, the controller 30 may perform a bit error rate inspection process as shown in FIG.

[0091] After steps S1 to S3 are performed in the same manner as in the embodiment, if the bit error rate calculated in S2 exceeds the reference value of the bit error rate (Yes in S3), the controller 30 determines that the bit error rate has deteriorated and updates the track margin of the head 22 being inspected (S4).

[0092] For example, if the head 22 to be inspected is head 22_1 and the zone Z to be inspected is zone Z1, and the bit error rate calculated in S2 is E3, the bit error rate E3 exceeds the reference value E2 for the bit error rate (see FIGS. 5 and 11). Therefore, the controller 30 refers to the update management information 31 and identifies the track margin coefficient K3 corresponding to the bit error rate E3. The controller 30 accesses the track margin management information 33i as shown in FIG. 12 and updates the TM coefficient column 332 corresponding to the head 22_1 and zone Z1 by overwriting it with "K3" as shown in FIG. 13. FIG. 13 is a diagram showing the configuration of the track margin management information 33i (after update) in a first modified example of the embodiment. As a result, the track margin value is updated from TM0×K2 to the stricter value TM0×K3.

[0093] After that, steps S5 and S6 are carried out in the same manner as in the embodiment.

[0094] In such a disk device 1, the controller 30 also updates the track margin management information in accordance with the reference value of the bit error rate and the bit error rate of the information read from the track. This improves the prediction accuracy of the correction limit, thereby suppressing the occurrence of read errors.

[0095] Alternatively, as a second modification of the embodiment, a correction limit prediction process may be performed taking into consideration a bit error rate inspection process.

[0096] For example, the disk device 1 may perform the operation shown in Fig. 14 in parallel with the bit error rate inspection process shown in Fig. 8. Fig. 14 is a flowchart showing the operation of the disk device 1 according to the second modified example of the embodiment.

[0097] In the disk device 1, when starting to write to a track TR_k (k is any integer equal to or greater than 1), the controller 30 initializes the track ECC valid flag FTE=1, the number of write sectors N of track TR_k=0, and the number of damage determination sectors M of track TR_k=0.

[0098] If the track ECC valid flag FTE has a value of 1, it indicates that the operation mode of the disk device 1 is the track ECC valid mode. If the value is 0, it indicates that the operation mode of the disk device 1 is the track ECC invalid mode.

[0099] If the positioning error PE[N] in the number N of write sectors of track TR_k does not exceed the track margin TM (No in S11), the controller 30 writes sector SC[N] (S12). The controller 30 increments the number N of write sectors (S13).

[0100] The controller 30 repeats the loop of S11 to S14 until the number of write sectors N becomes equal to the total number of sectors Ne (No in S14). When the number of write sectors N becomes equal to the total number of sectors Ne (Yes in S14), the controller 30 determines that writing of the total number of sectors Ne has been completed, and ends the process.

[0101] If the positioning error PE[N] for the number N of write sectors of the track TR_k exceeds the track margin TM (Yes in S11), the controller 30 performs a track ECC mode control process (S20).

[0102] In the track ECC mode control process (S20), if the track ECC mode is valid (Yes in S21), the controller 30 predicts the number of damaged sectors Mp to be determined when writing the total number of sectors Ne is completed, based on the rate of change dM / dN of the number of damaged sectors M relative to the number of write sectors N, the number of remaining sectors (Ne-N), and the number of damaged sectors M (S22).If the number of damaged sectors Mp has not reached the correction limit number of sectors Mx (No in S23), the controller 30 exits the track ECC mode control process (S20).

[0103] When S20 is exited via S23, the controller 30 increments the number of damaged sectors M (S31), and if the number of damaged sectors M has not reached the correction limit number of sectors Mx (Yes in S32), writes sector SC[N] (S12).

[0104] If the number of damaged sectors M reaches the correction limit number of sectors Mx (No in S32), the controller 30 registers the remaining incompletely written sectors SC[N] to SC[Ne-1] as replacement information or writes them to the replacement area (S33).

[0105] In the track ECC mode control process (S20), if the number of damaged sectors Mp has reached the correction limit number of sectors Mx (Yes in S23), the controller 30 sets the track ECC valid flag FTE=0 and shifts the operation mode to the track ECC invalid mode (S24). The controller 30 shifts to the write retry process, waits for rotations to write sector SC[N] to another track (S28), and performs the process from S11 onwards for another track TR_k+1.

[0106] In the track ECC mode control process (S20), if the track ECC invalid mode is selected (No in S21), the controller 30 predicts the number of damaged sectors Mp at the end of writing the total number of sectors Ne from the rate of change dM / dN of the number of damaged sectors M relative to the number of write sectors N, the number of remaining sectors (Ne-N), and the number of damaged sectors M (S25).

[0107] At this time, the bit error rate inspection process (see FIG. 8) is performed in parallel, and the state of the disk device 1 may change due to the track margin being updated, etc.

[0108] Therefore, if the number of damaged sectors Mp falls below the correction limit sector number Mx during track ECC invalid mode (No in S26), the controller 30 sets the track ECC valid flag FTE=1, returns the operating mode to track ECC valid mode (S27), and performs processing from S31 onwards.

[0109] In the track ECC mode control process (S20), if the number of damaged sectors Mp reaches the correction limit sector number Mx during the track ECC invalid mode (Yes in S26), the controller 30 maintains the track ECC valid flag FTE=0, transitions to write retry process, and waits for rotations to write sector SC[N] to another track (S28), and performs the process from S11 onwards for another track TR_k+1.

[0110] In this way, the correction limit prediction process can be performed dynamically in response to updates to the track margin management information, taking into account the bit error rate inspection process, thereby further improving the accuracy of the correction limit prediction.

[0111] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0112] 1 disk device, 11 disk media, 22 head, 30 controller.

Claims

1. Head and a disk medium having a recording surface that can face the head, and a plurality of tracks, each including a plurality of sectors, defined on the recording surface; a controller capable of performing error correction for each sector on a track-by-track basis, and capable of predicting, while writing data to a first track of the plurality of tracks with the head, whether the number of error sectors in a second track adjacent to the first track of the plurality of tracks will reach a correction limit number of sectors in accordance with a track margin specified by first management information and an off-track amount of the first track; Equipped with The controller updates the first management information in accordance with a reference value of the bit error rate and the bit error rate of information read from the track. Disk device.

2. The disk device is A plurality of the heads; a plurality of said disk media each having a recording surface that corresponds to said plurality of heads and that is capable of facing said corresponding head, and a plurality of tracks each including a plurality of sectors are defined on said recording surface; Equipped with the first management information associates head identification information with track margins for the plurality of heads; The controller updates the first management information for each of the plurality of heads in accordance with a reference value of a bit error rate and a bit error rate of information read from a track.

2. The disk device according to claim 1.

3. The controller updates the first management information for each of the plurality of heads in accordance with the bit error rate reference value specified in second management information in which head identification information and a bit error rate reference value are associated with each of the plurality of heads, and the bit error rate of information read from the track.

3. The disk device according to claim 2.

4. the tracks on the disk medium are grouped into zones, each zone including two or more tracks; the first management information includes head identification information, zone identification information, and track margins associated with each other for the plurality of heads and the plurality of zones; The controller updates the first management information for each of the plurality of heads and each of the plurality of zones in accordance with a reference value of a bit error rate and a bit error rate of information read from a track.

3. The disk device according to claim 2.

5. The controller updates the first management information for each of the plurality of heads and each of the plurality of zones in accordance with the reference value of the bit error rate specified in third management information in which head identification information, zone identification information, and a reference value of the bit error rate are associated with each of the plurality of heads and the plurality of zones, and the bit error rate of information read from the track.

5. The disk device according to claim 4.

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