Semiconductor device

Abstract

To provide a semiconductor device in which good contact can be made between a trench emitter and a contact electrode by devising the layout of the trench emitter and the contact electrode.SOLUTION: Provided is a semiconductor device having an InsulatedGateBipolarTransistor (IGBT) including a trench gate disposed in a semiconductor substrate, a trench emitter disposed parallel to a gate trench in a plan view of the semiconductor substrate, and a contact electrode disposed parallel to the trench emitter in the plan view of the semiconductor substrate, in which the contact electrode has a protruding portion that protrudes toward the trench emitter in the plan view of the semiconductor substrate and is connected to the trench emitter.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 describes a trench gate IGBT (Insulated Gate Bipolar Transistor) that has a trench gate electrode or a trench emitter electrode between an active region and an inactive region, with the trench gate electrode and trench emitter electrode being provided on either side of the inactive region. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-29434 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the contact electrode makes shear contact with the trench emitter, the contact width may be too wide to allow the metal plug to be embedded in. Therefore, an object of the present disclosure is to provide a semiconductor device that makes good contact between the trench emitter and the contact electrode by devising a layout of the trench emitter and the contact electrode.

[0005] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0006] According to one embodiment, the contact electrode has a protruding portion that protrudes toward the emitter trench in a plan view of the semiconductor substrate and is connected to the emitter trench. [Effects of the Invention]

[0007] According to the embodiment, by devising the layout of the trench emitter and the contact electrode, it is possible to provide a semiconductor device in which good contact is made between the trench emitter and the contact electrode. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic cross-sectional view of a related semiconductor device. [Figure 2] 10A and 10B are diagrams showing variations in layout of a trench emitter, a trench gate, and a contact electrode according to an embodiment and variations in layout of a trench emitter, a trench gate, and a contact electrode according to another embodiment; [Figure 3] 10A and 10B are diagrams showing examples of dimensions of a layout of a trench emitter, a trench gate, and a contact electrode according to an embodiment; [Figure 4] 10 is a diagram showing the relationship between the spacing of the protrusions of the contact electrodes and the electrical characteristics of the semiconductor device according to the embodiment; FIG. [Figure 5] FIG. 10 is a diagram showing a defect that occurs when the width of a contact electrode is too wide. [Figure 6] FIG. 10 is a diagram showing an example in which the layout of the present disclosure is applied to a semiconductor device in which a trench emitter, a trench gate, and a trench emitter are arranged. DETAILED DESCRIPTION OF THE INVENTION

[0009] Embodiment Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the invention according to the claims is not limited to the following embodiments. Furthermore, not all of the configurations described in the embodiments are necessarily essential means for solving the problems. For clarity of explanation, the following description and drawings have been omitted and simplified as appropriate. In each drawing, the same elements are given the same reference numerals, and duplicate explanations are omitted as necessary.

[0010] (Description of Related Semiconductor Devices) FIG. 1 is a schematic cross-sectional view of a related semiconductor device. The related semiconductor device will be described with reference to FIG. 1. As shown in FIG. 1, the related semiconductor device is an IE-type trench gate IGBT, which is a GE-type IGBT (Insulated Gate Bipolar Transistor) having a trench gate electrode or a trench emitter electrode between the active cell region and the inactive cell region. Since the active cell region is narrower than that of a GG-type IGBT, this will be referred to as a GE-S-type IGBT (shrink type) having a trench with a gate potential connected and an emitter potential connected.

[0011] As shown in FIG. 1, the unit cell area of ​​the GE-S type IGBT includes an active cell area 140a and an inactive cell area 140i, and a trench gate electrode 114 and a trench emitter electrode 114e are arranged between the active cell area 140a and the inactive cell area 140i.

[0012] As shown in FIG. 1, a P+ type collector region 118 is provided in the semiconductor region on the back surface of the semiconductor substrate, and a metal collector electrode 117 is provided on the front surface of the P+ type collector region 118. An N- type field stop region 119 is provided between an N- type drift region 120 and the P+ type collector region 118, which constitute the main portion of the semiconductor substrate. An N- type hole barrier region, a P- type body region 115, and an N+ type emitter region 112 are provided on the N- type drift region in the active cell region 140a, in this order from bottom to top. The N+ type emitter region 112 is provided only on the trench gate electrode 114 side. An interlayer insulating film 126 is formed on the trench gate electrode 114, the trench emitter electrode 114e, the P- type body region 115, and the N+ type emitter region 112. A trench emitter electrode 114e and a contact groove 111 extending into the semiconductor substrate are formed in the interlayer insulating film 126 portion in the active cell region 140a. A P+ type body contact region 125 and a P+ type latch-up prevention region are provided from above in the semiconductor region at the bottom of the contact grooves 111 etc. The P type body region 115 and the N+ type emitter region 112 are connected to a metal emitter electrode provided on the interlayer insulating film 126 via the contact grooves 111 etc.

[0013] Here, the N-type hole barrier region is a barrier region for preventing holes from flowing into the path from the N- type drift region 120 to the N+ type emitter region 112, and its impurity concentration is lower than that of the N+ type emitter region 112 and higher than that of the N- type drift region 120. The presence of this N-type hole barrier region effectively prevents holes accumulated in the inactive cell region 140i from entering the emitter path of the active cell region 140a (the path from the N- type drift region 120 to the P+ type body contact region 125).

[0014] In contrast, the N-type drift region 120 in the inactive cell region 140i is provided with, from the bottom up, a P-type floating region 116 and a P-type body region 115, and the depth of the P-type floating region 116 is deeper than the depth of the trench and is distributed so as to cover the lower end of the trench.

[0015] In such related semiconductor devices, a problem exists in that a wide contact electrode makes it difficult to embed a metal plug. Furthermore, the contact electrode must extend in the depth direction so as to penetrate the source N+ region. Therefore, narrowing the contact electrode width poses a problem in that highly accurate photolithography is required.

[0016] (Description of Layout of Trench Emitter, Trench Gate, and Contact Electrode According to the Embodiment and Other Embodiments) 2 is a diagram showing a variation of the layout of the trench emitter, trench gate, and contact electrode according to the embodiment and a variation of the layout of the trench emitter, trench gate, and contact electrode according to another embodiment. The layouts of the trench emitter, trench gate, and contact electrode according to the embodiment and another embodiment will be described with reference to FIG. 2.

[0017] FIG. 2 is a plan view of the semiconductor substrate as seen from above. In a three-dimensional XYZ coordinate system, FIG. 2 is a view as seen from the Z direction, with the semiconductor substrate being the XY plane. FIG. 2(a) is a reference. As shown in FIG. 2(a), a trench emitter 202 is disposed parallel to a trench gate 201. A contact electrode 203 is also disposed parallel to the trench emitter 202 between the trench emitter 202 and the trench gate 201. The trench emitter 202 has a region that overlaps with the contact electrode 203 and is parallel to the contact electrode. This layout has the problem that the width of the contact electrode must be increased to ensure reliable electrical connection with both the trench emitter 202 and the P-type body region 115.

[0018] 2(b) shows a layout of a trench gate, a trench emitter, and a contact electrode according to an embodiment. The semiconductor device includes a trench gate 201 disposed on a semiconductor substrate, a trench emitter 202 disposed parallel to the trench gate 201 in a plan view of the semiconductor substrate, and a contact electrode 203 disposed parallel to the trench emitter 202 in a plan view of the semiconductor substrate. The contact electrode 203 has a protruding portion 204 that protrudes toward the trench emitter 202 in a plan view of the semiconductor substrate and connects to the trench emitter 202.

[0019] By doing so, the trench emitter 202 and the contact electrode 203 can be reliably contacted at the protruding portion 204 .

[0020] 2(c) shows a layout of the trench gate, trench emitter, and contact electrode according to the embodiment. The width of the trench emitter 202 in FIG. 2(c) differs from that in FIG. 2(b). However, the length of the protrusion 204 in a plan view of the semiconductor substrate can be made longer to ensure reliable contact, as long as it is smaller than the width of the trench emitter 202.

[0021] 2(d) shows a layout of the trench gate, trench emitter, and contact electrodes according to the embodiment. There may be a plurality of protrusions 204, and the contact electrodes 203 may be arranged separately for each protrusion 204. In the upper layer, the separated contact electrodes 203 are electrically connected.

[0022] 2(e) shows a layout of a trench gate, a trench emitter, and a contact electrode according to an embodiment. In a plan view of the semiconductor substrate, the trench emitter 202 has a protruding portion 205. The protruding portion 204 of the contact electrode 203 has a region overlapping with the protruding portion 205 of the trench emitter 202. The length of the protruding portion 204 of the contact electrode 203 is smaller than the width of the protruding portion 205 of the trench emitter 202. The trench emitter 202 also has multiple protruding portions 205. In addition, the semiconductor device has a connecting region 206 where the protruding portion 205 of the trench emitter 202 is connected to the protruding portion 205 of another trench emitter 202 at its end.

[0023] By doing so, the protruding portion 204 of the contact electrode can be made longer, and contact between the trench emitter and the contact electrode can be reliably achieved.

[0024] 2(f) shows a layout of a trench gate, a trench emitter, and contact electrodes according to another embodiment. The semiconductor device includes a trench gate 201 disposed on a semiconductor substrate, a trench emitter 202 disposed parallel to the trench gate 201 in a plan view of the semiconductor substrate, and a contact electrode 203 disposed parallel to the trench emitter 202 in a plan view of the semiconductor substrate. The contact electrode 203 is separated into multiple regions in a plan view of the semiconductor substrate, and has a region that overlaps with the trench emitter 202.

[0025] Furthermore, in a plan view of the semiconductor substrate, the trench emitter 202 may have a protruding portion 208, and the contact electrode 203 may have a region 207 that overlaps with the protruding portion 208 of the trench emitter 202. Furthermore, the trench emitter 202 may have a plurality of protruding portions 208. The semiconductor device also has a connecting region 209 where the protruding portion 208 of the trench emitter 202 is connected to the protruding portion 208 of another trench emitter 202 at its end.

[0026] In the upper layer, the regions 207 that overlap with the separated contact electrodes 203 are electrically connected. This increases the degree of freedom in designing the layout of the contact electrodes.

[0027] 2(g) shows a layout of a trench gate, a trench emitter, and a contact electrode according to another embodiment. In a plan view of the semiconductor substrate, the trench emitter 202 has multiple protrusions 208. The semiconductor device has a connecting region 209 where the protrusion 208 of one trench emitter 202 connects to the protrusion 208 of another trench emitter 202 at its end. The contact electrode 203 has a region 210 that overlaps with the connecting region 209.

[0028] In the upper layer, the regions 210 that overlap with the separated contact electrodes 203 are electrically connected. This increases the degree of freedom in designing the layout of the contact electrodes.

[0029] With the above configuration, it is possible to provide a semiconductor device in which good contact can be achieved between the trench emitter and the contact electrode by devising the layout of the trench emitter and the contact electrode.

[0030] (Explanation of Dimensional Examples of Layout of Trench Emitter, Trench Gate, and Contact Electrode According to an Embodiment) Fig. 3 is a diagram showing an example of dimensions of the layout of the trench emitter, trench gate, and contact electrode according to the embodiment. Fig. 4 is a diagram showing the relationship between the spacing of the protruding portions of the contact electrode according to the embodiment and the electrical characteristics of the semiconductor device. An example of dimensions of the layout of the trench emitter, trench gate, and contact electrode according to the embodiment will be described with reference to Figs. 3 and 4.

[0031] 3, it is preferable that dimensions A and B are similar to those of the related semiconductor device. Therefore, it is preferable that the width of the trench emitter is 0.3 μm to 0.8 μm, the same as that of the related semiconductor device. Furthermore, it is preferable that the width E of the contact electrode 203 is 0.2 μm to 0.5 μm.

[0032] The length of the protrusion 204 is preferably 0.2 μm to 0.5 μm, and the width D of the protrusion 204 is preferably 0.2 μm to 0.5 μm.

[0033] Here, let us consider the spacing C between the protrusions 204. A structure was intentionally created in which only the trench emitter 202 and the contact electrode protrusions 204 were connected, with no contact between the trench emitter 202 and the contact electrode 203. In this state, as shown in FIG. 4, when the spacing C between the protrusions 204 was varied from 0 to 150 μm, it was found that the electrical characteristics deteriorated when the spacing C was less than 10 μm. On the other hand, if the spacing C between the protrusions 204 was made too large, the number of contact electrodes 203 connected to the trench emitter 202 would decrease, causing electrical delays and, in principle, deteriorating the characteristics. Therefore, the spacing C between the protrusions 204 is preferably 20 μm to 150 μm. It is particularly preferable that the spacing C between the protrusions 204 be 75 μm, which is the center of the 20 μm to 150 μm range, at which spacing can be increased without changing the characteristics.

[0034] (Explanation of the size of the contact electrode according to the embodiment) 5 is a diagram showing defects that occur when the width of a contact electrode is too wide. The size of the contact electrode will be described with reference to FIG.

[0035] As shown in FIG. 5, if the size E of the contact electrode is greater than twice the thickness of the metal plug F, voids are generated and cracking occurs above them.

[0036] Therefore, it is preferable that the width of the contact electrode in a plan view of the semiconductor substrate is smaller than twice the film thickness of the metal layer that forms the contact electrode.

[0037] (Explanation of an example in which the layout of the present disclosure is applied to a semiconductor device in which a trench emitter, a trench gate, and a trench emitter are arranged) 6 is a diagram showing an example in which the layout of the present disclosure is applied to a semiconductor device in which a trench emitter, a trench gate, and a trench emitter are arranged. With reference to FIG. 6, an example in which the layout of the present disclosure is applied to a semiconductor device in which a trench emitter, a trench gate, and a trench emitter are arranged will be described.

[0038] 6A shows an example in which the layout of the present disclosure is applied to an EGE-type IGBT. As shown in FIG. 6A, the semiconductor device includes a trench gate 601 disposed on a semiconductor substrate, trench emitters 602 disposed on both sides of the trench gate 601 in parallel with each other in a plan view of the semiconductor substrate, and a contact electrode 603 disposed between the trench gate 601 and the trench emitter 602 in parallel with each other in a plan view of the semiconductor substrate. The contact electrode 603 is separated into multiple regions in a plan view of the semiconductor substrate, and has a region that overlaps with the trench emitter 602.

[0039] Furthermore, in a plan view of the semiconductor substrate, the trench emitter 602 has a protruding portion 604. Multiple regions of the contact electrode 603 may have regions 605 that overlap with the protruding portion 604 of the trench emitter 602. In the upper layer, the regions 605 that overlap with the contact electrode 603 are electrically connected. This ensures reliable contact between the trench emitter and the contact electrode of an EGE (trench emitter-trench gate-trench emitter) type IGBT.

[0040] 6(b), the contact electrode 603 arranged parallel to the trench emitter 602 may be divided into islands. The region 605 that overlaps with the contact electrode 603 in the upper layer is electrically connected. This improves the degree of freedom in designing the layout of the EGE-IGBT structure.

[0041] With the above configuration, it is possible to provide a semiconductor device in which good contact can be achieved between the trench emitter and the contact electrode by devising the layout of the trench emitter and the contact electrode.

[0042] For example, the semiconductor device according to the above embodiments may be configured such that the conductivity types (p-type or n-type) of the semiconductor substrate, semiconductor layer, diffusion layer (diffusion region), etc. are reversed. Therefore, when one of the n-type and p-type conductivity types is a first conductivity type and the other conductivity type is a second conductivity type, the first conductivity type can be p-type and the second conductivity type can be n-type, or conversely, the first conductivity type can be n-type and the second conductivity type can be p-type.

[0043] The invention made by the inventor has been specifically described above based on the embodiments, but it goes without saying that the present invention is not limited to the embodiments already described, and various modifications are possible within the scope of the gist of the invention. [Explanation of symbols]

[0044] 111 contact groove, 112 N+ type emitter region, 114 trench gate electrode, 114e trench emitter electrode, 115 P type body region, 116 P type floating region, 117 metal collector electrode, 118 P+ type collector region, 119 N type field stop region, 120 N- type drift region, 125 P+ type body contact region, 126 interlayer insulating film, 140a active cell region, 140i inactive cell region, 201 trench gate, 202 trench emitter, 203 contact electrode, 204 protrusion, 205 protrusion, 206 connecting region, 207 overlapping region, 208 protrusion, 209 connecting region, 601 trench gate, 602 trench emitter, 603 contact electrode, 604 protrusion, 605 overlapping region

Claims

1. a trench gate disposed in a semiconductor substrate; a trench emitter disposed parallel to the trench gate in a plan view of the semiconductor substrate; and a contact electrode disposed parallel to the trench emitter in a plan view of the semiconductor substrate, the contact electrode has a protruding portion that protrudes toward the trench emitter in a plan view of the semiconductor substrate and is connected to the trench emitter. A semiconductor device having an IGBT (Insulated Gate Bipolar Transistor).

2. The semiconductor device according to claim 1 , wherein a length of said protrusion in a plan view of said semiconductor substrate is smaller than a width of said trench emitter.

3. In a plan view of the semiconductor substrate, the width of the trench emitter is 0.3 μm to 0.8 μm; The length of the protrusion is 0.2 μm to 0.5 μm; 3. The semiconductor device according to claim 2, wherein the width of said protrusion is 0.2 [mu]m to 0.5 [mu]m.

4. In a plan view of the semiconductor substrate, The protrusions are plural, The semiconductor device according to claim 1 , wherein the contact electrodes are arranged separately for each of the protrusions.

5. In a plan view of the semiconductor substrate, the trench emitter has a protrusion; the protruding portion of the contact electrode has a region overlapping with the protruding portion of the trench emitter, 2. The semiconductor device according to claim 1, wherein the length of the protruding portion of said contact electrode is smaller than the width of the protruding portion of said trench emitter.

6. The trench emitter has a plurality of protrusions, 6. The semiconductor device according to claim 5, wherein the protruding portion of the trench emitter is connected to the protruding portion of another of the trench emitters at an end portion of the trench emitter by a connecting region.

7. In a plan view of the semiconductor substrate, The protrusions are plural, The semiconductor device according to claim 1 , wherein the protrusions are arranged at intervals of 20 μm to 150 μm.

8. 2. The semiconductor device according to claim 1, wherein a width of said contact electrode in a plan view of said semiconductor substrate is smaller than twice the thickness of a metal layer forming said contact electrode.

9. a trench gate disposed in a semiconductor substrate; a trench emitter disposed parallel to the trench gate in a plan view of the semiconductor substrate; and a contact electrode disposed parallel to the trench emitter in a plan view of the semiconductor substrate, the contact electrode is separated into a plurality of regions in a plan view of the semiconductor substrate, and has a region overlapping with the trench emitter; A semiconductor device having an IGBT (Insulated Gate Bipolar Transistor).

10. In a plan view of the semiconductor substrate, the trench emitter has a protrusion; The semiconductor device according to claim 9 , wherein the contact electrode has a region overlapping with a protruding portion of the trench emitter.

11. The trench emitter has a plurality of protrusions, The semiconductor device according to claim 10 , wherein the protruding portion of the trench emitter has a connecting region at an end thereof that connects to the protruding portion of another of the trench emitters.

12. In a plan view of the semiconductor substrate, the trench emitter has a plurality of protrusions; the protruding portion of one of the trench emitters has a connecting region at an end thereof that connects to the protruding portion of another of the trench emitters; The semiconductor device according to claim 9 , wherein the contact electrode has a region overlapping the coupling region.

13. In a plan view of the semiconductor substrate, the width of the trench emitter is 0.3 μm to 0.8 μm; 10. The semiconductor device according to claim 9, wherein the width of said contact electrode is 0.2 [mu]m to 0.5 [mu]m.

14. 10. The semiconductor device according to claim 9, wherein a width of said contact electrode in a plan view of said semiconductor substrate is smaller than twice the thickness of a metal layer forming said contact electrode.

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