Semiconductor device and cooling element

The semiconductor device addresses the inefficiency of Peltier coolers by using stacked semiconductors with quantum well structures and energy barriers to enhance cooling efficiency through electron tunneling and phonon absorption, achieving efficient heat dissipation.

JP2026031269APending Publication Date: 2026-02-24THE UNIV OF TOKYO +2
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Patent Information

Application Number
JP2024134696
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-09
Publication Date
2026-02-24

AI Technical Summary

Technical Problem

Existing Peltier coolers face challenges in improving cooling efficiency due to electron scattering and heat generation within the element, making it difficult to enhance their performance.

Method used

A semiconductor device is designed with stacked semiconductors of different compositions, featuring quantum well structure layers and energy barrier layers with varying quantum levels and heights, allowing electrons to tunnel through and absorb phonons to increase energy efficiently, thereby enhancing cooling capacity.

Benefits of technology

The semiconductor device effectively suppresses electron scattering and heat generation, leading to improved cooling efficiency and heat dissipation by increasing electron energy through multiple quantum well layers.

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Abstract

To provide a semiconductor device and a cooling element capable of improving cooling efficiency.SOLUTION: In the semiconductor device, semiconductors having mutually different compositions are laminated, one side is used as an emitter for injecting electrons, and the other side is used as a collector for emitting electrons. In the semiconductor device, a plurality of quantum well structure layers and a collector barrier layer laminated adjacent to a quantum well layer at an end on a collector side of the plurality of quantum well structure layers are formed by the semiconductor, each of the plurality of quantum well structure layers includes quantum well layers having quantum levels different from each other, an energy barrier layer is disposed on an emitter side of the quantum well layer of each quantum well structure layer, and the energy barrier layer is set to a barrier higher than the collector barrier layer.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to semiconductor devices and cooling elements. [Background technology]

[0002] In recent years, cooling has become a challenge in various fields. For example, as the integration density of electronic devices has increased, the amount of heat generated by these devices has also increased, making it a challenge to find ways to efficiently cool the heat generated by these electronic devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-194926 Summary of the Invention [Problem to be solved by the invention]

[0004] Patent Document 1 discloses a Peltier cooler as a solid-state cooler that has no moving parts, has a long life span, and can be miniaturized. However, electrons are scattered and conducted within the Peltier element used in the Peltier cooler, which generates heat within the element. For this reason, it is generally difficult to increase the cooling efficiency of a Peltier cooler.

[0005] Under these circumstances, there is a need for a solid-state cooler that can improve cooling efficiency. The present invention has been made in consideration of these circumstances, and one of its objects is to provide a semiconductor device and a cooling element that can improve cooling efficiency. [Means for solving the problem]

[0006] One aspect of the present invention for solving the problems of the above-mentioned conventional examples is a semiconductor device in which semiconductors having different compositions are stacked, one side serving as an emitter for injecting electrons and the other side as a collector for emitting electrons, wherein the semiconductors form a plurality of quantum well structure layers, and a collector barrier layer stacked adjacent to an end quantum well layer of the plurality of quantum well structure layers on the collector side, the plurality of quantum well structure layers each having quantum well layers with different quantum levels, and an energy barrier layer is arranged on the emitter side of the quantum well layer of each quantum well structure layer, and this energy barrier layer is set to have a higher barrier than the collector barrier layer. [Effects of the Invention]

[0007] According to the present invention, the cooling efficiency can be improved. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is an explanatory diagram illustrating an example of a schematic structure of a semiconductor device according to an embodiment of the present invention; [Figure 2] 2A and 2B are explanatory diagrams illustrating examples of quantum well structure layers included in a semiconductor device according to an embodiment of the present invention. [Figure 3] 5A and 5B are explanatory diagrams illustrating an example of changes in the cooling state with respect to the bias voltage of the semiconductor device according to the embodiment of the present invention. [Figure 4] 1A and 1B are explanatory diagrams schematically illustrating electron movement in a semiconductor device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0009] The present invention will be described with reference to the accompanying drawings, in which: the materials and layer thicknesses, ratios, sizes, etc. used in the following description are merely examples for illustrative purposes and may differ from the actual materials within the spirit and scope of the invention.

[0010] As illustrated in FIG. 1, a semiconductor device 1 according to an embodiment of the present invention is formed by stacking (horizontally in the drawing) semiconductors having different compositions and different bandgaps. Specifically, the semiconductor device 1 includes an emitter-side electrode 11, an emitter-side conductive layer 12, a plurality of (here, n) quantum well structure layers 13-1, 13-2, ..., 13-n, a collector-side barrier layer 14, a collector-side conductive layer 15, and a collector-side electrode 16, which are stacked in this order by molecular beam epitaxy or the like.

[0011] Furthermore, each of the quantum well structure layers 13-1, 13-2, ..., 13-n (hereinafter, when it is not necessary to distinguish between the individual quantum well structure layers, they will be simply referred to as quantum well structure layers 13) includes a quantum well layer 132 and an energy barrier layer 131 stacked on the emitter side of the quantum well layer 132, as illustrated in FIG. 2.

[0012] The emitter electrode 11 is made of a conductor such as metal and is connected to the cathode side of a power supply. The emitter conductive layer 12 is formed to a predetermined thickness (approximately 300 nm in one example) using the same semiconductor material as the quantum well layer 132 of the quantum well structure layer 13, which will be described later, such as Si-doped GaAs. The emitter conductive layer 12 conducts electrons injected from the emitter electrode 11 to the emitter end of the quantum well structure layer 13.

[0013] The energy barrier layer 131-i of the quantum well structure layer 13-i (i=1, 2, . . . ) is Al x Ga y As z The energy barrier layer 131-i is a relatively thin layer (for example, about 3 nm thick) made of a semiconductor material such as the above. The energy barrier layer 131-i functions as a potential barrier and inhibits the conduction of electrons with relatively low energy.

[0014] The energy barrier layers 131-i of each quantum well structure layer 13-i may be set to have the same potential barrier height. One of the features of this embodiment is that each of the energy barrier layers 131-i is set to have a barrier higher than the collector barrier layer 14 described later, and is classically (hereinafter, classically means without taking quantum mechanical effects into consideration) set to a state in which the conduction of electrons having energy lower than this barrier is blocked.

[0015] Specifically, the composition of the semiconductor material of each energy barrier layer 131-i is set so that it has an energy barrier that is sufficiently higher (e.g., four to five times higher) than the average energy of electrons injected from the emitter electrode 11. Classically, this is set so that electrons with energies lower than this barrier are prevented from passing through. However, in this embodiment, even if electrons injected from the emitter electrode 11 have energies lower than this barrier with a certain probability, they will pass through the energy barrier due to a quantum effect (tunneling effect, as will be explained later). In this embodiment, the thickness of the energy barrier layer 131-i is experimentally determined so that this probability is set to a desired value. Qualitatively, the higher the height of the energy barrier layer 131-i, the more preferable it is to reduce its thickness.

[0016] For example, if the product of the height Eh of the energy barrier layer 131-i (the energy required to cross without using the tunneling effect) and the thickness W of the energy barrier layer 131-i is constant, it is expected that the probability of passing through the energy barrier layer 131-i by the tunneling effect will be constant. Therefore, in one example of this embodiment, if it is experimentally confirmed that the height Eh and thickness W of a certain energy barrier layer 131-i allow electrons to pass through this energy barrier layer 131-i solely by the tunneling effect as desired with a predetermined probability, when the energy barrier layer 131-i having an energy N times the average energy ε of the electrons injected from the emitter-side electrode 11 is configured, the thickness Wx of the energy barrier layer 131-i can be set as follows: Wx=(Eh×W) / (ε·N) As set forth below.

[0017] With this structure, in this embodiment, the movement of electrons (hot electrons) that have energy higher than the height of the energy barrier layer 131 and pass through the energy barrier layer 131 is blocked, thereby improving the cooling capacity.

[0018] In this example of the present embodiment, the composition ratio of the semiconductor materials may be varied so that the composition ratio of AlAs to GaAs becomes smaller in the energy barrier layer 131 of the quantum well structure layer 13 closer to the emitter. In this example, the energy barrier layer 131 of the quantum well structure layer 13 is configured so that the height of the potential barrier becomes higher in the energy barrier layer 131 of the quantum well structure layer 13 closer to the emitter.

[0019] The quantum well layer 132-i of the quantum well structure layer 13-i is a layer formed of a semiconductor material, such as GaAs, to a thickness of approximately 5 nm, and is located between the emitter-side energy barrier layer 131-i and the energy barrier layer 131-(i+1) of the quantum well structure layer 13-(i+1) adjacent to it on the collector side, or the collector-side barrier layer 14. Because layers that block (classical) electron transmission are formed on both sides, the energy level that electrons can assume in the quantum well layer 132 is determined to be a single level. Hereinafter, this single energy level will be referred to as the quantum level. In this embodiment, the quantum level that electrons can assume in the ith quantum well layer 132-i counting from the emitter side is designated as εi.

[0020] In this embodiment, the quantum well layers 132-i of each quantum well structure layer 13-i are made of different semiconductor materials, and their quantum levels are made different from one another. Specifically, in this embodiment, the quantum well layers 132-i of the quantum well structure layer 13-i closer to the collector have a higher AlAs composition and higher quantum levels. In other words, εi<εi+1 (i=1, 2, ..., n-1).

[0021] With this stacked structure of quantum well structure layers 13, electrons that have absorbed heat and have energy corresponding to the quantum level of each quantum well layer 132 are conducted to the corresponding quantum well layer 132, starting from the quantum well layer 132 of the quantum well structure layer 13 on the emitter side, by tunneling effect via scattering across the energy barrier layer 131 adjacent to the emitter side.

[0022] The semiconductor materials and thicknesses of the energy barrier layer 131 and the quantum well layer 132 are merely examples. For example, the quantum well layer 132 is made of AlAs, which adjusts the composition ratio of GaAs and AlAs to set the height of the quantum level. x Ga y As z Alternatively, InGaAs and InAlAs may be used instead. In this example, the height of the quantum level can be made different by varying the composition ratio of InGaAs and InAlAs.

[0023] Alternatively, the quantum well layer 132 may be formed using InAs and AlSb. In this case, the height of the quantum level is also varied by varying the composition ratio of InAs and AlSb. When the energy barrier layer 131 is formed using InAs and AlSb, the height of the potential barrier becomes relatively high, which is suitable for stacking a larger number of quantum well structure layers 13.

[0024] Alternatively, Si and SiGe may be used as the semiconductor materials for the energy barrier layer 131 and the quantum well layer 132. In this way, the energy barrier layer 131 and the quantum well layer 132 can be formed from various different semiconductor compositions.

[0025] The collector-side barrier layer 14 is made of the same semiconductor material as the energy barrier layers 131 of the quantum well structure layer 13. This collector-side barrier layer 14 is made thicker (for example, 30 nm to 100 nm) than each energy barrier layer 131 of the quantum well structure layer 13. The height and thickness of the barrier of this collector barrier layer 14 are adjusted (experimentally) so that the number of electrons that classically cross the barrier is sufficiently larger than the number of electrons that transmit through the collector barrier layer 14 by the tunneling effect.

[0026] The collector-side conductive layer 15 is a semiconductor layer such as Si-doped GaAs, has a thickness of approximately 200 nm, and conducts electrons introduced across the collector-side barrier layer 14 to the collector-side electrode 16. The collector-side electrode 16 is made of a conductor such as metal, and is connected to the anode side of a power supply.

[0027] [Semiconductor device operation] The semiconductor device 1 according to the embodiment of the present invention basically has the above configuration and operates as follows.

[0028] In order to operate the semiconductor device 1 of this embodiment, it is necessary to apply a bias voltage V, and the magnitude of this bias voltage V is determined experimentally for each combination of semiconductor materials and each layer thickness that constitutes the semiconductor device 1. Specifically, the cooling power per unit area (the area of ​​the surface normal to the stacking direction) and per unit time when the bias voltage V is applied to the semiconductor device 1 is calculated, the bias voltage V that maximizes this cooling power is obtained, and the obtained bias voltage V is applied.

[0029] As an example, to determine the bias voltage V to be applied to a cooling element using this semiconductor device 1, a user of this semiconductor device 1 measures the temperature in each quantum well layer 132-i of the semiconductor device 1 when a certain bias voltage V is applied. This measurement method is widely known, so a detailed description will be omitted.

[0030] The user of the semiconductor device 1 measures and plots the temperature as a function of the applied bias voltage V. An example of the plot obtained in this manner is shown in Fig. 3. Fig. 3 is an explanatory diagram schematically showing the temperatures (QW1, QW2) of the quantum well layers 132-1, 132-2 when a bias voltage of magnitude V is applied to a semiconductor device 1 having two quantum well structure layers 13 according to one aspect of the present embodiment while changing the magnitude V of the voltage.

[0031] 3, it can be seen that the temperature (QW2) of the second quantum well layer 132-2 is lowest when the bias voltage V is between 0.5 V and 0.8 V. Therefore, a user may apply a bias voltage V of 0.5 V to 0.8 V to the semiconductor device 1 in this example and use it as a cooling element.

[0032] In this example, the emitter-side conductive layer 12 is made of GaAs and has a thickness of 300 nm (hereinafter, "thickness" means the thickness in the stacking direction). The quantum well structure layer 13 is made of the following layers, in order from the emitter side: Energy barrier layer 131-1 … 3nm Al 0.7 Ga 0.3 As Quantum well layer 132-1 … 5nm Al0.1Ga0.9As Energy barrier layer 131-2 … 3nm Al 0.7 Ga 0.3 As Quantum well layer 132-2 … 5nm Al 0.2 Ga 0.8 As Furthermore, the collector-side barrier layer 14 is made of 30 nm Al. 0.35 Ga 0.65 The collector-side conductive layer 15 is a 200 nm thick Si-doped GaAs layer.

[0033] Here, when the negative pole of a power supply is connected to the emitter-side electrode 11 of the semiconductor device 1 and the positive pole of the power supply is connected to the collector-side electrode 16, and a bias voltage V is applied between the emitter-side electrode 11 and the collector-side electrode 16, electrons are conducted from the emitter-side electrode 11 through the emitter-side conductive layer 12 to the emitter-side end of the quantum well structure layer 13.

[0034] When a bias voltage is applied in this manner, electrons conducted from the emitter-side conductive layer 12 of the semiconductor device 1 reach the quantum well structure layer 13-1 closest to the emitter, but are unable to pass through the energy barrier layer 131-1.

[0035] However, electrons having quantum level energy ε1 of the quantum well layer 132-1 are included in the electrons conducted from the emitter-side conductive layer 12. As illustrated in Fig. 4, the electrons having the quantum level energy ε1 pass through the energy barrier layer 131-1 of the quantum well structure layer 13-1 closest to the emitter by the resonant tunneling effect, and are conducted to the quantum well layer 132-1 (S1).

[0036] The electrons conducted within the quantum well layer 132-1 absorb phonons of the semiconductor material constituting each part of the semiconductor device 1, and when they reach a state in which they have quantum level energy ε2 of the quantum well layer 132-2 of the quantum well structure layer 13-2 adjacent to the collector side, they pass through the energy barrier layer 131-2 of the quantum well structure layer 13-2 by the resonant tunneling effect and are conducted to the quantum well layer 132-2 (S2).

[0037] Here, since the quantum level in the quantum well layer 132 is configured to become higher on the collector side, the electron energy becomes higher by W1=ε2−ε1.

[0038] Similarly, when the electrons conducted into the quantum well layer 132-i absorb phonons of the semiconductor material constituting each part of the semiconductor device 1 and assume a state in which they have the energy of the quantum level of the quantum well layer 132-(i+1) of the quantum well structure layer 13-(i+1) adjacent to the collector side, they cross the energy barrier layer 131-(i+1) of the quantum well structure layer 13-(i+1) by the resonant tunneling effect and are conducted to the quantum well layer 132-(i+1). At this time, the energy of the electrons also increases by W = εi+1 - εi (S3).

[0039] Then, when the electrons conducted in the nth (collector-side end) quantum well structure layer 13-n absorb phonons from the semiconductor material constituting each part of the semiconductor device 1 and obtain energy εf sufficient to overcome the potential barrier of the collector-side barrier layer 14 adjacent to it on the collector side, the electrons are emitted to the collector-side electrode 16 via the collector-side conductive layer 15 by thermionic emission process (S4). At this time, the electron energy also increases by Wn=εf-εn.

[0040] In this way, in the semiconductor device 1 of this embodiment, when electrons pass through the inside of the stacked multiple quantum well structure layers 13, they absorb phonons of the semiconductor materials that make up each part of the semiconductor device 1, and their energy is increased by Wi.

[0041] When the potential barrier of the collector-side barrier layer 14 is crossed, the energy state becomes W=W1+W2+…Wn It is in a high energy state.

[0042] In the present embodiment, the quantum well structure layers 13 having higher quantum levels are stacked in multiple stages toward the collector side, so that the electron energy can be efficiently increased. In addition, since the electrons are not scattered when they move between the quantum well structure layers 13, heat generation due to the movement of electrons can be suppressed.

[0043] For these reasons, the semiconductor device 1 of this embodiment allows for relatively efficient heat dissipation.

[0044] [Quantum level setting in each quantum well layer] In the semiconductor device 1 of this embodiment, the difference in quantum levels between the quantum well layers 132 of the quantum well structure layer 13 adjacent to each other may be experimentally set so as to increase the cooling capacity.

[0045] For example, when a bias voltage is applied, the difference in quantum levels between the quantum well layers 132 of the adjacent quantum well structure layers 13, i.e., Δε=εi+1−εi, is equal to the value of the polar optical phonon energy of the stacked semiconductor material. The material and thickness of each quantum well structure layer 13 may be set so that: The material and thickness of each quantum well structure layer 13 are determined so that the following is true: TIFF2026031269000003.tif20170. [Explanation of symbols]

[0046] 1 quantum device, 11 emitter side electrode, 12 emitter side conductive layer, 13 quantum well structure layer, 14 collector side barrier layer, 15 collector side conductive layer, 16 collector side electrode, 131 energy barrier layer, 132 quantum well layer.

Claims

1. A semiconductor device in which semiconductors having different compositions are stacked, one side of which serves as an emitter for injecting electrons and the other side of which serves as a collector for emitting electrons, The semiconductor a plurality of quantum well structure layers; a collector barrier layer stacked adjacent to a terminal quantum well layer on the collector side among the plurality of quantum well structure layers; is formed, The plurality of quantum well structure layers are configured by stacking an energy barrier layer and a quantum well layer from the emitter side, the quantum well layers of each quantum well structure layer having a quantum level different from each other, and the energy barrier layer of each quantum well structure layer is set to a barrier higher than that of the collector barrier layer.

2. 10. The semiconductor device of claim 1, A semiconductor device in which the quantum well layers of the plurality of quantum well structure layers have quantum levels set to higher quantum levels in order from the emitter side to the collector side.

3. 3. The semiconductor device of claim 2, A semiconductor device in which the quantum levels of the quantum well layers of adjacent quantum well structure layers are set so that the difference between the quantum levels of the quantum well layers is equal to the polar optical phonon energy of the stacked semiconductor material.

4. 4. The semiconductor device according to claim 1, A semiconductor device in which the energy barrier layer disposed on the emitter side of the quantum well layer of each of the quantum well structure layers has an energy barrier that is sufficiently higher than the average energy of electrons injected from the emitter side.

5. A cooling element including a semiconductor device in which semiconductors having different compositions are stacked, one side of which serves as an emitter for injecting electrons and the other side of which serves as a collector for emitting electrons, The semiconductor device is formed by the stacked semiconductors. a plurality of quantum well structure layers; a collector barrier layer stacked adjacent to a terminal quantum well layer on the collector side among the plurality of quantum well structure layers; a semiconductor device formed thereon, The cooling element is configured such that the plurality of quantum well structure layers are formed by stacking energy barrier layers and quantum well layers from the emitter side, the quantum well layers of each quantum well structure layer have quantum levels different from each other, and the energy barrier layers of each quantum well structure layer are set to have a higher barrier than the collector barrier layer.

Citation Information

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