Image sensor and image processing device

Abstract

To provide an image sensor and an image processing device with improved performance and reliability.SOLUTION: The image sensor includes a pixel array including a plurality of pixel groups having different color filters and in which a plurality of microlenses are arranged, a readout circuit configured to read out pixel signals from the pixel array and generate image data, and a signal processor configured to process the image data, wherein the plurality of pixel groups include a first plurality of unit pixel groups including first and second pixels sharing one of the plurality of microlenses, and the image data includes first image data generated based on pixel signals for the first and second pixels of the first plurality of unit pixel groups and second image data generated based on a pixel signal for the first pixel of the first plurality of unit pixel groups.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to image sensors, and more particularly to image sensors and image processing devices that perform autofocus functions. [Background technology]

[0002] Image sensors, which capture images and convert them into electrical signals, are used in consumer electronics devices such as digital cameras, cell phone cameras, and portable video cameras, as well as cameras mounted on automobiles, security devices, and robots. Such an image sensor comprises a pixel array, each pixel of which comprises a photodiode.

[0003] Image sensors are required to perform an autofocus (AF) function in order to capture images quickly and accurately, and improving the performance and reliability of such sensors is a daily challenge. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in view of the above-mentioned problems with conventional image sensors, and an object of the present invention is to provide an image sensor and an image processing device with improved performance and reliability. [Means for solving the problem]

[0005] In order to achieve the above object, an image sensor according to the present invention includes a pixel array including a plurality of pixel groups each having a different color filter and in which a plurality of microlenses are arranged, wherein the plurality of pixel groups include a plurality of pixels arranged in a row direction and a column direction, a readout circuit that reads out pixel signals output from the pixel array to generate image data, and a signal processing unit that processes the image data, wherein each of the plurality of pixel groups includes a first plurality of unit pixel groups each including a first pixel and a second pixel that share one of the plurality of microlenses, and the image data is generated by the first plurality of unit pixel groups. and second image data generated based on pixel signals for the first pixels of the first plurality of unit pixel groups, wherein the first pixels are arranged in a first column direction and include pixels (1_1) and (1_2) having different microlenses arranged thereon, and pixels (1_3) and (1_4) having different microlenses arranged thereon, and the signal processing unit generates third image data for the pixels (1_1) and (1_2) of the first pixels excluding the pixels (1_3) and (1_4).

[0006] In order to achieve the above object, an image sensor according to the present invention includes first to fourth pixel groups each including a plurality of pixels arranged in a first direction and a second direction intersecting each other, the first to fourth pixel groups each including a first plurality of unit pixel groups each including a first pixel and a second pixel sharing one microlens, a readout circuit for reading out pixel signals output from the plurality of pixels to generate pixel data, a signal processing unit for processing the pixel data, and a signal processing circuit for processing the pixel data, the signal processing circuit ... and a third partition structure extending in the first direction between the first plurality of unit pixel groups in a plan view, wherein the first pixel group includes a (1_1) subgroup adjacent to the first partition structure and arranged in the first direction, and the second pixel group includes a (2_1) subgroup adjacent to the second partition structure and arranged in the first direction, a height of the first and second partition structures is different from a height of the third partition structure, and the signal processing unit generates first image data by sampling pixel data corresponding to the (1_1) subgroup and the (2_1) subgroup.

[0007] In order to achieve the above object, an image processing device according to the present invention includes a pixel array including a plurality of pixel groups each having a different color filter, wherein the plurality of pixel groups includes a plurality of pixels arranged in a first direction and a second direction intersecting each other, a readout circuit that reads out pixel signals output from the pixel array to generate image data, a signal processing unit that generates first and second image data sampled based on the image data, and a processor that receives data related to a phase difference from the signal processing unit, wherein each of the plurality of pixel groups includes a first plurality of unit pixel groups each including a first and second pixel that share one microlens, and The signal processing unit generates the first image data for the (1_1) and (1_2) pixels excluding the (1_3) and (1_4) pixels of the first pixels, and the signal processing unit generates the first image data for the (1_1) and (1_2) pixels excluding the (1_3) and (1_4) pixels of the first pixels.

[0008] An image processing method according to an embodiment of the present invention includes a first chip including first to fourth pixel groups each including a plurality of pixels having first to fourth color filters and arranged in a first direction and a second direction intersecting each other, and first and second partition structures extending in the first direction and spaced apart in the second direction at the peripheries of each of the first to fourth pixel groups, wherein the first and second partition structures are not disposed between pixels in the first to fourth pixel groups, and the image processing method includes the steps of: reading out pixel signals output from the first chip to generate pixel data; and generating first and second image data sampled based on the pixel data, wherein the generating the first image data includes sampling pixel data corresponding to pixels adjacent to the first partition structure and pixel data corresponding to pixels adjacent to the second partition structure. [Effects of the Invention]

[0009] In the image sensor and image processing device according to the present invention, the problem of reduced reliability when performing autofocusing using phase data generated based on pixel signals due to the phenomenon that light incident on pixels is blocked by partition structures as a result of miniaturization of the pixel structure is addressed by not disposing partition structures or disposing partition structures with low heights between unit pixel groups, thereby performing sampling excluding pixels adjacent to areas where no partition structures are disposed or areas where low-height partition structures are disposed, thereby making it possible to perform autofocusing with higher reliability. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a block diagram showing a schematic configuration of an image processing system according to an embodiment of the present invention. [Figure 2] 1 is a block diagram showing a schematic configuration of an image sensor according to an embodiment of the present invention. [Figure 3] 1 is a diagram illustrating a pixel array of an image sensor according to an embodiment of the present invention; [Figure 4]4 is an exemplary circuit diagram of the first pixel group of FIG. 3. [Figure 5] FIG. 4 is a cross-sectional view taken along line AA' in FIG. [Figure 6] 6 is a diagram for explaining an image sensor according to an embodiment of the present invention, and corresponds to FIG. 5. FIG. [Figure 7] 4 is a timing diagram illustrating an operation of an image sensor according to an embodiment of the present invention. [Figure 8] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 9] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 10] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 11] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 12] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 13] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 14] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 15] 1 is a diagram illustrating a pixel array of an image sensor according to an embodiment of the present invention; [Figure 16] 16 is an exemplary circuit diagram of the first pixel group of FIG. 15. [Figure 17] FIG. 16 is a cross-sectional view taken along the line BB' in FIG. [Figure 18] 18 is a diagram for explaining an image sensor according to an embodiment of the present invention, and corresponds to FIG. 17. FIG. [Figure 19] 4 is a timing diagram illustrating an operation of an image sensor according to an embodiment of the present invention. [Figure 20] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 21] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 22] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 23] 2 is a diagram illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention; [Figure 24] 1 is a schematic exploded perspective view illustrating an image sensor according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0011] Next, specific examples of embodiments for carrying out the image sensor and image processing device according to the present invention will be described with reference to the drawings.

[0012] An image sensor according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram showing a schematic configuration of an image processing system (or an image processing device) according to an embodiment of the present invention. FIG. 1 is a diagram for explaining that an image processing system 10 performs an AF (auto-focus) function.

[0013] An image processing system 10 according to an embodiment of the present invention includes an imaging unit 11, an image sensor 100, and a processor 12. The image processing system 10 has a focus detection function. The image sensor 100 and the imaging unit 11 may be included in a camera module. Image processing system 10 may be implemented as an electronic device that captures images, displays the captured images, or performs actions based on the captured images.

[0014] The image processing system 10 can be realized, for example, as a personal computer (PC), an Internet of Things (IoT) device, or a portable electronic device. Portable electronic devices may include notebook personal computers, mobile phones, smartphones, tablet PCs, personal digital assistants (PDAs), enterprise digital assistants (EDAs), digital still cameras, digital video cameras, audio devices, portable multimedia players (PMPs), personal navigation devices (PNDs), mp3 players, handheld game consoles, e-books, wearable devices, and the like. In addition, the image processing system 10 can be installed in electronic devices such as drones, advanced driver assistance systems (ADAS), etc., or electronic devices that are provided as components in vehicles, furniture, manufacturing equipment, doors, various measuring instruments, etc.

[0015] The image processing system 10 may further include other components such as a display, a user interface, and the like. The image processing system 10 can be realized as an SoC (System On Chip). The overall operation of the image processing system 10 is controlled by a processor 12 . The processor 12 provides control signals for the operation of each component, such as the lens driver 11_2 and the controller 120. For example, the imaging unit 11 may further include an aperture driver for driving an aperture, and the processor 12 provides a control signal for controlling the aperture driver. In one embodiment, processor 12 may be an application processor (AP).

[0016] The imaging unit 11 is a component that receives light, and includes an optical lens (11_1) and a lens driving unit (11_2). The optical lens (11_1) includes a plurality of lenses. The image sensor 100 converts an optical signal reflected from the object 20 via the optical lens (11_1) into an electrical signal, and generates image data (for example, IDT in FIG. 2) based on the electrical signal. In FIG. 1, the optical lens (11_1) is shown as being made up of one lens, but is not limited to this. The optical lens (11_1) may be composed of multiple lenses.

[0017] The lens driver (11_2) communicates information related to focus detection with the processor 12 and adjusts the position of the optical lens (11_1) in response to a control signal provided by the processor 12. The lens driving unit (11_2) can move the optical lens (11_1) in a direction that increases or decreases the distance from the object 20, thereby adjusting the distance between the optical lens (11_1) and the object 20. Depending on the position of the optical lens (11_1), the object 20 may be in focus or out of focus. For example, when the distance between the optical lens (11_1) and the object 20 is relatively close, the optical lens (11_1) may be out of the in-focus position for focusing on the object 20, resulting in a phase difference between the images captured by the image sensor 100.

[0018] The lens driver (11_2) moves the optical lens (11_1) in a direction in which the distance from the object 20 increases based on a control signal provided from the processor 12. Alternatively, if the distance between the optical lens (11_1) and the object 20 is relatively far, the optical lens (11_1) may be out of focus, resulting in a phase difference between the images captured by the image sensor 100. The lens driving unit (11_2) moves the optical lens (11_1) in a direction in which the distance from the object 20 decreases, based on a control signal provided from the processor 12. The image sensor 100 converts incident light into an image signal. The image sensor 100 includes a pixel array 110, a control unit 120, and a signal processing unit . The optical signal transmitted through the optical lens (11_1) reaches the light receiving surface of the pixel array 110 and forms an image of the object 20.

[0019] The pixel array 110 may be a complementary metal oxide semiconductor image sensor (CIS) that converts optical signals into electrical signals. The sensitivity of the pixel array 110 is adjusted by the control unit 120. The pixel array 110 includes a plurality of pixels that convert optical signals into electrical signals. Each of the plurality of pixels generates a pixel signal in response to the intensity of the sensed light. Image sensor 100 provides output data (DO in FIG. 2) to processor 12. The output data (DO in FIG. 2) may include phase difference data that includes phase difference information, or may include image data that includes phase information so that the processor 12 can perform a phase difference operation.

[0020] The processor 12 reduces noise on the input data and performs image signal processing to improve image quality, such as gamma correction, color filter array interpolation, color matrix, color correction, and color enhancement. Furthermore, image signal processing is performed to improve image quality, and the generated image data is compressed to generate an image file, or the image data is restored from the image file.

[0021] FIG. 2 is a block diagram showing a schematic configuration of an image sensor according to an embodiment of the present invention. Referring to FIG. 2, the image sensor 100 includes a pixel array 110, a control unit 120, a signal processing unit 130, a row driver 140, and a readout circuit 150. The readout circuit 150 includes a correlated-double sampling (CDS) 151 , an analog-digital converter (ADC) 153 , and a buffer 155 .

[0022] The pixel array 110 converts optical signals into electrical signals and includes a plurality of pixels PX arranged two-dimensionally. Each of the pixels PX generates a pixel signal in response to the intensity of the detected light. The pixel PX can be realized using a photoelectric conversion element such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor), or can be realized using various other photoelectric conversion elements. The pixel array 110 includes color filters to enable sensing of various colors, and each of the plurality of pixels PX senses a corresponding color. This allows the image sensor 100 to generate image data that includes color information. In one embodiment, pixel array 110 may include a plurality of pixels PX arranged along rows and columns. The specific configuration of the pixel array 110 will be described later with reference to FIG.

[0023] Each of the plurality of pixels PX outputs a pixel signal to the CDS 151 via the corresponding first to n-th column output lines (CLO_0 to CLO_n-1). The CDS 151 samples and holds the pixel signals provided by the pixel array 110 . The CDS 151 double samples the level of a specific noise (reset level) and the level corresponding to the image signal (image level), and outputs a level corresponding to the difference between the two. The CDS 151 also receives a ramp signal generated by a ramp signal generator 157, compares the ramp signal with the pixel signal, and outputs the comparison result.

[0024] Analog-to-digital converter 153 converts the analog signal corresponding to the level received from CDS 151 into a digital signal. The buffer 155 latches the digital signals, and the latched digital signals are sequentially output to the signal processing unit 130 or to the outside of the image sensor 100 as image data IDT. In one embodiment, the image data IDT is also referred to as pixel data. The control unit 120 controls the row driver 140 so that the pixel array 110 absorbs light and accumulates electric charges, or temporarily holds the accumulated electric charges, and outputs an electric signal corresponding to the accumulated electric charges to the outside of the pixel array 110. The control unit 120 also controls the readout circuit 150 to measure the levels of the pixel signals provided by the pixel array 110 .

[0025] The row driver 140 generates signals (RSs, TSs, SELSs) for controlling the pixel array 110 and provides these to a plurality of pixels PX. The row driver 140 determines the activation and deactivation timings of the reset control signal RSs, the transfer control signal TSs, and the selection control signal SELSs provided to the plurality of pixels PX. The signal processing unit 130 performs signal processing on the image data IDT provided from the readout circuit 150 . The specific configuration and operation of the signal processing unit 130 will be described later with reference to FIGS.

[0026] FIG. 3 is a diagram illustrating a pixel array of an image sensor according to an embodiment of the present invention. For reference, FIG. 3 shows an exemplary portion of pixel array 110 of FIG. Referring to FIG. 3, the pixel array 110 may include a plurality of pixel groups (PG_1 to PG_4). For example, the plurality of pixel groups (PG_1 to PG_4) include first to fourth pixel groups (PG_1 to PG_4) each including one of the first to third color filters (GF, RF, BF). The first to fourth pixel groups (PG_1 to PG_4) may include a plurality of unit pixel groups (PG1 to PG16). For example, the first to fourth pixel groups (PG_1 to PG_4) include the first to sixteenth unit pixel groups (PG1 to PG16).

[0027] For example, the first pixel group (PG_1) includes the first to fourth unit pixel groups (PG1 to PG4). The second pixel group (PG_2) includes the fifth to eighth unit pixel groups (PG5 to PG8). The third pixel group (PG_3) includes the ninth to twelfth unit pixel groups (PG9 to PG12). The fourth pixel group (PG_4) includes the thirteenth to sixteenth unit pixel groups (PG13 to PG16).

[0028] For example, the first and third unit pixel groups (PG1, PG3) are arranged in the first column group CG1, and the second and fourth unit pixel groups (PG2, PG4) are arranged in the second column group CG2. For example, the ninth and eleventh unit pixel groups (PG9, PG1) are arranged in the first column group CG1, and the tenth and twelfth unit pixel groups (PG10, PG12) are arranged in the second column group CG2. Also, for example, the fifth and seventh unit pixel groups PG5 and PG7 are arranged in the same column group, and the sixth and eighth unit pixel groups PG6 and PG8 are arranged in the same column group. For example, the 13th and 15th unit pixel groups (PG13, PG15) are arranged in the same column group as the 5th and 7th unit pixel groups (PG5, PG7), respectively, and the 14th and 16th unit pixel groups (PG14, PG16) are arranged in the same column group as the 6th and 8th unit pixel groups (PG6, PG8), respectively.

[0029] The pixel array 110 includes a plurality of pixels PX arranged along a first direction X and a second direction Y intersecting the first direction X. Each of the first to sixteenth unit pixel groups (PG1 to PG16) includes two pixels PX that share one microlens 280. Each of the first to sixteenth unit pixel groups (PG1 to PG16) includes sixteen microlenses 280 that are different from one another. The plurality of pixels PX included in the pixel array 110 may all be AF pixels capable of performing the AF function. In the first to fourth pixel groups (PG_1 to PG_4), two pixels PX that share one microlens 280 are disposed adjacent to each other in the first direction X. However, the technical idea of ​​the present invention is not limited to this, and the pixel arrangement direction may be different as will be described later with reference to FIG.

[0030] The first partition structure 250A is disposed between the first to fourth pixel groups (PG_1 to PG_4) in plan view. The first partition structures 250A are disposed in the periphery of each of the first to fourth pixel groups (PG_1 to PG_4) in plan view. The first partition structure 250A surrounds each of the first to fourth pixel groups (PG_1 to PG_4) in plan view. In plan view, no partition structures are arranged between the first to fourth unit pixel groups (PG1 to PG4), between the fifth to eighth unit pixel groups (PG5 to PG8), between the ninth to twelfth unit pixel groups (PG9 to PG12), and between the thirteenth to sixteenth unit pixel groups (PG13 to PG16). However, the technical idea of ​​the present invention is not limited to this, and as will be described later with reference to FIG. 6, a second partition structure 250B can be disposed between them.

[0031] The first partition wall structures 250A extend in the second direction Y and are formed in plurality at intervals in the first direction X in a plan view. In this case, the first and third unit pixel groups PG1 and PG3 of the first pixel group PG_1 are disposed adjacent to one of the plurality of first partition structures 250A. In addition, the fifth and seventh unit pixel groups PG5 and PG7 of the second pixel group PG_2 are disposed adjacent to another one of the plurality of first partition structures 250A. Similarly, the ninth and eleventh unit pixel groups (PG9, PG1) of the third pixel group (PG_3) are disposed adjacent to one of the plurality of first partition structures 250A. In addition, the thirteenth and fifteenth unit pixel groups PG13 and PG15 of the fourth pixel group PG_4 are disposed adjacent to another one of the plurality of first partition structures 250A. In one embodiment, the partition structure is also referred to as a grid pattern.

[0032] The pixel array 110 includes color filters to enable sensing of various colors. Each of the first to sixteenth unit pixel groups (PG1 to PG16) includes one of a green filter GF, a red filter RF, and a blue filter BF. In one embodiment, the arrangement ratio of the red filters RF, the green filters GF, and the blue filters BF in the pixel array 110 may be, but is not limited to, 1:2:1. In one embodiment, four unit pixel groups arranged adjacent to each other among a plurality of unit pixel groups (e.g., the first to sixteenth unit pixel groups (PG1 to PG16)) included in the pixel array 110 include the same color filter. A color filter is arranged in units of four unit pixel groups among the first to sixteenth unit pixel groups (PG1 to PG16).

[0033] For example, the first pixel group (PG_1) includes a green filter GF, the second pixel group (PG_2) includes a red filter RF, the third pixel group (PG_3) includes a blue filter BF, and the fourth pixel group (PG_4) includes a green filter GF. However, without being limited thereto, each of the first to sixteenth pixel groups PG1 to PG16 may include at least one of a yellow color filter, a cyan color filter, and a magenta color filter.

[0034] FIG. 4 is an exemplary circuit diagram of the first pixel group of FIG. The explanation relating to the first pixel group (PG_1) can be similarly applied to each of the second to fourth pixel groups (PG_2 to PG_4). Although FIG. 4 illustrates an embodiment in which pixels included in the first to fourth unit pixel groups (PG1 to PG4) share a floating diffusion region FD, the technical idea of ​​the present invention is not limited to this. Referring to Figures 3 and 4, the first pixel PX11 of the first unit pixel group PG1 includes a first photodiode PD11 and a first transfer transistor TX11, and the second pixel PX12 of the first unit pixel group PG1 includes a second photodiode PD12 and a second transfer transistor TX12.

[0035] The first pixel PX21 of the second unit pixel group PG2 includes a first photodiode PD21 and a first transfer transistor TX21, and the second pixel PX22 of the second unit pixel group PG2 includes a second photodiode PD22 and a second transfer transistor TX22. The first pixel PX31 of the third unit pixel group PG3 includes a first photodiode PD31 and a first transfer transistor TX31, and the second pixel PX32 of the third unit pixel group PG3 includes a second photodiode PD32 and a second transfer transistor TX32. The first pixel PX41 of the fourth unit pixel group PG4 includes a first photodiode PD41 and a first transfer transistor TX41, and the second pixel PX42 of the fourth unit pixel group PG4 includes a second photodiode PD42 and a second transfer transistor TX42.

[0036] The first and second photodiodes (PD11, PD12) of the first unit pixel group PG1, the first and second photodiodes (PD21, PD22) of the second unit pixel group PG2, the first and second photodiodes (PD31, PD32) of the third unit pixel group PG3, and the first and second photodiodes (PD41, PD42) of the fourth unit pixel group PG4 are each a photoelectric conversion element that generates photocharges that change depending on the intensity of light. For example, the first and second photodiodes (PD11, PD12) of the first unit pixel group PG1, the first and second photodiodes (PD21, PD22) of the second unit pixel group PG2, the first and second photodiodes (PD31, PD32) of the third unit pixel group PG3, and the first and second photodiodes (PD41, PD42) of the fourth unit pixel group PG4 are each a PN junction diode that generates charges, i.e., electrons which are negative charges and holes which are positive charges, in proportion to the amount of incident light.

[0037] Each of the first and second transfer transistors (TX11, TX12) of the first unit pixel group PG1 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (e.g., one of TS11, TS12). Each of the first and second transfer transistors (TX21, TX22) of the second unit pixel group PG2 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (e.g., either TS21 or TS22). Each of the first and second transfer transistors (TX31, TX32) of the third unit pixel group PG3 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (e.g., either TS31 or TS32). Each of the first and second transfer transistors (TX41, TX42) of the fourth unit pixel group PG4 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (e.g., either TS41 or TS42).

[0038] The first to fourth unit pixel groups (PG1 to PG4) share the floating diffusion region FD, the selection transistor SX, the source follower SF, and the reset transistor RX with each other. However, unlike the configuration shown in FIG. 4, at least one of the selection transistor SX, the source follower SF, and the reset transistor RX can be omitted. The pixels included in the first to fourth unit pixel groups (PG1 to PG4) output pixel signals VOUT to the same column output line CL0. In this case, the i-th column output line (CLO_i, where i is an integer greater than or equal to 0 and less than (n-1)) is, for example, one of the first to n-th column output lines (CLO_0 to CLO_n-1) in FIG. 2.

[0039] The reset transistor RX periodically resets the charge stored in the floating diffusion region FD. The source electrode of the reset transistor RX is connected to the floating diffusion region FD, and the drain electrode is connected to a power supply voltage VPIX. When the reset transistor RX is turned on in response to the reset control signal RS, the power supply voltage VPIX connected to the drain electrode of the reset transistor RX is transmitted to the floating diffusion region FD. When the reset transistor RX is turned on, the charge stored in the floating diffusion region FD is discharged, and the floating diffusion region FD is reset.

[0040] The source follower SF is controlled according to the amount of photocharge accumulated in the floating diffusion region FD. The source follower SF acts as a buffer amplifier to buffer a signal corresponding to the charge stored in the floating diffusion region FD. The source follower SF amplifies the potential change in the floating diffusion region FD and outputs it to the i-th column output line (CLO_i) as a pixel signal VOUT. The drain electrode of the select transistor SX is connected to the source electrode of the source follower SF. The select transistor SX outputs a pixel signal VOUT to the column output line CDS (eg, 151 in FIG. 2) in response to a select control signal SELS.

[0041] FIG. 5 is a cross-sectional view taken along line AA' in FIG. The image sensor according to one embodiment includes a first substrate 210, a photoelectric conversion layer 212, a first pixel isolation pattern 220, a first electronic element TR1, a first wiring structure IS1, a surface insulating film 240, a color filter 270, a first grid pattern 250A, and a microlens 280.

[0042] The first substrate 210 is a semiconductor substrate. For example, the first substrate 210 can be bulk silicon or silicon-on-insulator (SOI). The first substrate 210 may be a silicon substrate or may include other materials such as silicon germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide. Alternatively, the first substrate 210 may be a base substrate on which an epitaxial layer is formed. The first substrate 210 includes a first surface 210a and a second surface 210b facing each other. The first surface 210a refers to the back side of the first substrate 210, and the second surface 210b refers to the front side of the first substrate 210. In one embodiment, the first surface 210a of the first substrate 210 is a light-receiving surface onto which light is incident. That is, the image sensor according to one embodiment is a backside illuminated (BSI) image sensor.

[0043] The photoelectric conversion layer 212 is formed in the first substrate 210 . The plurality of photoelectric conversion layers 212 are arranged to correspond to the pixels (PX in FIG. 3). For example, the photoelectric conversion layers 212 are arranged two-dimensionally (for example, in a matrix shape) on a plane including the first direction X and the second direction Y, and are disposed in each pixel (PX in FIG. 3). The photoelectric conversion layer 212 generates electric charges in proportion to the amount of light incident from the outside. The photoelectric conversion layer 212 is formed by doping the first substrate 210 with impurities. For example, the photoelectric conversion layer 212 is formed by ion-implanting n-type impurities into the first substrate 210, which is p-type. The photoelectric conversion layer 212 may include, but is not limited to, at least one of a photodiode, a phototransistor, a photogate, a pinned photodiode, an organic photodiode, a quantum dot, and combinations thereof.

[0044] The first pixel separating pattern 220 is formed in the first substrate 210 . The first pixel separation pattern 220 defines pixels (PX in FIG. 3) in the first substrate 210 . For example, the first pixel separation pattern 220 is formed in a grid shape when viewed in a plan view, and surrounds each pixel (PX in FIG. 3) arranged in a matrix shape. In one embodiment, the first pixel separating pattern 220 extends into the first substrate 210 . In one embodiment, the first pixel separating pattern 220 includes a conductive fill pattern 222 and an insulating spacer film 224 . The conductive fill pattern 222 extends into the first substrate 210 , and an insulating spacer layer 224 is disposed between the conductive fill pattern 222 and the first substrate 210 .

[0045] For example, isolation trenches are formed in the first substrate 210 that define pixels (PX in FIG. 3). The insulating spacer film 224 extends along the sides of the isolation trench. A conductive fill pattern 222 is formed on the insulating spacer film 224 and fills the remaining area of ​​the isolation trench. The insulating spacer film 224 electrically insulates the conductive fill pattern 222 from the first substrate 210 . The conductive fill pattern 222 includes, but is not limited to, polysilicon (poly Si), for example. The insulating spacer film 224 may include, for example, but is not limited to, at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof.

[0046] The first electronic element TR1 is formed on the second surface 210b of the first substrate 210. The first electronic element TR1 comprises various transistors for processing electrical signals generated from pixels (PX in FIG. 3). For example, the first electronic element TR1 may include a transistor such as a transfer transistor, a reset transistor, a source follower transistor, or a selection transistor. First wiring structure IS1 is formed on second surface 210b of first substrate 210. The first wiring structure IS1 may include one or more wires. For example, the first wiring structure IS1 includes a first inter-wiring insulating film 230 and a plurality of first wirings 232 in the first inter-wiring insulating film 230. In FIG. 5, the number of layers and arrangement of the wiring constituting the first wiring structure IS1 are merely an example, and the technical idea of ​​the present invention is not limited to this.

[0047] In one embodiment, the first wiring 232 is electrically connected to a pixel (PX in FIG. 3). For example, the first wiring 232 is connected to the first electronic element TR1. The surface insulating film 240 is formed on the first surface 210 a of the first substrate 210 . The surface insulating film 240 extends along the first surface 210 a of the first substrate 210 . The surface insulating film 240 may include, but is not limited to, at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, and combinations thereof. For example, the surface insulating film 240 functions as an anti-reflection film and can prevent the reflection of light incident on the first substrate 210.

[0048] The color filter 270 is formed on the first surface 210 a of the first substrate 210 . For example, the color filter 270 is formed on the surface insulating film 240 . The plurality of color filters 270 are arranged two-dimensionally (for example, in a matrix shape) on a plane including the first direction X and the second direction Y. Referring to FIGS. 3 and 5, a green filter GF is disposed on the pixels PX31, PX32, PX41, and PX42 of the third and fourth unit pixel groups PG3 and PG4.

[0049] The first grid pattern 250A is formed on the first surface 210a of the first substrate 210. For example, the first grid pattern 250A is formed on the surface insulating film 240. The first grid pattern 250A refers to a light blocking pattern, but is not limited thereto. The first grid pattern 250A is arranged around the first to fourth pixel groups (PG_1 to PG_4 in FIG. 3) in plan view. First grid pattern 250A surrounds first to fourth pixel groups (PG_1 to PG_4 in FIG. 3) in plan view. 3 and 5, the first grid pattern 250A surrounds the green filters GF disposed on the pixels (PX in FIG. 3). As a result, the green filter GF is separated from the peripheral color filter 270 by the first grid pattern 250A.

[0050] In one embodiment, the first grid pattern 250A is disposed between color filters 270 having adjacent different color filters 270, but is not disposed between color filters 270 having adjacent identical color filters 270. In one embodiment, first grid pattern 250A penetrates a portion of color filter 270, and the top surface of first grid pattern 250A is positioned below the top surface of color filter 270. Alternatively, the first grid pattern 250A penetrates the color filter 270, and the upper surface of the first grid pattern 250A and the upper surface of the color filter 270 are disposed on substantially the same plane. In one embodiment, the first grid pattern 250A includes a metal pattern 252 and a low refractive index pattern 254. The metal pattern 252 and the low refractive index pattern 254 are sequentially stacked on the surface insulating film 240 .

[0051] The metal pattern 252 may include, but is not limited to, at least one of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), tungsten (W), aluminum (Al), copper (Cu), and combinations thereof. The low refractive index pattern 254 includes a low refractive index material having a refractive index lower than that of silicon (Si). For example, the low refractive index pattern 254 may include, but is not limited to, at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof.

[0052] In one embodiment, a first protective film 260 is further formed on the surface insulating film 240 and the first grid pattern 250A. For example, the first protective film 260 conformally extends along the profile of the upper surface of the surface insulating film 240, the side surfaces of the first grid pattern 250A, and the upper surface. The first protective film 260 is interposed between the surface insulating film 240 and the color filter 270 and between the first grid pattern 250A and the color filter 270. The first protective film 260 can prevent damage to the surface insulating film 240 and the first grid pattern 250A. The first protective film 260 includes, but is not limited to, aluminum oxide, for example.

[0053] The microlenses 280 are formed on the first surface 210 a of the first substrate 210 . For example, the microlenses 280 are formed on the color filters 270 . For example, the microlenses 280 are arranged two-dimensionally (for example, in a matrix shape) on a plane including the first direction X and the second direction Y. The microlenses 280 are arranged to correspond to the first to fourth unit pixel groups (PG1 to PG4 in FIG. 3). The microlens 280 has a convex shape and a predetermined radius of curvature. Therefore, the microlenses 280 condense the light incident on the photoelectric conversion layer 212 . The microlens 280 includes, for example, a light-transmitting resin, but is not limited to this.

[0054] In one embodiment, a second protective film 285 is further formed on the microlens 280 . The second protective film 285 extends along the surface of the microlens 280 . The second protective film 285 includes an inorganic oxide. For example, the second protective film 285 may include, but is not limited to, at least one of silicon oxide, titanium oxide, zirconium oxide, hafnium oxide, and combinations thereof. For example, the second protective film 285 may include low temperature oxide (LTO).

[0055] FIG. 6 is a diagram illustrating an image sensor according to an embodiment of the present invention, and corresponds to FIG. For the sake of convenience, parts that overlap with the contents explained using FIGS. 1 to 5 will be explained briefly or omitted. The description of first grid pattern 250A described with reference to FIG. 5 also applies to first grid pattern 250A in FIG. 3 and 6, the image sensor according to the embodiment of the present invention further includes a second grid pattern 250B arranged between the third unit pixel group (PG3 in FIG. 3) and the fourth unit pixel group (PG4 in FIG. 3).

[0056] The second grid pattern 250B is disposed between the first to fourth unit pixel groups (PG1 to PG4 in FIG. 3) in plan view. The second grid pattern 250B extends in the second direction Y in a plan view. The second grid pattern 250B separates the green filters GF arranged on the first and second pixels (PX31, PX32) of the third unit pixel group (PG3 in FIG. 3) from the green filters GF arranged on the first and second pixels (PX41, PX42) of the fourth unit pixel group (PG4 in FIG. 3). With respect to the height direction perpendicular to the first and second directions (X, Y), the height H2 of the second grid pattern 250B is different from the height H1 of the first grid pattern 250A. For example, with respect to the height direction perpendicular to the first and second directions (X, Y), the height H2 of the second grid pattern 250B is smaller than the height H1 of the first grid pattern 250A.

[0057] FIG. 7 is a timing diagram illustrating the operation of the image sensor according to the embodiment of the present invention. For reference, FIG. 7 is a diagram for explaining a first operation mode in which a value obtained by adding up output values ​​of pixels (or an average value) is output as a sensed voltage. Referring to FIG. 7, the reset transistor RX is turned on in response to the reset control signal RS, and the voltage of the floating diffusion region FD is reset. When the voltage of the floating diffusion region FD is reset, the reset transistor RX is turned off, the selection transistor SX is turned on by the selection control signal SELS, and the CDS 151 of the readout circuit 150 reads out the first reset voltage from the first pixel PX11 of the first unit pixel group PG1.

[0058] 4 and 7, during the first period D1, the first and second transfer transistors TX11 and TX12 of the first unit pixel group PG1 are sequentially turned on, respectively. The first transfer transistor TX11 is turned on at a first time point t1, and the second transfer transistor TX12 is turned on at a second time point t2. When the first transfer transistor TX11 is turned on, the charges generated by the first photodiode PD11 of the first unit pixel group PG1 are provided to the floating diffusion region FD. In this case, the readout circuit 150 generates the (1_1)th image data (not shown) based on the pixel voltage corresponding to the amount of charge provided to the floating diffusion region FD. In addition, as the second transfer transistor TX12 is turned on, the charges generated by the first photodiode PD11 and the second photodiode PD12 of the first unit pixel group PG1 are added together in the floating diffusion region FD. In this case, the readout circuit 150 generates the (1_2)th image data (not shown) based on the pixel voltage corresponding to the amount of charge added in the floating diffusion region FD.

[0059] During the second period D2, the first and second transfer transistors TX21 and TX22 of the second unit pixel group PG2 are sequentially turned on, respectively. The first transfer transistor TX21 is turned on at a third time point t3, and the second transfer transistor TX22 is turned on at a fourth time point t4. When the first transfer transistor TX21 is turned on, the charges generated by the first photodiode PD21 of the second unit pixel group PG2 are provided to the floating diffusion region FD. In this case, the readout circuit 150 obtains the (2_1)th image data (not shown) based on the pixel voltage corresponding to the amount of the charge provided to the floating diffusion region FD. Also, as the second transfer transistor TX22 is turned on, the charges generated by the first photodiode PD21 and the second photodiode PD22 of the second unit pixel group PG2 are added together in the floating diffusion region FD. In this case, the readout circuit 150 generates the (2_2)th image data (not shown) based on the pixel voltage corresponding to the amount of charge added in the floating diffusion region FD.

[0060] During the third period D3, the first and second transfer transistors TX31 and TX32 of the third unit pixel group PG3 are sequentially turned on. The first transfer transistor TX31 is turned on at a fifth time point t5, and the second transfer transistor TX32 is turned on at a sixth time point t6. When the first transfer transistor TX31 is turned on, the charges generated by the first photodiode PD31 of the third unit pixel group PG3 are provided to the floating diffusion region FD. In this case, the readout circuit 150 generates the (3_1)th image data (not shown) based on the pixel voltage corresponding to the amount of charge provided to the floating diffusion region FD. In addition, as the second transfer transistor TX32 is turned on, the charges generated by the first photodiode PD31 and the third photodiode PD32 of the third unit pixel group PG3 are added together in the floating diffusion region FD. In this case, the readout circuit 150 generates the (3_2)th image data (not shown) based on the pixel voltage corresponding to the amount of charge added in the floating diffusion region FD.

[0061] During the fourth period D4, the first and second transfer transistors TX41 and TX42 of the fourth unit pixel group PG4 are sequentially turned on. The first transfer transistor TX41 is turned on at a seventh time point t7, and the second transfer transistor TX42 is turned on at an eighth time point t8. When the first transfer transistor TX41 is turned on, the charges generated by the first photodiode PD41 of the fourth unit pixel group PG4 are provided to the floating diffusion region FD. In this case, the readout circuit 150 generates the (4_1)th image data (not shown) based on the pixel voltage corresponding to the amount of charge provided to the floating diffusion region FD. As the second transfer transistor TX42 is turned on, the charges generated by the first photodiode PD41 and the second photodiode PD42 of the fourth unit pixel group PG4 are added together in the floating diffusion region FD. In this case, the readout circuit 150 generates the (4_2)th image data (not shown) based on the pixel voltage corresponding to the amount of charge added in the floating diffusion region FD. Although not specifically shown in the figure, in this manner, the image sensor acquires image data from pixels PX of the second pixel group (PG_2), from pixels PX of the third pixel group (PG_3), and from pixels PX of the fourth pixel group (PG_4).

[0062] 8 to 11 are diagrams illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention. Referring to FIG. 8, the signal processing unit 130 includes a front-end processing module 131, an image processing module 1322, and an auto-focusing processing module 1321. The modular configuration described below may be realized as a software block executed by a predetermined processor, or as a combination of a dedicated hardware block and a processing unit.

[0063] The image data (IDT in FIG. 2) includes full image data IDTS generated based on pixel signals from all pixels PX in the first to fourth pixel groups (PG_1 to PG_4). The image data (IDT in FIG. 2) also includes first image data IDT1 generated based on pixel signals from the first pixels (PX11, PX21, PX31, PX41) of the first to fourth pixel groups (PG_1 to PG_4).

[0064] 8 and 9, the front-end processing module 131 receives image data (IDT in FIG. 2) output via the readout circuit 150. The front-end processing module 131 receives the full image data IDTS and the first image data IDT1 from the readout circuit 150. The front-end processing module 131 performs pre-processing, such as, but not limited to, dark level correction, on the provided full image data IDTS and first image data IDT1.

[0065] 8 and 10, the auto-focusing processing module 1321 receives the pre-processed first image data IDT1′ from the front-end processing module 131. Although not specifically shown, the autofocus processing module 1321 may include a sampling and binning module. The auto-focusing processing module 1321 generates second image data IDT1L based on the first image data IDT1. The second image data IDT1L is image data generated by sampling pixel data corresponding to the left pixels (PX11, PX31) of the first pixels (PX11, PX21, PX31, PX41) of the first to fourth pixel groups (PG_1 to PG_4). In other words, the pixel data corresponding to the left pixels (PX11, PX31) is data corresponding to the pixels adjacent to the first partition structure 250A described above.

[0066] Also, referring to FIGS. 8 and 11, the auto-focusing processing module 1321 generates third image data IDT1R based on the first image data IDT1 and the second image data IDT1L. The third image data IDT1R is image data generated by sampling pixel data corresponding to the right-side pixels (PX22, PX42) of the second pixels (PX12, PX22, PX32, PX42) of the first to fourth pixel groups (PG_1 to PG_4). In other words, the pixel data corresponding to the right pixels (PX22, PX42) are data corresponding to pixels separated by the first partition structure 250A.

[0067] Referring to FIG. 8, the auto-focusing processing module 1321 generates gray images for the second image data IDT1L and the third image data IDT1R, respectively. The generated image is provided to the processor 12 via a data transmission line based on MIPI (Mobile Industry Processor Interface) 121 and is used for autofocusing. The image processing module 1322 receives the pre-processed full image data IDTS′ from the front-end processing module 131 . The image processing module 1322 generates an image including color information for the full image data IDTS. The generated image is provided to the processor 12 via a data transmission line based on MIPI 121 and is used for autofocusing.

[0068] 12 to 14 are diagrams illustrating the configuration and operation of the signal processing unit of the image sensor according to the embodiment of the present invention. For the sake of convenience, overlapping portions that have already been described in detail using FIGS. 1 to 11 will be briefly described or omitted.

[0069] Referring to FIG. 12, in the first and fourth pixel groups (PG_1, PG_4), two pixels PX that share one microlens 280 are disposed adjacent to each other in the first direction X. In the second and third pixel groups (PG_2, PG_3), two pixels PX that share one microlens 280 are arranged adjacent to each other in the second direction Y. In the first and fourth pixel groups (PG_1, PG_4), the long sides of the two pixels PX that share one microlens 280 are aligned in the second direction Y. In the second and third pixel groups (PG_2, PG_3), the long sides of each of the two pixels PX that share one microlens 280 are aligned in the first direction X.

[0070] 8 and 12, the image data (IDT in FIG. 2) includes full image data IDTS generated based on pixel signals from all pixels PX in the first to fourth pixel groups (PG_1 to PG_4). The image data (IDT in FIG. 2) also includes first image data IDT1 generated based on pixel signals from the first pixels (PX11, PX21, PX31, PX41) of the first to fourth pixel groups (PG_1 to PG_4).

[0071] 8 and 12, the front-end processing module 131 receives image data (IDT in FIG. 2) output via the readout circuit 150. The front-end processing module 131 is provided with the full image data IDTS and the first image data IDT1. The front-end processing module 131 can perform pre-processing, such as, but not limited to, dark correction, on the provided full image data IDTS and first image data IDT1.

[0072] 8 and 13, the auto-focusing processing module 1321 receives the pre-processed first image data IDT1' from the front-end processing module 131. Although not specifically shown, the autofocus processing module 1321 includes a sampling and binning module. The auto-focusing processing module 1321 generates second image data IDT1A based on the first image data IDT1. The second image data IDT1A is image data generated by sampling pixel data corresponding to the left pixels (PX11, PX31) in the first and third pixel groups (PG_1, PG_3) and the upper pixels (PX11, PX21) in the second and fourth pixel groups (PG_2, PG_4).

[0073] Also, referring to FIGS. 8 and 14, the auto-focusing processing module 1321 generates third image data IDT1R based on the first image data IDT1 and the second image data IDT1L. The third image data IDT1B is image data generated by sampling pixel data corresponding to the right-side pixels (PX22, PX42) in the first and third pixel groups (PG_1, PG_3) and the lower-side pixels (PX32, PX42) in the second and fourth pixel groups (PG_2, PG_4).

[0074] The autofocus processing module 1321 generates gray images for the second image data IDT1A and the third image data IDT1B, respectively. The generated image is provided to the processor 12 via a data transmission line based on MIPI 121 and is used for autofocusing. The image processing module 1322 receives the pre-processed full image data IDTS′ from the front-end processing module 131 . The image processing module 1322 generates an image including color information for the full image data IDTS. The generated image is provided to the processor 12 via a data transmission line based on MIPI (Mobile Industry Processor Interface) 121 and is used for autofocusing.

[0075] As pixel structures become finer, the phenomenon in which light incident on a pixel is blocked by a partition structure becomes more pronounced. This can lead to problems with unreliability when performing autofocusing using phase data generated based on pixel signals. In one embodiment, no partition structure or a partition structure with a low height is arranged between the first to fourth unit pixel groups (PG1 to PG4), between the fifth to eighth unit pixel groups (PG5 to PG8), between the ninth to twelfth unit pixel groups (PG9 to PG12), and between the thirteenth to sixteenth unit pixel groups (PG13 to PG16). In one embodiment, the image sensor performs sampling on pixels adjacent to an area where the partition structure is disposed. In other words, by performing sampling excluding pixels adjacent to areas where no partition structure is arranged or areas where a partition structure with a low height is arranged, autofocusing can be performed more reliably.

[0076] FIG. 15 is a diagram illustrating a pixel array of an image sensor according to an embodiment of the present invention, FIG. 16 is an exemplary circuit diagram of the first pixel group of FIG. 15, FIG. 17 is a cross-sectional view taken along line B-B' of FIG. 15, and FIG. 18 is a diagram illustrating an image sensor according to an embodiment of the present invention, and is a diagram corresponding to FIG. 17. For reference, FIG. 15 shows an exemplary portion of pixel array 110 of FIG. For the sake of convenience, overlapping portions that have already been described in detail using FIGS. 1 to 14 will be briefly described or omitted.

[0077] Referring to FIG. 15, the pixel array 110 includes a plurality of pixels PX arranged along a first direction X and a second direction Y. Each of the first to sixteenth unit pixel groups (PG1 to PG16) includes four pixels PX that share one microlens 280. Each of the first to sixteenth unit pixel groups (PG1 to PG16) includes sixteen microlenses 280 that are different from one another. The plurality of pixels PX included in the pixel array 110 may all be AF pixels capable of performing the AF function. In the first to fourth pixel groups (PG_1 to PG_4), four pixels PX that share one microlens 280 are arranged adjacent to each other in the first and second directions (X, Y). The explanation relating to the first pixel group (PG_1) can be similarly applied to each of the second to fourth pixel groups (PG_2 to PG_4).

[0078] Although FIG. 16 illustrates an embodiment in which pixels included in the first to fourth unit pixel groups (PG1 to PG4) share a floating diffusion region FD, the technical idea of ​​the present invention is not limited to this. Referring to Figures 15 and 16, the first pixel PX11 of the first unit pixel group PG1 includes a first photodiode PD11 and a first transfer transistor TX11, and the second pixel PX12 of the first unit pixel group PG1 includes a second photodiode PD12 and a second transfer transistor TX12. The third pixel PX13 of the first unit pixel group PG1 includes a third photodiode PD13 and a third transfer transistor TX13, and the fourth pixel PX14 of the first unit pixel group PG1 includes a fourth photodiode PD14 and a fourth transfer transistor TX14.

[0079] The first pixel PX21 of the second unit pixel group PG2 includes a first photodiode PD21 and a first transfer transistor TX21, and the second pixel PX22 of the second unit pixel group PG2 includes a second photodiode PD22 and a second transfer transistor TX22. The third pixel PX23 of the second unit pixel group PG2 includes a third photodiode PD23 and a third transfer transistor TX23, and the fourth pixel PX24 of the second unit pixel group PG2 includes a fourth photodiode PD24 and a fourth transfer transistor TX24. The first pixel PX31 of the third unit pixel group PG3 includes a first photodiode PD31 and a first transfer transistor TX31, and the second pixel PX32 of the third unit pixel group PG3 includes a second photodiode PD32 and a second transfer transistor TX32. The third pixel PX33 of the third unit pixel group PG3 includes a third photodiode PD33 and a third transfer transistor TX33, and the fourth pixel PX34 of the third unit pixel group PG3 includes a fourth photodiode PD34 and a fourth transfer transistor TX34. The first pixel PX41 of the fourth unit pixel group PG4 includes a first photodiode PD41 and a first transfer transistor TX41, and the second pixel PX42 of the fourth unit pixel group PG4 includes a second photodiode PD42 and a second transfer transistor TX42. The third pixel PX43 of the fourth unit pixel group PG4 includes a third photodiode PD43 and a third transfer transistor TX43, and the fourth pixel PX44 of the fourth unit pixel group PG4 includes a fourth photodiode PD44 and a fourth transfer transistor TX44.

[0080] The first to fourth photodiodes (PD11 to PD14) of the first unit pixel group PG1, the first to fourth photodiodes (PD21 to PD24) of the second unit pixel group PG2, the first to fourth photodiodes (PD31 to PD34) of the third unit pixel group PG3, and the first to fourth photodiodes (PD41 to PD44) of the fourth unit pixel group PG4 are each a photoelectric conversion element that generates photocharges that change according to the intensity of light. For example, the first to fourth photodiodes (PD11 to PD14) of the first unit pixel group PG1, the first to fourth photodiodes (PD21 to PD24) of the second unit pixel group PG2, the first to fourth photodiodes (PD31 to PD34) of the third unit pixel group PG3, and the first to fourth photodiodes (PD41 to PD44) of the fourth unit pixel group PG4 are each a PN junction diode, and generate charges, i.e., electrons which are negative charges and holes which are positive charges, in proportion to the amount of incident light.

[0081] Each of the first to fourth transfer transistors (TX11 to TX14) of the first unit pixel group PG1 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (for example, any one of TS11 to TS14). Each of the first to fourth transfer transistors (TX21 to TX24) of the second unit pixel group PG2 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (for example, any one of TS21 to TS24). Each of the first to fourth transfer transistors (TX31 to TX34) of the third unit pixel group PG3 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (for example, any one of TS31 to TS34). Each of the first to fourth transfer transistors (TX41 to TX44) of the fourth unit pixel group PG4 transfers the generated photocharges to the floating diffusion region FD in response to a corresponding transfer control signal (for example, any one of TS41 to TS44).

[0082] The first to fourth unit pixel groups (PG1 to PG4) share the floating diffusion region FD, the selection transistor SX, the source follower SF, and the reset transistor RX with each other. However, unlike the configuration shown in FIG. 16, at least one of the selection transistor SX, the source follower SF, and the reset transistor RX can be omitted. The pixels included in the first to fourth unit pixel groups (PG1 to PG4) output pixel signals VOUT to the same column output line CL0. In this case, the i-th column output line (CLO_i, where i is an integer greater than or equal to 0 and less than (n-1)) is, for example, one of the first to n-th column output lines (CLO_0 to CLO_n-1) in FIG. 2.

[0083] The reset transistor RX periodically resets the charge stored in the floating diffusion region FD. The source electrode of the reset transistor RX is connected to the floating diffusion region FD, and the drain electrode is connected to a power supply voltage VPIX. When the reset transistor RX is turned on in response to the reset control signal RS, the power supply voltage VPIX connected to the drain electrode of the reset transistor RX is transmitted to the floating diffusion region FD. When the reset transistor RX is turned on, the charge stored in the floating diffusion region FD is discharged, resetting the floating diffusion region FD.

[0084] The source follower SF is controlled according to the amount of photocharge accumulated in the floating diffusion region FD. The source follower SF acts as a buffer amplifier to buffer a signal corresponding to the charge stored in the floating diffusion region FD. The source follower SF amplifies the potential change in the floating diffusion region FD and outputs it to the i-th column output line (CLO_i) as a pixel signal VOUT. The drain electrode of the select transistor SX is connected to the source electrode of the source follower SF. The select transistor SX outputs a pixel signal VOUT to the column output line CDS (eg, 151 in FIG. 2) in response to a select control signal SELS.

[0085] FIG. 19 is a timing diagram illustrating the operation of the image sensor according to the embodiment of the present invention. For reference, FIG. 19 is a diagram illustrating a second operation mode in which sampling and holding and analog-to-digital conversion operations are performed on voltages sensed by all unit pixels constituting the pixel array of the image sensor.

[0086] Referring to FIG. 19, the reset transistor RX is turned on by the reset control signal RS, and the voltage of the floating diffusion region FD is reset. When the voltage of the floating diffusion region FD is reset, the reset transistor RX is turned off, the selection transistor SX is turned on by the selection control signal SELs, and the CDS 151 of the readout circuit 150 reads out the first reset voltage from the first pixel PX11 of the first unit pixel group PG1. When the first reset voltage is read out, the first transfer transistor TX11 is turned on at the first time point t1 by the first transfer control signal TS11, and the charge in the first photodiode PD11 moves to the floating diffusion region FD. The readout circuit 150 reads out the first pixel voltage from the first pixel PX11. The readout circuit 150 may read out the first reset voltage and the first pixel voltage during the first period D1, and the readout circuit 150 may obtain image data corresponding to the difference between the first reset voltage and the first pixel voltage.

[0087] In this manner, the image sensor acquires 16 pieces of image data corresponding to the pixels (PX11 to PX44) of the first to fourth unit pixel groups (PG1 to PG4), respectively. That is, the on / off timings of the transfer transistors (TX11 to TX44) of the first to fourth unit pixel groups (PG1 to PG4) are adjusted to be different from one another via the readout circuit 150, and image data corresponding to each of the pixels (PX11 to PX44) is acquired. Furthermore, in this manner, the image sensor acquires image data corresponding to each pixel PX in the second pixel group (PG_2), acquires image data corresponding to each pixel PX in the third pixel group (PG_3), and acquires image data corresponding to each pixel PX in the fourth pixel group (PG_4).

[0088] 20 to 23 are diagrams illustrating the configuration and operation of a signal processing unit of an image sensor according to an embodiment of the present invention. For the sake of convenience, overlapping portions that have already been described in detail using FIGS. 1 to 19 will be briefly described or omitted. The image data (IDT in FIG. 2) includes full image data (IDTS_1) generated based on pixel voltages from all pixels PX in the first to fourth pixel groups (PG_1 to PG_4). The image data (IDT in Figure 2) also includes first image data (IDT1_1) generated based on pixel voltages from the first pixels (PX11, PX21, PX31, PX41) and third pixels (PX13, PX23, PX33, PX43) of the first to fourth pixel groups (PG_1 to PG_4).

[0089] 20 and 21, the front-end processing module 131 receives image data (IDT in FIG. 2) output via the readout circuit 150. The front-end processing module 131 is provided with the full image data (IDTS_1) and the first image data (IDT1_1). The front-end processing module 131 may perform pre-processing, such as, but not limited to, dark level correction, on the provided full image data (IDTS_1) and first image data (IDT1_1).

[0090] 20 and 22, the auto-focusing processing module 1321 receives the pre-processed first image data (IDT1′_1) from the front-end processing module 131. Although not specifically shown, the autofocus processing module 1321 may include a sampling and binning module. The autofocus processing module 1321 generates second image data (IDT1L_1) based on the first image data (IDT1_1). The second image data (IDT1L_1) is image data generated by sampling pixel data corresponding to the left pixels (PX11, PX13, PX31, PX33) of the first pixels (PX11, PX21, PX31, PX41) and third pixels (PX13, PX23, PX33, PX43) of the first to fourth pixel groups (PG_1 to PG_4).

[0091] Also, referring to FIGS. 20 and 23, the auto-focusing processing module 1321 generates third image data (IDT1R_1) based on the first image data (IDT1_1) and the second image data (IDT1L_1). The third image data (IDT1R_1) is image data generated by sampling pixel data corresponding to the right-hand pixels (PX22, PX24, PX42, PX44) of the second pixels (PX12, PX22, PX32, PX42) and fourth pixels (PX14, PX24, PX34, PX44) of the first to fourth pixel groups (PG_1 to PG_4).

[0092] Referring to FIG. 20, the autofocus processing module 1321 generates gray images for the second image data (IDT1L_1) and the third image data (IDT1R_1), respectively. The generated image is provided to the processor 12 via a data transmission line based on MIPI 121 and is used for autofocusing. The image processing module 1322 receives the pre-processed full image data (IDTS'_1) from the front-end processing module 131. The image processing module 1322 generates an image including color information for the full image data (IDTS_1). The generated image is provided to the processor 12 via a data transmission line based on MIPI (Mobile Industry Processor Interface) 121 and is used for autofocusing.

[0093] FIG. 24 is a schematic exploded perspective view showing an image sensor according to an embodiment of the present invention. The image sensor 100IS is a stacked image sensor including a first chip CP1 and a second chip CP2 stacked in the vertical direction. Image sensor 100IS may be a realization of image sensor 100 described with reference to FIG. Although the image sensor 100IS in FIG. 24 is shown as having a structure in which two chips are stacked, the present invention is not limited to this, and the image sensor 100IS may also have a structure in which three chips are stacked. The first chip CP1 includes a pixel region PR and a pad region PR1, and the second chip CP2 includes a peripheral circuit region PR3 and a lower pad region PR2. In the pixel region PR, a pixel array in which a plurality of pixels PX are arranged is formed, and includes the pixel array 110 described with reference to FIG.

[0094] The first chip CP1 includes partition structures (250A in FIG. 3) extending in the second direction (Y in FIG. 3) and spaced apart in the first direction (X in FIG. 3) around the periphery of each of the first to fourth pixel groups (PG_1 to PG_4 in FIG. 3). The peripheral circuit region PR3 of the second chip CP2 includes a logic circuit block LC and a plurality of transistors. The peripheral circuit region PR3 provides a constant signal to each of the plurality of pixels PX included in the pixel region PR, and reads out pixel signals output from each of the plurality of pixels PX. The readout circuit 150 shown in FIG. 2 is arranged in the peripheral circuit region PR3. The logic circuit block LC includes a signal processing unit SPU. The signal processing unit SPU corresponds to the signal processing unit 130 in FIG. The lower pad region PR2 of the second chip CP2 includes lower conductive pads PAD'. There are a plurality of lower conductive pads PAD', each corresponding to a conductive pad PAD. The lower conductive pads PAD' are electrically connected to the conductive pads PAD of the first chip CP1 by via structures VS.

[0095] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical scope of the present invention. [Explanation of symbols]

[0096] 10 Image Processing System 11 Imaging unit 11_1 Optical Lens 11_2 Lens drive unit 12 processors 20 objects 100 image sensors 110 pixel array 120 control section 121 MIPI 130 Signal Processing Unit 131 Front-end Processing Module 140 Row Driver 150 Readout circuit 151 Correlated Double Sampler (CDS) 153 Analog-to-Digital Converter (ADC) 155 buffers 157 Ramp Signal Generator 210 First board 212 Photoelectric conversion layer 220 First pixel separation pattern 222 Conductive Filling Pattern 224 Insulating spacer film 230 First inter-wiring insulating film 232 1st wiring 240 Surface insulating film 250A First grid pattern (first partition structure) 250B Second grid pattern (first partition wall structure) 252 Metal Pattern 254 Low refractive index pattern 260 1st protective film 270 Color Filter 280 Micro Lenses 285 Second protective film 1321 Autofocus Processing Module 1322 Image Processing Module IS1 1st wiring structure PG1~PG16 (1st~16th) unit pixel groups PG_1~PG_4 (1st~4th) 1st~4th pixel groups PX pixels

Claims

1. a pixel array including a plurality of pixel groups each having a different color filter and each having a plurality of microlenses disposed thereon; wherein the plurality of pixel groups includes a plurality of pixels arranged in a row direction and a column direction, a readout circuit that reads out pixel signals output from the pixel array and generates image data; a signal processing unit that processes the image data, Each of the plurality of pixel groups includes a first plurality of unit pixel groups each including a first pixel and a second pixel that share one of the plurality of microlenses; the image data includes first image data generated based on pixel signals for the first and second pixels of each of the first plurality of unit pixel groups, and second image data generated based on pixel signals for the first pixels of each of the first plurality of unit pixel groups; The first pixel is (1_1)th and (1_2)th pixels arranged in a first column direction and having different microlenses; (1_3) and (1_4) pixels arranged in a second column direction and having different microlenses; The image sensor, wherein the signal processing unit generates third image data for the (1_1) and (1_2) pixels excluding the (1_3) and (1_4) pixels among the first pixels.

2. The signal processing unit a front-end processing module that receives the first image data and the second image data from the readout circuit and performs preprocessing; an autofocusing processing module that receives the preprocessed second image data from the front-end processing module and generates the third image data; 2. The image sensor of claim 1, further comprising: an image processing module receiving the pre-processed first image data from the front-end processing module.

3. the autofocus processing module generates a gray image for the third image data; The image sensor of claim 2 , wherein the image processing module generates an image including color information for the first image data.

4. The second pixel is 2_1 and 2_2 pixels arranged in the first column direction and including different microlenses; (2_3) and (2_4) pixels arranged in the second column direction and including different microlenses; 2. The image sensor of claim 1, wherein the signal processing unit further generates fourth image data for the (2_3) and (2_4) pixels of the second pixels excluding the (2_1) and (2_2) pixels.

5. The image sensor of claim 1 , wherein a plurality of pixels included in the first plurality of unit pixel groups share a floating diffusion region.

6. the first plurality of unit pixel groups, a first unit pixel group including two pixels sharing a first microlens; a second unit pixel group including two pixels sharing a second microlens; a third unit pixel group including two pixels sharing a third microlens; and a fourth unit pixel group including two pixels sharing a fourth microlens.

7. The image sensor of claim 1 , wherein each of the first plurality of unit pixel groups further includes a third and a fourth pixel that share one of the plurality of microlenses.

8. the plurality of pixel groups include first to fourth pixel groups having first to fourth color filters; The first pixel group includes a first plurality of unit pixel groups, each of which includes two pixels sharing one microlens; the second pixel group includes a second plurality of unit pixel groups, each including two pixels sharing one microlens; the third pixel group includes a third plurality of unit pixel groups, each of which includes two pixels sharing one microlens; The image sensor of claim 1 , wherein the fourth pixel group includes a fourth plurality of unit pixel groups, each of which includes two pixels sharing one microlens.

9. a first partition structure disposed between the first to fourth pixel groups in a plan view; a second partition structure disposed between the first plurality of unit pixel groups in a plan view, 9. The image sensor of claim 8, wherein the height of the second barrier structure is lower than the height of the first barrier structure.

10. further including a partition structure disposed between the first to fourth pixel groups in a plan view; The image sensor of claim 8 , wherein the partition structure is not disposed between the first plurality of unit pixel groups.

11. The plurality of pixels are arranged in a first direction and a second direction that intersect with each other, In the first and fourth pixel groups, two pixels sharing one microlens are arranged adjacent to each other in the first direction; The image sensor of claim 8 , wherein two pixels in the second and third pixel groups that share one microlens are disposed adjacent to each other in the second direction.

12. First to fourth pixel groups each including a plurality of pixels arranged in a first direction and a second direction intersecting each other, and each pixel group having a first to fourth color filter, respectively; wherein the first to fourth pixel groups include a first plurality of unit pixel groups each including a first pixel and a second pixel sharing one microlens; a readout circuit that reads out pixel signals output from the plurality of pixels to generate pixel data; a signal processing unit that processes the pixel data; first and second partition structures extending in the first direction and spaced apart from each other in the second direction in a plan view, at peripheries of the first to fourth pixel groups, respectively; a third partition structure extending in the first direction between the first plurality of unit pixel groups in a plan view; the first pixel group includes a (1_1)th sub-group adjacent to the first partition structure and arranged in the first direction, the second pixel group includes a (2_1)th sub-group adjacent to the second partition structure and arranged in the first direction, the heights of the first and second barrier rib structures are different from the height of the third barrier rib structure; The image sensor, wherein the signal processing unit generates first image data by sampling pixel data corresponding to the (1_1) subgroup and the (2_1) subgroup.

13. the first pixel group further includes a (1_2)th sub-group spaced apart from the first partition structure and arranged in the first direction, the second pixel group further includes a (2_2)th sub-group spaced apart from the second partition structure and arranged in the first direction, 13. The image sensor of claim 12, wherein the signal processing unit further generates second image data by sampling pixel data corresponding to the (1_2) subgroup and pixel data corresponding to the (2_2) subgroup.

14. 13. The image sensor of claim 12, wherein the heights of the first and second barrier structures are greater than the height of the third barrier structure.

15. 13. The image sensor of claim 12, wherein the first and second partition structures surround the first to fourth pixel groups, respectively, in a plan view.

16. 13. The image sensor of claim 12, wherein the first to fourth pixel groups each include two pixels that share one microlens.

17. 13. The image sensor of claim 12, wherein the first to fourth pixel groups each include four pixels that share one microlens.

18. a pixel array including a plurality of pixel groups each having a different color filter; wherein the plurality of pixel groups includes a plurality of pixels arranged in a first direction and a second direction that intersect with each other, a readout circuit that reads out pixel signals output from the pixel array and generates image data; a signal processing unit that generates first and second image data sampled based on the image data; a processor that receives data relating to the phase difference from the signal processing unit, Each of the plurality of pixel groups includes a first plurality of unit pixel groups each including a first pixel and a second pixel that share one microlens; The image data is full image data generated based on pixel signals for the first and second pixels of each of the first plurality of unit pixel groups; and third image data generated based on pixel signals for the first pixels of the first plurality of unit pixel groups, The first pixel is (1_1)th and (1_2)th pixels arranged in a first column direction and having different microlenses; (1_3) and (1_4) pixels arranged in a second column direction and having different microlenses; The image processing device, wherein the signal processing unit generates the first image data for the (1_1) and (1_2) pixels excluding the (1_3) and (1_4) pixels of the first pixels.

19. The signal processing unit a front-end processing module that receives the full image data and the third image data from the readout circuit and performs preprocessing; an autofocusing processing module that receives the preprocessed third image data from the front-end processing module and generates the first image data; 19. The image processing apparatus according to claim 18, further comprising: an image processing module that receives the preprocessed full image data from the front-end processing module.

20. the autofocus processing module generates a gray image for the first image data; The image processing device of claim 19, wherein the image processing module generates an image including color information for the full image data.

Images