Semiconductor device

Abstract

To provide a semiconductor device or the like having a new configuration capable of performing reverse display. To provide a semiconductor device or the like having a novel structure capable of suppressing characteristic deterioration of a transistor. To provide a semiconductor device or the like with a new configuration capable of improving operation speed. To provide a semiconductor device or the like having a novel configuration capable of reducing dielectric breakdown of a transistor.SOLUTION: A circuit configuration in which two operations of a first operation and a second operation can be switched by switching a potential of a wiring is provided. By switching between these two operations, the scanning direction can be easily switched. The scanning direction can be switched.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. , process, machine, manufacture, or composition of matter Therefore, one embodiment of the present invention disclosed in this specification more specifically relates to The technical fields include semiconductor devices, display devices, light-emitting devices, power storage devices, imaging devices, memory devices, Examples include their driving methods and their manufacturing methods.

[0003] In this specification and the like, a semiconductor device is an element that can function by utilizing semiconductor characteristics. , circuit, or device. For example, semiconductor elements such as transistors and diodes are As another example, a circuit having a semiconductor element is a semiconductor device. As another example, a device including a circuit having a semiconductor element is a semiconductor device. . [Background technology]

[0004] In a semiconductor device having a display function, as typified by a television receiver, The display orientation is fixed.

[0005] A driver circuit for driving such a semiconductor device is equipped with a shift register. (See Patent Document 1). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] US Patent Application Publication No. 2010 / 0201659 Summary of the Invention [Problem to be solved by the invention]

[0007] In recent years, with the spread of smartphones and other devices, semiconductor devices that display images upside down or leftside upside down have become increasingly common. It is required.

[0008] An object of one embodiment of the present invention is to provide a novel semiconductor device, a novel electronic device, or the like. do.

[0009] Another embodiment of the present invention is to provide a semiconductor device or the like having a novel structure capable of displaying an inverted image. Another object of one embodiment of the present invention is to suppress deterioration of transistor characteristics. Another object of the present invention is to provide a semiconductor device or the like having a novel structure. The object of the present invention is to provide a semiconductor device or the like having a novel configuration that can improve the operating speed. Another embodiment of the present invention is a novel method for reducing dielectric breakdown of a transistor. It is an object of the present invention to provide a semiconductor device or the like having such a structure.

[0010] Note that the problems of one embodiment of the present invention are not limited to the above-listed problems. This does not preclude the existence of other issues. Other issues may be discussed in the following sections. Problems not mentioned in this section are problems that a person skilled in the art would be able to understand by reading the specification or This can be derived from descriptions in drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the above-listed and / or other objects. It solves three problems. [Means for solving the problem]

[0011] One embodiment of the present invention includes first to ninth transistors, and One of the drains of the first transistor and the source of the second transistor is electrically connected to one of the drains of the second transistor. The other of the source and the drain of the first transistor is electrically connected to a first wiring. one of a source and a drain of the second transistor is electrically connected to a second wiring; The other of the source and the drain of the second transistor is electrically connected to a third wiring. One of the source and drain of the third transistor is electrically connected to the gate of the first transistor. The other of the source and the drain of the third transistor is electrically connected to the third wiring. The source or drain of the fourth transistor is connected to the gate of the second transistor. the source of the fourth transistor; The other of the drain and source terminals is electrically connected to a fourth wiring and is connected to the source or drain terminal of the fifth transistor. One of the drains of the first transistor and the second transistor is electrically connected to one of the source and drain of the fourth transistor. The other of the source and the drain of the fifth transistor is electrically connected to the third wiring. The gate of the fifth transistor is electrically connected to the gate of the first transistor, One of the source and drain of the sixth transistor is electrically connected to the gate of the fourth transistor. The other of the source and the drain of the sixth transistor is electrically connected to the fifth wiring. The gate of the sixth transistor is electrically connected to the sixth wiring, and the gate of the seventh transistor is electrically connected to the sixth wiring. One of the source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor. The other of the source and the drain of the seventh transistor is electrically connected to a seventh wiring. The gate of the seventh transistor is electrically connected to an eighth wiring. One of the source and drain of the first transistor is electrically connected to the gate of the eighth transistor. The other of the source and the drain of the transistor is electrically connected to a fifth wiring. The gate of the transistor is electrically connected to the ninth wiring, and the source of the ninth transistor is or one of the drains is electrically connected to the gate of the first transistor, and the other of the drains is electrically connected to the gate of the ninth transistor. The other of the source and drain of the ninth transistor is electrically connected to the seventh wiring. The gate of the transistor is electrically connected to the tenth wiring, and the fifth wiring is In the second operation, either the first potential or the second potential is transmitted. The seventh wiring has a function of transmitting either the first potential or the second potential. During the first operation, either the first potential or the second potential is transmitted, and during the second operation, A semiconductor having a function of transmitting either a first potential or a second potential. It is a body device.

[0012] In one aspect of the present invention, the first wiring has a function of transmitting a first clock signal. the sixth wiring has a function of transmitting a second clock signal; and the eighth wiring The line is preferably a semiconductor device capable of transmitting a third clock signal.

[0013] In one embodiment of the present invention, the second wiring has a function of transmitting an output signal, and the first wiring The 10th wire has the function of transmitting the output signal of the previous stage, and the 9th wire has the function of transmitting the output signal of the next stage. A semiconductor device capable of transmitting an output signal is preferred.

[0014] In one embodiment of the present invention, the fourth wiring has a function of transmitting a first potential, The third wiring is preferably a semiconductor device having a function of transmitting the second potential.

[0015] In one embodiment of the present invention, a first capacitor is provided, and one electrode of the first capacitor is the other of the first capacitor element is electrically connected to one of the source and drain of the transistor. The electrode is preferably a semiconductor device electrically connected to the gate of the first transistor.

[0016] In one embodiment of the present invention, a second capacitor is provided, and one electrode of the second capacitor is connected to a fourth the other of the second capacitor element is electrically connected to one of the source and drain of the transistor. The electrode is preferably a semiconductor device electrically connected to the gate of the fourth transistor.

[0017] In one embodiment of the present invention, the first transistor has a W (W is a channel width) / L (L is a channel length) It is preferable that the W / L of the second to ninth transistors is larger than that of the first to ninth transistors.

[0018] In one embodiment of the present invention, the sixth transistor has a W (W is a channel width) / L (L is a channel length) The W / L of the seventh transistor is 0.8 times or more and 1.2 times or less. Positioning is preferred.

[0019] In one embodiment of the present invention, the eighth transistor has a W (W is a channel width) / L (L is a channel length) The length of the semiconductor device is 0.8 times or more and 1.2 times or less than the W / L of the ninth transistor. Positioning is preferred.

[0020] In one embodiment of the present invention, the first to ninth transistors each have an oxide semiconductor layer in a channel formation region. A semiconductor device having a conductor is preferred.

[0021] One embodiment of the present invention is a display module including the above semiconductor device and an FPC.

[0022] One embodiment of the present invention is a semiconductor device including the above semiconductor device or the above display module, a speaker, an operation button, and a display module. and / or an antenna.

[0023] Note that other aspects of the present invention will be described in the following embodiments and in the accompanying drawings. is written on the surface. [Effects of the Invention]

[0024] One embodiment of the present invention can provide a novel semiconductor device, a novel electronic device, or the like.

[0025] Another embodiment of the present invention is to provide a semiconductor device or the like having a novel structure capable of displaying an inverted image. Another embodiment of the present invention is a novel structure that can suppress deterioration of transistor characteristics. Alternatively, one embodiment of the present invention can provide a semiconductor device or the like having an improved operating speed. It is possible to provide a semiconductor device or the like having a novel configuration that can achieve the above. One embodiment of the present invention provides a semiconductor device or the like having a novel structure that can reduce dielectric breakdown of a transistor. It is possible.

[0026] The effects of one embodiment of the present invention are not limited to the effects listed above. This does not preclude the existence of other effects. Other effects are described below. The effects not mentioned in this section are obvious to those skilled in the art in the specification or This can be derived from descriptions in drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention is to provide the above-listed effects. It may not have any effect. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 2] 1 is a timing chart illustrating one embodiment of the present invention. [Figure 3] 1 is a timing chart illustrating one embodiment of the present invention. [Figure 4] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 5] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 6] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 7] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 8] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 9] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 10] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 11] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 12] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 13] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 14] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 15] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 16] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 17]FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 18] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 19] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 20] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 21] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 22] 1 is a timing chart illustrating one embodiment of the present invention. [Figure 23] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 24] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Figure 25] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 26] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 27] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 28] FIG. 1 is a top view illustrating one embodiment of the present invention. [Figure 29] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 30] FIG. 1 is a projection view illustrating one embodiment of the present invention. [Figure 31] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Figure 32] 1A to 1C illustrate electronic devices according to one embodiment of the present invention. [Figure 33] FIG. 1 is a layout diagram illustrating one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0028] Hereinafter, embodiments will be described with reference to the drawings. It is possible to carry out the invention in various forms and in various ways without departing from the spirit and scope of the invention. It will be readily apparent to those skilled in the art that various modifications may be made to the design and details of the present invention. The present invention should not be construed as being limited to the following description of the embodiments.

[0029] In this specification, the ordinal numbers "first," "second," and "third" are used to indicate the mixture of constituent elements. Therefore, it does not limit the number of components. In addition, the order of the components is not limited. The element referred to as "first" in the above may be used in other embodiments or in the claims. In addition, for example, in the present specification, A component referred to as "first" in one embodiment may be used in other embodiments or in particular It may be omitted in the claims.

[0030] In the drawings, elements that are the same or have similar functions, elements that are made of the same material, or In some cases, the same reference numerals may be used to designate elements or components formed at the same time, and repeated explanations thereof will be omitted. It may be omitted.

[0031] (Embodiment 1) The structure of a semiconductor device according to one embodiment of the present invention will be described with reference to FIG.

[0032] The semiconductor device illustrated in FIG. 1 includes a circuit 100. The circuit 100 controls the potential of a wiring 152. The circuit 100 may be called a logic circuit or a sequential circuit.

[0033] The circuit 100 performs a first operation by switching the potentials of the connected wirings 155 and 157. It is possible to switch between two operations, namely, the first operation and the second operation. The semiconductor device having the circuit 100 capable of switching the scanning direction can be easily performed. The semiconductor device having a display function and a function for switching the scanning direction can A transfer display can be performed.

[0034] The circuit 100 includes transistors 101 to 109 and a capacitor 110. In the figure, the gate of the transistor 101 is indicated as a node ND1. The gate of transistor 102 is shown as node ND3. This indicates:

[0035] The connections between the transistors 101 to 109 and the capacitor 110 will be described.

[0036] One of the source and the drain of the transistor 101 is connected to a wiring 151. The other of the source and drain of the transistor 101 is connected to a wiring 152 .

[0037] One of the source and the drain of the transistor 102 is connected to a wiring 153. The other of the source or drain of the transistor 102 is connected to a wiring 152 .

[0038] The gate of the transistor 103 is connected to the node ND3. One of the source and drain of the transistor 103 is connected to a wiring 153. The other end of the rain is connected to node ND1.

[0039] One of the source and the drain of the transistor 104 is connected to a wiring 154. The other of the source or drain of the transistor 104 is connected to a node ND3.

[0040] The gate of the transistor 105 is connected to the node ND1. One of the source and drain of the transistor 105 is connected to a wiring 153. The other end of the rain is connected to node ND3.

[0041] The gate of the transistor 106 is connected to the wiring 156. One of the source and drain of the transistor 106 is connected to the wiring 155. The other input is connected to node ND2.

[0042] The gate of the transistor 107 is connected to the wiring 158. One of the source and drain of the transistor 107 is connected to a wiring 157. The other input is connected to node ND2.

[0043] The gate of the transistor 108 is connected to a wiring 159. One of the source and drain of the transistor 108 is connected to the wiring 155. The other input is connected to node ND1.

[0044] The gate of the transistor 109 is connected to the wiring 160. One of the source and drain of the transistor 109 is connected to a wiring 157. The other input is connected to node ND1.

[0045] A first electrode of the capacitor 110 is connected to the node ND1. The poles are connected to wires 152 .

[0046] It is preferable that the transistors 101 to 109 have the same polarity. Preferably, transistors 101 to 109 are N-channel. It is preferable that 01 to 109 are P-channel type. This simplifies the manufacturing process. This allows for an improvement in yield and / or a reduction in costs.

[0047] When the transistors 101 to 109 are N-channel type, the transistors 101 to 109 are 09, a transistor having an oxide semiconductor in a channel formation region (OS transistor) The OS transistor can have an access in the channel formation region. Higher mobility and extremely low off-state current than transistors containing amorphous silicon Therefore, the size of the transistors 101 to 109 is reduced, and the nodes ND1 to ND2 are This makes it easier to maintain the potential at ND3.

[0048] The W (channel width) / L (channel length) of the transistor 101 is It is preferable that the W / L of the transistor 109 is larger than that of the transistor 101. Since the supply capacity can be increased, the rise time and fall time of the signal transmitted to the wiring 152 can be reduced. The fall time can be shortened.

[0049] When a transistor is composed of multiple transistors, the W / L is the sum of the W / L of multiple transistors. When transistors are connected in parallel, W is the sum of the W of the multiple transistors, and L is the sum of the W of the multiple transistors. This is the average value of the transistor's L.

[0050] The W / L of the transistor 106 is equal to or approximately equal to the W / L of the transistor 107. Similarly, the W / L of the transistor 108 is preferably equal to the W / L of the transistor 109. It is preferable that the W / L ratio of the transistors is equal to or substantially equal to each other. The W / L of one transistor must be 0.8 times or more and 1.2 times or less than the W / L of the other transistor. More preferably, it is 0.9 times or more and 1.1 times or less. Even when switching between the first operation and the second operation, the current supply capability is equal or approximately equal. This allows the operation to be performed.

[0051] The signals or potentials of the wirings 151 to 160 and the nodes ND1 to ND3 will be described.

[0052] The wiring 151 has a function of transmitting a signal having a high level and a low level. For example, the wiring 151 has a function of transmitting a clock signal. is sometimes referred to as the first clock signal.

[0053] The wiring 152 has a function of transmitting a signal having a high level and a low level. For example, the wiring 152 has a function of transmitting an output signal. It may be called a signal, a selection signal, or a pulse signal.

[0054] The wiring 153 has a function of transmitting a low-level potential. In this case, the wiring 153 has a function of being set to the potential VL.

[0055] The wiring 154 has a function of transmitting a high-level potential. VL), the wiring 154 has a function of being set to a potential VH.

[0056] The wiring 155 has a function of transmitting a signal having a high level and a low level. For example, the wiring 155 is set to a potential VH during the first operation and to a potential VH during the second operation. The potential VL is set at the potential VL.

[0057] The wiring 156 has a function of transmitting a signal having a high level and a low level. For example, the wiring 156 has a function of transmitting a clock signal. is sometimes referred to as the second clock signal. The second clock signal is a clock signal that is generated by the first clock signal. and phase is different.

[0058] The wiring 157 has a function of transmitting a signal having a high level and a low level. For example, the wiring 157 is set to a potential VL during the first operation, and has the function of setting the potential VH at

[0059] The wiring 158 has a function of transmitting a signal having a high level and a low level. For example, the wiring 158 has a function of transmitting a clock signal. The third clock signal is sometimes called the third clock signal. The third clock signal is the first clock signal. Alternatively, the phase is different from that of the second clock signal.

[0060] The wiring 159 has a function of transmitting a signal having a high level and a low level. For example, the wiring 159 transmits the output signal of the circuit 100 at the first operation and the output signal of the circuit 100 at the second operation. During operation, the wiring 159 has a function of transmitting an output signal from the circuit 100 at the subsequent stage. When the output signal to be transmitted is transmitted from an external source, it is sometimes called a start pulse.

[0061] The wiring 160 has a function of transmitting a signal having a high level and a low level. For example, the wiring 160 transmits the output signal of the circuit 100 at the subsequent stage during the first operation, During operation, the wiring 160 has a function of transmitting an output signal from the circuit 100 at the previous stage. When the output signal to be transmitted is transmitted from an external source, it is sometimes called a start pulse.

[0062] As described above, the circuit 100 can be configured to switch the potentials of the connected wirings 155 and 157. The circuit 10 can be switched between two operations, a first operation and a second operation. The semiconductor device having 0 is output to the subsequent circuit 100 in the first scanning direction during the first operation. In the second operation, the output signal is transmitted to the subsequent circuit 100 in the second scanning direction. This switching operation can be achieved by simply switching the potentials of the wirings 155 and 157. As a result, the scanning direction can be easily switched. The semiconductor device can perform inverted display.

[0063] (Embodiment 2) The operation of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 2 and 3. 2. The operation described in FIG. 3 corresponds to the operation of the circuit 100 described in the first embodiment. In this embodiment, the transistors 101 to 109 are N-channel transistors. This is explained as follows.

[0064] In a semiconductor device according to one aspect of the present invention, a downstream circuit in a first scanning direction is In the second operation, the output signal is transmitted to the subsequent circuit 100 in the second scanning direction. FIG. 2 is a timing diagram showing a possible implementation of the first operation. FIG. 3 is an example of a timing chart that can realize the second operation.

[0065] 2 and 3, in order to explain the operation of the circuit 100, the wiring 155, the wiring 157, and the wiring 158, wiring 151, wiring 156, wiring 159, wiring 160, node ND1, node ND 2 shows the potentials of the node ND3 and the wiring 152.

[0066] <Regarding the first operation> First, the first operation will be described with reference to FIG. 2. In the first operation, the potential of the wiring 155 is The first operation is performed by setting the potential of the wiring 157 to VH and the potential of the wiring 158 to VL. The operation will be explained for periods T1 to T6. By tracing the change in the potential of D3 and the change in the potential of the wiring 152 that transmits the output signal, Cut.

[0067] For the sake of simplicity, the potential of the signal transmitted by each wiring and node is set to a high level potential. The explanation will be given using two types of potentials, VH and low-level potential VL. By using two types of potentials, VH and VL, to transmit, the number of potentials to be generated can be reduced. Therefore, the circuit scale for generating the potential can be reduced. In this case, even if the wiring potential is described as the same VH, it does not necessarily mean that they are equipotential, but rather that they are different. Similarly, even if the potential of the wiring is described as the same VL, it does not necessarily mean that it is an equipotential. The same applies to the second operation described later. do.

[0068] The operation during period T1 will be described.

[0069] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VH. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VL, and the transistor Therefore, the potential VH of the wiring 155 is 8 to the node ND1, the potential of the node ND1 rises from VL. The potential of the node ND1 is changed from VH, which is the potential of the gate of the transistor 108, to VH, which is the potential of the transistor 108. When the threshold voltage of 108 (Vth108) is subtracted from the value (VH-Vth108), the transistor Therefore, the node ND1 is in a floating state, and the node ND The potential of 1 is maintained at VH-Vth108.

[0070] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VH, and the transistor 107 Therefore, VL, which is the potential of the wiring 157, is supplied to the transistor 107. Since the voltage is transmitted to the node ND2, the potential of the node ND2 becomes VL.

[0071] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes (VH-Vth108). Therefore, the transistor 105 is turned on. Since the voltage is transmitted to the node ND3 via O5, the potential of the node ND3 becomes VL.

[0072] The potential of the wiring 152 will be described. Therefore, the transistor 101 is turned on. Therefore, the potential of VL of the wiring 151 is Since the potential of the wiring 152 is transmitted to the wiring 152 via the potential V1, the potential of the wiring 152 becomes VL. The output signal of 00 becomes VL.

[0073] The operation during period T2 will be described.

[0074] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VL, and the transistor Therefore, the node ND1 is in a floating state, and the node ND1 The potential is maintained at (VH-Vth108).

[0075] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the node ND2 is in a floating state, and the potential of the node ND2 is maintained at VL.

[0076] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes (VH-Vth108). Therefore, the transistor 105 is turned on. The voltage is transmitted to the node ND3 via the transistor 105, and the potential of the node ND3 becomes VL.

[0077] The potential of the wiring 152 will be described. When the potential of the node ND1 becomes (VH-Vth108), Therefore, the transistor 101 is turned on. The potential of the node ND3 becomes VL, The transistor 102 is turned off. Since the voltage is transmitted to the wiring 152 via the capacitor 101, the potential of the wiring 152 starts to rise from VL. At this time, the capacitor 110 holds the potential difference between the wiring 152 and the node ND1, and The node ND1 is in a floating state. The potential of the node ND1 rises from (VH-Vth108). The potential of either the source or drain of the transistor 101 (VH, which is the potential of the wiring 151) and the The threshold voltage of the transistor 101 (Vth101) must be higher than the sum (VH+Vth101). When the potential of the wiring 152 increases to VH, the potential of the wiring 152 increases to VH. do.

[0078] The operation during period T3 will be described.

[0079] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VH, and the transistor 109 As will be described later, the potential of node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 157 is applied to the transistor 109. The potential VL of the wiring 153 is transmitted to the node ND1 via the Since the voltage is transmitted to the node ND1 via O3, the potential of the node ND1 becomes VL.

[0080] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VH. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, VH, which is the potential of the wiring 155, is supplied to the transistor 106. The potential of the node ND2 rises from VL. The potential of D2 is changed from the potential of the gate of the transistor 106 (VH, which is the potential of the wiring 156) to the potential of the transistor 106. The value obtained by subtracting the threshold voltage (Vth106) of the transistor 106 is (VH-Vth106). Therefore, the node ND2 is in a floating state. The potential of the node ND2 is maintained at (VH-Vth106).

[0081] The potential of the node ND3 will be explained. When the potential of the node ND2 is (VH-Vth106), Therefore, the transistor 104 is turned on. Therefore, the potential of the wiring 154 is The potential of the node ND3 rises because the voltage is transmitted to the node ND3 via the node ND4. The potential difference between the node ND3 and the node ND2 is The node ND1 is held in a floating state by the parasitic capacitance between the other node and the Therefore, as the potential at the node ND3 rises, the potential at the node ND2 rises. The potential of the node ND2 is the potential of one of the source and drain of the transistor 104 (the potential of the wiring 15 The sum (VH+ When the potential at the node ND3 exceeds Vth104), the potential at the node ND3 rises to VH.

[0082] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. 2 is turned on. Therefore, VL, which is the potential of the wiring 153, is supplied to the The potential of the wiring 152 becomes VL. The signal goes to VL.

[0083] The operation during period T4 will be described.

[0084] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0085] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VH, and the transistor 107 Therefore, VL, which is the potential of the wiring 157, is supplied to the transistor 107. Since the voltage is transmitted to the node ND2, the potential of the node ND2 becomes VL.

[0086] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes VL, so the transistor 104 becomes non-conductive. Therefore, the node ND3 is in a floating state, and the potential of the node ND3 However, since the potential of the node ND2 drops, the potential of the node ND3 is often lower than VH.

[0087] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. 2 is turned on. Therefore, VL, which is the potential of the wiring 153, is supplied to the The potential of the wiring 152 becomes VL. The signal goes to VL.

[0088] The operation during period T5 will be described.

[0089] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0090] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the node ND2 is in a floating state, and the potential of the node ND2 is maintained at VL.

[0091] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes VL, so the transistor 104 becomes non-conductive. Therefore, the node ND3 is in a floating state, and the potential of the node ND3 is maintained in VH.

[0092] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. 2 is turned on. Therefore, VL, which is the potential of the wiring 153, is supplied to the The potential of the wiring 152 becomes VL. The signal goes to VL.

[0093] The operation during period T6 will be described.

[0094] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0095] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VH. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, VH, which is the potential of the wiring 155, is supplied to the transistor 106. The potential of the node ND2 rises from VL. The potential of D2 is changed from the potential of the gate of the transistor 106 (VH, which is the potential of the wiring 156) to the potential of the transistor 106. When the value obtained by subtracting the threshold voltage of the transistor 106 (VH-Vth106) is reached, the transistor 106 is turned off. Therefore, the node ND2 is turned on and the voltage of the node ND2 is The position is maintained at VH-Vth106.

[0096] The potential of the node ND3 will be explained. When the potential of the node ND2 is (VH-Vth106), Therefore, the transistor 104 is turned on. Therefore, the potential of the wiring 154, VH, is turned off. The voltage is transmitted to the node ND3 via the transistor 104, and the potential of the node ND3 rises. At this time, the potential difference between the node ND3 and the node ND2 is or the other drain is held by a parasitic capacitance between the node ND1 and the node ND2. Therefore, as the potential of the node ND3 rises, the potential of the node ND2 The potential of the node ND2 rises. potential (VH, which is the potential of the wiring 154) and the threshold voltage (Vth104) of the transistor 104. When the potential of the node ND3 rises to VH, the potential of the node ND3 rises to VH. .

[0097] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. Therefore, the potential of the wiring 153 is applied to the wiring 15 through the transistor 102. 2, the potential of the wiring 152 becomes VL. becomes.

[0098] The above is the description of the first operation. In a semiconductor device having a plurality of circuits 100, For example, the output signal can be transmitted to the (n-1)th stage, nth stage, (n+ 1) In a semiconductor device in which circuits 100 of the second stage (n is a natural number of 2 or more) are provided in order, Output signals are output in the scanning direction, i.e., in the order of (n-1)th stage, nth stage, and (n+1)th stage. It is possible.

[0099] Specifically, in the n-th stage circuit 100, the potential of the wiring 155 is set to VH and the potential of the wiring 157 is set to VL. The signal transmitted to the wiring 159 is set as the output signal of the circuit 100 in the previous stage (n-1 stage), and the signal transmitted to the wiring 159 is set as the output signal of the circuit 100 in the previous stage (n-1 stage). The signal transmitted to the circuit 60 is used as the output signal of the circuit 100 at the subsequent stage (n+1 stage). An output signal can be output in a direction.

[0100] <Regarding the second operation> Next, the second operation will be described with reference to Fig. 3. The second operation is performed by changing the voltage of the wiring 155. This is done by setting the potential of the wiring 157 to VH. The operation will be explained by dividing it into periods t1 to t6. The operation in each period is By tracking the change in the potential of ND3 and the change in the potential of the wiring 152 that transmits the output signal, It can be clarified.

[0101] The operation during period t1 will be described.

[0102] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VH, and the transistor 109 As will be described later, the potential of node ND3 becomes VL, and the transistor Therefore, the potential VH of the wiring 157 is 9 to the node ND1, the potential of the node ND1 rises from VL. The potential of the node ND1 is equal to the potential of the gate of the transistor 109 (the potential of the wiring 160, V H) minus the threshold voltage (Vth109) of the transistor 109 (VH-Vth10 9), the transistor 109 is turned off. Therefore, the node ND1 is in a floating state. The potential of the node ND1 is maintained at VH-Vth109.

[0103] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VH. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the potential VL of the wiring 155 is applied through the transistor 106. Since the voltage is transmitted to the node ND2, the potential of the node ND2 becomes VL.

[0104] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes (VH-Vth109). Therefore, the transistor 105 is turned on. The voltage is transmitted to the node ND3 via the transistor 105, and the potential of the node ND3 becomes VL.

[0105] The potential of the wiring 152 will be described. When the potential of the node ND1 becomes (VH-Vth109), Therefore, the transistor 101 is turned on. The potential of the node ND3 becomes VL, Therefore, the potential VL of the wiring 151 is The potential of the wiring 152 becomes VL because the potential is transmitted to the wiring 152 via the resistor 101. , the output signal of the circuit 100 becomes VL.

[0106] The operation during period t2 will be described.

[0107] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VL, and the transistor Therefore, the node ND1 is in a floating state, and the node ND1 The potential is maintained at (VH-Vth109).

[0108] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the node ND2 is in a floating state, and the potential of the node ND2 is maintained at VL.

[0109] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes (VH-Vth109). Therefore, the transistor 105 is turned on. The voltage is transmitted to the node ND3 via the transistor 105, and the potential of the node ND3 becomes VL.

[0110] The potential of the wiring 152 will be described. When the potential of the node ND1 becomes (VH-Vth109), Therefore, the transistor 101 is turned on. The potential of the node ND3 becomes VL, Therefore, the transistor 102 is turned off. The potential of the wiring 152 starts to rise from VL. At this time, the capacitor 110 holds the potential difference between the wiring 152 and the node ND1. In addition, the node ND1 is in a floating state. The potential of the node ND1 rises from (VH-Vth109). The potential of one of the source and drain of the transistor 101 (VH, which is the potential of the wiring 151) The sum of the threshold voltage (Vth101) of the transistor 101 (VH+Vth101) is higher than When the potential of the wiring 152 decreases, the potential of the wiring 152 increases to VH. becomes.

[0111] The operation during period t3 will be described.

[0112] The potential of the node ND1 will be described. Since the wiring 159 is set to VH, The potential of the wiring 160 becomes VL, so that the transistor 109 becomes non-conductive. As will be described later, the potential of the node ND3 becomes VH, and the transistor 10 3 is turned on. Therefore, the potential of VL of the wiring 155 is supplied to the node 104 through the transistor 108. The potential VL of the wiring 153 is supplied to the transistor 103. is supplied to the node ND1 via the potential VL.

[0113] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VH, and the transistor 107 Therefore, VH, which is the potential of the wiring 157, is supplied to the node 104 through the transistor 107. Then, the potential of the node ND2 rises from VL. The potential of the transistor 107 is changed from the potential of the gate of the transistor 107 (VH, which is the potential of the wiring 158) to the potential of the transistor 107. When the threshold voltage of transistor 107 (Vth107) is subtracted (VH-Vth107), Therefore, the node ND2 is in a floating state, and the transistor 107 is in a non-conducting state. The potential of the node ND2 is maintained at (VH-Vth107).

[0114] The potential of the node ND3 will be explained. The potential of the node ND2 becomes VH-Vth107. Therefore, the transistor 104 is turned on. Therefore, the transistor 105 is in a non-conductive state. The potential at the node ND3 rises because the voltage is transmitted to the node ND3 via the transistor 104. When the potential difference between the node ND3 and the node ND2 is The node ND2 is held by the parasitic capacitance between the drain and the other node, and the node ND2 is in a floating state. Therefore, as the potential of the node ND3 rises, the potential of the node ND2 also rises. The potential of the node ND2 is equal to the potential of one of the source and drain of the transistor 104 (arrangement The sum of VH, which is the potential of the line 154, and the threshold voltage of the transistor 104 (Vth104) ( When the potential of the node ND3 becomes higher than VH+Vth (04), the potential of the node ND3 rises to VH.

[0115] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. Therefore, the potential of the wiring 153 is applied to the wiring 15 through the transistor 102. 2, the potential of the wiring 152 becomes VL. becomes.

[0116] The operation during period t4 will be described.

[0117] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0118] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VH. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the potential VL of the wiring 155 is applied through the transistor 106. Since the voltage is transmitted to the node ND2, the potential of the node ND2 becomes VL.

[0119] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes VL, so the transistor 104 becomes non-conductive. Therefore, the node ND3 is in a floating state, and the potential of the node ND3 However, since the potential of the node ND2 drops, the potential of the node ND3 is often lower than VH.

[0120] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. 2 is turned on. Therefore, VL, which is the potential of the wiring 153, is supplied to the The potential of the wiring 152 becomes VL. The signal goes to VL.

[0121] The operation during period t5 will be described.

[0122] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0123] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VL, and the transistor 107 Therefore, the node ND2 is in a floating state, and the potential of the node ND2 is maintained at VL.

[0124] The potential of the node ND3 will be explained. Since the potential of the node ND2 becomes VL, The potential of the node ND1 becomes VL, so the transistor 104 becomes non-conductive. Therefore, the node ND3 is in a floating state, and the potential of the node ND3 is maintained in VH.

[0125] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. Therefore, the potential of the wiring 153 is applied to the wiring 15 through the transistor 102. 2, the potential of the wiring 152 becomes VL. becomes.

[0126] The operation during period t6 will be described.

[0127] The potential of the node ND1 will be described. The potential of the wiring 159 becomes VL. The potential of the wiring 160 becomes VL, and the transistor 109 As will be described later, the potential of the node ND3 becomes VH, and the transistor Therefore, the potential VL of the wiring 153 is 3 to the node ND1, so that the potential of the node ND1 becomes VL.

[0128] The potential of the node ND2 will be described. The potential of the wiring 156 becomes VL. The potential of the wiring 158 becomes VH, and the transistor 107 Therefore, VH, which is the potential of the wiring 157, is supplied to the transistor 107. The potential of the node ND2 rises from VL. The potential of D2 is changed from the potential of the gate of the transistor 107 (VH, which is the potential of the wiring 158) to the potential of the transistor 107. When the value obtained by subtracting the threshold voltage of the transistor 107 (VH-Vth107) is reached, the transistor 107 is in a non-conducting state. Therefore, the node ND2 is in a floating state, and the voltage of the node ND2 The position is maintained at VH-Vth107.

[0129] The potential of the node ND3 will be explained. The potential of the node ND2 becomes VH-Vth107. Therefore, the transistor 104 is turned on. Therefore, the transistor 105 is in a non-conductive state. The potential at the node ND3 rises because the voltage is transmitted to the node ND3 via the transistor 104. When the potential difference between the node ND3 and the node ND2 is The node ND2 is held by the parasitic capacitance between the drain and the other node, and the node ND2 is in a floating state. Therefore, as the potential of the node ND3 rises, the potential of the node ND2 also rises. The potential of the node ND2 is equal to the potential of one of the source and drain of the transistor 104 (arrangement The sum of VH, which is the potential of the line 154, and the threshold voltage of the transistor 104 (Vth104) ( When the potential of the node ND3 becomes higher than VH+Vth (04), the potential of the node ND3 rises to VH.

[0130] The potential of the wiring 152 will be described. The potential of the node ND1 becomes VL. The potential of the node ND3 becomes VH, and the transistor 101 becomes non-conductive. 2 is turned on. Therefore, VL, which is the potential of the wiring 153, is supplied to the The potential of the wiring 152 becomes VL. The signal goes to VL.

[0131] The above is the description of the second operation. In a semiconductor device having a plurality of circuits 100, For example, the output signal can be transmitted to the (n-1)th stage, nth stage, (n+ 1) In a semiconductor device in which circuits 100 of the second stage (n is a natural number of 2 or more) are provided in order, The second scanning direction is opposite to the scanning direction, that is, the (n+1)th stage, nth stage, and (n-1)th stage. The output signals can be output in turn.

[0132] Specifically, in the n-th stage circuit 100, the potential of the wiring 157 is set to VH and the potential of the wiring 155 is set to VL. The signal transmitted to the wiring 159 is set as the output signal of the circuit 100 in the previous stage (n-1 stage), and the signal transmitted to the wiring 159 is set as the output signal of the circuit 100 in the previous stage (n-1 stage). The signal transmitted to the second scanning line 60 is used as the output signal of the circuit 100 at the next stage (n+1 stage). An output signal can be output in a direction.

[0133] <Summary> The operation of the circuit 100 described above is controlled by switching the potentials of the wirings 155 and 157. The scanning direction can be switched in the semiconductor device having the scanning direction 100. The semiconductor device having a display function and a switching function can perform inverted display. Cut.

[0134] In the operation of the circuit 100, the node ND1 is in a floating state and the potential of the wiring 152 is increased. Therefore, even if the potential of the node ND1 is lower than VH, the wiring 152 Therefore, the potential of the output signal transmitted to the wiring 152 can be boosted to VH and output. This can reduce malfunctions of circuits that operate in this manner.

[0135] Similarly, in the operation of the circuit 100, the node ND2 is in a floating state, and the potential of the node ND3 is increased. Therefore, even if the potential of the node ND2 is lower than VH, Therefore, the potential of the node ND3 can be boosted to VH and output. In response to this, malfunction of the transistors 102 and 103, which switch between a conductive state and a non-conductive state, is reduced. It is possible.

[0136] (Embodiment 3) In this embodiment, a modification of the first and second embodiments will be described.

[0137] In the first and second embodiments, transistors 101 to 109 are used as an example of the circuit and an example of the operation. and the capacitor 110 are illustrated, one embodiment of the present invention is not limited thereto. Furthermore, the circuit may have other transistors and / or other capacitors. Furthermore, one embodiment of the present invention is a method for providing a variety of wirings by providing or omitting separate wirings. A modified example of such a circuit configuration will be described below.

[0138] In this embodiment, if the explanation overlaps with that in the first and second embodiments, the explanation will be omitted. do.

[0139] <Variation 1> The semiconductor device shown in FIG. 4 differs from that shown in FIG. 1 in that the circuit 100 includes a transistor 111. .

[0140] The gate of the transistor 111 is connected to the wiring 154. One of the drains is connected to the gate of the transistor 101 and the first electrode of the capacitor 110. The other of the source and drain of the transistor 111 is connected to the The other of the source and drain, the gate of the transistor 105, and the source of the transistor 108 or the other of the drain and the source or drain of the transistor 109. .

[0141] In the semiconductor device shown in FIG. 4, the transistor 111 is in a non-conductive state during periods T2 and t2. Therefore, the other of the source or drain of the transistor 111 (the source of the transistor 108) The potential of the other side (source or drain) does not increase with the increase in the potential of the wiring 152. The transistor 103 is connected to the other of the source and drain of the transistor 111. A large voltage is applied to transistors 105, 108, and 109. This prevents breakdown of these transistors and suppresses changes in their characteristics. It is possible to control this.

[0142] Alternatively, the semiconductor device shown in FIG. 4 may be configured as shown in FIG. 5. In FIG. 5, the transistor 11 The gate of the first transistor is connected to a wiring 154A that is separate from the wiring 154. In FIG. The potential transmitted by the wiring 153 is set lower than the potential VH transmitted by the wiring 154. During periods T1 and t1, one of the source and drain of the transistor 111 is VH-Vt When the voltage is lower than h108 or VH-Vth109, the transistor 111 is turned off. Therefore, the timing at which the gate of the transistor 101 is brought into a floating state can be set as follows. This allows for faster operation, thereby improving the operating speed.

[0143] <Variation 2> The semiconductor device shown in FIG. 6 differs from that shown in FIG. 1 in that the circuit 100 includes a transistor 112. .

[0144] The gate of the transistor 112 is connected to the wiring 151. One of the source and drain of the transistor 112 is connected to the wiring 153. The other input is connected to node ND3.

[0145] Period T1, period T3, period T4 and period T6, and period t1, period t3, period t4 and In a period t6, when the potential of the wiring 151 becomes VL, the transistor 112 is turned off. In the periods T2 and T5, and the periods t2 and t5, the voltage of the wiring 151 is When the potential of the wiring 153 becomes VH, the transistor 112 is turned on. Since a certain VL is transmitted to the node ND3 through the transistor 112, the potential of the node ND3 becomes VL, and the transistors 102 and 103 become non-conductive. During periods T5 and t5, the transistors 102 and 103 can be made non-conductive. Therefore, deterioration of the characteristics of the transistors 102 and 103 can be suppressed.

[0146] <Variation 3> The semiconductor device shown in FIG. 7 differs from that shown in FIG. 1 in that the circuit 100 includes a transistor 113. .

[0147] The gate of the transistor 113 is connected to the wiring 151. One of the source and drain of the transistor 113 is connected to the wiring 153. The other input is connected to node ND2.

[0148] Period T1, period T3, period T4 and period T6, and period t1, period t3, period t4 and In a period t6, when the potential of the wiring 151 becomes VL, the transistor 113 is turned off. In the periods T2 and T5, and the periods t2 and t5, the voltage of the wiring 151 is When the potential of the wiring 153 becomes VH, the transistor 113 is turned on. Since a certain VL is transmitted to the node ND2 through the transistor 113, the potential of the node ND2 becomes VL, and the transistor 104 becomes non-conductive. During the period t5, the transistor 104 can be turned off. This makes it possible to suppress deterioration of the characteristics of the resistor 104.

[0149] <Variation 4> The semiconductor device shown in FIG. 8 differs from that in FIG. 1 in that the circuit 100 includes a capacitor 114.

[0150] A first electrode of the capacitor 114 is connected to the node ND2. The pole is connected to node ND3.

[0151] During periods T3 and t3, the node ND2 is in a floating state, and the node ND3 is in a floating state. In order to raise the potential of node ND3 while the potential difference with node ND2 is maintained, At this time, the potential of the gate and source or drain of the transistor 104 increases. If the parasitic capacitance between the other node and the other node is small, the potential of the node ND2 is unlikely to rise. A capacitor 114 is provided between the gate and the other of the source and the drain of the transistor 104. By doing so, the potential of the node ND2 can be easily increased. 3 can be more reliably set to VH to turn on the transistor 102. Therefore, malfunction of the output signal of the circuit 100 can be reduced.

[0152] <Variation 5> The semiconductor device illustrated in FIG. 9 has the following features: 1. Similarly, the semiconductor device shown in FIG. 10 has a gate electrode connected to a wiring. 1 in that it is connected to 161.

[0153] The wiring 161 has a function of transmitting a signal having a high level and a low level. For example, the potential of the wiring 161 is higher than that of the wiring 152 during the first operation and the second operation. A signal for turning on the transistor 102 or 103 is transmitted during periods other than VH. For example, in the periods T4 to T6 and t4 to t6, A signal that becomes VH at the timing is transmitted to the wiring 161. It is preferable that the first to third clock signals are different in phase from each other. The clock signal transmitted by 61 is sometimes called the fourth clock signal. By using this configuration, the potential of the wiring 152 can be set to VL more reliably. 00 output signal malfunction can be reduced.

[0154] Alternatively, in the semiconductor device shown in FIG. 9, the gate of the transistor 102 is connected to the wiring 156 or It may be connected to wiring 158.

[0155] <Variation 6> The semiconductor device shown in FIG. 11 includes transistors 105 to 109 and switches 105A to 105B. 1 in that the semiconductor device shown in FIG. 1 in that the switch 102A is a switch 102B. 1 in that the transistor 103 is replaced with a switch 103A.

[0156] The switches 102A, 103A, 105A to 109A are not limited to transistors, but may be electrically The use of a switch or mechanical switch increases the degree of freedom in design. can be done.

[0157] <Variation 7> The semiconductor device shown in FIG. 14 differs from that shown in FIG. 1 in that the capacitive element 110 is omitted.

[0158] In the semiconductor device shown in FIG. 14, the gate and the other of the source and the drain of the transistor 101 are connected to a By designing the parasitic capacitance between the capacitors so that it is large, the capacitor element 110 can be omitted. The omission of the capacitance element increases the degree of freedom in design. The area occupied by the

[0159] <Variation 8> In the semiconductor device shown in FIG. 15, transistors 101 to 109 are shown as P-channel transistors. This differs from Figure 1 in this respect.

[0160] The semiconductor device shown in Figure 15 is made by creating transistors using semiconductor materials that can only be used to make P-channel types. and can be applied to the circuit 100.

[0161] <Variation 9> The semiconductor device shown in FIG. 16 is a combination of the above-described first to third modifications, and includes a transistor 111 1 in that it includes a transistor 112 and a transistor 113.

[0162] The semiconductor device shown in FIG. 16 can be realized by combining the above-described modified examples 1 to 3, which are shown as examples. Thus, the circuit 100 can have the advantages of each of the modifications described above.

[0163] <Modification 10> The semiconductor device shown in FIG. 17 includes transistors 101 to 109 each having a back gate. 1 in that it is shown as a transistor and the back gate is connected to a wiring 162. In addition, the semiconductor device shown in FIG. 18 has transistors 101, 104, 106, and 108. The back gate is connected to the wiring 162. 1. In addition, the semiconductor device shown in FIG. 19 has transistors 101 to 109, The transistors 101, 104, 106, and The back gate of the transistor 108 is connected to the wiring 162, and the transistors 102, 103, 105, 1 in that the back gates of 107 and 109 are connected to a wiring 163. The semiconductor device shown in FIG. 20 includes transistors 101 to 109 as transistors having back gates. The back gates of the transistors 101 and 102 are connected to the gates of the transistors 101 and 102. 1 in that the back gates of the transistors 103 to 109 are connected to the wiring 162. different.

[0164] The wiring 162 has a function of transmitting a high-level or low-level potential. In other words, the wiring 162 controls the threshold voltage of the transistor during the first operation and the second operation. The wiring 163 has a function of transmitting a controllable potential. As a specific example, the wiring 163 has a function of transmitting a potential. During operation, a potential that can control the threshold voltage of the transistor is different from the potential of the wiring 162. For example, potentials that can control the threshold voltage of a transistor include: It is preferable that the potential is equal to or lower than VH or equal to or higher than VL.

[0165] The semiconductor device shown in FIGS. 17 to 19 has wiring set to VH and wiring set to VL. Therefore, the through current between the first and second gates can be reduced, and the power consumption can be reduced. In addition, in the semiconductor device shown in FIG. 20, the voltage applied to the back gates of the transistors 101 and 102 is The potential of the transistors 101 and 102 is set to be equal to the gate potential, and the current supply capacity of the transistors 101 and 102 is increased. Therefore, the rise time and fall time of the signal transmitted to the wiring 152 can be shortened. It is possible.

[0166] <Summary> As described above, one embodiment of the present invention is described in the examples of the circuits and the operations in Embodiments 1 and 2. One embodiment of the present invention is a method for forming a semiconductor device using another transistor, another capacitor, or another wiring. By providing or omitting the above, various circuit configurations can be realized.

[0167] (Fourth embodiment)

[0168] In this embodiment, the shift register using the circuit 100 described in the first to third embodiments is An example of a star will be described.

[0169] The shift register 200 shown in FIG. 21 is the same as the circuit 100 described in the first to third embodiments. The corresponding circuits 201[i] to 201[i+2] (i is a natural number of 3 or more) are included. The circuits 201[i] to 201[i+2] are transistors 101 to 103, respectively. 9 and a capacitive element 110.

[0170] In FIG. 21, the output signals of the circuits 201[i] to 201[i+2] are represented as OUT[i] to OUT[i]. OUT[i+2] is shown. The wires are illustrated as wires 218[i] to 218[i+2]. 218[i+2] correspond to the wiring 152 described in the first to third embodiments. In addition, the output signal OU of the circuit 201[i-1] (not shown) which is the previous stage of the circuit 201[i] The wiring that transmits T[i-1] is shown as wiring 218[i-1]. The output signal OUT[ The wire that carries signal i+3 is shown as wire 218[i+3].

[0171] In FIG. 21, wirings 211 to 217 are shown as examples of wirings connecting to the circuit 201[i]. are.

[0172] For example, in the circuit 201[i], the wiring 211 is the same as the wiring 1 described in the first to third embodiments. 58. The wiring 211 has a function of transmitting the signal CK1, for example. K1 corresponds to any one of the first to third clock signals.

[0173] For example, in the circuit 201[i], the wiring 212 is the same as the wiring 1 described in the first to third embodiments. 51. The wiring 212 has a function of transmitting the signal CK2, for example. K2 corresponds to any one of the first to third clock signals that is different from the signal CK1.

[0174] For example, in the circuit 201[i], the wiring 213 is the same as the wiring 1 described in the first to third embodiments. 56. The wiring 213 has a function of transmitting the signal CK3, for example. K3 corresponds to one of the first to third clock signals different from the signals CK1 and CK2. Correct.

[0175] For example, in the circuit 201[i], the wiring 214 is the same as the wiring 1 described in the first to third embodiments. 54. The wiring 214 has a function of being set to VDD, for example. VDD corresponds to VH.

[0176] For example, in the circuit 201[i], the wiring 215 is the same as the wiring 1 described in the first to third embodiments. 53. The wiring 215 has a function of being set to VSS, for example. VSS corresponds to VL.

[0177] For example, in the circuit 201[i], the wiring 216 is the same as the wiring 1 described in the first to third embodiments. 55. The wiring 216 has a function of transmitting a signal SEL1, for example. SEL1 is at a high level, for example, VDD, during the first period, and at a low level during the second period. For example, a signal that becomes VSS.

[0178] For example, in the circuit 201[i], the wiring 217 is the same as the wiring 1 described in the first to third embodiments. 57. The wiring 217 has a function of transmitting the signal SEL2, for example. SEL2 is at a low level, for example, VSS, during the first period, and at a high level during the second period. For example, this is a signal that becomes VDD.

[0179] In the first operation of the shift register 200, for example, in the circuit 201[i], The output signal OUT[i-1] is shifted from the output signal OUT[i-1] of [i] to the wiring 218[i]. Similarly, for example, the circuit 201[i+1] Then, the output signal OUT[i+1 ] to the wiring 218[i+1]. The waveforms of the signals are shown in Fig. 1. The first operation of the circuits 201[i-1] to 201[i+3] For the operation of each transistor, refer to the description of the second embodiment.

[0180] In addition, in the second operation of the shift register 200, for example, in the circuit 201[i+1] is the output signal OUT[i+2] of the circuit 201[i+2] shifted. i+1] to the wiring 218[i+1]. ], the output signal OUT[i+1] of the circuit 201[i+1] is shifted, and the output signal OU T[i] to the wiring 218[i]. The waveforms of the signals are shown in Fig. 2. The second operation in the circuits 201[i-1] to 201[i+3] For the operation of each transistor in this case, refer to the description of the second embodiment.

[0181] As shown in FIG. 22, in the first operation, the shift register 200 218[i+1]. Similarly, during the second operation, the wiring 218[i+1] to the wiring 218[ i]. The shift register 200 is particularly suitable as a shift register that can output pulses in sequence in both directions. The shift register 200 has the functions of shifting the pulses in a direction determined by the signal SE L1 or signal SEL2 can be changed by switching it to a high level or a low level. However, the functions of the shift register 200 are not limited to this.

[0182] 33 shows an example of a layout diagram of the circuit 201[i] shown in FIG. In the example, the first wiring 401, the source electrode, and the drain electrode are provided in the same layer as the gate electrode. A second wiring 402, a semiconductor layer 403, and a wiring layer between the first wiring 401 and the second wiring 402 are provided in the same layer. An example of the arrangement of openings 404 for connecting to wires 402 is shown.

[0183] The semiconductor layer 403 and the first wiring 401 overlap each other, and the second wiring 4 is formed at both ends of the semiconductor layer. The area where the first wiring 401 and the second wiring 402 overlap is the area occupied by the transistor. 33, the area where the wiring 402 overlaps with the capacitor element is the area where the capacitor element occupies. The arrangement of the transistors 101 to 109 and the capacitor element 110 is shown in FIG. Now, let us consider the layout of the wiring 211 to 217, wiring 218[i-1] to wiring 218[i+1]. It shows.

[0184] In the example of the layout shown in FIG. 33, the top-bottom relationship between the wiring and the semiconductor layer is as follows: An example in which the semiconductor layer 403, the first wiring 401, and the second wiring 402 are stacked in this order has been shown. Alternatively, the first wiring 401 may be placed in the lower layer, or the second wiring 402 may be placed in the lower layer. In addition, the semiconductor layer 403 has a width greater than that of the first wiring 401 and the second wiring 402. Alternatively, the semiconductor layer 403 may be provided so as to be connected to the first wiring 401 and the second wiring 402. It may be provided so as to have a smaller width.

[0185] (Embodiment 5) In this embodiment, a display device to which a semiconductor device according to one embodiment of the present invention can be applied will be described. Reveal.

[0186] The display device illustrated in FIG. 23A includes a circuit 300 and a pixel portion 130. 0 includes N (N is a natural number greater than or equal to 3) wirings GL (also indicated as GL[1] to GL[N]). and M (M is a natural number) wirings SL (also shown as wirings SL[1] to SL[M]). Then, pixels 131 are provided corresponding to the N wirings GL and the M wirings SL. The circuit 300 includes a gate driver (a gate line driving circuit, a gate signal line driving circuit, a scanning line driving circuit, a The N wirings GL are gate lines (gate signal lines, The M lines SL have the function of transmitting video signals. That is, the M wirings SL are used as source lines (also called source signal lines or signal lines). The M lines SL are connected to a source driver (a source line driver circuit, a source The signal line driver circuit is connected to a circuit that functions as a signal line driver circuit.

[0187] The circuit 300 uses the shift register 200 described in the fourth embodiment. In this case, the N wires GL correspond to the wire 218. 300 has N circuits 301 (also referred to as circuits 301[1] to 301[N]). The circuit 100 described in any of the first to third embodiments can be used. In this case, the N wires GL correspond to the wire 152.

[0188] The selection or non-selection of the pixel 131 is controlled based on the potential of the wiring GL. The selection or deselection of pixel 131 is controlled by circuit 300. When pixel 131 is selected, the video A video signal is written to the pixel 131 from the line SL. The pixel 131 then displays the image according to the video signal. When deselected, pixel 131 continues to display according to the video signal it holds.

[0189] Next, a specific example of the configuration of the pixel 131 will be described.

[0190] The pixel 131 illustrated in FIG. 23B includes a transistor 132, a liquid crystal element 133, and a capacitor. The transistor 132 has a first terminal connected to the line SL and a second terminal The first electrode (also referred to as a pixel electrode) of the liquid crystal element 133 and the first electrode of the capacitor element 134 are The second electrode (coil) of the liquid crystal element 133 is electrically connected to the gate electrode (coil) of the liquid crystal element 133, and the gate electrode (coil) of the liquid crystal element 133 is electrically connected to the wiring GL. The pixel electrode (also referred to as a "mon electrode") is common to all or two or more of the pixels 131. The conductor having the region that becomes the second electrode of the liquid crystal element 133 of the first pixel 131 is The pixel 131 has a region that serves as a second electrode of the liquid crystal element 133. The second electrode of the capacitor 134 is connected to a wiring that functions as a capacitor line. are connected to the same wiring in all or two or more of the pixels 131. The second electrode of the element 134 may be connected to the second electrode of the liquid crystal element 133. The transistor 132 is turned on or off depending on the potential of the wiring GL. When the line SL is turned on, the video signal on the line SL is input to the pixel 131. The liquid crystal element 133 The liquid crystal material is aligned by the first electrode of the liquid crystal element 133 and the The capacitor 134 is controlled by the potential difference between the first electrode and the second electrode. That is, the capacitor 134 has a function of storing the voltage of the first electrode of the liquid crystal element 133. It has the function of maintaining the position at a value corresponding to the video signal.

[0191] The pixel 131 illustrated in FIG. 23C includes a transistor 135, a transistor 136, an EL The transistor 135 has a first terminal connected to a wiring SL and a second terminal connected to a The terminal is connected to the gate of the transistor 136, and the gate is connected to the wiring GL. The resistor 136 has a first terminal connected to a wiring having a function of supplying a current to the EL element 137. and the second terminal is connected to the first electrode (also called the pixel electrode) of the EL element 137. The second electrode (also called a common electrode) of the EL element 137 is connected to all or a part of the plurality of pixels 131. That is, the second electrode of the EL element 137 of the first pixel 131 is common to two or more. The conductor having the region that will become the second electrode of the EL element 137 of the second pixel 131 is The transistor 135 is turned on or off depending on the potential of the wiring GL. When the transistor 135 is turned on, the video signal on the wiring SL is input to the pixel 131. The transistor 136 has a function of supplying a current to the EL element 137. The current supplied from 136 to EL element 137 has a value corresponding to the video signal. The LED 7 emits light in response to the current supplied from the transistor 136 .

[0192] The configuration of the pixel 131 is not limited to that shown in FIG. 23(B) and FIG. 23(C). a transistor having a first terminal connected to a wiring GL and a second terminal connected to a wiring SL; a display element that displays a picture based on a video signal input via a transistor; Alternatively, the pixel 131 may have a gate connected to the wiring GL and a first terminal connected to the wiring SL. and a transistor connected to the and a pixel electrode to which a potential or current is supplied. a transistor having a gate connected to a wiring GL and a first terminal connected to a wiring SL; A current based on a video signal input via a transistor is supplied to a display element or pixel electrode. and a transistor for supplying the same.

[0193] (Embodiment 6) In this embodiment, transistors applicable to the transistors 101 to 109 of the circuit 100 are An example of the configuration of the register will be described with reference to the drawings.

[0194] <Transistor configuration example> FIG. 24(A) shows a schematic top view of a transistor 600, which will be described below. FIG. 24B is a schematic cross-sectional view of the transistor 600 taken along the line AB in FIG. 24A. The transistor 600 illustrated in FIGS. 24(A) and 24(B) is a bottom-gate transistor. is.

[0195] The transistor 600 includes a gate electrode 602 provided on a substrate 601 and a gate electrode 603 formed on the substrate 601 and a gate electrode 604 formed on the substrate 601. An insulating layer 603 is provided on the gate electrode 602, and the gate electrode 602 is provided on the insulating layer 603. The oxide semiconductor layer 604 provided so as to overlap with the oxide semiconductor layer 604 and the oxide semiconductor layer 605 provided so as to be in contact with the top surface of the oxide semiconductor layer 604 The insulating layer 603 and the oxide semiconductor layer 604 are formed on the insulating layer 603. An insulating layer 606 covers the pair of electrodes 605a and 605b, and an insulating layer 607 is formed on the insulating layer 606. is provided.

[0196] There is no particular restriction on the material of the substrate 601, but it should be strong enough to withstand the subsequent heat treatment. Use heat-resistant materials, such as glass substrates, ceramic substrates, quartz substrates, and sapphire substrates. A ceramic substrate, a YSZ (yttria stabilized zirconia) substrate, or the like may be used as the substrate 601. In addition, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide is preferable. It is also possible to apply compound semiconductor substrates made of silicon germanium, SOI substrates, etc. In addition, the substrate 601 may be a substrate on which a semiconductor element is provided. It may be used.

[0197] In addition, a flexible substrate such as plastic is used as the substrate 601, and the substrate is directly formed on the flexible substrate. Alternatively, the transistor 600 may be formed between the substrate 601 and the transistor 600. The peeling layer may be provided on the upper layer of the transistor. After that, it can be separated from the substrate 601 and used for transferring to another substrate. Therefore, the transistor 600 can be transferred to a substrate with low heat resistance or a flexible substrate.

[0198] The gate electrode 602 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or titanium. or an alloy containing the above metals or a combination of the above metals. It can be formed by using an alloy in which manganese or zirconium is combined. The gate electrode 602 may be made of a single layer of metal. For example, a silicon-containing aluminum film may be used. Single layer structure, double layer structure with titanium film laminated on aluminum film, titanium film on titanium nitride film a two-layer structure in which a tungsten film is laminated on a titanium nitride film; a two-layer structure in which a tungsten film is laminated on a titanium film or a tungsten nitride film; A three-layer structure in which an aluminum film is laminated on a titanium film, and a titanium film is further formed on that. In addition to aluminum, titanium, tantalum, tungsten, molybdenum, and chromium an alloy film made by combining one or more metals selected from the group consisting of neodymium, scandium, and Alternatively, a nitride film may be used.

[0199] The gate electrode 602 is made of indium tin oxide, indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide containing titanium oxide A light-transmitting conductive material such as indium tin oxide can also be used. The light-transmitting conductive material and the metal may be laminated together.

[0200] In addition, an In—Ga—Zn-based oxynitride semiconductor film is formed between the gate electrode 602 and the insulating layer 603. , In-Sn-based oxynitride semiconductor film, In-Ga-based oxynitride semiconductor film, In-Zn-based oxynitride semiconductor films, Sn-based oxynitride semiconductor films, In-based oxynitride semiconductor films, metal nitride films (InN, These materials have an energy of 5 eV or more, preferably 5.5 eV or more. This is the work function, and the threshold voltage of the transistor can be made positive, so-called normal For example, an In-Ga-Zn oxynitride semiconductor film can be used. When the oxide semiconductor layer 604 is used, the nitrogen concentration is at least higher than that of the oxide semiconductor layer 604, specifically, 7 atomic %. The above-mentioned In-Ga-Zn-based oxynitride semiconductor film is used.

[0201] The insulating layer 603 functions as a gate insulating film. The edge layer 603 is preferably an insulating oxide film.

[0202] The insulating layer 603 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. Copper, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based metal oxide The above may be used, and the layer may be a laminate or a single layer.

[0203] The insulating layer 603 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0204] The pair of electrodes 605a and 605b serve as source and drain electrodes of the transistor. It works like this.

[0205] The pair of electrodes 605a and 605b are made of a conductive material such as aluminum, titanium, chromium, or nickel. Nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten Metals such as iron or alloys containing these as the main component are used in a single layer structure or a laminated structure. For example, a single layer structure of an aluminum film containing silicon, or a layer of an aluminum film Two-layer structure with titanium film laminated, two-layer structure with titanium film laminated on tungsten film, copper-metal Two-layer structure with copper film laminated on magnesium-aluminum alloy film, titanium film or titanium nitride film A titanium film or titanium nitride film is laminated with an aluminum film or copper film. a three-layer structure in which a titanium film or titanium nitride film is formed thereon; a molybdenum film or Molybdenum nitride film and aluminum layer on the molybdenum film or molybdenum nitride film A molybdenum film or a molybdenum nitride film is then formed on top of the copper film. There are three-layer structures, etc. Transparent conductive materials containing indium oxide, tin oxide, or zinc oxide are used. It may be used.

[0206] The insulating layer 606 is formed using an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. It is preferable that the oxide insulating film contains more oxygen than the oxygen required for the stoichiometric composition. When heated, some oxygen is released. The oxide insulating film containing the In the spectroscopy analysis, the amount of oxygen released when converted to oxygen atoms was 1 .0×10 18 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 The oxide insulating film is as described above. The temperature is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower.

[0207] The insulating layer 606 can be made of silicon oxide, silicon oxynitride, or the like.

[0208] The insulating layer 606 is formed to prevent the oxide semiconductor layer 60 from being damaged when the insulating layer 607 is formed later. It also functions as a membrane to mitigate damage to 4.

[0209] Alternatively, an oxide film that transmits oxygen may be provided between the insulating layer 606 and the oxide semiconductor layer 604. good.

[0210] As the oxide film that transmits oxygen, silicon oxide, silicon oxynitride, etc. can be used. In this specification, the silicon oxynitride film is a film containing more than nitrogen as a component. A silicon nitride film is a film that contains more oxygen than silicon dioxide. Refers to a film with a high nitrogen content.

[0211] The insulating layer 607 can be formed using an insulating film having a blocking effect against oxygen, hydrogen, water, and the like. By providing the insulating layer 607 over the insulating layer 606, oxygen from the oxide semiconductor layer 604 can be prevented. Therefore, the diffusion of hydrogen, water, and the like to the outside and the intrusion of hydrogen, water, and the like into the oxide semiconductor layer 604 from the outside can be prevented. Examples of insulating films that have a blocking effect against oxygen, hydrogen, water, etc. include silicon nitride, Silicon oxide, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride Sodium, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride There are others such as

[0212] <Example of transistor manufacturing method> Next, an example of a method for manufacturing the transistor 600 illustrated in FIGS. 24A to 24C will be described.

[0213] First, as shown in FIG. 25(A), a gate electrode 602 is formed on a substrate 601. An insulating layer 603 is formed on the electrode 602 .

[0214] Here, a glass substrate is used as the substrate 601 .

[0215] The method for forming the gate electrode 602 will be described below. First, the method is a sputtering method, a CVD method, or a vapor deposition method. A conductive film is formed by deposition or the like, and a first photomask is used to perform photolithography on the conductive film. A resist mask is formed by a deposition process. Next, a part of the conductive film is The resist mask is then etched to form a gate electrode 602. After that, the resist mask is removed.

[0216] The gate electrode 602 may be formed by electrolytic plating, printing, inkjet printing, or the like instead of the above-mentioned method. It may also be formed by a jet method or the like.

[0217] The insulating layer 603 is formed by a sputtering method, a PECVD method, a vapor deposition method, or the like.

[0218] The insulating layer 603 is formed of a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. When forming the silicon-containing film, a deposition gas containing silicon and an oxidizing gas are used as the source gas. Representative examples of silicon-containing deposition gases include silane, disilane, trisilane, and the like. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and dioxygen. Examples include nitrogen dioxide.

[0219] In addition, when forming a silicon nitride film as the insulating layer 603, a two-stage formation method is used. First, a mixed gas of silane, nitrogen, and ammonia is used as a raw material gas. A first silicon nitride film with few defects is formed by the plasma CVD method using the original material. The fuel gas was changed to a mixture of silane and nitrogen, and the hydrogen concentration was low and hydrogen was not blown. By this method, a second silicon nitride film is formed. As the insulating layer 603, a silicon nitride film having few defects and a hydrogen blocking property is used. can be formed.

[0220] When a gallium oxide film is formed as the insulating layer 603, MOCVD (Metal O Formed using the Organic Chemical Vapor Deposition method It is possible.

[0221] Next, as shown in FIG. 25B, an oxide semiconductor layer 604 is formed over the insulating layer 603.

[0222] A method for forming the oxide semiconductor layer 604 is described below. First, an oxide semiconductor film is formed. Subsequently, a photolithography process is performed on the oxide semiconductor film using a second photomask. A resist mask is formed. Next, part of the oxide semiconductor film is etched using the resist mask. This is etched to form the oxide semiconductor layer 604. After that, the resist mask is removed.

[0223] After this, a heat treatment may be performed. When the heat treatment is performed, it is performed in an atmosphere containing oxygen. The temperature of the heat treatment is preferably, for example, 150°C or higher and 600°C or higher. The temperature is preferably 200°C or higher and 500°C or lower.

[0224] Next, as shown in FIG. 25(C), a pair of electrodes 605a and 605b are formed.

[0225] The method for forming the pair of electrodes 605a and 605b will be described below. First, a sputtering method is used. A conductive film is formed by a PECVD method, a vapor deposition method, etc. Next, a third photomask is applied to the conductive film. A resist mask is formed by a photolithography process using the resist mask. The conductive film is partially etched using a mask to form a pair of electrodes 605a and 605b. Thereafter, the resist mask is removed.

[0226] Note that as shown in FIG. 25C, when the conductive film is etched, the top of the oxide semiconductor layer 604 is Therefore, the oxide semiconductor layer 604 may be partially etched and thinned. It is preferable that the thickness of the oxide semiconductor film be set to be thick in advance during the formation.

[0227] Next, as shown in FIG. 25D, the oxide semiconductor layer 604 and the pair of electrodes 605a and 605b are An insulating layer 606 is formed on the insulating layer 5b, and then an insulating layer 607 is formed on the insulating layer 606.

[0228] When a silicon oxide film or a silicon oxynitride film is formed as the insulating layer 606, the source gas As the gas, it is preferable to use a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silane include silane, disilane, trisilane, and fluorinated silane. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

[0229] For example, a substrate placed in a vacuum-evacuated processing chamber of a plasma CVD device is heated to 180°C or higher. The temperature is kept at 260°C or less, more preferably 200°C to 240°C, and the raw material gas is introduced into the processing chamber. By introducing the gas, the pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, more preferably 1 The pressure is between 0.00 Pa and 200 Pa, and the electrode installed in the processing chamber is set to 0.17 W / cm 2 End 0.5W / cm 2 or less, more preferably 0.25 W / cm 2 More than 0.35W / cm 2 Below Silicon oxide film or silicon oxynitride film is formed depending on the conditions for supplying high frequency power as follows: do.

[0230] As a film formation condition, high frequency power with the above power density is supplied in a processing chamber with the above pressure. This increases the decomposition efficiency of the source gas in the plasma, increasing the number of oxygen radicals and oxidizing the source gas. As a result, the oxygen content in the oxide insulating film becomes higher than the stoichiometric ratio. However, when the substrate temperature is above this level, the bonding strength between silicon and oxygen is weak, and the A portion of the oxygen is released, resulting in a mixture containing more oxygen than the stoichiometric composition. In this case, an oxide insulating film from which part of oxygen is released by heating can be formed.

[0231] In addition, when an oxide insulating film is provided between the oxide semiconductor layer 604 and the insulating layer 606, In the step of forming the layer 606 , the oxide insulating film serves as a protective film for the oxide semiconductor layer 604 . As a result, damage to the oxide semiconductor layer 604 is reduced while a high-frequency voltage with a high power density is applied. A force can be used to form the insulating layer 606 .

[0232] For example, a substrate placed in a vacuum-evacuated processing chamber of a PECVD device is heated to 180°C or higher for 40 The temperature is kept at 0°C or lower, more preferably 200°C to 370°C, and the raw material gas is introduced into the processing chamber. The pressure in the processing chamber is set to 20 Pa or more and 250 Pa or less, more preferably 100 Pa or less. a or more and 250 Pa or less, and high frequency power is supplied to the electrode installed in the processing chamber. Therefore, a silicon oxide film or a silicon oxynitride film can be formed as the oxide insulating film. Furthermore, by setting the pressure in the treatment chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film When the oxide semiconductor layer 604 is formed, damage to the oxide semiconductor layer 604 can be reduced.

[0233] As a source gas for the oxide insulating film, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of silicon-containing deposition gases include silane, disilane, trisilane, and the like. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and dioxygen. Examples include nitrogen dioxide.

[0234] The insulating layer 607 can be formed by a sputtering method, a PECVD method, or the like.

[0235] When a silicon nitride film or a silicon nitride oxide film is formed as the insulating layer 607, the source gas The gas used may be a deposition gas containing silicon, an oxidizing gas, or a gas containing nitrogen. Representative examples of silicon-containing deposition gases include silane, disilane, trisilane, and the like. Oxidizing gases include oxygen, ozone, nitrous oxide, and fluorinated silane. Nitrogen, etc. Nitrogen-containing gases include nitrogen and ammonia.

[0236] Through the above steps, the transistor 600 can be formed.

[0237] <Modification of Transistor> An example of the structure of a transistor that is partially different from the transistor 600 will be described below.

[0238] FIG. 26A is a schematic cross-sectional view of a transistor 610, which will be described below as an example. The transistor 610 differs from the transistor 600 in the structure of the oxide semiconductor layer.

[0239] The oxide semiconductor layer 614 included in the transistor 610 is formed by an oxide semiconductor layer 614a and an oxide semiconductor layer 614b. The semiconductor layer 614b is laminated on the semiconductor layer 614a.

[0240] Note that the boundary between the oxide semiconductor layer 614a and the oxide semiconductor layer 614b may be unclear. Therefore, in the drawings such as FIG. 26(A), these boundaries are shown by dashed lines.

[0241] The oxide semiconductor layer 614a is typically made of In-Ga oxide, In-Zn oxide, or In-M -Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) When the oxide semiconductor layer 614a is an In-M-Zn oxide, Zn and O The atomic ratio of In and M excluding the above is preferably less than 50 atomic % for In, M is 50 atomic % or more, more preferably In is less than 25 atomic %, and M is For example, the oxide semiconductor layer 614a has an energy A material having a gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. is used.

[0242] The oxide semiconductor layer 614b contains In or Ga, and is typically an In-Ga oxide, n-Zn oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce) , Nd, or Hf) and has a lower energy of the conduction band than the oxide semiconductor layer 614a. is close to the vacuum level, and typically, the energy level at the bottom of the conduction band of the oxide semiconductor layer 614b is and the energy difference between the bottom of the conduction band of the oxide semiconductor layer 614a and the bottom of the conduction band of the oxide semiconductor layer 614b is 0.05 eV or more. 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV It is preferably 0.5 eV or less, or 0.4 eV or less.

[0243] When the oxide semiconductor layer 614b is an In-M-Zn oxide, the The atomic ratio of In to M is preferably 25 atomic % or more for In and 75 atomic % or more for M. More preferably, In is 34 atomic % or more and M is 66 atomic % or less. Less than ic%.

[0244] For example, the oxide semiconductor layer 614a may be formed of In:Ga:Zn=1:1:1, In:Ga:Z In-Ga-Z with an atomic ratio of n=1:1:1.2 or In:Ga:Zn=3:1:2 The oxide semiconductor layer 614b can be made of In:Ga:Zn In-Ga-Zn oxides with atomic ratios of 1:3:2, 1:6:4, or 1:9:6 were used. Note that the atoms of the oxide semiconductor layer 614a and the oxide semiconductor layer 614b can be The atomic ratios each include a margin of error of plus or minus 20% of the atomic ratios listed above.

[0245] The oxide semiconductor layer 614b provided on the upper layer contains Ga, which functions as a stabilizer. By using a large amount of oxide, the oxide semiconductor layer 614a and the oxide semiconductor layer 61 The release of oxygen from 4b can be suppressed.

[0246] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. The appropriate composition can be selected depending on the required transistor characteristics (mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the oxide semiconductor layer 614a and the oxide semiconductor layer 614b Carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density It is preferable to make the following appropriate.

[0247] Note that in the above description, the oxide semiconductor layer 614 has a structure in which two oxide semiconductor layers are stacked. Although this is an example, a structure in which three or more oxide semiconductor layers are stacked may also be used.

[0248] FIG. 26B is a schematic cross-sectional view of a transistor 620, which will be described below as an example. The transistor 620 is different from the transistor 600 in the structure of the oxide semiconductor layer. It differs from 10.

[0249] The oxide semiconductor layer 624 included in the transistor 620 includes an oxide semiconductor layer 624a, an oxide semiconductor layer 624b, an oxide semiconductor layer 624c, an oxide semiconductor layer 624d, an oxide semiconductor layer 624e, an oxide semiconductor layer 624f, an oxide semiconductor layer 624g, an oxide semiconductor layer 624h ... The semiconductor layer 624b and the oxide semiconductor layer 624c are stacked in this order.

[0250] The oxide semiconductor layer 624a and the oxide semiconductor layer 624b are stacked over the insulating layer 603. The oxide semiconductor layer 624c is formed on the top surface of the oxide semiconductor layer 624b and on the top surface of the pair of oxide semiconductor layers 624c. The electrodes 605a and 605b are provided in contact with the upper and side surfaces thereof.

[0251] For example, the oxide semiconductor layer 624b may be formed by using the oxide semiconductor layer exemplified in the above <Modifications of Transistor>. The oxide semiconductor layer 614a may have a similar structure to the oxide semiconductor layer 614a. The oxide semiconductor layers 61 , 624 a and 624 c are the oxide semiconductor layers 61 , 624 b and 624 c shown in the above <Modifications of Transistors>. A configuration similar to that of 4b can be used.

[0252] For example, the oxide semiconductor layer 624a provided under the oxide semiconductor layer 624b and the oxide semiconductor layer 624b The oxide semiconductor layer 624c provided in the second insulating layer 624b contains Ga, which functions as a stabilizer. By using a large amount of oxide, the oxide semiconductor layers 624a, 624b, and In addition, release of oxygen from the oxide semiconductor layer 624c can be suppressed.

[0253] In addition, when a channel is mainly formed in the oxide semiconductor layer 624b, for example, The conductor layer 624b is made of an oxide with a high In content, and is in contact with the oxide semiconductor layer 624b. By providing the pair of electrodes 605a and 605b, the on-current of the transistor 620 is increased. It can be done.

[0254] <Other examples of transistor configurations> Hereinafter, a top-gate transistor to which the oxide semiconductor film of one embodiment of the present invention can be applied will be described. An example of the configuration of the data will be described below.

[0255] In the following, components having the same configuration or function as those described above will be referred to as the same. Each component is given a single reference numeral, and duplicated explanations will be omitted.

[0256] FIG. 27A is a schematic cross-sectional view of a top-gate transistor 650, which will be described below. vinegar.

[0257] The transistor 650 is an oxide semiconductor provided on a substrate 601 provided with an insulating layer 651. a pair of electrodes 605a and 605b in contact with the upper surface of the oxide semiconductor layer 604; an insulating layer 603 provided over an oxide semiconductor layer 604 and a pair of electrodes 605a and 605b; A gate electrode 602 is provided over the insulating layer 603 so as to overlap with the oxide semiconductor layer 604. In addition, an insulating layer 652 is provided to cover the insulating layer 603 and the gate electrode 602. do.

[0258] The insulating layer 651 has a function of suppressing diffusion of impurities from the substrate 601 to the oxide semiconductor layer 604. For example, the insulating layer 607 may have the same structure as the insulating layer 607. 651 may not be provided if it is not necessary.

[0259] The insulating layer 652 has a blocking effect against oxygen, hydrogen, water, etc., similar to the insulating layer 607. Note that the insulating layer 607 may not be provided if it is not necessary. stomach.

[0260] An example of the structure of a transistor that is partially different from the transistor 650 will be described below.

[0261] FIG. 27B is a schematic cross-sectional view of a transistor 660, which will be described below. The transistor 660 differs from the transistor 650 in the structure of the oxide semiconductor layer.

[0262] The oxide semiconductor layer 664 included in the transistor 660 includes an oxide semiconductor layer 664a, an oxide semiconductor layer 664b, an oxide semiconductor layer 664c, an oxide semiconductor layer 664d, an oxide semiconductor layer 664e, an oxide semiconductor layer 664f, an oxide semiconductor layer 664g, an oxide semiconductor layer 664h ... The semiconductor layer 664b and the oxide semiconductor layer 664c are stacked in this order.

[0263] Any of the oxide semiconductor layers 664a, 664b, and 664c The oxide semiconductor film described above may be applied to any one, two, or all of the above. This can be done.

[0264] For example, the oxide semiconductor layer 664b may be formed by using the oxide semiconductor layer exemplified in the above <Modifications of Transistor>. The oxide semiconductor layer 614a may have a similar structure to the oxide semiconductor layer 614a. The oxide semiconductor layers 61 shown in the above <Modifications of Transistor> are used as the oxide semiconductor layers 61 A configuration similar to that of 4b can be used.

[0265] In addition, the oxide semiconductor layer 664a provided below the oxide semiconductor layer 664b and the oxide semiconductor layer 664b provided above the oxide semiconductor layer 664b The oxide semiconductor layer 664c to be provided contains a large amount of Ga, which functions as a stabilizer. By using a thin oxide, the oxide semiconductor layer 664a, the oxide semiconductor layer 664b, and the oxide semiconductor layer 664c can be easily formed. This can suppress the release of oxygen from the compound semiconductor layer 664c.

[0266] An example of the structure of a transistor that is partially different from the transistor 650 will be described below.

[0267] FIG. 27C shows a schematic cross-sectional view of a transistor 670, which will be described below. 670 indicates the shape of the pair of electrodes 605a and 605b in contact with the oxide semiconductor layer 604 and the gate electrode. The transistor 602 differs from the transistor 650 in the shape of the port electrode 602 and the like.

[0268] The transistor 670 is an oxide semiconductor provided on a substrate 601 on which an insulating layer 651 is provided. an oxide semiconductor layer 604; an insulating layer 603 on the oxide semiconductor layer 604; and a gate electrode on the insulating layer 603. 602, an insulating layer 654 over the insulating layer 651 and the oxide semiconductor layer 604, and The insulating layer 654 and the oxide semiconductor layer 6 are formed through openings in the insulating layers 654 and 656. A pair of electrodes 605a and 605b electrically connected to the insulating layer 656 and the pair of electrodes 605a and 605b are and an insulating layer 652 on the poles 605a, 605b.

[0269] The insulating layer 654 is formed of, for example, an insulating film containing hydrogen. An example of the insulating layer 654 is a silicon nitride film. The oxygen vacancies in the oxide semiconductor layer 604 are bonded to the oxygen vacancies in the oxide semiconductor layer 604, and the oxygen vacancies become carriers in the oxide semiconductor layer 604. Therefore, in the structure shown in FIG. 27C, the oxide semiconductor layer 604 and the insulating layer 654 are in contact with each other. The regions corresponding to the n-type region 604b and the n-type region 604c are shown. The region sandwiched between n-type region 604b and n-type region 604c becomes channel region 604a.

[0270] By providing n-type regions 604b and 604c in the oxide semiconductor layer 604, a pair of electrodes 60 The contact resistance between the n-type regions 604b and 605b can be reduced. 4c is used when forming the gate electrode 602 and when forming the insulating layer 654 covering the gate electrode 602. The transistor 670 shown in FIG. This is a so-called self-aligned top gate transistor. By adopting a p-gate type transistor structure, there is no overlap between the gate electrode 602 and the pair of electrodes 605a and 605b that function as source and drain electrodes, so the parasitic capacitance generated between the electrodes can be reduced. Also, as the insulating layer 656 of the transistor 670, for example, it can be formed of a silicon oxynitride film or the like. (Embodiment 7)

[0271] In this embodiment, the OS transistor described in the above embodiment will be described.

[0272] <OS transistor characteristics>

[0273] The OS transistor can reduce the impurity concentration in the oxide semiconductor and make the oxide semiconductor intrinsic or substantially intrinsic, thereby reducing the off-current. Here, substantially intrinsic means that the carrier density in the oxide semiconductor is less than 1×10 17 / cm 3 less than 1×10 1 5 / cm 3 less than, or less than 1×10 13 / cm 3 less than. In an oxide semiconductor, hydrogen, nitrogen, carbon, silicon, and metal elements other than the main component are impurities. For example, hydrogen and nitrogen contribute to the formation of donor levels and increase the carrier density.

[0274] A transistor using an intrinsic or substantially intrinsic oxide semiconductor has a low carrier density, so it is less likely to have electrical characteristics with a negative threshold voltage. Also, a transistor using the oxide semiconductor has few carrier traps in the oxide semiconductor, so the electrical characteristics

[0275]

[0276]

[0277]

[0278]

[0279] The transistor using the oxide semiconductor has few carrier traps in the oxide semiconductor, so the electrical characteristics

[0280]

[0281] [[ID=1The transistor has small fluctuations and high reliability. The transistor can have a very low off-state current.

[0275] In an OS transistor with a low off-state current, the channel width is 1 μm at room temperature (approximately 25°C). Off-state current per m is 1×10 -18 Below A, 1×10 -21 A or less, or 1 x 10 -24 A or less, or 1 x 10 at 85°C -15 Below A, 1×10 -18 A or below, or 1×10 -21 It can be A or less.

[0276] <Off-state current> In this specification, unless otherwise specified, the off-state current refers to the current flowing when a transistor is in an off state (non-conducting state). The drain current when the device is in the on state (also called the on or off state). In the absence of a gate-source voltage, the gate-source voltage Vgs of an n-channel transistor is equal to the threshold voltage V In a p-channel transistor, the voltage between the gate and source is lower than Vth. This refers to the state in which Vgs is higher than the threshold voltage Vth. For example, in the case of an n-channel transistor, The off-state current is the drain current when the voltage between the gate and source, Vgs, is lower than the threshold voltage, Vth. This may also be referred to as in-current.

[0277] The off-state current of a transistor may depend on Vgs. The current is I or less if there is a value of Vgs at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows in the off state at a given Vgs. Off-state or sufficiently reduced off-current at Vgs within a given range It may refer to the off-state current in the off state at Vgs, etc.

[0278] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, the drain current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -13 A The drain current at Vgs of -0.5V is 1×10 -19 A and Vgs is - Drain current at 0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is is 1×10 when Vgs is in the range of -0.5V to -0.8V. -19 Is it below A? Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 Since there exists a Vgs below A, The off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0279] In this specification, the off-state current of a transistor having a channel width W is expressed as It may be expressed as the current value that flows. It may also be expressed as the current value that flows per a given channel width (for example, 1 μm). In the latter case, the unit of the off-state current is a unit with the dimension of current / length. It may be expressed as a unit (e.g., A / μm).

[0280] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the off voltage is measured at room temperature, 60°C, 85°C, 95°C, or 125°C. Or, the reliability of the semiconductor device containing the transistor may be in doubt. or the temperature at which a semiconductor device including the transistor is used (for example, For example, it may refer to the off-state current at any temperature between 5°C and 35°C. The off-state current of the transistor is I or less, which means that the temperature is The temperature at which the reliability of the semiconductor device including the transistor is guaranteed, or the temperature at which the transistor The temperature at which the semiconductor device containing the stator is used (for example, any one of 5°C to 35°C) This indicates that there exists a value of Vgs at which the off-state current of the transistor is equal to or less than I at This may occur.

[0281] The off-state current of a transistor may depend on the voltage Vds between the drain and the source. In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1 V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or It may represent the off-state current at 20 V. Or, the semiconductor including the transistor Vds that guarantees the reliability of devices, etc., or semiconductor devices that include the transistor The off-state current of a transistor is sometimes expressed as the off-state current at Vds used in The current is less than or equal to I when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2 .5V, 3V, 3.3V, 10V, 12V, 16V, 20V, including transistors Vds that guarantees the reliability of the semiconductor device in which the transistor is included, or Vds used in devices, etc., Vg at which the off-state current of a transistor is I or less It may refer to the existence of a value of s.

[0282] In the above description of the off-state current, the drain may be read as the source. may also refer to the current that flows through the source when the transistor is in the off state.

[0283] In this specification, the term "leakage current" may be used to mean the same thing as "off current."

[0284] In this specification, the off-state current refers to the current that flows through a source when a transistor is in an off state. It can also refer to the current that flows between the source and drain.

[0285] <Oxide semiconductor composition> The oxide semiconductor used for the semiconductor layer of the OS transistor is at least indium It is preferable that the compound contains In (In) or zinc (Zn). It is particularly preferable that the compound contains In and Zn. In addition to these, it is preferable to have a stabilizer that strongly binds oxygen. The stabilizers are gallium (Ga), tin (Sn), and zirconium (Zr). The material may contain at least one of hafnium (Hf) and aluminum (Al).

[0286] Other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Ru It may contain one or more of tetraethion (Te) and tetraethion (Tb).

[0287] Examples of oxide semiconductors used for the semiconductor layer of a transistor include indium oxide and Tin, zinc oxide, In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn -Mg oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, In -Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide, In-S n-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al -Zn-based oxides, In-Hf-Zn-based oxides, In-Zr-Zn-based oxides, In-Ti- Zn-based oxide, In-Sc-Zn-based oxide, In-Y-Zn-based oxide, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides Oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides , In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, In-Hf-Ga-Z n-based oxides, In-Al-Ga-Zn-based oxides, In-Sn-Al-Zn-based oxides, In -Sn-Hf-Zn oxide, In-Hf-Al-Zn oxide, etc.

[0288] For example, In:Ga:Zn=1:1:1, In:Ga:Zn=3:1:2, or In In-Ga-Zn oxides with an atomic ratio of Ga:Zn=2:1:3 and oxides with similar compositions In particular, the atomic ratio of In:Ga:Zn=4:2:3 or close thereto is recommended. It is recommended to use an In-Ga-Zn oxide of In:Ga:Zn=4:2:3 or similar. In order to obtain an In-Ga-Zn oxide with an atomic ratio close to In:Ga:Zn=4: An oxide semiconductor film is formed using a 2:4.1 target.

[0289] <Impurities in oxide semiconductors> When hydrogen is contained in the oxide semiconductor film that constitutes the semiconductor layer, it bonds with the oxide semiconductor. Therefore, some of the hydrogen atoms become donors, generating electrons as carriers. The threshold voltage of the transistor is shifted in the negative direction. After the formation of the oxide semiconductor film, dehydration treatment (dehydrogenation treatment) is performed to remove hydrogen or It is preferable to remove moisture and purify the material to minimize the amount of impurities.

[0290] Note that dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film removes oxygen from the oxide semiconductor film. Therefore, dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film is In order to compensate for oxygen vacancies increased by the above-mentioned treatment, oxygen is added to the oxide semiconductor film. It is preferable that:

[0291] In this manner, hydrogen or moisture is removed from the oxide semiconductor film by dehydration treatment (dehydrogenation treatment). By adding oxygen to compensate for the oxygen deficiency, the i-type (intrinsic) or i-type The oxide semiconductor film can be an oxide semiconductor film that is substantially i-type (intrinsic).

[0292] <Oxide semiconductor structure> The structure of an oxide semiconductor will be described.

[0293] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0294] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system. .

[0295] Oxide semiconductor films are classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. Alternatively, oxide semiconductors can be divided into, for example, crystalline oxide semiconductors and amorphous oxide semiconductors. do.

[0296] Note that as a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductors, microcrystalline oxide semiconductors, amorphous oxide semiconductors, etc. The materials include single-crystalline oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and microcrystalline oxides. Semiconductors, etc.

[0297] First, the CAAC-OS film will be described.

[0298] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts aligned along the c-axis.

[0299] Transmission Electron Microscope (TEM) A bright-field image and a combined analysis image of the diffraction pattern of the CAAC-OS film were obtained by using a microscope. By observing the TEM image, multiple crystalline regions can be identified. On the other hand, high-resolution TEM images also reveal clear boundaries between crystalline parts, i.e., grain boundaries. Therefore, the CAAC-OS film is It can be said that the decrease in electron mobility caused by grain boundaries is unlikely to occur.

[0300] When a high-resolution TEM image of the cross section of the CAAC-OS film was observed from a direction approximately parallel to the sample surface, It can be seen that the metal atoms are arranged in layers in the crystalline part. Each layer of metal atoms is The CAAC-OS film is formed on a surface (also called a surface to be formed) or on a surface that reflects the unevenness of the surface. The CAAC-OS film has a shape and is aligned parallel to the surface on which the film is formed or the upper surface.

[0301] On the other hand, a high-resolution TEM image of the plane of the CAAC-OS film was observed from a direction approximately perpendicular to the sample surface. It was confirmed that the metal atoms in the crystals were arranged in a triangular or hexagonal shape. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

[0302] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was found by structural analysis using the device. In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. You can see that it is oriented vertically.

[0303] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ around 31°, a peak also appeared at 2θ around 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferable that the peak is exhibited at 2θ of about 36° and that the peak is not exhibited at 2θ of about 36°.

[0304] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. These are elements other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that constitute the oxide semiconductor film, such as fluorine, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius (or molecular radius) is large, and when it is contained inside the oxide semiconductor film, The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement and cause a decrease in crystallinity. Objects can act as carrier traps or carrier sources.

[0305] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a source of carrier generation.

[0306] Low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "substantially highly purified intrinsic" refers to a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics such as a negative threshold voltage ( It is also called marion.) It is rare for it to become high purity genuine or substantially high purity genuine. The oxide semiconductor film has few carrier traps. A transistor using such a material has little fluctuation in electrical characteristics and is highly reliable. Note that it takes a long time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time between the charges is long and the charge may behave as if it is a fixed charge. However, a transistor using an oxide semiconductor film with a high density of defect states has unstable electrical characteristics. There are cases where this happens.

[0307] In addition, transistors using CAAC-OS films show improved electrical characteristics when irradiated with visible light or ultraviolet light. The fluctuation is small.

[0308] Next, a microcrystalline oxide semiconductor film will be described.

[0309] The microcrystalline oxide semiconductor film has a region where crystals can be confirmed in a high-resolution TEM image. The microcrystalline oxide semiconductor film has a crystal structure including a crystal region and a crystal region where no clear crystal part can be identified. The crystal part contained in the crystal has a size of 1 nm to 100 nm or 1 nm to 10 nm. In particular, the fine particles are often between 1 nm and 10 nm, or between 1 nm and 3 nm. The oxide semiconductor film having nanocrystals (nc) is called nc -OS(nanocrystalline oxide semiconductor) In addition, the nc-OS film has clearly defined grain boundaries in high-resolution TEM images. It may not be possible to recognize it.

[0310] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, X-ray diffraction (XR) using X-rays with a diameter larger than that of the crystals is used for nc-OS films. When structural analysis is performed using the D device, the crystal plane is In addition, the peaks indicating the probes larger than the crystalline part were not detected in the nc-OS film. Electron diffraction (also called selected area electron diffraction) using an electron beam with a diameter (for example, 50 nm or more) When the diffraction pattern is changed to 0.05μm, a halo-like diffraction pattern is observed. Nanobeam electrons are used, which use an electron beam with a probe diameter close to or smaller than the size of the crystal part. When diffraction is performed, spots are observed. If you do this, you may observe a circular (ring-shaped) area of ​​high brightness. When nanobeam electron diffraction was performed on the nc-OS film, multiple spots were observed within the ring-shaped region. It may be observed.

[0311] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher defect state density than the CAAC-OS film.

[0312] Next, the amorphous oxide semiconductor film will be described.

[0313] The amorphous oxide semiconductor film has an irregular atomic arrangement in the film and is an oxide film that does not have a crystalline portion. An example is an oxide semiconductor film that has an amorphous state, such as quartz.

[0314] In the amorphous oxide semiconductor film, no crystalline portion can be confirmed in a high-resolution TEM image.

[0315] When the structure of the amorphous oxide semiconductor film is analyzed using an XRD device, out-of-p In the analysis by the Lane method, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductive film, a halo pattern is observed. When nanobeam electron diffraction is performed on a conductive film, no spots are observed, and a halo pattern is observed. Observed.

[0316] The oxide semiconductor film has a structure that exhibits physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure may be used, particularly, for amorphous-like oxidation. Amorphous-like Oxide Semiconductor (a-like OS) The membrane is called a conductor membrane.

[0317] In the a-like OS film, voids are observed in high-resolution TEM images. In addition, crystals can be clearly seen in high-resolution TEM images. The a-like OS film has a region where the crystal part is not observed and a region where the crystal part is not observed. Crystallization occurs due to the small amount of electron irradiation, which is the level observed with a TEM, and the growth of the crystals can be seen. On the other hand, if the nc-OS film is of good quality, the small amount of charge observed by TEM can be detected. Almost no crystallization due to electron irradiation is observed.

[0318] The size of the crystalline parts of the a-like OS film and the nc-OS film was measured using a high-resolution T This can be done using EM images. For example, InGaZnO4 crystals have a layered structure, There are two Ga-Zn-O layers between the In-O layers. The structure has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned in the c-axis direction. Therefore, the spacing between these adjacent layers is The lattice spacing (also called the d value) is approximately the same as the value of 0.29 nm from crystal structure analysis. Therefore, we focused on the lattice fringes in high-resolution TEM images and calculated the spacing between the lattice fringes. In the region where the distance is between 0.28 nm and 0.30 nm, each lattice fringe is InG aIt corresponds to the ab plane of the ZnO4 crystal.

[0319] In addition, the density of an oxide semiconductor film may differ depending on the structure. If the composition of the membrane is known, the density can be determined by comparing it with that of a single crystal with the same composition. The structure of the oxide semiconductor film can be estimated. The density of the OS-like film is 78.6% or more and less than 92.3%. The density of the nc-OS film and the CAAC-OS film was 92.3% or more. Note that an oxide semiconductor film having a density of less than 78% of the density of a single crystal is The film formation itself is difficult.

[0320] The above will be explained using a specific example. For example, In:Ga:Zn=1:1:1 [atomic In the oxide semiconductor film that satisfies the numerical ratio, single crystal InGaZnO4 with a rhombohedral crystal structure The density of3 Therefore, for example, In:Ga:Zn=1:1:1 In an oxide semiconductor film that satisfies the atomic ratio, the density of the a-like OS film is 5.0g / cm 3 More than 5.9g / cm 3 For example, In:Ga:Zn=1:1: In the oxide semiconductor film satisfying the atomic ratio of 1, the density and CAAC- The density of the OS film is 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0321] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions at any ratio are used. By combining single crystals, it is possible to calculate the density corresponding to a single crystal of the desired composition. The density of a single crystal of a desired composition can be determined by the ratio of the single crystals of different compositions combined. However, the density should be calculated using as few types of single crystals as possible. It is preferable to calculate them in combination.

[0322] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, an a-like OS film, or a finely crystalline oxide semiconductor film. The film may be a stacked film including two or more of a crystalline oxide semiconductor film and a CAAC-OS film.

[0323] As described above, the OS transistor can achieve extremely excellent off-state current characteristics.

[0324] (Embodiment 8) In this embodiment mode, a display module to which the semiconductor device described in the above embodiment mode is applied is The semiconductor device will be described below. The display module can be applied to a part of the display driver circuit or pixel section. The following description will be given with reference to FIGS. 28 and 29.

[0325] <Top view of display module> 28 is a top view showing an example of a display module. 7, a pixel portion 702 provided on a first substrate 701 and a semiconductor device 703 provided on the first substrate 701 are shown. The source driver circuit section 704 and the gate driver circuit section 706 are connected to the pixel section 702 and the source driver circuit section 706. a sealant disposed to surround the gate driver circuit section 704 and the gate driver circuit section 706; 712 and a second substrate 705 provided opposite to the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 is sealed by the first substrate 701, the sealant 712, and the second substrate 705. Although not shown in FIG. 28, there is a display between the first substrate 701 and the second substrate 705. An element is provided.

[0326] The display module 700 is surrounded by a sealant 712 on the first substrate 701. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are located in a region different from the region where the pixel section 702 is located. The driver circuit portion 706 and the FPC terminal portion 708 (FPC: Flexible Printed Circuit) are electrically connected to each other. In addition, an FPC terminal portion 70 8, an FPC 716 is connected, and the pixel section 702 and the source driver Various signals are supplied to the circuit unit 704 and the gate driver circuit unit 706. 702, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal Signal lines 710 are connected to the respective sections 708. Signals and the like are transmitted through a signal line 710 to the pixel section 702, the source driver circuit section 704, the gate The signal is supplied to a driver circuit section 706 and an FPC terminal section 708 .

[0327] Furthermore, the display module 700 may be provided with a plurality of gate driver circuit units 706. The display module 700 includes a source driver circuit section 704 and a gate driver circuit section 7 shows an example in which the pixel portion 702 and the pixel portion 706 are formed on the same first substrate 701. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit section 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or gate driver circuit etc. is formed (e.g. For example, a driving circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film is mounted on the first substrate 70. There are no particular restrictions on the method of connecting the separately formed drive circuit board. It is not specified, but COG (Chip On Glass) method, wire bonding method, A method such as a tagging method can be used.

[0328] The display module 700 includes a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706. The gate driver circuit section 706 includes a plurality of transistors. The transistor described in the above embodiment can be used as the gate electrode.

[0329] The display module 700 can also include various elements, such as: Liquid crystal elements, EL (electroluminescence) elements (EL elements including organic and inorganic materials, Organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) ED, etc.), transistors (transistors that emit light according to the current), electron-emitting elements, electron Ink, electrophoretic element, grating light valve (GLV), plasma display Panel (PDP), MEMS (Micro Electro Mechanical Systems) Display element, Digital Micromirror Device (DMD), DMS (Digital Micromirror shutter), IMOD (Interference Modulation) element, shutter MEMS display element using the optical interference method, MEMS display element using the electrowetting method display elements using carbon nanotubes, piezoelectric ceramic displays, etc. In addition to these, there are also other types of contrast that can be achieved by electrical or magnetic effects. The display medium may have a variable luminance, reflectance, transmittance, etc. An example of a display device is an EL display. Examples of such displays include field emission displays (FEDs) and flat-panel SEDs. Display (SED: Surface-conduction Electron-e Examples of display devices using liquid crystal elements include LCDs. , LCD display (transmissive LCD, semi-transmissive LCD, reflective LCD LCD displays, direct-view LCD displays, and projection LCD displays. An example of a display device using ink or electrophoretic elements is electronic paper. In order to realize a semi-transmissive or reflective liquid crystal display, the pixel electrode A part or all of the pixel electrodes may be made to function as a reflective electrode. A part or all of the electrodes may be made of aluminum, silver, or the like. In this case, it is also possible to provide a memory circuit such as an SRAM below the reflective electrode. This makes it possible to further reduce power consumption. A configuration using a liquid crystal element as a display element will be described below.

[0330] The display method of the display module 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include , RGB (R represents red, G represents green, B represents blue) three colors are not limited. For example, R pixel and It may be composed of four pixels: a G pixel, a B pixel, and a W (white) pixel. Like a color array, two colors of RGB make up one color element, and different colors are Or, you can use yellow, cyan, magenta, etc. in addition to RGB. You can add more than one color. The size of the display area for each dot of the color element is different. However, the disclosed invention is not limited to a color display device, and may be applied to a mono display device. It can also be applied to a black display device.

[0331] In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) is white light (W In order to make a display device display full color using a colored layer (also called a color filter), The colored layer may be, for example, red (R), green (G), blue (B), Yellow (Y) and other colors can be used in combination as appropriate. The color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, the region not having a colored layer can be The white light from the colored layer may be directly used for display. This reduces the decrease in brightness caused by the colored layer during bright display, reducing power consumption by 20%. However, it may be possible to reduce the light emission by about 30%. When using a full-color display, R, G, B, Y, and white (W) are generated by It is also possible to emit light from an element having a light color. In this embodiment, the power consumption can be further reduced compared to when the The following describes a configuration that does not include a backlight, i.e., a so-called reflective liquid crystal display module. Do the following.

[0332] <Cross-section of display module> A cross-sectional view taken along the dashed line QR in FIG. 28 is shown in FIG. 29. The details of the rule are explained below.

[0333] The display module 700 shown in FIG. 29 includes a wiring section 711, a pixel section 702, and a The wiring section 704 includes a driver circuit section 704 and an FPC terminal section 708. 11 includes a signal line 710. The pixel portion 702 includes a transistor 750 and a capacitor. The source driver circuit section 704 also includes a transistor 752. .

[0334] The transistors 750 and 752 can be the transistors shown above. Cut.

[0335] The transistor used in this embodiment is a highly purified oxide semiconductor in which the formation of oxygen vacancies is suppressed. The transistor has a conductive film, and the current value in the off state (off-state current value) is reduced. Therefore, the retention time of the electric signals such as the image signals can be extended, and the power can be turned off. In the ON state, the write interval can be set longer. Therefore, the frequency of refresh operations can be reduced. This has the effect of reducing power consumption.

[0336] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a display device. By using this, the switching transistor in the pixel section and the driver used in the driver circuit section The transistor can be formed on the same substrate. Since there is no need to use semiconductor devices formed from silicon wafers, etc., The number of points can be reduced. Also, in the pixel section, transistors that can be driven at high speed can be used. By using this, high quality images can be provided.

[0337] The capacitor 790 has a structure in which a dielectric is provided between a pair of electrodes. One electrode of the transistor 790 is a conductive film that functions as a gate electrode of the transistor 750. The other electrode of the capacitor 790 is formed using a conductive film formed in the same process. A conductive film is used to function as a source electrode and a drain electrode of the capacitor 750. The dielectric sandwiched between the electrodes is an insulating film that functions as a gate insulating film of the transistor 750. The velum is used.

[0338] 29, a transistor 750, a transistor 752, and a capacitor 790 On top of this, insulating films 764 and 768 and a planarizing insulating film 770 are provided.

[0339] The insulating film 764 is formed by depositing, for example, a silicon oxide film or a silicon oxynitride film using a PECVD apparatus. The insulating film 768 may be formed by, for example, using a PECVD device. The planarization insulating film 770 may be formed of a silicon nitride film or the like. Imide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide Heat-resistant organic materials such as acrylic resin and epoxy resin can be used. The planarization insulating film 770 may be formed by stacking a plurality of insulating films made of the above material. The planarization insulating film 770 may not be provided.

[0340] The signal line 710 serves as the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed in the same process as the conductive film that functions as the transistor 750. , 752, a conductive film formed in a process different from the source electrode and drain electrode, e.g., a gate The conductive film may be formed in the same process as the conductive film that functions as the electrode. For example, when a material containing copper is used, signal delays caused by wiring resistance are reduced. , making it possible to display on a large screen.

[0341] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 716. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the inner electrode. It is electrically connected to a terminal of C716 via an anisotropic conductive film 780.

[0342] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. .

[0343] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The body 778 is a columnar spacer obtained by selectively etching the insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled by a It should be noted that a spherical spacer may be used as the structure 778. In the embodiment, the structure 778 is provided on the first substrate 701 side. For example, a structure 778 may be provided on the second substrate 705 side, or A structure in which the structure 778 is provided on both the first substrate 701 and the second substrate 705 may be used.

[0344] On the second substrate 705 side, a light-shielding film 738 that functions as a black matrix and a A colored film 736 that functions as a color filter, a light-shielding film 738, and an insulating film that contacts the colored film 736. A veneer 734 is provided.

[0345] The cross-sectional view of a display module 700 shown as an example in FIG. 29 includes a liquid crystal element 775 . The liquid crystal element 775 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. As 76, a liquid crystal material having anisotropy of dielectric constant of 2 or more and 3.8 or less as described above is used. The conductive film 774 is provided on the second substrate 705 side and functions as a counter electrode. The display module 700 shown in FIG. 29 is configured such that a voltage is applied to the conductive films 772 and 774. By changing the orientation of the liquid crystal layer 776, the transmission or non-transmission of light is controlled, and an image is displayed. It can be displayed.

[0346] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed on the planarization insulating film 770 and is connected to a functional conductive film. The conductive film 772 functions as a reflective electrode, that is, one of the electrodes of the display element. The display module 700 shown in FIG. The light is reflected by the colored film 736 and displayed through the colored film 736. .

[0347] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. As a conductive film that transmits visible light, for example, For example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum, Alternatively, a material containing silver may be used. A conductive film that is reflective in visible light is used.

[0348] In addition, when a conductive film that is reflective to visible light is used as the conductive film 772, the conductive film For example, an aluminum film having a thickness of 100 nm may be formed as a lower layer, and A 30 nm thick silver alloy film (for example, an alloy film containing silver, palladium, and copper) is formed on the layer. The above-mentioned structure provides the following excellent effects.

[0349] (1) The adhesiveness between the base film and the conductive film 772 can be improved. (2) The chemical solution It is possible to etch the aluminum film and the silver alloy film at the same time. (3) Conductivity The cross-sectional shape of the membrane 772 can be made to have a good shape (for example, a tapered shape). (3) The reason for this is that the etching rate of the aluminum film by chemicals is slower than that of the silver alloy film. Or, after etching the upper silver alloy film, when the lower aluminum film is exposed, the silver alloy The electrons are drawn from aluminum, which is a metal less noble than the membrane, in other words, a metal with a high ionization tendency. Therefore, etching of the silver alloy film is suppressed and etching of the underlying aluminum film is slowed down. This is because the journey will be faster.

[0350] In the display module 700 shown in FIG. 29, the planarization insulating film 77 of the pixel section 702 The unevenness is formed by, for example, forming the planarization insulating film 770 by using an organic resin film. The organic resin film may be formed by forming the organic resin film with a material such as a resin, and providing irregularities on the surface of the organic resin film. The conductive film 772, which functions as a light-reflecting electrode, is formed along the above-mentioned irregularities. When light enters the conductive film 772, the light may be diffused on the surface of the conductive film 772. As shown in Figure 29, a reflective color LCD By using it as a display device, it is possible to display without using a backlight, so power consumption is reduced. The force can be reduced.

[0351] The display module 700 shown in FIG. 29 is a reflective color liquid crystal display module. For example, the conductive film 772 may be a transparent film that transmits visible light. By using a conductive film, a transmissive color liquid crystal display module can be formed. In the case of a liquid crystal display module, the unevenness provided on the planarization insulating film 770 is not provided. A different configuration may also be used.

[0352] Although not shown in FIG. 29, the conductive films 772 and 774 are provided on the side in contact with the liquid crystal layer 776. , and an alignment film may be provided for each of them. Optical members (optical substrates) such as a member, a phase difference member, an anti-reflection member, etc. may be provided as appropriate. For example, circularly polarized light may be used by a polarizing substrate and a retardation substrate. In the case of a module or a transflective display module, backlight, sidelight, etc. are used as light sources. A gate or the like may also be provided.

[0353] Liquid crystal elements include thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, and polymer dispersed liquid crystal. These liquid crystal materials can be used under certain conditions. Cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. Indicates directions, etc.

[0354] When the in-plane switching system is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the crystalline phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. It has a short response time, is optically isotropic so alignment treatment is not required, and has little viewing angle dependency. In addition, since there is no need to provide an alignment film, rubbing treatment is also unnecessary. It is possible to prevent electrostatic breakdown caused by the electrostatic discharge, and to prevent defects in the liquid crystal display device during the manufacturing process. and damage can be reduced.

[0355] When a liquid crystal element is used as a display element, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, FFS (Fring e Field Switching) mode, ASM (Axially Symmetry ric aligned Micro-cell) mode, OCB (Optical C compensated birefringence mode, FLC (Ferroel etric Liquid Crystal) mode, AFLC (AntiFerro You can use modes such as electric Liquid Crystal.

[0356] Furthermore, normally black type liquid crystal display devices, for example, those employing vertical alignment (VA) mode The liquid crystal display device may be a transmission type. For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV mode, etc. can be used.

[0357] (Embodiment 9) In this embodiment, a touch sensor ( By providing a touch detection device, it functions as an input / output device (also called a touch panel). The configuration that can achieve this will be described with reference to Figures 30 and 31. Explanations of parts that overlap with the embodiments may be omitted.

[0358] FIG. 30 is a projection diagram for explaining the configuration of the input / output device.

[0359] FIG. 30(A) is a projection view of the input / output device 800, and FIG. 30(B) is a projection view of the input / output device 800. 10 is a projection view illustrating the configuration of a detection unit 820U provided. FIG.

[0360] FIG. 31 is a cross-sectional view of the input / output device 800 shown in FIG. 30(A) taken along the line Z1-Z2.

[0361] The input / output device 800 described in this embodiment has a window 834 that transmits visible light, and A plurality of detection units 820U are arranged in a matrix, and the detection units 820U are arranged in the row direction (indicated by arrows Rx in the figure). ) and a scanning line G1 electrically connecting the plurality of detection units 820U arranged in the column direction ( A signal that is electrically connected to a plurality of detection units 820U arranged in a line DL, and a first support for the detection unit 820U, the scanning line G1, and the signal line DL. An input device 850 having a base material 836 and a plurality of input devices 850 overlapping the window portion 834 and arranged in a matrix. A display module including a plurality of pixels 802 and a second substrate 810 supporting the pixels 802. 801 (see FIGS. 30(A) to 30(C)).

[0362] The detection unit 820U is electrically connected to the detection element Ca that overlaps the window portion 834 and the detection element Ca. (See FIG. 30(B)).

[0363] The sensing element Ca sandwiches an insulating layer 823 (not shown in FIG. 30(B)). It includes a first electrode 821 and a second electrode 822 (see FIG. 30(B)).

[0364] The detection circuit 839 receives the selection signal and generates a detection signal based on the change in the capacitance of the detection element Ca. Supply the number data.

[0365] The scanning line G1 can supply a selection signal, and the signal line DL supplies a detection signal DATA. The detection circuit 839 is arranged to overlap the gaps between the plurality of windows 834. .

[0366] The input / output device 800 described in this embodiment includes a detection unit 820U and a detection unit A colored layer is provided between the window portion 834 of the unit 820U and the pixel 802 that overlaps it.

[0367] The input / output device 800 described in this embodiment is a detector having a window 834 that transmits visible light. An input device 850 having a plurality of sensing units 820U and a plurality of pixels 802 overlapping a window portion 834. and a display module 801 including a plurality of pixels 802, and a colored layer between the window portion 834 and the pixel 802. It consists of:

[0368] This allows the input / output device to generate a detection signal based on the change in capacitance and a detection unit that supplies the detection signal. and providing position information of the sensing unit and image information associated with the position information of the sensing unit. As a result, a novel input / output device with excellent convenience and reliability can be provided. can be provided.

[0369] The input / output device 800 is also a flexible board that receives signals from the input device 850. and a flexible printed circuit board (FPC) 1 or / and a flexible printed circuit board (FPC) 2 that supplies a signal containing image information to the display module 801. The flexible substrate FPC2 may be provided.

[0370] In addition, a protective substrate 837 and a protective layer 837p are provided to protect the input / output device 800 by preventing scratches. and / or the input / output device 800 is provided with an anti-reflection layer 867p that reduces the intensity of reflected external light. It may be possible to do so.

[0371] The input / output device 800 also includes a scanning line for supplying a selection signal to the scanning line of the display module 801. The drive circuit 803g, the signal supply wiring 811, and the flexible substrate FPC2 are electrically and a terminal 819 connected to the

[0372] The individual elements that make up the input / output device 800 will be described below. are not clearly separable, and one component may also contain other components or parts of other components. For example, the input device 850 having a colored layer at a position overlapping the plurality of window portions 834 may The device 850 is also a color filter.

[0373] The input / output device 800 includes an input device 850 and a display module 801 (see FIG. 30( See A).

[0374] The input device 850 supports a plurality of sensing units 820U and A first substrate 836 is provided. For example, a plurality of detection units are arranged in a matrix of 40 rows and 15 columns. 820U is disposed on a first substrate 836.

[0375] The window 834 transmits visible light.

[0376] A colored layer that transmits light of a predetermined color is provided at a position overlapping the window portion 834. For example, Transparent colored layer CFB, green light transparent colored layer CFG or red light transparent colored layer It has a layer CFR (see Figure 30(B)).

[0377] In addition to blue, green, and / or red, a colored layer that transmits white light or a yellow Colored layers that transmit light of various colors may be provided.

[0378] The colored layer may be made of a metal material, a pigment, a dye, or the like.

[0379] A light-shielding layer BM is provided so as to surround the window portion 834. The light-shielding layer BM prevents light from passing through the window portion 834. Hard to penetrate.

[0380] Carbon black, metal oxides, composite oxides including solid solutions of multiple metal oxides, etc. can be used for the layer BM.

[0381] The scanning line G1, the signal line DL, the wiring VPI, the wiring RES, and the like are arranged at positions overlapping the light-shielding layer BM. It is provided with a wiring VRES and a detection circuit 839.

[0382] In addition, a light-transmitting overcoat layer that covers the colored layer and the light-shielding layer BM may be provided. do.

[0383] The sensing element Ca has a first electrode 821, a second electrode 822, and a pair of electrodes An insulating layer 823 is provided between the electrodes 822 (see FIG. 31).

[0384] The first electrode 821 is formed, for example, in an island shape so as to be separated from other regions. The first electrode 821 and the output device 800 are connected to each other so that the first electrode 821 is not identified by the user of the output device 800. A configuration in which a layer that can be fabricated in the same process is disposed adjacent to the first electrode 821 is preferred. More preferably, the first electrode 821 and a layer disposed adjacent to the first electrode 821 It is preferable to minimize the number of windows 834 disposed in the gaps. A configuration in which 834 is not provided is preferable.

[0385] For example, the first electrode 821 or the second electrode 822 of the sensing element Ca placed in the atmosphere is When something with a different dielectric constant than the air approaches, the capacitance of the sensing element Ca changes. When an object such as a finger approaches the sensing element Ca, the capacitance of the sensing element Ca changes. This means that it can be used as a proximity detector.

[0386] The first electrode 821 and the second electrode 822 include a conductive material.

[0387] For example, inorganic conductive materials, organic conductive materials, metals, conductive ceramics, etc. It can be used for the electrode 821 and the second electrode 822.

[0388] Specifically, the first electrode 821 and the second electrode 822 are made of aluminum, chromium, copper, or the like. , tantalum, titanium, molybdenum, tungsten, nickel, silver or manganese The metal elements, alloys containing the above-mentioned metal elements, or combinations of the above-mentioned metal elements An alloy containing the above metals can be used.

[0389] Alternatively, the first electrode 821 and the second electrode 822 may be made of indium oxide or indium tin. Conductive acids such as oxides, indium zinc oxide, zinc oxide, and zinc oxide doped with gallium Compounds can be used.

[0390] Alternatively, the first electrode 821 and the second electrode 822 may be made of graphene or graphite. The graphene-containing film can be, for example, a film of graphene oxide. The film can be formed by reducing the film containing the compound. Examples of the method include a method using a base agent.

[0391] Alternatively, a conductive polymer can be used for the first electrode 821 and the second electrode 822. Cut.

[0392] The detection circuit 839 includes, for example, transistors M1 to M3. 839 includes wiring for supplying power supply potential and signals. For example, signal line DL, wiring VPI, It includes wiring CS, scanning line G1, wiring RES, and wiring VRES.

[0393] The detection circuit 839 may be disposed in a region that does not overlap with the window portion 834 .

[0394] Conductive materials are wired (for example, signal lines DL, wiring VPI, wiring CS, scanning lines G1, For example, inorganic conductive materials, organic conductive materials, etc. Conductive materials, metals, conductive ceramics, etc. can be used for the wiring. The same material as that used for the first electrode 821 and the second electrode 822 is used for the wiring. It may also be applied as follows.

[0395] Also, aluminum, gold, platinum, silver, nickel, titanium, tungsten, chromium, molyb Metallic materials such as nickel, iron, cobalt, copper, or palladium, and alloy materials containing such metallic materials It can be used for the scanning line G1, signal line DL, wiring VPI, wiring RES and wiring VRES. Cut.

[0396] The detection circuit 839 may be formed on the first base material 836. Alternatively, the detection circuit 839 may be formed on another base material. The assembled sensing circuit 839 may be transferred to the first substrate 836 .

[0397] The first substrate 836 and the second substrate 810 may be a glass substrate or a flexible material (e.g., For example, a resin, a resin film, or a plastic film can be used.

[0398] More specifically, the first substrate 836 and the second substrate 810 are made of alkali-free glass, Soda lime glass, potash glass, crystal glass, etc. can be used. The first substrate 836 may be made of polyester, polyolefin, polyamide, polyimide, or the like. Use a resin film or plate such as polycarbonate or acrylic resin. can be done.

[0399] The protective substrate 837 and / or the protective layer 837p may be, for example, glass or polyester. , polyolefin, polyamide, polyimide, polycarbonate, acrylic resin, etc. A resin film, a resin plate, a laminate, or the like can be used.

[0400] The protective layer 837p may be, for example, a hard coat layer or a ceramic coat layer. Specifically, a layer containing a UV curable resin or aluminum oxide can be formed on the second electrode 8. It may be formed at a position overlapping with 22.

[0401] The display module 801 includes a plurality of pixels 802 arranged in a matrix (see FIG. 30). (See (C)).

[0402] For example, pixel 802 includes subpixel 802B, subpixel 802G, and subpixel 802R, Each sub-pixel comprises a display element and a pixel circuit for driving the display element.

[0403] The sub-pixel 802B of the pixel 802 is disposed at a position overlapping the colored layer CFB, and the sub-pixel 80 The sub-pixel 202G is arranged at a position overlapping with the colored layer CFG, and the sub-pixel 802R is arranged at a position overlapping with the colored layer CFR. It is placed in a location.

[0404] The colored layer CFR is located at a position overlapping the liquid crystal element 880. The liquid crystal element 880 is located at a position overlapping one of the electrodes. The reflecting electrode 872 is provided as a polarizer (see FIG. 31). A part of the reflected external light passes through the colored layer CFR and is emitted in the direction of the arrow shown in the figure. The electrode 872 may be formed by a conductive film similar to the conductive film 772 functioning as a reflective electrode in the above embodiment. The liquid crystal element 880 may have a dielectric constant anisotropy of 2 or more and 3.8 or less. The liquid crystal layer has a

[0405] In addition, a light-shielding layer BM is provided so as to surround the colored layer (for example, the colored layer CFR).

[0406] The scanning line driver circuit 803g includes a transistor 803t and a capacitor 803c (see FIG. 31). (see).

[0407] The detection signal DATA supplied by the detection unit 820U is converted and output to the flexible substrate FPC1 Various circuits that can be supplied to the converter CONV can be used (see FIG. 3). 0(A) and Figure 31).

[0408] For example, transistor M4 can be used for converter CONV.

[0409] The display module 801 includes an anti-reflection layer 867p at a position overlapping the pixel. For example, a circular polarizer can be used as 867p.

[0410] As shown in FIG. 30(A), the display module 801 has wiring that can supply signals. The wiring 811 is provided with a terminal 819. A flexible circuit board FPC2 that can supply signals such as It continues.

[0411] The flexible board FPC2 has a printed wiring board (PWB) attached. is also good.

[0412] The display module 801 has wiring such as scanning lines, signal lines, and power lines. can be used for wiring.

[0413] The wiring of the display module 801 may be made of, for example, aluminum, chromium, copper, or tungsten. Ta, titanium, molybdenum, tungsten, nickel, yttrium, zirconium, silver or manganese, an alloy containing the above-mentioned metal element as a component, or In particular, alloys of aluminum, chromium, etc., which are combinations of metal elements, can be used. , copper, tantalum, titanium, molybdenum, and tungsten. In particular, an alloy of copper and manganese is suitable for microfabrication using a wet etching method. It is suitable.

[0414] The wiring of the display module 801 is specifically configured as a titanium film on an aluminum film. Two-layer structure with titanium film stacked on titanium nitride film, two-layer structure with titanium film stacked on titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film Two-layer structure with a titanium film and an aluminum film stacked on top of the titanium film. A three-layer structure can be used in which a titanium film is formed on top of the aluminum film. Titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scum A laminated layer of an alloy film or a nitride film made of one or more selected from indium Alternatively, a light-transmitting material containing indium oxide, tin oxide, or zinc oxide may be used. Alternatively, a conductive material having such properties may be used.

[0415] (Embodiment 10) In this embodiment mode, electronic devices manufactured using the liquid crystal display device described in the above embodiment mode will be described. A specific example of this will be described with reference to FIG.

[0416] An example of an electronic device to which the present invention can be applied is a television device (television or television set). (also called television receivers), computer monitors, digital cameras, digital video Cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, music players These include video game devices, gaming machines (pachinko machines, slot machines, etc.), and game cabinets. A specific example of electronic equipment is shown in FIG.

[0417] FIG. 32(A) shows a mobile information terminal 1400 having a display unit. 00 has a housing 1401 in which a display unit 1402 and operation buttons 1403 are built. The liquid crystal display device of one embodiment of the present invention can be used for the display portion 1402.

[0418] FIG. 32B shows a mobile phone 1410. The mobile phone 1410 has a housing 141 1, a display unit 1412, operation buttons 1413, a speaker 1414, and a microphone 1415. The liquid crystal display device of one embodiment of the present invention can be used for the display portion 1412. Cut.

[0419] FIG. 32(C) shows a music playback device 1420. The music playback device 1420 has a housing 1 A display unit 1422, operation buttons 1423, and an antenna 1424 are incorporated in 421. Furthermore, information can be transmitted and received by radio signals from the antenna 1424. The liquid crystal display device of one embodiment can be used for the display portion 1422.

[0420] The display unit 1402, the display unit 1412, and the display unit 1422 have a touch input function. Display buttons (not shown) displayed on the display units 1402, 1412, and 1422 ) can be used to operate the screen and input information by touching it with your finger or other object.

[0421] The liquid crystal display device shown in the above embodiment includes the display portion 1402, the display portion 1412, and the display portion 14 22, the display unit 1402, the display unit 1412, and the display It can be a display unit 1422.

[0422] (Notes regarding the present specification) The above-described embodiments and the respective components in the embodiments will be described below with additional notes. <Additional Notes Regarding One Aspect of the Present Invention Described in the Embodiments>

[0423] The configurations shown in each embodiment may be combined with the configurations shown in other embodiments to form one embodiment of the present invention. In addition, when multiple configuration examples are shown in one embodiment, The configuration examples can be appropriately combined with each other.

[0424] Note that the content (or even a part of the content) described in one embodiment may be used in conjunction with that embodiment. Other content (or even part of content) described in the above, and / or one or more other implementations The content (or part of the content) described in the form of You can do things like:

[0425] The contents described in the embodiments are explained in detail in each embodiment using various drawings. This refers to the content that is stated or the content that is stated using the text in the specification.

[0426] In addition, a drawing (or a part thereof) described in one embodiment may be different from another part of the drawing, Another figure (or a part thereof) described in the embodiment, and / or one or more By combining with the figure (or a part thereof) described in another embodiment of the present invention, , and many more diagrams can be constructed.

[0427] Although one aspect of the present invention has been described in each embodiment, one aspect of the present invention is not limited to these. For example, in one aspect of the present invention, in the first and second embodiments, the first operation and the second operation are We have explained the configuration in which the scanning direction is switched by switching between the two operations. However, one aspect of the present invention is not limited to this. Depending on the situation, for example, a configuration in which scanning is performed in one direction may be used. For example, in a fourth embodiment of the present invention, the circuit 100 may be configured as a shift register. However, one embodiment of the present invention is not limited to this. Depending on the circumstances, for example, the circuit 100 may be applied to various circuits as one aspect of the present invention.

[0428] <Notes regarding the description of the drawings>

[0429] In this specification, the terms "above" and "below" that indicate the positional relationship between components are used. are used for convenience in describing the drawings. Therefore, the terms indicating the arrangement may be changed as appropriate depending on the direction in which the arrangement is depicted. The terms are not limited to those described above and can be rephrased appropriately depending on the situation.

[0430] In addition, the terms "above" and "below" refer to the positional relationship of a component that is directly above or directly below and directly connected to it. For example, if the expression is "electrode B on insulating layer A," The electrode B does not need to be formed directly on the insulating layer A, and the insulating layer A and the electrode B This does not exclude the inclusion of other components in between.

[0431] In the present specification and the like, in the block diagrams, the components are classified by function and are independent of each other. However, in actual circuits, components are divided into blocks according to their functions. It is difficult to separate them, and there are cases where multiple functions are involved in one circuit, or where multiple circuits are involved. Therefore, the blocks in the block diagram may be different from those described in the specification. The present invention is not limited to the components shown.

[0432] In addition, in the drawings, the size, thickness of a layer, or area is shown arbitrarily for the convenience of explanation. Therefore, the drawings are not necessarily limited to the scale. The drawings are merely schematic illustrations for the purpose of clarity, and are not limited to the shapes or values ​​shown in the drawings. Signal, voltage, or current variations due to noise, or signals due to timing deviations , voltage, or current variations, etc.

[0433] In addition, in the drawings, top views (also called plan views or layout views) and perspective views, In order to clarify the drawings, some components may be omitted.

[0434] <Notes regarding possible paraphrases>

[0435] In this specification and the like, when describing the connection relationship of a transistor, one of the source and the drain is referred to as "one of the source and drain" (or the first electrode, or the first terminal), and The other side of the drain is referred to as the "other side of the source or drain" (or second electrode, or second terminal). This means that the source and drain of a transistor are This is because it changes depending on the conditions. Regarding the names of the source and drain of a transistor, can be appropriately rephrased as source (drain) terminal, source (drain) electrode, etc. depending on the situation. It can be done.

[0436] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring." Furthermore, the terms "electrode" and "wiring" are used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the "line" is formed as a single unit.

[0437] In this specification and the like, the terms voltage and potential can be interchanged as appropriate. For example, the reference potential is the ground potential (earth potential). If we use the term "ground potential" (potential), we can translate voltage into potential. Note that the potential is relative, and the distribution may differ depending on the reference potential. The potential applied to the wires may be changed.

[0438] In this specification, the terms "film" and "layer" may be used in some cases or depending on the situation. For example, the term "conductive layer" can be used interchangeably with "conductive layer" It may be possible to change the term to "conductive film." Alternatively, for example, In some cases, it may be possible to change the term to "insulating layer."

[0439] <Notes on definitions of terms> The following provides definitions of terms that have been mentioned in the above embodiments. <<About the switch>> In this specification, a switch is a device that can be in a conducting state (ON state) or a non-conducting state (OFF state). It refers to a device that has the function of controlling whether or not current flows by entering a state where it is in a non-transitory state. A switch is a device that has the function of selecting and switching a path through which current flows.

[0440] For example, an electrical switch or a mechanical switch can be used. The switch is not limited to a specific one as long as it can control the current.

[0441] An example of an electrical switch is a transistor (e.g., a bipolar transistor, M OS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diode, MIM (Metal Insulator Metal) diode MIS (Metal Insulator Semiconductor) diodes diode-connected transistors), or logic circuits that combine these. be.

[0442] When a transistor is used as a switch, the "conduction state" of the transistor is This refers to a state in which the source and drain of a transistor can be considered to be electrically short-circuited. The "non-conducting state" of a transistor means that the source and drain of the transistor are electrically isolated. In addition, when a transistor is operated simply as a switch, In this case, the polarity (conductivity type) of the transistor is not particularly limited.

[0443] An example of a mechanical switch is a digital micromirror device (DMD). There are switches that use MEMS (microelectromechanical systems) technology. The switch has a mechanically movable electrode, and the movement of the electrode Thus, the device operates by controlling conduction and non-conduction.

[0444] <<About channel length>> In this specification and the like, the channel length is, for example, the length of a semiconductor (or the part of the semiconductor through which current flows when the transistor is on) and the gate The distance between the source and drain in the overlapping region, or the region where the channel is formed This refers to...

[0445] In one transistor, the channel length does not necessarily have the same value in all regions. That is, the channel length of a transistor may not be fixed to a single value. Therefore, in this specification, the channel length is defined as the length of any one of the regions where the channel is formed. The value may be a maximum, minimum or average value.

[0446] <<About channel width>> In this specification, the channel width is, for example, the width of a semiconductor (or a transistor when it is in an on-state) The area where the gate electrode overlaps with the gate electrode, or the channel This refers to the length of the portion where the source and drain face each other in the region where the source and drain are formed.

[0447] In one transistor, the channel width does not necessarily have the same value in all regions. That is, the channel width of a transistor may not be fixed to a single value. Therefore, in this specification, the channel width is defined as any one of the widths in the region where the channel is formed. The value, maximum value, minimum value or average value.

[0448] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width (hereinafter referred to as the effective channel width) and the The channel width (hereinafter referred to as apparent channel width) may differ from the actual channel width. For example, In a transistor having a three-dimensional structure, the effective channel width is The apparent channel width becomes larger than that shown in For example, in a transistor with a fine, three-dimensional structure, The ratio of the channel region formed on the side of the semiconductor to the channel region formed In this case, the apparent channel width shown in the top view may be larger. The effective channel width where the channel is actually formed is larger than the actual channel width.

[0449] In the case of a transistor having a three-dimensional structure, the effective channel width is measured. For example, it may be difficult to estimate the effective channel width from the design value. In order to obtain this, it is necessary to assume that the shape of the semiconductor is known. If is not known accurately, it is difficult to accurately measure the effective channel width.

[0450] Therefore, in this specification, in a top view of a transistor, a semiconductor and a gate electrode are overlapped. The apparent channel length is the length of the area where the source and drain face each other. The channel width is defined as the "surrounded channel width (SCW)". In this specification, when simply referred to as channel width, may refer to enclosed channel width or apparent channel width. In this document, when simply referring to channel width, it may refer to the effective channel width. Channel length, channel width, effective channel width, apparent channel width, enclosure channel The channel width can be determined by acquiring a cross-sectional TEM image and analyzing the image. A value can be determined.

[0451] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0452] <<About pixels>> In this specification, a pixel refers to, for example, one element whose brightness can be controlled. Therefore, as an example, one pixel refers to one color element, and one color element Therefore, the brightness is expressed as R (red), G (green), and B (blue). In the case of a color display device, the smallest unit of an image is a triplet of R, G, and B pixels. It is assumed to be composed of elements.

[0453] The color elements are not limited to three colors, and may be more than three. For example, RGBW (W is white) , and RGB with the addition of yellow, cyan, and magenta.

[0454] <<About connection>> In this specification, "A and B are connected" means that A and B are directly connected. In addition to the above, it also includes things that are electrically connected. Being connected means that there is an object that has some kind of electrical effect between A and B. A means a device that enables the transmission and reception of electrical signals between A and B.

[0455] For example, if the source (or first terminal, etc.) of the transistor is connected via Z1 (or (not shown), electrically connected to X, and the drain (or second terminal, etc.) of the transistor is connected to Z 2 (or not), and is electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. and another part of Z2 is directly connected to Y, It is possible to do so.

[0456] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" The terminals of the transistor (or the first terminal) are electrically connected to each other. 1 terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y. It can be expressed as "connected to the source (or the first The first terminal of the transistor is electrically connected to X, and the drain of the transistor is electrically connected to the second terminal of the transistor. The transistor source (or first terminal, etc.) is electrically connected to Y, and the transistor source (or first terminal, etc.) is electrically connected to X. The drain (or second terminal, etc.) of the transistor, Y, is electrically connected in this order. " Alternatively, "X is the source (or first terminal, etc.) of the transistor. and the drain (or second terminal, etc.) are electrically connected to Y, and X, the source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor ), Y is provided in this order of connection. By specifying the order of connections in the circuit configuration using a simple expression method, Distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined by the above.

[0457] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" is electrically connected to X through at least a first connection path, and the first connection path is , and the second connection path is a transistor through a transistor. The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The first connection path is a path via Z1, and the second connection path is a path between the first and second transistors. The drain (or second terminal, etc.) of the capacitor is electrically connected to Y through at least a third connection path. the third connection path does not have the second connection path, and the third connection path The connection path is the path via Z2. The source (or first terminal, etc.) of the resistor is connected to the resistor via Z1 by at least the first connection path. and electrically connected to X, and the first connection path does not have a second connection path; The second connection path has a connection path through a transistor, and (or the second terminal, etc.) is connected to Y via Z2 by at least a third connection path. The third connection path does not have the second connection path. Alternatively, the source (or first terminal, etc.) of the transistor may be at least The first electrical path is electrically connected to X through Z1. The primary path does not have a second electrical path, and the second electrical path is a From the source (or first terminal, etc.) to the drain (or second terminal, etc.) of the transistor The drain (or second terminal, etc.) of the transistor is connected to at least a third The third electrical path is electrically connected to Y through Z2. , does not have a fourth electrical path, and the fourth electrical path is (or second terminal, etc.) to the source (or first terminal, etc.) of the transistor. Using the same expression as these examples, the circuit configuration By defining the connection path in Distinguishing between the first terminal (or the second terminal, etc.) and the drain (or the second terminal, etc.) to determine the technical scope. can be done.

[0458] These representation methods are merely examples, and the present invention is not limited to these representation methods. , Y, Z1, Z2 are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.). [Explanation of symbols]

[0459] CK1 signal CK2 signal CK3 signal OUT[i] Output signal OUT[i+1] output signal OUT[i+2] output signal G1 scan line M1 transistor M3 transistor M4 transistor ND1 node ND2 node ND3 node t1 period t2 period t3 period t4 period t5 period t6 period T1 period T2 period T3 period T4 period T5 period T6 period SL wiring OUT wiring SEL1 signal SEL2 signal RES wiring VPI wiring VRES wiring DL signal line CS wiring DATA detection signal FPC1 Flexible PCB FPC2 flexible circuit board 100 circuits 101 Transistor 102 transistor 102A Switch 103 Transistor 103A Switch 104 transistors 105 transistors 105A switch 106 transistors 107 Transistor 108 transistors 109 Transistor 110 Capacitor element 111 Transistor 112 transistors 113 Transistor 114 Capacitor element 130 pixel section 131 pixels 132 transistors 133 Liquid crystal element 134 Capacitor element 135 transistors 136 transistors 137 EL element 151 Wiring 152 Wiring 153 Wiring 154 Wiring 154A wiring 155 Wiring 156 Wiring 157 Wiring 158 Wiring 159 Wiring 160 Wiring 161 Wiring 162 Wiring 163 Wiring 200 Shift Registers 201 circuits 211 Wiring 212 Wiring 213 Wiring 214 Wiring 215 Wiring 216 Wiring 217 Wiring 218 Wiring 300 circuits 301 Circuit 401 First Wiring 402 Second Wiring 403 Semiconductor layer 404 Opening 600 transistors 601 Substrate 602 Gate electrode 603 Insulation Layer 604 Oxide semiconductor layer 604a Channel region 604b n-type region 604c n-type region 605a electrode 605b electrode 606 Insulation Layer 607 Insulating layer 610 Transistor 614 Oxide semiconductor layer 614a Oxide semiconductor layer 614b Oxide semiconductor layer 620 Transistor 624 Oxide semiconductor layer 624a Oxide semiconductor layer 624b Oxide semiconductor layer 624c Oxide semiconductor layer 650 transistors 651 Insulation Layer 652 Insulation layer 654 Insulating layer 656 Insulating Layer 660 transistors 664 Oxide semiconductor layer 664a Oxide semiconductor layer 664b Oxide semiconductor layer 664c Oxide semiconductor layer 670 transistors 700 Display Module 701 PCB 702 pixel section 704 Source driver circuit section 705 PCB 706 Gate driver circuit section 708 FPC terminal section 710 Signal Line 711 Wiring section 712 Sealing material 716 FPC 734 Insulating Film 736 Colored film 738 Light-shielding film 750 transistors 752 transistors 760 connecting electrode 764 insulating film 766 Insulating Film 768 insulating film 770 Planarization insulating film 772 Conductive film 774 Conductive film 775 Liquid Crystal Elements 776 Liquid Crystal Layer 778 Structure 780 Anisotropic Conductive Film 790 Capacitor 800 I / O devices 801 Display Module 802 pixels 802B subpixel 802G subpixel 802R subpixel 803c capacity 803g Scanning line driver circuit 803t transistor 810 Base material 811 Wiring 817 Protective base material 819 terminal 820U Detection Unit 821 Electrode 822 Electrode 823 Insulation layer 834 Window 836 Base material 837 Protective base material 837p protective layer 839 Detection circuit 850 Input Device 867p anti-reflection layer 872 Reflecting electrode 880 Liquid crystal element 1135 Transistor 1400 Mobile Information Terminal 1401 Case 1402 Display section 1403 Operation button 1410 Mobile Phones 1411 Case 1412 Display section 1413 Operation button 1414 Speaker 1415 Mike 1420 Music Player 1421 Case 1422 Display section 1423 Operation Button 1424 Antenna

Claims

[Claim 1] a gate electrode provided on the substrate; a first insulating layer provided on the substrate and the gate electrode; an oxide semiconductor layer provided on the first insulating layer so as to overlap the gate electrode; a pair of electrodes in contact with an upper surface of the oxide semiconductor layer; a second insulating layer covering the first insulating layer, the oxide semiconductor layer, and the pair of electrodes; A semiconductor device comprising a third insulating layer provided on the second insulating layer.

Images