Indication device

The dual-view display device with alternately positioned pixels and shared transistors addresses complexity and cost issues by reducing source lines and enhancing display quality.

JP2026044144APending Publication Date: 2026-03-12SHARP KK
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-29
Publication Date
2026-03-12

AI Technical Summary

Technical Problem

Conventional dual-view display devices lack an unconventional configuration that efficiently manages multiple images for different viewers while reducing complexity and cost.

Method used

A dual-view display device with alternately positioned first and second display pixels connected to the same source line, sharing transistors, and differentiated gate voltage thresholds to control image presentation in public and privacy modes.

Benefits of technology

Reduces the number of source lines, lowers costs, and decreases power consumption while facilitating signal processing and improving display quality in dual-view configurations.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026044144000001_ABST
    Figure 2026044144000001_ABST
Patent Text Reader

Abstract

A dual-view display device with a different configuration from conventional ones is provided. [Solution] A display device (1) capable of presenting a first image to a first user located at a first position relative to a display surface and presenting a second image different from the first image to a second user located at a second position different from the first position has a first display pixel (PX1) that contributes to forming the first image and a second display pixel (PX2) that contributes to forming the second image. The first display pixel (PX1) and the second display pixel (PX2) are positioned alternately in a source line arrangement direction of the display device (1). The display device (1) has a first transistor (TR1) connected to the first display pixel (PX1) and a second transistor (TR2) connected to the second display pixel (PX2). The first transistor (TR1) and the second transistor (TR2) that are adjacent in the source line arrangement direction are connected to the same source line (SL).
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The following disclosure relates to display devices. [Background technology]

[0002] A display device that can present multiple individual images corresponding to the viewing direction of a user (viewer) on a single display surface is called a multi-view display device, and a multi-view display device that can present two individual images corresponding to the viewing direction of a user is called a dual-view display device.

[0003] Various technologies have been proposed for dual-view display devices. For example, Patent Document 1 below discloses a display control method aimed at providing a user of a dual-view display device with a comfortable feeling while providing the user with more information. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-217824 Summary of the Invention [Problem to be solved by the invention]

[0005] It is an object of one aspect of the present disclosure to provide a dual view display device with an unconventional configuration. [Means for solving the problem]

[0006] A display device according to one embodiment of the present disclosure is a display device capable of presenting a first image to a first user located at a first position relative to a display surface, and presenting a second image different from the first image to a second user located at a second position different from the first position, wherein the display device has a plurality of first display pixels that contribute to forming the first image on the display surface, a plurality of second display pixels that contribute to forming the second image on the display surface, and a plurality of source lines that are spaced apart from each other in a source line arrangement direction, wherein the first display pixels and the second display pixels are positioned alternately in the source line arrangement direction, and the display device has a plurality of first transistors that are respectively connected to the plurality of first display pixels and a plurality of second transistors that are respectively connected to the plurality of second display pixels, wherein the first transistors and the second transistors that are adjacent in the source line arrangement direction are connected to the same source line. [Effects of the Invention]

[0007] According to one aspect of the present disclosure, a dual view display device with a configuration different from conventional ones can be provided. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 2 is a diagram illustrating an operation mode of the display device of the first embodiment. [Figure 2] 1 shows a schematic diagram of a hardware configuration related to image display in a display device 1. [Figure 3] 1 shows an example of a circuit configuration in a display device as a comparative example. [Figure 4] 2 shows an example of a circuit configuration in the display device of the first embodiment. [Figure 5] 1 is a flowchart illustrating a processing flow in the first embodiment. [Figure 6] 10 is a flowchart illustrating a processing flow in the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Embodiment 1] The display device 1 of the first embodiment will be described below. For ease of explanation, components having the same functions as those described in the first embodiment will be denoted by the same reference numerals in the following embodiments, and the description thereof will not be repeated. For the sake of brevity, the description of matters similar to those in the publicly known technology will also be omitted as appropriate.

[0010] Unless otherwise stated, the components and values ​​described in this specification are merely examples. Therefore, for example, unless otherwise stated, the positional relationships and connection relationships of the components are not limited to the examples in the drawings. Furthermore, unless otherwise stated, the term "connected" in this specification means "electrically connected."

[0011] (Overview of Display Device 1) 1 is a diagram illustrating the operation modes of the display device 1. The display device 1 is configured as a dual-view display device. In addition, the display device 1 is configured to be switchable between two modes: a public mode and a privacy mode.

[0012] Conditions for switching between the public mode and the privacy mode of the display device 1 may be set arbitrarily. In the first embodiment, the display device 1 has a control unit (not shown) that comprehensively controls each unit of the display device 1. The control unit may switch between the public mode and the privacy mode according to the conditions.

[0013] 1 illustrates two users as viewers of an image displayed on the display device 1. In this specification, one of the two users is referred to as a first user U1, and the other is referred to as a second user U2.

[0014] In this specification, it is assumed that a first user U1 is located at a first position relative to the display surface 15 of the display device 1. On the other hand, it is assumed that a second user U2 is located at a second position relative to the display surface 15. In this specification, it is assumed that the second position is a position different from the first position.

[0015] 1, the first user U1 is positioned in front of the display surface 15. On the other hand, the second user U2 is positioned to the side of the display surface 15. Therefore, in the example of FIG. 1, the first position is a position in front of the display surface 15, and the second position is a position to the side of the display surface 15.

[0016] In the first embodiment, a case where an image is mainly presented to a first user U1 is illustrated. As an example, the display device 1 may be installed in an automobile. In this case, for example, the first user U1 is a person (non-driver) sitting in the passenger seat of the automobile, and the second user U2 is a person (driver) sitting in the driver's seat of the automobile.

[0017] Reference numeral 110 in Fig. 1 schematically shows an example of an image display in public mode. In public mode, the same (common) image is presented to both the first user U1 and the second user U2. The image IMG_COMMON in the example of reference numeral 110 is an example of the same image in public mode.

[0018] 1, reference numeral 120 schematically illustrates an example of an image display in privacy mode. The privacy mode is one aspect of a dual display mode. In a typical dual view display device, in dual display mode, a first user U1 is presented with an image (a first image), and a second user U2 is presented with a second image different from the first image.

[0019] An example of the first image in the dual display mode is a content image not related to driving a car (e.g., an entertainment content image), while an example of the second image in the dual display mode is a content image related to driving a car (e.g., an information image presented by the car navigation system software).

[0020] However, in order to allow the second user U2 to concentrate on driving the car, it may be preferable that the second user U2's attention is not distracted by the second image. Therefore, in the privacy mode, a black display image is presented as the second image. In the example of reference numeral 120, image IMG1 is an example of the first image, and image IMG_BK is an example of the second image as a black display image. A black display image is an image in which all gradation values ​​are 0.

[0021] Fig. 2 schematically shows a hardware configuration related to image display in the display device 1. Fig. 2 is a diagram paired with Fig. 1. As shown in Fig. 2, the display device 1 has a plurality of first display pixels PX1 and a plurality of second display pixels PX2 as a plurality of display pixels.

[0022] In the dual display mode, the first display pixel PX1 is a display pixel that contributes to forming a first image on the display surface 15. On the other hand, in the dual display mode, the second display pixel PX2 is a display pixel that contributes to forming a second image on the display surface 15. In the first embodiment, the first display pixel PX1 and the second display pixel PX2 are positioned alternately in the direction in which the source lines, which will be described later, are arranged.

[0023] As shown in FIG. 2, the display device 1 includes a barrier BA. The barrier BA is also called a parallax barrier. The barrier BA may include any light-absorbing material. For this reason, the barrier BA may also be called a light-shielding portion. In the example of FIG. 2, the barrier BA covers only a portion of the first display pixel PX1 when viewed from the display surface 15. On the other hand, the barrier BA covers the entire second display pixel PX2 when viewed from the display surface 15.

[0024] The barrier BA is located closer to the viewer than the first display pixel PX1 and the second display pixel PX2. Therefore, as shown in Fig. 2, an opening HL is formed in the barrier BA. The opening HL is located so as to expose a part of the first display pixel PX1 when viewed from the display surface 15.

[0025] 2, reference numeral 210 schematically shows an example of operation of the display device 1 in the public mode. As described above, in the public mode, the same image (e.g., image IMG_COMMON) is presented to the first user U1 and the second user U2. Therefore, in the public mode, the first display pixel PX1 and the second display pixel PX2 are driven so that (i) the image IMG_COMMON to be presented to the first user U1 is formed by the first display pixel PX1, and (ii) the image IMG_COMMON to be presented to the second user U2 is formed by the second display pixel PX2.

[0026] 2, most of the first display pixel PX1 is not covered by the barrier BA. Therefore, most of the light emitted from the first display pixel PX1 passes through the opening HL and reaches the display surface 15. This light forms an image IMG_COMMON to be presented to the first user U1 on the display surface 15. In the first embodiment, the first display pixel PX1 is configured so that the light emitted from the first display pixel PX1 has directivity mainly toward the first position.

[0027] On the other hand, the second display pixel PX2 is covered by a barrier BA. Therefore, most of the light emitted from the second display pixel PX2 is blocked by the barrier BA. However, part of the light emitted from the second display pixel PX2 has directivity toward the sides of the display surface 15. Therefore, part of the light emitted from the second display pixel PX2 that has directivity toward the sides of the display surface 15 passes through the opening HL and reaches the display surface 15. This light forms an image IMG_COMMON on the display surface 15 to be presented to the second user U2.

[0028] Reference numeral 220 in FIG. 2 schematically shows an example of the operation of the display device 1 in the privacy mode. As described above, the second image in the privacy mode is a black display image. Therefore, in the privacy mode, the second display pixel PX2 is not driven. Therefore, in the privacy mode, no light is emitted from the second display pixel PX2.

[0029] On the other hand, in the privacy mode, the first display pixel PX1 is driven so that the first image to be presented to the first user U1 is formed by the first display pixel PX1, and therefore, in the privacy mode, light is emitted only from the first display pixel PX1.

[0030] (Circuit configuration of comparative example) A comparative example will be described before describing the circuit configuration of the display device 1. In this specification, the display device as the comparative example will be referred to as a display device 1R. The display device 1R is an example of a conventional dual-view display device.

[0031] Fig. 3 shows an example of the circuit configuration of a display device 1R. The display device 1R has a plurality of source lines SL that are spaced apart from each other in the source line arrangement direction (in the example of Fig. 3, the horizontal direction on the paper). The display device 1R has a source driver SD that drives the source lines SL. The source driver SD supplies source signals (e.g., image signals) to the source lines SL.

[0032] The display device 1R has a plurality of gate lines GL spaced apart from one another in the gate line arrangement direction. The gate line arrangement direction may be any direction that intersects with the source line arrangement direction. In the example of FIG. 3, the gate line arrangement direction is the vertical direction within the paper. Therefore, in the example of FIG. 3, the gate line arrangement direction is perpendicular to the source line arrangement direction. The display device 1R has a gate driver GD that drives the gate lines GL. The gate driver GD supplies gate signals to the gate lines GL.

[0033] 3, the first display pixels PX1 and the second display pixels PX2 are alternately positioned in the source line arrangement direction. In the first embodiment, a case is exemplified in which one display pixel is composed of one red sub-display pixel, one green sub-display pixel, and one blue sub-display pixel.

[0034] In the example of FIG. 3 , the symbol PX1_RSUB represents a red sub-display pixel constituting the first display pixel PX1. The red sub-display pixel constituting the first display pixel PX1 may be referred to as a first red sub-display pixel. The symbol PX1_GSUB represents a green sub-display pixel constituting the first display pixel PX1. The green sub-display pixel constituting the first display pixel PX1 may be referred to as a first green sub-display pixel. The symbol PX1_BSUB represents a blue sub-display pixel constituting the first display pixel PX1. The blue sub-display pixel constituting the first display pixel PX1 may be referred to as a first blue sub-display pixel.

[0035] The symbol PX2_RSUB represents a red sub-display pixel constituting the second display pixel PX2. The red sub-display pixel constituting the second display pixel PX2 may be referred to as a second red sub-display pixel. The symbol PX2_GSUB represents a green sub-display pixel constituting the second display pixel PX2. The green sub-display pixel constituting the second display pixel PX2 may be referred to as a second green sub-display pixel. The symbol PX2_BSUB represents a blue sub-display pixel constituting the second display pixel PX2. The blue sub-display pixel constituting the second display pixel PX2 may be referred to as a second blue sub-display pixel.

[0036] The display device 1R has a plurality of transistors for driving each of the plurality of display pixels. In the example of Fig. 3, a TFT (Thin Film Transistor) is illustrated as the transistor. In the example of Fig. 3, each of the plurality of transistors is connected to a source line SL and a gate line GL.

[0037] More specifically, the source terminal of each of the plurality of transistors is connected to a source line SL, the gate terminal of each of the plurality of transistors is connected to a gate line GL, and the drain terminal of each of the plurality of transistors is connected to a display pixel.

[0038] In the example of Fig. 3, one transistor is connected to one sub-display pixel. Specifically, the drain terminal of one transistor is connected to one sub-display pixel. Therefore, three transistors are connected to one display pixel. In this way, the display pixel is connected to the source line SL and the gate line GL via the transistors.

[0039] In this specification, a transistor connected to the first display pixel PX1 is referred to as a first transistor TR1. In the example of Fig. 3, three first transistors TR1 are connected to one first display pixel PX1. The first of the three first transistors TR1 is connected to the first red sub-display pixel PX1_RSUB. The second of the three first transistors TR1 is connected to the first green sub-display pixel PX1_GSUB. The third of the three first transistors TR1 is connected to the first blue sub-display pixel PX1_BSUB.

[0040] In this specification, the transistor connected to the second display pixel PX2 is referred to as the second transistor TR2. In the example of Fig. 3, three second transistors TR2 are connected to one second display pixel PX2. The first of the three second transistors TR2 is connected to the second red sub-display pixel PX2_RSUB. The second of the three second transistors TR2 is connected to the second green sub-display pixel PX2_GSUB. The third of the three second transistors TR2 is connected to the second blue sub-display pixel PX2_BSUB.

[0041] 3, the first transistor TR1 and the second transistor TR2, which are adjacent to each other in the source line direction, are connected to separate source lines SL. Therefore, the first display pixel PX1 and the second display pixel PX2, which are adjacent to each other in the source line direction, are connected to separate source lines SL.

[0042] (Circuit configuration of display device 1) Fig. 4 shows an example of a circuit configuration in the display device 1. Fig. 4 is a diagram paired with Fig. 3. In the example of Fig. 4, a first transistor TR1 and a second transistor TR2 that are adjacent in the source line arrangement direction are connected to the same (common) source line SL. Therefore, a first display pixel PX1 and a second display pixel PX2 that are adjacent in the source line arrangement direction are connected to the same source line SL. In other words, in the display device 1, unlike the display device 1R, one source line SL is shared by the first display pixel PX1 and the second display pixel PX2 that are adjacent in the source line arrangement direction.

[0043] Therefore, in the display device 1, unlike the display device 1R, one source line SL is shared by the first transistor TR1 and the second transistor TR2 that are adjacent in the source line arrangement direction. According to the circuit configuration of Fig. 4, the total number of source lines SL in the display device can be reduced compared to the circuit configuration of Fig. 3.

[0044] 3 and 4, the first transistor TR1 and the second transistor TR2, which are adjacent to each other in the source line direction, are connected to the same gate line GL. From the viewpoint of individually driving the first display pixel PX1 and the second display pixel PX2 in the dual display mode (e.g., privacy mode) of the display device 1, it is preferable that the characteristics of the first transistor TR1 and the characteristics of the second transistor TR2 be different from each other.

[0045] In this specification, the gate voltage threshold of the first transistor TR1 is referred to as the first gate voltage threshold. Meanwhile, the gate voltage threshold of the second transistor TR2 is referred to as the second gate voltage threshold. In the first embodiment, the first transistor TR1 and the second transistor TR2 are preferably manufactured so that the first gate voltage threshold and the second gate voltage threshold are different.

[0046] For example, the gate voltage threshold of a transistor may depend on the doping conditions of the transistor, and thus, for example, the first and second transistors TR1 and TR2 may be fabricated under different doping conditions, thereby making the first and second gate voltage thresholds different.

[0047] The gate voltage threshold of a transistor may also depend on the size of the transistor, so that the first and second gate voltage thresholds may be different by fabricating the first and second transistors TR1 and TR2 with different sizes.

[0048] By making the first gate voltage threshold different from the second gate voltage threshold, when a certain gate voltage is applied to both the first transistor TR1 and the second transistor TR2 via the same gate line GL, it is possible to turn on only one of the first transistor TR1 or the second transistor TR2. In other words, by making the first gate voltage threshold different from the second gate voltage threshold, it is possible to drive only one of the first display pixel PX1 or the second display pixel PX2 connected to the same source line SL.

[0049] (Example of processing flow in display device 1) 5 is a flowchart illustrating the flow of processing in the display device 1. As an example, the processing in FIG.

[0050] In step S1, the control unit acquires image data to be displayed. Then, in step S2, the control unit determines whether the current operation mode of the display device 1 is the privacy mode.

[0051] If the answer is YES in step S2, that is, if the current operating mode is the privacy mode, the process proceeds to step S3. In step S3, the display device 1 applies a predetermined gate voltage (first gate voltage) to each of the plurality of transistors TR. Specifically, in step S3, the gate driver GD applies the first gate voltage as a gate signal to each of the plurality of gate lines GL in accordance with a command from the control unit.

[0052] As described above, the first transistor TR1 and the second transistor TR2, which are adjacent to each other in the source line direction, are connected to the same gate line GL. Therefore, in step S3, the first gate voltage is applied to the first transistor TR1 and the second transistor TR2 via the same gate line GL.

[0053] Next, in step S4, the display device 1 causes both the first display pixel PX1 and the second display pixel PX2 to display black. In other words, the display device 1 stops driving both the first display pixel PX1 and the second display pixel PX2. Therefore, in step S4, the luminance of both the first display pixel PX1 and the second display pixel PX2 becomes 0. Specifically, in step S4, the source driver SD applies a source signal corresponding to a black display image to each of the multiple source lines SL in accordance with an instruction from the control unit.

[0054] Next, in step S5, the display device 1 applies a second gate voltage different from the first gate voltage to each of the plurality of transistors TR. Specifically, in step S5, the gate driver GD applies the second gate voltage as a gate signal to each of the plurality of gate lines GL in accordance with a command from the control unit.

[0055] As described above, the first transistor TR1 and the second transistor TR2, which are adjacent to each other in the source line direction, are connected to the same gate line GL. Therefore, in step S5, the second gate voltage is applied to the first transistor TR1 and the second transistor TR2 via the same gate line GL.

[0056] In the first embodiment, the case where the second gate voltage is lower than the first gate voltage is exemplified. As an example, the first gate voltage is 5 V and the second gate voltage is 3 V. In this case, for example, the first gate voltage threshold is preferably set lower than the second gate voltage. And, the second gate voltage threshold is preferably set higher than the second gate voltage and lower than the first gate voltage.

[0057] When the first gate voltage threshold and the second gate voltage threshold are set as described above, only the first display pixel PX1 can be driven in step S6 (processing in privacy mode) described below using the circuit configuration of Figure 4. On the other hand, both the first display pixel PX1 and the second display pixel PX2 can be driven in step S8 (processing in public mode) described below. For these reasons, it is preferable that the first gate voltage threshold be set lower than the second gate voltage threshold.

[0058] Next, in step S6, the display device 1 drives the first display pixel PX1. That is, of the first display pixel PX1 and the second display pixel PX2, the display device 1 causes only the first display pixel PX1 to display an image. Therefore, in step S6, the luminance of only the first display pixel PX1 becomes non-zero.

[0059] Specifically, in step S6, the source driver SD applies a source signal corresponding to the image data acquired in step S1 to each of the source lines SL in accordance with a command from the control unit. If the first gate voltage threshold and the second gate voltage threshold are set as described above, only the second transistor TR2 is turned off as a result of step S5. Therefore, the second display pixel PX2 is not driven in step S6.

[0060] As a result of the processing in step S6, the first display pixel PX1 forms an image corresponding to the image data acquired in step S1 as a first image on the display surface 15. Meanwhile, the second display pixel PX2 forms a second image as a black display image on the display surface 15. Thus, display in the privacy mode illustrated in FIG.

[0061] If the result of step S2 above is NO, that is, if the current operation mode is not the privacy mode (that is, if the current operation mode is the public mode), the process proceeds to step S7.

[0062] In step S7, the display device 1 applies a first gate voltage to each of the plurality of transistors TR. Step S7 is the same process as step S3 described above.

[0063] Next, in step S8, the display device 1 drives the first display pixel PX1 and the second display pixel PX2. That is, the display device 1 causes both the first display pixel PX1 and the second display pixel PX2 to display an image. Therefore, in step S8, the luminance of both the first display pixel PX1 and the second display pixel PX2 becomes non-zero.

[0064] Specifically, in step S8, the source driver SD applies a source signal corresponding to the image data acquired in step S1 to each of the source lines SL in accordance with a command from the control unit. If the first and second gate voltage thresholds are set as described above, both the first transistor TR1 and the second transistor TR2 are turned on as a result of step S7. Therefore, both the first display pixel PX1 and the second display pixel PX2 can be driven in step S8.

[0065] As a result of the processing in step S8, the first display pixel PX1 and the second display pixel PX2 each form an image corresponding to the image data acquired in step S1 on the display surface 15. Therefore, the display in the public mode illustrated in FIG.

[0066] (effect) As described above, in the first embodiment, the display device 1 is provided as a dual-view display device having a configuration different from conventional display devices. Specifically, unlike conventional display devices (e.g., the display device 1R), the display device 1 shares one source line SL with the first transistor TR1 and the second transistor TR2 that are adjacent to each other in the source line arrangement direction.

[0067] According to the first embodiment, the total number of source lines SL in the display device can be reduced compared to conventional display devices. Therefore, the first embodiment contributes to easier design and lower costs of dual-view display devices. In addition, by reducing the total number of source lines SL compared to conventional dual-view display devices, power consumption can also be reduced compared to conventional dual-view display devices.

[0068] Furthermore, according to the first embodiment, in order to cause the first display pixel PX1 to display the first image and the second display pixel PX2 to display the black image in the public mode, it is not necessary to supply separate source signals to the first transistor TR1 and the second transistor TR2. Therefore, the display device 1 also contributes to facilitating signal processing in a dual-view display device. Therefore, the display device 1 allows a low-cost integrated circuit (IC) to be used as, for example, the source driver SD.

[0069] [Embodiment 2] The processing flow in the display device 1 is not limited to the example in embodiment 1. In embodiment 2, a flowchart different from that in Fig. 5 will be described. Fig. 6 is a flowchart illustrating the processing flow in the display device 1 in embodiment 2.

[0070] 6, step S2A is provided between step S2 and step S3. In step S2A, the control unit determines whether the previous operation mode was the privacy mode. In other words, the control unit determines whether the previous image display was performed in the privacy mode.

[0071] If the answer is YES in step S2A, that is, if the previous operation mode was the privacy mode, the process proceeds to step S5. Therefore, if the answer is YES in step S2A, the above steps S3 and S4 are omitted.

[0072] On the other hand, if the result of step S2A is NO, that is, if the previous operation mode was not the privacy mode (that is, if the previous operation mode was the public mode), the process proceeds to step S3.

[0073] According to the processing flow of Fig. 6, when operation in privacy mode continues, the number of times steps S3 to S4 are executed is reduced compared to the example of Fig. 5. Therefore, according to the processing flow of Fig. 6, power consumption can be reduced compared to the example of Fig. 5.

[0074] Furthermore, according to the processing flow of Fig. 6, when operation continues in the privacy mode, the number of times images are written to the display device 1 is reduced compared to the example of Fig. 5. As a result, according to the processing flow of Fig. 6, when operation continues in the privacy mode, the display quality of images can also be improved compared to the example of Fig. 5.

[0075] [Software implementation example] The functions of the display device 1 can be realized by a program that causes a computer to function as the device, and a program that causes a computer to function as each control block of the device.

[0076] In this case, the device includes a computer having at least one control device (e.g., a processor) and at least one storage device (e.g., a memory) as hardware for executing the program. The control device and storage device execute the program, thereby realizing the functions described in each of the above embodiments.

[0077] The program may be non-transitory and may be recorded on one or more computer-readable recording media. The recording media may or may not be included in the device. In the latter case, the program may be supplied to the device via any wired or wireless transmission medium.

[0078] Some or all of the functions of the control blocks can be realized by logic circuits. For example, an integrated circuit in which a logic circuit that functions as each of the control blocks is formed is also included in the scope of one aspect of the present disclosure. In addition, the functions of the control blocks can also be realized by, for example, a quantum computer.

[0079] The processes described in the above embodiments may be executed by AI (Artificial Intelligence). In this case, the AI ​​may run on the control device or on another device (for example, an edge computer or a cloud server).

[0080] 〔summary〕 A display device according to a first aspect of the present disclosure is a display device capable of presenting a first image to a first user located at a first position relative to a display surface, and presenting a second image different from the first image to a second user located at a second position different from the first position, wherein the display device has a plurality of first display pixels that contribute to forming the first image on the display surface, a plurality of second display pixels that contribute to forming the second image on the display surface, and a plurality of source lines that are spaced apart from each other in a source line arrangement direction, wherein the first display pixels and the second display pixels are positioned alternately in the source line arrangement direction, and the display device has a plurality of first transistors that are respectively connected to the plurality of first display pixels, and a plurality of second transistors that are respectively connected to the plurality of second display pixels, wherein the first transistors and the second transistors that are adjacent in the source line arrangement direction are connected to the same source line.

[0081] In a display device according to aspect 2 of the present disclosure, in the aspect 1, a first gate voltage threshold that is a gate threshold voltage of the first transistor may be different from a second gate voltage threshold that is a gate threshold voltage of the second transistor.

[0082] In a display device according to a third aspect of the present disclosure, in the second aspect, the first gate voltage threshold may be lower than the second gate voltage threshold.

[0083] A display device according to aspect 4 of the present disclosure, in any one of aspects 1 to 3, may have a plurality of gate lines spaced apart from each other in a gate line arrangement direction that intersects with the source line arrangement direction, and the first transistor and the second transistor that are adjacent to each other in the source line arrangement direction may be connected to the same gate line.

[0084] A display device according to aspect 5 of the present disclosure may, in aspect 4, apply a first gate voltage to the first transistor and the second transistor that are adjacent in the source line arrangement direction, and then apply a second gate voltage lower than the first gate voltage to the first transistor and the second transistor.

[0085] In a display device according to aspect 6 of the present disclosure, in aspect 5, the driving of the first display pixel and the second display pixel may be stopped after applying the first gate voltage to the first transistor and the second transistor that are adjacent in the source line arrangement direction, and the driving of the first display pixel may be driven after applying the second gate voltage to the first transistor and the second transistor.

[0086] In a display device according to aspect 7 of the present disclosure, in any one of aspects 1 to 6, the first position may be a position in front of the display surface, and the second position may be a position to the side of the display surface.

[0087] In a display device according to an eighth aspect of the present disclosure, in any one of the first to seventh aspects, the second image may be a black display image.

[0088] [Additional Notes] One aspect of the present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of one aspect of the present disclosure. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment. [Explanation of symbols]

[0089] 1 Display device 15 Display surface PX1 First display pixel PX2 Second display pixel TR1 First transistor TR2 Second transistor SL Source Line GL Gate Line U1 First User U2 Second user IMG1 Image (example of the first image) IMG_BK image (example of the second image, black display image)

Claims

1. A display device capable of presenting a first image to a first user located at a first position relative to a display surface, and presenting a second image different from the first image to a second user located at a second position different from the first position, The display device includes: a plurality of first display pixels that contribute to forming the first image on the display surface; a plurality of second display pixels that contribute to forming the second image on the display surface; a plurality of source lines spaced apart from each other in a source line arrangement direction; the first display pixels and the second display pixels are alternately positioned in the source line arrangement direction, The display device includes: a plurality of first transistors respectively connected to the plurality of first display pixels; a plurality of second transistors respectively connected to the plurality of second display pixels; The display device, wherein the first transistor and the second transistor adjacent to each other in the direction in which the source line is disposed are connected to the same source line.

2. The display device according to claim 1 , wherein a first gate voltage threshold, which is a gate threshold voltage of the first transistor, is different from a second gate voltage threshold, which is a gate threshold voltage of the second transistor.

3. The display device according to claim 2 , wherein the first gate voltage threshold is smaller than the second gate voltage threshold.

4. the display device has a plurality of gate lines spaced apart from each other in a gate line arrangement direction that intersects with a source line arrangement direction, The display device according to claim 1 , wherein the first transistor and the second transistor adjacent to each other in the direction in which the source line is disposed are connected to the same gate line.

5. The display device includes: applying a first gate voltage to the first transistor and the second transistor adjacent to each other in a direction in which the source line is disposed, via the same gate line; 5. The display device according to claim 4, wherein a second gate voltage lower than the first gate voltage is then applied to the first transistor and the second transistor via the same gate line.

6. The display device includes: applying the first gate voltage to the first transistor and the second transistor adjacent to each other in the source line arrangement direction, and then stopping driving of the first display pixel and the second display pixel; The display device according to claim 5 , wherein the first display pixel is driven after the second gate voltage is applied to the first transistor and the second transistor.

7. the first position is a position in front of the display surface, The display device of claim 1 , wherein the second position is a position lateral to the display surface.

8. The display device according to claim 1 , wherein the second image is a black display image.

Citation Information

Patent Citations

  • Display

    JP2010217824A