Liquid dispensing device and liquid dispensing head

Abstract

When determining the state of the discharge unit D, the length of the unit period TU, which is the period for driving the discharge unit D, is suppressed from becoming too long. [Solution] The inkjet printer 1 comprises a drive signal generation unit 4 that generates a drive signal COM, an ejection section D including a nozzle N, a piezoelectric element PZ driven by the drive signal COM, and a cavity CV that ejects ink from the nozzle N in accordance with the drive of the piezoelectric element PZ, a first inspection signal generation circuit 340 that receives a residual vibration signal generated due to vibrations remaining in the ejection section D after the piezoelectric element PZ has been driven and generates a pseudo-residual vibration signal corresponding to the residual vibration signal, and an inspection unit 6 that determines the state of the ejection section D based on the pseudo-residual vibration signal, wherein the first inspection signal generation circuit 340 includes a first filter circuit 344 that generates a pseudo-residual vibration signal, and the first filter circuit 344 includes a variable resistor element Rv43 whose resistance value can be adjusted.

Description

[Technical Field]

[0001] The present invention relates to a liquid dispensing device and a liquid dispensing head. [Background technology]

[0002] Liquid ejection devices such as inkjet printers form an image on a medium by driving the ejection unit of the liquid ejection head in each of a plurality of unit periods defined by a latch signal, thereby ejecting liquid such as ink that is filled in the ejection unit. However, in this type of liquid ejection device, ejection abnormalities may occur in which liquid cannot be ejected normally from the ejection unit. For this reason, techniques for inspecting the ejection state in the ejection unit have been proposed. For example, Patent Document 1 discloses a technique for inspecting the ejection state in the ejection unit based on a detection signal that indicates vibrations remaining in the ejection unit after the ejection unit has been driven by a drive signal. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-044771 [Overview of the project] [Problems that the invention aims to solve]

[0004] However, with conventional technology, when inspecting the discharge state in the discharge unit, it was necessary to set the unit period to a sufficiently long duration in order to perform both the driving of the discharge unit by the drive signal and the detection of residual vibrations in the driven discharge unit within that unit period, which is the period during which the discharge unit is driven. [Means for solving the problem]

[0005] To solve the above problems, the liquid dispensing device according to the present invention comprises: a drive signal generation unit that generates a drive signal; a dispensing unit that includes a nozzle, a piezoelectric element driven by the drive signal, and a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element; a signal generation unit that receives a residual vibration signal generated due to vibrations remaining in the dispensing unit after the piezoelectric element has been driven and generates a pseudo-residual vibration signal corresponding to the residual vibration signal; and a determination unit that determines the state of the dispensing unit based on the pseudo-residual vibration signal, wherein the signal generation unit includes a filter circuit that generates the pseudo-residual vibration signal, and the filter circuit includes a variable resistor unit whose resistance value can be adjusted.

[0006] Furthermore, the liquid discharge head according to the present invention comprises a discharge section including a nozzle, a piezoelectric element driven by a drive signal, and a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element, and a signal generation section that receives a residual vibration signal generated due to vibrations remaining in the discharge section after the piezoelectric element has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal as a signal for determining the state of the discharge section, wherein the signal generation section includes a filter circuit that generates the pseudo-residual vibration signal, and the filter circuit includes a variable resistor section whose resistance value can be adjusted. [Brief explanation of the drawing]

[0007] [Figure 1] This block diagram shows an example of the configuration of an inkjet printer according to an embodiment of the present invention. [Figure 2] This is a perspective view showing an example of the general internal structure of an inkjet printer. [Figure 3] This is a cross-sectional view illustrating an example of the structure of the discharge section. [Figure 4] This is an explanatory diagram illustrating the ink ejection operation in the ejection section. [Figure 5] This is a plan view showing an example of nozzle arrangement in a head unit. [Figure 6] This is a block diagram showing an example of a head unit configuration. [Figure 7]It is a block diagram showing an example of the configuration of a detection circuit. [Figure 8] It is a circuit diagram showing an example of the configuration of a first selection circuit. [Figure 9] It is a circuit diagram showing an example of the configuration of a first inspection signal generation circuit. [Figure 10] It is a circuit diagram showing an example of the configuration of a variable resistance element. [Figure 11] It is a circuit diagram showing another example of the configuration of a variable resistance element. [Figure 12] It is a circuit diagram showing an example of the configuration of a variable capacitor. [Figure 13] It is a circuit diagram showing an example of the configuration of a second inspection signal generation circuit. [Figure 14] It is an explanatory diagram for explaining the characteristics of a first filter circuit. [Figure 15] It is a diagram showing the simulation result of a first filter circuit. [Figure 16] It is an explanatory diagram for explaining the operation of a low-pass filter circuit when a first input signal switches from a detection signal to a first reference potential. [Figure 17] It is an explanatory diagram for explaining the effects of a first switching circuit and a low-pass filter circuit. [Figure 18] It is a timing chart showing an example of the operation of an inkjet printer in a unit period. [Figure 19] It is an explanatory diagram for explaining an example of a first inspection signal generated by a first inspection signal generation circuit. [Figure 20] It is an explanatory diagram for explaining an example of a second inspection signal generated by a second inspection signal generation circuit. [Figure 21] It is a block diagram showing an example of the configuration of a detection circuit according to a first modification. [Figure 22] It is a circuit diagram showing an example of the configuration of a third filter circuit according to a first modification.

Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. However, in each drawing, the dimensions and scale of each part have been appropriately changed from those of the actual parts. Furthermore, the embodiments described below are preferred specific examples of the present invention and are subject to various technically preferred limitations, but the scope of the present invention is not limited to these embodiments unless otherwise stated in the following description.

[0009] [1. Embodiments] In this embodiment, a liquid ejection device will be described using an inkjet printer as an example, which ejects ink onto recording paper to form an image. In this embodiment, "ink" refers to an example of a "liquid." First, the configuration of the inkjet printer 1 according to this embodiment will be described with reference to Figure 1.

[0010] Figure 1 is a block diagram showing an example of the configuration of an inkjet printer 1 according to an embodiment of the present invention.

[0011] The inkjet printer 1 is supplied with print data (IMG) indicating the image to be formed, for example, from a host computer such as a personal computer or a digital camera. The inkjet printer 1 performs a printing process to form the image indicated by the print data (IMG) supplied from the host computer onto a medium. In this embodiment, the medium is assumed to be the recording paper P shown in Figure 2, which will be described later.

[0012] The inkjet printer 1 comprises a control unit 2 that controls various parts of the inkjet printer 1, a head unit 3 equipped with an ink ejection unit D for ejecting ink, and a drive signal generation unit 4 that generates a drive signal COM for driving the ejection unit D. The inkjet printer 1 also comprises a storage unit 5 that stores various information such as print data IMG and the control program PG for the inkjet printer 1, and an inspection unit 6 that determines the state of the ejection unit D. Furthermore, the inkjet printer 1 comprises a transport unit 7 for changing the relative position of the recording paper P with respect to the head unit 3, and a maintenance unit 8 that performs maintenance processing to maintain the ejection unit D provided on the head unit 3. Note that the head unit 3 is an example of a "liquid ejection head", the drive signal generation unit 4 is an example of a "drive signal generation unit", and the inspection unit 6 is an example of a "determination unit".

[0013] In this embodiment, we assume that the head unit 3 and the drive signal generation unit 4 correspond to each other, and the head unit 3 and the inspection unit 6 correspond to each other. For example, the inkjet printer 1 may have multiple head units 3, multiple drive signal generation units 4 that correspond one-to-one with the multiple head units 3, and multiple inspection units 6 that correspond one-to-one with the multiple head units 3. Alternatively, the inkjet printer 1 may have one head unit 3, one drive signal generation unit 4 that corresponds to one head unit 3, and one inspection unit 6 that corresponds to one head unit 3. In this embodiment, we assume that the inkjet printer 1 has four head units 3, four drive signal generation units 4 that correspond one-to-one with the four head units 3, and four inspection units 6 that correspond one-to-one with the four head units 3. However, for the sake of clarity, the following explanation will focus on one of the four head units 3, one of the four drive signal generation units 4 that corresponds to one of the head units 3, and one of the four inspection units 6 that corresponds to one of the head units 3.

[0014] The control unit 2 is configured to include one or more CPUs (Central Processing Units). Alternatively, the control unit 2 may include a programmable logic device such as an FPGA (field-programmable gate array) instead of, or in addition to, a CPU. Furthermore, the control unit 2 functions as a drive control unit 22 by executing the control program PG stored in the memory unit 5.

[0015] The drive control unit 22 generates signals for controlling the operation of various parts of the inkjet printer 1, such as the print signal SI and the waveform specification signal dCOM. Here, the waveform specification signal dCOM is a digital signal that defines the waveform of the drive signal COM. The drive signal COM is an analog signal for driving the ejection unit D. The print signal SI is a digital signal that specifies the type of operation of the ejection unit D. Specifically, the print signal SI specifies the type of operation of the ejection unit D by specifying whether or not to supply the drive signal COM to the ejection unit D.

[0016] When printing is performed, for example, the drive control unit 22 controls the head unit 3 and the transport unit 7 to print the image indicated by the print data IMG onto the recording paper P. Specifically, when printing is performed, the drive control unit 22 generates signals to control the head unit 3, such as the print signal SI, based on the print data IMG. The drive control unit 22 also generates signals to control the drive signal generation unit 4, such as the waveform specification signal dCOM, when printing is performed. The drive control unit 22 also generates signals to control the transport unit 7 when printing is performed. In this way, the drive control unit 22 controls the transport unit 7 to change the relative position of the recording paper P with respect to the head unit 3 during printing, while also adjusting the presence or absence of ink ejection from the ejection unit D[m], the amount of ink ejection, and the timing of ink ejection. In this manner, the drive control unit 22 controls each part of the inkjet printer 1 so that an image corresponding to the print data IMG is formed on the recording paper P.

[0017] Furthermore, the control unit 2 outputs selection signals SELr, SELc1, and SELc2 to the detection circuit 33 included in the head unit 3. The selection signal SELr is a control signal for adjusting the resistance value of the variable resistor element Rv43, as shown in Figure 9, which will be described later. The selection signals SELc1 and SELc2 are control signals for adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42, as shown in Figure 9, which will be described later. For example, when a process for determining the state of the ejection section D[m] is executed, the selection signals SELr, SELc1, and SELc2 set by the manufacturer of the head unit 3, etc., may be output from the control unit 2 to the detection circuit 33. Alternatively, the selection signals SELr, SELc1, and SELc2 set by the drive control unit 22, etc., based on operation information indicating the content of the operation performed on the inkjet printer 1, may be output from the control unit 2 to the detection circuit 33.

[0018] The drive signal generation unit 4 includes, for example, a DAC (Digital Analog Converter) and generates a drive signal COM based on a waveform specification signal dCOM supplied from the drive control unit 22. For example, the drive signal generation unit 4 generates a drive signal COM that includes a waveform defined by the waveform specification signal dCOM. The drive signal generation unit 4 outputs the drive signal COM generated based on the waveform specification signal dCOM to the switching circuit 31 included in the head unit 3.

[0019] The memory unit 5 is composed of one or both of the following: volatile memory such as RAM (Random Access Memory) and non-volatile memory such as ROM (Read Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), or PROM (Programmable ROM). The memory unit 5 may also be included in the control unit 2.

[0020] The head unit 3 includes a switching circuit 31, a recording head 32, and a detection circuit 33.

[0021] The recording head 32 has M ejection units D. The value M is a natural number greater than or equal to 1. Hereinafter, the m-th ejection unit D among the M ejection units D provided on the recording head 32 may be referred to as ejection unit D[m]. Here, the variable m is a natural number satisfying "1 ≤ m ≤ M". Furthermore, hereinafter, if a component or signal of the inkjet printer 1 corresponds to ejection unit D[m] among the M ejection units D, the subscript [m] may be added to the code representing that component or signal.

[0022] The switching circuit 31 switches whether or not to supply the drive signal COM to the ejection unit D[m] based on the print signal SI. In the following, as shown in Figure 6 and other figures described later, the drive signal COM supplied to the ejection unit D[m] may be referred to as the individual drive signal Vin[m]. The drive signal COM and the individual drive signal Vin are examples of "drive signals".

[0023] Furthermore, the switching circuit 31 switches whether or not to electrically connect the ejection unit D[m] and the detection circuit 33 based on the printing signal SI. When the ejection unit D[m] and the detection circuit 33 are electrically connected, for example, the detection signal Vout[m] detected from the ejection unit D[m] is supplied to the detection circuit 33 via the switching circuit 31. The detection signal Vout[m] is an analog signal that indicates, for example, the change in potential of the upper electrode Zu[m] provided on the piezoelectric element PZ[m] of the ejection unit D[m]. For example, the detection signal Vout[m] is a residual vibration signal that occurs due to vibrations remaining in the ejection unit D[m] after the piezoelectric element PZ[m] has been driven by the individual drive signal Vin[m]. In this case, the waveform of the detection signal Vout[m] shows, for example, the waveform of the residual vibration, which is the vibration remaining in the ejection unit D[m] after the piezoelectric element PZ[m] has been driven. The residual vibration of the discharge section D[m] after the piezoelectric element PZ[m] is driven corresponds to the residual vibration of the diaphragm 321 after the piezoelectric element PZ[m] is driven. The piezoelectric element PZ, the upper electrode Zu[m], and the diaphragm 321 will be described later in Figure 3.

[0024] The detection circuit 33 generates an inspection signal VD[m] corresponding to the detection signal Vout[m] as a signal for determining the state of the discharge section D[m]. As will be described in detail in Figure 7 and later, for example, the detection circuit 33 generates the inspection signal VD[m] to mimic the attenuation wave of the detection signal Vout[m] which indicates the residual vibration of the discharge section D[m]. Alternatively, the detection circuit 33 generates an inspection signal VD[m] by removing frequency components other than predetermined frequency components from the residual vibration signal. The detection circuit 33 then outputs the inspection signal VD[m] corresponding to the detection signal Vout[m] to the inspection unit 6.

[0025] The inspection unit 6 determines, for example, the state of the ejection unit D[m] based on the inspection signal VD[m]. For example, the inspection unit 6 determines the viscosity of the ink in the ejection unit D[m]. In this case, it is possible to prevent the printing process from being executed when an abnormality caused by the viscosity of the ink in the ejection unit D[m] has occurred. Hereafter, the process of determining the state of the ejection unit D[m] will also be referred to as the ejection state determination process. Also below, the ejection unit D whose state is determined will also be referred to as the ejection unit D to be determined.

[0026] When the ejection state determination process is executed, the drive control unit 22 generates signals for controlling the head unit 3, such as the print signal SI. Also, when the ejection state determination process is executed, the drive control unit 22 generates signals for controlling the drive signal generation unit 4, such as the waveform specification signal dCOM. As a result, the drive control unit 22 drives the ejection unit D[m] as the ejection unit D to be determined.

[0027] Furthermore, when the ejection state determination process is executed, the drive control unit 22 generates a print signal SI, thereby controlling the head unit 3 so that a detection signal Vout[m] corresponding to the ejection unit D[m] driven as the ejection unit D to be determined is supplied to the detection circuit 33. As a result, the detection circuit 33 generates an inspection signal VD[m] corresponding to the detection signal Vout[m] detected from the ejection unit D[m] driven as the ejection unit D to be determined. The inspection unit 6 then determines the state of the ejection unit D[m] driven as the ejection unit D to be determined based on the inspection signal VD[m] supplied from the detection circuit 33. The inspection unit 6 also outputs state information Cinf, which includes information indicating the determination result of the state of the ejection unit D[m], to the control unit 2.

[0028] The inspection unit 6 may be included in the control unit 2. For example, the control unit 2 may function as the inspection unit 6 by operating according to the control program PG stored in the memory unit 5.

[0029] Furthermore, as described above, in this embodiment, the inkjet printer 1 performs maintenance processing. For example, the maintenance processing includes a flushing process to discharge ink from the ejection unit D, a wiping process to wipe off foreign matter such as ink adhering to the vicinity of the nozzle N of the ejection unit D with a wiper, and a pumping process to suck out the ink inside the ejection unit D with a tube pump or the like. The nozzle N will be described later in Figure 3.

[0030] For example, ink that has undergone thickening, resulting in increased viscosity, is discharged from the discharge unit D through a flushing process. This allows the viscosity of the ink in the nozzle N at the start of the printing process to be kept below a predetermined viscosity. In this case, since the thickened ink is discharged from the discharge unit D, it is possible to suppress a decrease in the quality of the image printed during the printing process.

[0031] The maintenance unit 8 includes an ink discharge receiving unit 80 for receiving ink discharged from the discharge unit D during the flushing process, a wiper for wiping off foreign matter such as ink adhering to the vicinity of the nozzle N of the discharge unit D, and a tube pump for sucking up ink, air bubbles, etc. from the discharge unit D. The ink discharge receiving unit 80 will be described later in Figure 2. The wiper and tube pump are not shown in the illustration. Next, the general internal structure of the inkjet printer 1 will be described with reference to Figure 2.

[0032] Figure 2 is a perspective view showing an example of the schematic internal structure of inkjet printer 1.

[0033] As shown in Figure 2, in this embodiment, it is assumed that the inkjet printer 1 is a serial printer. Specifically, when the inkjet printer 1 performs a printing process, it transports the recording paper P in the sub-scanning direction, and while moving the head unit 3 back and forth in the main scanning direction intersecting the sub-scanning direction, it ejects ink from the ejection unit D [m] to form dots on the recording paper P corresponding to the print data IMG.

[0034] In the following, for the sake of explanation, a three-axis orthogonal coordinate system with mutually orthogonal X, Y, and Z axes will be introduced as appropriate. For example, in this embodiment, the Y1 direction along the Y axis is the sub-scanning direction, and the X1 and X2 directions along the X axis are the main scanning directions. Note that the X2 direction is the opposite direction to the X1 direction. Also, in this embodiment, as illustrated in Figure 2, the Z1 direction along the Z axis is the ink ejection direction from the ejection unit D [m]. Furthermore, in the following, the X1 and X2 directions will be collectively referred to as the X-axis direction, the Y1 direction and the Y2 direction opposite to the Y1 direction will be collectively referred to as the Y-axis direction, and the Z1 direction and the Z2 direction opposite to the Z1 direction will be collectively referred to as the Z-axis direction. Note that in this embodiment, as described above, it is assumed that the X, Y, and Z axes are mutually orthogonal, but the present invention is not limited to this embodiment. For example, the X, Y, and Z axes only need to intersect each other.

[0035] The inkjet printer 1 according to this embodiment includes a housing 100 and a carriage 110 that is capable of reciprocating within the housing 100 in the X-axis direction and is equipped with four head units 3.

[0036] In this embodiment, it is assumed that the carriage 110 houses four ink cartridges 120, each corresponding one-to-one with four inks: cyan, magenta, yellow, and black. Furthermore, as described above, this embodiment assumes that the inkjet printer 1 has four head units 3, each corresponding one-to-one with the four ink cartridges 120. Each ejection unit D[m] receives ink from the ink cartridge 120 corresponding to the head unit 3 on which the ejection unit D[m] is located. As a result, each ejection unit D[m] can fill itself with the supplied ink and eject the filled ink from the nozzle N. Note that the ink cartridges 120 may be located outside the carriage 110.

[0037] Furthermore, the inkjet printer 1 according to this embodiment has a transport unit 7, as described in Figure 1. The transport unit 7 has a carriage transport mechanism 71 for reciprocating the carriage 110 in the X-axis direction, and a carriage guide shaft 76 that supports the carriage 110 so that it can reciprocate in the X-axis direction. In addition, the transport unit 7 has a media transport mechanism 73 for transporting the recording paper P, and a platen 75 provided in the Z1 direction relative to the carriage 110. For example, in the printing process, the carriage transport mechanism 71 reciprocates the head unit 3 together with the carriage 110 along the carriage guide shaft 76 in the X-axis direction, and the media transport mechanism 73 transports the recording paper P on the platen 75 in the Y1 direction. Therefore, in the printing process, the transport unit 7 changes the relative position of the recording paper P with respect to the head unit 3 by causing the carriage transport mechanism 71 and the media transport mechanism 73 to perform the above operations, thereby enabling ink to land on the entire recording paper P.

[0038] Next, the general structure of the recording head 32 will be described with reference to Figure 3.

[0039] Figure 3 is a cross-sectional view illustrating an example of the structure of the ejection section D. Note that Figure 3 schematically shows a portion of the recording head 32 when the recording head 32 is cut to include the ejection section D[m].

[0040] The ejection unit D[m] includes a cavity CV filled with ink, a nozzle N communicating with the cavity CV, a piezoelectric element PZ[m] that generates pressure fluctuations in the ink within the cavity CV when an individual drive signal Vin[m] is supplied, and a diaphragm 321. The ejection unit D[m] ejects the ink from the cavity CV through the nozzle N when the piezoelectric element PZ[m] is driven by the individual drive signal Vin[m].

[0041] The cavity CV corresponds to a pressure chamber communicating with the nozzle N. For example, the cavity CV is a space partitioned by a cavity plate 324, a nozzle plate 323 on which the nozzle N is formed, and a diaphragm 321. The cavity CV communicates with the reservoir 325 via an ink supply port 326. The reservoir 325 communicates with the ink cartridge 120 corresponding to the ejection section D[m] via an ink intake port 327. The piezoelectric element PZ[m] has an upper electrode Zu[m], a lower electrode Zd[m], and a piezoelectric element Zb[m] provided between the upper electrode Zu[m] and the lower electrode Zd[m]. The piezoelectric element Zb[m] is formed of, for example, a ferroelectric piezoelectric material.

[0042] The upper electrode Zu[m] is electrically connected to wiring Li, to which the individual drive signal Vin[m] is supplied. The lower electrode Zd[m] is electrically connected to wiring Ld, to which the base potential signal VBS is supplied. When the individual drive signal Vin[m] is supplied to the upper electrode Zu[m], a voltage is applied between the upper electrode Zu[m] and the lower electrode Zd[m]. The piezoelectric element PZ[m] is displaced in the Z1 direction or the Z2 direction according to the voltage applied between the upper electrode Zu[m] and the lower electrode Zd[m].

[0043] Thus, the piezoelectric element PZ[m] vibrates in response to the voltage applied between the upper electrode Zu[m] and the lower electrode Zd[m]. The lower electrode Zd[m] is joined to the diaphragm 321. Therefore, when the piezoelectric element PZ[m] is driven and vibrates by the individual drive signal Vin[m], the diaphragm 321 also vibrates. As a result of the vibration of the diaphragm 321, the volume of the cavity CV and the pressure inside the cavity CV change, and the ink filled in the cavity CV is ejected from the nozzle N.

[0044] In this embodiment, as an example, we assume that the piezoelectric element PZ is displaced in the Z1 direction when the potential of the individual drive signal Vin[m] supplied to the discharge section D[m] changes from a low potential to a high potential. That is, in this embodiment, we assume that when the potential of the individual drive signal Vin[m] supplied to the discharge section D[m] is high, the volume of the cavity CV provided by the discharge section D[m] becomes smaller compared to when the potential is low.

[0045] Next, the ink ejection operation in the ejection unit D will be explained with reference to Figure 4.

[0046] Figure 4 is an explanatory diagram illustrating the ink ejection operation in the ejection unit D.

[0047] The drive control unit 22, for example, in Phase-1, changes the potential of the drive signal COM supplied to the piezoelectric element PZ of the ejection unit D, thereby generating a strain that causes the piezoelectric element PZ to be displaced in the Z2 direction. As a result, the diaphragm 321 of the ejection unit D bends in the Z2 direction. Consequently, as shown in Phase-2 in Figure 4, the volume of the cavity CV of the ejection unit D expands compared to Phase-1. Next, the drive control unit 22, for example, in Phase-2, changes the potential of the drive signal COM, thereby generating a strain that causes the piezoelectric element PZ to be displaced in the Z1 direction. As a result, the diaphragm 321 of the ejection unit D bends in the Z1 direction. Consequently, as shown in Phase-3 in Figure 4, the volume of the cavity CV rapidly contracts, and a portion of the ink filling the cavity CV is ejected as ink droplets from the nozzle N communicating with the cavity CV.

[0048] Thus, the piezoelectric element PZ and the diaphragm 321 of the discharge unit D are displaced in the Z-axis direction when the piezoelectric element PZ of the discharge unit D is driven by the drive signal COM. For this reason, residual vibration occurs in the discharge unit D, including the diaphragm 321, after the piezoelectric element PZ is driven by the drive signal COM.

[0049] Next, an example of nozzle N arrangement will be described with reference to Figure 5.

[0050] Figure 5 is a plan view showing an example of the arrangement of nozzles N in the head unit 3. In Figure 5, when the inkjet printer 1 is viewed from the Z1 direction, an example of the arrangement of the four head units 3 mounted on the carriage 110 and the total of 4M nozzles N provided on these four head units 3 is shown.

[0051] Each head unit 3 on the carriage 110 is provided with a nozzle row NL. Here, the nozzle row NL is a plurality of nozzles N arranged to extend in a row in a predetermined direction. In this embodiment, as an example, we assume that each nozzle row NL consists of M nozzles N arranged to extend in the Y-axis direction.

[0052] Next, we will describe the overview of the head unit 3 with reference to Figure 6.

[0053] Figure 6 is a block diagram showing an example of the configuration of the head unit 3.

[0054] As explained in Figure 1, the head unit 3 includes a switching circuit 31, a recording head 32, and a detection circuit 33. The head unit 3 also has wiring La to which the drive signal COM is supplied from the drive signal generation unit 4, wiring Ls1 to which the potential signal Vzu is supplied to the high-pass filter circuit 312 (described later), and wiring Ls2 to which the detection signal Vout is supplied to the detection circuit 33. Furthermore, the head unit 3 has wiring Li[m] to which the individual drive signal Vin[m] is supplied to the ejection unit D[m], and wiring Ld to which the base potential signal VBS is supplied. Note that in Figure 6, for the sake of clarity, the wiring to which the selection signal SELr is supplied, the wiring to which the selection signal SELc1 is supplied, and the wiring to which the selection signal SELc2 is supplied are omitted.

[0055] The switching circuit 31 includes M switches SWa[1]~SWa[M] that correspond one-to-one with M discharge units D[1]~D[M], M switches SWs[1]~SWs[M] that correspond one-to-one with M discharge units D[1]~D[M], and a connection state specification circuit 310. Furthermore, the switching circuit 31 has a high-pass filter circuit 312 that outputs a detection signal Vout[m] to the detection circuit 33, which is obtained by removing the DC component from the potential signal Vzu[m] that indicates the potential of the upper electrode Zu[m] provided on the piezoelectric element PZ[m]. The potential signal Vzu[m] that is the source of the detection signal Vout[m] may be considered as a "residual vibration signal".

[0056] The high-pass filter circuit 312 has, for example, a capacitor C10 with one end electrically connected to wiring Ls1 and the other end electrically connected to wiring Ls2. The switching circuit 31 also has a resistor R10 with one end electrically connected to wiring La and the other end electrically connected to wiring Ls1. The resistor R10 functions as a bias resistor that supplies the voltage of the drive signal COM to wiring Ls1. Hereafter, the node to which one end of the resistor R10 is connected may be referred to as node N1, and the node to which the other end of the resistor R10 is connected may be referred to as node N2. For example, the resistor R10 and the capacitor C10 are connected to node N2. Also, for example, the detection circuit 33 is connected to node N2 via capacitor C10. Hereafter, the node to which capacitor C10 and the detection circuit 33 are connected may be referred to as node N3.

[0057] The connection state designation circuit 310 designates the connection state of each of the M switches SWa and M switches SWs. For example, the connection state designation circuit 310 generates connection state designation signals Qa[m] and Qs[m] based on at least some of the signals supplied from the drive control unit 22, namely the print signal SI, the latch signal LAT, and the period designation signal Tsig. The connection state designation signal Qa[m] is a signal that designates the on / off state of switch SWa[m], and the connection state designation signal Qs[m] is a signal that designates the on / off state of switch SWs[m]. Furthermore, the connection state designation circuit 310 generates a selection signal SEL and a detection period signal Acut based on at least some of the signals supplied from the print signal SI, the latch signal LAT, and the period designation signal Tsig. The selection signal SEL and the detection period signal Acut are supplied to the detection circuit 33.

[0058] In this embodiment, it is assumed that each of the M switches SWa and M switches SWs is composed of a transfer gate including a P-channel transistor and an N-channel transistor connected in parallel. However, each of the M switches SWa and M switches SWs may be composed of either a P-channel transistor or an N-channel transistor.

[0059] The switch SWa[m] switches between conductivity and non-conductivity between wiring La and the upper electrode Zu[m] of piezoelectric element PZ[m] provided in the discharge section D[m], based on the connection status specification signal Qa[m]. That is, the switch SWa[m] switches between conductivity and non-conductivity between wiring La and wiring Li[m] connected to the upper electrode Zu[m], based on the connection status specification signal Qa[m]. In this embodiment, the switch SWa[m] is turned on when the connection status specification signal Qa[m] is high level and turned off when it is low level. When the switch SWa[m] is turned on, the drive signal COM supplied to wiring La is supplied as an individual drive signal Vin[m] to the upper electrode Zu[m] of the discharge section D[m] via wiring Li[m]. That is, the individual drive signal Vin[m] is the drive signal COM supplied to the piezoelectric element PZ[m] of the discharge section D[m] via the switch SWa[m].

[0060] The switch SWs[m] switches between continuity and non-continuity between the wiring Ls1 and the upper electrode Zu[m] of the piezoelectric element PZ[m] provided in the discharge section D[m], based on the connection status specification signal Qs[m]. In other words, the switch SWs[m] switches between continuity and non-continuity between the wiring Ls1 and the wiring Li[m] connected to the upper electrode Zu[m], based on the connection status specification signal Qs[m]. In this embodiment, the switch SWs[m] is turned on when the connection status specification signal Qs[m] is at a high level and turned off when it is at a low level.

[0061] For example, the connection status specification signal Qs[m] becomes high level when detecting residual vibration of the discharge unit D[m]. This allows the residual vibration of the discharge unit D to be judged to be detected. When the switch SWs[m] is turned on, a potential signal Vzu[m] indicating the potential of the upper electrode Zu[m] of the piezoelectric element PZ[m] of the discharge unit D[m] to be judged is supplied to the high-pass filter circuit 312 via wiring Li[m] and wiring Ls1. The high-pass filter circuit 312 then supplies a detection signal Vout[m], obtained by removing the DC component of the potential signal Vzu[m], to the detection circuit 33 via wiring Ls2. The detection circuit 33 generates an inspection signal VD[m] corresponding to the detection signal Vout[m].

[0062] Incidentally, a large-amplitude drive signal COM is required to drive the piezoelectric element PZ, but since the detection circuit 33 is an analog signal processing circuit, a large dynamic range is not required. For this reason, in this embodiment, the high power supply potential of the detection circuit 33 is small compared to the maximum potential of the drive signal COM. For example, the maximum potential of the drive signal COM is about 42V, the high power supply potential of the detection circuit 33 is about 3.3V, and the low power supply potential of the detection circuit 33 is about 0V. As the high power supply potential of the detection circuit 33 is low compared to the maximum potential of the drive signal COM, the coupling between the piezoelectric element PZ and the detection circuit 33 is not suitable for DC coupling. In this embodiment, by removing the DC component of the potential signal Vzu with the high-pass filter circuit 312, it is possible to operate the detection circuit 33 normally.

[0063] Next, we will describe the overview of the detection circuit 33 with reference to Figure 7.

[0064] Figure 7 is a block diagram showing an example of the configuration of the detection circuit 33.

[0065] The detection circuit 33 includes a first selection circuit 330, a first test signal generation circuit 340, a second test signal generation circuit 350, and a second selection circuit 360.

[0066] The first selection circuit 330 selects either the detection signal Vout or the first reference potential Vref1 shown in Figure 8 as the first input signal Vs1 based on the selection signal SEL and the detection period signal Acut. That is, the first selection circuit 330 supplies either the detection signal Vout or the first reference potential Vref1 as the first input signal Vs1 to the first test signal generation circuit 340 based on the selection signal SEL and the detection period signal Acut.

[0067] Furthermore, the first selection circuit 330 selects either the detection signal Vout or the second reference potential Vref2 shown in Figure 8 as the second input signal Vs2 based on the selection signal SEL and the detection period signal Acut. That is, the first selection circuit 330 supplies either the detection signal Vout or the second reference potential Vref2 as the second input signal Vs2 to the second test signal generation circuit 350 based on the selection signal SEL and the detection period signal Acut.

[0068] The first inspection signal generation circuit 340 generates a first inspection signal Vd1 that mimics, for example, the attenuation wave of the detection signal Vout. This generates the first inspection signal Vd1 as a pseudo-residual vibration signal that mimics the residual vibration of the discharge unit D. In this embodiment, it is assumed that the first inspection signal Vd1 is generated based on residual vibration of the discharge unit D that is between one-quarter of a period and less than one period. For example, the first inspection signal generation circuit 340 generates a pseudo-residual vibration signal based on the detection signal Vout that is between one-quarter of a period and less than one period, and outputs the generated pseudo-residual vibration signal as the first inspection signal Vd1. The period of the first inspection signal Vd1 output from the first inspection signal generation circuit 340 is one period or more, as shown in Figure 19, which will be described later.

[0069] The first test signal generation circuit 340 includes, for example, a first gain adjustment circuit 342, a low-pass filter circuit 343, a first filter circuit 344, and a first buffer circuit 346. The first gain adjustment circuit 342 adjusts the amplitude of the first input signal Vs1. The low-pass filter circuit 343 attenuates the high-frequency components of the first input signal Vs1. High-frequency components are, for example, frequency components higher than the frequency band of residual vibrations. The first filter circuit 344 is a multiple-feedback type band-pass filter. The first buffer circuit 346 converts the impedance and outputs a low-impedance first test signal Vd1. The first test signal generation circuit 340 is an example of a "signal generation unit," the first filter circuit 344 is an example of a "filter circuit," and the low-pass filter circuit 343 is an example of a "low-pass filter." Details of the first test signal generation circuit 340 will be described later in Figure 9.

[0070] The second inspection signal generation circuit 350 generates a second inspection signal Vd2 by removing frequency components other than predetermined frequency components from the detection signal Vout, for example. As a result, the second inspection signal Vd2 is generated as a detected residual vibration signal corresponding to the signal of predetermined frequency components in the detection signal Vout that indicates the residual vibration of the discharge unit D. The predetermined frequency components are, for example, frequency components corresponding to the frequency band of the residual vibration. In this embodiment, it is assumed that the second inspection signal Vd2 is generated based on the residual vibration of the discharge unit D for one or more periods. For example, the second inspection signal generation circuit 350 generates a detected residual vibration signal based on the detection signal Vout for one or more periods, and outputs the generated detected residual vibration signal as the second inspection signal Vd2.

[0071] The second test signal generation circuit 350 includes, for example, a second gain adjustment circuit 352 configured similarly to the first gain adjustment circuit 342, a second filter circuit 354, and a second buffer circuit 356 configured similarly to the first buffer circuit 346. The second filter circuit 354 is a bandpass filter that allows signals of predetermined frequency components to pass through. Further details of the second test signal generation circuit 350 will be described later in Figure 13.

[0072] The second selection circuit 360 selects one of the first test signal Vd1 and the second test signal Vd2 as the test signal VD based on the selection signal SEL. That is, the second selection circuit 360 supplies one of the first test signal Vd1 and the second test signal Vd2 as the test signal VD to the test unit 6 based on the selection signal SEL. The second selection circuit 360 may, for example, exclusively switch between supplying the first test signal Vd1 or the second test signal Vd2 to the test unit 6 based on the selection signal SEL. In this embodiment, when the selection signal SEL is high, the second selection circuit 360 supplies the first test signal Vd1 as the test signal VD to the test unit 6, and when the selection signal SEL is low, it supplies the second test signal Vd2 as the test signal VD to the test unit 6.

[0073] Thus, in this embodiment, the inspection unit 6 can switch between determining the state of the discharge unit D based on the first inspection signal Vd1 and determining the state of the discharge unit D based on the second inspection signal Vd2, based on the selection signal SEL. Note that the cases in which the inspection unit 6 determines the state of the discharge unit D based on the first inspection signal Vd1 and the cases in which the inspection unit 6 determines the state of the discharge unit D based on the second inspection signal Vd2 may be considered as modes for determining the state of the discharge unit D. Hereinafter, the case in which the inspection unit 6 determines the state of the discharge unit D based on the first inspection signal Vd1 may be referred to as the first mode, and the case in which the inspection unit 6 determines the state of the discharge unit D based on the second inspection signal Vd2 may be referred to as the second mode. In this case, the operation of the inspection unit 6 can also be described as follows. For example, the inspection unit 6 determines the state of the discharge unit D in the mode selected from among a plurality of modes, including the first mode and the second mode, based on the selection signal SEL.

[0074] In this embodiment, as described above, the first inspection signal Vd1 is generated based on residual vibration of the discharge unit D of less than one cycle, and the second inspection signal Vd2 is generated based on residual vibration of the discharge unit D of one cycle or more. Therefore, when the state of the discharge unit D is determined based on the first inspection signal Vd1, the time allocated to detecting residual vibration of the discharge unit D can be shortened compared to when the state of the discharge unit D is determined based on the second inspection signal Vd2. As a result, in this embodiment, it is possible to suppress an increase in the time required to determine the state of multiple discharge unit D.

[0075] Next, with reference to Figure 8, an overview of the first selection circuit 330 will be described.

[0076] Figure 8 is a circuit diagram showing an example of the configuration of the first selection circuit 330.

[0077] The first selection circuit 330 includes a reference potential generation circuit 332, a first reference potential generation circuit 334, a second reference potential generation circuit 336, a first switching circuit 335, a second switching circuit 337, an inverter INV1, and negation OR circuits NOR1 and NOR2.

[0078] The reference potential generation circuit 332 has resistors R30 and R31 connected in series between the wiring supplied with potential VPH and the wiring supplied with potential VPL. Potential VPH is the high power supply potential of the detection circuit 33, and potential VPL is the low power supply potential of the detection circuit 33. One end of resistor R30 is connected to the wiring supplied with potential VPH, and the other end of resistor R30 is connected to the wiring Ls2 to which the detection signal Vout is supplied. Similarly, one end of resistor R31 is connected to the wiring Ls2, and the other end of resistor R31 is connected to the wiring supplied with potential VPL. That is, the detection signal Vout is supplied to node N3, to which resistors R30 and R31 are electrically connected. The resistance values ​​of resistors R30 and R31 are set so that, for example, the reference potential Vref0, which is the potential of node N3 when the potential of node N2 shown in Figure 6 is maintained at a constant potential, becomes the center potential between potential VPH and potential VPL. For example, by setting the resistance values ​​of resistors R30 and R31 to 150kΩ, the reference potential Vref0 is set to the center potential between potential VPH and potential VPL. Note that node N3 is also the node to which capacitor C10 is connected, as explained in Figure 6.

[0079] The first reference potential generation circuit 334 has resistive elements R32 and R33 connected in series between the wiring supplied with potential VPH and the wiring supplied with potential VPL. One end of resistive element R32 is connected to the wiring supplied with potential VPH, the other end of resistive element R33 is connected to one end of resistive element R33, and the other end of resistive element R33 is connected to the wiring supplied with potential VPL. Hereinafter, the node to which resistive elements R32 and R33 are connected may be referred to as node N4. The resistance values ​​of resistive elements R32 and R33 are set, for example, so that the first reference potential Vref1, which is the potential of node N4, becomes the center potential between potential VPH and potential VPL. It is preferable that the output impedance of the first reference potential generation circuit 334 is smaller than the output impedance of the reference potential generation circuit 332 in order to reduce the influence of noise generated at node N4 on the first test signal generation circuit 340. For example, by setting the resistance values ​​of resistors R32 and R33 to 1.5kΩ, the first reference potential Vref1 is set to the center potential between potential VPH and potential VPL.

[0080] The second reference potential generation circuit 336 has resistive elements R34 and R35 connected in series between the wiring supplied with potential VPH and the wiring supplied with potential VPL. One end of resistive element R34 is connected to the wiring supplied with potential VPH, the other end of resistive element R34 is connected to one end of resistive element R35, and the other end of resistive element R35 is connected to the wiring supplied with potential VPL. Hereinafter, the node to which resistive elements R34 and R35 are connected may be referred to as node N5. The resistance values ​​of resistive elements R34 and R35 are set, for example, so that the second reference potential Vref2, which is the potential of node N5, becomes the center potential between potential VPH and potential VPL. It is preferable that the output impedance of the second reference potential generation circuit 336 is smaller than the output impedance of the reference potential generation circuit 332 in order to reduce the influence of noise generated at node N5 on the second test signal generation circuit 350. For example, by setting the resistance values ​​of resistors R34 and R35 to 1.5kΩ, the second reference potential Vref2 is set to the center potential between potential VPH and potential VPL.

[0081] Each of the first switching circuit 335 and the second switching circuit 337 has, for example, a first input terminal Pin1, a second input terminal Pin2, an output terminal Pout, and a control terminal Psel. Each of the first switching circuit 335 and the second switching circuit 337 switches between conducting the first input terminal Pin1 and the output terminal Pout, or conducting the second input terminal Pin2 and the output terminal Pout, depending on the signal supplied to the control terminal Psel. For example, each of the first switching circuit 335 and the second switching circuit 337 conducts the first input terminal Pin1 and the output terminal Pout, and deconducts the second input terminal Pin2 and the output terminal Pout when the level of the control terminal Psel is high. Furthermore, the first switching circuit 335 and the second switching circuit 337, when the level of the control terminal Psel is low, conduct to the second input terminal Pin2 and the output terminal Pout, and deconduct the first input terminal Pin1 and the output terminal Pout.

[0082] For example, the first input terminal Pin1 of the first switching circuit 335 is connected to node N3, the second input terminal Pin2 of the first switching circuit 335 is connected to node N4, and the output terminal Pout of the first switching circuit 335 is connected to the first test signal generation circuit 340. That is, the detection signal Vout is input to the first input terminal Pin1 of the first switching circuit 335, and the first reference potential Vref1 is supplied to the second input terminal Pin2 of the first switching circuit 335. In addition, the input selection signal SEL1 is supplied to the control terminal Psel of the first switching circuit 335. For example, the first test signal generation circuit 340 switches from a state where it is connected to the second input terminal Pin2 via output terminal Pout to a state where it is connected to the first input terminal Pin1 via output terminal Pout, and then starts outputting the first test signal Vd1 which indicates a pseudo residual vibration signal.

[0083] Furthermore, for example, the first input terminal Pin1 of the second switching circuit 337 is connected to node N3, the second input terminal Pin2 of the second switching circuit 337 is connected to node N5, and the output terminal Pout of the second switching circuit 337 is connected to the second test signal generation circuit 350. That is, the detection signal Vout is input to the first input terminal Pin1 of the second switching circuit 337, and the second reference potential Vref2 is supplied to the second input terminal Pin2 of the second switching circuit 337. In addition, the input selection signal SEL2 is supplied to the control terminal Psel of the second switching circuit 337.

[0084] Inverter INV1 outputs the inverted signal of the selection signal SEL supplied from the connection state specification circuit 310 to the negation OR circuit NOR1. The inverted signal of the selection signal SEL is a signal with the level of the selection signal SEL reversed. Specifically, the inverted signal of the selection signal SEL is a low-level signal when the selection signal SEL is high-level, and a high-level signal when the selection signal SEL is low-level.

[0085] The negative OR circuit NOR1 outputs the result of the negative OR operation between the detection period signal Acut supplied from the connection state specification circuit 310 and the inverted signal of the selection signal SEL as the input selection signal SEL1 to the control terminal Psel of the first switching circuit 335.

[0086] The negative OR circuit NOR2 outputs the result of the negative OR operation of the selection signal SEL and the detection period signal Acut supplied from the connection state specification circuit 310 as the input selection signal SEL2 to the control terminal Psel of the second switching circuit 337.

[0087] As shown in Figure 8, the first selection circuit 330 supplies the detection signal Vout as the first input signal Vs1 to the first test signal generation circuit 340 when the selection signal SEL is at a high level and the detection period signal Acut is at a low level. Furthermore, when the selection signal SEL is at a high level and the detection period signal Acut is at a high level, the first selection circuit 330 supplies the first reference potential Vref1 as the first input signal Vs1 to the first test signal generation circuit 340. Note that when the selection signal SEL is at a low level, the first selection circuit 330 supplies the first reference potential Vref1 as the first input signal Vs1 to the first test signal generation circuit 340, regardless of the level of the detection period signal Acut.

[0088] Furthermore, the first selection circuit 330 supplies the detection signal Vout as the second input signal Vs2 to the second test signal generation circuit 350 when the selection signal SEL is at a low level and the detection period signal Acut is at a low level. Also, the first selection circuit 330 supplies the second reference potential Vref2 as the second input signal Vs2 to the second test signal generation circuit 350 when the selection signal SEL is at a low level and the detection period signal Acut is at a high level. Note that when the selection signal SEL is at a high level, the first selection circuit 330 supplies the second reference potential Vref2 as the second input signal Vs2 to the second test signal generation circuit 350 regardless of the level of the detection period signal Acut.

[0089] Thus, in this embodiment, when the selection signal SEL is at a high level, the first test signal generation circuit 340 is selected as the circuit that generates the test signal VD, and when the selection signal SEL is at a low level, the second test signal generation circuit 350 is selected as the circuit that generates the test signal VD. Also, during the period when the detection period signal Acut is at a low level, the detection signal Vout is input to either the first test signal generation circuit 340 or the second test signal generation circuit 350. Hereafter, the period when the detection period signal Acut is at a low level will also be referred to as the detection period Tdet1 or Tdet2, as shown in Figures 17 and 20, etc.

[0090] Note that the configuration of the first selection circuit 330 is not limited to the example shown in Figure 8. For example, the second reference potential generation circuit 336 may be omitted. In this case, the second input terminal Pin2 of the second switching circuit 337 is connected to node N4, for example.

[0091] Next, with reference to Figure 9, an overview of the first test signal generation circuit 340 will be described.

[0092] Figure 9 is a circuit diagram showing an example of the configuration of the first test signal generation circuit 340.

[0093] As explained in Figure 7, the first test signal generation circuit 340 includes a first gain adjustment circuit 342, a low-pass filter circuit 343, a first filter circuit 344, and a first buffer circuit 346.

[0094] The first gain adjustment circuit 342 is a negative feedback type amplifier including, for example, an operational amplifier OP40 and a variable resistor RV1. For example, the first input signal Vs1 is supplied from the first switching circuit 335 to the non-inverting input terminal of the operational amplifier OP40, and the signal obtained by voltage division of the output signal of the operational amplifier OP40 by the variable resistor RV1 is fed back to the inverting input terminal of the operational amplifier OP40. For example, one end of the variable resistor RV1 is connected to the output terminal of the operational amplifier OP40, the other end of the variable resistor RV1 is connected to the wiring to which the first reference potential Vref1 is supplied, and the movable contact of the variable resistor RV1 is connected to the inverting input terminal of the operational amplifier OP40. The first gain adjustment circuit 342 can output a signal with the amplitude of the first input signal Vs1 adjusted to the low-pass filter circuit 343 by, for example, adjusting the position of the movable contact of the variable resistor RV1.

[0095] The low-pass filter circuit 343 includes, for example, a resistor R40, a capacitor C40, and an operational amplifier OP41. One end of the resistor R40 is connected to the output terminal of the operational amplifier OP40 of the first gain adjustment circuit 342, and the other end of the resistor R40 is connected to node N40. One end of the capacitor C40 is connected to node N40, and the other end of the capacitor C40 is connected to the wiring to which the first reference potential Vref1 is supplied. The non-inverting input terminal of the operational amplifier OP42 is connected to node N40, and the inverting input terminal of the operational amplifier OP42 is connected to the output terminal of the operational amplifier OP42. The first filter input signal INbpf1, which is the signal from the output terminal of the operational amplifier OP42, is input to the first filter circuit 344. That is, the first filter circuit 344 receives the first filter input signal INbpf1, which is obtained by attenuating the high-frequency components from a signal whose amplitude has been adjusted from the first input signal Vs1.

[0096] The first filter circuit 344 is a multiple feedback type bandpass filter that includes, for example, resistors R41 and R42, a variable resistor Rv43 whose resistance value can be adjusted, variable capacitors Cv41 and Cv42 whose capacitance value can be adjusted, and an operational amplifier OP42. One of the variable capacitors Cv41 and Cv42 may be replaced with a capacitor whose capacitance value cannot be adjusted. That is, the first filter circuit 344 may have a capacitor whose capacitance value cannot be adjusted instead of the variable capacitor Cv41, or a capacitor whose capacitance value cannot be adjusted instead of the variable capacitor Cv42. The capacitance value refers to the capacitance. An example of the configuration of the variable resistor Rv43 will be described later in Figure 10, etc., and an example of the configuration of the variable capacitor Cv41 will be described later in Figure 12.

[0097] Here, resistor R41 is an example of a "first resistor," and resistor R42 is an example of a "second resistor." Variable resistor Rv43 is an example of a "variable resistor section." Variable capacitor Cv41 is an example of a "first capacitor," and variable capacitor Cv42 is an example of a "second capacitor." Operational amplifier OP42 is an example of a "differential amplifier," the inverting input terminal of operational amplifier OP42 is an example of a "first input terminal," and the non-inverting input terminal of operational amplifier OP42 is an example of a "second input terminal." Furthermore, node N41, which will be described later, is an example of a "first node."

[0098] One end of resistor R41 is connected to the output terminal of operational amplifier OP41 of the low-pass filter circuit 343, and the other end of resistor R41 is connected to node N41. One end of variable capacitor Cv41 is connected to node N41, and the other end of variable capacitor Cv41 is connected to the inverting input terminal of operational amplifier OP42. One end of resistor R42 is connected to the inverting input terminal of operational amplifier OP42, and the other end of resistor R42 is connected to the output terminal of operational amplifier OP42. The non-inverting input terminal of operational amplifier OP42 is connected to the wiring to which the first reference potential Vref1 is supplied. One end of variable resistor Rv43 is connected to node N41, and the other end of variable resistor Rv43 is connected to the wiring to which the first reference potential Vref1 is supplied. Also, one end of variable capacitor Cv42 is connected to node N41, and the other end of variable capacitor Cv42 is connected to the output terminal of operational amplifier OP42.

[0099] For example, the first filter input signal INbpf1 is input to the inverting input terminal of the operational amplifier OP42 via the resistor R41 and the variable capacitor Cv41. That is, the first input signal Vs1 is input to the inverting input terminal of the operational amplifier OP42 via the first gain adjustment circuit 342, the low-pass filter circuit 343, the resistor R41 and the variable capacitor Cv41. The output signal of the operational amplifier OP42 is then fed back to the inverting input terminal of the operational amplifier OP42 via the first feedback path FB1. The output signal of the operational amplifier OP42 is also fed back to the inverting input terminal of the operational amplifier OP42 via a second feedback path FB2, which is separate from the first feedback path FB1. The first feedback path FB1 is, for example, a feedback path that feeds back the output signal of the operational amplifier OP42 to the inverting input terminal of the operational amplifier OP42 via the resistor R42. Furthermore, the second feedback path FB2 is a feedback path that, for example, feeds back the output signal of the operational amplifier OP42 to the inverting input terminal of the operational amplifier OP42 via variable capacitors Cv42 and Cv41. Thus, the first filter circuit 344 has a first feedback path FB1 and a second feedback path FB2 as feedback paths that feed back the output signal of the operational amplifier OP42 to the inverting input terminal of the operational amplifier OP42.

[0100] Furthermore, the output signal of the operational amplifier OP42 is supplied to the first buffer circuit 346 as the first filter output signal Obpf1.

[0101] The first buffer circuit 346 is a buffer that converts impedance and outputs a low-impedance first test signal Vd1. For example, the first buffer circuit 346 is composed of a voltage follower using an operational amplifier OP43. As a result, the first filter output signal Obpf1 supplied to the first buffer circuit 346 is output from the first buffer circuit 346 as a low-impedance first test signal Vd1.

[0102] Next, the formulas for calculating the amplification factor, center frequency, and Q value of the first filter circuit 344 will be explained, with the amplification factor being H and the center frequency being f0. The Q value is a parameter obtained by dividing the center frequency f0 by the passband. The passband is, for example, the bandwidth defined by the frequency at which the amplification factor H is -3dB.

[0103] The general transfer function of a bandpass filter is given by equation (1), where Vi is the potential of the input signal, Vo is the potential of the output signal, and ω0 is "2πf0". In the following equations, the multiplication sign "·" is used as appropriate.

[0104]

number

[0105] Furthermore, the transfer function of the first filter circuit 344 is expressed by equation (2), where Vi is the potential of the first filter input signal INbpf1 and Vo is the potential of the first filter output signal Obpf1. In the following equations, the resistance value of a resistive element and the capacitance value of a capacitor are indicated using the last digit of the sign of the element as a subscript. For example, in equation (2), “R 41 ", "R 42 " and "R 43 “ represents the resistance values ​​of resistor element R41, resistor element R42, and variable resistor element Rv43, respectively, and “C” in equation (2) 41 " and "C 42 The symbols " indicate the capacitance values ​​of the variable capacitors Cv41 and Cv42, respectively.

[0106]

number

[0107] From equations (1) and (2), the amplification factor H, center frequency f0, and Q value of the first filter circuit 344 are expressed by equations (3), (4), and (5), respectively.

[0108]

number

[0109] Here, when the first filter circuit 344 is designed under the conditions of "C=C 41 =C 42 " and "R=R 41 =R 42 ", from equations (3), (4) and (5), the amplification factor H, the center frequency f0 and the Q value are respectively represented by equations (6), (7) and (8).

[0110] [Number]

[0111] From equations (6) and (7), it can be seen that the amplification factor H is determined by the resistance values of the resistance elements R41 and R42 and the resistance value of the variable resistance element Rv43, and the Q value is proportional to the positive square root of the absolute value of the amplification factor.

[0112] In this embodiment, by adjusting the resistance value of the variable resistance element Rv43, the amplification factor H and the Q value are adjusted. That is, in this embodiment, by adjusting the resistance value of the variable resistance element Rv43, the amplitude of the first filter output signal Obpf1 is adjusted. Thereby, the amplitude of the first inspection signal Vd1 indicating the pseudo residual vibration signal is adjusted. Thus, in this embodiment, by adjusting the resistance value of the variable resistance element Rv43, the amplitude of the pseudo residual vibration signal changes. Therefore, in this embodiment, by adjusting the resistance value of the variable resistance element Rv43, the amplitude of the pseudo residual vibration signal can be adjusted. For example, in this embodiment, by increasing the resistance value of the variable resistance element Rv43, the amplitude of the pseudo residual vibration signal can be increased. Alternatively, in this embodiment, by decreasing the resistance value of the variable resistance element Rv43, the amplitude of the pseudo residual vibration signal can be decreased.

[0113] Furthermore, in this embodiment, the center frequency f0 is adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. That is, in this embodiment, the frequency of the first filter output signal Obpf1 is adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. This adjusts the frequency of the first test signal Vd1, which indicates a pseudo-residual vibration signal. That is, the period of the pseudo-residual vibration signal is adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. Thus, in this embodiment, the period of the pseudo-residual vibration signal changes by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. Therefore, in this embodiment, the period of the pseudo-residual vibration signal can be adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. For example, in this embodiment, the period of the pseudo-residual vibration signal can be increased by increasing the capacitance values ​​of the variable capacitors Cv41 and Cv42. Alternatively, in this embodiment, the period of the pseudo-residual vibration signal can be reduced by decreasing the capacitance values ​​of the variable capacitors Cv41 and Cv42.

[0114] In this embodiment, as described above, it is assumed that the resistance value of resistor element R41 is equal to the resistance value of resistor element R42, and the adjusted capacitance value of variable capacitor Cv41 is equal to the adjusted capacitance value of variable capacitor Cv42. In this case, the complexity of designing the first filter circuit 344, adjusting the amplitude of the pseudo-residual vibration signal, and adjusting the period of the pseudo-residual vibration signal can be suppressed. Here, "equal" is a concept that includes not only cases where they are exactly equal, but also cases where they can be considered equal when errors are taken into account. The resistance value of resistor element R41 may be different from the resistance value of resistor element R42, and the adjusted capacitance value of variable capacitor Cv41 may be different from the adjusted capacitance value of variable capacitor Cv42.

[0115] Furthermore, the configuration of the first test signal generation circuit 340 is not limited to the examples shown in Figures 7 and 9. For example, the first gain adjustment circuit 342 may be provided between the first filter circuit 344 and the first buffer circuit 346. Alternatively, some or all of the first gain adjustment circuit 342, the low-pass filter circuit 343, and the first buffer circuit 346 may be omitted from the first test signal generation circuit 340 shown in Figure 9. Also, both resistor elements R41 and R42 may be variable resistor elements whose resistance value can be adjusted. If both resistor elements R41 and R42 are variable resistor elements, the first filter circuit 344 may have a resistor element whose resistance value cannot be adjusted instead of the variable resistor element Rv43.

[0116] Next, an example of the configuration of the variable resistor Rv43 will be described with reference to Figures 10 and 11. However, the method for adjusting the resistance value of the variable resistor Rv43 is not particularly limited to the method described in Figures 10 and 11, and known methods can be used.

[0117] Figure 10 is a circuit diagram showing an example of the configuration of the variable resistor element Rv43.

[0118] The variable resistor Rv43 has, for example, a plurality of resistors R43a, R43b, R43c, and R43d, and selection units SL1 and SL2. Selection unit SL1 has a plurality of switches SW1a, SW1b, SW1c, and SW1d that correspond one-to-one with the plurality of resistors R43a, R43b, R43c, and R43d. Selection unit SL2 has a plurality of switches SW2a, SW2b, SW2c, and SW2d that correspond one-to-one with the plurality of resistors R43a, R43b, R43c, and R43d. That is, the plurality of switches SW2a, SW2b, SW2c, and SW2d correspond one-to-one with the plurality of switches SW1a, SW1b, SW1c, and SW1d.

[0119] In the following, resistors R43a, R43b, R43c, and R43d will be collectively referred to as resistor R43, switches SW1a, SW1b, SW1c, and SW1d will be collectively referred to as switch SW1, and switches SW2a, SW2b, SW2c, and SW2d will be collectively referred to as switch SW2. Note that the number of resistors R43 in a variable resistor Rv43 is not limited to four. For example, a variable resistor Rv43 may have two resistors R43, or three resistors R43, or five or more resistors R43.

[0120] One end of each resistor R43 is connected to node N41 via switch SW1 corresponding to the resistor R43, and the other end of each resistor R43 is connected to the wiring to which the first reference potential Vref1 is supplied via switch SW2 corresponding to the resistor R43. For example, one end of resistor R43a is connected to node N41 via switch SW1a, and the other end of resistor R43a is connected to the wiring to which the first reference potential Vref1 is supplied via switch SW2a.

[0121] Each switch SW1, when turned on, electrically connects the corresponding resistor R43 to node N41, and when turned off, electrically disconnects the corresponding resistor R43 to node N41. Similarly, each switch SW2, when turned on, electrically connects the corresponding resistor R43 to the wiring supplied with the first reference potential Vref1, and when turned off, electrically disconnects the corresponding resistor R43 to the wiring supplied with the first reference potential Vref1. The on / off states of each switch SW1 and each switch SW2 are switched by the selection signal SELr. Note that the corresponding switches SW1 and SW2 are controlled by the selection signal SELr so that their on / off states are the same. For example, when switch SW1a is on, switch SW2a is also on, and when switch SW1a is off, switch SW2a is also off.

[0122] As shown in Figure 10, the resistor R43 that electrically connects node N41 to the wiring supplied with the first reference potential Vref1 is specified by the selection signal SELr. For example, when all of the multiple switches SW1 and SW2 are turned on, the multiple resistor R43 are connected in parallel between node N41 and the wiring supplied with the first reference potential Vref1. The resistance values ​​of the multiple resistor R43 may be the same, or some or all of the resistance values ​​of the multiple resistor R43 may be different.

[0123] If the resistance values ​​of multiple resistors R43 are the same, the number of resistors R43 that electrically connect node N41 to the wiring supplied with the first reference potential Vref1 is adjusted by the selection signal SELr. Alternatively, if the resistance values ​​of multiple resistors R43 are the same, one of the resistors R43 may be electrically connected to node N41 without using switch SW1, and electrically connected to the wiring supplied with the first reference potential Vref1 without using switch SW2.

[0124] Furthermore, if some or all of the resistance values ​​of multiple resistor elements R43 are different from each other, the combination of resistor elements R43 that electrically connect node N41 to the wiring supplied with the first reference potential Vref1 is adjusted by the selection signal SELr. When some or all of the resistance values ​​of multiple resistor elements R43 are different from each other, the resistance value of the variable resistor element Rv43 can be adjusted in more detail than when the resistance values ​​of multiple resistor elements R43 are the same. For example, consider the case where the resistance value of resistor element R43b is half the resistance value of resistor element R43a, the resistance value of resistor element R43c is one-third the resistance value of resistor element R43a, and the resistance value of resistor element R43d is one-quarter the resistance value of resistor element R43a. In this case, by turning on n switches SW1 and n switches SW2 corresponding to those n switches SW1, the resistance value of the variable resistor element Rv43 can be set to a resistance value that cannot be set when the resistance values ​​of multiple resistor elements R43 are the same. The value n is a natural number of 2 or more that is less than or equal to the number of switches SW1.

[0125] Note that the configuration of the variable resistor Rv43 is not limited to the example shown in Figure 10. For example, the selection unit SL1 may be omitted, and each resistor R43 may be electrically connected to node N41 without the switch SW1. Alternatively, the selection unit SL2 may be omitted, and each resistor R43 may be electrically connected to the wiring to which the first reference potential Vref1 is supplied without the switch SW2. Furthermore, for example, in the embodiment where the selection unit SL2 is omitted, the switch SW1 connected to one end of each resistor R43 may be a switch that switches between connecting one end of the resistor R43 to node N41 or connecting one end of the resistor R43 to the wiring to which the first reference potential Vref1 is supplied. Also, for example, the variable resistor Rv43 may have multiple resistors R43 connected in series, as shown in Figure 11.

[0126] Figure 11 is a circuit diagram showing another example of the configuration of the variable resistor element Rv43.

[0127] The variable resistor Rv43 includes, for example, a plurality of resistors R43a, R43b, R43c, and R43d connected in series between node N41 and node N43d, and a selection unit SL3. The selection unit SL3 has a plurality of switches SW3a, SW3b, SW3c, and SW3d that correspond one-to-one with the plurality of resistors R43a, R43b, R43c, and R43d. Hereinafter, switches SW3a, SW3b, SW3c, and SW3d may be collectively referred to as switch SW3. Note that the number of resistors R43 in the variable resistor Rv43 is not limited to four. For example, the variable resistor Rv43 may have two resistors R43 connected in series, or three resistors R43 connected in series. Alternatively, the variable resistor Rv43 may have five or more resistors R43 connected in series.

[0128] For example, among the multiple resistors R43 connected in series between node N41 and node N43d, resistor R43a is connected to node N41, and resistor R43d is connected to node N43d. Node N43a is the connection node between resistor R43a and resistor R43b, node N43b is the connection node between resistor R43b and resistor R43c, and node N43c is the connection node between resistor R43c and resistor R43d.

[0129] One end of switch SW3a is connected to node N43a, and the other end of switch SW3a is connected to the wiring to which the first reference potential Vref1 is supplied. One end of switch SW3b is connected to node N43b, and the other end of switch SW3b is connected to the wiring to which the first reference potential Vref1 is supplied. One end of switch SW3c is connected to node N43c, and the other end of switch SW3c is connected to the wiring to which the first reference potential Vref1 is supplied. One end of switch SW3d is connected to node N43d, and the other end of switch SW3d is connected to the wiring to which the first reference potential Vref1 is supplied.

[0130] The on / off state of each switch SW3 is controlled by the selection signal SELr. In the example shown in Figure 11, the selection signal SELr controls the system so that only one of the multiple switches SW3 is turned on. For example, when switch SW3a is turned on, switches SW3b, SW3c, and SW3d are turned off. In this case, the resistance value of the variable resistor Rv43 becomes the resistance value based on the resistance value of resistor R43a.

[0131] As shown in Figure 11, the selection signal SELr specifies whether the electrical connection between node N41 and the wiring supplied with the first reference potential Vref1 is made by a resistor R43a or by multiple resistors R43 connected in series. Furthermore, when the electrical connection between node N41 and the wiring supplied with the first reference potential Vref1 is made by multiple resistors R43 connected in series, the number of resistors R43 connected in series is adjusted by the selection signal SELr. Note that the resistance values ​​of the multiple resistors R43 may be the same, or some or all of the resistance values ​​of the multiple resistors R43 may be different.

[0132] Note that the configuration of the variable resistor Rv43 is not limited to the example shown in Figure 11. For example, the switch SW3d may be omitted, and the resistor R43d may be electrically connected to the wiring to which the first reference potential Vref1 is supplied without going through the switch SW3d. In the embodiment where the switch SW3d is omitted, it is preferable that the on-resistance, which is the resistance value of each switch SW3 when it is turned on, is negligibly small compared to the resistance value of the resistor R43. As a result, for example, when the switch SW3c is turned on, the combined resistance of the circuit in which the switch SW3c and the resistor R43d are connected in parallel will be approximately the same as the on-resistance of the switch SW3c. Therefore, even in the embodiment where the switch SW3d is omitted, the resistance value of the variable resistor Rv43 is adjusted by the selection signal SELr, similar to the example shown in Figure 11.

[0133] In this embodiment, the resistance value of the variable resistor Rv43 can be set using the selection signal SELr so that the amplitude of the pseudo-residual vibration signal generated by the first inspection signal generation circuit 340 in the ejection state determination process becomes an appropriate amplitude. The setting of the resistance value of the variable resistor Rv43 may be performed in advance by the manufacturer of the head unit 3, or it may be performed by the drive control unit 22, etc., based on operation information indicating the content of the operation performed on the inkjet printer 1. Note that the setting of the resistance value of the variable resistor Rv43 can also be considered as the setting of the selection signal SELr.

[0134] Next, an example of the configuration of the variable capacitor Cv41 will be described with reference to Figure 12. Although the variable capacitor Cv42 is not specifically described in Figure 12, the variable capacitor Cv42 may be configured in the same way as the variable capacitor Cv41, for example. Note that the method for adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42 is not particularly limited to the method described in Figure 12, and known methods can be used.

[0135] Figure 12 is a circuit diagram showing an example of the configuration of a variable capacitor Cv41.

[0136] The variable capacitor Cv41 has, for example, a plurality of capacitors C41a, C41b, C41c, and C41d, and selection units SL4 and SL5. The selection unit SL4 has a plurality of switches SW4a, SW4b, SW4c, and SW4d that correspond one-to-one with the plurality of capacitors C41a, C41b, C41c, and C41d. The selection unit SL5 has a plurality of switches SW5a, SW5b, SW5c, and SW5d that correspond one-to-one with the plurality of capacitors C41a, C41b, C41c, and C41d. That is, the plurality of switches SW5a, SW5b, SW5c, and SW5d correspond one-to-one with the plurality of switches SW4a, SW4b, SW4c, and SW4d.

[0137] In the following, capacitors C41a, C41b, C41c, and C41d will be collectively referred to as capacitor C41, switches SW4a, SW4b, SW4c, and SW4d will be collectively referred to as switch SW4, and switches SW5a, SW5b, SW5c, and SW5d will be collectively referred to as switch SW5. Note that the number of capacitors C41 in a variable capacitor Cv41 is not limited to four. For example, a variable capacitor Cv41 may have two capacitors C41, or three capacitors C41. Alternatively, a variable capacitor Cv41 may have five or more capacitors C41.

[0138] One end of each capacitor C41 is connected to node N41 via switch SW4 corresponding to that capacitor C41, and the other end of each capacitor C41 is connected to the inverting input terminal of the operational amplifier OP42 via switch SW5 corresponding to that capacitor C41. For example, one end of capacitor C41a is connected to node N41 via switch SW4a, and the other end of capacitor C41a is connected to the inverting input terminal of the operational amplifier OP42 via switch SW5a.

[0139] Each switch SW4, when turned on, electrically connects the capacitor C41 and node N41 corresponding to that switch SW4, and when turned off, electrically disconnects the capacitor C41 and node N41 corresponding to that switch SW4. Similarly, each switch SW5, when turned on, electrically connects the capacitor C41 corresponding to that switch SW4 to the inverting input terminal of the operational amplifier OP42, and when turned off, electrically disconnects the capacitor C41 corresponding to that switch SW4 to the inverting input terminal of the operational amplifier OP42. The on / off states of each switch SW4 and each switch SW5 are switched by the selection signal SELc1. Note that the corresponding switches SW4 and SW5 are controlled by the selection signal SELc1 so that their on / off states are the same. For example, when switch SW4a is on, switch SW5a is also on, and when switch SW4a is off, switch SW5a is also off.

[0140] As shown in Figure 12, the capacitor C41 through which the AC signal passes between node N41 and the inverting input terminal of operational amplifier OP42 is specified by the selection signal SELc1. For example, when all of the multiple switches SW4 and SW5 are turned on, the multiple capacitors C41 are connected in parallel between node N41 and the inverting input terminal of operational amplifier OP42. The capacitance values ​​of the multiple capacitors C41 may be the same, or some or all of the capacitance values ​​of the multiple capacitors C41 may be different.

[0141] If the capacitance values ​​of multiple capacitors C41 are the same, the number of capacitors C41 through which the AC signal passes between node N41 and the inverting input terminal of operational amplifier OP42 is adjusted by the selection signal SELc1. Furthermore, if the capacitance values ​​of multiple capacitors C41 are the same, one of the capacitors C41 may be electrically connected to node N41 without the switch SW4 and electrically connected to the inverting input terminal of operational amplifier OP42 without the switch SW5.

[0142] Furthermore, if some or all of the capacitance values ​​of multiple capacitors C41 are different from each other, the combination of capacitors C41 through which the AC signal passes between node N41 and the inverting input terminal of op-amp OP42 is adjusted by the selection signal SELc1. When some or all of the capacitance values ​​of multiple capacitors C41 are different from each other, the capacitance value of the variable capacitor Cv41 can be adjusted in more detail than when the capacitance values ​​of multiple capacitors C41 are the same. For example, consider the case where the capacitance value of capacitor C41b is twice that of capacitor C41a, the capacitance value of capacitor C41c is three times that of capacitor C41a, and the capacitance value of capacitor C41d is four times that of capacitor C41a. In this case, by turning on n switches SW4 and the n switches SW5 corresponding to those n switches SW4, the capacitance value of the variable capacitor Cv41 can be set to a capacitance value that cannot be set when the capacitance values ​​of multiple capacitors C41 are the same. The value n is a natural number of 2 or greater, less than or equal to the number of switches SW4.

[0143] Note that the configuration of the variable capacitor Cv41 is not limited to the example shown in Figure 12. For example, the selection unit SL4 may be omitted, and each capacitor C41 may be electrically connected to node N41 without the switch SW4. Alternatively, the selection unit SL5 may be omitted, and each capacitor C41 may be electrically connected to the inverting input terminal of the operational amplifier OP42 without the switch SW5. Furthermore, for example, the variable capacitor Cv41 may have multiple capacitors C41 connected in series, similar to the configuration of the variable resistor element Rv43 shown in Figure 11.

[0144] In this embodiment, the capacitance values ​​of the variable capacitors Cv41 and Cv42 can be set using the selection signals SELc1 and SELc2 so that the period of the pseudo-residual vibration signal generated by the first inspection signal generation circuit 340 in the ejection state determination process becomes an appropriate period. The capacitance values ​​of the variable capacitors Cv41 and Cv42 may be set in advance by the manufacturer of the head unit 3, or they may be set by the drive control unit 22, etc., based on operation information indicating the content of the operation performed on the inkjet printer 1. Note that the setting of the capacitance values ​​of the variable capacitors Cv41 and Cv42 can also be considered as setting the selection signals SELc1 and SELc2.

[0145] Next, with reference to Figure 13, an overview of the second test signal generation circuit 350 will be described.

[0146] Figure 13 is a circuit diagram showing an example of the configuration of the second test signal generation circuit 350.

[0147] As explained in Figure 7, the second test signal generation circuit 350 includes a second gain adjustment circuit 352, a second filter circuit 354, and a second buffer circuit 356.

[0148] The second gain adjustment circuit 352 is a negative feedback type amplifier configured similarly to the first gain adjustment circuit 342 shown in Figure 9. For example, the second gain adjustment circuit 352 includes an operational amplifier OP50 that receives the second input signal Vs2 supplied from the second switching circuit 337 at its non-inverting input terminal, and a variable resistor RV2 that divides the output signal of the operational amplifier OP50 and feeds it back to the inverting input terminal of the operational amplifier OP50. One end of the variable resistor RV2 is connected to the output terminal of the operational amplifier OP50, the other end of the variable resistor RV2 is connected to the wiring to which the second reference potential Vref2 is supplied, and the movable contact of the variable resistor RV2 is connected to the inverting input terminal of the operational amplifier OP50. The second gain adjustment circuit 352 can output a second filter input signal INbpf2, in which the amplitude of the second input signal Vs2 has been adjusted, to the second filter circuit 354 by adjusting the position of the movable contact of the variable resistor RV2.

[0149] The second filter circuit 354 is a bandpass filter that includes, for example, resistors R51 and R52, capacitors C51 and C52, and an operational amplifier OP51, and allows signals of a predetermined frequency component to pass through.

[0150] One end of resistor R51 is connected to the output terminal of operational amplifier OP50 of the second gain adjustment circuit 352, and the other end of resistor R51 is connected to one end of capacitor C51, and the other end of capacitor C51 is connected to the inverting input terminal of operational amplifier OP51. One end of capacitor C52 is connected to the inverting input terminal of operational amplifier OP51, and the other end of capacitor C52 is connected to the output terminal of operational amplifier OP51. One end of resistor R52 is connected to the inverting input terminal of operational amplifier OP51, and the other end of resistor R52 is connected to the output terminal of operational amplifier OP51. In addition, the non-inverting input terminal of operational amplifier OP51 is connected to the wiring to which the second reference potential Vref2 is supplied.

[0151] For example, the second filter input signal INbpf2 is input to the inverting input terminal of the operational amplifier OP51 via the resistor R51 and capacitor C51. That is, the second input signal Vs2 is input to the inverting input terminal of the operational amplifier OP51 via the second gain adjustment circuit 352, the resistor R51, and the capacitor C51. Then, the output signal of the operational amplifier OP41 is fed back to the inverting input terminal of the operational amplifier OP41 via a feedback path in which the resistor R52 and the capacitor C52 are connected in parallel.

[0152] Furthermore, the output signal of the operational amplifier OP51 is supplied to the second buffer circuit 356 as the second filter output signal Obpf2.

[0153] The second buffer circuit 356 is a buffer that converts impedance and outputs a low-impedance second test signal Vd2. For example, the second buffer circuit 356 is composed of a voltage follower using an operational amplifier OP52, similar to the first buffer circuit 346 shown in Figure 9. As a result, the second filter output signal Obpf2 supplied to the second buffer circuit 356 is output from the second buffer circuit 356 as a low-impedance second test signal Vd2.

[0154] Next, regarding the formulas for calculating the low-frequency cutoff frequency, high-frequency cutoff frequency, and amplification factor of the second filter circuit 354, the low-frequency cutoff frequency is f LPF The high-frequency cutoff frequency is set to f. HPF Let's explain this by denoting the amplification factor as G.

[0155] Cutoff frequency f of the second filter circuit 354 LPF This is the cutoff frequency of the low-pass filter, which is composed of a capacitor C52 and a resistor R52, and is expressed by equation (9). Also, the cutoff frequency f of the second filter circuit 354 is HPF This is the cutoff frequency of a high-pass filter consisting of a capacitor C51 and a resistor R51, and is expressed by equation (10).

[0156]

number

[0157] Furthermore, the amplification factor G of the second filter circuit 354 is expressed by equations (11), (12), and (13). Note that the angular frequency ω [rad] in equations (12) and (13) represents the angular frequency corresponding to the center frequency of the second filter circuit 354, which functions as a bandpass filter.

[0158]

number

[0159] Note that the configuration of the second test signal generation circuit 350 is not limited to the examples shown in Figures 7 and 13. For example, the second gain adjustment circuit 352 may be provided between the second filter circuit 354 and the second buffer circuit 356. Alternatively, some or all of the second gain adjustment circuit 352 and the second buffer circuit 356 may be omitted from the second test signal generation circuit 350 shown in Figure 13.

[0160] Next, the characteristics of the first filter circuit 344 will be described with reference to Figure 14.

[0161] Figure 14 is an explanatory diagram illustrating the characteristics of the first filter circuit 344. The upper part of Figure 14 shows the relationship between the amplification factor, group delay, and frequency of the first filter circuit 344. The lower part of Figure 14 shows the response of the first filter circuit 344, which has the characteristics shown in the upper part of Figure 14, when a signal changing from a high level to a low level is input to it. In Figure 14, the characteristics of the second filter circuit 354 are shown by dashed lines for comparison with the first filter circuit 344.

[0162] The first filter circuit 344 is a multiple feedback type bandpass filter, as explained in Figure 9. As shown in the upper part of Figure 14, a multiple feedback type bandpass filter has the characteristic that the group delay changes significantly around the center frequency f0. The occurrence of a delay around the center frequency f0 means that the phase shifts around the center frequency f0. For example, the group delay characteristic is expressed as "Tdg(ω)=-dφ / dω" where the group delay is Tdg, the phase is φ[rad], and the angular velocity is ω[rad / sec].

[0163] In the first filter circuit 344, where the group delay changes significantly near the center frequency f0, overshoot occurs at the center frequency f0. That is, a damped oscillation waveform is generated at the center frequency f0. As a result, the first filter circuit 344 outputs a signal with a damped oscillation waveform even when the input signal is maintained at a low potential, as shown in the lower part of Figure 14.

[0164] In contrast, the second filter circuit 354 does not have the characteristic of a large change in group delay near the center frequency f0, as shown by the dashed line in the upper part of Figure 14. In the second filter circuit 354, as shown by the dashed line in the lower part of Figure 14, when the input signal is maintained at a low potential, the output signal converges to a predetermined potential.

[0165] In this embodiment, by making the damped oscillation waveform generated at the center frequency f0 closer to a sine wave, the first filter output signal Obpf1, which is the output signal of the first filter circuit 344, can be treated as a pseudo-residual oscillation signal that mimics the residual oscillation of the discharge section D. Here, the time ts shown in Figure 14 is the time it takes for the potential of the first filter input signal INbpf1 input to the first filter circuit 344 to go from its maximum value to its minimum value. For example, in order to generate a damped oscillation waveform close to a sine wave, the center frequency f0 is designed to be less than or equal to "1 / (2ts)".

[0166] Next, with reference to Figure 15, we will explain the simulation results of the first filter circuit 344.

[0167] Figure 15 shows the simulation results of the first filter circuit 344. Figure 15 also shows the simulation results of the response of the first filter circuit 344 when a signal changing from a high level to a low level is input. In the simulation shown in Figure 15, the time ts for the potential of the signal input to the first filter circuit 344 to change from its maximum value to its minimum value is 1 μsec, and "1 / (2ts)" is 500 kHz.

[0168] Furthermore, Simulation Result Sim1 shows the simulation result of the first filter circuit 344 when the Q value is 3.26 and the center frequency f0 is 186kHz. Simulation Result Sim2 shows the simulation result of the first filter circuit 344 when the Q value is 2.85 and the center frequency f0 is 162kHz. Simulation Result Sim3 shows the simulation result of the first filter circuit 344 when the Q value is 2.56 and the center frequency f0 is 146kHz. Simulation Result Sim4 shows the simulation result of the first filter circuit 344 when the Q value is 2.34 and the center frequency f0 is 134kHz. Simulation Result Sim5 shows the simulation result of the first filter circuit 344 when the Q value is 2.17 and the center frequency f0 is 124kHz.

[0169] As shown in Figure 15, when the center frequency f0 is less than or equal to "1 / (2ts)", the output signal of the first filter circuit 344 becomes close to a sine wave. Although not shown in Figure 15, it has been confirmed that when the center frequency f0 is "1 / ts", distortion occurs in the output signal of the first filter circuit 344, and the simulation results show that the output signal of the first filter circuit 344 cannot be considered a sine wave.

[0170] Here, the Q value is adjusted by adjusting the resistance value of the variable resistor Rv43, as shown in equation (7) above. The center frequency f0 is adjusted by adjusting either or both the capacitance values ​​of the variable capacitors Cv41 and Cv42 and the resistance value of the variable resistor Rv43, as shown in equation (8) above. For example, the resistance value of the variable resistor Rv43 is adjusted so that the amplitude of the pseudo-residual vibration signal generated by the first inspection signal generation circuit 340 in the discharge state determination process has an appropriate amplitude. Then, while maintaining the resistance value of the variable resistor Rv43 at the adjusted resistance value, the capacitance values ​​of the variable capacitors Cv41 and Cv42 are adjusted so that the period of the pseudo-residual vibration signal generated by the first inspection signal generation circuit 340 in the discharge state determination process has an appropriate period.

[0171] Next, referring to Figure 16, we will briefly explain the operation of the low-pass filter circuit 343 when the first input signal Vs1 switches from the detection signal Vout to the first reference potential Vref1.

[0172] Figure 16 is an explanatory diagram illustrating the operation of the low-pass filter circuit 343 when the first input signal Vs1 switches from the detection signal Vout to the first reference potential Vref1.

[0173] For example, at the end of detection, when the first input signal Vs1 switches from the detection signal Vout to the first reference potential Vref1, the potential Vn40 of node N40 is held by capacitor C40 at the potential of the output signal of op-amp OP40 at the end of detection. Then, the potential Vn40 of node N40 converges to the first reference potential Vref1 with the time constant of the low-pass filter circuit 343. For example, if the potential Vn40 of node N40 at the end of detection is higher than the first reference potential Vref1, capacitor C40 is discharged to the first gain adjustment circuit 342 via the first path PH1. Also, for example, if the potential Vn40 of node N40 at the end of detection is lower than the first reference potential Vref1, capacitor C40 is charged from the first gain adjustment circuit 342 via the second path PH2.

[0174] The potential Vn40 of node N40 after the end of detection is expressed by equation (14), using the first reference potential Vref1, the elapsed time t from the end of detection, the time constant τ, and the potential difference ΔVn40 between the potential Vn40 at the end of detection and the first reference potential Vref1.

[0175] Vn40=ΔVn40·exp(-t / τ)+Vref1 …(14)

[0176] Note that “exp()” in equation (14) represents the exponential function. Also, the potential difference ΔVn40 in equation (14) can be expressed in equation (15), for example, using the potential Vn40 at the end of detection and the first reference potential Vref1.

[0177] ΔVn40 = Vn40 - Vref1 …(15)

[0178] Furthermore, the time constant τ in equation (14) is expressed by equation (16) when the output impedance of the circuit preceding the low-pass filter circuit 343 is Rp. In this embodiment, since the circuit preceding the low-pass filter circuit 343 is the first gain adjustment circuit 342, the output impedance Rp in equation (16) represents the output impedance of the first gain adjustment circuit 342.

[0179] τ=C 40 ·(R 40 +Rp) …(16)

[0180] Furthermore, if the output impedance of the operational amplifier OP40 is very small compared to the impedance of the variable resistor RV1, the output impedance of the operational amplifier OP40 may be considered as the output impedance of the first gain adjustment circuit 342.

[0181] Furthermore, in a configuration where the low-pass filter circuit 343 is connected to the first switching circuit 335 without going through the first gain adjustment circuit 342, the output impedance Rp in equation (16) represents the output impedance of the first reference potential generation circuit 334. In this case, the output impedance Rp is expressed by equation (17).

[0182] Rp=(R 32 ·R 33 ) / (R 32 +R 33 ) …(17)

[0183] Furthermore, for example, it is preferable that the low-pass filter circuit 343 is designed such that the relationship between the time ts and the time constant τ from which the potential of the detection signal Vout, input to the first test signal generation circuit 340 as the first input signal Vs1, changes from its maximum value to its minimum value satisfies equation (18).

[0184] ts / 2 ≈ τ ~ 4.6τ …(18)

[0185] In equation (18), "τ" corresponds to the time it takes for capacitor C40 to be charged or discharged to approximately 63%, and "4.6τ" in equation (18) corresponds to the time it takes for capacitor C40 to be charged or discharged to approximately 100%. Therefore, equation (18) means that half of the time ts is included in the range from the time it takes for capacitor C40 to be charged or discharged to approximately 63% to the time it takes for capacitor C40 to be charged or discharged to approximately 100%.

[0186] Here, in the first filter circuit 344 following the low-pass filter circuit 343, a circuit including a variable capacitor Cv41, a resistor R42, and an operational amplifier OP42 functions as a differentiating circuit. Therefore, if noise is superimposed on the detection signal Vout input to the first test signal generation circuit 340, or if the detection signal Vout includes a steep potential change, distortion may occur in the first filter output signal Obpf1 output from the first filter circuit 344. If distortion occurs in the first filter output signal Obpf1, the variation in the amplitude value of the first test signal Vd1 generated as a pseudo-residual vibration signal will increase, and the accuracy of determining the state of the discharge unit D may decrease. Therefore, in this embodiment, distortion in the first filter output signal Obpf1 is suppressed by stabilizing the potential of the first input signal Vs1 during the non-detection period, which is the period when the detection signal Vout is not input to the first test signal generation circuit 340. Specifically, in this embodiment, the first switching circuit 335 and the low-pass filter circuit 343 converge the potential of the first input signal Vs1 during the non-detection period to the first reference potential Vref1, thereby suppressing distortion in the first filter output signal Obpf1.

[0187] Next, the effects of the first switching circuit 335 and the low-pass filter circuit 343 will be explained with reference to Figure 17.

[0188] Figure 17 is an explanatory diagram illustrating the effects of the first switching circuit 335 and the low-pass filter circuit 343. In Figure 17, "With distortion countermeasures" shows the simulation results of the first filter circuit 344 when the first switching circuit 335 and the low-pass filter circuit 343 are provided before the first filter circuit 344. In Figure 17, "Proportional" shows the simulation results of the first filter circuit 344 when the first switching circuit 335 and the low-pass filter circuit 343 are not provided before the first filter circuit 344. However, in the proportional configuration, a simple switch that either electrically connects the switching circuit 31 and the detection circuit 33 is provided instead of the first switching circuit 335.

[0189] As shown in Figure 17, in the proportional configuration where the first switching circuit 335 and the low-pass filter circuit 343 are not provided, noise is generated in the first filter input signal INbpf1 during the period before the detection period Tdet1 begins. Also, in the proportional configuration, the potential of the first filter input signal INbpf1 changes abruptly at the end of the detection period Tdet1. Therefore, in the proportional configuration, distortion is generated in the first filter output signal Obpf1 during the period before the detection period Tdet1 begins and at the end of the detection period Tdet1.

[0190] In contrast, in the configuration in which the first switching circuit 335 and the low-pass filter circuit 343 are provided, the generation of noise in the first filter input signal INbpf1 and the rapid change in the potential of the first filter input signal INbpf1 are suppressed. As a result, in the configuration in which the first switching circuit 335 and the low-pass filter circuit 343 are provided, the generation of distortion in the first filter output signal Obpf1 is suppressed.

[0191] Thus, in this embodiment, distortion in the first filter output signal Obpf1 is suppressed, and therefore, variations in the amplitude value of the first inspection signal Vd1, which is generated as a pseudo-residual vibration signal, can be suppressed. As a result, in this embodiment, the state of the discharge unit D can be determined with high accuracy.

[0192] Furthermore, as shown in Figure 17, the first filter circuit 344 can output a first filter output signal Obpf1 of one period or more based on a first filter input signal INbpf1 of more than one quarter period and less than one period.

[0193] Next, the operation of the inkjet printer 1 will be explained with reference to Figure 18.

[0194] Figure 18 is a timing chart showing an example of the operation of the inkjet printer 1 in a unit period TU. In this embodiment, when the inkjet printer 1 performs a printing process or an ejection state determination process, one or more unit periods TU are set as the operating period of the inkjet printer 1. In this embodiment, the inkjet printer 1 can drive each ejection unit D[m] for the printing process or ejection state determination process in each unit period TU. For example, when the inkjet printer 1 performs an ejection state determination process, it can drive the ejection unit D to be determined and detect the detection signal Vout[m] from the ejection unit D to be determined in each unit period TU.

[0195] Control unit 2 outputs a latch signal LAT having a pulse PlsL. This allows control unit 2 to define a unit period TU as the period from the rising edge of one pulse PlsL to the rising edge of the next pulse PlsL.

[0196] The print signal SI includes, for example, M individual designation signals Sd[1] to Sd[M] that correspond one-to-one with M ejection units D[1] to D[M]. The individual designation signals Sd[m] specify the mode of operation of the ejection units D[m] in each unit period TU when the inkjet printer 1 performs a print process or an ejection state determination process. For example, prior to each unit period TU, the control unit 2 supplies the print signal SI, including the individual designation signals Sd[1] to Sd[M], to the connection state designation circuit 310 in synchronization with the clock signal CL. The connection state designation circuit 310 then generates connection state designation signals Qa[m] and Qs[m] based on the individual designation signals Sd[m] in the unit period TU. The connection state designation circuit 310 also generates a selection signal SEL and a detection period signal Acut based on at least some of the signals of the print signal SI, the latch signal LAT, and the period designation signal Tsig.

[0197] For example, in a unit period TU during which printing is performed, the ejection unit D[m] is designated by an individual designation signal Sd[m] to be either an ejection unit D that forms dots or an ejection unit D that does not form dots. Also, for example, in a unit period TU during which the ejection state determination process is performed, the ejection unit D[m] is designated by an individual designation signal Sd[m] to determine whether or not it will be driven as the ejection unit D to be determined. Figure 18 shows the connection state designation signals Qa[m] and Qs[m], etc., when the ejection unit D[m] is designated as the ejection unit D to be determined by the individual designation signal Sd[m] in a unit period TU during which the ejection state determination process is performed. Figure 18 mainly explains the operation of the inkjet printer 1 when the ejection state determination process is performed.

[0198] When the discharge state determination process is executed, for example, the control unit 2 outputs a period definition signal Tsig having pulses PlsT1 and PlsT2. As a result, the control unit 2 divides the unit period TU into a control period TSS1 from the start of pulse PlsL to the start of pulse PlsT1, and a control period TSS2 from the start of pulse PlsT1 to the start of the next pulse PlsL.

[0199] Furthermore, the connection state specification circuit 310 defines the detection period Tdet1 of the detection signal Vout[m] by controlling the detection period signal Acut. For example, the connection state specification circuit 310 sets the detection period signal Acut to a low level when pulse PlsT1 ends and sets the detection period signal Acut to a high level when pulse PlsT2 begins. The time from the start to the end of the detection period Tdet1 corresponds to the time allocated for detecting the residual vibration of the discharge unit D. Figure 18 shows the detection period Tdet1 when the detection signal Vout[m] is supplied to the first inspection signal generation circuit 340. When the detection signal Vout[m] is supplied to the first inspection signal generation circuit 340, a pseudo-residual vibration signal that mimics the residual vibration of the discharge unit D[m] is generated during the inspection period Tche. In Figure 18, since the case where the detection signal Vout[m] is supplied to the first inspection signal generation circuit 340 is assumed, the selection signal SEL is maintained at a high level.

[0200] Furthermore, the drive signal COM used in the ejection state determination process includes, for example, a pulse PA supplied to wiring La during the control period TSS1. The pulse PA used in the ejection state determination process may be a pulse that does not eject ink from the nozzle N, or a pulse that ejects ink from the nozzle N, as long as it is a pulse that generates vibration in the diaphragm 321. In this embodiment, it is assumed that the pulse PA is a pulse that does not eject ink from the nozzle N. In the printing process, instead of pulse PA, a pulse that ejects ink from the nozzle N is supplied to wiring La during the unit period TU.

[0201] A pulse PA is a waveform in which the potential of the drive signal COM returns to potential V0, passing through a potential VLa lower than potential V0, and then back to potential V0. Potential V0 is the potential at the start and end of pulse PA and is the reference potential of the drive signal COM.

[0202] For example, a pulse PA has a waveform element Pa1 in which the potential changes from potential V0 to potential VLa, a waveform element Pa2 in which the potential is maintained at the potential VLa at the end of waveform element Pa1, and a waveform element Pa3 in which the potential changes from potential VLa to potential V0. Hereafter, waveform elements Pa1, Pa2, and Pa3 may be collectively referred to as waveform element Pa.

[0203] The waveform element Pa1 is an expansion element that displaces the piezoelectric element Zb in the Z2 direction. In the expansion element, the potential of the drive signal COM changes in order to drive the piezoelectric element PZ to expand the volume of the cavity CV. Therefore, in the waveform element Pa1, the potential of the drive signal COM changes to expand the volume of the cavity CV. When the volume of the cavity CV expands, the surface of the ink inside the nozzle N is pulled in the Z2 direction, which is the opposite direction to the ejection direction, as shown in Phase-2 in Figure 4. Hereafter, the pulling of the surface of the ink inside the nozzle N in the opposite direction to the ejection direction may be referred to as "pull".

[0204] Furthermore, the waveform element Pa2 is a maintenance element for maintaining the position of the piezoelectric element Zb in the Z-axis direction. For example, the waveform element Pa2 maintains the potential of the drive signal COM in order to drive the piezoelectric element PZ to maintain the volume of the cavity CV that has been expanded by the waveform element Pa1.

[0205] Furthermore, the waveform element Pa3 is a contraction element for displacing the piezoelectric element Zb in the Z1 direction. In the contraction element, the potential of the drive signal COM changes in order to drive the piezoelectric element PZ to contract the volume of the cavity CV. Therefore, in the waveform element Pa3, the potential of the drive signal COM changes to contract the volume of the cavity CV. When the volume of the cavity CV contracts, the surface of the ink in the nozzle N is pushed out in the Z1 direction, which is the discharge direction. In this embodiment, the waveform element Pa3 pushes the surface of the ink in the nozzle N out in the Z1 direction to the extent that no ink is discharged from the nozzle N. Hereafter, pushing the surface of the ink in the nozzle N in the discharge direction may be referred to as "pushing".

[0206] Thus, the pulse PA is a so-called pull-push waveform. However, the waveform of the drive signal COM, which prevents ink from being ejected from nozzle N, is not limited to a pull-push waveform.

[0207] Furthermore, for example, if the discharge unit D[m] is designated as the discharge unit D to be judged by the individual designation signal Sd[m], the connection status designation circuit 310 sets the connection status designation signal Qa[m] to a high level and the connection status designation signal Qs[m] to a low level during the control period TSS1. Then, during the control period TSS2, the connection status designation circuit 310 sets the connection status designation signal Qa[m] to a low level and the connection status designation signal Qs[m] to a high level.

[0208] Furthermore, when switching between control period TSS1 and control period TSS2, it is preferable that the state of each switch SWa[m] and SWs[m] switches between on and off, passing through a state where both switches SWa[m] and SWs[m] are on. That is, it is preferable that the timing of the transition of the connection status specification signal Qs[m] from low level to high level is earlier than the timing of the transition of the connection status specification signal Qa[m] from high level to low level. Also, it is preferable that the timing of the transition of the connection status specification signal Qs[m] from high level to low level is later than the timing of the transition of the connection status specification signal Qa[m] from low level to high level. In this case, since a state in which both switches SWa[m] and SWs[m] are off does not occur when switching between control period TSS1 and control period TSS2, it is possible to suppress changes in the potential of node N2 shown in Figure 6 due to switching noise, etc.

[0209] Furthermore, it is preferable that the timing at which the detection period signal Acut transitions from a high level to a low level is later than the timing at which the connection status specification signal Qa[m] transitions from a high level to a low level, and the timing at which the connection status specification signal Qs[m] transitions from a low level to a high level. Also, it is preferable that the timing at which the detection period signal Acut transitions from a low level to a high level is earlier than the timing at which the connection status specification signal Qa[m] transitions from a low level to a high level, and the timing at which the connection status specification signal Qs[m] transitions from a high level to a low level. For this reason, in this embodiment, as described above, the connection status specification circuit 310 sets the detection period signal Acut to a low level when pulse PlsT1 ends, and sets the detection period signal Acut to a high level when pulse PlsT2 begins. Furthermore, the connection state specification circuit 310 may, if the above transition timing is met, set the detection period signal Acut to a low level when pulse PlsT1 starts, and set the detection period signal Acut to a high level when the next pulse PlsL starts.

[0210] By setting the timing for transitioning the level of the detection period signal Acut to satisfy the above-described transition timing, it is possible to suppress the generation of noise, etc., in the first input signal Vs1 and the second input signal Vs2. However, if the noise, etc., generated in the first input signal Vs1 and the second input signal Vs2 is suppressed to within an acceptable range, the timing for transitioning the level of the detection period signal Acut does not need to satisfy the above-described transition timing.

[0211] The piezoelectric element PZ[m] of the discharge section D[m] to be judged is driven by the pulse PA of the drive signal COM during the control period TSS1. Specifically, the piezoelectric element PZ[m] of the discharge section D[m] to be judged is displaced by the pulse PA of the drive signal COM during the control period TSS1. As a result, vibration occurs in the discharge section D[m] to be judged. The vibration that occurred during the control period TSS1 persists into the control period TSS2. During the control period TSS2, the potential of the upper electrode Zu[m] of the piezoelectric element PZ[m] of the discharge section D[m] to be judged changes according to the residual vibration occurring in the discharge section D[m] to be judged. That is, during the control period TSS2, the potential of the upper electrode Zu of the piezoelectric element PZ of the discharge section D to be judged becomes a potential corresponding to the electromotive force of the piezoelectric element PZ caused by the residual vibration occurring in the discharge section D to be judged. The potential of the upper electrode Zu is then detected as a potential signal Vzu during the control period TSS2. As a result, the change in the potential of the upper electrode Zu is detected as a detection signal Vout during the control period TSS2. Consequently, the detection signal Vout is input to the detection circuit 33 as a residual vibration signal generated by the vibration remaining in the discharge section D.

[0212] The detection signal Vout input to the detection circuit 33 is supplied to the first inspection signal generation circuit 340 as the first input signal Vs1 during the detection period Tdet1 of the control period TSS2. As a result, during the inspection period Tche following the detection period Tdet1, the first inspection signal Vd1 is generated by the first inspection signal generation circuit 340 as a pseudo-residual vibration signal that mimics the residual vibration of the discharge section D[m].

[0213] Next, the operation of the inkjet printer 1 when printing is performed will be briefly explained. Note that in the printing process, the unit period TU does not necessarily have to be divided into control period TSS1 and control period TSS2. In this case, the period definition signal Tsig may be kept at a low level and the detection period signal Acut may be kept at a high level during the unit period TU.

[0214] The connection status designation signal Qs[m] is maintained at a low level for a unit period TU, regardless of whether, for example, the discharge unit D[m] is designated as a discharge unit D that forms a dot. The connection status designation signal Qa[m] is set to a high level or a low level depending on whether the discharge unit D[m] is designated as a discharge unit D that forms a dot.

[0215] For example, if a discharge unit D[m] is designated as a discharge unit D that forms a dot by an individual designation signal Sd[m], the connection status designation circuit 310 sets the connection status designation signal Qa[m] to a high level during the unit period TU. Note that the connection status designation signal Qa corresponding to a discharge unit D that does not form a dot is set to a low level during the unit period TU.

[0216] When the connection status specification signal Qa[m] is set to a high level, a drive signal COM, which includes a pulse that ejects ink from nozzle N, is supplied from the drive signal generation unit 4 to the dot-forming ejection unit D. For example, the pulse that ejects ink from nozzle N is supplied to wiring La for a unit period TU. The pulse that ejects ink from nozzle N may also be a pull-push waveform, similar to pulse PA. In this case, the pulse that ejects ink from nozzle N is defined such that the potential difference at the start and end of the contraction element, which is the waveform element that ejects ink, is greater than the potential difference at the start and end of the waveform element Pa3 of pulse PA. Note that the pulse that ejects ink from nozzle N is not limited to a pull-push waveform. For example, the pulse that ejects ink from nozzle N may be a pull-push-pull waveform.

[0217] Each waveform element of the pulse that ejects ink from nozzle N is defined such that a predetermined amount of ink is ejected from ejection unit D[m] when an individual drive signal Vin[m] having the pulse is supplied to ejection unit D[m]. In this embodiment, it is assumed that when the potential of the individual drive signal Vin[m] is high, the volume of the cavity CV provided by ejection unit D[m] is smaller compared to when it is low. Therefore, when ejection unit D[m] is driven by an individual drive signal Vin[m] having an ink ejection pulse, the ink in ejection unit D[m] is ejected from nozzle N by the waveform element that changes the potential of the individual drive signal Vin[m] from low potential to high potential.

[0218] For example, each waveform element of the pulse that ejects ink from nozzle N is determined based on the ink ejection characteristics of the ejection unit D. The ink ejection characteristics include, for example, the amount of ink ejected as ink droplets and the ejection speed of the ejected ink droplets. The ejection speed of the ink droplets changes depending on, for example, the viscosity of the ink. For example, the ejection speed of ink droplets with a viscosity higher than a predetermined viscosity is lower than the ejection speed of ink droplets with a viscosity of less than or equal to the predetermined viscosity. As will be described in detail in Figure 19, in this embodiment, the viscosity state of the ink in the ejection unit D can be determined based on a pseudo-residual vibration signal.

[0219] In this embodiment, since it is assumed that the pulse PA is a pulse that does not eject ink from the nozzle N, the ejection state determination process can be executed even when the head unit 3 is not located on the ejected ink receiving unit 80. For example, when printing is performed one pass at a time while moving the head unit 3 along the X-axis, the ejection state determination process may be executed between passes. Also, the ejection state determination process may be executed between a print job based on one print data IMG and a print job based on another print data IMG. Alternatively, the ejection state determination process may be executed when maintenance processing is performed.

[0220] Note that the operation of the inkjet printer 1 is not limited to the example shown in Figure 18. For example, the pulse PA may be a pulse that ejects ink from the nozzle N. In this case, the drive signal COM including the pulse PA may be used in both the printing process and the ejection state determination process. However, if the pulse PA used in the ejection state determination process is a pulse that ejects ink from the nozzle N, it is preferable that the ejection state determination process is performed, for example, when the head unit 3 is positioned on the ejected ink receiving unit 80.

[0221] Furthermore, for example, when the discharge state determination process is executed, the control unit 2 may output a period-defining signal Tsig having only pulse PlsT1 among pulses PlsT1 and PlsT2. In this case, the connection state designation circuit 310 may, for example, set the detection period signal Acut to a low level when pulse PlsT1 starts or ends, and set the detection period signal Acut to a high level when the next pulse PlsL starts, in order to satisfy the transition timing described above.

[0222] Furthermore, although Figure 18 illustrates a case where there is one drive signal COM, the present invention is not limited to this embodiment. For example, multiple drive signals COM may be used, including a drive signal COM that does not eject ink from the nozzle N and a drive signal COM that ejects ink from the nozzle N. In this case, during the printing process, a pulse PA that does not eject ink may be used to prevent ink viscosity from increasing. Also, the drive signal COM that ejects ink from the nozzle N may have multiple pulses that eject ink from the nozzle N to form dots of different sizes.

[0223] Next, with reference to Figure 19, the first test signal Vd1 generated by the first test signal generation circuit 340 will be described.

[0224] Figure 19 is an explanatory diagram illustrating an example of the first test signal Vd1 generated by the first test signal generation circuit 340. In Figure 19, for the sake of clarity, the number 1, 2, or 3 is appended to the end of the sign of each of the multiple unit periods TU. Also, in Figure 19, it is assumed that in unit period TU1, the discharge unit D[a] is designated as the discharge unit D to be judged, and in unit period TU2, the discharge unit D[b] is designated as the discharge unit D to be judged. Note that the value a is a natural number satisfying "1 ≤ a ≤ M", and the value b is a natural number different from the value a that satisfies "1 ≤ b ≤ M". Furthermore, the time ts is the time in the detection period Tdet1 during which the potential of the detection signal Vout input to the first test signal generation circuit 340 changes from its maximum value to its minimum value, or the time during which the potential of the detection signal Vout changes from its minimum value to its maximum value.

[0225] During the detection period Tdet1, when the detection period signal Acut is at a low level, the detection signal Vout is input to the first test signal generation circuit 340 as the first input signal Vs1. For example, during the detection period Tdet1[a] of the unit period TU1, the detection signal Vout, which indicates the residual vibration of the discharge section D[a] driven by the individual drive signal Vin[a], is input to the first test signal generation circuit 340 as the first input signal Vs1. Then, at the end of the detection period Tdet1[a], the first input signal Vs1 switches from the detection signal Vout to the first reference potential Vref1. As a result, during the test period Tche[a], the potential of the first input signal Vs1 converges to the first reference potential Vref1.

[0226] As shown in Figure 19, the detection signal Vout input to the first test signal generation circuit 340 as the first input signal Vs1 is a detection signal Vout of less than one period. Therefore, the first test signal generation circuit 340 can shorten the length of the detection period Tdet1 compared to the second test signal generation circuit 350, where a detection signal Vout of one period or more is input as the second input signal Vs2. As a result, in this embodiment, the unit period TU when the test signal VD is generated by the first test signal generation circuit 340 can be shortened compared to the unit period TU when the test signal VD is generated by the second test signal generation circuit 350.

[0227] Furthermore, during the inspection period Tche[a] following the detection period Tdet1[a], the wiring Ls2 connecting the switching circuit 31 and the detection circuit 33 is electrically disconnected from the first inspection signal generation circuit 340. Therefore, even if an individual drive signal Vin[b] is supplied to the discharge unit D[b] during the inspection period Tche[a], the first inspection signal generation circuit 340 can generate a first inspection signal Vd1 that mimics the attenuation wave of the detection signal Vout, which indicates the residual vibration of the discharge unit D[a].

[0228] For example, the first filter circuit 344 is a multiple feedback type bandpass filter that has the characteristic of a large change in group delay near the center frequency f0, as explained in Figure 14. Therefore, a damped oscillation waveform corresponding to the detection signal Vout is generated at the center frequency f0. After the input of the detection signal Vout to the first filter circuit 344 ends, that is, after the end of the detection period Tdet1, the first filter output signal Obpf1 having the damped oscillation waveform generated at the center frequency f0 is output from the first filter circuit 344. As a result, for example, during the inspection period Tche[a], the first inspection signal Vd1 having a damped oscillation waveform corresponding to the detection signal Vout indicating the residual vibration of the discharge unit D[a] is output from the first inspection signal generation circuit 340 to the inspection unit 6. Also, for example, during the inspection period Tche[b], the first inspection signal Vd1 having a damped oscillation waveform corresponding to the detection signal Vout indicating the residual vibration of the discharge unit D[b] is output from the first inspection signal generation circuit 340 to the inspection unit 6.

[0229] The inspection unit 6 determines the state of the discharge unit D[a] based on the first inspection signal Vd1 output from the first inspection signal generation circuit 340 as inspection signal VD[a] during the inspection period Tche[a]. The inspection unit 6 also determines the state of the discharge unit D[b] based on the first inspection signal Vd1 output from the first inspection signal generation circuit 340 as inspection signal VD[b] during the inspection period Tche[b]. The inspection unit 6 may also determine the state of the discharge unit D based on the first inspection signal Vd1 output from the first inspection signal generation circuit 340 as inspection signal VD during the period including the detection period Tdet1 and the inspection period Tche. That is, the inspection unit 6 may determine the state of the discharge unit D based on the first inspection signal Vd1 output from the first inspection signal generation circuit 340 during the inspection period Tche and the first inspection signal Vd1 output from the first inspection signal generation circuit 340 during the detection period Tdet1.

[0230] In the example shown in Figure 19, the solid waveform of the first input signal Vs1 represents the waveform of the first input signal Vs1 when the ejection unit D is in a normal state, and the dashed waveform of the first input signal Vs1 represents the waveform of the first input signal Vs1 when the ink in the ejection unit D is in a viscous state. Similarly, the solid waveform of the inspection signal VD represents the waveform of the inspection signal VD when the ejection unit D is in a normal state, and the dashed waveform of the inspection signal VD represents the waveform of the inspection signal VD when the ink in the ejection unit D is in a viscous state. As shown in Figure 19, the amplitude of the inspection signal VD differs depending on whether the ejection unit D is in a normal state or if the ink in the ejection unit D is in a viscous state.

[0231] For example, the amplitude of the inspection signal VD when the ink in the ejection unit D is in a thickened state will be smaller than the amplitude of the inspection signal VD when the ejection unit D is in a normal state. The difference dA11 in Figure 19 shows the difference between the amplitude of the first peak of the inspection signal VD during inspection period Tche when the ejection unit D is in a normal state and the amplitude of the first peak of the inspection signal VD during inspection period Tche when the ink in the ejection unit D is in a thickened state. Also, the difference dA21 in Figure 19 shows the difference between the amplitude of the second peak of the inspection signal VD during inspection period Tche when the ejection unit D is in a normal state and the amplitude of the second peak of the inspection signal VD during inspection period Tche when the ink in the ejection unit D is in a thickened state.

[0232] Simulations by the inventors have confirmed that the rate of change in the amplitude of the inspection signal VD when the ejection unit D is in a normal state and when the ink in the ejection unit D is in a viscous state is almost the same as when the second inspection signal Vd2 is used as the inspection signal VD. For example, in a simulation when the first inspection signal Vd1 is used as the inspection signal VD, the rate of change calculated based on the difference dA11, i.e., the rate of change in the amplitude of the first peak of the inspection signal VD during the inspection period Tche, is 43%. Also, the simulation result for the rate of change calculated based on the difference dA21, i.e., the rate of change in the amplitude of the second peak of the inspection signal VD during the inspection period Tche, is 54%. In contrast, in a simulation when the second inspection signal Vd2 is used as the inspection signal VD, the rate of change calculated based on the difference dA12 shown in Figure 20 is 36%, and the rate of change calculated based on the difference dA22 shown in Figure 20 is 50%. Furthermore, the first peak of the test signal VD during the test period Tche corresponds to the second peak of the test signal VD during the period including the detection period Tdet1 and the test period Tche. Therefore, the differences dA12 and dA22 shown in Figure 20 correspond to the differences dA11 and dA21, respectively.

[0233] Thus, even when the first inspection signal Vd1 is used as the inspection signal VD, the state of the discharge unit D can be determined based on the rate of change of the amplitude of the inspection signal VD with respect to a reference amplitude value. The reference amplitude value is predetermined, for example, based on the amplitude of the inspection signal VD when the state of the discharge unit D is normal.

[0234] The method for determining the amplitude of the test signal VD is not particularly limited, and known methods can be used. For example, the test unit 6 may compare the potential of the test signal VD with a plurality of different thresholds, generate a plurality of pulses that show the comparison results between the plurality of thresholds and the potential of the test signal VD, and determine the amplitude of the test signal VD based on the width of the generated plurality of pulses. The pulses that show the comparison results between the threshold and the potential of the test signal VD are, for example, pulses that become high level during the period when the potential of the test signal VD is above the threshold. If the test unit 6 has a comparator that compares the potential of the test signal VD with a plurality of thresholds, the comparator may be provided inside the head unit 3. In this case, the test unit 6 has a comparator provided inside the head unit 3 and an element provided outside the head unit 3.

[0235] Thus, in this embodiment, part or all of the inspection period Tche[a] that generates the first inspection signal Vd1 corresponding to the residual vibration of the discharge unit D[a] can be overlapped with the control period TSS1 that drives a discharge unit D[b] which is separate from the discharge unit D[a]. Therefore, in this embodiment, by using the first inspection signal Vd1 as the inspection signal VD for determining the state of the discharge unit D, the time required to determine the state of multiple discharge units D, including discharge units D[a] and D[b], can be shortened.

[0236] Next, with reference to Figure 20, we will explain the second test signal Vd2 generated by the second test signal generation circuit 350.

[0237] Figure 20 is an explanatory diagram illustrating an example of the second test signal Vd2 generated by the second test signal generation circuit 350. In Figure 20, for the sake of clarity, the number 1 or 2 is appended to the end of the sign of each of the multiple unit periods TU. Also, in Figure 20, it is assumed that the discharge unit D[a] is specified as the discharge unit D to be judged in the unit period TU1. The value a is a natural number satisfying "1 ≤ a ≤ M". Furthermore, in Figure 20, the detection period Tdet1 when the first test signal Vd1 is used as the test signal VD is indicated by a dashed arrow.

[0238] During the detection period Tdet2, when the detection period signal Acut is at a low level, the detection signal Vout is input to the second test signal generation circuit 350 as the second input signal Vs2. For example, during the detection period Tdet2[a] of the unit period TU1, the detection signal Vout, which indicates the residual vibration of the discharge section D[a] driven by the individual drive signal Vin[a], is input to the second test signal generation circuit 350 as the second input signal Vs2. Then, upon the end of the detection period Tdet2[a], the second input signal Vs2 switches from the detection signal Vout to the second reference potential Vref2. As a result, during the control period TSS1 of the unit period TU2, the potential of the second input signal Vs2 converges to the second reference potential Vref2.

[0239] As shown in Figure 20, the detection signal Vout input to the second test signal generation circuit 350 as the second input signal Vs2 is a detection signal Vout with one or more periods. Therefore, in the second test signal generation circuit 350, the length of the detection period Tdet2 is longer than the detection period Tdet1 when the first test signal Vd1 is used as the test signal VD.

[0240] Furthermore, as explained in Figure 13, the second filter circuit 354 is a bandpass filter that allows signals of predetermined frequency components to pass through. Therefore, the second filter output signal Obpf2, which is obtained by removing frequency components other than the predetermined ones from the second filter input signal INbpf2 (which has had its amplitude adjusted from the detection signal Vout), is output from the second filter circuit 354. As a result, for example, during the detection period Tdet2[a], the second inspection signal Vd2, which is obtained by removing frequency components other than the predetermined ones from the signal corresponding to the detection signal Vout that indicates the residual vibration of the discharge section D[a], is output from the second inspection signal generation circuit 350 to the inspection unit 6.

[0241] During the detection period Tdet2[a], the wiring Ls2 connecting the switching circuit 31 and the detection circuit 33 is electrically connected to the second inspection signal generation circuit 350. Therefore, when the state of the discharge unit D[a] is determined based on the second inspection signal Vd2, it is preferable not to drive the other discharge units D until the detection period Tdet2[a] ends, that is, until the generation of the second inspection signal Vd2 is complete.

[0242] As described above, the second inspection signal generation circuit 350 generates a second inspection signal Vd2 based on a detection signal Vout of one or more cycles during the detection period Tdet2[a]. Therefore, during the detection period Tdet2[a], the inspection unit 6 determines the state of the discharge unit D[a] based on the second inspection signal Vd2 output from the second inspection signal generation circuit 350 as the inspection signal VD[a].

[0243] In the example shown in Figure 20, the solid waveform of the second input signal Vs2 represents the waveform of the second input signal Vs2 when the ejection unit D is in a normal state, and the dashed waveform of the second input signal Vs2 represents the waveform of the second input signal Vs2 when the ink in the ejection unit D is in a viscous state. Similarly, the solid waveform of the inspection signal VD represents the waveform of the inspection signal VD when the ejection unit D is in a normal state, and the dashed waveform of the inspection signal VD represents the waveform of the inspection signal VD when the ink in the ejection unit D is in a viscous state. Even when the inspection signal VD is generated by the second inspection signal generation circuit 350, as shown in Figure 20, the amplitude of the inspection signal VD differs depending on whether the ejection unit D is in a normal state or whether the ink in the ejection unit D is in a viscous state.

[0244] For example, the amplitude of the inspection signal VD when the ink in the ejection unit D is in a thickened state will be smaller than the amplitude of the inspection signal VD when the ejection unit D is in a normal state. The difference dA12 in Figure 20 shows the difference between the amplitude of the second peak of the inspection signal VD during the detection period Tdet2 when the ejection unit D is in a normal state and the amplitude of the second peak of the inspection signal VD during the detection period Tdet2 when the ink in the ejection unit D is in a thickened state. Also, the difference dA22 in Figure 20 shows the difference between the amplitude of the third peak of the inspection signal VD during the detection period Tdet2 when the ejection unit D is in a normal state and the amplitude of the third peak of the inspection signal VD during the detection period Tdet2 when the ink in the ejection unit D is in a thickened state.

[0245] Furthermore, the second peak of the test signal VD during detection period Tdet2 shown in Figure 20 corresponds to the first peak of the test signal VD during inspection period Tche shown in Figure 19. Also, the third peak of the test signal VD during detection period Tdet2 shown in Figure 20 corresponds to the second peak of the test signal VD during inspection period Tche shown in Figure 19.

[0246] Thus, even when the second inspection signal Vd2 is used as the inspection signal VD, the state of the discharge unit D can be determined based on the rate of change of the amplitude of the inspection signal VD relative to the reference amplitude value, just as when the first inspection signal Vd1 is used as the inspection signal VD.

[0247] Furthermore, as described above, the second inspection signal Vd2 is generated based on a detection signal Vout of one or more cycles. Therefore, in this embodiment, the state of the ejection unit D may be determined based on part or all of the amplitude, period, and phase of the second inspection signal Vd2. Also, in this embodiment, multiple abnormal conditions, including the viscosity of the ink in the ejection unit D, can be determined based on the second inspection signal Vd2 generated based on a detection signal Vout of one or more cycles. Examples of abnormal conditions other than the viscosity of the ink in the ejection unit D include a state in which an ejection abnormality occurs due to air bubbles being mixed into the cavity CV of the ejection unit D, and a state in which an ejection abnormality occurs due to foreign matter adhering to the vicinity of the nozzle N of the ejection unit D. For example, determining the state of the ejection unit D in the second mode, which determines the state of the ejection unit D based on the second inspection signal Vd2, is effective when it is necessary to accurately know the cause of the ejection abnormality.

[0248] Furthermore, the determination of the state of the ejection unit D in the first mode, which determines the state of the ejection unit D based on the first inspection signal Vd1, is effective when determining the state of the ejection unit D in a short time, because the unit period TU can be shortened compared to the second mode. For example, immediately after the inkjet printer 1 is started up, the ink in the cavity CV is likely to be stagnant and thickened. For this reason, the determination of the state of the ejection unit D in the first mode may be performed with priority over the determination of the state of the ejection unit D in the second mode after the inkjet printer 1 has been started up. In this case, it is possible to suppress an increase in the time required to determine the state of the ejection unit D after the inkjet printer 1 has been started up. Thus, in this embodiment, the mode for determining the state of the ejection unit D can be switched depending on the purpose of determining the state of the ejection unit D and the situation in which the determination is performed. For example, the first mode may be a mode in which the thickening state of the ink in the ejection unit D is determined based on the first inspection signal Vd1. The second mode may be a mode in which multiple state abnormalities, including the thickening state of the ink in the ejection unit D, are determined based on the second inspection signal Vd2.

[0249] In this embodiment, the inkjet printer 1 includes a head unit 3, a drive signal generation unit 4 that generates a drive signal COM, and an inspection unit 6 that determines the state of the ejection unit D based on a pseudo-residual vibration signal. The head unit 3 includes an ejection unit D that includes a nozzle N, a piezoelectric element PZ driven by the drive signal COM, and a cavity CV that ejects ink from the nozzle N in response to the driving of the piezoelectric element PZ, and a first inspection signal generation circuit 340 that receives a residual vibration signal generated due to vibrations remaining in the ejection unit D after the piezoelectric element PZ has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal as a signal for determining the state of the ejection unit D. The first inspection signal generation circuit 340 includes a first filter circuit 344 that generates a pseudo-residual vibration signal, and the first filter circuit 344 includes a variable resistor element Rv43 whose resistance value can be adjusted. In this embodiment, for example, the detection signal Vout is input to the first inspection signal generation circuit 340 as a residual vibration signal, and the first inspection signal generation circuit 340 generates the first inspection signal Vd1 as a pseudo-residual vibration signal.

[0250] Thus, in this embodiment, a pseudo-residual vibration signal corresponding to the residual vibration signal is generated by the first filter circuit 344 as a signal for determining the state of the discharge unit D. For example, in this embodiment, by generating a pseudo-residual vibration signal based on a residual vibration signal of less than one cycle, the time allocated to detecting the residual vibration signal can be shortened compared to the case where the state of the discharge unit D is determined using a residual vibration signal of one cycle or more. Therefore, in this embodiment, when determining the state of the discharge unit D, it is possible to suppress the length of the unit period TU, which is the period for driving the discharge unit D, from becoming longer. In other words, the length of the unit period TU when determining the state of the discharge unit D can be shortened. Furthermore, in this embodiment, the characteristics of the pseudo-residual vibration signal generated by the first filter circuit 344 can be adjusted by adjusting the resistance value of the variable resistor element Rv43 of the first filter circuit 344.

[0251] Furthermore, in this embodiment, the first filter circuit 344 includes variable capacitors Cv41 and Cv42 whose capacitance values ​​can be adjusted. Thus, in this embodiment, the characteristics of the pseudo-residual vibration signal generated by the first filter circuit 344 can be adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42 in the first filter circuit 344.

[0252] Furthermore, in this embodiment, the first filter circuit 344 further includes an operational amplifier OP42 having an inverting input terminal and a non-inverting input terminal to which a first reference potential Vref1 is supplied; a resistor R41 to which a residual oscillation signal is supplied at one end and the other end electrically connected to node N41; a resistor R42 to which one end is connected to the inverting input terminal of the operational amplifier OP42 and the other end electrically connected to the output terminal of the operational amplifier OP42; a variable capacitor Cv41 to which one end is electrically connected to node N41 and the other end is connected to the inverting input terminal of the operational amplifier OP42; and a variable capacitor Cv42 to which one end is electrically connected to node N41 and the other end electrically connected to the output terminal of the operational amplifier OP42. The variable resistor Rv43 has one end electrically connected to node N41 and the first reference potential Vref1 supplied to the other end. The variable capacitors Cv41 and Cv42 are capacitors whose capacitance value can be adjusted. Note that one of the variable capacitors Cv41 and Cv42 may be replaced with a capacitor whose capacitance value cannot be adjusted.

[0253] Thus, in this embodiment, the first filter circuit 344 includes a first feedback path FB1 that feeds back the signal output from the operational amplifier OP42 to the inverting input terminal via a resistor R42, and a second feedback path FB2 that feeds back the signal output from the operational amplifier OP42 to the inverting input terminal via a variable capacitor Cv42 and a variable capacitor Cv41. In other words, in this embodiment, the first filter circuit 344 is a multiple feedback type bandpass filter. As a result, in this embodiment, it is possible to generate a pseudo-residual vibration signal of one period or more based on a residual vibration signal of less than one period. Furthermore, in this embodiment, the first filter circuit 344 that generates the pseudo-residual vibration signal can be configured with a simple circuit including an operational amplifier OP42, resistors R41 and R42, a variable resistor Rv43, and variable capacitors Cv41 and Cv42.

[0254] Furthermore, in this embodiment, the resistance value of resistor element R41 may be equal to the resistance value of resistor element R42. In this case, the complexity of designing the first filter circuit 344 and adjusting the amplitude of the pseudo-residual vibration signal can be suppressed.

[0255] Furthermore, in this embodiment, the adjusted capacitance value of variable capacitor Cv41 may be equal to the adjusted capacitance value of variable capacitor Cv42. In this case, the complexity of designing the first filter circuit 344 and adjusting the period of the pseudo-residual vibration signal can be suppressed.

[0256] Furthermore, in this embodiment, the period of the pseudo-residual vibration signal changes by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42. Therefore, in this embodiment, the period of the pseudo-residual vibration signal generated by the first filter circuit 344 can be adjusted by adjusting the capacitance values ​​of the variable capacitors Cv41 and Cv42.

[0257] Furthermore, in this embodiment, the amplitude of the pseudo-residual vibration signal changes by adjusting the resistance value of the variable resistor Rv43. Therefore, in this embodiment, the amplitude of the pseudo-residual vibration signal generated by the first filter circuit 344 can be adjusted by adjusting the resistance value of the variable resistor Rv43.

[0258] Furthermore, in this embodiment, the period of the residual vibration signal input to the first filter circuit 344 is between one-quarter of a period and less than one period, and the period of the pseudo-residual vibration signal output from the first filter circuit 344 is one period or more. In this embodiment, for example, the first filter input signal INbpf1 is input to the first filter circuit 344 as the residual vibration signal input to the first filter circuit 344, and the first filter output signal Obpf1 is output from the first filter circuit 344 as the pseudo-residual vibration signal output from the first filter circuit 344. Thus, in this embodiment, a pseudo-residual vibration signal of one period or more is generated based on a residual vibration signal of between one-quarter of a period and less than one period. As a result, in this embodiment, the state of the discharge section D can be accurately determined while shortening the length of the unit period TU.

[0259] Furthermore, in this embodiment, the first test signal generation circuit 340 includes a low-pass filter circuit 343. The residual vibration signal is input to the first filter circuit 344 via the low-pass filter circuit 343. As a result, in this embodiment, a residual vibration signal from which noise and other imperfections have been removed can be input to the first filter circuit 344. Consequently, in this embodiment, distortion in the pseudo-residual vibration signal can be suppressed.

[0260] Furthermore, in this embodiment, the inspection unit 6 determines the viscosity of the ink in the ejection unit D. That is, the pseudo-residual vibration signal is used to determine the viscosity of the ink in the ejection unit D. Therefore, in this embodiment, it is possible to suppress an increase in the time required to determine the viscosity of the ink in the ejection unit D. For example, in this embodiment, it is possible to shorten the time required to determine the viscosity of the ink in multiple ejection units D.

[0261] [2. Variant] Each of the above forms can be variously modified. Specific forms of modification are exemplified below. Two or more forms arbitrarily selected from the following examples can be appropriately combined within a range that does not conflict with each other. In the modification examples illustrated below, for elements whose actions and functions are equivalent to those of the embodiments, the reference signs referred to in the above description are reused, and the detailed description of each is appropriately omitted.

[0262] [First Modification Example] In the above-described embodiment, some elements of the first filter circuit 344 may be shared with the second filter circuit 354.

[0263] FIG. 21 is a block diagram showing an example of the configuration of the detection circuit 33A according to the first modification example. For elements similar to those described in FIGS. 1 to 20, the same reference signs are given, and the detailed description is omitted.

[0264] The inkjet printer 1 according to this modification example is the same as the inkjet printer 1 shown in FIG. 1, except that it has the detection circuit 33A shown in FIG. 21 instead of the detection circuit 33 shown in FIG. 1. The detection circuit 33A has, for example, a first selection circuit 330, a first gain adjustment circuit 342, a low-pass filter circuit 343, a second gain adjustment circuit 352, a third filter circuit 370, and a buffer circuit 372.

[0265] The first selection circuit 330, the first gain adjustment circuit 342, the low-pass filter circuit 343, and the second gain adjustment circuit 352 are the same as the first gain adjustment circuit 342, the low-pass filter circuit 343, and the second gain adjustment circuit 352 shown in FIG. 7, respectively. However, the first filter input signal INbpf1, which is the output signal of the low-pass filter circuit 343, and the second filter input signal INbpf2, which is the output signal of the second gain adjustment circuit 352, are input to the third filter circuit 370. Also, selection signals SELr, SELc1, and SELc2 are input to the third filter circuit 370.

[0266] The third filter circuit 370 is a filter circuit that switches based on the selection signal SEL whether it functions as the first filter circuit 344 shown in Figure 9 or the second filter circuit 354 shown in Figure 13. For example, the third filter circuit 370 functions as the first filter circuit 344 when the selection signal SEL is high level, and functions as the second filter circuit 354 when the selection signal SEL is low level. As will be explained in detail in Figure 22, in the third filter circuit 370, some of the elements of the first filter circuit 344 and some of the elements of the second filter circuit 354 are shared between the first filter circuit 344 and the second filter circuit 354.

[0267] The output signal of the third filter circuit 370 is supplied to the buffer circuit 372 as the filter output signal Obpf.

[0268] Buffer circuit 372 is a buffer that converts impedance and outputs a low-impedance test signal VD. For example, buffer circuit 372 is composed of a voltage follower using operational amplifier OP43, similar to the first buffer circuit 346 shown in Figure 9. As a result, the filter output signal Obpf supplied to buffer circuit 372 is output from buffer circuit 372 as a low-impedance test signal VD.

[0269] Next, with reference to Figure 22, an overview of the third filter circuit 370 will be described.

[0270] Figure 22 is a circuit diagram showing an example of the configuration of the third filter circuit 370 according to the first modified example. Elements similar to those described in Figures 1 to 21 are denoted by the same reference numerals, and detailed explanations are omitted.

[0271] The first filter circuit 344A shown in Figure 22 corresponds to the first filter circuit 344 shown in Figure 9, and the second filter circuit 354A shown in Figure 22 corresponds to the second filter circuit 354 shown in Figure 13. As shown in Figure 22, in the third filter circuit 370, the operational amplifier OP42 and the resistor R42 are shared between the first filter circuit 344A and the second filter circuit 354A. When the third filter circuit 370 functions as the second filter circuit 354A, the operational amplifier OP42 and the resistor R42 correspond to the operational amplifier OP51 and the resistor R52 shown in Figure 13, respectively.

[0272] The third filter circuit 370 includes, for example, resistors R41, R42, and 51, a variable resistor Rv43, variable capacitors Cv41 and Cv42, capacitors C51 and C52, an operational amplifier OP42, switches SW6, SW7, and SW8, and an inverter INV2.

[0273] One end of resistor R41 is connected to the output terminal of operational amplifier OP41 of the low-pass filter circuit 343, and the other end of resistor R41 is connected to node N41. One end of variable capacitor Cv41 is connected to node N41 via switch SW6, and the other end of variable capacitor Cv41 is connected to the inverting input terminal of operational amplifier OP42. One end of resistor R42 is connected to the inverting input terminal of operational amplifier OP42, and the other end of resistor R42 is connected to the output terminal of operational amplifier OP42. One end of variable resistor Rv43 is connected to node N41, and the other end of variable resistor Rv43 is connected to the wiring to which the first reference potential Vref1 is supplied. One end of variable capacitor Cv42 is connected to node N41 via switch SW7, and the other end of variable capacitor Cv42 is connected to the output terminal of operational amplifier OP42. Furthermore, the non-inverting input terminal of the operational amplifier OP42 is connected to the wiring to which the first reference potential Vref1 is supplied.

[0274] Furthermore, one end of resistor R51 is connected to the output terminal of operational amplifier OP50 of the second gain adjustment circuit 352, the other end of resistor R51 is connected to one end of capacitor C51, and the other end of capacitor C51 is connected to the inverting input terminal of operational amplifier OP42. One end of capacitor C52 is connected to the inverting input terminal of operational amplifier OP42 via switch SW8, and the other end of capacitor C52 is connected to the output terminal of operational amplifier OP42.

[0275] Inverter INV2 outputs an inverted signal of the selection signal SEL supplied from the connection state specification circuit 310 to switch SW8.

[0276] Switch SW6 turns on when the selection signal SEL is high, electrically connecting the variable capacitor Cv41 and node N41, and turns off when the selection signal SEL is low, electrically disconnecting the variable capacitor Cv41 and node N41. Switch SW7 turns on when the selection signal SEL is high, electrically connecting the variable capacitor Cv42 and node N41, and turns off when the selection signal SEL is low, electrically disconnecting the variable capacitor Cv42 and node N41. Switch SW8 turns on when the selection signal SEL is low, electrically connecting the capacitor C52 and the inverting input terminal of the operational amplifier OP42, and turns off when the selection signal SEL is high, electrically disconnecting the capacitor C52 and the inverting input terminal of the operational amplifier OP42.

[0277] For example, when the selection signal SEL is at a high level, the second filter input signal INbpf2 is maintained at a constant potential, and the first filter input signal INbpf1 is input to the inverting input terminal of the operational amplifier OP42 via the resistor R41, switch SW6, and variable capacitor Cv41. The output signal of the operational amplifier OP42 is then fed back to the inverting input terminal of the operational amplifier OP42 via the resistor R42. Furthermore, the output signal of the operational amplifier OP42 is fed back to the inverting input terminal of the operational amplifier OP42 via the variable capacitor Cv42, switch SW7, switch SW6, and variable capacitor Cv41. In this way, when the selection signal SEL is at a high level, the third filter circuit 370 functions as a multiple feedback type bandpass filter similar to the first filter circuit 344 shown in Figure 9.

[0278] Furthermore, for example, when the selection signal SEL is at a low level, the first filter input signal INbpf1 is maintained at a constant potential, and the second filter input signal INbpf2 is input to the inverting input terminal of the operational amplifier OP42 via the resistor R51 and capacitor C51. The output signal of the operational amplifier OP42 is then fed back to the inverting input terminal of the operational amplifier OP42 via the resistor R42. The output signal of the operational amplifier OP42 is also fed back to the inverting input terminal of the operational amplifier OP42 via capacitor C52 and switch SW8. In this way, when the selection signal SEL is at a low level, the third filter circuit 370 functions as a bandpass filter similar to the second filter circuit 354 shown in Figure 13.

[0279] As described above, the same effects as those of the embodiment described can be obtained in this modified example. Furthermore, in this modified example, the operational amplifier OP42 and the resistor R42 are shared between the first filter circuit 344A and the second filter circuit 354A. As a result, in this modified example, the circuit size of the detection circuit 33A can be reduced compared to the detection circuit 33.

[0280] [Second variation] In the embodiment described above, the first buffer circuit 346 may be omitted from the first test signal generation circuit 340, the second buffer circuit 356 may be omitted from the second test signal generation circuit 350, and the buffer circuit 372 may be provided downstream of the second selection circuit 360. Alternatively, the first gain adjustment circuit 342, the first buffer circuit 346, the second gain adjustment circuit 352, and the second buffer circuit 356 may be omitted, and a gain adjustment circuit similar to the first gain adjustment circuit 342 and a buffer circuit 372 may be provided downstream of the second selection circuit 360. Furthermore, in the modified example described above, the first gain adjustment circuit 342 and the second gain adjustment circuit 352 may be omitted, and a gain adjustment circuit similar to the first gain adjustment circuit 342 may be provided between the third filter circuit 370 and the buffer circuit 372.

[0281] As described above, the same effects as those of the embodiments and modifications described can be obtained in this modified example. Furthermore, in this modified example, the first buffer circuit 346 and the like are omitted, so the circuit size of the detection circuit 33 or 33A can be reduced.

[0282] [Third variation] In the embodiments and modifications described above, the second test signal generation circuit 350 may be omitted. For example, the second reference potential generation circuit 336, the second switching circuit 337, and the negative OR circuit NOR2 included in the first selection circuit 330, the second test signal generation circuit 350, and the second selection circuit 360 may be omitted from the detection circuit 33. In this modification as well, the same effects as the embodiments and modifications described above can be obtained, except for the effect obtained by switching the mode when determining the state of the discharge unit D.

[0283] [Fourth variation] In the embodiments and modifications described above, the first selection circuit 330 may be omitted. In this modification as well, the same effects as the embodiments and modifications described above can be obtained, except for the effects obtained by the first selection circuit 330.

[0284] [Fifth variation] In the above-described embodiments and modifications, in one printing operation, the number of times of determining the state of the ejection unit D in the first mode may be more than the number of times of determining the state of the ejection unit D in the second mode. Also in this modification, the same effects as those of the above-described embodiments and modifications can be obtained. In the first mode, since the time allocated for detecting the residual vibration of the ejection unit D can be shortened, even if the number of times of determining the state of the ejection unit D in the first mode is large, it does not significantly affect the reduction of printing efficiency.

[0285] [Sixth Modification Example] In the above-described embodiments and modifications, the case where the first inspection signal Vd1 indicating a pseudo-residual vibration signal is generated based on the residual vibration of the ejection unit D for more than one-quarter cycle and less than one cycle is exemplified. However, the present invention is not limited to such a mode. For example, the first inspection signal Vd1 may be generated based on the residual vibration of one cycle of the ejection unit D, and the second inspection signal Vd2 may be generated based on the residual vibration longer than one cycle of the ejection unit D. Also in this modification, the same effects as those of the above-described embodiments and modifications can be obtained.

[0286] [Seventh Modification Example] In the above-described embodiments and modifications, the case where the piezoelectric element PZ is displaced in the Z1 direction when the potential of the individual drive signal Vin[m] changes from a low potential to a high potential is exemplified. However, the present invention is not limited to such a mode. For example, a piezoelectric element PZ that is displaced in the Z1 direction may be used when the potential of the individual drive signal Vin[m] changes from a high potential to a low potential. In this case, for example, the potential of the drive signal COM changes from a low potential to a high potential in the portion corresponding to the expansion element and changes from a high potential to a low potential in the portion corresponding to the contraction element. Also in this modification, the same effects as those of the above-described embodiments and modifications can be obtained.

[0287] [Eighth Modification Example] In the embodiments and modifications described above, the case in which each head unit 3 has one nozzle row NL is illustrated, but the present invention is not limited to such embodiments. For example, each head unit 3 may have multiple nozzle rows NL. In this modification as well, the same effects as in the embodiments and modifications described above can be obtained.

[0288] [9th variation] The embodiments and modifications described above illustrate the case where the inkjet printer 1 has four head units 3, but the present invention is not limited to such embodiments. For example, the inkjet printer 1 may have one to three head units 3, or five or more head units 3. Alternatively, the inkjet printer 1 may have one to three head units 3A, or five or more head units 3A.

[0289] [10th variation] In the embodiments and modifications described above, the first filter circuit 344 is exemplified as a multiple feedback type bandpass filter, but the present invention is not limited to such embodiments. For example, the first filter circuit 344 may be a filter circuit with changing group delay characteristics, such as a Butterworth type or a Chebyshev type. In this modification as well, the same effects as in the embodiments and modifications described above can be obtained.

[0290] [3. Addendum] From the forms exemplified above, for example, the following configuration can be understood.

[0291] A liquid dispensing device according to Embodiment 1, which is a preferred embodiment, comprises: a drive signal generation unit that generates a drive signal; a dispensing unit that includes a nozzle, a piezoelectric element driven by the drive signal, and a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element; a signal generation unit that receives a residual vibration signal generated due to vibrations remaining in the dispensing unit after the piezoelectric element has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal; and a determination unit that determines the state of the dispensing unit based on the pseudo-residual vibration signal, wherein the signal generation unit includes a filter circuit that generates the pseudo-residual vibration signal, and the filter circuit includes a variable resistor unit whose resistance value can be adjusted. According to Embodiment 1, it is possible to suppress the length of the unit period, which is the period for driving the discharge unit, from becoming longer. Furthermore, according to Embodiment 1, the characteristics of the pseudo-residual vibration signal can be adjusted by adjusting the resistance value of the variable resistor.

[0292] In the liquid dispensing device according to Embodiment 2, which is a specific example of Embodiment 1, the filter circuit includes a variable capacitor whose capacitance value can be adjusted. According to embodiment 2, the characteristics of the pseudo-residual vibration signal can be adjusted by adjusting the capacitance value of the variable capacitor.

[0293] In the liquid discharge device according to Embodiment 3, which is a specific example of Embodiment 1, the filter circuit further includes a differential amplifier including a first input terminal and a second input terminal to which a reference potential is supplied; a first resistor to which the residual vibration signal is supplied and the other end is electrically connected to a first node; a second resistor to which one end is connected to the first input terminal and the other end is electrically connected to the output terminal of the differential amplifier; a first capacitor to which one end is electrically connected to the first node and the other end is connected to the first input terminal; and a second capacitor to which one end is electrically connected to the first node and the other end is electrically connected to the output terminal of the differential amplifier, wherein the variable resistor section has one end electrically connected to the first node and the other end to which the reference potential is supplied, and at least one of the first capacitor and the second capacitor is a variable capacitor whose capacitance value can be adjusted. According to embodiment 3, a pseudo-residual vibration signal of one or more periods can be generated based on a residual vibration signal of less than one period. Furthermore, according to embodiment 3, the filter circuit that generates the pseudo-residual vibration signal can be constructed with a simple circuit.

[0294] In the liquid dispensing device according to Embodiment 4, which is a specific example of Embodiment 3, the resistance value of the first resistor is equal to the resistance value of the second resistor. According to Embodiment 4, it is possible to suppress the complexity of designing the filter circuit that generates the pseudo-residual vibration signal, and adjusting the amplitude of the pseudo-residual vibration signal.

[0295] In the liquid dispensing device according to Embodiment 5, which is a specific example of Embodiment 3 or 4, both the first capacitor and the second capacitor are variable capacitors whose capacitance values ​​can be adjusted, and the adjusted capacitance value of the first capacitor is equal to the adjusted capacitance value of the second capacitor. According to embodiment 5, it is possible to suppress the complexity of designing the filter circuit that generates the pseudo-residual vibration signal and adjusting the period of the pseudo-residual vibration signal.

[0296] In the liquid dispensing device according to embodiment 6, which is a specific example of any one embodiment from embodiments 2 to 5, the period of the pseudo-residual vibration signal is changed by adjusting the capacitance value of the variable capacitor. According to embodiment 6, the period of the pseudo-residual vibration signal generated by the filter circuit can be adjusted by adjusting the capacitance value of the variable capacitor.

[0297] In the liquid dispensing device according to Embodiment 7, which is a specific example of any one of Embodiments 1 to 6, the amplitude of the pseudo-residual vibration signal is changed by adjusting the resistance value of the variable resistor. According to embodiment 7, the period of the pseudo-residual vibration signal generated by the filter circuit can be adjusted by adjusting the resistance value of the variable resistor.

[0298] In the liquid dispensing device according to Embodiment 8, which is a specific example of any one embodiment from Embodiments 1 to 7, the period of the residual vibration signal input to the filter circuit is 1 / 4 of a period or more and less than 1 period, and the period of the pseudo-residual vibration signal output from the filter circuit is 1 period or more. According to embodiment 8, the state of the discharge section can be accurately determined while shortening the length of the unit period.

[0299] In the liquid dispensing device according to embodiment 9, which is a specific example of any one embodiment from embodiments 1 to 8, the signal generation unit includes a low-pass filter, and the residual vibration signal is input to the filter circuit via the low-pass filter. According to embodiment 9, it is possible to suppress the generation of distortion in the pseudo-residual vibration signal.

[0300] In the liquid dispensing device according to embodiment 10, which is a specific example of any one embodiment from embodiments 1 to 9, the determination unit determines the viscosity state of the liquid in the dispensing unit. According to embodiment 10, it is possible to suppress an increase in the time required to determine the viscosity state of the liquid in the discharge section.

[0301] Furthermore, the liquid discharge head according to embodiment 11, which is a preferred embodiment, comprises a discharge section including a nozzle, a piezoelectric element driven by a drive signal, and a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element, and a signal generation section that receives a residual vibration signal generated due to vibrations remaining in the discharge section after the piezoelectric element has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal as a signal for determining the state of the discharge section, wherein the signal generation section includes a filter circuit that generates the pseudo-residual vibration signal, and the filter circuit includes a variable resistor section whose resistance value can be adjusted. According to embodiment 11, the same effects as in embodiment 1 can be obtained.

[0302] In the liquid discharge head according to Embodiment 12, which is a specific example of Embodiment 11, the filter circuit includes a variable capacitor whose capacitance value can be adjusted. According to embodiment 12, the same effects as in embodiment 2 can be obtained.

[0303] In the liquid discharge head according to Embodiment 13, which is a specific example of Embodiment 11, the filter circuit further includes a differential amplifier including a first input terminal and a second input terminal to which a reference potential is supplied; a first resistor to which the residual vibration signal is supplied and the other end is electrically connected to a first node; a second resistor to which one end is connected to the first input terminal and the other end is electrically connected to the output terminal of the differential amplifier; a first capacitor to which one end is electrically connected to the first node and the other end is connected to the first input terminal; and a second capacitor to which one end is electrically connected to the first node and the other end is electrically connected to the output terminal of the differential amplifier, wherein the variable resistor has one end electrically connected to the first node and the other end to which the reference potential is supplied, and at least one of the first capacitor and the second capacitor is a variable capacitor whose capacitance value can be adjusted. According to embodiment 13, the same effects as in embodiment 3 can be obtained.

[0304] In the liquid discharge head according to Embodiment 14, which is a specific example of Embodiment 13, the resistance value of the first resistor is equal to the resistance value of the second resistor. According to embodiment 14, the same effects as in embodiment 4 can be obtained.

[0305] In the liquid discharge head according to embodiment 15, which is a specific example of embodiment 13 or 14, both the first capacitor and the second capacitor are variable capacitors whose capacitance values ​​can be adjusted, and the adjusted capacitance value of the first capacitor is equal to the adjusted capacitance value of the second capacitor. According to embodiment 15, the same effects as in embodiment 5 can be obtained.

[0306] In the liquid discharge head according to embodiment 16, which is a specific example of any one embodiment from embodiments 12 to 15, the period of the pseudo-residual vibration signal is changed by adjusting the capacitance value of the variable capacitor. According to embodiment 16, the same effects as in embodiment 6 can be obtained.

[0307] In the liquid discharge head according to embodiment 17, which is a specific example of any one embodiment from embodiments 11 to 16, the amplitude of the pseudo-residual vibration signal is changed by adjusting the resistance value of the variable resistor. According to embodiment 17, the same effects as in embodiment 7 can be obtained.

[0308] In the liquid discharge head according to embodiment 18, which is a specific example of any one embodiment from embodiments 11 to 17, the period of the residual vibration signal input to the filter circuit is 1 / 4 of a period or more and less than 1 period, and the period of the pseudo-residual vibration signal output from the filter circuit is 1 period or more. According to embodiment 18, the same effects as in embodiment 8 can be obtained.

[0309] In the liquid discharge head according to embodiment 19, which is a specific example of any one embodiment from embodiments 11 to 18, the signal generation unit includes a low-pass filter, and the residual vibration signal is input to the filter circuit via the low-pass filter. According to embodiment 19, the same effects as in embodiment 9 can be obtained.

[0310] In the liquid dispensing head according to embodiment 20, which is a specific example of any one embodiment from embodiments 11 to 19, the pseudo-residual vibration signal is used to determine the viscosity of the liquid in the dispensing section. According to embodiment 20, the same effects as in embodiment 10 can be obtained. [Explanation of symbols]

[0311] 1...Inkjet printer, 2...Control unit, 3...Head unit, 4...Drive signal generation unit, 6...Inspection unit, 7...Transport unit, 8...Maintenance unit, 22...Drive control unit, 31...Switching circuit, 32...Recording head, 33...Detection circuit, 312...High-pass filter circuit, 330...First selection circuit, 332...Reference potential generation circuit, 334...First reference potential generation circuit, 335...First switching circuit, 336...Second reference potential generation circuit, 337 ...Second switching circuit, 340...First test signal generation circuit, 342...First gain adjustment circuit, 343...Low-pass filter circuit, 344, 344A...First filter circuit, 346...First buffer circuit, 350...Second test signal generation circuit, 352...Second gain adjustment circuit, 354, 354A...Second filter circuit, 356...Second buffer circuit, 360...Second selection circuit, 370...Third filter circuit, 372...Buffer circuit, D...Discharge unit, N...Nozzle.

Claims

1. A drive signal generation unit that generates a drive signal, A nozzle, a piezoelectric element driven by the drive signal, and a discharge section including a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element, A signal generation unit receives a residual vibration signal generated due to vibrations remaining in the discharge section after the piezoelectric element has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal. A determination unit that determines the state of the discharge unit based on the pseudo-residual vibration signal, Equipped with, The signal generation unit, Includes a filter circuit that generates the pseudo-residual vibration signal, The aforementioned filter circuit is Includes a variable resistor section with adjustable resistance, A liquid dispensing device characterized by the following features.

2. The aforementioned filter circuit is Includes a variable capacitor with adjustable capacitance value, The liquid dispensing device according to feature 1.

3. The aforementioned filter circuit is A differential amplifier including a first input terminal and a second input terminal to which a reference potential is supplied, A first resistor to which the residual vibration signal is supplied at one end and which is electrically connected to the first node at the other end, A second resistor, one end of which is connected to the first input terminal and the other end of which is electrically connected to the output terminal of the differential amplifier, A first capacitor, one end of which is electrically connected to the first node and the other end of which is connected to the first input terminal, A second capacitor, one end of which is electrically connected to the first node and the other end of which is electrically connected to the output terminal of the differential amplifier, It further includes, The variable resistor section has one end electrically connected to the first node and the other end supplied with the reference potential. At least one of the first capacitor and the second capacitor is a variable capacitor whose capacitance value can be adjusted. The liquid dispensing device according to feature 1.

4. The resistance value of the first resistor is equal to the resistance value of the second resistor. The liquid dispensing device according to feature 3.

5. Both the first capacitor and the second capacitor are variable capacitors whose capacitance value can be adjusted. The adjusted capacitance value of the first capacitor is equal to the adjusted capacitance value of the second capacitor. The liquid dispensing device according to feature 3.

6. By adjusting the capacitance value of the variable capacitor, the period of the pseudo-residual vibration signal changes. The liquid dispensing device according to feature 2.

7. By adjusting the resistance value of the variable resistor, the amplitude of the pseudo-residual vibration signal changes. The liquid dispensing device according to feature 1.

8. The period of the residual vibration signal input to the filter circuit is one-quarter of a period or more and less than one period. The period of the pseudo-residual vibration signal output from the filter circuit is one period or more. The liquid dispensing device according to feature 1.

9. The signal generation unit includes a low-pass filter, The residual vibration signal is input to the filter circuit via the low-pass filter. A liquid dispensing device according to any one of claims 1 to 8.

10. The determination unit determines the viscosity state of the liquid in the discharge unit. A liquid dispensing device according to any one of claims 1 to 8.

11. A nozzle, a piezoelectric element driven by a drive signal, and a discharge section including a pressure chamber that discharges liquid from the nozzle in response to the driving of the piezoelectric element, A signal generation unit receives a residual vibration signal generated due to vibrations remaining in the discharge section after the piezoelectric element has been driven, and generates a pseudo-residual vibration signal corresponding to the residual vibration signal as a signal for determining the state of the discharge section. Equipped with, The signal generation unit, Includes a filter circuit that generates the pseudo-residual vibration signal, The aforementioned filter circuit is Includes a variable resistor section with adjustable resistance, A liquid dispensing head characterized by the following features.

12. The aforementioned filter circuit is Includes a variable capacitor with adjustable capacitance value, The liquid dispensing head according to feature 11.

13. The aforementioned filter circuit is A differential amplifier including a first input terminal and a second input terminal to which a reference potential is supplied, A first resistor to which the residual vibration signal is supplied at one end and which is electrically connected to the first node at the other end, A second resistor, one end of which is connected to the first input terminal and the other end of which is electrically connected to the output terminal of the differential amplifier, A first capacitor, one end of which is electrically connected to the first node and the other end of which is connected to the first input terminal, A second capacitor, one end of which is electrically connected to the first node and the other end of which is electrically connected to the output terminal of the differential amplifier, It further includes, The variable resistor section has one end electrically connected to the first node and the other end supplied with the reference potential. At least one of the first capacitor and the second capacitor is a variable capacitor whose capacitance value can be adjusted. The liquid dispensing head according to feature 11.

14. The resistance value of the first resistor is equal to the resistance value of the second resistor. The liquid dispensing head according to feature 13.

15. Both the first capacitor and the second capacitor are variable capacitors whose capacitance value can be adjusted. The adjusted capacitance value of the first capacitor is equal to the adjusted capacitance value of the second capacitor. The liquid dispensing head according to feature 13.

16. By adjusting the capacitance value of the variable capacitor, the period of the pseudo-residual vibration signal changes. The liquid dispensing head according to feature 12.

17. By adjusting the resistance value of the variable resistor, the amplitude of the pseudo-residual vibration signal changes. The liquid dispensing head according to feature 11.

18. The period of the residual vibration signal input to the filter circuit is one-quarter of a period or more and less than one period. The period of the pseudo-residual vibration signal output from the filter circuit is one period or more. The liquid dispensing head according to feature 11.

19. The signal generation unit includes a low-pass filter, The residual vibration signal is input to the filter circuit via the low-pass filter. A liquid dispensing head according to any one of claims 11 to 18.

20. The aforementioned pseudo-residual vibration signal is used to determine the viscosity state of the liquid in the discharge section. A liquid dispensing head according to any one of claims 11 to 18.

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