Semiconductor processing system, and related methods for forming superlattice structures using the semiconductor processing system.

Abstract

A method and apparatus for material layer deposition in semiconductor manufacturing systems are provided. [Solution] The controller may place the substrate on a substrate support. The first gas-phase reactant may be provided at the first inlet, and the second gas-phase reactant may be provided to a remote plasma unit capable of decomposing at least a portion of the precursor. The silicon-containing epitaxial material layer may be deposited on the substrate using the decomposition products.

Description

Technical Field

[0001] The present disclosure generally relates to deposition methods and systems. More particularly, the present disclosure relates to a semiconductor manufacturing system configured to perform a plasma-assisted epitaxial deposition process.

Background Art

[0002] In plasma-assisted chemical vapor deposition, an epitaxial layer (e.g., a material layer) can be deposited on a substrate such as a silicon wafer. After the generation of excited species by a plasma generation device, a chemical reaction can occur in the reaction chamber, and one or more reactants can react and / or decompose on the substrate surface to produce a material layer.

[0003] To facilitate the occurrence of a chemical reaction, conventional systems may attempt to increase the temperature at which deposition occurs. However, such approaches require significant energy consumption and / or exceed the thermal budget of certain semiconductor materials on the substrate, thereby causing undesirable effects such as instability and chamber coating. As a result, conventional systems lack a mechanism to balance growth rate and heat consumption, thereby limiting the ability to control precursor deposition and provide optimal performance, throughput, and energy consumption in semiconductor manufacturing processes.

[0004] Any discussion, including the discussion of problems and solutions described in this section, is included in this disclosure only for the purpose of providing background to the present disclosure, and none or all of the discussions should be regarded as an admission that any of them was known at the time the present invention was made or that they otherwise constitute prior art.

Summary of the Invention

Means for Solving the Problems

[0005] This summary introduces the selected concepts in a simplified form, which are described in more detail below. This summary is not necessarily intended to identify the main or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0006] Various embodiments provided include a semiconductor processing system comprising: a chamber body having an upper wall and a lower wall, wherein the upper wall extends longitudinally between an injection end and a discharge end opposite the longitudinal side, and the lower wall is below and parallel to the upper wall; a substrate support configured to support a substrate and positioned inside the chamber body between the injection end and the discharge end; a first inlet coupled to the chamber body and configured to introduce a first gas-phase reactant into the chamber body; a second inlet coupled to the chamber body and located away from the first inlet, configured to introduce a plasma-generating reactant into the chamber body; a remote plasma unit having a plasma outlet coupled to the second inlet and configured to generate a plasma-generating reactant by decomposing a second gas-phase reactant; and an isolation member positioned between the first inlet and the second inlet and configured to isolate the first gas-phase reactant from the plasma-generating reactant until the first gas-phase reactant and the plasma-generating reactant are in close proximity to the substrate support.

[0007] In some embodiments, the first inlet includes an injection flange connected to the injection end of the chamber body.

[0008] In some embodiments, the injection flange comprises a plurality of injection ports disposed on the front surface of the injection flange, and a plurality of flow controllers configured to control the flow of a first gas-phase reactant from a precursor source to the plurality of injection ports and through them into the interior of the chamber body.

[0009] In some embodiments, the second inlet is located between the injection flange and the substrate support.

[0010] In some embodiments, the second inlet is located on the lower wall of the chamber body.

[0011] In some embodiments, the isolation member extends from the injection flange into the interior of the chamber body toward the substrate support.

[0012] In some embodiments, the isolation member includes an opaque material.

[0013] In some embodiments, the isolation member is positioned vertically above the substrate support.

[0014] In some embodiments, the isolation member is angled toward the substrate support.

[0015] In some embodiments, the precursor source includes a silicon precursor in fluid communication with the precursor inlet of a remote plasma unit, and the plasma-generated reactants include a plurality of high-energy silicon species.

[0016] In some embodiments, the remote plasma unit includes an inductively coupled plasma source or a microwave plasma source.

[0017] In some embodiments, the semiconductor processing system further comprises a discharge flange connected to the discharge end of the chamber body, and a vacuum pump coupled to the discharge flange and through it to a remote plasma unit.

[0018] In some embodiments, the chamber body has a plurality of external ribs that extend laterally around the outside of the chamber body and are spaced longitudinally apart from each other between the injection end and the discharge end on the opposite longitudinal side of the chamber body.

[0019] In some embodiments, the semiconductor processing system further comprises a heater element array supported outside the chamber body and optically coupled to a substrate support and an isolation member, the heater element array comprising a plurality of lower linear lamps supported below the chamber body and optically coupled to the substrate support and isolation member by the quartz material forming the chamber body, and a plurality of upper linear lamps supported above the chamber body and optically coupled to the substrate support and isolation member by the quartz material forming the chamber body.

[0020] In some embodiments, the semiconductor processing system further comprises a processor and a controller including a memory on which instructions are recorded, which, when read by the processor, cause the processor to perform the following actions: to place a substrate on a substrate support; to provide a germanium precursor to an injection flange; to provide a silicon precursor to a remote plasma unit; to use the remote plasma unit to decompose at least a portion of the silicon precursor to generate plasma-generated reactants; and to deposit one or more epitaxial silicon-containing layers on the substrate by combining the germanium precursor with the plasma-generated reactants produced using the decomposition products generated from the silicon precursor, wherein the deposition of one or more epitaxial silicon-containing layers is an isothermal deposition process.

[0021] Various embodiments provided are methods for forming a superlattice structure on a substrate, comprising: a chamber body having an upper wall and a lower wall, wherein the upper wall extends longitudinally between an injection end and a discharge end opposite the longitudinal end, and the lower wall is below and parallel to the upper wall; and epitaxially depositing the superlattice structure on a substrate supported on a substrate support disposed inside the chamber body between the injection end and the discharge end, wherein the superlattice structure comprises two unit double layers or repeating unit double layers, each unit double layer comprising an epitaxial silicon layer and an adjacent epitaxial silicon germanium layer, and the deposition of each unit double layer of the superlattice structure comprises carrying out two or more epitaxial deposition supercycles, wherein each deposition supercycle deposits an epitaxial silicon layer by carrying out a first epitaxial deposition process, the first epitaxial deposition process through a second inlet coupled to the chamber body and separated from a first inlet The present invention relates to the deposition of an epitaxial silicon layer, which includes introducing a plasma generating reactant, wherein the plasma generating reactant is produced by introducing a second gas-phase reactant containing a silicon precursor into a remote plasma unit configured to generate the plasma generating reactant, and depositing an epitaxial silicon germanium layer on the epitaxial silicon layer by carrying out a second epitaxial deposition process, wherein the second epitaxial deposition process involves introducing a first gas-phase reactant containing a germanium precursor into the chamber body through a first inlet coupled to the chamber body, and introducing a plasma generating reactant into the chamber body through a second inlet coupled to the chamber body and separated from the first inlet, wherein the plasma generating reactant is produced by introducing a second gas-phase reactant containing a silicon precursor into a remote plasma unit configured to generate the plasma generating reactant, and the first gas-phase reactant and the plasma generating reactant areDepositing an epitaxial silicon germanium layer, including isolating the first gas-phase reactant and the plasma-generating reactant from each other by using a separating member positioned between the first inlet and the second inlet until close to the substrate support.

[0022] In some embodiments, epitaxially depositing a superlattice structure includes an isothermal epitaxial deposition process.

[0023] In some embodiments, the first inlet includes an injection flange connected to the injection end of the chamber body, the injection flange including a plurality of injection ports disposed on the front surface of the injection flange and a plurality of flow rate controllers configured to control the flow of the first gas-phase reactant from the precursor source to the plurality of injection ports and through them into the interior of the chamber body.

[0024] In some embodiments, the second inlet is disposed on the lower wall of the chamber body between the injection flange and the substrate support.

[0025] In some embodiments, the separating member includes an opaque material.

[0026] <000009​​​​All of these embodiments are intended to be within the scope of the invention disclosed herein. These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of certain embodiments, with reference to the accompanying drawings, but the invention is not limited to any particular embodiment disclosed.

[0028] To easily identify the consideration of any particular element or action, the most significant digit of the reference number refers to the figure number in which the element is first introduced.

[0029] A more complete understanding of embodiments of the present disclosure can be obtained by referring to the detailed description and the claims in view of the following exemplary drawings.

Brief Description of the Drawings

[0030] [Figure 1] It is a schematic diagram of a semiconductor processing system according to one or more embodiments of the present disclosure. [Figure 2] It is a cross-sectional view of a chamber arrangement configuration according to one or more embodiments of the present disclosure. [Figure 3] It is a plan view of a chamber arrangement configuration according to one or more embodiments of the present disclosure. [Figure 4] It is a diagram showing an exemplary process according to one or more embodiments of the present disclosure. [Figure 5] It is a diagram showing an exemplary process for forming a superlattice structure according to one or more embodiments of the present disclosure. [Figure 6] It is a diagram showing an exemplary sub-process for forming a superlattice structure according to one or more embodiments of the present disclosure. [Figure 7] It is a diagram showing an example of a computing device that can be used in the implementation of one or more aspects of the present disclosure.

Modes for Carrying Out the Invention

[0031] It should be understood that the elements in the figures are illustrated for simplification and clarity and are not necessarily drawn to actual size. For example, the dimensions of some elements in the figures may be exaggerated relative to others to help improve understanding of the illustrated embodiments of this disclosure.

[0032] The descriptions of exemplary embodiments of the methods and configurations provided below are illustrative only and intended for illustrative purposes. The following descriptions are not intended to limit the scope of this disclosure or the claims. Furthermore, the enumeration of numerous embodiments having the described features or steps is not intended to exclude other embodiments having additional features or steps, or other embodiments incorporating different combinations of the described features or steps.

[0033] The various embodiments provided relate, for example, to epitaxial deposition methods and semiconductor processing systems, such as plasma-assisted epitaxial chemical vapor phase systems. The semiconductor processing system may be used to process a substrate, such as a semiconductor wafer. For example, an epitaxial layer (e.g., a two-component and / or doped semiconductor layer) can be formed or grown on the surface of a substrate using the systems described herein.

[0034] Various embodiments of this disclosure include, for example, alternating epitaxial layers of silicon and silicon germanium (Si / Si x Ge 1-xThe present invention provides a semiconductor processing system and method for depositing superlattice structures including alternating epitaxial layers such as ). The exemplary semiconductor processing system provided enables the deposition of superlattice structures by an isothermal epitaxial deposition method, thereby enabling the deposition of all component layers of the superlattice structure at the same temperature or substantially the same temperature. The ability to carry out the isothermal superlattice epitaxial deposition process in the provided semiconductor processing system is made possible, at least in part, as a result of using two separate reactant inlets within a chamber body in which the substrate is supported. The two reactant inlets may be configured such that the first inlet introduces gas-phase reactants into the chamber body, and a separate second inlet introduces plasma-generated reactants into the chamber body. The first and second inlets and their associated reactants are further separated by an isolation member positioned between the first and second inlets. For example, the isolation member can maintain spatial separation between the gas-phase reactants (i.e., from the first inlet) and the plasma-generated reactants (i.e., from the second inlet) inside the chamber until both reactants are close to, adjacent to, or in contact with the substrate support on which the substrate is placed. Maintaining spatial separation between the gas-phase reactants and the plasma-generated reactants by physical separation at both the first and second inlets, in conjunction with the internal (i.e., in-situ) isolation member, prevents, or at least substantially prevents, the formation of premature reactions and reaction byproducts until they are close to the heated substrate on which the superlattice structure is to be deposited.

[0035] As used herein, the term “substrate” may refer to any substrate material, or any substrate material that can be used to form a device, circuit, or film, or on which a device, circuit, or film can be formed, by a method according to one embodiment of the present disclosure. The substrate may comprise a bulk material such as silicon (e.g., single-crystal silicon), another Group IV material such as germanium, or another semiconductor material such as a Group II-VI or Group III-V semiconductor material, and may comprise one or more layers on or beneath the bulk material. Furthermore, the substrate may comprise various shapes, such as recesses, protrusions, and the like, formed in or on at least a portion of the layers of the substrate. For example, the substrate may comprise a bulk semiconductor material and an insulating or dielectric material layer on at least a portion of the bulk semiconductor material. Furthermore, the term “substrate” may refer to any substrate material that may be used, or any substrate material on which a device, circuit, or film can be formed. The “substrate” may be continuous or discontinuous, rigid or flexible, solid or porous. The “substrate” may be in any form, such as powder, plate, or workpiece. A substrate in plate form may include wafers of various shapes and sizes. The substrate may be made from materials such as silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, and silicon carbide. A continuous substrate may extend beyond the boundary of the process chamber where the deposition process takes place, and may be moved through the process chamber so that the process continues until it reaches the end of the substrate. The continuous substrate may be supplied from a continuous substrate supply system that enables the manufacture and output of continuous substrates in any suitable form. Non-limiting examples of continuous substrates may include sheets, nonwoven films, rolls, foils, webs, flexible materials, continuous filaments, or bundles of fibers (i.e., ceramic fibers or polymer fibers). The continuous substrate may also have a carrier or sheet on which discontinuous substrates are mounted. For example, the substrate may be made of semiconductor material.The semiconductor material may include one or more of the source, drain, or channel regions of the device, or may be used to form them. The substrate may further include an interlayer dielectric (e.g., silicon dioxide) and / or high-dielectric-constant material layer overlaid on the semiconductor material. In this context, a high-dielectric-constant material (or high-k dielectric material) is a material having a dielectric constant greater than that of silicon dioxide.

[0036] The term precursor gas(s) can refer to a gas or combination of gases involved in a chemical reaction that produces another compound. For example, a precursor gas may be used to grow an epitaxial layer containing silicon germanium. The precursor gas may include a deposition gas(s), a dopant gas(s), or a combination of a deposition gas(s) and a dopant gas(s). The precursor gas may include a silicon precursor, such as a higher-order silicon precursor. The silicon precursor may further include silane (SiH4) or chlorosilane (SiCl4). In some examples, the higher-order silicon precursor may have one silicon atom per molecule, such as silane. The higher-order silicon precursor may have two or more silicon atoms per molecule, such as disilane. In some examples, the higher-order silicon precursor may have three or more silicon atoms. The higher-order silicon precursor may include non-halogenated higher-order silicon precursors, such as trisilane and tetrasilane. The higher-order silicon precursor may include halogenated higher-order silicon precursors, such as higher-order chlorine-containing precursors like chlorodisilane, dichlorosilane, trichlorosilane, and tetrachloridesilane. The precursor gas may include higher-order germanium-containing material layer precursors such as germane, digermane, trigermane, their chloride derivatives, and mixtures thereof. The precursor gas may include P-dopant higher-order precursors such as diborane (B2H6). The precursor gas may also include N-dopant higher-order precursors such as phosphine (PH3) and arsine (AsH3).

[0037] As used herein, the term “epitaxial layer” may refer to a substantially single crystalline layer directly above a substantially single crystalline substrate or layer beneath it.

[0038] As used herein, the term "chemical vapor deposition" may refer to any process by which a substrate is exposed to one or more volatile precursors / reactants (and optionally additional process gases) to cause a reaction and / or decomposition on the substrate surface to produce a desired deposition.

[0039] In its usage here, the term "silicon germanium" can refer to a semiconductor material containing silicon and germanium, and also Si 1-x Ge x It can be expressed as, where 0 ≤ x ≤ 1, or 0.1 ≤ x ≤ 0.8, or 0.2 ≤ x ≤ 0.6, or it may be a material comprising silicon and germanium having the composition described herein. Furthermore, the term “silicon germanium” can be expressed as SiGe, and when the above silicon germanium is doped with a boron dopant, it can be further expressed as SiGe:B. Similarly, a silicon material doped with a boron dopant can be expressed as Si:B.

[0040] The following descriptions of various embodiments refer to the accompanying drawings, which form part of this specification, illustrating various embodiments in which the aspects of the disclosure may be carried out. It should be understood that other embodiments may be used and structural and functional modifications may be made without departing from the scope of this disclosure. Other embodiments of the aspects of this disclosure are possible and can be carried out or performed in various ways. It should also be understood that the expressions and terms used herein are for illustrative purposes only and should not be considered limiting. Rather, the words and terms used herein are given the broadest interpretation and meaning. The use of “including” and “comprising” and their variations means encompassing the articles and their equivalents listed thereafter, as well as any additional articles and equivalents thereafter. Various directional arrows are shown in the figures of this disclosure, but the directional arrows are not intended to limit the communication to the extent that bidirectional communication is excluded. Rather, the directional arrows indicate the general flow of steps, rather than the unidirectional movement of information. Throughout this specification, where an element is referred to as “comprising” or “including” another element, the element should not be understood to exclude the other element unless otherwise stated in particular. An element may include at least one other element. Throughout this specification, expressions such as “at least one of a, b, and c” may include “a only,” “b only,” “c only,” “a and b,” “a and c,” “b and c,” and / or “all of a, b, and c.”

[0041] Figure 1 shows a semiconductor processing system 100. According to an example of this disclosure, the semiconductor processing system 100 may include a gas source assembly 102, a remote plasma unit 104, a chamber arrangement configuration 106, an exhaust assembly 108, and a controller 110.

[0042] The gas source assembly 102 is constructed and positioned to supply process gas to the chamber configuration 106. The process gas may include one or more gas-phase reactants, either as a single gas or as a mixture of gases including, but not limited to, precursor gases, dopant gases, etchant gases, and inert gases (e.g., purge gas, carrier gas). The gas source assembly 102 may include various systems and components (not shown) for generating and controlling the flow of one or more gas-phase reactants from the gas source contained therein to the process gas output 112 of the gas source assembly 102 and onto the chamber configuration 106. For example, the gas source assembly 102 may include a precursor source 114 that comprises several precursor sources for supplying gas-phase reactants to the chamber configuration 106 and / or a remote plasma unit 104. In some embodiments, the precursor source 114 includes a silicon source containing one or more silicon precursors and a germanium source 116 containing one or more germanium precursors.

[0043] In an example of the present disclosure, the gas source assembly 102 can be configured to provide a first gas-phase reactant from a precursor source 114 to a chamber configuration 106. In such an example, the first gas-phase reactant may include one or more precursors and additional gases such as a dopant, etchant, or carrier gas. In such an embodiment, the first gas-phase reactant is supplied to the chamber configuration 106 and introduced in the form of vapor into the chamber body 118 by a first inlet 120.

[0044] In some embodiments, the gas source assembly 102 can be configured to supply a second gas-phase reactant from a precursor source 114 to a remote plasma unit 104. In such embodiments, the remote plasma unit 104 can be used to generate a plasma-generating reactant by excitation of the second gas-phase reactant. The plasma-generating reactant can then be supplied to a chamber configuration 106. In such examples, the second gas-phase reactant may include one or more precursors and additional gases such as dopants, etchants, and carrier gases. In certain examples, the second gas-phase reactant may include a silicon precursor. In various embodiments, the second gas-phase reactant is supplied to a remote plasma unit 104 from which the plasma-generating reactant is generated and subsequently introduced into the chamber body 118 by a second inlet 122.

[0045] The precursor source 114 component of the gas source assembly 102 may include a silicon source 124. The silicon source 124 is a structure that provides a flow of silicon precursor (not shown in Figure 1) to the chamber configuration 106 and / or the remote plasma unit 104. The silicon source 124 may be connected to the remote plasma unit 104 via a flow controller (not shown in Figure 1) to deliver the silicon precursor to the remote plasma unit 104. The silicon source 124 may be further configured to provide a flow of silicon precursor to the chamber configuration 106 directly and / or via the remote plasma unit 104.

[0046] In some embodiments, the silicon source 124 may include a silicon precursor having one silicon atom per molecule, such as silane (SiH4) or monochlorosilane (ClH3Si). Alternatively (or additionally), the silicon precursor may include higher-order silicon precursors, such as silicon precursors having two or more silicon atoms per molecule, or three or more silicon atoms per molecule, in certain examples. The higher-order silicon precursors may include non-halogenated higher-order silicon precursors, such as trisilane and tetrasilane. The higher-order silicon precursors may include halogenated higher-order silicon precursors, such as higher-order chlorine-containing precursors, such as chlorodisilane, dichlorosilane, trichlorosilane, and tetrachlorosilane.

[0047] In some embodiments, the silicon source 124 may include silane and / or halosilane. In some embodiments, the silicon precursor may include a silicon hydride precursor. In such embodiments, the silicon hydride precursor may be silane (SiH4), disilane (Si2H6), trisilane (Si3H8), and tetrasilane (Si4H 10 ) can be selected from the group consisting of ). In further embodiments, the silicon precursor may include a silicon halide precursor. In such examples, the silicon halide precursor may include a silicon chloride precursor selected from the group consisting of monochlorosilane (MCS), dichlorosilane (DCS), trichlorosilane (TCS), hexachlorodisilane (HCDS), octachlorotrisilane (OCTS), and tetrachlorosilane (STC). In further embodiments, the silicon precursor may include a silicon iodide precursor. In such examples, the silicon halide precursor may include a silicon iodide precursor selected from the group consisting of monoiodosilane, diiodosilane, triiodosilane, and tetraiodosilane.

[0048] The precursor source 114 component of the gas source assembly 102 may further comprise a germanium source 116. The germanium source 116 may be a structure that provides a flow of germanium precursor (not shown in Figure 1) to the chamber configuration 106 and / or the remote plasma unit 104. The germanium source 116 may be connected to the remote plasma unit 104 via a flow controller (not shown in Figure 1) to deliver the germanium precursor to the remote plasma unit 104. The germanium source 116 may be further configured to provide a flow of germanium precursor to the chamber configuration 106 directly and / or via the remote plasma unit 104.

[0049] According to examples of the present disclosure, the germanium source 116 may include a germanium precursor comprising one or more germanium halides and / or germanium compounds. In such examples, the germanium precursor may include germanium compounds such as germanium (GeH4), digermane (Ge2H6), trigermane (Ge3H8), or germylsilane (GeH6Si). In further examples, the germanium precursor may include germanium halides such as GeCl4, GeCl2, and GeCl2H2. 。

[0050] In some embodiments, the precursor source 114 may include additional precursors such as, but are not limited to, arsenic precursors, phosphorus precursors, tin precursors, and carbon precursors.

[0051] The dopant source 126 may be configured to provide a flow of dopant precursor (not shown in Figure 1) to the chamber configuration 106 and / or the remote plasma unit 104. The dopant source 126 may be connected to the remote plasma unit 104 via a flow controller and may deliver the dopant precursor to the remote plasma unit 104. The dopant source 126 may be further configured to provide a flow of dopant precursor to the chamber configuration 106 directly and / or via the remote plasma unit 104.

[0052] In some embodiments, the dopant precursor may contain phosphorus (P). The dopant precursor may also contain boron (B) and / or arsenic (As), which are still intended to be within the scope of this disclosure. In some examples, the dopant precursor may contain a P-dopant higher-order precursor such as diborane (B2H6). The dopant precursor gas may contain an N-dopant higher-order precursor such as phosphine (PH3) and arsine (AsH3). The remote plasma unit 104 may decompose at least a portion of the dopant precursor to produce a decomposed dopant precursor. A mixture of the dopant precursor and the decomposed dopant precursor may flow from the remote plasma unit 104 into the chamber configuration 106.

[0053] The carrier source may be a structure that provides a flow of carrier gas to the remote plasma unit 104, and may be additionally configured to provide a flow of carrier gas to the chamber configuration 106. The carrier gas may be configured to transport one or more precursors into the chamber configuration 106, such as silicon precursors, germanium precursors, plasma generation reactants produced by decomposed precursors from the remote plasma unit 104, and / or dopant precursors. Examples of suitable purge / carrier gases may include inert gases such as hydrogen (H2) gas, nitrogen (N2) gas, argon (Ar) gas, or helium (He) gas, and mixtures thereof.

[0054] The etchant source 128 may be a structure that provides an etchant gas, such as a halide-containing compound, and is configured to provide a flow of the halide-containing compound to the chamber configuration 106 directly and / or via the remote plasma unit 104. In some embodiments, the halide-containing compound may be introduced into the remote plasma unit 104 simultaneously with the precursor. The halide-containing compound may flow independently of the precursor, for example, to provide a purge and / or to remove condensates from within the remote plasma unit 104 or the chamber configuration 106. The halide-containing material may flow simultaneously with the carrier gas. Examples of suitable halides include chlorine (Cl), e.g., chlorine (Cl2) gas and hydrochloric acid (HCl), as well as fluorine (F), e.g., fluorine (F2) gas, nitrogen trifluoride (NF3), and hydrofluoric acid (HF).

[0055] In an example of the present disclosure, the remote plasma unit 104 is positioned between the gas source assembly 102 and the chamber arrangement configuration 106 and is fluidly connected to them. In such an example, the remote plasma unit 104 is configured to produce plasma-generating reactants from one or more precursors / gases (e.g., gas-phase reactants) supplied from the gas source assembly 102. In some embodiments, the remote plasma unit 104 is configured to produce plasma-generating reactants from one or more precursors supplied from the precursor source 114.

[0056] The remote plasma unit 104 may include a precursor inlet 132 fluidly connected to the process gas output 112 of the gas source assembly 102. The precursor inlet 132 can supply one or more of the process gases described above (e.g., silicon precursor, germanium precursor, dopant precursor, carrier gas, and etchant gas). In some embodiments, the precursor source 114 may supply a second gas-phase reactant, including a silicon precursor, to the precursor inlet 132 of the remote plasma unit 104. In such embodiments, the precursor source 114 includes a silicon precursor (i.e., from a silicon source) that is in fluid communication with the precursor inlet 132 of the remote plasma unit 104. The remote plasma unit 104 may include a plasma outlet 134 coupled to and in fluid communication with the chamber configuration 106. In some embodiments, the plasma outlet 134 is coupled to a second inlet 122 of the chamber body 118 of the chamber configuration 106. In certain examples, the second gas-phase reactant supplied to the precursor inlet 132 of the remote plasma unit 104 contains a silicon precursor. In such examples, the plasma-generated reactants output from the plasma outlet 134 of the remote plasma unit 104 include, but are not limited to, several high-energy silicon species such as silicon-containing radicals, silicon-containing metastable species, and silicon ions.

[0057] In the examples of the present disclosure, the remote plasma unit 104 may comprise an inductively coupled plasma source or a microwave plasma source. In a particular example in which the remote plasma unit 104 comprises an inductively coupled plasma source (ICP source), the ICP source may comprise a precursor conduit (not shown) connected to a precursor inlet 132, a coil (not shown) extending around the precursor conduit, and a voltage source electrically connected to the coil and configured to carry a decomposition current through the coil. The coil may be spaced apart from the chamber arrangement configuration 106 to prevent the remote plasma unit 104 from interrupting the heating of the chamber, for example, as described in more detail below.

[0058] In an example of the present disclosure, the remote plasma unit 104 may include a microwave plasma source. In such an example, the microwave plasma source may include a precursor conduit (not shown) connected to a precursor inlet 132 and a microwave source (not shown) configured to generate microwaves to decompose at least a portion of a second gas-phase reactant (e.g., a silicon precursor) provided to the remote plasma unit 104.

[0059] According to examples of this disclosure, the remote plasma unit 104 may be configured to generate plasma-generated reactants by decomposing a second gas-phase reactant, such as a silicon precursor. The remote plasma unit 104 may be connected to a precursor inlet 132 which is coupled to a chamber configuration 106 via a second inlet 122. In some embodiments, the remote plasma unit 104 may be configured to decompose at least a portion of the silicon precursor supplied to the remote plasma unit 104. The remote plasma unit 104 may decompose about 0.001% to about 90% of the silicon precursor supplied to the remote plasma unit 104. For example, about 0.001% to about 10%, or about 10% to about 20%, or about 20% to about 50%, or about 50% to about 70%, or about 70% to about 90% of the silicon precursor may be decomposed by the remote plasma unit 104 before entering the chamber configuration 106. During deposition, the silicon-containing epitaxial material layer may be deposited on a substrate using decomposition products generated from the silicon precursor.

[0060] In various embodiments, the semiconductor processing system 100 of Figure 1 includes a chamber configuration 106. In such embodiments, the chamber configuration 106 includes a chamber body 118, which will be described in more detail below with reference to Figures 2 and 3. The chamber configuration 106 may further include a substrate support 136 disposed inside the chamber body 118. In some embodiments, the substrate support 136 is configured to support the substrate 138 inside the chamber body 118. The chamber configuration 106 may further include a first inlet 120 coupled to the chamber body 118. In such embodiments, the first inlet 120 may be in fluid communication with a gas source assembly 102 and may be configured to introduce a first gas-phase reactant into the chamber body 118. For example, the flow of the first gas-phase reactant from the first inlet 120 into the chamber body 118 is shown in Figure 1 by the flow of the first reactant 142. The chamber configuration 106 may also include a second inlet 122 coupled to the chamber body 118. In these embodiments, the second inlet 122 is located away from the first inlet 120. In some embodiments, the second inlet 122 is configured to introduce the plasma-generated reactants separately into the chamber body 118. For example, the flow of plasma-generated reactants from the second inlet 122 into the chamber body 118 is shown in Figure 1 by the plasma reactant flow 144.

[0061] In various embodiments, the semiconductor processing system 100 of Figure 1 includes an isolation member 146. In such embodiments, the isolation member 146 may be positioned between a first inlet 120 and a second inlet 122. The isolation member 146 may be configured to isolate a first gas-phase reactant (such as indicated by a first reactant flow 142) from a plasma-generated reactant (such as indicated by a plasma reactant flow 144) until the first gas-phase reactant and the plasma-generated reactant are close to, adjacent to, or in contact with the substrate support 136, as will be described in detail below.

[0062] The semiconductor processing system 100 may also include a discharge assembly 108. The discharge assembly 108 may be configured to exhaust the chamber configuration 106 and may include one or more vacuum pumps 148 and / or abatement system 150. The vacuum pumps 148 may be connected to the chamber configuration 106 and may be configured to control the pressure within the chamber configuration 106. The abatement system 150 may be connected to one or more vacuum pumps 148 and may be configured to process the flow of residual precursors and / or reaction products that have flowed out of the chamber configuration 106. In some embodiments, the discharge assembly 108 may be configured to maintain environmental conditions within the chamber configuration 106 suitable for atmospheric pressure deposition operations, such as a pressure of about 600 Torr to about 760 Torr, for example, during the deposition of an epitaxial material layer on a substrate 138. In some embodiments, the discharge assembly 108 may be configured to maintain environmental conditions within the chamber body 118 suitable for depressurized deposition operations, such as during epitaxial deposition on a substrate 138 using depressurized technology, at a pressure of approximately 0.01 Torr to approximately 600 Torr.

[0063] The semiconductor processing system 100 may further include a processor and a controller 110 including a memory on which instructions are recorded, which, when an instruction is read by the processor, causes the processor to carry out a process for depositing a material layer 140 on a substrate 138.

[0064] As an example of this disclosure, Figures 2 and 3 illustrate in more detail an exemplary chamber configuration 106 of this disclosure. For example, Figure 2 shows a cross-sectional view of the exemplary chamber configuration 106, and Figure 3 shows a plan view of the exemplary chamber configuration 106. In the following description, both Figures 2 and 3 will be referenced.

[0065] According to an example of this disclosure, the chamber configuration 106 may comprise a cross-flow cold-wall epitaxial reaction chamber. The chamber configuration 106 may include a chamber body 118 and a substrate support 136. The chamber configuration 106 may include an upper heater element array 202 and a lower heater element array 204, as shown in Figure 2. While specific configurations are shown and described herein, it should be understood and acknowledged that the chamber configuration 106 may include other elements and / or exclude elements shown and described herein, and may still remain within the scope of this disclosure.

[0066] In an example of this disclosure, the chamber configuration 106 includes a chamber body 118. The chamber body 118 may include an upper wall 206 and a lower wall 208. The upper wall 206 and the lower wall 208 extend longitudinally between the injection end 212 and the longitudinally opposite discharge end 214, at least partially defining the chamber interior 216. Furthermore, the lower wall 208 is below and parallel to the upper wall 206. In a particular example, the chamber body 118 may be formed from a ceramic material such as sapphire or quartz. The chamber body 118 may include a plurality of outer ribs 210. The plurality of outer ribs 210 extend laterally around the outside of the chamber body 118 and may be longitudinally spaced between the injection end 212 and the discharge end 152 of the chamber body 118. Also, in a particular example, it is intended that the chamber body 118 may not include ribs.

[0067] In an example of the present disclosure, the chamber body 118 includes a first inlet 120 coupled to the chamber body 118. In such an example, the first inlet 120 can be configured to receive a first gas-phase reactant (supplied from the gas source assembly 102 in Figure 1) and then inject the first gas-phase reactant into the chamber interior 216 of the chamber body 118. For example, the flow of the first gas-phase reactant from the first inlet 120 into the chamber interior 216 of the chamber body 118 is shown by the exemplary flow of the first reactant 142.

[0068] In some embodiments, the first inlet 120 comprises an injection flange 218 coupled to the injection end 212 of the chamber body 118. In such embodiments, the injection flange 218 may comprise a front surface 222 coupled to the injection end 212 of the chamber body. In some embodiments, the injection flange 218 includes a plurality of injection ports (as shown by the exemplary injection port 308 in Figure 3) disposed on the front surface 222 of the injection flange 218. In various examples, the injection flange 218 may further comprise a plurality of flow controllers 302 configured to control the flow of the first gas-phase reactant from the gas source assembly 102 in Figure 1 to the plurality of injection ports 308 and through them to the chamber interior 216 of the chamber body 118.

[0069] According to examples of the present disclosure, the injection flange 218 may comprise a gas distribution assembly 304 (as illustrated in Figure 3) comprising one or more (e.g., multiple) precursor gas lines 306 that can be coupled to the gas source assembly 102 in Figure 1. According to examples of the present disclosure, each of the plurality of precursor gas lines 306 is coupled to a flow controller 302. In various embodiments, each of the plurality of precursor gas lines 306 is coupled to a flow controller 302. The flow controller 302 enables independent control of the flow (e.g., flow rate) of each gas to the injection port on the front surface 222 of the injection flange 218. The flow controller 302 may include any suitable automatic or manual valves that can control the flow rate of gas to each gas channel disposed within the injection flange 218. In Figure 3, the injection flange 218 is shown to include nine (9) precursor gas lines 306, nine (9) corresponding flow controllers 302, and nine (9) injection ports, but the injection flange 218 may include any preferred number of injection ports (as well as associated precursor gas lines and flow controllers). In some embodiments, the injection flange 218 may comprise one to ten injection ports 308 supplied from one to ten precursor gas lines 306 (via the corresponding flow controllers 302). In some embodiments, the injection flange 218 may comprise fewer than ten injection ports, as well as corresponding precursor lines and flow controllers; fewer than eight injection ports, as well as corresponding precursor lines and flow controllers; fewer than five injection ports, as well as corresponding precursor lines and flow controllers; or fewer than three injection ports, as well as corresponding precursor lines and flow controllers.

[0070] In an example of the present disclosure, the chamber body 118 includes a second inlet 122 coupled to the chamber body. For example, the second inlet 122 can be configured to introduce plasma-generated reactants into the chamber interior 216 of the chamber body 118.

[0071] In some embodiments of this disclosure, with reference to Figures 2 and 3, the second inlet 122 may be separated from the first inlet 120. In such embodiments, the second inlet 122 may be physically separated from the first inlet 120. In some embodiments, the second inlet 122 may be separated vertically from the first inlet 120 by positioning the second inlet 122 below the first inlet 120. In some embodiments, the second inlet 122 may be separated vertically from the first inlet 120 by positioning the second inlet 122 above the first inlet 120 (not shown). In some embodiments, the second inlet 122 may be separated both vertically and horizontally from the first inlet 120, as shown in Figure 2. As used herein, the horizontal direction (or horizontal distance) may refer to a direction / distance parallel to the longitudinal orientation of the chamber body 118 (as indicated by arrow 224), and the vertical direction (or vertical distance) may refer to a distance / direction perpendicular to the longitudinal orientation of the chamber body 118. In some embodiments, the second inlet 122 is perpendicular to the first inlet 120. In some embodiments, the second inlet 122 is perpendicular to the first inlet 120 and also horizontally to the first inlet 120.

[0072] In some examples of this disclosure, the second inlet 122 can be coupled to the plasma outlet 134 of the remote plasma unit 104. In some embodiments, the plasma outlet 134 of the remote plasma unit 104 is directly coupled to the second inlet 122. In such examples, the second inlet 122 is coupled to the chamber interior 216 and is configured to introduce plasma-generating reactants into the chamber interior 216 by an exemplary plasma reactant flow 144, as shown in Figure 2.

[0073] In some examples of this disclosure, the second inlet 122 can be located in the lower wall 208 of the chamber body 118. In such examples, the second inlet 122 may comprise a channel opening created within the lower wall 208 of the chamber body. For example, the plasma outlet 134 of the remote plasma unit 104 can be coupled directly or via the plasma supply pipe 226 to the second inlet 122 located in the lower wall 208 of the chamber body 118. In some embodiments, the second inlet 122 is sized and positioned to introduce plasma-generated reactants into the chamber interior 216 without significant loss of plasma-generated reactants.

[0074] In the examples of this disclosure, the second inlet 122 may be positioned between the injection flange 218 and the substrate support 136. As shown in both Figures 2 and 3, the exemplary second inlet 122 is positioned horizontally between the injection flange 218 and the substrate support 136 (i.e., along the longitudinal orientation of the chamber body longitudinal axis 224).

[0075] In an example of the present disclosure, an isolation member 146, i.e., an in-situ isolation member, may be located inside the chamber 216. In such an example, the isolation member 146 may be used to maintain physical separation between a first gas-phase reactant introduced into the chamber 216 from a first inlet 120 (as indicated by a first reactant flow 142) and a plasma-generated reactant introduced into a second inlet 122 (as indicated by a plasma reactant flow 144). For example, the isolation member 146 may be configured to isolate the first gas-phase reactant (e.g., 142) from the plasma-generated reactant (e.g., 144) until the first gas-phase reactant and the plasma-generated reactant are close to, adjacent to, or in contact with the substrate support 136 and / or the substrate.

[0076] In some embodiments, the isolation member 146 may be made of an opaque material. In some embodiments, the isolation member 146 may be made from silicon carbide (SiC). In some embodiments, the isolation member 146 may be made from a quartz material coated with silicon carbide. In some embodiments, the isolation member 146 may be made of a transparent material. In such embodiments, the isolation member 146 may be made from a quartz material.

[0077] In some embodiments, the isolation member 146 may be integrated with the second inlet 122. In some embodiments, the isolation member 146 may be integrated with the injection end 212 of the chamber body 118. In some embodiments, the isolation member 146 may be integrated with the injection flange 218.

[0078] In some embodiments, the isolation member 146 may include a flat plate. In some embodiments, the isolation member 146 may include a rectangular plate. In such embodiments, the isolation member may have a width W1 and a length L1, as shown in Figure 3. In some embodiments, the width W1 of the isolation member 146 may be less than the width W2 of the chamber interior 216. In some embodiments, the width W1 of the isolation member 146 may be less than the diameter of the substrate support 136. In some embodiments, the width W1 of the isolation member 146 may be greater than the diameter of the substrate support 136. In some embodiments, the width W1 of the isolation member 146 may exceed the diameter of the substrate 138 positioned on the substrate support 136. In some embodiments, the width W1 of the isolation member 146 may be less than the diameter of the substrate 138 positioned on the substrate support 136.

[0079] In some embodiments, the width W1 of the isolation member 146 may exceed the width W3 of the second inlet 122, as shown in Figure 3. In some embodiments, the width W1 of the isolation member 146 may exceed the width W4 of the first inlet 120. For example, the width W1 of the isolation member 146 may exceed the maximum width W4 between the multiple injection ports 308 of the injection flange 218.

[0080] In some embodiments, the length L1 of the isolation member 146 is less than the horizontal distance L4 between the first inlet 120 (e.g., from the front surface 222 of the injection flange 218) and the outer circumference of the substrate support 136 (as shown in Figure 3). In some embodiments, the length L1 of the isolation member 146 is greater than the horizontal distance L4 between the first inlet 120 (e.g., from the front surface 222 of the injection flange 218) and the outer circumference of the substrate support 136.

[0081] In some embodiments, the isolation member 146 may include alternative geometric shapes, shapes, and arrangements to those described above.

[0082] In some embodiments, the isolation member 146 may be positioned between the first inlet 120 and the second inlet 122. In such embodiments, the isolation member 146 may extend from the injection flange 218 toward the substrate 138 into the chamber interior 216.

[0083] In some embodiments of this disclosure, the first end 228 of the isolation member 146 can be positioned close to the first inlet 120 (for example, close to the injection ports 308 of the multiple injection ports of the injection flange 218). In some embodiments, the first end 228 of the isolation member 146 can be positioned adjacent to the first inlet 120 (for example, adjacent to the multiple injection ports 308). In some embodiments, the first end 228 of the isolation member 146 contacts the first inlet 120. In some embodiments, the first end 228 of the isolation member 146 contacts the front surface 222 of the injection flange 218.

[0084] In some embodiments, the first end 228 of the isolation member 146 can be positioned below the first inlet 120 (for example, below the multiple injection ports 308 of the injection flange 218). In some embodiments, the first end 228 of the isolation member 146 can be positioned below the first inlet 120 (for example, adjacent to the multiple injection ports 308). In some embodiments, the first end of the isolation member 146 contacts the first inlet 120 below the gas injection point. In some embodiments, the first end 228 of the isolation member 146 contacts the front surface 222 of the injection flange 218 below the multiple injection ports 308.

[0085] In some embodiments of this disclosure, the second end 230 of the isolation member 146 distal to the first end 228 can be positioned close to the substrate support 136. In such embodiments, the isolation member 146 may extend from the injection end 212 of the chamber body 118 into the chamber interior 216 toward the substrate support 136. In some embodiments, the second end 230 of the isolation member 146 can be positioned adjacent to the substrate support 136. In some embodiments, the second end 230 of the isolation member 146 can be positioned adjacent to the substrate 138.

[0086] In some embodiments, the second end 230 of the isolation member 146 is positioned horizontally close to the substrate support 136 (i.e., the second end 230 is positioned horizontally close to the substrate support 136 in a direction parallel to the longitudinal orientation 224 of the chamber body 118). In some embodiments, the second end 230 of the isolation member 146 is positioned horizontally adjacent to the substrate support 136 (i.e., the second end 230 is positioned horizontally adjacent to the substrate support 136 in a direction parallel to the longitudinal orientation of the chamber body 118). In some embodiments, the second end 230 of the isolation member 146 is positioned horizontally adjacent to the substrate 138 (i.e., the second end 230 is positioned horizontally adjacent to the substrate 138 in a direction parallel to the longitudinal orientation of the chamber body 118).

[0087] In some embodiments, the second end 230 of the isolation member 146 is positioned perpendicularly close to the base material support 136 (i.e., the lower surface of the second end 230 of the isolation member 146 is positioned perpendicularly close to the upper surface of the base material support 136 in a direction perpendicular to the longitudinal orientation 224 of the chamber body 118). In some embodiments, the lower surface of the second end 230 of the isolation member 146 is positioned perpendicularly adjacent to the upper surface of the base material support 136 (i.e., the lower surface of the second end 230 of the isolation member 146 is positioned perpendicularly adjacent to the base material support 136 in a direction perpendicular to the longitudinal orientation of the chamber body 118). In some embodiments, the lower surface of the second end 230 of the isolation member 146 is positioned perpendicularly adjacent to the upper surface of the base material 138 (i.e., the lower surface of the second end 230 of the isolation member 146 is positioned perpendicularly adjacent to the base material 138 in a direction perpendicular to the longitudinal orientation of the chamber body 118).

[0088] In some embodiments, the second end 230 of the isolation member 146 is positioned close to the base material support 136 both horizontally and vertically.

[0089] In some embodiments, the isolation member 146 may extend from the injection flange 218 toward the substrate 138 into the chamber interior 216, thereby being parallel or substantially parallel to the longitudinal orientation 224 of the chamber body 118. In some embodiments, the isolation member 146 may extend from the injection flange 218 toward the substrate support 136 into the chamber interior 216, thereby being non-parallel to the longitudinal orientation of the chamber body 118. In some embodiments, the isolation member 146 may extend from the injection flange 218 toward the chamber interior 216 at an angle inclined toward the substrate support 136. In such embodiments, the isolation member 146 may be inclined downward toward the substrate 138 from the injection flange 218.

[0090] In some embodiments, the second end 230 of the isolation member 146 may be positioned above the first end 228 of the isolation member 146 (not shown). In some embodiments, the second end 230 of the isolation member 146 may be positioned below the first end 228 of the isolation member 146, as shown in Figure 2. In such embodiments, the angle between the isolation member 146 and the longitudinal orientation of the chamber body 118 (i.e., angle 232 in Figure 2) may be greater than 1 degree, greater than 5 degrees, greater than 10 degrees, greater than 20 degrees, greater than 30 degrees, greater than 45 degrees, or between 1 and 89 degrees, or between 1 and 45 degrees, or between 1 and 20 degrees.

[0091] As shown in Figures 2 and 3, the substrate support 136 may be positioned between the injection end 212 and the discharge end 152 of the chamber body 118. The substrate support 136 may include a shaft member 234 that is disposed within the chamber body 118 and configured to rotate around a pivot axis 236 within the chamber body 118. The substrate support 136 may be formed from an opaque material such as silicon carbide or bulk graphite material.

[0092] The upper heater element array 202 may be configured to heat the substrate 138 and / or the material layer 140 during deposition on the substrate 138 by radiating heat into the chamber body 118. The upper heater element array 202 may include a plurality of upper linear lamps supported above the chamber body 118 and optically coupled to the substrate support 136 by the material forming the chamber body 118, such as quartz. The lower heater element array 204 may be similar to the upper heater element array 202 and may also be configured to heat the substrate 138 and / or the material layer 140 during deposition on the substrate 138. The lower heater element array 204 may include a plurality of lower linear lamps supported below the chamber body 118 and optically coupled to the substrate support 136 by the material forming the chamber body 118.

[0093] In certain examples, the remote plasma unit 104 may be one of several remote plasma units that couple a gas manifold header and a gas source assembly 102 passing through it to a chamber configuration 106 via an intermediate flow controller. In such examples, each of the several remote plasma units may couple a gas manifold header to the chamber configuration 106 through a single mass flow controller (MFC) to allow adjustment of the inflow of radicals into the chamber configuration. Examples of suitable gas manifold header and MFC configurations are shown and described in U.S. Patent No. 11,053,591 by Ma et al., issued July 6, 2021, the entire contents of which are incorporated herein by reference.

[0094] The various embodiments provided may include a semiconductor processing system 100 comprising a controller 110 which is communicatively coupled to various other components of the semiconductor processing system 100 (see Figure 1) (including the associated chamber arrangement configuration shown in Figures 2 and 3) and configurable to control the operation of those components. For example, the controller 110 may control a remote plasma unit by controlling one or more of the plasma output and ignition. The controller 110 may control the inflow of a first gas-phase reactant into the chamber of the chamber body 118 from a first inlet 120. The controller 110 may control the inflow of plasma-generated reactants into the chamber of the chamber body 118 from a second inlet 122 located away from the first inlet 120. The controller 110 may control the placement of a substrate on a substrate support, heating of the substrate, and / or the flow of precursors to the remote plasma unit and injection flange.

[0095] Figure 4 shows an exemplary process flow 400 illustrating a process for a material layer deposition method using a semiconductor processing system according to one or more embodiments of the present disclosure.

[0096] According to an example of the present disclosure, in step 402, the controller of the semiconductor processing system (for example, the controller 110 in Figure 1) may place the substrate on the substrate support, such as the semiconductor processing system 100, the substrate 138, and the substrate support 136, as described with reference to Figure 1.

[0097] In some examples of the present disclosure, in step 404, the first gas-phase reactant may be provided to a first inlet coupled to the chamber body of a chamber configuration. In such examples, the first inlet is configured to introduce the first gas-phase reactant into the chamber of the chamber body. In some embodiments, the first gas-phase reactant comprises one or more germanium precursors. In some embodiments, the first gas-phase reactant does not contain a silicon precursor. In some embodiments, the first gas-phase reactant comprises one or more germanium precursors but does not contain a silicon precursor. In some embodiments, the first gas-phase reactant comprises one or more germanium precursors and one or more of a dopant gas, an etchant gas, and a carrier gas but does not contain a silicon precursor. In some embodiments, the first gas-phase reactant may include one or more germanium precursors and one or more of a silicon precursor, a dopant gas, an etchant gas, and a carrier gas.

[0098] In an example of the present disclosure, in step 406, the precursor may be provided to a remote plasma unit. For example, a controller may control a precursor source or precursor gas(s) to provide the precursor to the remote plasma unit. The remote plasma unit may include an inductively coupled remote plasma unit or a microwave remote plasma unit. The inductively coupled remote plasma unit may include a precursor inlet and a precursor conduit connected to the precursor inlet. In some embodiments, the precursor may include a silicon precursor that can flow from a precursor source through the precursor inlet to the remote plasma unit. The inductively coupled remote plasma unit may further include a coil extending around the precursor conduit and a voltage source electrically connected to the coil and configured to carry a decomposition current through the coil. The coil may be spaced away from the chamber body to prevent fracturing of the heater element array in the chamber body and damage to the quartz body.

[0099] In some examples, the precursor gas supplied to the remote plasma unit may include one or more silicon precursors, such as any of the silicon precursors described above. In some examples, the precursor gas may include one or more germanium precursors, dopant precursors, etchant gases, and carrier gases, as described above. In certain examples, the precursor gas supplied to the remote plasma unit is a silicon precursor. In certain examples, the precursor gas supplied to the remote plasma unit consists essentially of a silicon precursor. In certain examples, the precursor gas supplied to the remote plasma unit consists of a silicon precursor. In certain examples, the precursor gas supplied to the remote plasma unit is a silicon precursor and a carrier gas. In certain examples, the precursor gas supplied to the remote plasma unit consists essentially of a silicon precursor and a carrier gas. In certain examples, the precursor gas supplied to the remote plasma unit consists of a silicon precursor and a carrier gas.

[0100] In some embodiments, at least a portion of the precursor (e.g., a silicon precursor) can be decomposed using a remote plasma unit to produce plasma-generated reactants. In some embodiments, the remote plasma unit can decompose at least a portion of the silicon precursor to produce decomposition products containing plasma-generated reactants. For example, any amount from about 0.001% to about 90% of the silicon precursor provided to the remote plasma source may be decomposed to produce plasma-generated reactants.

[0101] When a precursor (e.g., a silicon precursor) flows through a conductive coil of a remote plasma unit, plasma can be generated by breaking down the precursor molecules into different forms, such as a form containing free radicals. Decomposition products carrying free radicals may be more active and more likely to participate in chemical reactions on the substrate surface. Undecomposed precursors may be less active and less likely to participate in chemical reactions on the wafer surface. For example, the silicon precursor SiH4 may be partially decomposed into a mixture of SiHx(-) and SiH4. The mixture of the silicon precursor (e.g., SiH4) and the decomposition products (e.g., SiHx(-) or other silicon-containing radicals) may flow into the chamber of the chamber body.

[0102] In some examples, the purge / carrier gas source may be supplied to a remote plasma unit so as to flow into the chamber body carrying one or more of the following: a precursor (e.g., a silicon precursor), decomposition products (e.g., plasma-generated reactants), and / or a dopant source. Examples of purge / carrier gases include hydrogen (H2) gas, nitrogen (N2) gas, inert gases such as argon (Ar) gas or helium (He) gas, and mixtures thereof.

[0103] In some examples, the controller may be communicatively coupled to a remote plasma unit to control the decomposition of a precursor (e.g., a silicon precursor). For example, the controller may induce plasma generation by adjusting the frequency of a radio frequency (RF) signal applied to the remote plasma unit. The controller may determine a frequency range that can accelerate the decomposition of the precursor (e.g., a silicon precursor) and then accelerate the wafer growth rate in the chamber body. The controller may induce plasma generation by adjusting the plasma generation temperature applied to the remote plasma unit. The controller may determine a temperature range that can accelerate the decomposition of the precursor (e.g., a silicon precursor) and then accelerate the growth rate of the material layer epitaxially deposited on the substrate. Note that the plasma generation temperature may still be relatively lower than the temperature applied to the processing chamber in conventional systems for decomposing the precursor in the chamber body.

[0104] In the examples of this disclosure, in step 408, the plasma-generating reactants may be provided to a second inlet coupled to the chamber body of the chamber configuration. In such examples, the second inlet is configured to introduce the plasma-generating reactants into the chamber of the chamber body. In some embodiments, the plasma-generating reactants include, but are not limited to, several high-energy silicon species such as silicon-containing radicals, silicon-containing metastable species, and silicon ions.

[0105] In an example of the present disclosure, in step 410, one or more epitaxial layers can be epitaxially deposited on a substrate by combining the first gas-phase reactant with the plasma-generated reactant. For example, depositing one or more epitaxial layers may involve rotating the substrate around a rotation axis and flowing both the first gas-phase reactant and the decomposition products (i.e., plasma-generated reactants) longitudinally through the chamber. In such an example, the first gas-phase reactant and the plasma-generated reactants can be isolated from each other until they are close to, adjacent to, or in contact with the substrate support by using an isolation member disposed between a first inlet and a second inlet. A controller may be communicatively coupled to the chamber body to control the deposition process. The decomposition products may flow into the chamber of the chamber body from a remote plasma unit through the second inlet.

[0106] According to an example of the present disclosure, during step 410, one or more epitaxial layers can be deposited on the substrate using a silicon precursor (i.e., a plasma-generated reactant) and decomposition products generated from the first gas-phase reactant. Heating of the substrate during the deposition of the silicon precursor by the heater element array may be limited by the decomposition products. Given that the decomposition products may be more reactive and more likely to be involved in chemical reactions on the surface of the substrate, isothermal and / or lower temperature regimes may be applied to the chamber body to achieve optimal growth rates and / or throughput of the two or more epitaxial material layers.

[0107] The various embodiments provided include a method for depositing a superlattice structure on a substrate using the semiconductor processing system and arrangement configuration described above.

[0108] According to an example of this disclosure, the process flow 500 in Figure 5 illustrates an exemplary process for forming a superlattice structure on a substrate.

[0109] According to an example of the present disclosure, the process flow 500 may include step 502, which includes, in a chamber body having an upper wall and a lower wall as described above, the upper wall extends longitudinally between the injection end and the discharge end opposite the longitudinal end, and the lower wall is below and parallel to the upper wall.

[0110] In an example of the present disclosure, the process flow 500 may include an epitaxial deposition step 504, which includes epitaxially depositing a superlattice structure on a substrate supported on a substrate support disposed inside a chamber body between an injection end and an discharge end. In such an example, the superlattice structure may include two or more repeating unit bilayers. For example, each unit bilayer (making up the superlattice structure) may include an epitaxial silicon layer and an adjacent epitaxial silicon germanium layer.

[0111] In various embodiments, depositing each unit bilayer (i.e., Si / SiGe) of the superlattice structure may involve performing two or more epitaxial deposition supercycles (as shown by cycle loop 510). In some embodiments, each deposition supercycle may include depositing an epitaxial silicon layer by performing a first epitaxial deposition process 506 and depositing an epitaxial silicon germanium layer by performing a second epitaxial deposition process 508. In some embodiments, the epitaxial deposition supercycle may be repeated (as shown by cycle loop 510) to deposit further bilayers (e.g., Si / SiGe) on the substrate. In some embodiments, cycle loop 510 may be repeated two or more, five or more, ten or more, fifteen or more, twenty or more, twenty-five or more, thirty or more, forty or more, sixty or more, eighty or more, one hundred or more, two hundred or more, three hundred or more, or two to three hundred times. In some embodiments, the cycle loop 510 may be initiated by a second epitaxial deposition process 508, followed by a first epitaxial deposition process 506. In some embodiments, the cycle loop 510 may include additional process steps, such as surface cleaning and chamber cleaning, but are not limited to these.

[0112] In various embodiments, the first epitaxial deposition process 506 may include a substep 602 for depositing an epitaxial silicon layer, as shown in Figure 6. In some embodiments, the substep 602 includes introducing a plasma-generating reactant into the chamber body through a second inlet coupled to the chamber body and separated from the first inlet. In such embodiments, the plasma-generating reactant is produced by introducing a second gas-phase reactant containing a silicon precursor into a remote plasma unit configured to generate the plasma-generating reactant.

[0113] In various embodiments, the second epitaxial deposition process 508 may include substeps 604, 606, and 608, as shown in Figure 6. In some embodiments, substep 604 includes introducing a first gas-phase reactant, comprising a germanium precursor, into the chamber body through a first inlet coupled to the chamber body. In some embodiments, substep 606 includes introducing a plasma-generating reactant into the chamber body through a second inlet coupled to the chamber body and separated from the first inlet, the plasma-generating reactant being produced by introducing a second gas-phase reactant, comprising a silicon precursor, into a remote plasma unit configured to generate the plasma-generating reactant. In some embodiments, substep 608 includes isolating the first gas-phase reactant and the plasma-generating reactant from each other until they are close to, adjacent to, or in contact with the substrate support and / or substrate, by using an isolation member positioned between the first and second inlets.

[0114] In various embodiments, epitaxial deposition of a superlattice structure includes an isothermal epitaxial deposition process. In some embodiments, carrying out two or more epitaxial deposition supercycles (as shown by cycle loop 510 in Figure 5) is carried out at the same or substantially the same deposition temperature (i.e., substrate temperature). In some embodiments, a first epitaxial deposition process 506 can be carried out at a first substrate temperature, and a second epitaxial deposition process 508 can be carried out at a second substrate, where the first and second substrate temperatures are the same or substantially the same substrate temperature. As used herein, an isothermal epitaxial deposition process can refer to an epitaxial deposition process in which the variation in deposition temperature is less than 5%, less than 4%, less than 3%, less than 2%, less than 1%, or between 1% and 5%. Similarly, when referring to epitaxial deposition processes involving substantially the same substrate temperature, the term “substantially” can refer to a variation in substrate temperature of less than 5%, less than 4%, less than 3%, less than 2%, less than 1%, or between 1% and 5%.

[0115] The ability to deposit superlattice structures by isothermal epitaxial deposition processes can be achieved by using both gas-phase reactants and plasma-generated reactants for the deposition of unit double-layer structures, including epitaxial silicon layers and epitaxial silicon-germanium layers.

[0116] Figure 7 shows an example of a computing device that may be used in carrying out one or more embodiments of the present disclosure. The computing device may be a device for controlling a system (e.g., 100) and for carrying out processes (e.g., 400 and 500) described herein. For example, one or more devices and components described herein (e.g., controller 110) may be carried out by the device shown in Figure 7.

[0117] The term “network” as used herein and illustrated in the drawings refers not only to a system in which remote storage devices are coupled together via one or more communication paths, but also sometimes to standalone devices that may be coupled to a system having memory capabilities. The exemplary system 700 may be used in accordance with one or more exemplary embodiments described herein. The system 700 may have a processor 701 for controlling the overall operation of the system and its associated components, including read-only memory (ROM) 702, random access memory (RAM) 703, removable media 704, hard drive 705, display device 706, device controller 707, input device 708, network input / output (I / O) device 709, and speaker 711.

[0118] The input device 708 may include a mouse, keypad, touchscreen, scanner, optical reader, and / or stylus (or other input device(s)) to which a user of System 700 can provide input. One or more speakers 711 may provide audio output, and the display device 706 may provide text, audiovisual, and / or graphic output. Software may be stored in removable media 704 and / or hard drive 705 and provide instructions to processor 701 to configure System 700 as a dedicated computing device for performing the various functions described herein. For example, removable media 704 and / or hard drive 705 may store software used by System 700, such as an operating system, application programs, and / or associated databases.

[0119] System 700 may operate in a network environment that supports connections to one or more remote computers or components, such as the gas source assembly 102, the remote plasma unit 104, the chamber arrangement configuration 106, and the exhaust assembly 108. The external network 710 may include, but may also include, a local area network (LAN) and a wide area network (WAN). When used in a LAN networking environment, System 700 may be connected to the LAN through a network I / O device 709 (e.g., a network interface or adapter). When used in a WAN networking environment, System 700 may include a modem or other wide area network interface for establishing communication over the WAN, such as the Internet. The network connections shown are illustrative, and it should be understood that other means may be used to establish communication links between computers. System 700 may also be a mobile terminal (e.g., a mobile phone, smartphone, personal digital assistant (PDA), laptop computer, etc.) including various other components such as batteries, speakers, and antennas (not shown).

[0120] For the purpose of summarizing the advantages of the present invention over the prior art, certain objectives and advantages of the present invention are described above herein. Naturally, it will be understood that not all of these objectives or advantages are necessarily achieved according to any particular embodiment of the present invention. Therefore, those skilled in the art will recognize that the present invention may be embodied or practiced in a manner that achieves or optimizes one or a group of advantages as taught or suggested herein, without necessarily achieving other objectives or advantages as taught or suggested herein.

[0121] All of these embodiments are intended to be within the scope of the present invention disclosed herein. These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of certain embodiments with reference to the accompanying drawings, but the present invention is not limited to any particular embodiment disclosed.

Claims

1. A semiconductor processing system, A chamber body having an upper wall and a lower wall, wherein the upper wall extends longitudinally between the injection end and the discharge end opposite in the longitudinal direction, and the lower wall is below and parallel to the upper wall, A substrate support configured to support the substrate and disposed inside the chamber body between the injection end and the discharge end, A first inlet is connected to the chamber body and configured to introduce the first gas-phase reactant into the chamber body, A second inlet, coupled to the chamber body and separated from the first inlet, is configured to introduce plasma-generated reactants into the chamber body, A remote plasma unit having a plasma outlet coupled to the second inlet and configured to generate the plasma generation reactant by the decomposition of a second gas-phase reactant, An isolation member positioned between the first inlet and the second inlet, and configured to isolate the first gas-phase reactant from the plasma-generating reactant until the first gas-phase reactant and the plasma-generating reactant come into close proximity to the substrate support, A semiconductor processing system equipped with the following features.

2. The semiconductor processing system according to claim 1, wherein the first inlet is provided with an injection flange connected to the injection end of the chamber body.

3. The semiconductor processing system according to claim 2, wherein the injection flange comprises a plurality of injection ports disposed on the front surface of the injection flange, and a plurality of flow controllers configured to control the flow of the first gas-phase reactant from the precursor source to the plurality of injection ports and through them into the interior of the chamber body.

4. The semiconductor processing system according to claim 3, wherein the second inlet is positioned between the injection flange and the substrate support.

5. The semiconductor processing system according to claim 4, wherein the second inlet is disposed on the lower wall of the chamber body.

6. The semiconductor processing system according to claim 5, wherein the isolation member extends from the injection flange toward the substrate support into the interior of the chamber body.

7. The semiconductor processing system according to claim 6, wherein the isolation member includes an opaque material.

8. The semiconductor processing system according to claim 7, wherein the isolation member is positioned vertically above the substrate support.

9. The semiconductor processing system according to claim 8, wherein the isolation member is angled toward the substrate support.

10. The semiconductor processing system according to claim 9, wherein the precursor source includes a silicon precursor that is in fluid communication with the precursor inlet of the remote plasma unit, and the plasma generated reactant includes a plurality of high-energy silicon species.

11. The semiconductor processing system according to claim 10, wherein the remote plasma unit comprises an inductively coupled plasma source or a microwave plasma source.

12. The semiconductor processing system according to claim 11, further comprising a discharge flange connected to the discharge end of the chamber body, and a vacuum pump coupled to the discharge flange and through it to the remote plasma unit.

13. The semiconductor processing system according to claim 12, wherein the chamber body has a plurality of external ribs that extend laterally around the outside of the chamber body and are spaced apart from each other in the longitudinal direction between the injection end and the discharge end of the chamber body on the opposite side in the longitudinal direction.

14. The chamber further comprises a heater element array supported on the outside of the chamber body and optically coupled to the substrate support and the isolation member, wherein the heater element array is A plurality of lower linear lamps are supported below the chamber body and optically coupled to the substrate support and the isolation member by the quartz material forming the chamber body, A plurality of upper linear lamps are supported above the chamber body and optically coupled to the substrate support and the isolation member by the quartz material forming the chamber body, The semiconductor processing system according to claim 13, comprising:

15. The system further includes a processor and a controller including a memory on which instructions are recorded, and when an instruction is read by the processor, the processor is instructed to Placing the substrate on the substrate support, To provide the germanium precursor to the injection flange, To provide the silicon precursor to the remote plasma unit, Using the remote plasma unit, at least a portion of the silicon precursor is decomposed to produce the plasma generation reactant, The germanium precursor is combined with the plasma generation reactant produced using the decomposition product generated from the silicon precursor to deposit one or more epitaxial silicon-containing layers on the substrate, The semiconductor processing system according to claim 14, wherein the deposition of the one or more epitaxial silicon-containing layers is an isothermal deposition process.

16. A method for forming a superlattice structure on a substrate, In a chamber body having an upper wall and a lower wall, the upper wall extends longitudinally between the injection end and the discharge end opposite in the longitudinal direction, and the lower wall is below and parallel to the upper wall. The process involves epitaxially depositing the superlattice structure onto a substrate supported on a substrate support disposed inside the chamber body between the injection end and the discharge end, wherein the superlattice structure comprises two unit double layers or repeating unit double layers, each unit double layer comprising an epitaxial silicon layer and an adjacent epitaxial silicon germanium layer, and the deposition of each unit double layer of the superlattice structure comprises carrying out two or more epitaxial deposition supercycles, wherein each deposition supercycle comprises, The epitaxial silicon layer is deposited by carrying out a first epitaxial deposition process, wherein the first epitaxial deposition process is The method involves introducing a plasma generating reactant into the chamber body through a second inlet that is coupled to the chamber body and separated from the first inlet, wherein the plasma generating reactant is generated by introducing a second gas-phase reactant containing a silicon precursor into a remote plasma unit configured to generate the plasma generating reactant, and depositing the epitaxial silicon layer. The method involves depositing the epitaxial silicon germanium layer on the epitaxial silicon layer by performing a second epitaxial deposition process, wherein the second epitaxial deposition process is The first gas-phase reactant containing a germanium precursor is introduced into the chamber body through the first inlet connected to the chamber body, The plasma generation reactant is introduced into the chamber body through a second inlet that is coupled to the chamber body and is separated from the first inlet, wherein the plasma generation reactant is generated by introducing the second gas-phase reactant containing the silicon precursor into the remote plasma unit configured to generate the plasma generation reactant. A method comprising depositing the epitaxial silicon germanium layer, wherein the first gas-phase reactant and the plasma-generating reactant are isolated from each other until they are close to the substrate support by using an isolation member positioned between the first inlet and the second inlet.

17. The method according to claim 16, wherein the superlattice structure is epitaxially deposited, comprising an isothermal epitaxial deposition process.

18. The method according to claim 17, wherein the first inlet includes an injection flange connected to the injection end of the chamber body, and the injection flange comprises a plurality of injection ports disposed on the front surface of the injection flange, and a plurality of flow controllers configured to control the flow of the first gas-phase reactant from a precursor source to the plurality of injection ports and through them into the interior of the chamber body.

19. The method according to claim 18, wherein the second inlet is disposed in the lower wall of the chamber body between the injection flange and the substrate support.

20. The method according to claim 19, wherein the isolation member includes an opaque material.

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