Substrate processing method and substrate processing apparatus

The method addresses substrate cracking by etching and stress relief on scratches before flash light irradiation, enhancing the reliability of flash lamp annealing.

JP2026055079APending Publication Date: 2026-03-30SCREEN HOLDINGS CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-03-18
Publication Date
2026-03-30

AI Technical Summary

Technical Problem

Existing substrate processing methods using flash lamp annealing fail to detect minute scratches on semiconductor wafers, leading to potential cracking and equipment downtime.

Method used

A substrate processing method involving etching the back surface of the substrate with a chemical solution, such as hydrofluoric acid, followed by flash light irradiation to relieve residual stress on scratches, and subsequent rinsing and drying steps.

Benefits of technology

Prevents substrate cracking by relaxing residual stress on scratches, ensuring reliable flash light irradiation without damage.

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Abstract

The present invention provides a substrate processing method and a substrate processing apparatus that can prevent cracking of a substrate even when a damaged substrate is irradiated with a flash of light. [Solution] As a pretreatment for flash heating, hydrofluoric acid is supplied to the back surface of the semiconductor wafer to perform etching. This relieves residual stress acting on scratches on the back surface of the semiconductor wafer. Subsequently, the semiconductor wafer is flash-heated by irradiating the surface of the semiconductor wafer with flash light. By irradiating the surface with flash light while the residual stress acting on scratches on the back surface of the semiconductor wafer has been relieved, it is possible to prevent cracking of the semiconductor wafer starting from the scratches, even when the semiconductor wafer deforms due to rapid thermal expansion of the surface and large thermal stress acts on the semiconductor wafer. In other words, it is possible to prevent wafer cracking even when flash light is irradiated onto a semiconductor wafer with scratches.
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Description

Technical Field

[0001] The present invention relates to a substrate processing method and a substrate processing apparatus for heating a substrate by irradiating the substrate with flash light. Substrates to be processed include, for example, semiconductor wafers, substrates for liquid crystal display devices, substrates for flat panel displays (FPDs), substrates for optical disks, substrates for magnetic disks, or substrates for solar cells.

Background Art

[0002] In the manufacturing process of semiconductor devices, flash lamp annealing (FLA) for heating a semiconductor wafer in an extremely short time has attracted attention. Flash lamp annealing is a heat treatment technique that uses a xenon flash lamp (hereinafter simply referred to as "flash lamp" when referring to a xenon flash lamp) to irradiate flash light on the surface of a semiconductor wafer, thereby raising the temperature of only the surface of the semiconductor wafer in an extremely short time (several milliseconds or less).

[0003] The emission spectral distribution of a xenon flash lamp is from the ultraviolet region to the near-infrared region, and its wavelength is shorter than that of a conventional halogen lamp, which almost coincides with the fundamental absorption band of a silicon semiconductor wafer. Therefore, when flash light is irradiated from a xenon flash lamp to a semiconductor wafer, there is little transmitted light and it is possible to rapidly raise the temperature of the semiconductor wafer. Also, it has been found that if flash light is irradiated for an extremely short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated.

[0004] Such flash lamp annealing is used for processes that require heating in an extremely short time, for example, typically for activating impurities implanted in a semiconductor wafer. If flash light is irradiated from a flash lamp onto the surface of a semiconductor wafer into which impurities have been implanted by the ion implantation method, the temperature of the surface of the semiconductor wafer can be raised to the activation temperature in an extremely short time, and only impurity activation can be performed without deeply diffusing the impurities.

[0005] Flash lamp annealing heats the surface of a semiconductor wafer in an extremely short time, on the order of milliseconds, allowing for a rapid increase in surface temperature while also achieving a low thermal history. On the other hand, flash lamp annealing can cause rapid thermal expansion only near the surface of the semiconductor wafer, leading to increased thermal stress on the wafer and potentially causing wafer cracking. Wafer cracking during flash light irradiation is more likely to occur if there are scratches on the back surface of the semiconductor wafer.

[0006] Therefore, various technologies have been proposed to detect the presence or absence of defects in semiconductor wafers. For example, Patent Document 1 discloses a technology that detects the presence or absence of defects such as cracks by imaging the reflected light when infrared light is irradiated onto a silicon wafer through a polarizing filter and performing predetermined calculation processing on the obtained image. Patent Document 2 discloses a technology that determines the presence or absence of cracks by applying weak vibrations to a semiconductor wafer using a contact probe and performing frequency analysis of the generated sound. Furthermore, Patent Document 2 also discloses a method to prevent wafer cracking by interrupting processing and not performing flash heating on semiconductor wafers that have been determined to have cracks. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2013-36888 [Patent Document 2] Japanese Patent Publication No. 2017-3547 [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] However, even with these technologies, it may not be possible to completely detect extremely minute scratches present in semiconductor wafers. Furthermore, interrupting the processing of a semiconductor wafer with scratches results in downtime for the heat treatment equipment and the waste of that semiconductor wafer.

[0009] This invention has been made in view of the above problems, and aims to provide a substrate processing method and a substrate processing apparatus that can prevent cracking of a substrate even when a damaged substrate is irradiated with flash light. [Means for solving the problem]

[0010] To solve the above problems, a first aspect of the present invention is a substrate processing method for heating a substrate by irradiating the substrate with flash light, comprising: an etching step of supplying a chemical solution to the back surface of the substrate and etching the back surface; and a flash light irradiation step of irradiating the surface of the substrate with flash light after the etching step to heat the substrate.

[0011] Furthermore, the second embodiment is a substrate processing method according to the first embodiment, wherein the etching step relieves residual stress acting on scratches formed on the back surface of the substrate.

[0012] Furthermore, the third embodiment is a substrate processing method according to the first or second embodiment, wherein the chemical solution is hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid.

[0013] Furthermore, the fourth embodiment is a substrate processing method according to the third embodiment, wherein the chemical solution is hydrofluoric acid, and the concentration of hydrofluoric acid in the chemical solution is 1 mass% or more and 49 mass% or less.

[0014] Furthermore, the fifth embodiment is a substrate processing method according to any of the first to fourth embodiments, further comprising, between the etching step and the flash light irradiation step, a rinsing step of supplying pure water to the back surface of the substrate to clean the back surface, and a drying step of drying the substrate.

[0015] Furthermore, a sixth embodiment is a substrate processing apparatus for heating a substrate by irradiating the substrate with a flash of light, comprising: a liquid processing unit for supplying a chemical solution to the back surface of the substrate to perform etching on the back surface; and a heat processing unit for heating the substrate by irradiating the surface of the etched substrate with a flash of light.

[0016] Furthermore, the seventh embodiment is a substrate processing apparatus according to the sixth embodiment, wherein residual stress acting on scratches formed on the back surface of the substrate by etching is relieved.

[0017] Furthermore, the eighth aspect is a substrate processing apparatus according to the sixth or seventh aspect, wherein the chemical solution is hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid.

[0018] Furthermore, the ninth embodiment is a substrate processing apparatus according to the eighth embodiment, wherein the chemical solution is hydrofluoric acid, and the concentration of hydrofluoric acid in the chemical solution is 1 mass% or more and 49 mass% or less.

[0019] Furthermore, the tenth embodiment is a substrate processing apparatus according to any of the sixth to ninth embodiments, wherein the liquid processing unit performs a rinsing treatment in which pure water is supplied to the back surface of the substrate after etching to clean the back surface, and a drying treatment in which the substrate is dried. [Effects of the Invention]

[0020] According to the substrate processing method according to the first to fifth aspects, after supplying a chemical solution to the back surface of the substrate and performing etching on the back surface, flash light is irradiated on the front surface of the substrate to heat the substrate. Therefore, flash light is irradiated on the front surface in a state where the residual stress acting on the scratches present on the back surface of the substrate is relaxed, and it is possible to prevent the substrate from cracking even when flash light is irradiated on a substrate with scratches.

[0021] According to the substrate processing apparatus according to the sixth to tenth aspects, a chemical solution is supplied to the back surface of the substrate and etching is performed on the back surface, and flash light is irradiated on the front surface of the substrate on which the etching has been performed to heat the substrate. Therefore, flash light is irradiated on the front surface in a state where the residual stress acting on the scratches present on the back surface of the substrate is relaxed, and it is possible to prevent the substrate from cracking even when flash light is irradiated on a substrate with scratches.

Brief Description of the Drawings

[0022] [Figure 1] FIG. 1 is a plan view showing a schematic overall configuration of a substrate processing apparatus according to the present invention. [Figure 2] FIG. 2 is a plan view of the inside of the liquid processing unit. [Figure 3] FIG. 3 is a side view showing a schematic configuration of the liquid processing unit. [Figure 4] FIG. 4 is a longitudinal sectional view showing the configuration of the heat treatment unit. [Figure 5] FIG. 5 is a perspective view showing the overall appearance of the holding unit. [Figure 6] FIG. 6 is a plan view of the susceptor. [Figure 7] FIG. 7 is a sectional view of the susceptor. [Figure 8] FIG. 8 is a plan view of the transfer mechanism. [Figure 9] FIG. 9 is a side view of the transfer mechanism. [Figure 10] FIG. 10 is a plan view showing the arrangement of a plurality of halogen lamps. [Figure 11] FIG. 11 is a flowchart showing the procedure of the processing operation in the substrate processing apparatus. [Figure 12]Figure 12 is a diagram illustrating the etching process of the back surface of a semiconductor wafer using hydrofluoric acid. [Modes for carrying out the invention]

[0023] Embodiments of the present invention will be described in detail below with reference to the drawings. In the following, expressions indicating relative or absolute positional relationships (e.g., "in one direction," "along one direction," "parallel," "orthogonal," "center," "concentric," "coaxial," etc.) shall, unless otherwise specified, not only strictly represent the positional relationship but also represent a state in which there is a relative displacement in terms of angle or distance within a tolerance or a range in which a similar level of function can be obtained. Similarly, expressions indicating equality (e.g., "identical," "equal," "homogeneous," etc.) shall, unless otherwise specified, not only represent a state in which there is a quantitatively strictly equal state but also represent a state in which there is a difference in which a tolerance or a similar level of function can be obtained. Furthermore, expressions indicating shape (e.g., "circular," "square," "cylindrical," etc.) shall, unless otherwise specified, not only strictly represent the geometrically precise shape but also represent a shape within a range in which a similar level of effect can be obtained, and may have, for example, irregularities or chamfers. Additionally, expressions such as "equipped," "possessing," "containing," "having," etc., for a component are not exclusive expressions that exclude the existence of other components. Furthermore, the expression "at least one of A, B, and C" includes "A only," "B only," "C only," "any two of A, B, and C," and "all of A, B, and C."

[0024] Figure 1 is a plan view showing the schematic overall configuration of the substrate processing apparatus 100 according to the present invention. The substrate processing apparatus 100 in Figure 1 is an apparatus that performs etching using a chemical solution and heating treatment by flash light irradiation on a disc-shaped silicon (Si) semiconductor wafer W as a substrate. The size of the semiconductor wafer W to be processed is not particularly limited, but for example it may be φ300 mm or φ450 mm (in this embodiment it is φ300 mm). Note that in Figure 1 and subsequent figures, the dimensions and number of parts are exaggerated or simplified as necessary for ease of understanding.

[0025] The substrate processing apparatus 100 comprises two load ports LP, LP, a transport robot TR, a liquid processing unit 110, and a heat processing unit 160. In other words, in the substrate processing apparatus 100, the liquid processing unit 110 and the heat processing unit 160 are in line. The substrate processing apparatus 100 also includes various operating mechanisms provided in the liquid processing unit 110 and the heat processing unit 160, as well as a control unit 3 that controls the operation of the transport robot TR. A carrier C that accommodates multiple semiconductor wafers W to be processed by the substrate processing apparatus 100 is placed on each load port LP. The carrier C may take the form of an FOUP (front opening unified pod) that houses the semiconductor wafers W in a sealed space, an SMIF (Standard Mechanical Interface) pod, or an OC (open cassette) that exposes the housed semiconductor wafers W to the outside air.

[0026] The transport robot TR transports the semiconductor wafer W between the carrier C, which is placed on the load port LP, and either the liquid processing unit 110 or the heat processing unit 160. The transport robot TR also transports the semiconductor wafer W from the liquid processing unit 110 to the heat processing unit 160. The transport robot TR is, for example, an articulated robot and can transfer the semiconductor wafer W to and from any of the two load ports LP, LP, the liquid processing unit 110, or the heat processing unit 160. The transport robot TR may also be a robot that travels along the alignment of the two load ports LP, LP.

[0027] Figure 2 is a plan view of the interior of the liquid processing unit 110. Figure 3 is a side view showing the schematic configuration of the liquid processing unit 110. The liquid processing unit 110 supplies a chemical solution to the back surface of the semiconductor wafer W and performs etching on the back surface. The liquid processing unit 110 comprises a liquid processing chamber 111, a spin base 120, a spin motor 130, a liquid supply unit 140, and a cup 150.

[0028] The liquid processing chamber 111 is a hollow housing. A spin base 120, a spin motor 130, and a cup 150 are provided inside the liquid processing chamber 111. An inlet / outlet 112 is provided on the side wall of the liquid processing chamber 111. The inlet / outlet 112 is opened and closed by a gate valve 113. With the gate valve 113 open, the transport robot TR loads and unloads semiconductor wafers W into and out of the liquid processing chamber 111 from the inlet / outlet 112. While the semiconductor wafers W are being processed inside the liquid processing chamber 111, the gate valve 113 closes the inlet / outlet 112. When the inlet / outlet 112 is closed by the gate valve 113, the inside of the liquid processing chamber 111 becomes a semi-sealed space.

[0029] An FFU (Fan Filter Unit) 118 is provided on the ceiling of the liquid treatment chamber 111. The FFU 118 supplies clean air from the ceiling of the liquid treatment chamber 111 into the liquid treatment chamber 111. An exhaust duct 119 is also provided on the wall of the liquid treatment chamber 111. The exhaust duct 119 is connected to a suction source (not shown) and sucks in and exhausts the atmosphere inside the liquid treatment chamber 111. By supplying clean air from the FFU 118 and exhausting air from the exhaust duct 119, a downflow of clean air from top to bottom is formed inside the liquid treatment chamber 111.

[0030] The spin base 120 is a disc-shaped component that holds a semiconductor wafer W. Multiple chuck pins 121 (for example, 6) are erected on the upper surface of the spin base 120 along the outer edge of the semiconductor wafer W to be held. The multiple chuck pins 121 are arranged at equal intervals (60° intervals if there are 6 chuck pins 121) along the outer edge of the semiconductor wafer W. A flat surface and a projection are formed at the upper end of each chuck pin 121.

[0031] Multiple chuck pins 121 are moved collectively between a gripping position for gripping the semiconductor wafer W and an open position for releasing the grip, by a drive mechanism (not shown). When the multiple chuck pins 121 move to the gripping position, the flat surface at the upper end of each chuck pin 121 supports the lower surface of the peripheral edge of the semiconductor wafer W, and the projections contact the outer edge of the semiconductor wafer W to grip it (states shown in Figures 2 and 3). On the other hand, when the multiple chuck pins 121 move to the open position, the projections at the upper end of each chuck pin 121 move away from the outer edge of the semiconductor wafer W, releasing the grip. When the multiple chuck pins 121 are in the gripping position and supporting the semiconductor wafer W, a gap of a certain interval is formed between the lower surface of the semiconductor wafer W and the upper surface of the spin base 120.

[0032] A rotating shaft 122 is vertically mounted in the center of the lower surface of the spin base 120. A flow channel 125 through which liquid can pass is formed along the axial direction in the center of the rotating shaft 122. The upper end of the flow channel 125 becomes a discharge port 126 that opens in the center of the upper surface of the spin base 120.

[0033] The spin motor 130 is, for example, a hollow motor. The rotation shaft 122 passes through the spin motor 130 vertically. As the spin motor 130 rotates the rotation shaft 122, the spin base 120 and the semiconductor wafer W held therein rotate around an axis aligned with the vertical direction.

[0034] The lower end of the flow path 125 of the rotating shaft 122 is connected to the supply pipe 141 of the liquid supply unit 140. The supply pipe 141 is branched into two via a three-way valve 143, one of which is connected to the chemical supply source 144 and the other to the rinse liquid supply source 146. A chemical valve 145 is provided in the branch pipe connecting the chemical supply source 144 and the three-way valve 143, and a rinse liquid valve 147 is provided in the branch pipe connecting the rinse liquid supply source 146 and the three-way valve 143.

[0035] In this embodiment, the chemical supply source 144 supplies hydrofluoric acid (HF) as the chemical solution. The rinse solution supply source 146 supplies pure water as the rinse solution. When the chemical solution valve 145 is opened, the hydrofluoric acid supplied from the chemical supply source 144 is discharged from the outlet 126 through the supply pipe 141 and the flow path 125. When the rinse solution valve 147 is opened, the pure water supplied from the rinse solution supply source 146 is discharged from the outlet 126 through the supply pipe 141 and the flow path 125.

[0036] A cup 150 is provided to surround the spin base 120. The cup 150 is movable up and down by a cup lifting mechanism (not shown). The cup 150 has a generally cylindrical shape, and the upper part of the cup 150 is inclined so that it approaches the spin base 120 as it goes upwards. However, the inner diameter of the upper part of the cup 150 is larger than the diameter of the spin base 120. When processing the semiconductor wafer W, the upper end of the cup 150 is higher than the height of the semiconductor wafer W held by the spin base 120. Therefore, liquid scattered by centrifugal force from the semiconductor wafer W rotated by the spin base 120 during processing is caught and collected by the cup 150. The liquid collected by the cup 150 is discharged from a drain pipe (not shown) provided at the bottom of the cup 150. The cup 150 may also have a multi-stage structure with multiple collection ports for different purposes.

[0037] Next, the configuration of the heat treatment unit 160 will be described. Figure 4 is a longitudinal cross-sectional view showing the configuration of the heat treatment unit 160. The heat treatment unit 160 comprises a heat treatment chamber 6 for housing and performing heat treatment on a semiconductor wafer W, a flash lamp house 5 for housing multiple flash lamps FL, and a halogen lamp house 4 for housing multiple halogen lamps HL. The flash lamp house 5 is located above the heat treatment chamber 6, and the halogen lamp house 4 is located below it. The heat treatment unit 160 also includes a holding unit 7 for holding the semiconductor wafer W in a horizontal position inside the heat treatment chamber 6, and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding unit 7 and the transport robot TR.

[0038] The heat treatment chamber 6 is constructed by mounting quartz chamber windows on the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 has a roughly cylindrical shape with openings at the top and bottom. The upper opening is closed by an upper chamber window 63, and the lower opening is closed by a lower chamber window 64. The upper chamber window 63, which forms the ceiling of the heat treatment chamber 6, is a disc-shaped member made of quartz and functions as a quartz window that transmits flash light emitted from the flash lamp FL into the heat treatment chamber 6. Similarly, the lower chamber window 64, which forms the floor of the heat treatment chamber 6, is also a disc-shaped member made of quartz and functions as a quartz window that transmits light from the halogen lamp HL into the heat treatment chamber 6.

[0039] Furthermore, a reflective ring 68 is attached to the upper part of the inner wall surface of the chamber side portion 61, and a reflective ring 69 is attached to the lower part. Both reflective rings 68 and 69 are formed in an annular shape. The upper reflective ring 68 is attached by fitting it from the upper side of the chamber side portion 61. On the other hand, the lower reflective ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and securing it with screws (not shown). In other words, both reflective rings 68 and 69 are detachably attached to the chamber side portion 61. The inner space of the heat treatment chamber 6, that is, the space enclosed by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflective rings 68 and 69, is defined as the heat treatment space 65.

[0040] By attaching the reflective rings 68 and 69 to the chamber side portion 61, a recess 62 is formed on the inner wall surface of the heat treatment chamber 6. Specifically, the recess 62 is formed by the central portion of the inner wall surface of the chamber side portion 61 where the reflective rings 68 and 69 are not attached, the lower end surface of the reflective ring 68, and the upper end surface of the reflective ring 69. The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the heat treatment chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflective rings 68 and 69 are made of a metal material (for example, stainless steel) with excellent strength and heat resistance.

[0041] Furthermore, a transport opening (furnace opening) 66 is provided on the side portion 61 of the chamber for loading and unloading semiconductor wafers W into and out of the heat treatment chamber 6. The transport opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected in communication with the outer surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, the transport robot TR can load semiconductor wafers W into the heat treatment space 65 and unload them from the heat treatment space 65 by passing through the transport opening 66 and the recess 62. When the gate valve 185 closes the transport opening 66, the heat treatment space 65 inside the heat treatment chamber 6 becomes a sealed space.

[0042] Furthermore, through-holes 61a and 61b are drilled in the side portion 61 of the chamber. Through-hole 61a is a cylindrical hole for guiding infrared light emitted from the upper surface of the semiconductor wafer W held by the susceptor 74 (described later) to the infrared sensor 29 of the upper radiation thermometer 25. On the other hand, through-hole 61b is a cylindrical hole for guiding infrared light emitted from the lower surface of the semiconductor wafer W to the lower radiation thermometer 20. Through-holes 61a and 61b are provided at an inclination with respect to the horizontal direction such that their axes in the direction of penetration intersect with the main surface of the semiconductor wafer W held by the susceptor 74. A transparent window 26 made of calcium fluoride material that transmits infrared light in the wavelength range measurable by the upper radiation thermometer 25 is attached to the end of through-hole 61a facing the heat treatment space 65. Furthermore, a transparent window 21 made of barium fluoride material that transmits infrared light in the wavelength range measurable by the lower radiation thermometer 20 is attached to the end of the through hole 61b facing the heat treatment space 65.

[0043] Furthermore, a gas supply hole 81 is formed in the upper part of the inner wall of the heat treatment chamber 6 to supply processing gas to the heat treatment space 65. The gas supply hole 81 is formed in a position above the recess 62 and may be provided in the reflecting ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the heat treatment chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. An air supply valve 84 is also interposed in the middle of the path of the gas supply pipe 83. When the air supply valve 84 is opened, processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas that flows into the buffer space 82 spreads out within the buffer space 82, which has less fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65. As the processing gas, for example, an inert gas such as nitrogen (N2), a reactive gas such as hydrogen (H2) or ammonia (NH3), or a mixed gas of these can be used (in this embodiment, nitrogen gas is used).

[0044] On the other hand, a gas exhaust port 86 for exhausting gas from the heat treatment space 65 is formed in the lower part of the inner wall of the heat treatment chamber 6. The gas exhaust port 86 is formed in a position below the recess 62 and may be provided in the reflecting ring 69. The gas exhaust port 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the heat treatment chamber 6. The gas exhaust pipe 88 is connected to the exhaust mechanism 190. An exhaust valve 89 is interposed in the path of the gas exhaust pipe 88. When the exhaust valve 89 is opened, the gas from the heat treatment space 65 is discharged from the gas exhaust port 86 through the buffer space 87 to the gas exhaust pipe 88. Note that there may be multiple gas supply holes 81 and gas exhaust holes 86 along the circumferential direction of the heat treatment chamber 6, or they may be slit-shaped. Also, the processing gas supply source 85 and the exhaust mechanism 190 may be mechanisms provided in the substrate processing apparatus 100, or they may be utilities of the factory where the substrate processing apparatus 100 is installed.

[0045] Furthermore, a gas exhaust pipe 191 for discharging gas from the heat treatment space 65 is connected to the tip of the transport opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the heat treatment chamber 6 is exhausted through the transport opening 66.

[0046] Figure 5 is a perspective view showing the overall appearance of the holding part 7. The holding part 7 is composed of a base ring 71, a connecting part 72, and a susceptor 74. The base ring 71, the connecting part 72, and the susceptor 74 are all made of quartz. In other words, the entire holding part 7 is made of quartz.

[0047] The base ring 71 is a quartz material with an arc shape, partially missing from its annular shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 (described later) and the base ring 71. The base ring 71 is supported by the wall surface of the heat treatment chamber 6 by being placed on the bottom surface of the recess 62 (see Figure 4). Multiple connecting parts 72 (four in this embodiment) are erected on the upper surface of the base ring 71 along the circumferential direction of its annular shape. The connecting parts 72 are also made of quartz material and are fixed to the base ring 71 by welding.

[0048] The susceptor 74 is supported by four connecting parts 72 provided on the base ring 71. Figure 6 is a plan view of the susceptor 74. Figure 7 is a cross-sectional view of the susceptor 74. The susceptor 74 comprises a retaining plate 75, a guide ring 76, and a plurality of substrate support pins 77. The retaining plate 75 is a substantially circular, flat member made of quartz. The diameter of the retaining plate 75 is larger than the diameter of the semiconductor wafer W. That is, the retaining plate 75 has a planar size larger than the semiconductor wafer W.

[0049] A guide ring 76 is installed on the upper peripheral edge of the retaining plate 75. The guide ring 76 is an annular member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, if the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner circumference of the guide ring 76 is tapered so as to widen upward from the retaining plate 75. The guide ring 76 is made of quartz, the same material as the retaining plate 75. The guide ring 76 may be welded to the upper surface of the retaining plate 75, or it may be fixed to the retaining plate 75 by a separately processed pin or the like. Alternatively, the retaining plate 75 and the guide ring 76 may be manufactured as a single integrated member.

[0050] The area of ​​the upper surface of the retaining plate 75 that is inside the guide ring 76 is a planar retaining surface 75a for holding the semiconductor wafer W. Multiple substrate support pins 77 are erected on the retaining surface 75a of the retaining plate 75. In this embodiment, a total of 12 substrate support pins 77 are erected at 30° intervals along the circumference of the outer circumference of the retaining surface 75a (the inner circumference of the guide ring 76) concentric with the outer circumference of the retaining surface 75a. The diameter of the circle in which the 12 substrate support pins 77 are arranged (the distance between opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W, and if the diameter of the semiconductor wafer W is φ300 mm, the diameter is φ270 mm to φ280 mm (φ270 mm in this embodiment). Each substrate support pin 77 is made of quartz. Multiple substrate support pins 77 may be provided on the upper surface of the retaining plate 75 by welding, or they may be processed integrally with the retaining plate 75.

[0051] Returning to Figure 5, the four connecting parts 72 erected on the base ring 71 are fixed to the peripheral edge of the holding plate 75 of the susceptor 74 by welding. In other words, the susceptor 74 and the base ring 71 are fixedly connected by the connecting parts 72. The holding part 7 is mounted in the heat treatment chamber 6 by the base ring 71 of the holding part 7 being supported by the wall surface of the heat treatment chamber 6. When the holding part 7 is mounted in the heat treatment chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal position (a position in which the normal coincides with the vertical direction). In other words, the holding surface 75a of the holding plate 75 is a horizontal plane.

[0052] The semiconductor wafer W, transported into the heat treatment chamber 6 by the transport robot TR, is placed and held in a horizontal position on the susceptor 74 of the holding unit 7 mounted on the heat treatment chamber 6. At this time, the semiconductor wafer W is supported by 12 substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support it. Since the height of the 12 substrate support pins 77 (the distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the semiconductor wafer W can be supported in a horizontal position by the 12 substrate support pins 77.

[0053] Furthermore, the semiconductor wafer W is supported by a plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.

[0054] Furthermore, as shown in Figures 5 and 6, the holding plate 75 of the susceptor 74 has an opening 78 that penetrates vertically. The opening 78 is provided for the lower radiation thermometer 20 to receive synchrotron radiation (infrared light) emitted from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 measures the temperature of the semiconductor wafer W by receiving light emitted from the lower surface of the semiconductor wafer W through the opening 78 and a transparent window 21 fitted in a through hole 61b of the chamber side portion 61. In addition, the holding plate 75 of the susceptor 74 has four through holes 79 through which the lift pins 12 of the transfer mechanism 10, which will be described later, pass for the transfer of the semiconductor wafer W.

[0055] Figure 8 is a plan view of the transfer mechanism 10. Figure 9 is a side view of the transfer mechanism 10. The transfer mechanism 10 comprises two transfer arms 11. The transfer arms 11 are shaped like arcs that generally follow the annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 moves the pair of transfer arms 11 horizontally between a transfer operation position (solid line position in Figure 8) where the semiconductor wafer W is transferred to the holding part 7, and a retracted position (dotted line position in Figure 8) where the arms do not overlap with the semiconductor wafer W held by the holding part 7 in a plan view. The transfer operation position is below the susceptor 74, and the retracted position is outward from the susceptor 74. The horizontal movement mechanism 13 may consist of individual motors that rotate each transfer arm 11, or it may consist of a linkage mechanism that uses a single motor to rotate a pair of transfer arms 11 in conjunction.

[0056] Furthermore, the pair of transfer arms 11 are moved up and down together with the horizontal movement mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lift pins 12 pass through through holes 79 (see Figures 5 and 6) drilled in the susceptor 74, and the upper ends of the lift pins 12 protrude from the upper surface of the susceptor 74. On the other hand, when the lifting mechanism 14 lowers the pair of transfer arms 11 to the transfer operation position and removes the lift pins 12 from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 to open, each transfer arm 11 moves to a retracted position. The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding part 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arms 11 is inside the recess 62. Furthermore, an exhaust mechanism (not shown) is also provided near the area where the drive unit (horizontal movement mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is located, so that the atmosphere around the drive unit of the transfer mechanism 10 is discharged to the outside of the heat treatment chamber 6.

[0057] Returning to Figure 4, the flash lamp house 5, located above the heat treatment chamber 6, is constructed with a light source consisting of multiple (30 in this embodiment) xenon flash lamps FL inside a housing 51, and a reflector 52 provided to cover the top of the light source. A lamp light emission window 53 is also attached to the bottom of the housing 51 of the flash lamp house 5. The lamp light emission window 53, which constitutes the floor of the flash lamp house 5, is a plate-shaped quartz window made of quartz. As the flash lamp house 5 is installed above the heat treatment chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamps FL irradiate the heat treatment space 65 with flash light from above the heat treatment chamber 6 through the lamp light emission window 53 and the upper chamber window 63.

[0058] Each of the multiple flash lamps FL is a rod-shaped lamp with a long cylindrical shape, and they are arranged in a planar manner such that their longitudinal directions are parallel to each other along the main surface (i.e., along the horizontal direction) of the semiconductor wafer W held by the holding part 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0059] A xenon flash lamp FL comprises a cylindrical glass tube (discharge tube) containing xenon gas, with an anode and cathode connected to capacitors at both ends, and a trigger electrode attached to the outer surface of the glass tube. Since xenon gas is an electrically insulating material, electricity does not flow through the glass tube under normal conditions, even if charge is stored in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor flows instantaneously through the glass tube, and light is emitted due to the excitation of xenon atoms or molecules at that time. In such a xenon flash lamp FL, the electrostatic energy previously stored in the capacitor is converted into extremely short light pulses of 0.1 milliseconds to 100 milliseconds, giving it the characteristic of being able to emit extremely strong light compared to a continuously lit light source such as a halogen lamp HL. In other words, a flash lamp FL is a pulse-emitting lamp that emits light instantaneously in an extremely short time of less than one second. Furthermore, the illumination time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that provides power to the flash lamp FL.

[0060] Furthermore, the reflector 52 is positioned above the multiple flash lamps FL so as to cover them all. The basic function of the reflector 52 is to reflect the flash light emitted from the multiple flash lamps FL towards the heat treatment space 65. The reflector 52 is made of an aluminum alloy plate, and its surface (the side facing the flash lamps FL) is roughened by blasting.

[0061] The halogen lamp housing 4, located below the heat treatment chamber 6, contains multiple halogen lamps HL (40 in this embodiment) inside the housing 41. The multiple halogen lamps HL irradiate the heat treatment space 65 from below the heat treatment chamber 6 through the lower chamber window 64.

[0062] Figure 10 is a plan view showing the arrangement of multiple halogen lamps HL. In this embodiment, 20 halogen lamps HL are arranged in two rows, upper and lower. Each halogen lamp HL is a rod-shaped lamp with a long cylindrical shape. In both the upper and lower rows, the 20 halogen lamps HL are arranged so that their longitudinal directions are parallel to each other along the main surface (i.e., along the horizontal direction) of the semiconductor wafer W held by the holding part 7. Therefore, the plane formed by the arrangement of halogen lamps HL in both the upper and lower rows is a horizontal plane.

[0063] Furthermore, as shown in Figure 10, in both the upper and lower sections, the arrangement density of halogen lamps HL is higher in the region facing the periphery of the semiconductor wafer W held by the holding section 7 than in the region facing the center. In other words, in both the upper and lower sections, the arrangement pitch of halogen lamps HL is shorter at the periphery than at the center of the lamp arrangement. Therefore, a greater amount of light can be irradiated to the periphery of the semiconductor wafer W, which is prone to temperature drops during heating by light irradiation from halogen lamps HL.

[0064] Furthermore, the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged to intersect in a grid pattern. In other words, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each halogen lamp HL in the upper row is perpendicular to the longitudinal direction of each halogen lamp HL in the lower row.

[0065] The halogen lamp HL is a filament-type light source that emits light by passing an electric current through a filament placed inside a glass tube, causing the filament to become incandescent. Inside the glass tube is a gas containing trace amounts of halogen elements (iodine, bromine, etc.) introduced into an inert gas such as nitrogen or argon. By introducing halogen elements, it is possible to set the filament temperature to a high level while suppressing filament breakage. Therefore, the halogen lamp HL has the characteristics of having a longer lifespan and being able to continuously emit strong light compared to a normal incandescent light bulb. In other words, the halogen lamp HL is a continuous-lighting lamp that emits light continuously for at least 1 second or more. Furthermore, because the halogen lamp HL is a rod-shaped lamp, it has a long lifespan, and by arranging the halogen lamp HL horizontally, the radiation efficiency to the semiconductor wafer W above is excellent.

[0066] Furthermore, a reflector 43 is also provided inside the casing 41 of the halogen lamp house 4, below the two-tiered halogen lamps HL (Figure 4). The reflector 43 reflects the light emitted from the multiple halogen lamps HL towards the heat treatment space 65.

[0067] In addition to the above configuration, the heat treatment unit 160 is equipped with various cooling structures to prevent excessive temperature rise in the halogen lamp housing 4, flash lamp housing 5, and heat treatment chamber 6 due to thermal energy generated from the halogen lamp HL and flash lamp FL during the heat treatment of semiconductor wafers W. For example, water cooling pipes (not shown) are provided in the wall of the heat treatment chamber 6. The halogen lamp housing 4 and flash lamp housing 5 are also air-cooled structures that create a gas flow inside to dissipate heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash lamp housing 5 and the upper chamber window 63.

[0068] The control unit 3 of the substrate processing apparatus 100 controls the various operating mechanisms provided in the substrate processing apparatus 100. The hardware configuration of the control unit 3 is similar to that of a general computer. Specifically, the control unit 3 includes a CPU, which is a circuit for performing various calculations; a ROM, which is a read-only memory for storing basic programs; a RAM, which is a read-write memory for storing various information; and a storage unit (e.g., a magnetic disk or SSD) for storing control software and data. Processing in the substrate processing apparatus 100 proceeds when the CPU of the control unit 3 executes a predetermined processing program. In Figure 1, the control unit 3 is shown near the transport robot TR, but it is not limited to this location, and the control unit 3 can be placed at any location within the substrate processing apparatus 100.

[0069] Next, the processing operation of the substrate processing apparatus 100 having the above configuration will be described. Figure 11 is a flowchart showing the procedure of the processing operation in the substrate processing apparatus 100. A pattern is formed on the surface of the silicon semiconductor wafer W to be processed, and a film of SiN or the like may be formed on the back surface of the opposite side. The processing procedure of the substrate processing apparatus 100 described below proceeds as the control unit 3 controls each operating mechanism of the substrate processing apparatus 100.

[0070] First, a transport robot TR takes an unprocessed semiconductor wafer W from a carrier C placed on one of the load ports LP and loads it into the liquid processing chamber 111 of the liquid processing unit 110 (step S1). The transport robot TR loads the semiconductor wafer W into the liquid processing chamber 111 through the loading / unloading inlet 112, which is opened by the gate valve 113, and transfers it to the spin base 120. The spin base 120 holds the semiconductor wafer W by gripping its outer edge with a plurality of chuck pins 121. A gap of a certain interval is formed between the lower surface of the semiconductor wafer W, which is gripped by the plurality of chuck pins 121, and the upper surface of the spin base 120. The semiconductor wafer W is held in the spin base 120 with the patterned surface facing upwards.

[0071] After the transport robot TR, which has loaded the semiconductor wafer W, exits the liquid processing chamber 111, the gate valve 113 closes the loading / unloading inlet 112. This creates a semi-sealed space inside the liquid processing chamber 111. Then, the FFU 118 supplies clean air downwards, and the exhaust duct 119 exhausts the air, creating a downflow of clean air inside the liquid processing chamber 111.

[0072] Furthermore, after the spin base 120 holds the semiconductor wafer W to be processed, the cup 150 rises and surrounds the spin base 120. In this state, the spin motor 130 starts rotating the spin base 120 and the semiconductor wafer W, and the chemical valve 145 opens, supplying hydrofluoric acid to the back surface of the semiconductor wafer W from the discharge port 126 (step S2). When the chemical valve 145 opens, the hydrofluoric acid sent from the chemical supply source 144 flows through the supply pipe 141 and the flow path 125 and is discharged from the discharge port 126 toward the center of the back surface of the semiconductor wafer W.

[0073] Hydrofluoric acid deposited in the center of the back surface of the semiconductor wafer W flows toward the periphery of the wafer due to centrifugal force generated by the rotation of the semiconductor wafer W. As a result, hydrofluoric acid is supplied to the entire back surface of the semiconductor wafer W, and the etching process on that back surface proceeds. Hydrofluoric acid scattered from the edges of the semiconductor wafer W due to centrifugal force is collected by the cup 150. Furthermore, in order to prevent highly corrosive hydrofluoric acid vapor from acting on the surface of the semiconductor wafer W, it is preferable to keep the supply flow rate of clean air from the FFU 118 and the exhaust flow rate from the exhaust duct 119 relatively higher than in other processes during the etching process in step S2.

[0074] Figure 12 is a diagram illustrating the etching process of the back surface of a semiconductor wafer W using hydrofluoric acid. Scratches DF may be present on the back surface of the semiconductor wafer W. Such scratches DF are generated and accumulated during processing and transport in the previous step, and occur regardless of whether a thin film is formed on the back surface of the semiconductor wafer W. Stress concentration is likely to occur in scratches DF, and particularly large residual stress is concentrated at the tip of the scratch DF. When flash light is irradiated onto the surface of a semiconductor wafer W with scratches DF using a heat treatment unit 160, wafer cracking is likely to occur due to the combined effects of residual stress concentrated in the scratches DF and thermal stress associated with flash light irradiation.

[0075] In this embodiment, residual stress acting on scratches DF on the back surface of the semiconductor wafer W is relieved by supplying hydrofluoric acid to the back surface and performing an etching process. In other words, by smoothing the scratches DF on the back surface through etching with hydrofluoric acid, the residual stress acting on those scratches DF is relieved.

[0076] To alleviate residual stress acting on a defect DF on the back surface of a semiconductor wafer W by etching, the concentration of hydrofluoric acid supplied to the back surface must be between 1 mass% and 49 mass%. Depending on the condition of the back surface of the semiconductor wafer W, it is preferable to set the hydrofluoric acid concentration to an appropriate value within the range of 1 mass% and 49 mass%. For example, if a SiN film is formed on the back surface of the semiconductor wafer W, the back surface is relatively easy to etch with hydrofluoric acid, so it is preferable to relatively lower the hydrofluoric acid concentration and shorten the etching time. On the other hand, if no film is formed on the back surface of the semiconductor wafer W and Si is exposed, the back surface is relatively difficult to etch with hydrofluoric acid, so it is preferable to relatively increase the hydrofluoric acid concentration and lengthen the etching time. If the hydrofluoric acid concentration is 49 mass% and the etching time is at least 8 minutes and no more than 40 minutes, the residual stress acting on the defect DF can be alleviated.

[0077] Hydrofluoric acid is a dangerous chemical, and handling becomes difficult when its concentration exceeds 49 mass%. Furthermore, if the hydrofluoric acid concentration exceeds 49 mass%, the corrosive effect becomes excessively strong, potentially damaging the back surface of the semiconductor wafer W. On the other hand, if the hydrofluoric acid concentration is less than 1 mass%, the corrosive effect becomes too weak, making it difficult to smooth the scratches DF and alleviate the residual stress acting on them, even with a considerably long etching time. Therefore, the concentration of hydrofluoric acid supplied to the back surface of the semiconductor wafer W is limited to between 1 mass% and 49 mass%. However, to obtain a more realistic corrosive effect and etching time, it is preferable to use a hydrofluoric acid concentration between 20 mass% and 40 mass%.

[0078] After the etching process by supplying hydrofluoric acid to the back surface of the semiconductor wafer W is completed, a rinsing process is performed by supplying pure water to the back surface (step S3). Specifically, by closing the chemical valve 145 and opening the rinsing valve 147, pure water sent from the rinsing source 146 flows through the supply pipe 141 and the flow path 125 and is discharged from the discharge port 126 toward the center of the back surface of the semiconductor wafer W.

[0079] The pure water applied to the center of the back surface of the semiconductor wafer W flows towards the periphery of the wafer due to the centrifugal force generated by the rotation of the semiconductor wafer W. This washes away any hydrofluoric acid adhering to the back surface of the semiconductor wafer W. As a result, the back surface of the semiconductor wafer W is cleaned and etching stops. The pure water that is scattered from the edges of the semiconductor wafer W due to centrifugal force is also collected by cup 150.

[0080] Next, the rinsing process with pure water is completed and the semiconductor wafer W is dried (step S4). Specifically, the rinsing liquid valve 147 is closed and the spin motor 130 increases the rotation speed of the semiconductor wafer W. As the semiconductor wafer W rotates at high speed, the droplets adhering to the semiconductor wafer W are shaken off by centrifugal force, and so-called spin-drying is performed.

[0081] After the drying process of the semiconductor wafer W is completed, the transport robot TR transports the semiconductor wafer W from the liquid processing unit 110 to the heat processing unit 160 (step S5). When the drying process of the semiconductor wafer W is complete, the spin motor 130 stops the rotation of the semiconductor wafer W, and the gate valve 113 opens the discharge inlet 112. Also, the cup 150 lowers below the spin base 120. The transport robot TR enters the liquid processing chamber 111 through the opened discharge inlet 112 and receives the liquid-treated semiconductor wafer W from the spin base 120. At this time, the multiple chuck pins 121 move to the open position and release the semiconductor wafer W from being gripped. The transport robot TR, having received the semiconductor wafer W, exits the liquid processing chamber 111 and transports the semiconductor wafer W to the heat processing chamber 6 of the heat processing unit 160.

[0082] The explanation of the heat treatment of the semiconductor wafer W in the heat treatment unit 160 will continue. First, prior to the processing of the semiconductor wafer W, the supply valve 84 is opened, and the exhaust valve 89 and valve 192 are opened to start supplying and exhausting air into the heat treatment chamber 6. When the supply valve 84 is opened, nitrogen gas is supplied to the heat treatment space 65 from the gas supply hole 81. Also, when the exhaust valve 89 is opened, the gas in the heat treatment chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the top of the heat treatment space 65 in the heat treatment chamber 6 flows downward and is exhausted from the bottom of the heat treatment space 65.

[0083] Furthermore, when valve 192 is opened, gas from inside the heat treatment chamber 6 is exhausted from the transport opening 66. In addition, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). During the heat treatment of the semiconductor wafer W in the heat treatment unit 160, nitrogen gas is continuously supplied to the heat treatment space 65, and the amount supplied is changed as appropriate according to the processing step.

[0084] Next, the gate valve 185 opens, the transport opening 66 is opened, and the transport robot TR transports the liquid-treated semiconductor wafer W into the heat treatment space 65 inside the heat treatment chamber 6 through the transport opening 66. At this time, there is a risk of the outside atmosphere being drawn in as the semiconductor wafer W is transported in, but since nitrogen gas is continuously supplied to the heat treatment chamber 6, the nitrogen gas flows out from the transport opening 66, minimizing the drawing in of such the outside atmosphere.

[0085] The semiconductor wafer W, loaded by the transport robot TR, moves forward to a position directly above the holding section 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retracted position to the transfer operation position and rise, causing the lift pin 12 to protrude from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79 and receive the semiconductor wafer W. At this time, the lift pin 12 rises above the upper end of the substrate support pin 77.

[0086] After the semiconductor wafer W is placed on the lift pin 12, the transport robot TR exits the heat treatment space 65, and the transport opening 66 is closed by the gate valve 185. Then, as the pair of transfer arms 11 descend, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding section 7 and held from below in a horizontal position. The semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. The semiconductor wafer W is also held in the holding section 7 with the patterned surface facing upwards. A predetermined gap is formed between the back surface of the semiconductor wafer W, which is supported by the plurality of substrate support pins 77, and the holding surface 75a of the holding plate 75. The pair of transfer arms 11, which have descended to below the susceptor 74, are retracted to a retracted position, i.e., inside the recess 62, by the horizontal movement mechanism 13.

[0087] After the semiconductor wafer W is held horizontally from below by the susceptor 74 of the holding part 7 made of silica, 40 halogen lamps HL are lit simultaneously to start preheating (assisted heating) (step S6). The halogen light emitted from the halogen lamps HL passes through the lower chamber window 64 and the susceptor 74, which are made of silica, and irradiates the lower surface of the semiconductor wafer W. The semiconductor wafer W is preheated and its temperature rises due to the light irradiation from the halogen lamps HL. The transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, so it does not interfere with heating by the halogen lamps HL.

[0088] When preheating is performed using a halogen lamp HL, the temperature of the semiconductor wafer W is measured by a lower radiation thermometer 20. Specifically, the lower radiation thermometer 20 receives infrared light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through an opening 78 to measure the wafer temperature as it heats up. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W, which is heated by light irradiation from the halogen lamp HL, has reached a predetermined preheating temperature T1, and controls the output of the halogen lamp HL. In other words, the control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value from the lower radiation thermometer 20 so that the temperature of the semiconductor wafer W reaches the preheating temperature T1.

[0089] After the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at that preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W, as measured by the lower radiation thermometer 20, reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W at approximately the preheating temperature T1.

[0090] By performing preheating with halogen lamps HL in this manner, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. During the preheating stage with halogen lamps HL, the temperature of the peripheral parts of the semiconductor wafer W, where heat dissipation is more likely, tends to be lower than that of the central part. However, the density of halogen lamps HL in the halogen lamp housing 4 is higher in the region facing the peripheral parts of the semiconductor wafer W than in the region facing the central part. As a result, more light is irradiated to the peripheral parts of the semiconductor wafer W where heat dissipation is more likely, making it possible to achieve a uniform in-plane temperature distribution of the semiconductor wafer W during the preheating stage.

[0091] When the semiconductor wafer W reaches the preheating temperature T1 and a predetermined time has elapsed, the flash lamp FL irradiates the surface of the semiconductor wafer W with flash light (step S7). At this time, a portion of the flash light emitted from the flash lamp FL goes directly into the heat treatment chamber 6, and another portion is reflected by the reflector 52 before going into the heat treatment chamber 6, and the semiconductor wafer W is flash-heated by the irradiation of these flash lights.

[0092] The flash light emitted from the flash lamp FL is an extremely short and intense flash of light with an irradiation time of approximately 0.1 milliseconds to 100 milliseconds, obtained by converting electrostatic energy previously stored in a capacitor into an extremely short light pulse. When such an extremely short and intense flash of light is emitted, the surface temperature of the semiconductor wafer W instantaneously rises to a processing temperature T2 of over 1000°C, and then rapidly decreases.

[0093] When a flash of light is irradiated, the surface temperature of the semiconductor wafer W rises rapidly compared to the back surface temperature, causing rapid thermal expansion only near the surface of the semiconductor wafer W. As a result, the semiconductor wafer W deforms so that its surface becomes convex, and a large amount of thermal stress acts on the semiconductor wafer W. In this embodiment, residual stress acting on the scratches DF on the back surface of the semiconductor wafer W is relieved by etching with hydrofluoric acid. As a result, even if the semiconductor wafer W deforms rapidly and a large amount of thermal stress acts on it when irradiated with a flash of light, the residual stress acting on the scratches DF is relieved, thus preventing the semiconductor wafer W from cracking.

[0094] After the flash heating process is completed, the halogen lamp HL is turned off after a predetermined time has elapsed. This causes the semiconductor wafer W to rapidly cool down from the preheating temperature T1. The temperature of the semiconductor wafer W during the cooling process is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has cooled down to a predetermined temperature based on the measurement result of the lower radiation thermometer 20. After the temperature of the semiconductor wafer W has cooled down to below the predetermined temperature, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally again from the retracted position to the transfer operation position and rise, causing the lift pin 12 to protrude from the upper surface of the susceptor 74 and receive the heat-treated semiconductor wafer W from the susceptor 74. Subsequently, the transport opening 66, which had been closed by the gate valve 185, is opened, and the semiconductor wafer W placed on the lift pin 12 is transported out of the heat treatment chamber 6 by the transport robot TR, completing the heat treatment of the semiconductor wafer W (step S8). The transport robot TR returns the processed semiconductor wafer W, which has been unloaded from the heat treatment unit 160, to the carrier C placed on the load port LP.

[0095] In this embodiment, hydrofluoric acid is supplied to the back surface of the semiconductor wafer W as a pretreatment before flash heating, and etching is performed on the back surface. This relieves the residual stress acting on the scratches DF present on the back surface of the semiconductor wafer W. Subsequently, the semiconductor wafer W is flash-heated by irradiating the surface with flash light. By irradiating the surface with flash light while the residual stress acting on the scratches DF on the back surface of the semiconductor wafer W has been relieved, it is possible to prevent cracking of the semiconductor wafer W originating from the scratches DF, even when the semiconductor wafer W deforms due to rapid thermal expansion of the surface and large thermal stress acts on the semiconductor wafer W. Accordingly, it becomes possible to set the processing temperature (peak temperature) T2 of the surface of the semiconductor wafer W during flash light irradiation higher than in the conventional method.

[0096] In this embodiment, even if a semiconductor wafer W has a scratch DF, the flash heating treatment is not stopped. Instead, the residual stress acting on the scratch DF is relieved by etching, and then flash light irradiation is performed. In other words, by following this embodiment, it is possible to prevent cracking of the semiconductor wafer W even when flash light is irradiated onto a semiconductor wafer W with a scratch DF. Therefore, even if a scratch DF is present on the back surface of the semiconductor wafer W, the flash heating treatment can be performed without wasting the semiconductor wafer W, and no downtime occurs for the substrate processing apparatus 100.

[0097] Furthermore, in this embodiment, etching and flash heating treatments are performed on all semiconductor wafers W included in the lot. Therefore, residual stress acting on the scratches is relieved for all semiconductor wafers W, including those with extremely fine scratches, and wafer cracking during flash light irradiation can be prevented.

[0098] Furthermore, in this embodiment, the liquid treatment chamber 111 of the liquid treatment unit 110 and the heat treatment chamber 6 of the heat treatment unit 160 are in-line within a common substrate processing apparatus 100. Therefore, it is possible to suppress the introduction of new scratches on the semiconductor wafer W when it is transported from the liquid treatment chamber 111 to the heat treatment chamber 6. In addition, after the residual stress acting on the scratches DF on the back surface of the semiconductor wafer W is relieved in the liquid treatment unit 110, the semiconductor wafer W can be flash-lit in the heat treatment unit 160 before stress concentration occurs again at the scratches DF. As a result, cracking of the semiconductor wafer W can be prevented more effectively.

[0099] While embodiments of the present invention have been described above, various modifications can be made to this invention without departing from its spirit. For example, in the above embodiments, hydrofluoric acid was used as the chemical solution to etch the back surface of the semiconductor wafer W, but the chemical solution is not limited to hydrofluoric acid and may be other liquids that have etching properties. Specifically, the chemical solution used in the liquid processing unit 110 may be hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid. Hydrofluoric acid is a mixture of hydrofluoric acid and nitric acid and has a strong corrosive effect. Buffered hydrofluoric acid is a liquid obtained by mixing hydrofluoric acid with a buffering agent such as ammonium fluoride.

[0100] Furthermore, two or more of the following chemicals may be used: hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid. In this case, multiple liquid treatment chambers may be provided within the substrate processing apparatus 100, and different chemicals may be used in each liquid treatment chamber.

[0101] Furthermore, one of the above-mentioned chemical solutions may be selected and used depending on the type and quality of the thin film formed on the semiconductor wafer W to be processed. Alternatively, the concentration of the chemical solution and / or the etching time may be changed depending on the type and quality of the thin film formed on the semiconductor wafer W. The type and quality of the thin film formed on the semiconductor wafer W can be identified, for example, from a recipe set for each semiconductor wafer W to be processed. For example, if a relatively easily etchable (soft) thin film is formed on the back surface of the semiconductor wafer W, the concentration of the chemical solution should be lowered and / or the etching time should be shortened. Conversely, if a relatively difficult-to-etch (hard) thin film is formed on the back surface of the semiconductor wafer W, the concentration of the chemical solution should be increased and / or the etching time should be lengthened.

[0102] Furthermore, in the above embodiment, the surface of the semiconductor wafer W was processed with the top surface facing upwards in the liquid processing unit 110. However, instead, the surface of the semiconductor wafer W may be processed with the bottom surface facing downwards. In this case, a nozzle for supplying a chemical solution such as hydrofluoric acid is provided above the spin base 120, and the chemical solution is supplied from the top to the back surface of the semiconductor wafer W.

[0103] Furthermore, the substrate processing apparatus 100 may be equipped with a scratch detection unit that detects scratches present on the back surface of the semiconductor wafer W. Examples of such a scratch detection unit include one that detects scratches by analyzing an image of the back surface of the semiconductor wafer W using predetermined image processing. For semiconductor wafers W in which scratches have been detected by the scratch detection unit, the etching process time in the liquid processing unit 110 may be extended, for example. Alternatively, the etching process in the liquid processing unit 110 may be performed only on semiconductor wafers W in which scratches have been detected by the scratch detection unit. However, semiconductor wafers W may have minute scratches that cannot be detected by image processing, and even such minute scratches can cause stress concentration and lead to wafer cracking. Therefore, performing etching on all semiconductor wafers W included in the lot, as in the above embodiment, can reliably prevent cracking.

[0104] Furthermore, although the flash lamp housing 5 is equipped with 30 flash lamps FL in the above embodiment, it is not limited to this, and the number of flash lamps FL can be any number. Also, the flash lamps FL are not limited to xenon flash lamps, but may be krypton flash lamps. Similarly, the number of halogen lamps HL provided in the halogen lamp housing 4 is not limited to 40, but can be any number.

[0105] Furthermore, in the above embodiment, a filament-type halogen lamp HL was used as a continuous-lighting lamp that emitted light continuously for 1 second or more to perform the preheating treatment of the semiconductor wafer W. However, the invention is not limited to this, and a discharge-type arc lamp (for example, a xenon arc lamp) or an LED lamp may be used as a continuous-lighting lamp instead of the halogen lamp HL to perform the preheating treatment. [Explanation of Symbols]

[0106] 3. Control Unit 4. Halogen lamp housing 5. Flash Lamp House 6. Heat treatment chamber 7 Holding part 10 Transfer mechanism 65 Heat treatment space 74 Susceptors 100 Substrate Processing Equipment 110 Liquid Processing Section 111 Liquid Processing Chamber 120 spin base 130 Spin Motor 140 Liquid supply section 160 Heat treatment section C Career FL Flash Lamp HL halogen lamp LP Loadport TR Transport Robot W Semiconductor wafer

Claims

1. A substrate processing method comprising heating the substrate by irradiating it with a flash of light, An etching process in which a chemical solution is supplied to the back surface of the substrate and etching is performed on the back surface, After the etching step, a flash light irradiation step is performed in which the surface of the substrate is heated by irradiating it with flash light, A substrate processing method comprising the following:

2. In the substrate processing method according to claim 1, The etching process is a substrate processing method that relieves residual stress acting on scratches formed on the back surface of the substrate.

3. In the substrate processing method according to claim 1, A substrate treatment method wherein the chemical solution is hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid.

4. In the substrate processing method according to claim 3, The aforementioned chemical solution is hydrofluoric acid. A substrate treatment method wherein the concentration of hydrofluoric acid in the chemical solution is 1 mass% or more and 49 mass% or less.

5. In the substrate processing method according to any one of claims 1 to 4, Between the etching step and the flash light irradiation step, A rinsing step in which pure water is supplied to the back surface of the substrate to clean the back surface, A drying step for drying the substrate, A substrate processing method that further includes the features mentioned above.

6. A substrate processing apparatus that heats a substrate by irradiating it with a flash of light, A liquid processing unit that supplies a chemical solution to the back surface of a substrate and performs etching on the back surface, A heat treatment unit that heats the substrate by irradiating the surface of the etched substrate with flash light, A substrate processing apparatus equipped with the following:

7. In the substrate processing apparatus according to claim 6, A substrate processing apparatus for relieving residual stress acting on scratches formed on the back surface of the substrate by the etching process.

8. In the substrate processing apparatus according to claim 6, The aforementioned chemical solution is hydrofluoric acid, nitric acid, hydrofluoric acid, or buffered hydrofluoric acid in a substrate processing apparatus.

9. In the substrate processing apparatus according to claim 8, The aforementioned chemical solution is hydrofluoric acid. A substrate processing apparatus wherein the concentration of hydrofluoric acid in the aforementioned chemical solution is 1 mass% or more and 49 mass% or less.

10. In the substrate processing apparatus according to any one of claims 6 to 9, The liquid processing unit is a substrate processing apparatus that, after etching, performs a rinsing process in which pure water is supplied to the back surface of the substrate to clean the back surface, and a drying process in which the substrate is dried.

Citation Information

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