Information processing systems and memory systems

Abstract

This provides a memory system useful for identifying the type of individual data. [Solution] According to the embodiment, the information processing system includes a plurality of memory systems and a storage controller. The storage controller assigns a first identifier and a second identifier to a first write request requesting the writing of original data and a second write request requesting the writing of mirrored data, respectively. Each controller of the plurality of memory systems writes the first data to a first destination block when it determines that the identifier included in the write request received from the storage controller is the first identifier, and writes the first data to a second destination block when it determines that the identifier included in the received write request is the second identifier.

Description

Technical Field

[0006] , , , , ,

[0001] Embodiments of the present invention relate to an information processing system and a memory system.

Background Art

[0002] A memory system including a non-volatile memory and a controller is known.

[0003] In such a memory system, when different types of data are mixed in the same block of the non-volatile memory, the efficiency of garbage collection decreases, and as a result, write amplification increases.

[0004] Also, in an information processing system including a plurality of memory systems, Redundant Arrays of Independent Disks (RAID) may be used to improve the tolerance to failures of the memory systems. Even in an information processing system using RAID, the write amplification of each memory system may increase.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] A problem to be solved by one embodiment of the present invention is to provide an information processing system and a memory system useful for reducing write amplification. [Means for solving the problem]

[0007] The information processing system according to the embodiment comprises a plurality of memory systems and a storage controller configured to control the plurality of memory systems. The storage controller assigns a first identifier indicating that the data to be written is original data and a second identifier indicating that the data to be written is mirror data to a first write request requesting the writing of original data and a second write request requesting the writing of mirror data which is a copy of the original data. The storage controller transmits the first write request, including the first identifier, to one of the plurality of memory systems, and transmits the second write request, including the second identifier, to another of the plurality of memory systems. Each of the plurality of memory systems comprises a non-volatile memory, each containing a plurality of blocks which are units of data erasure operations, and a controller configured to control the non-volatile memory. The controller manages a first write destination block to which the original data should be written and a second write destination block to which the mirror data should be written. When the controller receives a write request requesting the writing of first data from the storage controller, it determines whether the identifier included in the received write request is the first identifier or the second identifier. The controller writes the first data to the first destination block in response to determining that the identifier included in the received write request is the first identifier. The controller writes the first data to the second destination block in response to determining that the identifier included in the received write request is the second identifier. [Brief explanation of the drawing]

[0008] [Figure 1]A block diagram showing an example configuration of the memory system according to the first embodiment. [Figure 2] A block diagram showing an example configuration of an information processing system according to the first embodiment. [Figure 3A] A flowchart illustrating an example of the procedure for write control processing performed by the storage controller according to the first embodiment. [Figure 3B] A flowchart illustrating an example of the procedure for a write control process performed by the memory system according to the first embodiment. [Figure 4] A block diagram showing an example configuration of an information processing system according to the second embodiment. [Figure 5] A flowchart showing an example of the procedure for RAID level conversion processing performed in the storage controller according to the second embodiment. [Figure 6] A block diagram showing an example configuration of a memory system according to the third embodiment. [Figure 7] A block diagram showing an example configuration of an information processing system according to the third embodiment. [Figure 8] A flowchart showing an example of the procedure for a write operation performed in the memory system according to the third embodiment. [Figure 9] A flowchart showing an example of the procedure for the first RAID level conversion process performed in the memory system according to the third embodiment. [Figure 10] A flowchart showing an example of the procedure for the second RAID level conversion process performed in the memory system according to the third embodiment. [Figure 11] A flowchart showing an example of the procedure for the third RAID level conversion process performed in the memory system according to the third embodiment. [Figure 12] A block diagram illustrating the read control process executed in the memory system according to the third embodiment. [Figure 13] A flowchart showing an example of the procedure for read control processing performed in the memory system according to the third embodiment. [Figure 14]Block diagram showing a configuration example of an information processing system according to the fourth embodiment.

Mode for Carrying Out the Invention

[0009] Hereinafter, embodiments will be described with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing a configuration example of a memory system 1 according to the first embodiment. The memory system 1 is a semiconductor storage device such as a universal flash storage (UFS) or a solid state drive (SSD). Hereinafter, the memory system 1 will be described as the SSD 1.

[0010] The SSD 1 can be connected to an external host or an external storage controller, and based on a request from the host or the storage controller, executes a write control process for writing data to the non-volatile memory included in the SSD 1 and a read control process for reading data from the non-volatile memory.

[0011] The SSD 1 includes a memory controller 11, a dynamic random access memory (DRAM) 12, and a non-volatile memory 13. The non-volatile memory 13 is, for example, a NAND-type flash memory. Hereinafter, the non-volatile memory 13 will be referred to as the NAND-type flash memory 13.

[0012] The memory controller 11 is a controller having a circuit and is realized as, for example, a large-scale integration (LSI) such as a system-on-a-chip (SoC).

[0013] The memory controller 11 functions as a flash translation layer (FTL) configured to perform data management and block management of the NAND flash memory 13. The data management executed by this FTL includes (1) management of mapping information, which is information indicating the correspondence between each logical address and each physical address of the NAND flash memory 13, and (2) processing for hiding the difference between the data read / write operation in page units and the data erase operation in block units. The block management includes management of bad blocks, wear leveling, and garbage collection.

[0014] The management of the mapping between each logical address and each physical address is executed using a logical-to-physical address conversion (L2P) table 301. The memory controller 11 uses the L2P table 301 to manage the mapping between each logical address and each physical address in specific management size units. The L2P table 301 is used to convert a certain logical address to the physical address corresponding to that logical address. The physical address corresponding to a certain logical address indicates the physical storage location in the NAND flash memory 13 where the data corresponding to this logical address is written. The L2P table 301 may be loaded from the NAND flash memory 13 into the DRAM 12 when the SSD 1 is powered on.

[0015] Data can only be written to one page of the NAND flash memory 13 once per program / erase cycle. Therefore, the memory controller 11 writes the update data corresponding to a certain logical address to a different physical memory location, rather than to the physical memory location where the previous data corresponding to that logical address is stored. The memory controller 11 then invalidates the previous data by updating the L2P table 301 to associate this logical address with this different physical memory location. Data referenced from the L2P table 301 (i.e., data associated with a logical address) is called valid data. Data not associated with any logical address is called invalid data. Valid data is data that may be read by host 2 later. Invalid data is data that can no longer be read by host 2.

[0016] Furthermore, the memory controller 11 also performs the process of converting a physical address to a logical address corresponding to the data written to that physical address by referring to the physical-to-logical address translation (P2L) table 302. The P2L table 302 is also called the reverse lookup table.

[0017] The NAND flash memory 13 includes a plurality of physical blocks B0, B1, B2, ..., Bm-1. Each of the plurality of physical blocks B0, B1, B2, ..., Bm-1 includes a plurality of pages P0, ..., Pn-1. Each of the plurality of physical blocks B0, B1, B2, ..., Bm-1 is the smallest unit of data erasure operation. A physical block may also be referred to as a “memory block,” “erasure block,” or simply “block.” Each of the plurality of pages P0, ..., Pn-1 includes a plurality of memory cells connected to a single word line. Each of the plurality of pages P0, ..., Pn-1 is the unit of data write operation and data read operation, respectively.

[0018] There is an upper limit to the number of program / erase cycles (P / E cycles) for each physical block, which is called the maximum number of P / E cycles. One P / E cycle for a physical block includes a data erase operation to erase all memory cells in that physical block, and a data write operation (program operation) to write data to each page of that physical block.

[0019] The data erasure operation may be performed in units of superblocks, which are bundles of multiple physical blocks. One superblock may include, for example, multiple physical blocks, one selected from each of the multiple memory chips contained in the NAND flash memory 13. A configuration in which one superblock contains one physical block is also used; in this case, one superblock is equivalent to one physical block. In this embodiment, multiple blocks, each being a unit of the data erasure operation, are used as a group of physical resources for data writing. Each block may be a physical block or a superblock.

[0020] DRAM12 is a volatile memory. DRAM12 is provided with, for example, a storage area for the L2P table 301, a storage area for the P2L table 302, and a write buffer 303 for temporarily storing write data.

[0021] Next, the configuration of the memory controller 11 will be described.

[0022] The memory controller 11 includes, for example, a CPU 111, a host interface (host I / F) 112, a DRAM interface (DRAM I / F) 113, and a NAND interface (NAND I / F) 114. These CPU 111, host I / F 112, DRAM I / F 113, and NAND I / F 114 are interconnected, for example, via an internal bus 110.

[0023] The CPU 111 is a processor configured to control the host I / F 1122, NAND I / F 114, and DRAM I / F 113. The CPU 111 performs various processes by executing firmware loaded from the NAND flash memory 13 into the DRAM 12. The firmware is a control program containing a set of instructions that causes the CPU 111 to perform various processes. The CPU 111 can execute requests (commands) to process various requests (commands) from an external host or external storage controller. The operation of the CPU 111 is controlled by the firmware executed by the CPU 111.

[0024] The functions of each part within the memory controller 11 may be implemented by dedicated hardware within the memory controller 11, or by the CPU 111 executing firmware.

[0025] The host I / F112 functions as a circuit that receives various requests and data from the host or storage controller via the PCIe bus or network. It also functions as a circuit that transmits responses and data to requests to the host or storage controller via the PCIe bus or network. Furthermore, the host I / F112 may function as a circuit that transmits various requests, data, and responses to one or more other SSDs via the PCIe bus or network. It may also function as a circuit that receives various requests, data, and responses from one or more other SSDs via the PCIe bus or network.

[0026] The DRAM I / F113 functions as a DRAM control circuit configured to control access to DRAM12.

[0027] The NAND I / F114 is a NAND control circuit configured to control the NAND flash memory 13. The NAND I / F114 supports interface standards such as Toggle DDR and Open NAND Flash Interface (ONFI). The NAND I / F114 may be connected to multiple memory chips within the NAND flash memory 13 via multiple channels. By driving multiple memory chips in parallel, the access to the NAND flash memory 13 can be widened.

[0028] Next, we will explain the functional configuration of CPU111.

[0029] The CPU 111 includes a request processing unit 201 and a block management unit 202. Each of these request processing unit 201 and block management unit 202 is implemented, for example, by firmware. Alternatively, each of these request processing unit 201 and block management unit 202 may be implemented by dedicated hardware included in the memory controller 11.

[0030] The request processing unit 201 receives requests sent from the host, storage controller, or another SSD. Based on the received requests, the request processing unit 201 performs write control processing, read control processing, and various other processes.

[0031] The block management unit 202 manages multiple blocks contained in the NAND flash memory 13. Details of the configuration of the block management unit 202 will be described later.

[0032] Next, the configuration of the information processing system according to the first embodiment will be described. Figure 2 is a block diagram showing an example of the configuration of the information processing system according to the first embodiment.

[0033] The information processing system includes a host 2, a storage controller 500, and multiple SSDs 1 (here, SSD1-1, SSD1-2, and SSD1-3).

[0034] Host 2 is an information processing device such as a server or a personal computer.

[0035] The storage controller 500 is, for example, a RAID controller. The storage controller 500 is implemented as a device that can be connected to the host 2. Alternatively, the storage controller 500 may be implemented as hardware built into the host 2.

[0036] The storage controller 500 and SSDs 1-1, 1-2, and 1-3 are connected to a communication channel 3. The communication channel 3 is implemented, for example, using a network or a PCIe bus. In the case where the communication channel 3 is implemented using a PCIe bus, the storage controller 500 is connected to a PCIe switch via the corresponding PCIe bus. Each of SSDs 1-1, 1-2, and 1-3 is also connected to this PCIe switch via the corresponding PCIe bus.

[0037] The storage controller 500 controls multiple SSDs 1 (here, SSD1-1, SSD1-2, and SSD1-3) as an SSD array using RAID level 1 (mirroring) or RAID level 5 (erasure coding). RAID level 6 may be used instead of RAID level 5.

[0038] In the first embodiment, the storage controller 500 controls data writing to multiple SSDs 1 (SSD arrays) using mirroring. The storage controller 500 can also perform RAID level conversion processing. RAID level conversion processing is the process of converting the RAID level for multiple SSDs 1 from a level corresponding to mirroring (RAID-1) to a level corresponding to data loss correction (RAID-5). Details of the RAID level conversion processing will be described in the second embodiment.

[0039] The storage controller 500 includes an in-memory bank 501, an in-memory metadata cache 502, and an identifier assignment function unit 503.

[0040] The in-memory bank 501 is a storage area within the DRAM of the storage controller 500. The in-memory bank 501 is used to hold a predetermined amount of data to be written to the SSD array or data read from the storage array.

[0041] The in-memory metadata cache 502 is also a storage area within the DRAM of the storage controller 500. The in-memory metadata cache 502 is used to store metadata about each piece of data written to the storage array.

[0042] The identifier assignment function unit 503 assigns an identifier indicating the type of data to be written to write requests sent from the storage controller 500 to the SSD array. Specifically, the identifier assignment function unit 503 assigns an identifier to write requests that request the writing of original data, indicating that the data to be written is original data, that is, an identifier indicating that original data should be written. Here, the original data is the data specified in the write request from host 2. The identifier assignment function unit 503 also assigns an identifier to write requests that request the writing of mirror data, which is a copy of the original data, indicating that the data to be written is mirror data, that is, an identifier indicating that mirror data should be written. In this way, each write request is assigned one of two types of identifiers.

[0043] When performing a mirror write, the storage controller 500 sends a write request to a different SSD1 in the SSD array, requesting the writing of the original data and one or more write requests to write the mirror data, which is a copy of the original data. In this case, the write request for the original data is assigned an identifier indicating that the original data is to be written. On the other hand, each of the one or more write requests for the mirror data is assigned an identifier indicating that the mirror data is to be written. An example of the process for mirror writing is described below. In the following description, it is assumed that there is one mirror data for each original data.

[0044] When the storage controller 500 receives a write request for data (original data Org#0) from host 2, it duplicates this received write request to generate a write request requesting the write of mirror data Mrr#0, which is a copy of the original data Org#0. The received write request contains the logical address corresponding to the original data Org#0.

[0045] The storage controller 500 determines the destination SSD (e.g., SSD1-1) for writing the original data Org#0 and the destination SSD (e.g., SSD1-2) for writing the mirror data Mrr#0. The storage controller 500 adds an identifier (first identifier) ​​to the received write request (write request for original data Org#0) indicating that the original data is to be written, and adds an identifier (second identifier) ​​to the generated write request (write request for mirror data Mrr#0) indicating that the mirror data is to be written. The storage controller 500 then sends the write request for original data Org#0, including the first identifier, to SSD1-1, and sends the write request for mirror data Mrr#0, including the second identifier, to SSD1-2.

[0046] A write request for original data Org#0 includes the logical address corresponding to original data Org#0 and a first identifier. A write request for original data Org#0 may further include a data pointer indicating the location of original data Org#0 within in-memory bank 501 where it is stored. A write request for mirror data Mrr#0 includes the logical address corresponding to original data Org#0 and a second identifier. A write request for mirror data Mrr#0 may further include a data pointer indicating the location of original data Org#0 within in-memory bank 501 where it is stored.

[0047] If a data pointer is included in the write request for the original data Org#0, the memory controller 11 of SSD1-1 can retrieve the original data Org#0 from the in-memory bank 501. Also, if a data pointer is included in the write request for the mirror data Mrr#0, the memory controller 11 of SSD1-2 can retrieve the original data Org#0 as the mirror data Mrr#0 from the in-memory bank 501.

[0048] After the writing of the original data Org#0 and the mirror data Mrr#0 is complete, the storage controller 500 generates metadata for the original data Org#0 and stores the generated metadata in the in-memory metadata cache 502. The metadata for the original data Org#0 includes information for managing the SSDs to which the original data Org#0 and the mirror data Mrr#0 are located. For example, the metadata for the original data Org#0 includes the logical address corresponding to the original data Org#0, the identifier (device ID 0) of SSD1-1 to which the original data Org#0 is written, and the identifier (device ID 1) of SSD1-2 to which the mirror data Mrr#0 is written.

[0049] When the storage controller 500 receives a write request from host 2 for the following data (original data Org#1), it duplicates this write request to generate a write request for mirror data Mrr#1, which is a copy of original data Org#1. The write request for original data Org#1 includes the logical address corresponding to original data Org#1.

[0050] The storage controller 500 determines the destination SSD (e.g., SSD1-2) for writing the original data Org#1 and the destination SSD (e.g., SSD1-3) for writing the mirror data Mrr#1. The storage controller 500 assigns a first identifier to the write request for the original data Org#1 and a second identifier to the write request for the mirror data Mrr#1. The storage controller 500 then sends the write request for the original data Org#1, including the first identifier, to SSD1-2, and sends the write request for the mirror data Mrr#1, including the second identifier, to SSD1-3.

[0051] A write request for original data Org#1 includes the logical address corresponding to original data Org#1 and a first identifier. A write request for original data Org#1 may further include a data pointer indicating the location of original data Org#1 within in-memory bank 501 where it is stored. A write request for mirror data Mrr#1 includes the logical address corresponding to original data Org#1 and a second identifier. A write request for mirror data Mrr#1 may further include a data pointer indicating the location of original data Org#1 within in-memory bank 501 where it is stored.

[0052] If a data pointer is included in the write request for original data Org#1, the memory controller 11 of SSD1-2 can retrieve original data Org#1 from in-memory bank 501. Also, if a data pointer is included in the write request for mirror data Mrr#1, the memory controller 11 of SSD1-3 can retrieve original data Org#1 as mirror data Mrr#1 from in-memory bank 501.

[0053] After the writing of the original data Org#1 and the mirror data Mrr#1 is complete, the storage controller 500 generates metadata for the original data Org#1 and stores the generated metadata in the in-memory metadata cache 502. The metadata for the original data Org#1 is information for managing the SSDs to which the original data Org#1 and the mirror data Mrr#1 are located. The metadata for the original data Org#1 includes, for example, the logical address corresponding to the original data Org#1, the identifier (device ID 1) of SSD1-2 to which the original data Org#1 is written, and the identifier (device ID 2) of SSD1-3 to which the mirror data Mrr#1 is written.

[0054] In this way, the storage controller 500 assigns an identifier to each write request to be issued to the SSD array, indicating whether the data associated with the write request is original data or mirrored data, and sends the write request containing this identifier to the destination SSD in the SSD array. Therefore, each SSD 1 can determine whether the data associated with the write request received from the storage controller 500 is original data or mirrored data.

[0055] Here, we will describe the configuration of the block management unit 202 for each of SSD1-1, SSD1-2, and SSD1-3.

[0056] The block management unit 202 includes a free block pool 601, an original block pool 602, and a mirror block pool 603.

[0057] The free block pool 601 is a list of identifiers (a list of block IDs) for each free block, which is a block that does not contain valid data. The block management unit 202 uses the free block pool 601 to manage each free block (free physical block or free superblock) of the NAND flash memory 13.

[0058] The original block pool 602 is a list of identifiers (block IDs) for each original block, which is a block on which original data has already been written. The block management unit 202 uses the original block pool 602 to manage each original block (original physical block or original superblock) of the NAND flash memory 13.

[0059] The mirror block pool 603 is a list of identifiers (block IDs) for each mirror block, which is a block on which mirror data has already been written. The block management unit 202 uses the mirror block pool 603 to manage each mirror block (mirror physical block or mirror superblock) of the NAND flash memory 13.

[0060] The block management unit 202 assigns one free block (free physical block or free superblock) of the NAND flash memory 13 as the original write destination block 651, and another free block (free physical block or free superblock) of the NAND flash memory 13 as the mirror write destination block 652. The original write destination block 651 is the write destination block to which the original data should be written. The mirror write destination block 652 is the write destination block to which the original data should be written.

[0061] When the entire original destination block 651 is filled with original data, the original destination block 651 is managed as an original block in the original block pool 602, and one of the free blocks is allocated as the new original destination block 651.

[0062] When the entire mirror destination block 652 is filled with mirror data, the mirror destination block 652 is managed as a mirror block in the mirror block pool 602, and one of the free blocks is allocated as the new mirror destination block 652.

[0063] In this way, each memory controller 11 of SSD1-1, SSD1-2, and SSD1-3 manages the write destination block where the original data should be written (original write destination block 651) and the write destination block where the mirrored data should be written (mirror write destination block 652).

[0064] When a write request is received from the storage controller 500, each memory controller 11 of SSD1-1, SSD1-2, and SSD1-3 determines whether the identifier included in the received write request is the first identifier or the second identifier. If the identifier included in the received write request is the first identifier, the memory controller 11 selects the original write destination block 651 and writes the data associated with the received write request (original data) to the original write destination block 651. On the other hand, if the identifier included in the received write request is the second identifier, the memory controller 11 selects the mirror write destination block 652 and writes the data associated with the received write request (mirror data) to the mirror write destination block 652.

[0065] In the example in Figure 2, the write request for the original data Org#0 was sent to SSD1-1, so the original data Org#0 is written to the original write destination block 651 on SSD1-1. The write request for the mirror data Mrr#0 was sent to SSD1-2, so the mirror data Mrr#0 is written to the mirror write destination block 652 on SSD1-2.

[0066] Similarly, the original data Org#1 is written to the original write destination block 651 on SSD1-2, and the mirrored data Mrr#1 is written to the mirrored write destination block 652 on SSD1-3.

[0067] Next, we will describe the write control process performed in the storage controller 500. Figure 3A is a flowchart showing an example of the procedure for the write control process performed in the storage controller 500.

[0068] First, the storage controller 500 receives a write request (original write request) from the host 2 (step S101). The storage controller 500 then duplicates the received original write request (step S102). Hereafter, the write request generated by the duplication will be referred to as a mirror write request.

[0069] Next, the storage controller 500 determines which SSD1 should be written to in response to the original write request (hereinafter referred to as the original write destination SSD1) and which SSD1 should be written to in response to the mirror write request (hereinafter referred to as the mirror write destination SSD1) (step S103). The original write destination SSD1 and the mirror write destination SSD1 are different SSD1s. The storage controller 500 assigns different identifiers to the original write request and the mirror write request, respectively (step S104). Specifically, the storage controller 500 assigns an identifier (first identifier) ​​to the original write request that indicates that original data will be written. The storage controller 500 also assigns an identifier (second identifier) ​​to the mirror write request that indicates that mirror data will be written.

[0070] Then, the storage controller 500 sends the original write request to the original write destination SSD1 and the mirror write request to the mirror write destination SSD1 (step S105), and terminates the write control process.

[0071] Through the above write control process, the storage controller 500 can inform each SSD1 whether the data associated with each write request issued to the SSD array is original data or mirrored data.

[0072] Figure 3B is a flowchart showing an example of the write process performed on SSD1.

[0073] First, the memory controller 11 of SSD1 receives a write request from the storage controller 500 via the host I / F 112 (step S151). The memory controller 11 refers to the identifier included in the received write request and determines the destination block to which the data associated with the received write request should be written (step S152). Specifically, if the identifier of the write request is the first identifier, the memory controller 11 determines the original destination block 651 as the destination block. Conversely, if the identifier of the write request is the second identifier, the memory controller 11 determines the mirror destination block 652 as the destination block.

[0074] The memory controller 11 writes the data associated with the received write request to the determined destination block (step S153), and then terminates the write control process.

[0075] Through the above write control process, the memory controller 11 can write the original data and the mirrored data to different blocks, respectively.

[0076] If the write requests for mirror data Mrr#0 and original data Org#1 do not include identifiers, the memory controller 11 of SSD1-2 cannot determine whether the data associated with these write requests is original data or mirror data. As a result, mirror data Mrr#0 and original data Org#1 are written to the same block. As the mirror write process progresses, this block becomes filled with a lot of original data and a lot of mirror data. If only the mirror data is invalidated, about half of the block's capacity becomes invalid data. Therefore, fragmentation occurs in this block, and garbage collection needs to be performed on this block. Garbage collection of this block requires reading about half the block's capacity of valid data from this block and writing the read valid data to another block. Therefore, a large amount of data needs to be written to make this block a free block, which reduces the efficiency of garbage collection and, as a result, increases write amplification.

[0077] In the first embodiment, since the original data and mirror data are written to different blocks, fragmentation does not occur in the blocks where these mirror data are stored, even if only the mirror data is invalidated. Therefore, the frequency of garbage collection can be reduced, which in turn reduces write amplification.

[0078] (Second Embodiment) Next, a second embodiment will be described. Figure 4 is a block diagram showing an example configuration of the information processing system according to the second embodiment.

[0079] In the second embodiment, the storage controller 500 performs RAID level conversion processing. The storage controller 500 includes an in-memory bank 501, an in-memory metadata cache 502, and an identifier assignment function unit 503, as well as a stripe setting function unit 504.

[0080] The stripe setting function unit 504 performs processing to create a stripe group that includes two or more original data and one or more parity information. In the RAID level conversion process, the storage controller 500 uses the stripe setting function unit 504 to perform the following processing.

[0081] In other words, when performing RAID level conversion processing, the storage controller 500 first determines three or more SSDs1 that will constitute a stripe group. For example, if the SSD array contains M(>3) SSDs, the storage controller 500 determines three or more SSDs1 from the M(>3) SSDs to constitute a stripe group. The three or more SSDs1 that constitute a stripe group refer to the SSDs necessary to create the stripe group. In the following, we will assume the case where a stripe group is created using three SSDs1.

[0082] The storage controller 500 requests that the first of the three determined SSDs (e.g., SSD1-1) reserve one block on which the original data has already been written as the block to be converted for RAID level conversion (hereinafter referred to as the conversion target block). The one block on which the original data has already been written is one of the original blocks managed in the original block pool 602 of SSD1-1.

[0083] The storage controller 500 requests the second of the three determined SSDs (e.g., SSD1-2) to reserve one block with the original data already written to it as the block to be converted. The one block with the original data already written to it is one of the original blocks managed in the original block pool 602 of SSD1-2.

[0084] The storage controller 500 requests the third SSD (e.g., SSD1-3) of the three determined SSDs to reserve one free block as the parity write destination block 653. The one free block is one of the free blocks managed in the free block pool 601 of SSD1-3. The parity write destination block 653 is the block to which the parity information should be written.

[0085] The storage controller 500 obtains the identifier (block ID) of the allocated block from each of SSD1-1, SSD1-2, and SSD1-3.

[0086] Specifically, the memory controller 11 of SSD1-1 allocates one original block as the block to be converted, and returns to the storage controller 500 a list of multiple logical addresses (hereinafter referred to as the logical address list) corresponding to multiple original data stored at multiple storage locations from the beginning to the end of the allocated original block, and the block ID of the allocated original block. The memory controller 11 of SSD1-1 can obtain the logical address list from the P2L table 302 of SSD1-1 by referring to the P2L table 302 of SSD1-1.

[0087] Similarly, the memory controller 11 of SSD1-2 reserves one original block as the block to be converted, and returns to the storage controller 500 a logical address list corresponding to multiple original data stored at multiple storage locations from the beginning to the end of the reserved original block, and the block ID of the reserved original block.

[0088] The memory controller 11 of SSD1-3 allocates one free block as parity write destination block 653 and returns the block ID of the allocated free block to the storage controller 500.

[0089] The storage controller 500 reads the first original data stored in the original block allocated by SSD1-1 from this original block allocated by SSD1-1. For example, if the original block allocated by SSD1-1 is the block used to write the original data Org#0, then the original data Org#0 is read out as the first original data.

[0090] Specifically, the storage controller 500 sequentially reads multiple original data stored in multiple storage locations from the beginning to the end of the original block allocated by SSD1-1. In this case, the storage controller 500 may send multiple read requests to SSD1-1, each specifying the logical address to be read, based on the logical address list obtained from SSD1-1. Alternatively, the storage controller 500 may send multiple read requests to SSD1-1, each specifying the block ID and page index to be read. If the original data Org#0 is stored in the beginning of the original block allocated by SSD1-1, the original data Org#0 is read first from this allocated original block.

[0091] Next, the storage controller 500 reads the second original data stored in the original block allocated by SSD1-2 from this original block allocated by SSD1-2. For example, if the original block allocated by SSD1-2 is the block used to write the original data Org#1, then the original data Org#1 is read out as the second original data.

[0092] Specifically, the storage controller 500 sequentially reads multiple original data stored in multiple storage locations from the beginning to the end of the original block allocated by SSD1-2. In this case, the storage controller 500 may send multiple read requests to SSD1-2, each specifying the logical address to be read, based on the logical address list obtained from SSD1-2. Alternatively, the storage controller 500 may send multiple read requests to SSD1-2, each specifying the block ID and page index to be read. If original data Org#1 is stored in the beginning storage location of the original block allocated by SSD1-2, original data Org#1 is read first from this allocated original block.

[0093] Next, the storage controller 500 calculates the first parity information using the first original data and the second original data. If the first original data is original data Org#0 and the second original data is original data Org#1, the storage controller 500 calculates the first parity information (Parity#0,1) using original data Org#0 and original data Org#1. Parity#0,1 is obtained by calculating the exclusive OR of original data Org#0 and original data Org#1.

[0094] Next, the storage controller 500 generates a write request requesting the writing of the first parity information (Parity#0,1). The identifier assignment function unit 503 of the storage controller 500 has the function of assigning an identifier to each write request requesting the writing of parity information, indicating that the data to be written is parity information. The storage controller 500 assigns an identifier (third identifier) ​​to the generated write request, indicating that the data to be written is parity information, and sends the write request including the third identifier to the SSD1-3.

[0095] The memory controller 11 of SSD1-3 determines whether the identifier included in the write request received from the storage controller 500 is the first identifier, the second identifier, or the third identifier.

[0096] If the identifier included in the write request received from the storage controller 500 is the third identifier, the memory controller 11 of SSD1-3 writes the first parity information (Parity#0,1) to the parity write destination block 653 of SSD1-3. Writing data to the parity write destination block 653 is performed sequentially from the beginning of the memory location, just like writing data to each other block. Therefore, the first parity information (Parity#0,1) is written to the beginning of the memory location in the parity write destination block 653.

[0097] Therefore, the original data Org#0 stored in the beginning memory of the original block of SSD1-1, the original data Org#1 stored in the beginning memory of the original block of SSD1-2, and the first parity information (Parity#0,1) stored in the beginning memory of the parity write destination block 653 of SSD1-3 all belong to the same stripe group. For this reason, the storage location within the block where the original data Org#1 and the first parity information (Parity#0,1) are stored is the same as the storage location within the block where the original data Org#0 is stored. The storage location at the beginning of each block is represented by page index=0 and page offset=0. The storage location within the block where the original data Org#0 is stored (page index=0, page offset=0) is the logical-physical address translation information for the original data Org#0. Therefore, the storage locations within the block in which the original data Org#1 and the first parity information (Parity#0,1) are stored can also be represented by the logical-physical address translation information of the original data Org#0.

[0098] After the first parity information (Parity#0,1) has been written to parity write destination block 653 of SSD1-3, the storage controller 500 updates the metadata of the original data Org#0. The storage controller 500 also updates the metadata of the original data Org#1.

[0099] In the process of updating the metadata of original data Org#0, the storage controller 500 updates the metadata of original data Org#0 by adding stripe group information and logical-physical address translation information of original data Org#0 to the metadata of original data Org#0.

[0100] Here, the stripe group information includes a list of identifiers for three or more SSDs that constitute the stripe group (device ID list) and a list of identifiers for blocks allocated on these three or more SSDs (block ID list).

[0101] In the second embodiment, the stripe group is composed of SSD1-1, SSD1-2, and SSD1-3. Therefore, the device ID list basically includes 0, 1, and 2. Here, 0 is the device ID of SSD1-1, 1 is the device ID of SSD1-2, and 2 is the device ID of SSD1-2.

[0102] Furthermore, the metadata of the original data Org#0 is used to identify other original data and parity information that should be used to restore the original data Org#0. For this reason, the device ID list in the metadata of the original data Org#0 does not need to include the device ID of SSD1-1.

[0103] Furthermore, a stripe group is composed of the original block allocated in SSD1-1, the original block allocated in SSD1-2, and the parity write destination block allocated in SSD1-3. For example, if the block ID of the original block allocated in SSD1-1 is 0, the block ID of the original block allocated in SSD1-2 is 0, and the block ID of the parity write destination block allocated in SSD1-3 is 3, then the block ID list is basically 0,0,3.

[0104] Similar to the device ID list, the block ID list does not need to include the block ID of the original block allocated on SSD1-1.

[0105] The logical-physical address translation information for original data Org#0 indicates the storage location within the block where original data Org#0 is stored. Since original data Org#0 is stored at the beginning of the block, the logical-physical address translation information for original data Org#0 is represented by page index 0 and page offset 0. The storage locations within the block for original data Org#1 and Parity#0,1 are also the same storage locations within the block as original data Org#0, i.e., the beginning of the block. Therefore, page index 0 and page offset 0 are used as information common to original data Org#0, original data Org#1, and Parity#0,1.

[0106] The metadata for original data Org#1 is updated in the same way as the metadata for original data Org#0 is updated.

[0107] Once the writing of Parity#0 and Parity#1 is complete, the mirror data Mrr#0 corresponding to the original data Org#0 and the mirror data Mrr#1 corresponding to the original data Org#1 become unnecessary.

[0108] Therefore, the storage controller 500 sends a deactivation request (trim request) to SSD1-2, which stores the mirror data Mrr#0 corresponding to the original data Org#0, specifying the logical address corresponding to the original data Org#0. The metadata of the original data Org#0 includes the device ID of SSD1-2, which stores the mirror data Mrr#0. Thus, the storage controller 500 can identify the SSD (in this case, SSD1-2) that stores the mirror data Mrr#0 by referring to the metadata of the original data Org#0. In this way, the mirror data Mrr#0 can be deactivated by sending a trim request to SSD1-2, specifying the logical address corresponding to the original data Org#0.

[0109] The metadata of the original data Org#0 includes the device IDs of SSD1-2 where the mirror data Mrr#0 is stored. Therefore, the storage controller 500 can identify the SSD (in this case, SSD1-2) where the mirror data Mrr#0 is stored by referring to the metadata of the original data Org#0.

[0110] Furthermore, the storage controller 500 sends a deactivation request (trim request) to SSD1-3, which stores the mirror data Mrr#1 corresponding to the original data Org#1, specifying the logical address corresponding to the original data Org#1. In this case, the metadata of the original data Org#1 includes the device ID of SSD1-3, which stores the mirror data Mrr#1. Therefore, the storage controller 500 can identify the SSD (in this case, SSD1-3) that stores the mirror data Mrr#1 by referring to the metadata of the original data Org#1. In this way, the mirror data Mrr#1 can be deactivated by sending a trim request to SSD1-3, specifying the logical address corresponding to the original data Org#1.

[0111] In this way, each mirrored data is invalidated, so the block used as the mirrored write destination block 652 is more likely to have a higher number of program / erase cycles than the block used as the original write destination block 651.

[0112] Therefore, it is desirable for each memory controller 11 of SSD1-1 to 1-3 to allocate a block among the multiple blocks of the NAND flash memory 13 that has a data rewrite endurance value higher than the standard value as the original write destination block 651.

[0113] Blocks with higher data rewrite endurance than the standard value are, for example, single-level cell blocks (SLC blocks) where one bit is written per memory cell, or blocks with fewer program / erase cycles than a certain threshold.

[0114] Next, the procedure for RAID level conversion will be explained. Figure 5 is a flowchart showing an example of the procedure for RAID level conversion performed in the storage controller 500.

[0115] First, the storage controller 500 performs a RAID level conversion process based on the RAID configuration information. The RAID configuration information includes at least information indicating the number of SSDs that make up the stripe group.

[0116] The storage controller 500 determines the N SSDs 1 that constitute the stripe group (step S201). N is an integer greater than or equal to 3. Specifically, the storage controller 500 randomly selects, for example, N SSDs from M (>N) SSDs included in the SSD array. Alternatively, the storage controller 500 may randomly select only one SSD as a starting point and then select (N-1) SSDs whose device IDs are consecutive to the device ID of the selected SSD. Or, the storage controller 500 may select N SSDs from the M (>N) SSDs that have larger free capacity. The storage controller 500 then determines, among the selected N SSDs, one SSD to which the parity should be written and (N-1) SSDs to which the original data should be provided. The SSD to which the parity should be written is also called the parity writing target SSD. The SSDs to which the original data should be provided are also called the read target SSDs.

[0117] The storage controller 500 issues resource allocation requests to each of the determined N SSDs (step S202). The resource allocation request issued to the parity write target SSD requests that the parity write target SSD allocate a free block as the parity write destination block. The resource allocation request issued to each of the (N-1) read target SSDs requests that each read target SSD allocate an original blot, which is a block on which the original data has already been written.

[0118] The storage controller 500 receives the identifier of the allocated block (block ID) from each of the N SSDs (step S203). The storage controller 500 also receives a logical address list from each of the (N-1) SSDs to be read (step S204). The storage controller 500 issues read requests to each of the (N-1) SSDs to be read (step S205). As a result, the storage controller 500 receives (N-1) original data from each of the (N-1) SSDs to be read (step S206).

[0119] The storage controller 500 calculates the parity of (N-1) original blocks read from each of the (N-1) SSDs to be read, and issues a write request for the calculated parity to the SSD to be written (step S207). This write request is accompanied by an identifier (third identifier) ​​indicating that the parity will be written. As a result, the parity is written to the allocated parity write destination block in the SSD to be written.

[0120] Then, the storage controller 500 updates the metadata of each original data belonging to the same stripe group as the parity that has been written (step S208).

[0121] After this, the storage controller 500 issues a trim request to the SSD where the mirror data is stored to invalidate the mirror data corresponding to each original data belonging to the same stripe group as the parity that has been written (step S209), and terminates the RAID level conversion process.

[0122] As described above, in the RAID level conversion process, the storage controller 500 reads (N-1) original data stored in each of the (N-1) SSDs, calculates the parity of those (N-1) original data, and stores the calculated parity in another SSD. For example, if SSD1-1 and SSD1-2 are the SSDs to be read from, and SSD1-3 is the SSD to be written to, then the parity (Parity#0,1) of the original data read from SSD1-1 (e.g., original data Org#0) and the original data read from SSD1-2 (e.g., original data Org#1) is calculated.

[0123] RAID level conversion can also be performed by writing data for mirroring to the SSD array, and then additionally writing data for data loss correction, such as two data points and one parity point, to the SSD array. In this case, the storage controller 500 first writes the original data Org#0 and the mirror data Mrr#0. Next, the storage controller 500 writes the original data Org#1 and the mirror data Mrr#1. Then, after the in-memory bank 501 has data of the size corresponding to the stripe group, the storage controller 500 additionally writes this data (original data Org#0 and original data Org#1) and the parity Parity#0,1 calculated from this data to the SSD array. The total number of data points written to the SSD array is 7 (mirroring: 4, data loss correction: 3). Since 7 data points are written to the SSD array compared to the number of data points requested to be written from host 2, the write amplification is 3.5.

[0124] On the other hand, in the second embodiment, the original data Org#0 and original data Org#1 written for mirroring are used directly for loss correction. Therefore, in the RAID level conversion process, only parity Parity#0 and Parity#1 are written to the SSD array. Consequently, the total number of data written to the SSD array is 5 (mirroring: 4, loss correction: 1). Since 5 data are written to the SSD array while the number of data requested to be written from host 2 is 2, the write amplification becomes 2.5. Thus, compared to the case where, for example, two original data and one parity are additionally written to the SSD array as data for loss correction, the write amplification can be reduced.

[0125] (Third embodiment) Next, a third embodiment will be described. In the third embodiment, each of SSD1-1, SSD1-2, and SSD1-3 has the function of a storage controller 500.

[0126] Figure 6 is a block diagram showing an example configuration of SSD1 according to the third embodiment. The CPU 111 of the memory controller 11 includes a request processing unit 201 and a block management unit 202, as well as a storage control unit 210. The storage control unit 210 may be implemented by dedicated hardware within the memory controller 11, or it may be implemented by an LSI separate from the memory controller 11.

[0127] The storage control unit 210 performs processes such as duplicating write requests that request the writing of original data to generate write requests that request the writing of mirrored data, and RAID level conversion processing.

[0128] The storage control unit 210 includes a mapping function unit 211, an identifier assignment function unit 212, and a stripe setting function unit 213. The storage control unit 210 also manages metadata 214 for each original data.

[0129] The mapping function unit 211 provides a function to uniquely determine the SSD with the highest priority and the SSD with the next highest priority among SSD1-1 to SS1-3 in the SSD array based on the input logical address. The mapping function unit 211 outputs two device IDs, uniquely determined from the input logical address, in a ranked order of priority, for example, using a hash function. The mapping function unit 211 is used to determine the original destination SSD and the mirror destination SSD among SSD1-1 to SS1-3 in the SSD array. For example, the SSD with the highest priority, i.e., the SSD with the device ID ranked 1st, is determined as the original destination SSD, and the SSD with the next highest priority, i.e., the SSD with the device ID ranked 1st, is determined as the mirror destination SSD.

[0130] The identifier assignment function unit 212 assigns identifiers (first identifier, second identifier, and third identifier) ​​indicating the type of data to be written (original data, mirror data, and parity information) to a write request transferred from SSD1 to another SSD1 in the SSD array.

[0131] The stripe setting function unit 504 performs processing to create a stripe group that includes two or more original data and one or more parity information.

[0132] Figure 7 is a block diagram showing an example configuration of an information processing system according to the third embodiment. In the first and second embodiments, each of SSD1-1, SSD1-2, and SSD1-3 was connected to the storage controller 500 via the communication path 3. In contrast, in the third embodiment, the functions of the storage controller 500 are offloaded to each of SSD1-1, SSD1-2, and SSD1-3, and the storage controller 500 is not provided. Each of SSD1-1, SSD1-2, and SSD1-3 can be connected to the host 2 and two or more other SSDs in the SSD array. In Figure 7, each of SSD1-1, SSD1-2, and SSD1-3 communicates with the host 2 via the communication path 3, and also communicates with each of the other SSDs among SSD1-1, SSD1-2, and SSD1-3 via the communication path 3. If communication channel 3 is a PCIe bus, each of SSD1-1, SSD1-2, and SSD1-3 communicates with the other SSDs among SSD1-1, SSD1-2, and SSD1-3 via the PCIe switch.

[0133] (Mirroring) Host 2 issues only write requests for data (i.e., original data) to any SSD in the SSD array via its storage stack 21. The process of writing the original data and mirrored data to different SSDs is performed by the respective storage control units 210 of SSD1-1, SSD1-2, and SSD1-3.

[0134] Here, we assume that SSD1-1 receives a first write request from host 2 requesting the writing of the first data (original data).

[0135] When the storage control unit 210 of SSD1-1 receives a first write request for the first data (original data) from host 2, it determines, based on the logical address specified by the received first write request, which SSD from among SSD1-1, SSD1-2, and SSD1-3 is the original write destination SSD to which the first data (original data) should be written, and which SSD is the write destination SSD to which the mirror data, which is a copy of the first data (original data), should be written. In this case, the storage control unit 210 of SSD1-1 uses the mapping function unit 211 to determine which SSD is the original write destination SSD to which the first data (original data) should be written, and which SSD is the write destination SSD to which the mirror data, which is a copy of the first data (original data), should be written.

[0136] Case 1: If SSD1-1 is determined to be the original write destination SSD, the storage control unit 210 of SSD1-1 writes the first data (original data) to the original write destination block 651 of SSD1-1. Then, the storage control unit 210 of SSD1-1 adds a second identifier to the first write request indicating that the data to be written is mirror data, and forwards the first write request, including the second identifier, to another SSD in the SSD array that has been determined to be the mirror write destination SSD.

[0137] The first write request includes a data pointer indicating the location in host 2's memory where the first data is stored. Therefore, the storage control unit 210 of SSD1-1 retrieves the first data (original data) from host 2's memory and writes the retrieved first data (original data) to the original write destination block 651 of SSD1-1. Similarly, since the first write request transferred to another SSD also includes the same data pointer, the storage control unit 210 of the other SSD also retrieves the first data (original data) from host 2's memory. However, the first write request transferred to the other SSD includes a second identifier. Therefore, the storage control unit 210 of the other SSD treats the retrieved first data (original data) as mirror data and writes the retrieved first data (original data) as mirror data of the first data (original data) to the mirror write destination block 652 of this other SSD.

[0138] Case 2: If SSD1-1 is determined to be the mirror write destination SSD, the storage control unit 210 of SSD1-1 treats the first data as mirror data and writes the first data as mirror data of the first data to the mirror write destination block 652 of SSD1-1. Then, the storage control unit 210 of SSD1-1 adds a first identifier to the first write request indicating that the data to be written is the original data, and forwards the first write request, including the first identifier, to another SSD in the SSD array that has been determined to be the original write destination SSD.

[0139] As described above, the storage control unit 210 of SSD1-1 can retrieve the first data from the host 2's memory. Similarly, the storage control unit 210 of another SSD to which the first write request containing the first identifier has been transferred can also retrieve the first data from the host 2's memory. Then, the storage control unit 210 of this other SSD writes the retrieved first data to the original write destination block of this other SSD.

[0140] Case 3: If it is determined that SSD1-1 is neither the original write destination SSD nor the mirror write destination SSD, the storage control unit 210 of SSD1-1 assigns a first identifier to the first write request and forwards the first write request, including the first identifier, to another SSD determined to be the original write destination SSD. The storage control unit 210 of SSD1-1 also assigns a second identifier to the first write request and forwards the first write request, including the second identifier, to yet another SSD determined to be the mirror write destination SSD.

[0141] The storage control unit 210 of another SSD to which the first write request containing the first identifier has been transferred can retrieve the first data from the host 2's memory. Then, the storage control unit 210 of this other SSD writes the retrieved first data to the original write destination block of this other SSD.

[0142] The storage control unit 210 of this yet another SSD, to which the first write request containing the second identifier has been transferred, can retrieve the first data from the host 2's memory. The storage control unit 210 of this yet another SSD then writes the retrieved first data as mirror data of the first data to the mirror write destination block of this yet another SSD.

[0143] Furthermore, when a write request is received from SSD1-2 or SSD1-3, the storage control unit 210 of SSD1-3 performs the following processing.

[0144] In other words, the storage control unit 210 of SSD1-1 determines whether the identifier included in the received write request is the first identifier or the second identifier. If the identifier included in the received write request is the first identifier, the storage control unit 210 of SSD1-1 writes the data associated with the received write request to the original write destination block 651 of SSD1-1. If the identifier included in the received write request is the second identifier, the storage control unit 210 of SSD1-1 writes the data associated with the received write request to the mirror write destination block 652 of SSD1-1.

[0145] Figure 7 illustrates a case where SSD1-1 receives a write request for original data Org#0 (hereinafter referred to as write request A) from host 2, and SSD1-2 receives a write request for original data Org#1 (hereinafter referred to as write request B) from host 2.

[0146] First, let's explain how SSD1-1 works.

[0147] The storage control unit 210 of SSD1-1 uses the mapping function unit 211 to determine SSD1-1 as the original write destination SSD and SSD1-2 as the mirror write destination SSD, based on the logical address specified by write request A.

[0148] The storage control unit 210 of SSD1-1 writes the data associated with write request A (original data Org#0) to the original write destination block 651 in SSD1-1. The storage control unit 210 of SSD1-1 assigns a second identifier to write request A, indicating that mirror data is to be written. Write request A, including the second identifier, is forwarded to SSD1-2 as a write request for mirror data Mrr#0, which is a copy of the original data Org#0.

[0149] Next, we will explain the operation of SSD1-2.

[0150] The storage control unit 210 of SSD1-2 receives a write request A from SSD1-1, which includes a second identifier, as a write request for mirror data Mrr#0. The storage control unit 210 of SSD1-2 writes the original data Org#0 as mirror data Mrr#0 to the mirror write destination block 652.

[0151] Furthermore, the storage control unit 210 of SSD1-2 determines SSD1-2 as the original write destination SSD and SSD1-3 as the mirror write destination SSD based on the logical address specified by write request B.

[0152] The storage control unit 210 of SSD1-2 writes the data associated with write request B (original data Org#1) to the original write destination block 651 in SSD1-2. The storage control unit 210 of SSD1-2 assigns a second identifier to write request B, indicating that mirror data is to be written. Write request B, including the second identifier, is forwarded to SSD1-3 as a write request for mirror data Mrr#1.

[0153] Next, we will explain the operation of SSD1-3.

[0154] The storage control unit 210 of SSD1-2 receives a write request B containing a second identifier from SSD1-2 as a write request for mirror data Mrr#1. The storage control unit 210 of SSD1-3 writes the original data Org#1 as mirror data Mrr#1 to the mirror write destination block 652.

[0155] As a result of the above operations, in response to write request A from host 2, the original data Org#0 is written to the original destination block 651 in SSD1-1, and the mirror data Mrr#0 is written to the mirror destination block 652 in SSD1-2. Also, in response to write request B from host 2, the original data Org#1 is written to the original destination block 651 in SSD1-2, and the mirror data Mrr#1 is written to the mirror destination block 652 in SSD1-3.

[0156] (RAID level conversion process) Each of the storage control units 210 of SSD1-1, SSD1-2, and SSD1-3 has a RAID level conversion function that performs RAID level conversion processing. When the RAID level conversion function of one of the storage control units 210 is activated, the SSD including this storage control unit 210 operates as the device that initiates the RAID level conversion process (parent device). The other SSDs operate as child devices.

[0157] When SSD1-1 operates as the device (parent device) that initiates the RAID level conversion process, the storage control unit 210 of SSD1-1 performs the following process.

[0158] The storage control unit 210 of SSD1-1 first determines three or more SSD1s to constitute a stripe group. For example, if an SSD array contains M(>3) SSDs, the storage control unit 210 of SSD1-1 determines three or more SSD1s from the M(>3) SSDs to constitute a stripe group. In the following, we will assume the case where a stripe group is created using three SSD1s.

[0159] A stripe group includes two read-only SSDs that provide the original data, and one parity-write-only SSD used as the destination for writing parity. The parent device, SSD1-1, is included among the three SSDs as the first SSD, which is one of the two read-only SSDs.

[0160] In the example shown in Figure 7, a stripe group is created using SSD1-1, SSD1-2, and SSD1-3.

[0161] The storage control unit 210 of SSD1-1 reserves one block in SSD1-1 that has already had original data written to it as the block to be converted for RAID level conversion processing (the block to be converted).

[0162] The storage control unit 210 of SSD1-1 requests the second SSD (for example, SSD1-2) of the three determined SSD1s to reserve one block with the original data already written to it as the block to be converted.

[0163] The storage control unit 210 of SSD1-1 requests the third SSD (e.g., SSD1-3) of the three determined SSD1s to reserve one free block as the parity write destination block 653.

[0164] The stripe setting function unit 213 obtains the identifier (block ID) of the allocated block from each of SSD1-1, SSD1-2, and SSD1-3.

[0165] Next, the storage control unit 210 of SSD1-1 generates stripe group information and transmits it to SSD1-2 and SSD1-3, thereby sharing the generated stripe group information with SSD1-2 and SSD1-3. The stripe group information includes, for example, a list of identifiers of three or more SSDs that constitute the stripe group (device ID list) and a list of identifiers of blocks allocated in these three or more SSDs (block ID list). The stripe group information is used to update or generate metadata, as described later.

[0166] Then, the storage control unit 210 of SSD1-1 reads the first original data stored in the original block allocated in SSD1-1 from this original block allocated in SSD1-1. For example, if the original block allocated in SSD1-1 is the block used to write the original data Org#0, then the original data Org#0 is read out as the first original data.

[0167] Specifically, the storage control unit 210 of SSD1-1 sequentially reads multiple original data stored at multiple storage locations, from the beginning to the end of the original block allocated in SSD1-1. If original data Org#0 is stored at the beginning of the original block allocated in SSD1-1, original data Org#0 is read first from this allocated original block. The storage control unit 210 of SSD1-1 then transmits the read original data Org#0 to SSD1-1 for the calculation of parity information.

[0168] Next, we will explain the operation of SSD1-2.

[0169] The storage control unit 210 of SSD1-2 receives the original data Org#0 from SSD1-1. The storage control unit 210 of SSD1-2 reads the second original data stored in the original block allocated by SSD1-2 from this original block allocated by SSD1-2. For example, if the original block allocated by SSD1-2 is the block used to write the original data Org#1, then the original data Org#1 is read out as the second original data.

[0170] Specifically, the storage control unit 210 of SSD1-2 sequentially reads multiple original data stored at multiple storage locations, from the beginning to the end of the original block allocated in SSD1-2. If original data Org#1 is stored at the beginning of the original block allocated in SSD1-2, original data Org#1 is read first from this allocated original block.

[0171] Next, the storage control unit 210 of SSD1-2 calculates the first parity information using the first original data and the second original data. If the first original data is original data Org#0 and the second original data is original data Org#1, the storage control unit 210 of SSD1-2 calculates the first parity information (Parity#0,1) using original data Org#0 and original data Org#1. Parity#0,1 is obtained by calculating the exclusive OR of original data Org#0 and original data Org#1.

[0172] Next, the storage control unit 210 of SSD1-2 generates a write request requesting the writing of first parity information (Parity#0,1). The storage control unit 210 of SSD1-2 has a function to assign a third identifier to each write request requesting the writing of parity information, indicating that the data to be written is parity information. The storage control unit 210 of SSD1-2 assigns the third identifier to the generated write request, indicating that the data to be written is parity information, and sends the write request including the third identifier to SSD1-3.

[0173] Next, we will explain the operation of SSD1-3.

[0174] The storage control unit 210 of SSD1-3 determines whether the identifier included in the write request received from SSD1-2 is the first identifier, the second identifier, or the third identifier.

[0175] If the identifier included in the write request received from SSD1-2 is the third identifier, the storage control unit 210 of SSD1-3 writes the first parity information (Parity#0,1) to the parity write destination block 653 of SSD1-3. Writing data to the parity write destination block 653 is performed sequentially from the beginning of the memory location, just like writing data to each other block. Therefore, the first parity information (Parity#0,1) is written to the beginning of the memory location in the parity write destination block 653.

[0176] Therefore, the original data Org#0 stored in the beginning memory of the original block of SSD1-1, the original data Org#1 stored in the beginning memory of the original block of SSD1-2, and the first parity information (Parity#0,1) stored in the beginning memory of the parity write destination block 653 of SSD1-3 all belong to the same stripe group. For this reason, the storage location within the block where the original data Org#1 and the first parity information (Parity#0,1) are stored is the same as the storage location within the block where the original data Org#0 is stored. The storage location at the beginning of each block is represented by page index=0 and page offset=0. The storage location within the block where the original data Org#0 is stored (page index=0, page offset=0) is the logical-physical address translation information for the original data Org#0. Therefore, the storage locations within the block in which the original data Org#1 and the first parity information (Parity#0,1) are stored can also be represented by the logical-physical address translation information of the original data Org#0.

[0177] After the writing of the first parity information (Parity#0,1) to the parity write destination block 653 of SSD1-3 is completed, the storage control unit 210 of SSD1-3 notifies SSD1-2 that the writing of the first parity information (Parity#0,1) is complete.

[0178] In response to notification from SSD1-3 that the writing of the first parity information (Parity#0,1) is complete, the storage control unit 210 of SSD1-2 generates metadata for the original data Org#1, which belongs to the same stripe group as Parity#0,1. In the process of generating metadata for the original data Org#1, the storage control unit 210 of SSD1-2 generates metadata for the original data Org#1, which includes the stripe group information received from SSD1-1 and the logical-physical address translation information for the original data Org#1. Then, the storage control unit 210 of SSD1-2 identifies the SSD (in this case, SSD1-3) where the metadata Mrr# corresponding to the original data Org#1 is stored. In this case, the logical address of the original data Org#1 may first be obtained by referring to the P2L table 302. Then, by inputting the logical address of the original data Org#1 into the mapping function unit 211, the SSD (here, SSD1-3) that stores the metadata Mrr# corresponding to the original data Org#1 can be identified. The storage control unit 210 of SSD1-2 then sends the generated metadata to the identified SSD (here, SSD1-3) so that it holds the generated metadata.

[0179] Furthermore, the storage control unit 210 of SSD1-2 notifies SSD1-1 that the writing of the first parity information (Parity#0,1) is complete. Here, the stripe group information used to generate metadata for the original data Org#1 includes a list of identifiers for three or more SSDs that constitute the stripe group (device ID list) and a list of identifiers for blocks allocated on these three or more SSDs (block ID list).

[0180] In the third embodiment, the stripe group is composed of SSD1-1, SSD1-2, and SSD1-3. Therefore, the device ID list basically includes 0, 1, and 2. Here, 0 is the device ID of SSD1-1, 1 is the device ID of SSD1-2, and 2 is the device ID of SSD1-2.

[0181] Furthermore, the metadata of the original data Org#1 is used to identify other original data and parity information that should be used to restore the original data Org#1. For this reason, the device ID list in the metadata of the original data Org#1 does not need to include the device IDs of SSD1-2.

[0182] Furthermore, a stripe group is composed of the original block allocated in SSD1-1, the original block allocated in SSD1-2, and the parity write destination block allocated in SSD1-3. For example, if the block ID of the original block allocated in SSD1-1 is 0, the block ID of the original block allocated in SSD1-2 is 0, and the block ID of the parity write destination block allocated in SSD1-3 is 3, then basically the block ID list will include 0, 0, and 3.

[0183] Similar to the device ID list, the block ID list does not need to include the block IDs of the original blocks allocated on SSD1-2.

[0184] The logical-physical address translation information for original data Org#1 indicates the storage location within the block where original data Org#1 is stored. Since original data Org#1 is stored at the beginning of the block, the logical-physical address translation information for original data Org#1 is represented by page index 0 and page offset 0. The storage locations within the block for original data Org#0 and Parity#0,1 are also the same storage locations within the block as original data Org#1, i.e., the beginning of the block. Therefore, page index 0 and page offset 0 are used as information common to original data Org#0, original data Org#1, and Parity#0,1.

[0185] Furthermore, once the writing of Parity#0 and Parity#1 is complete, the mirror data Mrr#1 corresponding to the original data Org#1 becomes unnecessary.

[0186] Therefore, the storage control unit 210 of SSD1-2 sends a deactivation request (trim request) to SSD1-3, which stores the mirror data Mrr#1 corresponding to the original data Org#1, specifying the logical address corresponding to the original data Org#1.

[0187] Furthermore, when SSD1-2 notifies SSD1-2 that the writing of the first parity information (Parity#0,1) is complete, the storage control unit 210 of SSD1-1 generates metadata for the original data Org#0 in the same manner as generating metadata for the original data Org#1.

[0188] Furthermore, once the writing of Parity#0 and Parity#1 is complete, the mirror data Mrr#0 corresponding to the original data Org#0 becomes unnecessary. The stripe setting function unit 213 of SSD1-1 disables the mirror data Mrr#0 in the same way as the mirror data Mrr#1 is disabled.

[0189] In this way, each mirrored data is invalidated, so the block used as the mirrored write destination block 652 is more likely to have a higher number of program / erase cycles than the block used as the original write destination block 651.

[0190] Therefore, it is desirable for each memory controller 11 of SSD1-1 to 1-3 to select a block from among the multiple blocks of the NAND flash memory 13 that has a data rewrite endurance value higher than the standard value as the original write destination block 651.

[0191] Blocks with higher data rewrite endurance than the standard value are, for example, single-level cell blocks (SLC blocks) where one bit is written per memory cell, or blocks with fewer program / erase cycles than a certain threshold.

[0192] Figure 8 is a flowchart showing an example of the write control process performed on SSD1. The write control process controls the writing of original data and mirror data based on the write request received from host 2. The write control process performed on SSD1-1 will be described below as an example.

[0193] First, the storage control unit 210 of SSD1-1 receives a write request from host 2 via host I / F 112 (step S301). Based on the logical address specified by the received write request, the storage control unit 210 determines which SSD1 will be written to (original write destination SSD1) and which SSD1 will be written to (mirror write destination SSD1) (step S302).

[0194] The storage control unit 210 determines whether the determined original write destination SSD1 is SSD1-1 (i.e., itself) (step S303).

[0195] If the original write destination SSD1 is SSD1-1 (YES in step S303), the storage control unit 210 writes the data associated with the received write request (i.e., the original data) to the original write destination block (step S304). Then, the storage control unit 210 assigns a second identifier to the received write request and sends the write request containing the second identifier to the mirror write destination SSD1 as a mirror write request (step S305), and terminates the write control process.

[0196] If the original write destination SSD1 is not SSD1-1 (NO in step S303), the storage control unit 210 determines whether the mirror write destination SSD1 is SSD1-1 or not (step S306).

[0197] If the mirror write destination SSD1 is SSD1-1 (YES in step S306), the storage control unit 210 writes the data associated with the received write request to the mirror write destination block (step S307). Then, the storage control unit 210 assigns a first identifier to the received write request and sends the write request containing the first identifier to the original write destination SSD1 as the original write request (step S308), and terminates the write control process.

[0198] If the mirror destination SSD1 is not SSD1-1 (NO in step S306), that is, if SSD1-1 is neither the original destination SSD1 nor the mirror destination SSD1, the storage control unit 210 assigns a first identifier to the received write request and sends the write request containing the first identifier to the original destination SSD1 as the original write request (step S309). As a result, the data associated with this write request is written to the original destination block on the original destination SSD1. The storage control unit 210 also assigns a second identifier to the received write request and sends the write request containing the second identifier to the mirror destination SSD1 as the mirror write request (step S310). As a result, the data associated with this write request is written to the mirror destination block on the mirror destination SSD1. The storage control unit 210 then terminates the write control process.

[0199] Through the above write control process, SSD1-1 can control the writing of original data and mirrored data to multiple SSD1s depending on whether the original write destination SSD1 is SSD1-1, the mirror write destination SSD1 is SSD1-1, or neither the original write destination SSD1 nor the mirror write destination SSD1 is SSD1-1.

[0200] (RAID level conversion) Figure 9 is a flowchart showing an example of the procedure for the first RAID level conversion process performed on SSD1. The first RAID level conversion process is performed on the parent SSD1.

[0201] First, the storage control unit 210 of the parent SSD1 determines N (where N is an integer of 3 or more) SSD1 units that constitute the stripe group (step S311). The parent SSD1 is included among the N SSD1 units as the SSD to be read.

[0202] The storage control unit 210 issues a block allocation request (resource allocation request) to each of the (N-1) SSDs 1 obtained by excluding the parent SSD 1 from N SSDs 1 (step S312). Each of the (N-1) SSDs 1 is also referred to as a child SSD 1. The (N-1) child SSDs 1 include one child SSD 1 targeted for parity writing and (N-2) child SSDs 1 targeted for reading. The resource allocation request issued to the child SSD 1 targeted for parity writing is a request to allocate the destination block. The resource allocation request issued to each of the (N-2) child SSDs 1 targeted for reading is a request to allocate the target block for reading. The storage control unit 210 receives the identifier of the allocated block from each of the (N-1) child SSDs 1 (step S313).

[0203] The storage control unit 210 reserves the block to be read from the parent SSD1 (step S314). The storage control unit 210 transmits the stripe group information to each of the other SSDs to share the stripe group information (step S315). The storage control unit 210 reads the original data from the reserved block to be read (step S316). The storage control unit 210 transfers the read original data to the child SSD1 to be read (step S317). This child SSD1 to be read is one of the (N-2) child SSD1 to be read.

[0204] Next, the storage control unit 210 determines whether or not the child SSD1, the destination for the transfer of the original data, has notified it that the writing of the parity has been completed (step S318). If it has not yet been notified that the writing of the parity has been completed (NO in step S318), the storage control unit 210 returns to step S318. In other words, the storage control unit 210 waits until it is notified that the writing of the parity has been completed.

[0205] If the parity write is notified as complete (YES in step S318), the storage control unit 210 updates or generates metadata for the original data included in the same stripe group as this parity, and transfers the updated or generated metadata to the child SSD storing the mirror data corresponding to this original data (step S319).

[0206] Next, the storage control unit 210 issues a trim request to the child SSD storing the mirror data to invalidate the mirror data (step S320), and terminates the first RAID level conversion process. As a result, the mirror data is invalidated on the child SSD storing the mirror data.

[0207] Through the first RAID level conversion process described above, the parent SSD1 determines the N SSD1 units that constitute the stripe group and sends the original data stored in the allocated read-only blocks to the child SSD1 units that are to be read. As a result, the child SSD1 units can generate intermediate parity or parity using the original data received from the parent SSD1 and the original data stored in the child SSD1 unit that is to be read. In addition, the parent SSD1 issues a trim request to invalidate the mirror data corresponding to the original data once the writing of the parity is complete. Therefore, the parent SSD1 can work in conjunction with the (N-1) child SSD1 units to convert the RAID level from RAID1 to RAID5.

[0208] Figure 10 is a flowchart illustrating an example of the procedure for the second RAID level conversion process performed on SSD1. The second RAID level conversion process is a part of the RAID conversion process that is performed on the child SSD1 being read. The child SSD1 being read is an SSD1 that (1) receives either the original data or intermediate parity from another SSD1 being read, and (2) either sends the intermediate parity to yet another SSD1 being read, or sends the parity to the SSD1 being written to the parity.

[0209] First, the storage control unit 210 of the child SSD1 to be read receives a resource allocation request from the parent SSD1 (step S321). The storage control unit 210 allocates the block to be read in response to the received resource allocation request (step S322). The storage control unit 210 transmits the identifier of the allocated block to be read to the parent SSD1 (step S323).

[0210] Next, the storage control unit 210 receives the original data or intermediate parity from another SSD1 to be read (hereinafter also referred to as the receiving SSD1) (step S324). Specifically, if the receiving SSD1 is the parent SSD1, the storage control unit 210 receives the original data from the parent SSD1. If the receiving SSD1 is the child SSD1 to be read, the storage control unit 210 receives the intermediate parity from the child SSD1 to be read.

[0211] Furthermore, the storage control unit 210 reads the original data from the allocated block to be read (step S325). The storage control unit 210 calculates the parity or intermediate parity using the read original data and the received original data or intermediate parity (step S326). The storage control unit 210 transfers the intermediate parity to another child SSD1 to be read, or transfers the parity to the SSD1 to be written (step S327). The SSD1 to which the intermediate parity or parity is transferred is also referred to as the destination SSD1.

[0212] Next, the storage control unit 210 determines whether or not it has been notified by the destination SSD1 that the writing of the parity has been completed (step S328). If it has not yet been notified that the writing of the parity has been completed (NO in step S328), the storage control unit 210 returns to step S328. In other words, the storage control unit 210 waits until it is notified that the writing of the parity has been completed.

[0213] If the parity write is notified as complete (YES in step S328), the storage control unit 210 updates or generates metadata for the original data included in the same stripe group as this parity, and transfers the updated or generated metadata to the child SSD (mirror storage destination SSD1) that stores the mirror data corresponding to this original data (step S329).

[0214] Next, the storage control unit 210 issues a trim request to the mirror storage destination SSD1 to invalidate the mirror data (step S330). Then, the storage control unit 210 notifies the receiving SSD that the parity writing is complete (step S331), and terminates the second RAID level conversion process.

[0215] Through the above second RAID level conversion process, the child SSD1 being read receives the original data or intermediate parity from another child SSD1 being read, and uses the received original data or intermediate parity and the original data stored within itself to generate intermediate parity or parity. Then, the child SSD1 being read performs either the transfer of the generated intermediate parity to another child SSD1 being read, or the transfer of the generated parity to the SSD1 being written to.

[0216] Figure 11 is a flowchart showing an example of the procedure for the third RAID level conversion process performed on SSD1. The third RAID level conversion process is a part of the RAID conversion process that is performed on SSD1 targeted for parity writing (i.e., child SSD1 targeted for parity writing). Child SSD1 targeted for parity writing is SSD1 that receives parity from child SSD1 targeted for reading and stores the parity.

[0217] First, the storage control unit 210 of the SSD1 to be written to parity receives a resource allocation request from the parent SSD1 (step S341). The storage control unit 210 allocates a parity write destination block in response to the received resource allocation request (step S342). The storage control unit 210 transmits the identifier of the allocated parity write destination block to the parent SSD1 (step S343).

[0218] Next, the storage control unit 210 receives the parity from the child SSD1 to be read (hereinafter referred to as the receiving SSD1) (step S344). The storage control unit 210 writes the received parity to the parity write destination block (step S345). Then, the storage control unit 210 notifies the receiving SSD1 that the writing of the parity is complete (step S346), and terminates the third RAID level conversion process.

[0219] Through the above third RAID level conversion process, the child SSD1 targeted for parity writing receives parity from the child SSD1 targeted for reading and writes the received parity to the destination block. The child SSD1 targeted for parity writing then notifies the source SSD1 that the writing of the parity constituting the ECC frame is complete. In response to the propagation of this notification, the parent SSD1 and each of the (N-2) child SSD1 perform processing to invalidate the mirror data corresponding to the original data constituting the ECC frame. Therefore, the child SSD1 targeted for parity writing can work in conjunction with the parent SSD1 and the (N-2) child SSD1 to convert the RAID level from RAID1 to RAID5.

[0220] Figure 12 is a block diagram illustrating the read control process performed in the SSD1 according to the third embodiment.

[0221] Figure 12 assumes a scenario where, while SSD1-1 is failing, a read request is issued specifying the logical address of the original data Org#0 stored on SSD1-1.

[0222] This read request may be issued to any SSD in the SSD array. For example, when SSD1-3 receives this read request from host 2, the storage control unit 210 of SSD1-3 identifies the SSD where the original data Org#0 is stored (in this case, SSD1-1) and the SSD where the mirror data Mrr#0 is stored (in this case, SSD1-2) by inputting the logical address of the original data Org#0 to the mapping function unit 211. Since SSD1-1 is failing, the storage control unit 210 of SSD1-3 forwards the received read request to SSD1-2 where the mirror data Mrr#0 is stored.

[0223] Upon receiving this read request, the storage control unit 210 of SSD1-2 identifies the SSD where the original data Org#0 is stored (here, SSD1-1) and the SSD where the mirror data Mrr#0 is stored (here, SSD1-2) by inputting the logical address of the original data Org#0 to the mapping function unit 211. SSD1-1 is failing, and the mirror data Mrr#0 has already been invalidated. However, since the storage control unit 210 of SSD1-2 holds the metadata of the original data Org#0, it can read the data necessary to restore the original data Org#0 (original data Org#1, Parity#0,1) and restore the original data Org#0 using the original data Org#1 and Parity#0,1. Therefore, the storage control unit 210 of SSD1-2 can return the restored original data Org#0 to the host 2.

[0224] Figure 13 is a flowchart illustrating an example of the read control process performed on SSD1. The read control process is the process of reading data in response to a read request from host 2. Here, we illustrate the case where SSD1-2 receives a read request for the original data Org#0 from host 2 while SSD1-1 is failing.

[0225] First, the storage control unit 210 of SSD1-2 receives a read request from host 2 (step S401). Since SSD1-1 has failed, the storage control unit 210 of SSD1-2 refers to the metadata of original data Org#0 (step S402). Specifically, the storage control unit 210 obtains from the metadata of original data Org#0 that, in order to restore original data #0, (A) original data Org#1 stored in page 0 of block 0 of SSD1-2 and (B) Parity#0,1 stored in page 0 of block 3 of SSD1-3 are required.

[0226] The storage control unit 210 reads the data necessary to restore the original data Org#0 based on the acquired information and restores the original data Org#0 (step S403). Specifically, the storage control unit 210 reads the original data Org#1 from page 0 of block 0 of SSD1-2. The storage control unit 210 sends a request to SSD1-3 to read data from page 0 of block 3. The storage control unit 210 receives Parity#0,1 read in response to this read request from SSD1-3. Then, the storage control unit 210 restores the original data Org#0 using the original data Org#1 and Parity#0,1.

[0227] The storage control unit 210 sends a response to the host 2 indicating that the data read in response to the read request has been completed, along with the restored original data Org#0 (step S404), and terminates the read control process.

[0228] According to the third embodiment, the same effects as the first embodiment and the same effects as the second embodiment can be obtained without providing a storage controller 500. Therefore, the processing load on the host 2 can be significantly reduced.

[0229] (Fourth Embodiment) Figure 14 is a block diagram showing an example configuration of an information processing system according to the fourth embodiment. The information processing system according to the fourth embodiment includes a host 2, a storage controller 500, and a plurality of SSDs 1 (SSD1-1, SSD1-2, and SSD1-3), similar to the first and second embodiments.

[0230] The identifier assignment function unit 503 of the storage controller 500 further has the function of assigning an identifier (a fourth identifier) ​​to a write request that requests the writing of mirror data, indicating that the data to be written is data that should be kept in the write buffer 303 of the SSD1.

[0231] In some cases, a RAID level conversion process may be performed immediately after several mirrored data entries have been written to one of the SSDs, SSD1, within an SSD array. In this case, each of these mirrored data entries will be invalidated.

[0232] Therefore, in such situations, it is preferable from the viewpoint of reducing write amplification to keep each mirror data in the write buffer 303 rather than writing it to the mirror write destination block of the NAND flash memory 13.

[0233] When a write request is received from the storage controller 500, each memory controller 11 of SSD1-1, SSD1-2, and SSD1-3 determines whether the identifier included in the received write request is the fourth identifier. If the identifier included in the received write request is the fourth identifier, the memory controller 11 holds (pins) the data associated with the received write request in the write buffer 303 and does not write this data to the NAND flash memory 13 until the first event occurs. The first event is, for example, the receipt of a shutdown request. That is, when a shutdown request is received from the host 2, the memory controller 11 writes the data held in the write buffer 303 (mirror data) to the NAND flash memory 13 in order to prevent the loss of the data held in the write buffer 303 (mirror data).

[0234] In the example shown in Figure 14, the write request for the original data Org#0 includes a first identifier and is sent from the storage controller 500 to SSD1-1. Therefore, the original data Org#0 is temporarily stored in the write buffer 303 of SSD1-1 and then written to the original write destination block of the NAND flash memory 13 of SSD1-1.

[0235] The write request for mirror data Mrr#0 includes a fourth identifier and is sent from the storage controller 500 to SSD1-2. Therefore, even after being stored in the write buffer 303 of SSD1-2, mirror data Mrr#0 remains in the write buffer 303 and is not written to the NAND flash memory 13 of SSD1-2.

[0236] The write request for original data Org#1 includes a first identifier and is sent from the storage controller 500 to SSD1-2. Therefore, original data Org#1 is temporarily stored in the write buffer 303 of SSD1-2 and then written to the original write destination block of the NAND flash memory 13 of SSD1-2.

[0237] The write request for mirror data Mrr#1 includes a fourth identifier and is sent from the storage controller 500 to SSD1-3. Therefore, even after being stored in the write buffer 303 of SSD1-3, mirror data Mrr#1 remains in the write buffer 303 and is not written to the NAND flash memory 13 of SSD1-3.

[0238] Furthermore, the configuration in which data associated with a write request containing a fourth identifier (mirror data) is kept in a write buffer can also be applied to a third embodiment in which each SSD1 has the same functionality as the storage controller 500. In this case, the memory controller 11 of each SSD1 will send a write request for mirror data to another SSD (SSD to be mirrored). When sending this write request, a fourth identifier is assigned to it. Furthermore, if the identifier included in a write request received from another SSD is the fourth identifier, the memory controller 11 of each SSD1 keeps the data associated with this received write request (in this case, mirror data) in the write buffer 303 and does not write the data associated with this received write request (in this case, mirror data) to the NAND flash memory 13 until an event such as the reception of a shutdown request occurs.

[0239] As described above, according to the first, second, and third embodiments, original data and mirror data can be written to different blocks. Therefore, even if only the mirror data is invalidated, fragmentation will not occur in the block where this mirror data is stored. Consequently, the frequency of garbage collection can be reduced, thereby reducing write amplification. Furthermore, according to the second and third embodiments, the RAID level can be converted simply by additionally writing parity to the NAND flash memory 13. Therefore, compared to the case where two or more original data and one parity are additionally written to the SSD array as data for data loss correction, write amplification can be reduced.

[0240] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0241] 1…Memory system 2… Host 11… Controller 13…Non-volatile memory 210...Storage control unit 500…Storage Controller 651...Original posting destination block 652... Mirror write destination block 653... Parity write destination block

Claims

1. Multiple memory systems, The system comprises a storage controller configured to control the aforementioned plurality of memory systems, The aforementioned storage controller A first write request that requests the writing of original data, and a second write request that requests the writing of mirror data which is a copy of the original data, are each assigned a first identifier indicating that the data to be written is original data, and a second identifier indicating that the data to be written is mirror data, respectively. A first write request including the first identifier is transmitted to one of the plurality of memory systems. The system is configured to send the second write request, which includes the second identifier, to another memory system among the plurality of memory systems. Each of the aforementioned multiple memory systems is Non-volatile memory containing multiple blocks, each of which is a unit of data erasure operation, The system comprises a controller configured to control the non-volatile memory, The aforementioned controller, The system manages a first destination block where the original data should be written and a second destination block where the mirrored data should be written. Upon receiving a write request from the storage controller requesting the writing of a first data, it is determined whether the identifier included in the received write request is the first identifier or the second identifier. In response to determining that the identifier included in the received write request is the first identifier, the first data is written to the first destination block. The system is configured to write the first data to the second destination block in response to determining that the identifier included in the received write request is the second identifier. Information processing system.

2. The aforementioned storage controller When performing a RAID level conversion process to convert the RAID level for the aforementioned multiple memory systems from a level corresponding to mirroring to a level corresponding to loss correction, Determine three or more memory systems from the plurality of memory systems that constitute the stripe group, The system requests that the first memory system among the three or more memory systems reserve a third block, on which the original data has already been written, as the target block for the RAID level conversion process. The system requests the second memory system among the three or more memory systems to reserve a fourth block, on which the original data has already been written, as the target block for the RAID level conversion process. The third memory system among the three or more memory systems is requested to reserve a fifth block, which is a free block. The identifiers of the third block, the fourth block, and the fifth block are obtained from the first memory system, the second memory system, and the third memory system, respectively. The first original data stored in the third block of the first memory system is read from the third block. The second original data stored in the fourth block of the second memory system is read from the fourth block. Using the first original data and the second original data, the first parity information is calculated. A third write request is generated that requests the writing of the first parity information. A third identifier indicating that the data to be written is parity information is added to the third write request. The system is configured to send the third write request, which includes the third identifier, to the third memory system. The controller of the third memory system is Determine whether the identifier included in the third write request received from the storage controller is the first identifier, the second identifier, or the third identifier. The system is further configured to write the first parity information to the fifth block in response to determining that the identifier included in the third write request is the third identifier. The information processing system according to claim 1.

3. The aforementioned storage controller The metadata of the aforementioned first original data is managed, After the writing of the first parity information to the fifth block is completed, the metadata of the first original data is further configured to be updated by adding first stripe group information, which includes a list of identifiers of the three or more memory systems constituting the stripe group and a list of identifiers of blocks allocated in each of the three or more memory systems, and logical-physical address translation information corresponding to the first original data, to the metadata of the first original data. The information processing system according to claim 2.

4. The aforementioned storage controller After the writing of the first parity information to the fifth block is completed, A first invalidation request specifying a first logical address corresponding to the first original data is sent to one of the plurality of memory systems, in which the first mirror data corresponding to the first original data is stored. The system is further configured to send a second invalidation request specifying a second logical address corresponding to the second original data to another memory system among the plurality of memory systems, in which a second mirror data corresponding to the second original data is stored. The information processing system according to claim 2.

5. Each of the controllers of the plurality of memory systems is: The system is further configured to assign, among the plurality of blocks, a block whose data rewrite endurance is higher than a first reference value, as the second write destination block. The information processing system according to claim 1.

6. The aforementioned storage controller A fourth identifier is further added to the second write request, indicating that the data to be written is data that should remain in the write buffer. The system is further configured to transmit the second write request, which includes the fourth identifier, to another memory system among the plurality of memory systems. Each of the aforementioned memory systems further includes a write buffer, Each of the controllers of the plurality of memory systems is: Determine whether the identifier included in the received write request is the fourth identifier. In response to determining that the identifier included in the received write request is the fourth identifier, the system is further configured to keep the first data in the write buffer and not write the first data to the non-volatile memory until the first event occurs. The information processing system according to claim 1.

7. The aforementioned first event includes receiving a shutdown request, The information processing system according to claim 6.

8. The aforementioned storage controller is connectable to the host, The aforementioned original data is the data specified in the write request from the host. The information processing system according to claim 1.

9. A memory system that can connect to a host and two or more other memory systems, Non-volatile memory containing multiple blocks, each of which is a unit of data erasure operation, The system comprises a controller configured to control the non-volatile memory, The aforementioned controller, It manages a first destination block where the original data should be written and a second destination block where mirror data, which is a copy of the original data, should be written. In response to receiving a first write request from the host requesting the writing of first data, the system determines, based on the logical address specified by the first write request, a first destination memory system to which the first data should be written and a second destination memory system to which mirror data, which is a copy of the first data, should be written, from among a plurality of memory systems including the memory system and the two or more other memory systems. In response to the memory system being determined to be the first destination memory system, the first data is written to the first destination block, a second identifier indicating that the data to be written is mirror data is added to the first write request, and the first write request including the second identifier is transferred to another memory system determined to be the second destination memory system. In response to the determination that the memory system is the second destination memory system, the first data is written to the second destination block as a mirror of the first data, a first identifier indicating that the data to be written is the original data is added to the first write request, and the first write request including the first identifier is transferred to another memory system determined to be the first destination memory system. In response to the determination that the memory system is neither the first destination memory system nor the second destination memory system, the system is configured to assign a first identifier to the first write request, transfer the first write request including the first identifier to another memory system determined to be the first destination memory system, assign a second identifier to the first write request, and transfer the first write request including the second identifier to yet another memory system determined to be the second destination memory system. Memory system.

10. The aforementioned controller, In response to receiving a second write request from one of the two or more other memory systems, Determine whether the identifier included in the second write request is the first identifier or the second identifier. In response to determining that the identifier included in the second write request is the first identifier, the second data associated with the second write request is written to the first write destination block. The system is further configured to write the second data to the second destination block in response to determining that the identifier included in the second write request is the second identifier. The memory system according to claim 9.

11. The controller includes a mapping function that uniquely determines the memory system with the highest priority and the memory system with the next highest priority from among the plurality of memory systems based on the input logical address, and is further configured to determine the first memory system and the second memory system by inputting the logical address specified by the first write request. The memory system according to claim 9.

12. The aforementioned controller, When the memory system operates as a device that initiates a RAID level conversion process to convert the RAID level for the plurality of memory systems from a level corresponding to mirroring to a level corresponding to loss correction, Determine three or more memory systems from the plurality of memory systems that constitute a stripe group, and the memory system is included in the three or more memory systems as the first memory system among the three or more memory systems. Of the plurality of blocks of the non-volatile memory of the memory system, a third block on which the original data has already been written is reserved. The second memory system among the three or more memory systems is requested to reserve a fourth block of the non-volatile memory of the second memory system, which has the original data already written to it. The third memory system among the three or more memory systems is requested to reserve a fifth block, which is a free block, from among the plurality of blocks of the non-volatile memory of the third memory system. Obtain the identifier of the fourth block and the identifier of the fifth block from the second memory system and the third memory system, The first stripe group information, which includes a list of identifiers for the three or more memory systems constituting the stripe group and a list of identifiers for blocks allocated in each of the three or more memory systems, is transmitted to each of the second and third memory systems. The first original data stored in the third block of the memory system is read from the third block. The system is further configured to transmit the first original data to the second memory system. The second memory system is configured to calculate first parity information using the first original data and the second original data stored in the fourth block of the second memory system, and to transmit the first parity information to the third memory system. The memory system according to claim 9.

13. The aforementioned controller, When the second memory system operates as the device that initiates the RAID level conversion process, The second original data read from the fourth block by the second memory system is received from the second memory system. Using the second original data and the first original data stored in the third block of the memory system, the first parity information is calculated. The system is further configured to transmit the first parity information to the third memory system. The memory system according to claim 12.

14. The aforementioned controller, After receiving notification from the second memory system that the writing of the first parity information to the fifth block of the third memory system is complete, first metadata of the first original data is generated, which includes the first stripe group information and logical-physical address translation information corresponding to the first original data. Identify one of the multiple memory systems in which the first mirror data corresponding to the first original data is stored, The system is further configured to transmit the first metadata to the identified memory system so that the identified memory system holds the first metadata. The memory system according to claim 12.

15. The aforementioned controller, After receiving notification from the second memory system that the writing of the first parity information to the fifth block of the third memory system is complete, The system is further configured to send a first invalidation request specifying a first logical address corresponding to the first original data to one of the plurality of memory systems, in which first mirror data corresponding to the first original data is stored. The memory system according to claim 12.

16. The aforementioned controller, When transferring the first write request to the other memory system determined as the second write destination memory system, A fourth identifier is added to the first write request to indicate that the data to be written is data that should be kept in the write buffer. The system is further configured to transmit the first write request, including the fourth identifier, to the other memory system determined to be the second destination memory system. The other memory system determined to be the second destination memory system further includes a write buffer, Determine whether the identifier included in the first write request is the fourth identifier. In response to determining that the identifier included in the first write request is the fourth identifier, the system is further configured to keep the first data in the write buffer and not write the first data to the non-volatile memory until the first event occurs. The memory system according to claim 9.

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