Quantum computing devices
The quantum computing device uses coherent parity checks to detect and discard errors in continuous-variable states, ensuring high-accuracy computations by only utilizing error-free results, addressing the limitations of existing error suppression methods for individual calculations.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- NIPPON TELEGRAPH & TELEPHONE CORP
- Filing Date
- 2024-10-01
- Publication Date
- 2026-04-13
AI Technical Summary
Existing error suppression methods for continuous-quantum states in quantum information processing are limited and cannot be applied to individual calculation results, particularly for sampling problems like boson sampling, as they rely on statistical processing from multiple measurements.
A quantum computing device employing a coherent parity check (CPC) method to detect errors in continuous-variable states by preparing a check qubit, performing coherent parity checks, and discarding erroneous results, ensuring accurate calculation outcomes.
The method allows for deterministic or probabilistic error detection, enabling high-accuracy quantum computations by discarding erroneous results and utilizing only error-free outcomes, making it applicable to sampling problems such as boson sampling.
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Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of quantum information processing using a system employing a continuous variable state.
Background Art
[0002] By using the principles of quantum mechanics, it is known that high-speed calculations that were not possible before can be achieved, and various studies have been conducted in recent years. In particular, quantum information processing using a system employing a continuous variable state such as light or microwaves is regarded as promising.
[0003] In quantum information processing, since the influence of errors generated during the calculation process is significant, a method for reducing them is necessary. As methods for reducing errors, two types are known: an error correction method and an error suppression method.
[0004] Error correction is a framework that enables the detection and correction of errors generated during the calculation process by encoding information in a code state, but it is difficult to implement. On the other hand, error suppression is a series of methods for estimating a calculation result without errors from a calculation result including errors, and it is easier to implement compared to error correction (Non-Patent Document 1).
Prior Art Documents
Non-Patent Documents
[0005]
Non-Patent Document 1
Non-Patent Document 2
[0006] In quantum information processing using continuous-quantum states, it has been experimentally shown that the lifetime of a quantum state can be extended by error correction. However, only a limited number of error suppression methods have been proposed. Furthermore, all currently known error suppression methods for continuous-quantum states are methods that estimate error-free results by performing statistical processing from multiple measurement results, and therefore cannot be applied to individual calculation results. Consequently, they have the disadvantage of not being applicable to sampling problems such as boson sampling (Non-Patent Literature 2).
[0007] This invention has been made in view of the above points, and aims to provide a technology that enables the detection of errors occurring in a continuous quantity state. [Means for solving the problem]
[0008] According to the disclosed technology, an initialization unit prepares a continuous quantity state which is the target of the desired processing, and a check qubit, and initializes the check qubit, A calculation unit that performs a coherent parity check on the continuous quantity state using the check qubit to detect errors that occur in the continuous quantity state. A quantum computing device equipped with the following is provided. [Effects of the Invention]
[0009] According to the disclosed technology, it is possible to detect errors that occur in a continuous variable state. [Brief explanation of the drawing]
[0010] [Figure 1] This figure shows an example configuration of the quantum computing device 300. [Figure 2] This figure shows an example of the functional configuration of the quantum computing device 300. [Figure 3] This is a flowchart illustrating the processing steps performed by the quantum computing device 300 according to Algorithm 1. [Figure 4] This is the gate diagram corresponding to algorithm 1. [Figure 5] This is a flowchart illustrating the processing steps performed by the quantum computing device 300 according to Algorithm 2. [Figure 6] This is the gate diagram corresponding to algorithm 2. [Figure 7] This figure shows an example of the hardware configuration of the control device 100. [Modes for carrying out the invention]
[0011] Hereinafter, embodiments of the present invention (this embodiment) will be described with reference to the drawings. The embodiments described below are merely examples, and the embodiments to which the present invention is applied are not limited to the embodiments described below.
[0012] (Example of overall device configuration) Figure 1 shows an example of the configuration of the quantum computing device 300 in this embodiment. The "quantum computing device" may also be called a "quantum computer" or a "quantum computing system".
[0013] As shown in Figure 1, the quantum computing device 300 comprises a control device 100 and a quantum processor 200. The control device 100 performs quantum computation by transmitting control signals, etc., to the quantum processor 200 and obtaining computation results (measurement results) from the quantum processor 200. The control device 100 can be implemented, for example, by a classical computer. Hereafter, "computer" means "classical computer".
[0014] The quantum processor 200 has a physical quantum system. In the present embodiment, as the quantum system, a physical system capable of performing continuous-variable quantum calculation (for example, a system using photons) is used.
[0015] The quantum processor 200 includes a physical device (e.g., an optical circuit, a three-dimensional cavity) for realizing a continuous-variable state and the check qubits and flag qubits described later.
[0016] (Functional configuration example of the quantum computing device 300) "The control device 100 and the quantum processor 200" included in the quantum computing device 300 cooperate to realize the functions for quantum calculation by the quantum computing device 300.
[0017] An example of the functional configuration of the quantum computing device 300 in the present embodiment is shown in FIG. 2. As shown in FIG. 2, the quantum computing device 300 includes an initialization unit 310 and a calculation unit 320. The operations of each unit will be described later. Since the main body of control for quantum calculation is in the control device 100, the functional configuration shown in FIG. 2 may be regarded as the functional configuration of the control device 100.
[0018] Note that the continuous-variable state and each qubit used in the present embodiment are not limited to those using an actual physical system. For example, the continuous-variable state and the qubit may be those on a simulator realized by software. In this case, the quantum processor 200 functions as a simulator of the continuous-variable state and the qubit. This simulator may be provided inside the control device 100.
[0019] [[ID=XX]](Outline of the technology according to the embodiment) In the present embodiment, a method of detecting a part of errors generated in the calculation process is proposed by applying a method called coherent parity check (CPC), which has been conventionally proposed for qubit systems, to a continuous-variable state. By discarding the calculation result when an error is detected and using only the calculation result when no error is detected, a calculation result with fewer errors can be obtained.
[0020] Furthermore, CPC may also be called Coherent Pauli Check. Examples of CPC literature [cpc1, cpc2, cpc3] are listed at the end of the specification.
[0021] (Operation of quantum computer 300) The operation of the quantum computing device 300 using the above method will be described below. In this embodiment, the quantum computing device 300 performs quantum information processing (U) using continuous-state quantum conditions. At this time, errors can be detected by performing additional processing and measurements before and after the quantum information processing to be performed.
[0022] To achieve the above error detection, we will describe two examples of algorithms (which may also be called processing procedures) executed by the quantum computing device 300: Algorithm 1 and Algorithm 2. Then, we will describe two embodiments applicable to both.
[0023] (Algorithm 1) Figure 3 is a flowchart showing the processing steps performed by the quantum computing device 300 according to algorithm 1. Figure 4 is a gate diagram of the coherent parity check for continuous-states, corresponding to algorithm 1. The operation of the quantum computing device 300 will be explained with reference to Figures 3 and 4.
[0024] <s101> In step S101, the initialization unit 310 prepares a continuous quantity state (|ψ>) on which the desired processing is to be performed, and in addition to the continuous quantity state (|ψ>), it prepares a check qubit (called a check qubit) and initializes the check qubit to the |0> state. In the following steps, the calculation unit 320 detects errors in the continuous quantity state by performing a coherent parity check on the continuous quantity state using the check qubit.
[0025] Preparing a continuous-quantity state (|ψ>) means creating a continuous-quantity state (|ψ>) by, for example, sending control signals to a physical device (a device within a quantum processor) that realizes a continuous-quantity state.
[0026] Preparing a check qubit means enabling the physical device that implements the check qubit to hold it, for example, by sending a control signal to it. Initializing a check qubit to the |0> state means, for example, putting the check qubit to the |0> state by applying a specific signal to it.
[0027] <s102> In S102, the calculation unit 320 applies an Adamard gate (H) to the initialized check qubit to set it to the |+> state.
[0028] <s103> In S103, the calculation unit 320 applies a control gate (CL) between the check qubit and the continuous-quantity state. The control gate (CL) applies a gate (L) to the continuous-quantity state only when the check qubit (C) is |1>.
[0029] <s104> In S104, the calculation unit 320 performs a desired process (U) on the continuous quantity state. During this time, an error (E) may occur.
[0030] <s105> In S105, the calculation unit 320 applies a control gate (CR) between the check qubit and the continuous state. The control gate (CR) applies a gate (R) to the continuous state only when the check qubit (C) is |1>. However, R = UL † U † This is the case. Note that † represents the Hermitian conjugate, which is the operation of taking the transpose of a matrix and the complex conjugate of its components.
[0031] <s106> In S106, the calculation unit 320 applies an Adamard gate (H) to the check qubit and then performs a measurement (M) on the Z basis.
[0032] <s107> In S107, if the calculation unit 320 detects that the measurement result of the check qubit is 1, it determines that an error has been detected and discards the calculation result. The calculation unit 320 repeats steps S101 to S106 until the measurement result of S106 becomes 0. Once the measurement result of S106 becomes 0, it proceeds to S108.
[0033] <s108> In S108, the calculation unit 320 adopts the continuous quantity state when the measurement result in S106 becomes 0 as the calculation result.
[0034] The above describes the operation of the quantum computing device 300 according to algorithm 1.
[0035] In Algorithm 1, if the error to be detected satisfies ER = -RE, this method can detect the error with 100% probability.
[0036] (Algorithm 2) Next, we will explain algorithm 2. Figure 5 is a flowchart showing the processing steps that the quantum computer 300 performs according to algorithm 2. Figure 6 is a gate diagram corresponding to algorithm 2, and is a gate diagram of a coherent parity check on a continuous-quantity state with assigned qubits. The operation of the quantum computer 300 will be explained with reference to Figures 5 and 6.
[0037] <s201> In S201, the initialization unit 310 prepares a continuous quantity state (|ψ>) on which the desired processing is to be performed. In addition to this continuous quantity state (|ψ>), it also prepares a check qubit and a flag qubit to detect errors that occur in the check qubit, and initializes both to the |0> state. In the gate diagram of Figure 6, the top line corresponds to the flag qubit, and the second line corresponds to the check qubit.
[0038] <s202> In S202, the calculation unit 320 applies an Adamard gate (H) to the initialized flag qubit to set it to the |+> state.
[0039] <s203> In S203, the calculation unit 320 applies a controlled NOT gate between the flag qubit and the check qubit.
[0040] <s204> In S204, the calculation unit 320 applies a Hadamard gate (H) to the check qubit.
[0041] <s205> In S205, the calculation unit 320 applies a control gate (CL) between the check qubit and the continuous-quantity state.
[0042] <s206> In S206, the calculation unit 320 performs a desired process (U) on the continuous quantity state. During this time, an error (E) may occur.
[0043] <s207> In S207, the calculation unit 320 applies a control gate (CR) between the check qubit and the continuous-quantity state. However, R = UL † U † That is the case.
[0044] <s208> In S208, the calculation unit 320 applies an Adamard gate (H) to the check qubit.
[0045] <s209> In S209, the calculation unit 320 applies a controlled NOT gate between the flag qubit and the check qubit.
[0046] <s210> In S210, the calculation unit 320 applies an Adamard gate (H) to the flag qubit, and then measures both the flag qubit and the check qubit using the Z basis.
[0047] <s211> In S211, the calculation unit 320 repeats steps S201 to S210 until both the measurement result of the flag qubit and the measurement result of the check qubit in S210 become 0. Once both the measurement result of the flag qubit and the measurement result of the check qubit become 0, the process proceeds to S212.
[0048] <s212> In S212, the calculation unit 320 adopts the continuous state as the calculation result when both the measurement result of the flag qubit and the measurement result of the check qubit are 0.
[0049] Below, we will explain more specific examples of algorithms 1 and 2 as implementation examples. Examples 1 and 2 will be described below.
[0050] (Example 1) In Example 1, the following operators are used as U, L, and R in either Algorithm 1 or Algorithm 2 described above.
[0051]
number
[0052] (Example 2) In Example 2, in either Algorithm 1 or Algorithm 2 described above, the input state |ψ> is set to a 2-mode state, and the following operators are used for U and L.
[0053]
number
[0054] In Example 2, a beam splitter operator is applied to the two-mode state, and control-displacement operators are applied before and after this. This makes it possible to partially detect the photon loss that occurs during the operation of the beam splitter operator.
[0055] (Example of hardware configuration of control device 100) The control device 100 described in this embodiment can be realized by having a computer execute a program. This computer may be a physical computer or a virtual machine on the cloud.
[0056] In other words, the control device 100 can be realized by using hardware resources such as the CPU and memory built into the computer to execute a program corresponding to the processing performed by the control device 100. The above program can be recorded on a computer-readable recording medium (such as portable memory), saved, and distributed. It is also possible to provide the above program via a network such as the Internet or email.
[0057] Figure 7 shows an example of the hardware configuration of the computer described above. The computer in Figure 7 has a drive device 1000, an auxiliary storage device 1002, a memory device 1003, a CPU 1004, an interface device 1005, a display device 1006, an input device 1007, an output device 1008, etc., all of which are interconnected by bus B. The computer may also be equipped with a GPU.
[0058] The program that enables processing on the computer is provided, for example, on a recording medium 1001 such as a CD-ROM or memory card. When the recording medium 1001 containing the program is set in the drive device 1000, the program is installed from the recording medium 1001 to the auxiliary storage device 1002 via the drive device 1000. However, the program does not necessarily have to be installed from the recording medium 1001; it may also be downloaded from another computer via a network. The auxiliary storage device 1002 stores the installed program as well as necessary files and data.
[0059] The memory device 1003 reads and stores a program from the auxiliary storage device 1002 when a program startup command is received. The CPU 1004 implements the functions related to the control device 100 according to the program stored in the memory device 1003. The interface device 1005 is used as an interface for connecting to a network, a quantum processor 200, etc. The display device 1006 displays a GUI (Graphical User Interface) etc., generated by a program. The input device 1007 consists of a keyboard and mouse, buttons, or a touch panel etc., and is used to input various operation commands. The output device 1008 outputs the calculation results.
[0060] (Effects of the embodiment) As described above, the technology described in this embodiment makes it possible to deterministically or probabilistically detect errors that occur during the execution of a desired operation (U) on a quantum computer. By discarding the results when an error is detected and using only the calculation results when no error is detected, the desired operation can be executed with high accuracy.
[0061] Furthermore, by using algorithm 2, errors occurring in the check qubit can also be detected, allowing the desired operation to be performed with higher accuracy. In particular, the technology according to this embodiment can perform the desired operation with high accuracy in each calculation result when no error is detected, making it applicable to sampling problems such as boson sampling.
[0062] The following additional information is disclosed regarding the embodiments described above.
[0063] <Note> (Additional note 1) An initialization unit prepares a continuous quantity state that is the target of the desired processing, and a check qubit, and initializes the check qubit. A calculation unit that performs a coherent parity check on the continuous quantity state using the check qubit to detect errors that occur in the continuous quantity state. A quantum computing device equipped with the following features. (Additional note 2) The calculation unit adopts the continuous state when no error is detected as the calculation result, based on the measurement of the check qubit. The quantum computing device described in Appendix 1. (Additional note 3) The initialization unit further prepares a flag qubit to detect an error that occurred in the check qubit, and initializes the flag qubit. The quantum computing device described in Appendix 1. (Additional note 4) The calculation unit adopts the continuous state as the calculation result when no error is detected in either the continuous state or the check qubit. The quantum computing device described in Appendix 3.
[0064] Although this embodiment has been described above, the present invention is not limited to this specific embodiment, and various modifications and changes are possible within the scope of the gist of the invention as described in the claims. [cpc1] Joschka Roffe, David Headley, Nicholas Chancellor, Dominic Horsman, and Viv Kendon. Protecting quantum memories using coherent parity check codes. Quantum Sci. Technol. 3, 035010 (2018). [cpc2] Dripto M. Debroy and Kenneth R. Brown. Extended flag gadgets for low-overhead circuit verification. Phys. Rev. A 102, 052409 (2020). [cpc3] Ewout van den Berg, Sergey Bravyi, Jay M. Gambetta, Petar Jurcevic, Dmitri Maslov, and Kristan Temme. Single-shot error mitigation by coherent Pauli checks. Phys. Rev. Research 5, 033193 (2023). [Explanation of symbols]
[0065] 100 Control device 200 Quantum Processors 300 Quantum computing device 310 Initialization section 320 Calculation Department 1000 drive unit 1001 Recording media 1002 Auxiliary storage 1003 Memory device 1004 CPU 1005 Interface device 1006 Display device 1007 Input device 1008 Output device
Claims
1. An initialization unit prepares a continuous quantity state that is the target of the desired processing, and a check qubit, and initializes the check qubit. A calculation unit that performs a coherent parity check on the continuous quantity state using the check qubit to detect errors that occur in the continuous quantity state. A quantum computing device equipped with the following features.
2. The calculation unit adopts the continuous state when no error is detected as the calculation result, based on the measurement of the check qubit. The quantum computing apparatus according to claim 1.
3. The initialization unit further prepares a flag qubit to detect an error that occurred in the check qubit, and initializes the flag qubit. The quantum computing apparatus according to claim 1.
4. The calculation unit adopts the continuous state as the calculation result when no error is detected in either the continuous state or the check qubit. The quantum computing apparatus according to claim 3.