Light-emitting device

Abstract

The number of independently controllable light-emitting arrays is increased while suppressing an increase in the number of signal lines. [Solution] The light-emitting device 1 includes a light-emitting section 11 consisting of multiple light-emitting arrays, each having multiple light-emitting elements; a first wiring 13 commonly connected to the multiple light-emitting arrays; a second wiring 14 connected to each group of multiple light-emitting arrays, each of which is configured by separating the multiple light-emitting arrays; and a transfer section 12 equipped with multiple transfer thyristors, which controls the lighting of multiple light-emitting elements in each of the multiple light-emitting arrays via the first wiring 13 and the second wirings 14-1 and 14-2. The number of transfer thyristors is greater than the number of light-emitting arrays, and adjacent transfer thyristors are connected to the same first light-emitting array.

Description

Technical Field

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[0001] The present invention relates to a light-emitting device.

Background Art

[0002] Techniques for irradiating different regions of an irradiation surface using a plurality of divided irradiation light sources are known (see, for example, Patent Document 1). Further, a configuration having a plurality of blocks that perform a shift operation and a shift signal line that is provided in common to the plurality of blocks and selects a block that performs a shift operation by a shift signal is known, and a technique in which the states of each block, for example, Block #1 and Block #2, are reversed is known (see, for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

[0007] According to the present invention of claim 1, it is possible to increase the number of independently controllable light-emitting arrays while suppressing an increase in the number of signal lines. According to the present invention as of claim 2, multiple adjacent light-emitting arrays can be illuminated simultaneously. As a result, line scanning can be achieved. According to the present invention of claim 3, multiple light-emitting arrays can be simultaneously lit in a long line. As a result, the range of selectable paper sizes for line scanning is expanded. According to the present invention of claim 4, the range of choices for variations in combinations of multiple light-emitting arrays is broadened, and the invention is not limited to the 2x6 configuration of the embodiment. According to the present invention of claim 5, wiring can be shared between chips. According to the present invention of claim 6, wiring can be shared between chips. According to the present invention of claim 7, wiring can be shared between chips. According to the present invention of claim 8, it is possible to share signals while suppressing an increase in the number of chip types and enabling mass production. According to the present invention of claim 9, it is possible to share signals while suppressing an increase in the number of chip types and enabling mass production. [Brief explanation of the drawing]

[0008] [Figure 1] (A) is a diagram showing an example of a combination of a light-emitting unit and a transfer unit that constitutes a light-emitting device to which this embodiment is applied. (B) is a timing chart illustrating the operation of the light-emitting unit and the transfer unit. [Figure 2]This figure shows an example of a light-emitting device to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit and a transfer unit. [Figure 3] (A) is a diagram showing the configuration of a conventional light-emitting device. (B) is a timing chart illustrating the operation of the light-emitting section and the transfer section of a conventional light-emitting device. [Figure 4] This figure shows a specific example of a light-emitting device to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit and a transfer unit. [Figure 5] This figure shows a specific example of a light-emitting device to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit and a transfer unit. [Figure 6] This figure shows a specific example of a light-emitting device to which this embodiment is applied, in which the device has four chips, each consisting of a combination of a light-emitting unit and a transfer unit. [Figure 7] This figure shows a specific example of a light-emitting device to which this embodiment is applied, in which the device has eight chips, each consisting of a combination of a light-emitting unit and a transfer unit. [Modes for carrying out the invention]

[0009] Embodiments of the present invention will be described in detail below with reference to the attached drawings. <Configuration of Light-Emitting Device 1> Figure 1(A) shows an example of a combination of a light-emitting unit 11 and a transfer unit 12 that constitute the light-emitting device 1 to which this embodiment is applied. The light-emitting device 1 is, for example, a device used as an exposure means in the print head of an image forming apparatus, generally known as a tandem type. As shown in Figure 1(A), the light-emitting device 1 has a light-emitting unit 11, a transfer unit 12, a first wiring 13, and a second wiring 14.

[0010] [Light-emitting part 11] The light emitting unit 11 is composed of blocks of a plurality of light emitting element arrays each including a plurality of light emitting elements. In FIG. 1(A), rectangular blocks each showing one of 12 light emitting element arrays including a plurality of light emitting elements are drawn, and numbers "B1" to "B12" indicating each are marked. The light emitting unit 11 has each block arranged in 2 rows and 6 columns toward the transfer unit 12, with odd-numbered blocks arranged on the first side in the main scanning direction and even-numbered blocks arranged on the second side in the main scanning direction.

[0011] Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 arranged on the first side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 arranged on the second side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction.

[0012] In the example of FIG. 1(A), the light emitting unit 11 is composed of 12 blocks arranged in 2 rows and 6 columns toward the transfer unit 12, but it is not limited to this. For example, it may be 2 rows and n columns (n is an integer value of 2 or more), that is, 2 in the direction where the blocks are adjacent (main scanning direction) and n in the direction orthogonal to the direction where the blocks are adjacent (sub-scanning direction). Further, 3 or more may be arranged in the direction where the blocks are adjacent (main scanning direction).

[0013] 〔Transfer unit 12〕 The transfer unit 12 includes a plurality of transfer thyristors and controls lighting of the plurality of light emitting elements included in each of the plurality of light emitting element arrays. The transfer unit 12 in FIG. 1(A) includes 24 transfer thyristors, and numbers "1" to "24" indicating each are marked. In the example of FIG. 1(A), the transfer thyristor numbered "2" is connected to the block B1 of the light emitting unit 11, and the transfer thyristors numbered "3" and "4" are connected to the block B2 of the light emitting unit 11. Also, the transfer thyristor numbered "5" is connected to the block B3 of the light emitting unit 11, and the transfer thyristors numbered "6" and "7" are connected to the block B4 of the light emitting unit 11.

[0014] Transfer thyristors can only be turned "ON" (lit) simultaneously if they are adjacent to each other. For this reason, in the example shown in Figure 1(A), the following connection configuration is used to simultaneously illuminate adjacent blocks B1 and B2 in the light-emitting section 11. Specifically, transfer thyristor number "2" is connected to block B1, and the transfer thyristor number "3" next to it, and the transfer thyristor number "4" next to that, are connected to the same block B2. Also, for example, to simultaneously illuminate adjacent blocks B3 and B4, the following connection configuration is used. Specifically, transfer thyristor number "5" is connected to block B3, and the transfer thyristor number "6" next to it, and the transfer thyristor number "7" next to that, are connected to the same block B4.

[0015] Thus, in the light-emitting device 1, there are cases where one transfer thyristor is connected to one block of the light-emitting section 11, and cases where two adjacent transfer thyristors are connected to one block. For this reason, the light-emitting device 1 is configured such that the number of transfer thyristors in the transfer section 12 is greater than the number of light-emitting element arrays (blocks) in the light-emitting section 11.

[0016] The transfer unit 12 is connected to a first wire 13 (Phi1 (master)) and a second wire 14 (Phi2). The transfer unit 12 causes blocks B1 to B12 of the light-emitting unit 11 to emit light via the first wire 13 and the second wire 14. The transfer unit 12, in combination with the light-emitting unit 11 described above, constitutes a single independently circulating chip 101.

[0017] [1st wiring 13] The first wiring 13 is a wiring that is commonly connected to multiple light-emitting element arrays. In the example in Figure 1(A), the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting section 11 of the chip 101 and to multiple other light-emitting element arrays. Specific examples of "multiple other light-emitting element arrays" will be described later with reference to Figure 2.

[0018] [Second wiring 14] The second wiring 14 is a wiring connected to each group of multiple light-emitting element arrays, which are configured by separating multiple light-emitting element arrays. In the example in Figure 1(A), the second wiring 14 is a wiring that is commonly connected to blocks B1 to B12, which are groups of multiple light-emitting element arrays, and to other groups of multiple light-emitting element arrays. Specific examples of "other groups of multiple light-emitting element arrays" will be described later with reference to Figure 2.

[0019] Figure 1(B) is a timing chart illustrating the operation of the light-emitting unit 11 and the transfer unit 12. In the timing chart of Figure 1(B), "H" indicates a high-level potential and "L" indicates a low-level potential. Time is assumed to flow from left to right in the diagram. In the timing chart of Figure 1(B), Phi1 (master) refers to the first wiring 13 in Figure 1(A) described above, and Phi2 refers to the second wiring 14 in Figure 1(A).

[0020] As shown in Figure 1(B), the signal transferred from the transfer unit 12 to the light-emitting unit 11 via Phi1 (master) (hereinafter referred to as the "first signal") repeatedly transitions from "L" to "H" and from "H" to "L" at approximately constant intervals, and maintains that state when it transitions from "L" to "H" at timing t3. In addition, of the signals transferred from the transfer unit 12 to the light-emitting unit 11 via Phi2 (hereinafter referred to as the "second signal"), the second signal transferred to blocks B1 and B2 of the light-emitting unit 11 maintains that state when it transitions from "L" to "H" at timing t1. As a result, adjacent blocks B1 and B2 in the light-emitting unit 11 light up simultaneously. Furthermore, of the second signals, the second signal transferred to blocks B5 and B6 of the light-emitting unit 11 maintains that state when it transitions from "L" to "H" at timing t2. As a result, adjacent blocks B5 and B6 in the main scanning direction of the light-emitting unit 11 light up simultaneously.

[0021] Here, the multiple light-emitting elements constituting each block of the light-emitting section 11 are arranged such that the length increases in the direction in which multiple blocks that light up simultaneously are adjacent (main scanning direction). Specifically, for example, in the example shown in Figure 1(A), the multiple light-emitting elements constituting each of the blocks B1 and B2 that light up simultaneously are arranged such that the length increases in the direction in which blocks B1 and B2 are adjacent (main scanning direction).

[0022] Figure 2 shows an example of a light-emitting device 1 to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit 11 and a transfer unit 12. By arranging multiple chips, each consisting of a light-emitting unit 11 and a transfer unit 12, in a line in the main scanning direction, it is possible to realize "line scanning," which simultaneously lights up multiple light-emitting arrays in a line in the main scanning direction. Figure 2 shows an example of a light-emitting device 1 that realizes line scanning by arranging two chips 201 and 202 opposite each other.

[0023] The configuration of chip 201 shown in Figure 2 is the same as the configuration of chip 101 shown in Figure 1(A) above. That is, in the light-emitting section 11 of chip 201, each block is arranged in 2 rows and 6 columns facing the transfer section 12, with odd-numbered blocks located on the first side in the main scanning direction and even-numbered blocks located on the second side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 located on the first side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 located on the second side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction.

[0024] The configuration of chip 202 shown in Figure 2 is the same as that of chip 101 shown in Figure 1(A) above. That is, the light-emitting section 11 of chip 202 has blocks arranged in 2 rows and 6 columns facing the transfer section 12. However, since chip 202 is positioned opposite chip 201, odd-numbered blocks are positioned on the second side in the main scanning direction, and even-numbered blocks are positioned on the first side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 positioned on the second side in the main scanning direction are arranged in that order from the fourth side to the third side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 positioned on the first side in the main scanning direction are arranged in that order from the fourth side to the third side in the sub-scanning direction.

[0025] Each transfer unit 12 of chips 201 and 202 is equipped with 24 transfer thyristors, each numbered "1" through "24". The connection configuration between the light-emitting unit 11 and the transfer unit 12 of chips 201 and 202 is the same as the connection configuration between the light-emitting unit 11 and the transfer unit 12 of chip 101 shown in Figure 1(A).

[0026] A first wiring 13 (Phi1 (master)) is connected to the respective transfer units 12 of chip 201 and chip 202. In the example in Figure 2, the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting unit 11 of chip 201 and blocks B1 to B12 of the light-emitting unit 11 of chip 202. The first wiring 13 is connected to a controller 15 that controls chips 201 and 202.

[0027] The transfer unit 12 of chip 201 is connected to the second wiring 14-1 (Phi2-1). In the example in Figure 2, the second wiring 14-1 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 201, which constitutes a group of multiple light-emitting element arrays. The second wiring 14-1 is connected to the controller 15 that controls chips 201 and 202. The transfer unit 12 of chip 201 causes blocks B1 to B12 of the light-emitting unit 11 of chip 201 to emit light via the first wiring 13 and the second wiring 14-1.

[0028] The transfer unit 12 of chip 202 is connected to the second wiring 14-2 (Phi2-2). In the example in Figure 2, the second wiring 14-2 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 202, which constitutes a group of multiple light-emitting element arrays. The second wiring 14-2 is connected to the controller 15 that controls chips 201 and 202. The transfer unit 12 of chip 202 causes blocks B1 to B12 of the light-emitting unit 11 of chip 202 to emit light via the first wiring 13 and the second wiring 14-2.

[0029] As shown in Figure 2, in the example, chip 201 and chip 202 are arranged facing each other. This makes it possible to simultaneously illuminate, for example, blocks B3 and B4 adjacent in the main scanning direction in the light-emitting section 11 of chip 201, and blocks B9 and B10 adjacent in the main scanning direction in the light-emitting section 11 of chip 202. As shown in Figure 2, blocks B3 and B4 of chip 201 and blocks B9 and B10 of chip 202 form the same line in the main scanning direction, thus realizing the line scan described above.

[0030] <Comparative Example> Figure 3(A) shows the configuration of a conventional light-emitting device. Figure 3(B) is a timing chart illustrating the operation of the light-emitting section and the transfer section of a conventional light-emitting device. In the timing chart of Figure 3(B), "H" indicates a high-level potential and "L" indicates a low-level potential. Time is assumed to flow from left to right in the diagram. In the timing chart of Figure 3(B), Phi1 (master) indicates the first wiring and Phi2 indicates the second wiring.

[0031] Conventional light-emitting devices, like the light-emitting device 1 according to this embodiment shown in Figures 1 and 2 above, have a light-emitting section and a transfer section, and the combination of the light-emitting section and the transfer section constitutes one chip. In the light-emitting section, each block is arranged in 2 rows and 6 columns facing the transfer section, with odd-numbered blocks located on the first side in the main scanning direction and even-numbered blocks located on the second side in the main scanning direction. The transfer section has 24 transfer thyristors, each labeled with a number from "1" to "24".

[0032] Conventional light-emitting devices have a second wiring connected to each chip, so the block to be lit is specified for each chip. Specifically, as shown in Figure 3(B), a first signal is transmitted from the transfer unit to the light-emitting unit via a common first wiring, and a second signal is transmitted from the transfer unit to the light-emitting unit via a second wiring connected to each chip, to sequentially specify and light up blocks B1 to B12.

[0033] However, unlike the light-emitting device 1 according to this embodiment shown in Figures 1 and 2 above, in conventional light-emitting devices, only the even-numbered transfer thyristors among the 24 transfer thyristors in the transfer unit share the first wiring (Phi1 (master)) connected to the light-emitting unit. Therefore, it is not possible to light up two adjacent blocks in the main scanning direction simultaneously.

[0034] <Example 1> Figure 4 shows a specific example of a light-emitting device 1 to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit 11 and a transfer unit 12. As described above, line scanning can be achieved by arranging multiple chips, each consisting of a light-emitting unit 11 and a transfer unit 12, in a line in the main scanning direction. Figure 4 shows an example of a light-emitting device 1 that achieves line scanning by arranging two chips 401 and 402 so as to be approximately mirror-symmetric in the main scanning direction.

[0035] The configuration of chip 401 shown in Figure 4 is the same as the configuration of chip 101 shown in Figure 1(A) above. That is, in the light-emitting section 11 of chip 401, each block is arranged in 2 rows and 6 columns facing the transfer section 12, with odd-numbered blocks located on the first side in the main scanning direction and even-numbered blocks located on the second side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 located on the first side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 located on the second side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction.

[0036] The configuration of chip 402 shown in Figure 4 is basically the same as the configuration of chip 101 shown in Figure 1(A) above. That is, the light-emitting section 11 of chip 402 has blocks arranged in 2 rows and 6 columns facing the transfer section 12. However, since chip 402 is arranged to be approximately mirror-symmetric with respect to chip 401, odd-numbered blocks are arranged on the second side in the main scanning direction, and even-numbered blocks are arranged on the first side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11, which are arranged on the second side in the main scanning direction, are arranged in that order from the third side to the fourth side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12, which are arranged on the first side in the main scanning direction, are arranged in that order from the third side to the fourth side in the sub-scanning direction.

[0037] Each of the transfer units 12 of chips 401 and 402 is equipped with 24 transfer thyristors, and each is numbered "1" through "24". The connection configuration between the light-emitting unit 11 and the transfer unit 12 of chips 401 and 402 is basically the same as the connection configuration between the light-emitting unit 11 and the transfer unit 12 of chip 101 shown in Figure 1(A), so some parts of the drawing have been omitted.

[0038] A first wiring 13 (Phi1 (master)) is connected to the respective transfer units 12 of chip 401 and chip 402. In the example in Figure 4, the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting unit 11 of chip 401 and blocks B1 to B12 of the light-emitting unit 11 of chip 402. The first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 401 via terminal B of the transfer unit 12, and to blocks B1 to B12 of the light-emitting unit 11 of chip 402 via terminal B of the transfer unit 12. The first wiring 13 is also connected to a controller 15 that controls chips 401 and 402.

[0039] Furthermore, a second wiring 14 (Phi2) is connected to the respective transfer units 12 of chip 401 and chip 402. In the example in Figure 4, the second wiring 14 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting unit 11 of chip 401 and blocks B1 to B12 of the light-emitting unit 11 of chip 402, which each constitute a group of multiple light-emitting element arrays. The second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 401 via terminal A of the transfer unit 12, and to blocks B1 to B12 of the light-emitting unit 11 of chip 402 via terminal A of the transfer unit 12. The second wiring 14 is connected to a controller 15 that controls chips 401 and 402.

[0040] The transfer unit 12 of chip 401 causes blocks B1 to B12 of the light-emitting unit 11 of chip 401 to emit light via the first wiring 13 and the second wiring 14. Similarly, the transfer unit 12 of chip 402 causes blocks B1 to B12 of the light-emitting unit 11 of chip 402 to emit light via the first wiring 13 and the second wiring 14. In other words, by arranging the two chips 401 and 402 to be substantially mirror-symmetric in the main scanning direction, not only the first wiring 13 but also the second wiring 14 is shared.

[0041] As shown in Figure 4, in the example, chips 401 and 402 are arranged to be approximately mirror-symmetric in the main scanning direction. Therefore, for example, it is possible to simultaneously light up adjacent blocks B3 and B4 in the main scanning direction in the light-emitting section 11 of chip 401 and adjacent blocks B3 and B4 in the main scanning direction in the light-emitting section 11 of chip 402. As shown in Figure 4, blocks B3 and B4 of chip 401 and blocks B3 and B4 of chip 402 form the same line in the main scanning direction, thus realizing the line scan described above.

[0042] <Modification 2> Figure 5 shows a specific example of a light-emitting device 1 to which this embodiment is applied, in which the device has two chips, each consisting of a light-emitting unit 11 and a transfer unit 12. As described above, line scanning can be achieved by arranging multiple chips, each consisting of a light-emitting unit 11 and a transfer unit 12, in a line in the main scanning direction. Figure 5 shows an example of a light-emitting device 1 that achieves line scanning by arranging two chips 501 and 502 in a substantially point-symmetrical manner in the main scanning direction.

[0043] The configuration of chip 501 shown in Figure 5 is the same as the configuration of chip 101 shown in Figure 1(A) above. That is, in the light-emitting section 11 of chip 501, each block is arranged in 2 rows and 6 columns facing the transfer section 12, with odd-numbered blocks located on the first side in the main scanning direction and even-numbered blocks located on the second side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 located on the first side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 located on the second side in the main scanning direction are arranged in that order from the third side to the fourth side in the sub-scanning direction.

[0044] The chip 502 shown in Figure 5 is configured such that the lighting order is reversed when the shift operation starts from the first wiring 13 (Phi1 (master)) and from the second wiring 14 (Phi2). However, the other configurations are basically the same as those of the chip 101 shown in Figure 1(A) above. It is known that there are multiple blocks that perform shift operations, and a shift signal line is provided in common to the multiple blocks to select the block to perform the shift operation based on the shift signal. In such a configuration, the state is reversed in each block, for example, between the first block and the second block. In contrast, in this embodiment, that circuit structure is applied to the chip, and the blocks are specified with the chips that are transferred in the forward direction and the chips that are transferred in the reverse direction facing each other point-symmetrically.

[0045] Here, the light-emitting section 11 of the chip 502 is arranged in a 2x6 grid with each block facing the transfer section 12. However, since the chip 502 is arranged to be approximately point-symmetric with respect to the chip 501, odd-numbered blocks are located on the second side in the main scanning direction, and even-numbered blocks are located on the first side in the main scanning direction. Specifically, the odd-numbered blocks B1, B3, B5, B7, B9, and B11 located on the second side in the main scanning direction are arranged in that order from the fourth side to the third side in the sub-scanning direction. Also, the even-numbered blocks B2, B4, B6, B8, B10, and B12 located on the first side in the main scanning direction are arranged in that order from the fourth side to the third side in the sub-scanning direction.

[0046] Each of the transfer units 12 of chips 501 and 502 is equipped with 24 transfer thyristors, and is numbered "1" through "24" to indicate each unit. The connection configuration between the light-emitting unit 11 and the transfer unit 12 of chips 501 and 502 is basically the same as the connection configuration between the light-emitting unit 11 and the transfer unit 12 of chip 101 shown in Figure 1(A), so some parts of the drawing have been omitted.

[0047] A first wiring 13 (Phi1 (master)) is connected to the respective transfer units 12 of chip 501 and chip 502. The first wiring 13 is also connected to a controller 15 that controls chips 501 and 502. In the example in Figure 5, the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting unit 11 of chip 501 and blocks B1 to B12 of the light-emitting unit 11 of chip 502. The first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 501 via terminal A of the transfer unit 12 of chip 501, and to blocks B1 to B12 of the light-emitting unit 11 of chip 502 via terminal B of the transfer unit 12 of chip 502. In other words, the terminals connecting the first wiring 13 to the transfer unit 12 are reversed (A and B are reversed) between chip 501 and chip 502. In the example shown in Figure 5, chips 501 and 502 have reversed transmission depending on whether the signal starts from the first wiring 13 (Phi1 (master)) or the second wiring 14 (Phi2). As a result, terminals A and B are reversed on chips 501 and 502, causing the chips and adjacent blocks that are point-symmetrical to each other to light up simultaneously.

[0048] In the example shown in Figure 5, four blocks aligned in a line in the main scanning direction are selected and illuminated simultaneously in chips 501 and 502. For example, four blocks are selected and illuminated simultaneously: blocks B1 and B2 adjacent in the main scanning direction in the light-emitting section 11 of chip 501, and blocks B11 and B12 adjacent in the main scanning direction in the light-emitting section 11 of chip 502. Additionally, four blocks are selected and illuminated simultaneously: blocks B3 and B4 adjacent in the main scanning direction in the light-emitting section 11 of chip 501, and blocks B9 and B10 adjacent in the main scanning direction in the light-emitting section 11 of chip 502.

[0049] In addition, the combinations of blocks B5 and B6 of chip 501 with blocks B7 and B8 of chip 502, and the combinations of blocks B7 and B8 of chip 501 with blocks B5 and B6 of chip 502 are also specified and illuminate simultaneously. Similarly, the combinations of blocks B9 and B10 of chip 501 with blocks B3 and B4 of chip 502, and the combinations of blocks B11 and B12 of chip 501 with blocks B1 and B2 of chip 502 are also specified and illuminate simultaneously.

[0050] Furthermore, a second wiring 14 (Phi2) is connected to the respective transfer units 12 of chip 501 and chip 502. In the example in Figure 5, the second wiring 14 is a wiring that is commonly connected to blocks B1 to B12 of the light-emitting unit 11 of chip 501 and blocks B1 to B12 of the light-emitting unit 11 of chip 502, which each constitute a group of multiple light-emitting element arrays. The second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 of chip 501 via terminal B of the transfer unit 12, and to blocks B1 to B12 of the light-emitting unit 11 of chip 502 via terminal A of the transfer unit 12. In other words, the terminals connecting the second wiring 14 to the transfer unit 12 are reversed (A and B are reversed) between chip 501 and chip 502. The second wiring 14 is also connected to a controller 15 that controls chips 501 and 502.

[0051] The transfer unit 12 of chip 501 causes blocks B1 to B12 of the light-emitting unit 11 of chip 501 to emit light via the first wiring 13 and the second wiring 14. Similarly, the transfer unit 12 of chip 502 causes blocks B1 to B12 of the light-emitting unit 11 of chip 502 to emit light via the first wiring 13 and the second wiring 14. In other words, by arranging the two chips 501 and 502 so as to be approximately point-symmetric in the main scanning direction, not only the first wiring 13 but also the second wiring 14 is shared.

[0052] As shown in Figure 5, in the example, chips 501 and 502 are arranged so as to be approximately point-symmetric in the main scanning direction. Therefore, for example, it is possible to simultaneously light up adjacent blocks B3 and B4 in the main scanning direction in the light-emitting section 11 of chip 501 and adjacent blocks B9 and B10 in the main scanning direction in the light-emitting section 11 of chip 502. Blocks B3 and B4 of chip 501 and blocks B9 and B10 of chip 502 form the same line in the main scanning direction, as shown in Figure 5, thus enabling the line scan described above.

[0053] <Variation 3> Figure 6 shows a specific example of a light-emitting device 1 to which this embodiment is applied, in which the device has four chips, each consisting of a combination of a light-emitting unit 11 and a transfer unit 12. As described above, line scanning can be achieved by arranging multiple chips, each consisting of a light-emitting unit 11 and a transfer unit 12, in a line in the main scanning direction. Figure 6 shows an example of a light-emitting device 1 in which line scanning is achieved by arranging four chips 601 to 604 such that chips 601 and 602 and chips 603 and 604 are arranged to be approximately point-symmetric in the main scanning direction.

[0054] The configurations of chips 601 and 602 shown in Figure 6 are the same as those of chips 501 and 502 shown in Figure 5. Similarly, the configurations of chips 603 and 604 shown in Figure 6 are the same as those of chips 501 and 502 shown in Figure 5. Therefore, some parts of the drawing have been omitted.

[0055] A first wiring 13 (Phi1 (master)) is connected to each of the transfer units 12 of chips 601 to 604. In the example in Figure 6, the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of each of the light-emitting units 11 of chips 601 to 604. The first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 601, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 602.

[0056] Furthermore, the first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 603, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 604. In addition, the first wiring 13 is connected to a controller 15 that controls chips 601 to 604.

[0057] Furthermore, a second wiring 14 (Phi2) is connected to each of the transfer units 12 of chips 601 to 604. In the example in Figure 6, the second wiring 14 is a wiring that is commonly connected to blocks B1 to B12 of each of the light-emitting units 11 of chips 601 to 604, each constituting a group of multiple light-emitting element arrays. The second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 601, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 602.

[0058] Furthermore, the second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 603, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 604. The second wiring 14 is also connected to a controller 15 that controls chips 601 to 604.

[0059] Each transfer unit 12 of chips 601 to 604 causes blocks B1 to B12 of each light-emitting unit 11 of chips 601 to 604 to emit light via the first wiring 13 and the second wiring 14. That is, when arranging the four chips 601 to 604, by arranging chips 601 and 602 and chips 603 and 604 so that they are approximately point-symmetric in the main scanning direction, not only the first wiring 13 but also the second wiring 14 is shared.

[0060] As shown in the example in Figure 6, chips 601 and 602 and chips 603 and 604 are arranged to be approximately point-symmetric in the main scanning direction. Therefore, for example, it is possible to simultaneously illuminate blocks B3 and B4 of chip 601, blocks B9 and B10 of chip 602, blocks B3 and B4 of chip 603, and blocks B9 and B10 of chip 604. As shown in Figure 6, blocks B3 and B4 of chip 601 and blocks B9 and B10 of chip 602 form the same line in the main scanning direction. Also, blocks B3 and B4 of chip 603 and blocks B9 and B10 of chip 604 form the same line in the main scanning direction. Therefore, the light-emitting device 1 in Figure 6 realizes the line scanning described above.

[0061] Furthermore, if you want to light up the light-emitting parts 11 of chips 601 and 602, but not the light-emitting parts 11 of chips 603 and 604, you can instruct the controller 15 to do so. Also, if you want to light up the light-emitting parts 11 of chips 603 and 604, but not the light-emitting parts 11 of chips 601 and 602, you can instruct the controller 15 to do so.

[0062] <Modification 4> Figure 7 shows a specific example of a light-emitting device 1 to which this embodiment is applied, in which the device has eight chips, each consisting of a combination of a light-emitting unit 11 and a transfer unit 12. As described above, line scanning can be achieved by arranging multiple chips, each consisting of a light-emitting unit 11 and a transfer unit 12, in a line in the main scanning direction. Figure 7 shows an example of a light-emitting device 1 in which line scanning is achieved by arranging eight chips 701 to 708 such that each of the four opposing sets of chips is arranged to be approximately point-symmetric in the main scanning direction.

[0063] As shown in Figure 7, the configurations of the opposing chips 701 and 702, 703 and 704, 705 and 706, and 707 and 708 are the same as those of chips 501 and 502 shown in Figure 5 above. For this reason, some parts of the drawing have been omitted.

[0064] A first wiring 13 (Phi1 (master)) is connected to each of the transfer units 12 of chips 701 to 708. In the example in Figure 7, the first wiring 13 is a wiring that is commonly connected to blocks B1 to B12 of each of the light-emitting units 11 of chips 701 to 708. The first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 701, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 702.

[0065] Furthermore, the first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 703, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 704. Also, the first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 705, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 706.

[0066] Furthermore, the first wiring 13 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 707, and to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 708. In addition, the first wiring 13 is connected to a controller 15 that controls chips 701 to 708.

[0067] Furthermore, a second wiring 14 (Phi2) is connected to each of the transfer units 12 of chips 701 to 708. In the example in Figure 7, the second wiring 14 is a wiring that is commonly connected to blocks B1 to B12 of each of the light-emitting units 11 of chips 701 to 708, each constituting a group of multiple light-emitting arrays. The second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 701, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 702.

[0068] Furthermore, the second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 703, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 704. Also, the second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 705, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 706.

[0069] Furthermore, the second wiring 14 is connected to blocks B1 to B12 of the light-emitting unit 11 via terminal B of the transfer unit 12 of chip 707, and to blocks B1 to B12 of the light-emitting unit 11 via terminal A of the transfer unit 12 of chip 708. The second wiring 14 is also connected to a controller 15 that controls chips 701 to 708.

[0070] Each transfer unit 12 of chips 701 to 708 causes blocks B1 to B12 of each light-emitting unit 11 of chips 701 to 708 to emit light via the first wiring 13 and the second wiring 14. That is, when arranging the eight chips 701 to 708, by arranging each of the four opposing sets of chips so that they are approximately point-symmetric in the main scanning direction, not only the first wiring 13 but also the second wiring 14 is shared.

[0071] As shown in the example in Figure 7, each of the four opposing sets of chips is arranged so as to be approximately point-symmetric in the main scanning direction. This makes it possible, for example, to simultaneously illuminate blocks B3 and B4 of chips 701, 703, 705, and 707, and blocks B9 and B10 of chips 702, 704, 706, and 708.

[0072] As shown in Figure 7, blocks B3 and B4 of chips 701 and 703, and blocks B9 and B10 of chips 702 and 704, respectively, form the same line in the main scanning direction. Similarly, blocks B3 and B4 of chips 705 and 707, respectively, and blocks B9 and B10 of chips 706 and 708, respectively, form the same line in the main scanning direction. Therefore, the light-emitting device 1 in Figure 7 achieves the line scanning described above.

[0073] Furthermore, if you want to light up the light-emitting parts 11 of chips 701 to 704 but not the light-emitting parts 11 of chips 705 to 708, you can instruct the controller 15 to do so. Also, if you want to light up the light-emitting parts 11 of chips 705 to 708 but not the light-emitting parts 11 of chips 701 to 704, you can instruct the controller 15 to do so.

[0074] <Other Embodiments> Although the embodiments described above have been explained, the present invention is not limited to the embodiments described above. Furthermore, the effects of the present invention are not limited to those described in the embodiments described above. For example, the configurations of the light-emitting device 1 shown in Figures 1(A), 2, 4 to 7 are merely examples for achieving the objectives of the present invention and are not particularly limited.

[0075] Furthermore, while the above-described embodiments have provided specific examples of cases where the two opposing chips are approximately mirror-symmetric or approximately point-symmetric, the invention is not limited to these cases. For example, the two opposing chips may be approximately line-symmetric.

[0076] (Note) (((1))) Multiple light-emitting arrays, each having multiple light-emitting elements, A first wiring connected in common to the plurality of light-emitting element arrays, A second wiring connected to each group of multiple light-emitting arrays, which are configured by separating the multiple light-emitting arrays, A transfer unit comprising multiple transfer thyristors, which controls the illumination of the multiple light-emitting elements in each of the multiple light-emitting element arrays via the first and second wiring, It has, The number of transfer thyristors is greater than the number of light-emitting arrays, and adjacent transfer thyristors are connected to the same first light-emitting array. Light-emitting device. (((2))) A second light-emitting array is connected to a transfer thyristor located next to the transfer thyristor connected to the first light-emitting array, and the first light-emitting array is adjacent to it and illuminates simultaneously. The light-emitting device described in (((1))). (((3))) The plurality of light-emitting elements constituting the first light-emitting element array are arranged in a long direction in which the plurality of light-emitting element arrays that light up simultaneously are adjacent to each other. The light-emitting device described in (((1))) or (((2))). (((4))) The plurality of light-emitting element arrays are arranged in pairs in adjacent directions and in rows of n (where n is an integer of 2 or more) in directions orthogonal to those adjacent directions. The light-emitting device described in (((3))). (((5))) The transfer unit and the plurality of light-emitting element arrays combine to form a chip, and the light-emitting element arrays of two such chips, which are arranged facing each other, light up simultaneously in the adjacent direction. The light-emitting device described in (((2))) or (((3))). (((6))) The two chips share a wire connected to the first wiring. The light-emitting device described in (((5))). (((7))) The configuration of the two chips, which are arranged opposite each other, is substantially symmetrical. The light-emitting device described in (((6))). (((8))) The two chips have substantially mirror-symmetric connections between the first and second wirings that connect the light-emitting array and the transfer unit. The wires connected to the second wiring are shared, The light-emitting device described in (((6))). (((9))) The configuration of the two chips, which are arranged opposite each other, is approximately point-symmetrical. The light-emitting device described in (((6))).

[0077] According to the present invention (((1))), it is possible to increase the number of independently controllable light-emitting arrays while suppressing an increase in the number of signal lines. According to the present invention of (((2))), multiple adjacent light-emitting arrays can be lit simultaneously. As a result, line scanning can be realized. According to the present invention of (((3))), multiple light-emitting arrays can be lit simultaneously in a long line. As a result, the range of selectable paper sizes for line scanning is expanded. According to the present invention of (((4))), the range of choices for variations in combinations of multiple light-emitting arrays is broadened, and the invention is not limited to the 2x6 configuration of the embodiment. According to the present invention of (((5))), wiring can be shared between chips. According to the present invention of (((6))), wiring can be shared between chips. According to the present invention of (((7))), wiring can be shared between chips. According to the present invention of (((8))), it is possible to share signals while suppressing an increase in the number of chip types and enabling mass production. According to the present invention of (((9))), it is possible to share signals while suppressing an increase in the number of chip types and enabling mass production. [Explanation of symbols]

[0078] 1...Light-emitting device, 11...Light-emitting unit, 12...Transfer unit, 13...First wiring, 14, 14-1, 14-2...Second wiring, 15...Controller, 101, 201, 202, 401, 402, 501, 502, 601, 602, 603, 604, 701, 702, 703, 704, 705, 706, 707, 708...Chip

Claims

1. Multiple light-emitting arrays, each having multiple light-emitting elements, A first wiring connected in common to the plurality of light-emitting arrays, A second wiring connected to each group of multiple light-emitting arrays, which are configured by separating the multiple light-emitting arrays, A transfer unit comprising multiple transfer thyristors, which controls the illumination of the multiple light-emitting elements provided in each of the multiple light-emitting element arrays via the first and second wiring, It has, The number of transfer thyristors is greater than the number of light-emitting arrays, and adjacent transfer thyristors are connected to the same first light-emitting array. Light-emitting device.

2. A second light-emitting array is connected to a transfer thyristor located next to the transfer thyristor connected to the first light-emitting array, and the first light-emitting array is adjacent to it and illuminates simultaneously. The light-emitting device according to claim 1.

3. The plurality of light-emitting elements constituting the first light-emitting element array are arranged in a long direction in which the plurality of light-emitting element arrays that light up simultaneously are adjacent to each other. The light-emitting device according to claim 2.

4. The plurality of light-emitting element arrays are arranged in pairs in adjacent directions and in n directions (where n is an integer of 2 or more) in directions orthogonal to those adjacent directions. The light-emitting device according to claim 3.

5. The transfer unit and the plurality of light-emitting element arrays combine to form a chip, and the light-emitting element arrays of two such chips, which are arranged facing each other, light up simultaneously in the adjacent direction. The light-emitting device according to claim 2.

6. The two chips share the wire connected to the first wiring. The light-emitting device according to claim 5.

7. The configuration of the two chips, which are arranged opposite each other, is substantially symmetrical. The light-emitting device according to claim 6.

8. The two chips are such that the connections of the first and second wirings connecting the light-emitting array and the transfer unit are substantially mirror-symmetric. The wires connected to the second wiring are shared, The light-emitting device according to claim 6.

9. The configuration of the two chips, which are arranged opposite each other, is approximately point-symmetrical. The light-emitting device according to claim 6.

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