Ceramic substrates, composite piezoelectric substrates, electronic devices and modules

The ceramic substrate with a doping layer addresses wave leakage issues by enhancing the Q factor and reducing insertion loss, improving the performance of acoustic wave devices.

JP2026079781APending Publication Date: 2026-05-15QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
Filing Date
2025-10-27
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Wave leakage through ceramic substrates in acoustic wave devices affects the quality factor (Q value) and insertion loss, compromising device performance.

Method used

A ceramic substrate with a doping layer containing a target dopant at specific concentrations is used to confine elastic wave energy within the piezoelectric material layer, improving the Q factor and reducing insertion loss.

Benefits of technology

The doping layer enhances the Q value by approximately 19% and reduces insertion loss by about 0.093 dB, effectively confining elastic wave energy and improving electrical characteristics.

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Abstract

The present invention provides elastic wave devices, ceramic substrates, composite piezoelectric substrates, electronic devices, and modules that can achieve improved Q-factor and reduced insertion loss. [Solution] The ceramic substrate 11 comprises a ceramic material base 110, the ceramic material base having opposing first surfaces 111 and second surfaces 112. A doping layer 113 of a predetermined thickness is formed inside the ceramic material base, extending in a direction approaching from the first surface toward the second surface. The doping layer contains a target dopant added to the ceramic material base, and the concentration of the target dopant in the doping layer is 1 × 10⁻⁶. 17 ions / cm 3 or 5 x 10 20 ions / cm 3 That is the case.
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Description

[Technical Field]

[0001] The present invention relates to the technical field of electronic devices, and more particularly to ceramic substrates, composite piezoelectric substrates, electronic devices, and modules. [Background technology]

[0002] In some acoustic wave devices, such as SAW (surface acoustic wave) devices, composite piezoelectric substrates combining a ceramic substrate and a piezoelectric material layer are used to improve temperature characteristics. However, in surface acoustic wave devices, wave leakage can occur through the ceramic substrate during wave propagation in the piezoelectric material layer, which can adversely affect the device's quality factor (Q value) and insertion loss. [Overview of the project]

[0003] The present invention aims to mitigate problems caused by sound wave leakage in elastic wave devices and provides ceramic substrates, composite piezoelectric substrates, electronic devices, and modules that can improve the Q factor and insertion loss.

[0004] A ceramic substrate according to one embodiment of the present invention comprises a ceramic material substrate, the ceramic material substrate having opposing first and second surfaces. A doping layer of a predetermined thickness is formed within the ceramic material substrate, extending in a direction approaching from the first surface toward the second surface, and the doping layer contains a target dopant doped into the ceramic material substrate. The concentration of the target dopant in the doping layer is 1 × 10⁻⁶ 17 or 5 x 10 20 ions / cm 3 That is the case.

[0005] A composite piezoelectric substrate according to one embodiment of the present invention comprises a ceramic substrate, a piezoelectric material layer provided on the side of the first surface opposite to the second surface, and an electrode located on the side of the piezoelectric material layer opposite to the ceramic substrate.

[0006] An electronic device according to one embodiment of the present invention comprises the composite piezoelectric substrate.

[0007] A module according to one embodiment of the present invention comprises a wiring board, a plurality of external connection terminals, an inductor, a sealing portion, and the electronic device.

[0008] According to the above embodiment of the present invention, at least one or more of the following advantageous effects can be achieved.

[0009] In other words, by forming a doping layer with a predetermined dopant concentration range on the piezoelectric material layer side of the ceramic substrate, it becomes possible to confine more elastic wave energy within the piezoelectric material layer, thereby improving the Q factor and reducing insertion loss. [Brief explanation of the drawing]

[0010] Specific embodiments of the present invention will be described in detail with reference to the following drawings. Figure 1 is a schematic diagram showing the structure of a ceramic substrate according to one embodiment of the present invention. Figure 2 is a schematic diagram showing the structure of a composite piezoelectric substrate according to one embodiment of the present invention. Figure 3 is a schematic diagram showing the structure of an electronic device according to one embodiment of the present invention. Figure 4 is a schematic diagram showing the manufacturing process of the electronic device shown in Figure 3. Figure 5 is a comparison diagram of the Q values ​​of Example 1 and Comparative Example 1 of the present invention. Figure 6 is a comparative diagram of the insertion losses between Example 1 and Comparative Example 1 of the present invention. Figure 7 is a schematic diagram showing the structure of an electronic device according to another embodiment of the present invention. Figure 8 is a schematic diagram showing the structure of an electronic device according to yet another embodiment of the present invention. Figure 9 is a schematic diagram showing the structure of an electronic device according to another embodiment of the present invention. Figure 10 is a schematic diagram showing the structure of a module according to one embodiment of the present invention. [Modes for carrying out the invention]

[0011] In order to provide a clearer understanding of the above-mentioned objectives, features, and advantages of the present invention, specific embodiments of the present invention will be described in detail below with reference to the drawings.

[0012] To enable those skilled in the art to better understand the technical means of the present invention, the technical means will be clearly and completely described below with reference to drawings of embodiments of the present invention. However, the embodiments described are only some embodiments of the present invention and do not represent all embodiments of the present invention. Any other embodiments that can be obtained by those skilled in the art without creative effort based on embodiments of the present invention are also construed to be within the technical scope of the present invention.

[0013] It should be noted that terms such as “first,” “second,” etc., used in this specification, claims, and drawings are for distinguishing similar configurations and do not indicate a specific order or priority. Where appropriate, these terms may be used interchangeably, and embodiments of the present invention may be implemented in an order different from that illustrated or described herein. Furthermore, terms such as "include" and "equip" and their variations are intended to imply non-limiting inclusion, meaning that when a process, method, system, product, or apparatus includes the listed elements or processes, it may also include other elements or processes that are not explicitly stated therein or that are inherently present in the technology.

[0014] Furthermore, although the present invention is described in terms of multiple embodiments, this is for explanatory convenience and does not imply any specific limitation. The features of each embodiment can be combined with each other and used by cross-referencing, as long as they do not contradict each other.

[0015] As shown in FIG. 3, an electronic device 100 according to an embodiment of the present invention includes a ceramic substrate 11, a piezoelectric material layer 12, and an electrode 20. Referring to FIG. 1, the ceramic substrate 11 in this embodiment includes a ceramic material substrate 110, and the ceramic material substrate 110 has opposite first and second surfaces 111 and 112. Inside the ceramic material substrate 110, a doping layer 113 having a predetermined thickness extending in a direction approaching from the first surface 111 to the second surface 112 is formed. The doping layer 113 contains a target dopant doped into the ceramic material substrate 110. In some embodiments, the concentration range of the target dopant in the doping layer 113 is 1×10 17 to 20 ions / cm 3 . Examples include 1.67×10 17 ions / cm 3 , 3.33×10 17 ions / cm 3 , 5.33×10 18 ions / cm 3 , 5×10 18 ions / cm 3 , 6.67×10 18 ions / cm 3 and the like. In the electronic device 100, the piezoelectric material layer 12 is provided on the side opposite to the second surface 112 of the first surface 111. The piezoelectric material layer 12 and the ceramic substrate 11 constitute a composite piezoelectric substrate 10. Also, in the electronic device 100, the electrode 20 is located on the side opposite to the ceramic substrate 11 of the piezoelectric material layer 12.

[0016] Note that the ceramic material substrate 110 is, for example, a polycrystalline material, and specifically, any one of polycrystalline spinel, polycrystalline sapphire, polycrystalline aluminum nitride, polycrystalline magnesium oxide, polycrystalline quartz, and polycrystalline silicon carbide may be used.

[0017] The doping layer 113 is a layer obtained by changing the physical, chemical, or electrical properties of the ceramic material substrate 110 by introducing foreign atoms or ions into the ceramic material substrate 110. For example, the crystal lattice structure (lattice strain), surface roughness, defect distribution, chemical composition, and conductivity can be changed. The doping layer 113 contains the elements that make up the ceramic material substrate 110, as well as the target dopant. Specifically, the doping layer 113 is formed by injecting the target dopant from the first surface 111 of the ceramic material substrate 110 into its interior. The doping layer 113 contains all the constituent elements of the ceramic material substrate 110 and is understood as a layer that is based on the ceramic material substrate 110 while also containing the target dopant. After injecting the target dopant into the ceramic material substrate 110, the portion into which the target dopant was injected (corresponding to the upper layer of the ceramic substrate 11 in Figure 1) is formed as an amorphous layer, i.e., the doping layer 113. On the other hand, the portion where the target dopant has not been injected (corresponding to the lower layer of the ceramic substrate 11 in Figure 1) retains the original structure of the ceramic material substrate 110 as a crystalline layer 114.

[0018] The target dopant may be the same as or different from the elements constituting the ceramic material substrate 110. As the target dopant, one or more of nitrogen, boron, phosphorus, and carbon can be used. For example, when the ceramic material substrate 110 is polycrystalline spinel (MgAl2O4) and the target dopant is nitrogen, the doping layer 113 is formed as a MgAl2O4 layer doped with nitrogen, and the crystal layer 114 is a MgAl2O4 layer. By using such a target dopant, compressive stress can be effectively applied to the surface layer portion of the ceramic material substrate 110 (i.e., a region with a predetermined thickness extending from the first surface 111 to the second surface 112), and the material hardness and elastic modulus of the surface layer portion of the obtained ceramic substrate 11 can be improved. Thereby, the mechanical loss in the propagation of surface acoustic waves can be reduced, leading to an improvement in the Q value of the device. Note that the position of the doping layer 113 is a region with a predetermined thickness extending from the first surface 111 to the second surface 112. That is, the region where lattice distortion occurs in the ceramic material substrate 110 is located in its surface layer portion, and the influence on the deep part of the ceramic material substrate 110 (i.e., the region where the crystal layer 114 exists) is relatively small.

[0019] Referring to FIG. 3, the predetermined thickness is shown as D1, and the value of D1 is the distance from the first surface 111 to the interface between the doping layer 113 and the crystal layer 114.

[0020] The piezoelectric material layer 12 is composed of a different material from the ceramic substrate 11. Specifically, the piezoelectric material layer 12 is composed of lithium tantalate or lithium niobate. The Young's modulus of the piezoelectric material layer 12 is smaller than that of the ceramic substrate 11. When lithium tantalate is used as the piezoelectric material layer 12, its Young's modulus is 200-250 GPa, and when lithium niobate is used, it is 170-210 GPa. The ceramic substrate 11 and the piezoelectric material layer 12 constitute a composite piezoelectric substrate 10 as shown in Figure 2. The piezoelectric material layer 12 is placed on the first surface 111 of the ceramic substrate 11 according to the orientation shown in Figure 2 or Figure 3. In the composite piezoelectric substrate 10, the doping layer 113 is located between the crystalline layer 114 and the piezoelectric material layer 12. The ceramic substrate 11 and the piezoelectric material layer 12 can be directly joined by van der Waals forces. The piezoelectric material layer 12 includes a third surface 121 located opposite the ceramic substrate 11, and the electrode 20 is provided on the third surface 121. The electrode 20 may include an IDT electrode 21. IDT stands for "interdigital transducer". The electronic device 100 is specifically an elastic wave device, and more specifically a SAW device.

[0021] The manufacturing process of the electronic device 100 according to this embodiment will be described with reference to Figure 4. (1) A ceramic material substrate 110 is provided. The ceramic material substrate 110 has opposing first surfaces 111 and second surfaces 112. (2) From the first surface 111 side, the target dopant is injected into the ceramic material substrate 110 using a doping source containing the target dopant. For example, if the target dopant is nitrogen, a method of irradiating the first surface 111 with nitrogen gas as the doping source can be employed. After injecting the target dopant, a two-layer structure of a doping layer 113 and a crystal layer 114 is formed inside the ceramic material substrate 110, thereby obtaining a ceramic substrate 11. (3) A piezoelectric material layer 12 is formed on the first surface 111 of the ceramic substrate 11. At this time, a method of directly joining the ceramic substrate 11 and the piezoelectric material layer 12 may be used. After joining, the piezoelectric material layer 12 is subjected to a thin-film treatment to obtain a composite piezoelectric substrate 10. (4) Electrodes 20 are formed on the piezoelectric material layer 12 to complete the electronic device 100. Note that annealing is not required between steps (2) and (4). Furthermore, by minimizing the formation of voids in the ceramic substrate 11, a decrease in the Q value due to voids is avoided.

[0022] In some embodiments, the Young's modulus of the ceramic substrate 11 is 294 to 392 GPa. Also, in some embodiments, the Young's modulus of the ceramic substrate 11 is greater than the Young's modulus of the ceramic material base 110. Here, the fact that the Young's modulus of the ceramic substrate 11 is greater than that of the ceramic material base 110 means that the region of the formed doping layer 113 has a higher Young's modulus than the ceramic material base 110 before doping (hereinafter also referred to as the "original ceramic material base"), and as a result, the Young's modulus of the entire ceramic substrate 11 is higher than that of the original ceramic material base 110. The Young's modulus of the ceramic material base 110 can be measured based on the properties of the material constituting the ceramic material base 110. For example, if the ceramic material base 110 is polycrystalline spinel, the Young's modulus of the ceramic material base 110 can be determined based on the Young's modulus of the polycrystalline spinel. As a specific example, the Young's modulus of the ceramic material substrate 110 may be 278-280 GPa, and the Young's modulus of the ceramic substrate 11 may increase to 294-392 GPa after forming the doping layer 113. (For example, values ​​such as 294 GPa, 300 GPa, 320 GPa, and 370 GPa may be obtained.) In this embodiment, by forming a doping layer 113 containing a target dopant within the ceramic substrate 11, the ceramic material substrate 110 is modified, and the Young's modulus on the piezoelectric material layer 12 side of the ceramic substrate 11 can be improved. As a result, more elastic wave energy can be confined within the piezoelectric material layer 12, and the Q value can be improved.

[0023] In some embodiments, the Young's modulus of the ceramic substrate 11 is 1.05 to 1.5 times that of the ceramic material substrate 110. Specific examples include 1.05, 1.1, 1.2, and 1.4 times, but the embodiment is not limited to these examples. Within the multiple range according to this embodiment, the difference in Young's modulus between the ceramic substrate 11 and the original ceramic material substrate 110 increases as the multiple increases. By controlling the Young's modulus of the ceramic substrate 11 to 1.5 times or less that of the ceramic material substrate 110, it is possible to suppress spurious emissions and other parameter abnormalities. Furthermore, in some embodiments, the Young's modulus of the ceramic substrate 11 exceeds 300 GPa, and within this range is advantageous for further improving the Q value of the electronic device.

[0024] As shown in Figures 5 and 6, the Q value and insertion loss of Example 1 and Comparative Example 1 of the present invention can be compared. In Figures 5 and 6, the characteristics of Example 1 of the present invention are shown by solid lines, and the characteristics of Comparative Example 1 are shown by dashed lines. Example 1 is a specific example of the electronic device 100 of the present invention, and the predetermined thickness D1 of the doping layer 113 is 121.61 nm. On the other hand, in Comparative Example 1, no doping layer is formed on the ceramic substrate, and the other configurations and conditions are the same as those of Example 1. In Figure 5, the horizontal axis is Frequency (MHz), and the vertical axis is Q value. As is clear from Figure 5, in the range of 900 MHz to 930 MHz, the Q value of Example 1 is clearly higher than the Q value of Comparative Example 1. The maximum Q value in Example 1 is 3255.5, and the maximum Q value in Comparative Example 1 is 2729.0. Therefore, it can be seen that the Q value of Example 1 is improved by approximately 19% compared to Comparative Example 1. Furthermore, in Figure 6, the horizontal axis represents Frequency (MHz), and the vertical axis represents attenuation (dB). As is clear from Figure 6, the minimum insertion loss in Example 1 (expressed by attenuation, where a larger attenuation value indicates a smaller insertion loss) is -0.499 dB, while the minimum insertion loss in Comparative Example 1 is -0.542 dB. From these results, it can be seen that Example 1 shows an improvement of approximately 0.093 dB in minimum insertion loss compared to Comparative Example 1. Therefore, according to one embodiment of the present invention, the electronic device 100 can obtain superior electrical characteristics.

[0025] In some embodiments, the predetermined thickness D1 is 0.025λ to 2λ, where λ represents the wavelength of the elastic wave determined by the electrode period of the IDT electrode 21. Specific examples include D1 being 0.05λ, 0.1λ, 0.15λ, 0.3λ, 0.5λ, 0.8λ, 1.2λ, 1.5λ, 2.0λ, etc. Alternatively, the predetermined thickness D1 may be 0.025λ to λ, and more specifically, 0.025λ to 0.5λ. Within the range of predetermined thickness shown in this embodiment, the velocity leakage of the main mode can be effectively suppressed, and the scattering of spurious waves of higher-order modes and the generation of spurious signals can be prevented.

[0026] Table 1 shows the parameters of the electronic device 100 according to several embodiments (Examples 2-5) of this application (Young's modulus indicates the Young's modulus of the ceramic substrate 11 constituting the electronic device 100, and insertion loss is indicated by admittance, with the minimum insertion loss listed in the table).

[0027] [Table 1]

[0028] As is clear from the data in Table 1, in the electronic device 100 provided in this embodiment, the Young's modulus of the ceramic substrate 11 reaches 300 GPa or more by forming the doping layer 113. Furthermore, as the predetermined thickness of the formed doping layer 113 increases, the Young's modulus of the resulting ceramic substrate 11 tends to increase as well. The electronic devices 100 provided in Examples 2 to 5 all have a high Q value and low insertion loss.

[0029] In some embodiments, the concentration range of the target doping element in the doping layer 113 is specifically 5 × 10 17 or 1 x 10 20 ions / cm 3 This allows for a good improvement in the Q value while simultaneously avoiding excessive warping of the ceramic substrate 11 due to excessively high doping concentrations. This ensures good bonding performance when the ceramic substrate 11 is bonded to the piezoelectric material layer 12 in a subsequent process. Furthermore, it prevents excessive damage to the surface or interior of the ceramic material substrate 110 during the formation process of the doping layer 113, thereby preserving the material properties of the ceramic substrate 11. In one embodiment, the warping of the ceramic substrate 11 having the doping layer 113 is 10 to 14 μm, which is slightly more warping than a conventional ceramic substrate, but it is possible to significantly improve the Q value while maintaining good performance in the subsequent bonding process.

[0030] Referring to Figure 7, another embodiment of the present invention, the electronic device 100 (composite piezoelectric substrate 10), further comprises an intermediate layer 13, which is located between the piezoelectric material layer 12 and the ceramic substrate 11. The speed of sound in the intermediate layer 13 is lower than the speed of sound in the piezoelectric material layer 12. That is, the speed of sound of bulk waves in the intermediate layer 13 is lower than that of bulk waves propagating within the piezoelectric material layer 12. In this embodiment, by providing an intermediate layer 13 with a low speed of sound, the speed of sound of elastic waves can be reduced, and the energy of the elastic waves can be concentrated in a medium with a low speed of sound (i.e., the intermediate layer 13), thereby reducing losses and improving the Q factor.

[0031] The material of the intermediate layer 13 is one of silicon oxide, silicon nitride, tantalum oxide, or a material mainly composed of these. In some embodiments, silicon oxide is used for the intermediate layer 13, and lithium tantalate is used for the piezoelectric material layer 12. Since lithium tantalate has a negative temperature characteristic elastic constant, while silicon dioxide has a positive temperature characteristic, combining them makes it possible to reduce the absolute value of the Temperature Coefficient of Frequency (TCF) of the elastic wave device. Furthermore, since the intrinsic acoustic impedance of silicon oxide is lower than that of lithium tantalate, the electromechanical coupling coefficient of the electronic device can be improved.

[0032] In some embodiments, the thickness of the intermediate layer 13 is 0.5λ or more, where λ represents the wavelength of the elastic wave determined by the electrode period of the IDT electrode 21. Specifically, the thickness of the intermediate layer 13 may be 0.6 to 0.8λ. In some embodiments, the thickness of the piezoelectric material layer 12 is 2λ or less, and more specifically, it may be less than 1λ. In one specific embodiment, λ is 2.25 μm, the thickness of the piezoelectric material layer 12 is 0.1λ to 1λ, and the thickness of the intermediate layer 13 is 0.6λ.

[0033] The electronic device 100 according to this embodiment may be packaged in a CSP (Chip Scale Package) or a WLP (Wafer Level Package).

[0034] Referring to Figure 8, for example, this is a diagram of the configuration of an electronic device 100 employing CSP encapsulation. The electronic device 100 comprises an element (including a composite piezoelectric substrate 10 and electrodes 20), a package substrate 30, a first encapsulation structure 41, and a first external terminal electrode 53. The package substrate 30 is positioned opposite the surface on which the electrodes 20 of the element are formed (i.e., the third surface 121 of the piezoelectric material layer 12), and a gap 60 is formed between the package substrate 30 and the third surface 121. The first encapsulation structure 41 is provided on the side of the package substrate 30 facing the element, and covers the side surface of the element and the surface facing the package substrate 30, sealing the gap 60 and sealing the entire element. The electrodes 20 include an electrode pad 22 electrically connected to an IDT electrode 21, and the electrode pad 22 is electrically connected to a first conductive portion 52 of a wiring pattern on the package substrate 30 via a bump 51. The first conductive portion 52 is electrically connected to the first external terminal electrode 53, which is provided on the opposite side of the package substrate 30 from the element, thereby enabling electrical connection between the electronic device 100 and external equipment.

[0035] The materials for the package substrate 30 and the first sealing structure 41 can refer to substrate materials and sealing materials commonly used in conventional CSP sealing. The electrode pads 22, bumps 51, first conductive portion 52, and first external terminal electrodes 53 are all made of materials with good conductivity, and this embodiment is not limited to these examples.

[0036] Referring to Figure 9, this is a schematic diagram of the structure of an electronic device 100 employing CSP encapsulation. The electronic device 100 comprises an element (including a composite piezoelectric substrate 10 and electrodes 20), a cover 70, a second encapsulation structure 42, and a second external terminal electrode 55. The cover 70 is positioned opposite the surface of the element on which the electrodes 20 are provided (i.e., the third surface 121 of the piezoelectric material layer 12), and a gap 60 is formed between the cover 70 and the third surface 121. The electrodes 20 include an electrode pad 22 electrically connected to an IDT electrode 21. The region on the third surface 121 on which the IDT electrode 21 is provided is called the effective region, and the second encapsulation structure 42 is provided between the cover 70 and the element and is positioned to surround the effective region. The second encapsulation structure 42 achieves encapsulation of the element by surrounding the electrode pad 22. The second external terminal electrode 55, located on the surface of the cover 70 opposite to the element, is connected to the electrode pad 22 via a second conductive portion 54 that penetrates the cover 70 and the second sealing structure 42. This allows the electronic device 100 to be electrically connected to external equipment through the second external terminal electrode 55.

[0037] The materials for the lid 70 and the second sealing structure 42 can refer to the lid materials and sealing materials used in existing WL sealing. The electrode pads 22, the second conductive portion 54, and the second external terminal electrode 55 are all made of materials with excellent conductivity, and this embodiment is not limited to these examples.

[0038] Referring to Figure 10, the present invention further provides a module 1000. The module 1000 comprises a wiring board 700, a plurality of external connection terminals 701, integrated circuit components 600, an electronic device 100 (including a composite piezoelectric substrate 10), an inductor 400, and a sealing section 500. The plurality of external connection terminals 701 are formed on one side of the wiring board 700 and are mounted on a pre-configured mobile communication terminal motherboard. The integrated circuit components 600 (which may be called ICs) are mounted inside the wiring board 700. The integrated circuit components 600 include a switch circuit and a noise amplifier. The electronic device 100 is mounted on the main surface of the wiring board 700. The inductor 400 is used for impedance matching, and for example, the inductor 400 is an integrated passive device (IPD). The sealing section 500 is provided to seal the plurality of electronic components, including the electronic device 100, on the wiring board 700.

[0039] The module 1000 according to this embodiment includes an electronic device 100, that is, a ceramic substrate 11, and since it has the same effects as the ceramic substrate 11, a detailed explanation is omitted here.

[0040] While preferred embodiments of the present invention have been described above, these do not limit the invention. Based on the technical content disclosed in the above-described preferred embodiments, those skilled in the art can make various changes, modifications, or equivalent variations without departing from the technical spirit of the invention. Therefore, all simple changes, equivalent variations, and modifications that fall within the technical scope of the invention are included within the technical scope of the invention, insofar as they are based on the technical spirit of the invention. [Explanation of Symbols]

[0041] 1000: Module 100: Electronic devices 10: Composite piezoelectric substrate 11: Ceramic substrate 110: Ceramic material substrate 111: 1st page 112:Second side 113: Doping Layer 114: Crystalline layer 12: Piezoelectric material layer 121:Side 3 13: Middle Class 20: Electrode 21:IDT electrode 22: Electrode pads 30: Package substrate 41:First sealing structure 42:Second sealing structure 51: Bump 52: First conductive part 53: 1st external terminal electrode 54: Second conductive part 55: 2nd external terminal electrode 60: Gap 70: Lid 400: Inductor 500: Sealing part 600: Integrated Circuit Components 700: Wiring board 701: External connection terminal

Claims

1. A ceramic material substrate having opposing first and second surfaces, A doping layer of a predetermined thickness is formed within the ceramic material substrate, extending in a direction approaching from the first surface toward the second surface, and the doping layer contains a target dopant added to the ceramic material substrate, and the concentration of the target dopant in the doping layer is 1 × 10⁻¹⁶ 17 or 5 x 10 20 ions / cm 3 A ceramic substrate characterized by the following:

2. The ceramic substrate according to claim 1, characterized in that the Young's modulus of the ceramic substrate is 1.05 to 1.5 times that of the ceramic material substrate.

3. The ceramic substrate according to claim 1, characterized in that the target dopant is one or more elements selected from the group consisting of nitrogen, boron, phosphorus, and carbon.

4. The ceramic substrate according to claim 1, characterized in that the ceramic material substrate is one selected from the group consisting of polycrystalline spinel, polycrystalline sapphire, polycrystalline aluminum nitride, polycrystalline magnesium oxide, polycrystalline quartz, and polycrystalline silicon carbide.

5. The ceramic substrate according to claim 1, characterized in that the Young's modulus of the ceramic substrate is 294 to 392 GPa.

6. A composite piezoelectric substrate comprising a ceramic substrate according to any one of claims 1 to 5, and a piezoelectric material layer provided on the side of the first surface opposite to the second surface.

7. An electronic device comprising a composite piezoelectric substrate according to claim 6 and an electrode located on the opposite side of the piezoelectric material layer from the ceramic substrate.

8. The electronic device according to claim 7, characterized in that the electrode is an IDT electrode, the predetermined thickness is 0.025λ to 2λ, and λ is the wavelength of an elastic wave determined based on the electrode period of the IDT electrode.

9. The electronic device according to claim 7, further comprising an intermediate layer provided between the first surface and the piezoelectric material layer, the intermediate layer having a sound velocity slower than the sound velocity of the piezoelectric material layer.

10. The electronic device according to claim 9, characterized in that the electrode is an IDT electrode, the thickness of the intermediate layer is 0.5λ or more, and λ is the wavelength of an elastic wave determined based on the electrode period of the IDT electrode.

11. The electronic device according to claim 7, characterized in that the electrode is an IDT electrode, the thickness of the piezoelectric material layer is 2λ or less, and λ is the wavelength of an elastic wave determined based on the electrode period of the IDT electrode.

12. A module comprising a wiring board, a plurality of external connection terminals, an inductor, a sealing portion, and an electronic device according to any one of claims 1 to 11.