Solar power inverter and its control method

Abstract

This invention relates to a photovoltaic inverter and a control method thereof that reduce losses, structural complexity, and costs in a photovoltaic inverter that switches between off-grid and on-grid operation. [Solution] The solar power inverter includes a first bridge arm and a second bridge arm positioned between the positive and negative DC buses, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm. When the grid voltage is below a threshold, the controller operates the first and second bridge arms and deactivates the third bridge arm to output power from the three output terminals and supply power to the first load. When the grid voltage is above a threshold, the controller operates the first, second, and third bridge arms to output power from the two output terminals and supply power to the grid or a second load.

Description

Technical Field

[0001] This application relates to the field of energy technologies, and particularly to a solar power inverter and its control method.

Background Art

[0002] A solar power inverter can include a highly efficient and reliable inverter concept (Heric) inverter. The Heric inverter includes the circuit topology of an H4 bridge inverter. The Heric inverter is configured to convert direct current into single-phase alternating current. In both the off-grid operation scenario and the on-grid operation scenario of the solar power inverter, the Heric inverter can be driven in the driving mode of the Heric inverter, or the Heric inverter can be driven in the driving mode of the H4 bridge inverter.

[0003] However, in a scenario where the solar power inverter operates in off-grid mode and needs to output alternating current through a single-phase three-wire system, when the Heric inverter is driven in the driving mode of the Heric inverter, a split-phase transformer needs to be arranged in the solar power inverter, which makes the structure of the solar power inverter complex and the cost high. Also, in a scenario where the solar power inverter operates in on-grid mode and needs to output alternating current through a single-phase two-wire system, when the H4 bridge inverter in the Heric inverter is driven in the driving mode of the H4 bridge inverter, each switching transistor needs to withstand a high voltage, resulting in high losses in the solar power inverter.

[0004] Therefore, in a scenario where the solar power inverter switches between off-grid operation and on-grid operation, how to reduce the losses of the solar power inverter, as well as the structural complexity and cost of the solar power inverter, has become an urgent problem to be solved.

Summary of the Invention

[0005] Embodiments of the present invention provide a photovoltaic inverter and a control method thereof that reduce losses in the photovoltaic inverter, as well as the structural complexity and cost of the photovoltaic inverter, in a scenario in which the photovoltaic inverter is switched between off-grid and on-grid operation.

[0006] To achieve the above objectives, the following technical solutions are used in the embodiments of this application. [Means for solving the problem]

[0007] According to a first aspect of the embodiments of the present invention, a photovoltaic inverter is provided. The input terminal of the photovoltaic inverter is configured to be connected to a photovoltaic array. The photovoltaic inverter includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between the positive DC bus and the negative DC bus, a controller, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series. The first bridge arm includes a first switching transistor and a second switching transistor connected in series. The second bridge arm includes a third switching transistor and a fourth switching transistor connected in series. The third bridge arm includes a fifth switching transistor and a sixth switching transistor. The drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is positioned between the first end of the third bridge arm and the first output terminal of the photovoltaic inverter. The connection points of the positive and negative bus capacitors are connected to the second output terminal of the photovoltaic inverter. The second end of the third bridge arm is connected to the third output terminal of the photovoltaic inverter. The three output terminals of the photovoltaic inverter are configured to be connected to the grid or a load. The controller is configured to operate the first and second bridge arms and deactivate the third bridge arm when the grid voltage is below the grid voltage threshold, thereby discharging electrical energy from the three output terminals of the photovoltaic inverter and supplying power to a first load. The controller is further configured to operate the first, second, and third bridge arms when the grid voltage is above the grid voltage threshold, thereby discharging electrical energy from the two output terminals of the photovoltaic inverter and supplying power to the grid or a second load.

[0008] Based on this solution, when the grid voltage is below the grid voltage threshold, the controller controls the photovoltaic inverter to operate in off-grid mode, operating the first and second bridge arms to convert the DC output from the photovoltaic array into single-phase AC, and controlling the operation of the third bridge arm to stop it, so that electrical energy is output from the three output terminals of the photovoltaic inverter and power is supplied to the first load. In this case, when the photovoltaic inverter operates in off-grid mode and needs to output AC in a single-phase three-wire system, it can supply power to the first load by outputting AC in a single-phase three-wire system, eliminating the need to install a split-phase transformer in the photovoltaic inverter. This reduces the complexity and cost of the photovoltaic inverter structure compared to the following solutions. The solar power inverter is driven by the Heric inverter drive system and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array into single-phase AC. A split-phase transformer must be placed in the solar power inverter, so that electrical energy is output from the three output terminals of the solar power inverter, supplying power to the first load. When the grid voltage is higher than the grid voltage threshold, the controller controls the solar power inverter to operate in on-grid mode and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array into single-phase AC. So that electrical energy is output from the two output terminals of the solar power inverter, supplying power to the grid or the second load. By adding control of the third bridge arm, the withstand voltage and losses of each switching transistor are reduced. This reduces the losses of the solar power inverter and improves the efficiency of the solar power inverter in on-grid mode compared to the following solutions.The solar power inverter is driven by an H4 bridge inverter drive system. The controller controls the first and second bridge arms to convert the DC output from the solar power array into single-phase AC, thereby outputting electrical energy from the two output terminals of the solar power inverter and supplying power to the grid or a second load.

[0009] In a first embodiment, in a possible embodiment, the photovoltaic inverter further includes a third capacitor and a fourth capacitor. The third capacitor is located between the first output terminal and the second output terminal. The fourth capacitor is located between the second output terminal and the third output terminal.

[0010] Based on this solution, the third and fourth capacitors are placed for filtering to reduce voltage fluctuations. This improves the stability of the output voltage of the solar power inverter.

[0011] In a first aspect, in a possible embodiment, the photovoltaic inverter further includes a second inductor positioned between the second end and the third output end of a third bridge arm. The second inductor is magnetically coupled to the first inductor.

[0012] Based on this solution, the second inductor is positioned between the second end and the third output end of the third bridge arm, and the second inductor is magnetically coupled to the first inductor. The first and second inductors can share a single central magnetic column. This reduces the volume and current ripple of the first and second inductors, improves dynamic response performance, reduces the volume of the solar power inverter, and improves the performance of the solar power inverter.

[0013] In a first embodiment, in a possible configuration, the photovoltaic inverter further includes a third inductor and a fourth bridge arm positioned between a positive DC bus and a negative DC bus. The fourth bridge arm includes a seventh switching transistor and an eighth switching transistor connected in series. The midpoint of the fourth bridge arm is connected to one end of the third inductor. The other end of the third inductor is connected to the connection point of the positive and negative bus capacitors.

[0014] Based on this solution, the solar power inverter further includes a third inductor and a fourth bridge arm positioned between the positive DC bus and the negative DC bus. The third inductor and the fourth bridge arm are configured to balance the voltage of the positive DC bus and the voltage of the negative DC bus. This improves the reliability of the solar power inverter.

[0015] In a first embodiment, in a possible embodiment, the controller is further configured to acquire the DC components of the current in the third inductor, the positive bus voltage, the negative bus voltage, and the phase voltage when the grid voltage is less than or equal to a grid voltage threshold, and to output a pulse-width modulated signal. The DC components of the current in the third inductor, the positive bus voltage, the negative bus voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control a fourth bridge arm. The positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection points of the positive and negative bus capacitors. The negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection points of the positive and negative bus capacitors. The phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal.

[0016] Based on this solution, the controller generates a pulse-width modulated signal based on the DC component of the phase voltage via a DCV control loop, and this pulse-width modulated signal is used to control the fourth bridge arm. This suppresses the DC component in the AC output from the solar power inverter, improving the stability and reliability of the solar power inverter. The controller generates a pulse-width modulated signal based on the current of the third inductor, the positive bus voltage, the negative bus voltage, and the DC component of the phase voltage via an intermediate voltage loop and a balance bridge current loop, and this pulse-width modulated signal is used to control the fourth bridge arm. This prevents deviations and fluctuations in the intermediate voltage between the positive and negative DC buses, balances the voltages of the positive and negative DC buses, and improves the reliability of the solar power inverter.

[0017] In a first embodiment, in a possible embodiment, the controller is further configured to acquire a phase voltage when the grid voltage is less than or equal to a grid voltage threshold. The current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulated signal.

[0018] Based on this solution, the controller is further configured to acquire the phase voltage when the grid voltage is below the grid voltage threshold and the solar inverter is operating in off-grid mode. The current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the fourth bridge arm. The controller generates the pulse-width modulated signal based on the phase voltage via feedforward of the RMS control loop. This improves the dynamic response capability of the solar inverter.

[0019] In a first aspect, in a possible embodiment, the photovoltaic inverter further includes a fifth capacitor located between the first end and the first output terminal of the second bridge arm, a sixth capacitor located between the first output terminal and the third output terminal, and a seventh capacitor located between the second end and the third output terminal of the second bridge arm.

[0020] Based on this solution, the fifth and seventh capacitors are positioned to suppress common-mode voltage. This improves the efficiency of the solar power inverter. Furthermore, the sixth capacitor is positioned for filtering to reduce voltage fluctuations. This improves the stability of the output voltage of the solar power inverter.

[0021] A second aspect of the embodiments of the present invention provides a method for controlling a photovoltaic inverter applicable to a photovoltaic inverter. The method includes the steps of: controlling the inverter to operate a first and second bridge arm and deactivate a third bridge arm when the grid voltage is below a grid voltage threshold, thereby outputting electrical energy from the three output terminals of the photovoltaic inverter to power a first load; or controlling the inverter to operate a first, second, and third bridge arm when the grid voltage is above a grid voltage threshold, thereby outputting electrical energy from the two output terminals of the photovoltaic inverter to power a grid or a second load. The input terminals of the photovoltaic inverter are configured to be connected to a photovoltaic array. The photovoltaic inverter includes positive and negative bus capacitors, a first and second bridge arm positioned between a positive DC bus and a negative DC bus, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series. The first bridge arm includes a first switching transistor and a second switching transistor connected in series. The second bridge arm includes a third switching transistor and a fourth switching transistor connected in series. The third bridge arm includes a fifth switching transistor and a sixth switching transistor. The drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is located between the first end of the third bridge arm and the first output terminal of the photovoltaic inverter. The connection points of the positive and negative bus capacitors are connected to the second output terminal of the photovoltaic inverter. The second end of the third bridge arm is connected to the third output terminal of the photovoltaic inverter. The three output terminals of the photovoltaic inverter are configured to be connected to a grid or a load.

[0022] In a second aspect, in a possible embodiment, the method further includes the step of obtaining the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of a third inductor, and outputting a pulse-width modulated signal, when the grid voltage is less than or equal to a grid voltage threshold. The DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control a fourth bridge arm. The positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection point of the positive and negative bus capacitors. The negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection point of the positive and negative bus capacitors. The phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal. The photovoltaic inverter further includes a third inductor and a fourth bridge arm positioned between the positive DC bus and the negative DC bus. The fourth bridge arm includes a seventh switching transistor and an eighth switching transistor connected in series. The midpoint of the fourth bridge arm is connected to one end of the third inductor. The other end of the third inductor is connected to the connection point of the positive and negative bus capacitors.

[0023] In a second embodiment, in a possible embodiment, the method further includes the step of obtaining a phase voltage when the grid voltage is less than or equal to a grid voltage threshold. The current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulated signal.

[0024] A photovoltaic power generation system is provided according to a third embodiment of the present invention. This photovoltaic power generation system includes a photovoltaic inverter. The input terminal of the photovoltaic inverter is configured to be connected to a photovoltaic array. The photovoltaic inverter includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between the positive DC bus and the negative DC bus, a controller, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series. The first bridge arm includes a first switching transistor and a second switching transistor connected in series. The second bridge arm includes a third switching transistor and a fourth switching transistor connected in series. The third bridge arm includes a fifth switching transistor and a sixth switching transistor. The drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is positioned between the first end of the third bridge arm and the first output terminal of the photovoltaic inverter. The connection points of the positive and negative bus capacitors are connected to the second output terminal of the photovoltaic inverter. The second end of the third bridge arm is connected to the third output terminal of the photovoltaic inverter. The three output terminals of the photovoltaic inverter are configured to be connected to the grid or a load. The controller operates the first and second bridge arms and stops the operation of the third bridge arm when the grid voltage is below the grid voltage threshold, thereby supplying power to the first load by outputting electrical energy from the three output terminals of the photovoltaic inverter.When the voltage of the grid is higher than the grid voltage threshold, the controller controls the first bridge arm, the second bridge arm, and the third bridge arm to operate, so as to output electrical energy from two output terminals of the solar power generation inverter and further supply power to the grid or the second load.

[0025] Regarding the third aspect, in a possible embodiment, the solar power generation inverter further includes a third capacitor and a fourth capacitor. The third capacitor is disposed between the first output terminal and the second output terminal. The fourth capacitor is disposed between the second output terminal and the third output terminal.

[0026] Regarding the third aspect, in a possible embodiment, the solar power generation inverter further includes a second inductor disposed between the second end of the third bridge arm and the third output terminal. The second inductor is magnetically coupled to the first inductor.

[0027] Regarding the third aspect, in a possible embodiment, the solar power generation inverter further includes a third inductor disposed between the positive DC bus and the negative DC bus and a fourth bridge arm. The fourth bridge arm includes a seventh switching transistor and an eighth switching transistor connected in series. The midpoint of the fourth bridge arm is connected to one end of the third inductor. The other end of the third inductor is connected to the connection point with the positive and negative bus capacitors.

[0028] Regarding the third aspect, in a possible embodiment, the controller is further configured to obtain the current of the third inductor, the positive bus voltage, the negative bus voltage, and the DC component of the phase voltage when the grid voltage is below the grid voltage threshold, and output a pulse width modulation signal. The current of the third inductor, the positive bus voltage, the negative bus voltage, and the DC component of the phase voltage are used to determine the duty cycle of the pulse width modulation signal. The pulse width modulation signal is used to control the fourth bridge arm. The positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection point of the positive and negative bus capacitors. The negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection point of the positive and negative bus capacitors. The phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal.

[0029] Regarding the third aspect, in a possible embodiment, the controller is further configured to obtain the phase voltage when the grid voltage is below the grid voltage threshold. The current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulation signal.

[0030] Regarding the third aspect, in a possible embodiment, the solar power inverter further includes a fifth capacitor disposed between the first end of the second bridge arm and the first output terminal, a sixth capacitor disposed between the first output terminal and the third output terminal, and a seventh capacitor disposed between the second end of the second bridge arm and the third output terminal.

[0031] For the descriptions of the second and third aspects in this application, please refer to the detailed description of the first aspect. Also, for the advantageous effects of the second and third aspects, please refer to the analysis of the advantageous effects of the first aspect. Details will not be described again here.

Brief Description of the Drawings

[0032] [Figure 1]This is a schematic diagram of the circuit topology of an application scenario for a solar power inverter according to one embodiment of the present invention. [Figure 2] This is a schematic diagram of the circuit topology of a solar power inverter according to one embodiment of the present invention. [Figure 3] This is a waveform diagram of a pulse width modulated signal according to one embodiment of the present invention. [Figure 4] This is a schematic diagram of another circuit topology of a solar power inverter according to one embodiment of the present invention. [Figure 5] This is a schematic flowchart for generating a pulse width modulated signal according to one embodiment of the present invention. [Figure 6] This is another schematic flowchart for generating a pulse width modulated signal according to one embodiment of the present invention. [Figure 7] This is a schematic flowchart of a control method for a solar power inverter according to one embodiment of the present invention. [Modes for carrying out the invention]

[0033] The preparation and use of embodiments will be discussed in detail below. However, it should be understood that many of the applicable inventive concepts provided herein can be realized in multiple specific environments. The specific embodiments discussed are used solely to illustrate specific methods for realizing and using this specification and the present art, and are not intended to limit the scope of this application.

[0034] Unless otherwise specified, all technical terms used herein have the same meanings as those commonly known to those skilled in the art.

[0035] A circuit or other component may be described or referred to as “configured” to perform one or more tasks. In this case, the term “configured” is used to imply a structure, indicating that the circuit / component includes a structure (e.g., a circuit system) that performs one or more tasks while in operation. Thus, even if a particular circuit / component is not currently operational (e.g., not open), it may still be referred to as being configured to perform tasks. Circuits / components used in conjunction with the expression “configured to” include hardware, such as circuits for performing calculations.

[0036] The following describes the technical solutions in embodiments of the present application with reference to the accompanying drawings of embodiments of the present application. In this application, “at least one” means one or more, and “multiple” means two or more. The term “and / or” indicates a relationship between related objects, and indicates that there may be three possible relationships. For example, A and / or B can mean that only A exists, both A and B exist, and only B exists, where A and B can be singular or plural. The letter “ / ” generally indicates an “or” relationship between related objects. “At least one of the following items (pieces)” or similar expressions indicate any combination of these items, including any single item (piece) or any combination of multiple items (pieces). For example, at least one item (piece) of a, b, or c can mean any of a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c can be singular or plural. Furthermore, in the embodiments of this application, terms such as "first" and "second" do not limit the number or order of execution.

[0037] In this application, terms such as “Example” or “For example” are used to provide examples, illustrations, or explanations. Any embodiment or design scheme described as “Example” or “For example” in this application should not be described as being preferable or having more advantages than other embodiments or design schemes. More precisely, the use of terms such as “Example” or “For example” is intended to specifically present the relevant concepts.

[0038] Before describing the embodiments of this application, we will first explain the technical terms and background art used in this application.

[0039] H4 Bridge: This is an inverter circuit configured to convert direct current (DC) to alternating current (AC). An H4 bridge includes two bridge arms positioned between a positive DC bus and a negative DC bus. Each bridge arm contains two switching transistors connected in series.

[0040] Heric Inverter: The Heric inverter is a highly efficient and reliable inverter configured to convert DC to single-phase AC. The Heric inverter has a bidirectional power switch structure added to the base of an H4 bridge. The bidirectional power switch structure includes two switching transistors. Either the drains or collectors of the two switching transistors are connected, or the sources or emitters of the two switching transistors are connected. When the bridge arm of the H4 bridge outputs zero level, the bidirectional power switch structure can provide a bidirectional freewheel path to the AC side circuit. Also, when the bridge arm of the H4 bridge is turned off, electrical discoupling between the DC side and the AC side can be achieved. This can suppress fluctuations in the common-mode voltage of the Heric inverter. Furthermore, by adding the bidirectional power switch structure, the Heric inverter has lower conduction losses than an H4 bridge, resulting in a higher conversion efficiency.

[0041] Single-phase three-wire system: A single-phase three-wire system is a method of transmitting electrical energy through two phase wires and one neutral wire. The two phase wires can be configured to supply power to a load. For example, the two phase wires can be configured to supply a voltage of 202V to the load. Any phase wire and neutral wire can also be configured to supply power to a load. For example, any phase wire and neutral wire can be configured to supply a voltage of 101V to the load.

[0042] An autotransformer is a type of transformer in which the primary winding is not completely isolated from the secondary winding, and some windings are shared. Because fewer windings are used, losses can be reduced, and autotransformers have high efficiency.

[0043] A solar power inverter may include a Heric inverter. A Heric inverter includes the circuit topology of an H4 bridge inverter. A Heric inverter is configured to convert DC to single-phase AC. In both off-grid and on-grid operation scenarios of the solar power inverter, a Heric inverter may be driven by a Heric inverter drive scheme, or a Heric inverter may be driven by an H4 bridge inverter drive scheme.

[0044] However, in scenarios where the solar power inverter operates in off-grid mode and needs to output AC over a single-phase three-wire system, driving the Heric inverter using the Heric inverter's drive method requires the placement of a split-phase transformer in the solar power inverter, complicating its structure and increasing costs. In scenarios where the solar power inverter operates in on-grid mode and needs to output AC over a single-phase two-wire system, driving the H4 bridge inverter within the Heric inverter using the H4 bridge inverter's drive method results in high losses in the solar power inverter because each switching transistor needs to withstand high voltages.

[0045] Therefore, in scenarios where a solar power inverter switches between off-grid and on-grid operation, the urgent challenge is how to reduce the losses of the solar power inverter, as well as the structural complexity and cost of the solar power inverter.

[0046] Based on this, embodiments of the present invention provide a photovoltaic inverter. This photovoltaic inverter includes a Heric inverter. The Heric inverter includes the circuit topology of an H4 bridge inverter. In a scenario where the photovoltaic inverter operates in off-grid mode and needs to output AC over a single-phase three-wire system, the Heric inverter is driven in the manner of an H4 bridge inverter, thereby outputting electrical energy from the three output terminals of the photovoltaic inverter to power a first load. There is no need to place a split-phase transformer in the photovoltaic inverter. This reduces the structural complexity and cost of the photovoltaic inverter. In a scenario where the photovoltaic inverter operates in on-grid mode and needs to output AC over a single-phase two-wire system, the Heric inverter is driven in the manner of a Heric inverter, thereby outputting electrical energy from the two output terminals of the photovoltaic inverter to power a grid or a second load. This reduces the voltage that each switching transistor can withstand and the losses of each switching transistor, reduces the losses of the photovoltaic inverter, and improves the efficiency of the photovoltaic inverter in on-grid mode.

[0047] Figure 1 is a schematic diagram of the circuit topology of an application scenario of a photovoltaic inverter 100 according to one embodiment of the present invention. The input terminal of the photovoltaic inverter 100 is configured to connect to a photovoltaic array 200. The first output terminal of the photovoltaic inverter 100 is configured to connect to a first load 300. The first output terminal may be referred to as the off-grid output terminal of the photovoltaic inverter 100. The first load 300 may include a charging station or socket. The second output terminal of the photovoltaic inverter 100 is configured to connect to a grid 400 or a second load 500. The second load 500 may include an air conditioner or oven. The second output terminal may be referred to as the on-grid output terminal of the photovoltaic inverter 100.

[0048] In possible embodiments, the photovoltaic inverter 100 provided in the embodiments of this application can be used in residential scenarios or small-scale industrial and commercial scenarios. This is not limited to the embodiments of this application. The circuit topology and control method of the photovoltaic inverter 100 provided in the embodiments of this application can also be applied to uninterruptible power supplies (UPS), field power supplies, or emergency power supplies. This is not limited to the embodiments of this application.

[0049] The solar power array 200 is configured to convert solar energy into direct current (DC). The solar power inverter 100 is configured to convert DC into alternating current (AC). Specifically, when the solar power inverter 100 is operating in off-grid mode, it is configured to convert DC into AC and output AC via a single-phase three-wire system to supply power to the first load 300. When the solar power inverter 100 is operating in on-grid mode, it is configured to convert DC into AC and supply power to the grid 400 or the second load 500.

[0050] Referring to Figure 1, in possible embodiments, the photovoltaic inverter 100 provided in the embodiment of the present application may be used in a photovoltaic system 600.

[0051] Figure 2 is a schematic diagram of the circuit topology of a photovoltaic inverter 100 according to one embodiment of the present invention. The input terminal of the photovoltaic inverter 100 is configured to be connected to a photovoltaic array 200. The photovoltaic inverter 100 includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between a positive DC bus BUS+ and a negative DC bus BUS-, a controller 110, a first inductor L1, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm.

[0052] In possible embodiments, the controller 110 includes a digital signal processing (DSP) chip or a microcontroller unit (MCU). A microcontroller unit may also be called a single-chip microcomputer. This is not limited to the embodiments of the present application.

[0053] Referring to Figure 2, the positive and negative bus capacitors include a first capacitor C1 and a second capacitor C2 connected in series. The first bridge arm includes a first switching transistor Q1 and a second switching transistor Q2 connected in series. The second bridge arm includes a third switching transistor Q3 and a fourth switching transistor Q4 connected in series. The third bridge arm includes a fifth switching transistor Q5 and a sixth switching transistor Q6. The drain or collector of the fifth switching transistor Q5 is connected to the drain or collector of the sixth switching transistor Q6, or the source or emitter of the fifth switching transistor Q5 is connected to the source or emitter of the sixth switching transistor Q6. The solar power inverter 100 may be called a Heric inverter. When the third bridge arm is not operating, the solar power inverter 100 may be called an H4 bridge inverter.

[0054] In possible embodiments, the first to sixth switching transistors Q1 to Q6, and the switching transistors in the following embodiments, may include transistors, or transistors and diodes. This is not limited to the embodiments of the present application. Specifically, each switching transistor may include a metal-oxide-semiconductor field-effect transistor (MOSFET). Metal-oxide-semiconductor field-effect transistors may also be abbreviated as MOS transistors. Each MOS transistor includes a reverse-biased body diode. Alternatively, referring to Figure 2, each switching transistor may include an insulated-gate bipolar transistor (IGBT) and a diode D. The collector of the IGBT is connected to the cathode of the diode D. The emitter of the IGBT is connected to the anode of the diode D. The fifth switching transistor Q5 in Figure 2 is an example. The following embodiments of the present application will be described using examples in which each switching transistor includes an IGBT and a diode D.

[0055] Refer to Figure 2 again. The first inductor L1 is positioned between the first end of the third bridge arm and the first output terminal of the solar power inverter 100. The connection points of the positive and negative bus capacitors are connected to the second output terminal of the solar power inverter 100. The second end of the third bridge arm is connected to the third output terminal of the solar power inverter 100. The first output terminal may be called output terminal U. The second output terminal may be called output terminal O. The third output terminal may be called output terminal W. The three output terminals (U, O, and W) of the solar power inverter 100 are configured to be connected to the grid 400 or a load.

[0056] As shown in Figure 2, in possible embodiments, the three output terminals of the solar power inverter 100 may be connected to a first load 300 via a first switching circuit 700. The first load 300 may include a charging station or an outlet. The three output terminals of the solar power inverter 100 may be further connected to a grid 400 and a second load 500 via a second switching circuit 800. The second load 500 may include an air conditioner or an oven. The first switching circuit 700 and the second switching circuit 800 may be located inside the solar power inverter 100 or outside the solar power inverter 100. This is not limited to the embodiments of the present application. Embodiments of the present application will be described using an example in which the first switching circuit 700 and the second switching circuit 800 are located inside the solar power inverter 100. The first switching circuit 700 and the second switching circuit 800 may include relays or contactors. This is not limited to the embodiments of the present application. When the solar power inverter 100 is operating in off-grid mode, the controller 110 controls the first switching circuit 700 to turn on, allowing the solar power inverter 100 to supply power to the first load 300. Alternatively, when the solar power inverter 100 is operating in on-grid mode, the controller 110 controls the second switching circuit 800 to turn on, allowing the solar power inverter 100 to supply power to the grid 400 and the second load 500.

[0057] In possible embodiments, the controller 110 is configured to convert the DC output from the photovoltaic array 200 to single phase by controlling the photovoltaic inverter 100 to operate in off-grid mode when the voltage of the grid 400 is below a grid voltage threshold, controlling the operation of the first and second bridge arms and controlling the operation of the third bridge arm, thereby supplying AC from the three output terminals (U, O, and W) of the photovoltaic inverter 100 to power the first load 300. In embodiments of the present application, the specific value of the grid voltage threshold is not limited. Both output terminals U and W of the photovoltaic inverter 100 are phase lines. Output terminal O of the photovoltaic inverter 100 is the neutral line. The two phase lines, namely output terminals U and W, are configured to supply power to the first load 300, for example, supplying a voltage of 202V to the first load 300. The two phase wires, namely either output terminal U and output terminal W, and the neutral wire, namely output terminal O, are also configured to supply power to the first load 300, for example, supplying a voltage of 101V to the first load 300. In this case, the solar power inverter 100 can supply power to the first load 300 by outputting AC through a single-phase three-wire system, when it is necessary to operate in off-grid mode and output AC through a single-phase three-wire system. This reduces the complexity and cost of the structure of the solar power inverter 100 compared to the following solution: the solar power inverter 100 is driven by a Heric inverter drive system, and the first, second, and third bridge arms are controlled to operate to convert the DC output from the solar power array 200 to single-phase AC, and a split-phase transformer needs to be placed in the solar power inverter 100, so that electrical energy is output from the three output terminals of the solar power inverter 100 and power is supplied to the first load 300.

[0058] In possible embodiments, the control that operates the first and second bridge arms as described above, and the control that operates the third bridge arm in the following embodiments, means that the controller 110 controls the switching transistors in the bridge arms to turn on alternately via pulse signals, thereby causing the bridge arms to operate in a manner that converts DC to AC. The control that stops the operation of the third bridge arm as described above means that the controller 110 stops transmitting pulse signals to the third bridge arm, which can also be said to mean stopping transmitting PWM driver gating signals to the third bridge arm.

[0059] The process by which the controller 110 controls the first and second bridge arms to convert the DC output from the photovoltaic array 200 into single-phase AC and supply power to the first load 300 via the three output terminals of the photovoltaic inverter 100 includes, with reference to Figure 2, the controller 110 simultaneously turning on or off the first switching transistor Q1 and the fourth switching transistor Q4, simultaneously turning on or off the second switching transistor Q2 and the third switching transistor Q3, alternately turning on the first switching transistor Q1 and the second switching transistor Q2 in positive and negative half-cycles, and keeping the fifth switching transistor Q5 and the sixth switching transistor Q6 of the third bridge arm always off.

[0060] Specifically, as shown in Figure 3, the controller 110 can generate a first pulse width modulation (PWM) signal and a second PWM signal by comparing a reference signal with a triangular carrier signal and transmitting a PWM driver gating signal in a bipolar manner. The first PWM signal is used to control the first switching transistor Q1 and the fourth switching transistor Q4. The second PWM signal is used to control the second switching transistor Q2 and the third switching transistor Q3.

[0061] Referring to Figure 3, in a possible embodiment, the controller 110 can generate a third PWM signal and a fourth PWM signal. The third PWM signal is used to control the first switching transistor Q1 and the fourth switching transistor Q4. The fourth PWM signal is used to control the second switching transistor Q2 and the third switching transistor Q3. The process of comparing the first PWM signal and the second PWM signal to generate the third and fourth PWM signals includes a dead time. This improves the safety of the solar power inverter 100 when the third PWM signal controls the first switching transistor Q1 and the fourth switching transistor Q4, and the fourth PWM signal controls the second switching transistor Q2 and the third switching transistor Q3.

[0062] In possible embodiments, the controller 110 is further configured to control the photovoltaic inverter 100 to operate in on-grid mode when the voltage of the grid 400 is higher than the grid voltage threshold, and to control the operation of the first, second, and third bridge arms to convert the DC output from the photovoltaic array 200 to single-phase AC, thereby outputting electrical energy from the two output terminals of the photovoltaic inverter 100 to supply power to the grid 400 or the second load 500. In this case, the output terminals U and W of the photovoltaic inverter 100 are configured to supply power to the grid 400 or the second load 500, supplying a voltage of, for example, 202V. In this case, the controller 110 controls the first, second, and third bridge arms to convert the DC output from the photovoltaic array 200 to single-phase AC. The addition of the third bridge arm reduces the voltage withstand capability and the losses of each switching transistor. This reduces the losses of the solar power inverter 100 and improves the efficiency of the solar power inverter 100 in on-grid mode compared to the following solutions. The solar power inverter 100 is driven by an H4 bridge inverter drive system, and the controller 110 controls the first and second bridge arms to convert the DC output from the solar power array 200 into single-phase AC.

[0063] The process by which the controller 110 controls the first, second, and third bridge arms to convert the DC output from the photovoltaic array 200 into single-phase AC and supply power to the grid 400 or second load 500 via the first and third output terminals includes the following: Referring to Figure 2, in a positive half-cycle, the controller 110 controls the first switching transistor Q1 and the fourth switching transistor Q4 to be simultaneously turned on or off, and the first switching transistor Q1 and the fifth switching transistor Q5 to be alternately turned on. When the first and fourth switching transistors Q1 and Q4 are turned off and the fifth switching transistor Q5 is turned on, the first inductor L1 freewheels via the diode D of the sixth switching transistor Q6. In a negative half-cycle, the controller 110 controls the second and third switching transistors Q2 and Q3 to be simultaneously turned on or off, and the second and sixth switching transistors Q2 and Q6 to be alternately turned on. When the second switching transistor Q2 and the third switching transistor Q3 are turned off and the sixth switching transistor Q6 is turned on, the first inductor L1 freewheels through the diode D of the fifth switching transistor Q5.

[0064] Referring to Figure 2, in possible embodiments, the photovoltaic inverter 100 provided in the embodiment of the present application further includes a third capacitor C3 and a fourth capacitor C4. The third capacitor C3 is located between the first output terminal and the second output terminal. The fourth capacitor C4 is located between the second output terminal and the third output terminal. The third capacitor C3 and the fourth capacitor C4 are arranged to perform filtering to reduce voltage fluctuations. This improves the stability of the output voltage of the photovoltaic inverter 100.

[0065] When the voltage of grid 400 is below the grid voltage threshold, the controller 110 of the photovoltaic inverter 100 provided in this embodiment controls the photovoltaic inverter 100 to operate in off-grid mode, controls the first and second bridge arms to operate to convert the DC output from the photovoltaic array 200 to single-phase AC, and controls the operation of the third bridge arm to stop the operation of the third bridge arm, thereby outputting electrical energy from the three output terminals (U, O, and W) of the photovoltaic inverter 100 to supply power to the first load 300. In this case, when the photovoltaic inverter 100 operates in off-grid mode and needs to output AC via a single-phase three-wire system, it can supply power to the first load 300 by outputting AC via a single-phase three-wire system, eliminating the need to place a split-phase transformer in the photovoltaic inverter 100. This reduces the complexity and cost of the structure of the photovoltaic inverter 100 compared to the following solutions. The solar power inverter 100 is driven by a Heric inverter drive system and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array 200 into single-phase AC. A split-phase transformer must be placed in the solar power inverter 100 so that it can output electrical energy from its three output terminals to power the first load 300. When the voltage of the grid 400 is higher than the grid voltage threshold, the controller 110 controls the solar power inverter 100 to operate in on-grid mode and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array 200 into single-phase AC. This allows it to output electrical energy from its two output terminals to power the grid 400 or the second load 500. The addition of the third bridge arm reduces the voltage withstand capability and losses of each switching transistor. This reduces the losses of the solar power inverter 100 and improves the efficiency of the solar power inverter 100 in on-grid mode, compared to the following solutions.The solar power inverter 100 is driven by an H4 bridge inverter drive system, and the controller 110 controls the first and second bridge arms to convert the DC output from the solar power array 200 into single-phase AC, thereby outputting electrical energy from the two output terminals of the solar power inverter 100 and supplying power to the grid 400 or the second load 500.

[0066] As shown in Figure 4, in possible embodiments, the photovoltaic inverter 100 provided in the embodiment of the present invention further includes a second inductor L2 positioned between the second end and the third output end of the third bridge arm. The second inductor L2 is magnetically coupled to the first inductor L1. The first inductor L1 and the second inductor L2 can share a single central magnetic column. This reduces the volume and current ripple of the first inductor L1 and the second inductor L2, improves dynamic response performance, reduces the volume of the photovoltaic inverter 100, and improves the performance of the photovoltaic inverter 100.

[0067] In the photovoltaic inverter 100 provided in the embodiment of the present invention, the second inductor L2 is positioned between the second end and the third output end of the third bridge arm, and the second inductor L2 is magnetically coupled with the first inductor L1. The first inductor L1 and the second inductor L2 can share one central magnetic column. This reduces the volume and current ripple of the first inductor L1 and the second inductor L2, improves dynamic response performance, reduces the volume of the photovoltaic inverter 100, and improves the performance of the photovoltaic inverter 100.

[0068] As shown in Figure 4, in possible embodiments, the photovoltaic inverter 100 provided in the embodiment of the present invention further includes a third inductor L3 and a fourth bridge arm positioned between a positive DC bus BUS+ and a negative DC bus BUS-. The fourth bridge arm includes a seventh switching transistor Q7 and an eighth switching transistor Q8 connected in series. The midpoint of the fourth bridge arm is connected to one end of the third inductor L3. The other end of the third inductor L3 is connected to the connection point of the positive and negative bus capacitors. The third inductor L3 and the fourth bridge arm are configured to balance the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS-. This improves the reliability of the photovoltaic inverter 100.

[0069] Specifically, when the solar power inverter 100 operates in off-grid mode, the first load 300 is an unbalanced load or a half-wave load, and the solar power inverter 100 supplies power to the first load 300, the voltage of the positive DC bus BUS+ is higher than the voltage of the negative DC bus BUS-, or the voltage of the positive DC bus BUS+ is lower than the voltage of the negative DC bus BUS-.

[0070] For example, when the solar power inverter 100 operates in off-grid mode, and the first load 300 is a positive half-wave load, and the solar power inverter 100 supplies power to the first load 300, the first load 300 obtains energy from the positive DC bus BUS+ but not from the negative DC bus BUS-. As a result, the voltage of the positive DC bus BUS+ becomes lower than the voltage of the negative DC bus BUS-, thereby creating an imbalance between the voltages of the positive DC bus BUS+ and the negative DC bus BUS-. When the controller 110 controls the seventh switching transistor Q7 to turn off and the eighth switching transistor Q8 to turn on, the negative DC bus BUS- charges the third inductor L3 via the eighth switching transistor Q8. When controller 110 controls the seventh switching transistor Q7 to turn on and the eighth switching transistor Q8 to turn off, the third inductor L3 freewheels via the seventh switching transistor Q7, and the third inductor L3 charges the positive DC bus BUS+. In this way, the energy of the negative DC bus BUS- is transferred to the positive DC bus BUS+, and the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS- become balanced.

[0071] As another example, when the solar power inverter 100 operates in off-grid mode and the first load 300 is a negative half-wave load, and the solar power inverter 100 supplies power to the first load 300, the first load 300 obtains energy from the negative DC bus BUS- but not from the positive DC bus BUS+. As a result, the voltage of the positive DC bus BUS+ becomes higher than the voltage of the negative DC bus BUS-, thereby creating an imbalance between the voltages of the positive DC bus BUS+ and the negative DC bus BUS-. When the controller 110 controls the seventh switching transistor Q7 to turn on and the eighth switching transistor Q8 to turn off, the positive DC bus BUS+ charges the third inductor L3 via the seventh switching transistor Q7. When controller 110 controls the seventh switching transistor Q7 to turn off and the eighth switching transistor Q8 to turn on, the third inductor L3 freewheels via the eighth switching transistor Q8, and the third inductor L3 charges the negative DC bus BUS-. In this way, the energy of the positive DC bus BUS+ is transferred to the negative DC bus BUS-, and the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS- are balanced.

[0072] In possible embodiments, when freewheeling occurs via the seventh switching transistor Q7 or the eighth switching transistor Q8 after charging the third inductor L3, the freewheeling may be performed via the diode D in the seventh switching transistor Q7 or the diode D in the eighth switching transistor Q8. The controller 110 does not need to control the seventh switching transistor Q7 or the eighth switching transistor Q8 to turn on in order to complete the freewheeling. This reduces the losses of the solar power inverter 100.

[0073] In possible embodiments, the controller 110 is further configured to acquire the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component of the phase voltage, i.e., the direct current voltage (DCV), when the voltage of the grid 400 is below the grid voltage threshold and the photovoltaic inverter 100 is operating in off-grid mode, and to output a pulse-width modulated signal. The current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component of the phase voltage DCV are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the seventh switching transistor Q7 and the eighth switching transistor Q8 in the fourth bridge arm.

[0074] The positive bus voltage is the absolute value of the voltage difference between the positive DC bus BUS+ and the connection point of the positive and negative bus capacitors. The negative bus voltage is the absolute value of the voltage difference between the negative DC bus BUS- and the connection point of the positive and negative bus capacitors. The phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal. This is not limited to the embodiments of the present application.

[0075] Specifically, as shown in Figure 5, the process by which the controller 110 outputs a pulse-width modulated signal based on the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage includes the following: First, the controller 110 calculates the difference between the DC voltage threshold and the DC component DCV of the phase voltage to obtain the DC component difference, and generates a DC component adjustment value based on the DC component difference via the DCV control loop. The specific value of the DC voltage threshold is not limited to the embodiments of this application. For example, the DC voltage threshold may be 0. Next, the controller 110 subtracts the negative bus voltage from the difference between the positive bus voltage and the DC component adjustment value to generate a midpoint voltage difference, and generates a midpoint voltage adjustment value based on the midpoint voltage difference via the midpoint voltage loop. Finally, the controller 110 calculates the difference between the current IL of the third inductor L3 and the midpoint voltage adjustment value to generate a balanced bridge current difference, and generates a pulse-width modulated signal based on the balanced bridge current difference via the balanced bridge current loop. For specific control strategies for the DCV control loop, intermediate voltage loop, and balanced bridge current loop, please refer to the prior art. Details will not be described in the embodiments of this application. The controller 110 generates a pulse width modulated signal based on the DC component DCV of the phase voltage via the DCV control loop. This suppresses the DC component of the AC output from the solar power inverter 100, improving the stability and reliability of the solar power inverter 100. The controller 110 generates a pulse width modulated signal based on the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage via the intermediate voltage loop and the balanced bridge current loop. This prevents deviations and fluctuations in the intermediate voltage between the positive DC bus BUS+ and the negative DC bus BUS-, balances the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS-, and improves the reliability of the solar power inverter 100.

[0076] In the solar power inverter 100 provided in the embodiment of the present invention, the controller 110 generates a pulse-width modulated signal based on the DC component DCV of the phase voltage via a DCV control loop, and controls the fourth bridge arm using this pulse-width modulated signal. This suppresses the DC component of the AC output from the solar power inverter 100, improving the stability and reliability of the solar power inverter 100. The controller 110 generates a pulse-width modulated signal based on the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage via an intermediate voltage loop and a balanced bridge current loop, and controls the fourth bridge arm using this pulse-width modulated signal. This prevents deviations and fluctuations in the intermediate voltage between the positive DC bus BUS+ and the negative DC bus BUS-, balances the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS-, and improves the reliability of the solar power inverter 100.

[0077] In possible embodiments, the controller 110 is further configured to acquire the phase voltage when the voltage of the grid 400 is below a grid voltage threshold and the photovoltaic inverter 100 is operating in off-grid mode. The current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, the DC component DCV of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the fourth bridge arm.

[0078] Specifically, as shown in Figure 6, the process by which the controller 110 outputs a pulse-width modulated signal based on the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, the DC component DCV of the phase voltage, and the phase voltage, may further include the following based on Figure 5: The controller 110 uses the absolute value of the difference between the phase voltage threshold and the phase voltage as the phase voltage difference, processes the difference between the phase voltage difference and the phase voltage difference threshold using a proportional integral (PI) controller, applies current limiting to the processing result, and generates a phase voltage adjustment value by injecting a current with a phase difference of 90 degrees from the phase voltage for compensation. The specific values ​​of the phase voltage threshold and the phase voltage difference threshold are not limited to the embodiments of this application. For example, the phase voltage threshold may be 101V, and the phase voltage difference threshold may be 6V. This process may be called an RMS control loop. For specific control policies of the RMS control loop, please refer to the prior art. Details are not described in the embodiments of this application. Next, the controller 110 calculates the difference between the current IL of the third inductor L3 and the sum of the phase voltage adjustment value and the intermediate voltage adjustment value to generate a balanced bridge current difference, and generates a pulse width modulated signal based on the balanced bridge current difference via the balanced bridge current loop. The controller 110 generates a pulse width modulated signal based on the phase voltage via feedforward of the RMS control loop. This improves the dynamic response capability of the solar power inverter 100.

[0079] In the photovoltaic inverter 100 provided in the embodiment of the present invention, the controller 110 is further configured to acquire the phase voltage when the voltage of the grid 400 is below a grid voltage threshold and the photovoltaic inverter 100 is operating in off-grid mode. The current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, the DC component DCV of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the fourth bridge arm. The controller 110 generates the pulse-width modulated signal based on the phase voltage via feedforward of the RMS control loop. This improves the dynamic response capability of the photovoltaic inverter 100.

[0080] As shown in Figure 4, in possible embodiments, the photovoltaic inverter 100 provided in the embodiment of the present invention further includes a fifth capacitor C5 located between the first end and the first output terminal of the second bridge arm, a sixth capacitor C6 located between the first output terminal and the third output terminal, and a seventh capacitor C7 located between the second end and the third output terminal of the second bridge arm. The fifth capacitor C5 and the seventh capacitor C7 are configured to suppress common-mode voltage, thereby improving the efficiency of the photovoltaic inverter 100. The sixth capacitor C6 is configured to perform filtering to reduce voltage fluctuations, thereby improving the stability of the output voltage of the photovoltaic inverter 100.

[0081] In the solar power inverter 100 provided in the embodiment of the present invention, the fifth capacitor C5 and the seventh capacitor C7 are arranged to suppress common-mode voltage. This improves the efficiency of the solar power inverter 100. Furthermore, the sixth capacitor C6 is arranged to perform filtering to reduce voltage fluctuations. This improves the stability of the output voltage of the solar power inverter 100.

[0082] As shown in Figure 7, embodiments of the present invention further provide a method for controlling a photovoltaic inverter applied to the aforementioned photovoltaic inverter 100. This method includes steps S701 and S702. Either step S701 or S702 may be performed based on a relationship between the voltage of the grid 400 and a grid voltage threshold.

[0083] S701: When the voltage of grid 400 is below the grid voltage threshold, the controller 110 controls the operation of the first and second bridge arms and the operation of the third bridge arm, thereby outputting electrical energy from the three output terminals of the photovoltaic inverter 100 and supplying power to the first load 300. The specific value of the grid voltage threshold is not limited to the embodiments of this application.

[0084] S702: When the voltage of grid 400 is higher than the grid voltage threshold, the controller 110 controls the first bridge arm, the second bridge arm, and the third bridge arm to operate, thereby outputting electrical energy from the two output terminals of the photovoltaic inverter 100 and supplying power to grid 400 or the second load 500.

[0085] According to the control method for a photovoltaic inverter provided in the embodiment of the present invention, when the voltage of the grid 400 is below the grid voltage threshold, the controller 110 controls the photovoltaic inverter 100 to operate in off-grid mode, controls the first and second bridge arms to operate to convert the DC output from the photovoltaic array 200 to single-phase AC, and controls the third bridge arm to stop, thereby outputting electrical energy from the three output terminals (U, O, and W) of the photovoltaic inverter 100 and supplying power to the first load 300. In this case, when the photovoltaic inverter 100 operates in off-grid mode and needs to output AC via a single-phase three-wire system, it can supply power to the first load 300 by outputting AC via a single-phase three-wire system, eliminating the need to place a split-phase transformer in the photovoltaic inverter 100. This reduces the complexity and cost of the structure of the photovoltaic inverter 100 compared to the following solutions. The solar power inverter is driven by the Heric inverter drive system and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array 200 to single-phase AC. A split-phase transformer must be placed in the solar power inverter 100 so that electrical energy is output from the three output terminals of the solar power inverter 100 to supply power to the first load 300. When the voltage of the grid 400 is higher than the grid voltage threshold, the controller 110 controls the solar power inverter 100 to operate in on-grid mode and controls the operation of the first, second, and third bridge arms to convert the DC output from the solar power array 200 to single-phase AC. As a result, electrical energy is output from the two output terminals of the solar power inverter 100 to supply power to the grid 400 or the second load 500. Adding the third bridge arm reduces the voltage withstand capability and losses of each switching transistor.This reduces the losses of the solar power inverter 100 and improves the efficiency of the solar power inverter 100 in on-grid mode compared to the following solutions. The solar power inverter 100 is driven by an H4 bridge inverter drive system, and the controller 110 controls the first and second bridge arms to convert the DC output from the solar power array 200 into single-phase AC, thereby outputting electrical energy from the two output terminals of the solar power inverter 100 and supplying power to the grid 400 or the second load 500.

[0086] Referring to Figure 4, in possible embodiments, the photovoltaic inverter 100 provided in the embodiments of the present application further includes a third inductor L3 and a fourth bridge arm positioned between a positive DC bus BUS+ and a negative DC bus BUS-. The control method for the photovoltaic inverter provided in the embodiments of the present application further includes step S703. Steps S703 and S701 may be performed simultaneously, or step S703 may be performed after step S701. This is not limited to the embodiments of the present application. Embodiments of the present application will be described using an example in which step S703 is performed after step S701.

[0087] S703: When the voltage of grid 400 is below the grid voltage threshold, the controller 110 acquires the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage, and outputs a pulse width modulated signal. The current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage are used to determine the duty cycle of the pulse width modulated signal. The pulse width modulated signal is used to control the fourth bridge arm.

[0088] In the control method for a photovoltaic inverter provided in the embodiment of the present invention, the controller 110 generates a pulse-width modulated signal based on the DC component DCV of the phase voltage via a DCV control loop, and this pulse-width modulated signal is used to control the fourth bridge arm. This suppresses the DC component of the AC output from the photovoltaic inverter 100, improving the stability and reliability of the photovoltaic inverter 100. The controller 110 generates a pulse-width modulated signal based on the current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, and the DC component DCV of the phase voltage via an intermediate voltage loop and a balanced bridge current loop, and this pulse-width modulated signal is used to control the fourth bridge arm. This prevents deviations and fluctuations in the intermediate voltage between the positive DC bus BUS+ and the negative DC bus BUS-, balances the voltage of the positive DC bus BUS+ and the voltage of the negative DC bus BUS-, and improves the reliability of the photovoltaic inverter 100.

[0089] As shown in Figure 7, in possible embodiments, the control method for a photovoltaic inverter provided in the embodiment of the present invention further includes step S704. The execution order of steps S704 and S703 does not have to be distinguished and may be performed simultaneously, for example.

[0090] S704: The controller 110 acquires the phase voltage when the grid voltage is below the grid voltage threshold.

[0091] The current IL of the third inductor, the positive bus voltage, the negative bus voltage, the DC component DCV of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the fourth bridge arm.

[0092] In the control method for a photovoltaic inverter provided in the embodiment of the present invention, the controller 110 acquires the phase voltage when the voltage of the grid 400 is below the grid voltage threshold and the photovoltaic inverter 100 is operating in off-grid mode. The current IL of the third inductor L3, the positive bus voltage, the negative bus voltage, the DC component DCV of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse-width modulated signal. The pulse-width modulated signal is used to control the fourth bridge arm. The controller 110 generates the pulse-width modulated signal based on the phase voltage via feedforward of the RMS control loop. This improves the dynamic response capability of the photovoltaic inverter 100.

[0093] Based on this, an embodiment of the present invention further provides a photovoltaic power generation system 600, as shown in Figure 1. The photovoltaic power generation system 600 includes a photovoltaic inverter 100. The circuit topology of the photovoltaic inverter 100 is the circuit topology of the photovoltaic inverter 100 shown in Figure 2 or Figure 4.

[0094] The above-mentioned detailed description of the solar power inverter 100 and the analysis of its advantageous effects can also be similarly referenced to the control method of the solar power inverter and the solar power system 600. Further details will not be described here in the embodiments of this application.

[0095] The above description is merely a specific embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modification or substitution within the technical scope disclosed herein shall be included within the scope of protection of the present application. Accordingly, the scope of protection of the present application shall be subject to the scope of protection of the claims.

Claims

1. A solar power inverter, wherein the input terminal of the solar power inverter is configured to be connected to a solar power array, the solar power inverter includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between the positive DC bus and the negative DC bus, a controller, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm, The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series, the first bridge arm includes a first switching transistor and a second switching transistor connected in series, the second bridge arm includes a third switching transistor and a fourth switching transistor connected in series, the third bridge arm includes a fifth switching transistor and a sixth switching transistor, the drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is positioned between the first end of the third bridge arm and the first output terminal of the solar power inverter, the connection point of the positive and negative bus capacitors is connected to the second output terminal of the solar power inverter, the second end of the third bridge arm is connected to the third output terminal of the solar power inverter, and the three output terminals of the solar power inverter are configured to be connected to a grid or load. The controller is configured to operate the first and second bridge arms and stop the operation of the third bridge arm when the grid voltage is below the grid voltage threshold, thereby outputting electrical energy from the three output terminals of the solar power inverter and supplying power to the first load. The controller is further configured to operate the first bridge arm, the second bridge arm, and the third bridge arm when the voltage of the grid is greater than the grid voltage threshold, thereby outputting electrical energy from the two output terminals of the solar power inverter and supplying power to the grid or the second load. Solar power inverter.

2. The solar power inverter further includes a third capacitor and a fourth capacitor, The photovoltaic inverter according to claim 1, wherein the third capacitor is located between the first output terminal and the second output terminal, and the fourth capacitor is located between the second output terminal and the third output terminal.

3. The photovoltaic inverter according to claim 1, further comprising a second inductor disposed between the second end and the third output end of the third bridge arm, wherein the second inductor is magnetically coupled to the first inductor.

4. The photovoltaic inverter according to any one of claims 1 to 3, further comprising a third inductor and a fourth bridge arm disposed between the positive DC bus and the negative DC bus, wherein the fourth bridge arm comprises a seventh switching transistor and an eighth switching transistor connected in series, the midpoint of the fourth bridge arm is connected to one end of the third inductor, and the other end of the third inductor is connected to the connection point of the positive and negative bus capacitors.

5. The controller is further configured to acquire the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor and output a pulse-width modulated signal when the voltage of the grid is less than or equal to the grid voltage threshold, the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor are used to determine the duty cycle of the pulse-width modulated signal, and the pulse-width modulated signal is used to control the fourth bridge arm. The photovoltaic inverter according to claim 4, wherein the positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection point of the positive and negative bus capacitors, the negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection point of the positive and negative bus capacitors, and the phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal.

6. The photovoltaic inverter according to claim 5, wherein the controller is further configured to acquire the phase voltage when the voltage of the grid is less than or equal to the grid voltage threshold, and the current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulated signal.

7. The photovoltaic inverter according to any one of claims 1 to 6, further comprising a fifth capacitor disposed between the first end and the first output terminal of the second bridge arm, a sixth capacitor disposed between the first output terminal and the third output terminal, and a seventh capacitor disposed between the second end and the third output terminal of the second bridge arm.

8. A control method for a solar power inverter, which is applied to a solar power inverter, wherein the method is The steps include: controlling the operation of the first and second bridge arms and stopping the operation of the third bridge arm when the grid voltage is below the grid voltage threshold, thereby outputting electrical energy from the three output terminals of the solar power inverter to supply power to the first load; The process includes the step of controlling the operation of the first bridge arm, the second bridge arm, and the third bridge arm when the grid voltage is greater than the grid voltage threshold, thereby outputting electrical energy from the two output terminals of the solar power inverter to supply power to the grid or a second load, The input terminal of the photovoltaic inverter is configured to be connected to a photovoltaic array, and the photovoltaic inverter includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between the positive DC bus and the negative DC bus, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series, the first bridge arm includes a first switching transistor and a second switching transistor connected in series, the second bridge arm includes a third switching transistor and a fourth switching transistor connected in series, the third bridge arm includes a fifth switching transistor and a sixth switching transistor, the drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is positioned between the first end of the third bridge arm and the first output terminal of the solar power inverter, the connection point of the positive and negative bus capacitors is connected to the second output terminal of the solar power inverter, the second end of the third bridge arm is connected to the third output terminal of the solar power inverter, and the three output terminals of the solar power inverter are configured to be connected to the grid or load. method.

9. The step of obtaining the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor and outputting a pulse-width modulated signal when the voltage of the grid is less than or equal to the grid voltage threshold, wherein the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor are used to determine the duty cycle of the pulse-width modulated signal, and the pulse-width modulated signal is used to control a fourth bridge arm. The positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection point of the positive and negative bus capacitors, the negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection point of the positive and negative bus capacitors, the phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal. The method according to claim 8, wherein the solar power inverter further includes the third inductor and the fourth bridge arm disposed between the positive DC bus and the negative DC bus, the fourth bridge arm includes a seventh switching transistor and an eighth switching transistor connected in series, the midpoint of the fourth bridge arm is connected to one end of the third inductor, and the other end of the third inductor is connected to the connection point of the positive and negative bus capacitors.

10. The method according to claim 9, further comprising the step of obtaining the phase voltage when the voltage of the grid is less than or equal to the grid voltage threshold, wherein the current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulated signal.

11. A photovoltaic power generation system, the photovoltaic power generation system includes a photovoltaic inverter, the input terminal of the photovoltaic inverter is configured to be connected to a photovoltaic array, the photovoltaic inverter includes positive and negative bus capacitors, a first bridge arm and a second bridge arm positioned between the positive DC bus and the negative DC bus, a controller, a first inductor, and a third bridge arm positioned between the midpoint of the first bridge arm and the midpoint of the second bridge arm, The positive and negative bus capacitors include a first capacitor and a second capacitor connected in series, the first bridge arm includes a first switching transistor and a second switching transistor connected in series, the second bridge arm includes a third switching transistor and a fourth switching transistor connected in series, the third bridge arm includes a fifth switching transistor and a sixth switching transistor, the drain or collector of the fifth switching transistor is connected to the drain or collector of the sixth switching transistor, or the source or emitter of the fifth switching transistor is connected to the source or emitter of the sixth switching transistor. The first inductor is positioned between the first end of the third bridge arm and the first output terminal of the solar power inverter, the connection point of the positive and negative bus capacitors is connected to the second output terminal of the solar power inverter, the second end of the third bridge arm is connected to the third output terminal of the solar power inverter, and the three output terminals of the solar power inverter are configured to be connected to a grid or load. The controller is configured to output electrical energy from the three output terminals of the solar power inverter and supply power to the first load by controlling the operation of the first bridge arm and the second bridge arm and stopping the operation of the third bridge arm when the grid voltage is below the grid voltage threshold. A photovoltaic power generation system, further configured such that the controller controls the operation of the first bridge arm, the second bridge arm, and the third bridge arm when the voltage of the grid is greater than the grid voltage threshold, thereby outputting electrical energy from the two output terminals of the photovoltaic inverter to supply power to the grid or a second load.

12. The photovoltaic power generation system according to claim 11, further comprising a second inductor positioned between the second end and the third output end of the third bridge arm, wherein the second inductor is magnetically coupled to the first inductor.

13. The photovoltaic inverter further includes a third inductor and a fourth bridge arm disposed between the positive DC bus and the negative DC bus, wherein the fourth bridge arm includes a seventh switching transistor and an eighth switching transistor connected in series, the midpoint of the fourth bridge arm is connected to one end of the third inductor, and the other end of the third inductor is connected to the connection point of the positive and negative bus capacitors, the photovoltaic system according to claim 11 or 12.

14. The controller is further configured to acquire the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor and output a pulse-width modulated signal when the voltage of the grid is less than or equal to the grid voltage threshold, and to determine the duty cycle of the pulse-width modulated signal using the DC components of the current, positive bus voltage, negative bus voltage, and phase voltage of the third inductor, and the pulse-width modulated signal is used to control the fourth bridge arm. The photovoltaic power generation system according to claim 13, wherein the positive bus voltage is the absolute value of the voltage difference between the positive DC bus and the connection point of the positive and negative bus capacitors, the negative bus voltage is the absolute value of the voltage difference between the negative DC bus and the connection point of the positive and negative bus capacitors, and the phase voltage is the voltage between the first output terminal and the second output terminal, or the phase voltage is the voltage between the second output terminal and the third output terminal.

15. The photovoltaic power generation system according to claim 14, wherein the controller is further configured to acquire the phase voltage when the voltage of the grid is less than or equal to the grid voltage threshold, and the current of the third inductor, the positive bus voltage, the negative bus voltage, the DC component of the phase voltage, and the phase voltage are used to determine the duty cycle of the pulse width modulated signal.

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