Analog signal processing unit, lock-in amplifier, and sensing sensor
The described analog signal processing device uses FFT and a lock-in amplifier to efficiently extract I and Q components, reducing hardware complexity and costs, and improving detection accuracy for varying analog signals.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE & TECHNOLOGY
- Filing Date
- 2024-11-07
- Publication Date
- 2026-05-19
AI Technical Summary
Conventional methods for acquiring I and Q components from an analog signal with a varying output value require large hardware configurations, leading to high manufacturing costs and complexity.
An analog signal processing device that utilizes FFT processing on AD-converted input values, combined with a lock-in amplifier and a digitally controlled oscillator to extract I and Q components, reducing the need for separate hardware components like PLLs and multipliers.
This approach minimizes hardware requirements, reduces manufacturing costs, and enhances processing speed and accuracy while eliminating DC offset issues, enabling efficient detection of minute masses and other physical quantities.
Smart Images

Figure 2026082456000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an analog signal processing device, a lock-in amplifier, and a detection sensor. More specifically, it relates to an analog signal processing device, a lock-in amplifier, and a detection sensor that acquire I (In-Phase) components and Q (Quadrature) components from an analog signal whose output value varies over time.
Background Art
[0002] A resonance sensor is known to detect a target physical quantity by utilizing the characteristic that its resonance frequency changes due to changes in the external environment (such as mass). Conventional techniques for measuring the resonance frequency of a resonance sensor are disclosed in, for example, Non-Patent Document 1 below and Patent Documents 1 to 5 below.
[0003] Non-Patent Document 1 below discloses a technique for driving a resonance sensor at different frequencies by electrostatic force and a piezo element. In the technique of Patent Document 1 below, a voltage signal indicating the time change of the impedance during driving of the resonance sensor is detected, and this voltage signal is AD-converted. Quadrature demodulation processing is performed on the output after AD conversion, and the resonance frequency is detected by a PLL (Phase Locked Loop) that compares the phase components obtained by the quadrature demodulation processing. The quadrature demodulation processing consists of detection processing by two systems of orthogonal fundamental waves and processing using an LPF (Low-Pass Filter). From the LPF output signal levels of the two systems, amplitude and phase demodulation are performed for a specific AC frequency component.
[0004] Patent Document 1 below discloses a technique for acquiring the frequency characteristics of amplitude and phase by frequency sweep and detecting the resonance frequency. In the technique of Patent Document 1 below, sensing of a minute mass is performed by detecting a change in the resonance frequency using an impedance analyzer.
[0005] Patent Document 2 below discloses technology related to a resonance detection system. In Patent Document 2 below, two signals of the same frequency are generated, with the first signal used as an excitation signal to a resonance sensor and the second signal used as an input signal to a detector. The output of the resonance sensor and the second signal are multiplied and detected, and the output is processed using an LPF (low-pass filter). The resonance frequency is detected by tracing the frequency at which the phase difference becomes an appropriate value.
[0006] Patent Document 3, listed below, discloses a technique for detecting resonant frequencies using a MEMS (Micro Electro Mechanical Systems) sensor as an oscillator.
[0007] Patent documents 4 and 5 below disclose technology related to LIA (Lock-In Amplifier). In both patent documents 4 and 5 below, detection (multiplication) is performed on the analog signal using two orthogonal sine waves, followed by processing using an LPF and demodulation. [Prior art documents] [Non-patent literature]
[0008] [Non-Patent Document 1] "1024 3D-Stacked Monolithic NEMS Array with 375μm2 0.5mW 0.28ppm Frequency Deviation Pixel-level Readout for Zeptogram Gravimetric Sensing", ISSCC2022, section12.7, [Patent Documents]
[0009] [Patent Document 1] Japanese Patent Publication No. 2001-304945 [Patent Document 2] Japanese Patent Publication No. 2013-183583 [Patent Document 3] Japanese Patent Publication No. 2018-115927 [Patent Document 4] Chinese Patent Application Publication No. 104092442 Specification [Patent Document 5] U.S. Patent Application Publication 2011 / 0074476 [Overview of the project] [Problems that the invention aims to solve]
[0010] However, conventional technology had the problem of requiring a large hardware configuration to acquire the I and Q components from an analog signal whose output value fluctuates over time.
[0011] In Non-Patent Document 1, the sampling frequency of the quadrature demodulator used in quadrature demodulation processing is fixed. Therefore, a phase-comparison PLL is required to generate the excitation signal. In addition, a DDS (Direct Digital Synthesizer) and a DA (Digital-to-Analog) converter operating at two different frequencies are required to drive the resonant sensor. Furthermore, the technology in Non-Patent Document 1 is large in hardware scale for an analog system, consisting of a clock system with three different frequencies. The performance requirements for the AD converter (12 bits 500 MSPS) and DA converter (14 bits 1 GSPS) are stringent. For these reasons, the technology in Non-Patent Document 1 has the problem of high manufacturing costs and a large hardware configuration.
[0012] The technology described in Patent Document 1 had the problems of requiring a long time for detection and having high manufacturing costs and a large hardware configuration.
[0013] In the technology described in Patent Document 2, if the Q value of the resonant sensor is insufficient or the noise level is high, intermodulation distortion and image interference may occur in the multiplier detector, making accurate detection impossible. There was also the problem of DC offset occurring in the detector.
[0014] The technology of Patent Document 3 had problems that oscillation did not occur when the Q value of the MEMS sensor was low. There was also a problem that noise generated from the MEMS was large and the operation was unstable.
[0015] The technology of Patent Document 4 required a generator, a detector, and an LPF that generate two systems of sine waves. Also, since the processing between the two systems was performed separately, it was necessary to perform characteristic matching between the systems. Furthermore, since the scale of the hardware increased, the burden of design and adjustment increased. There were problems such as increased power consumption, speed, and size.
[0016] The present invention is for solving the above problems, and an object thereof is to provide an analog signal processing device, a lock-in amplifier, and a detection sensor capable of reducing the hardware configuration for obtaining I and Q components from an analog signal whose output value varies with time.
Means for Solving the Problems
[0017] An analog signal processing device according to one aspect of the present invention is an analog signal processing device that obtains I (In-Phase) components and Q (Quadrature) components from an analog signal whose output value varies with time, and obtains a plurality of input values from the analog signal, and converts each of the plurality of input values into each of a plurality of digital input values, and FFT (Fast Fourier Transform) processing is performed on the plurality of digital input values converted by the AD conversion means, and FFT means for obtaining I components and Q components from the plurality of digital input values is provided.
[0018] Preferably, the analog signal processing device further includes amplitude-phase calculation means for calculating the amplitude and phase of the analog signal using the I component and the Q component.
[0019] In the analog signal processing device, preferably, the AD conversion means identifies one period of the analog signal using an AD conversion clock, and acquires a plurality of input values from the analog signal for one period at a timing based on the AD conversion clock. The FFT means performs FFT processing on the plurality of digital input values converted by the AD conversion means using an FFT processing clock having the same frequency as the frequency of the AD conversion clock. The AD conversion clock and the FFT processing clock are linked to a reference signal.
[0020] A lock-in amplifier according to another aspect of the present invention includes the analog signal processing device and control means for controlling the operation of a target device by outputting an excitation pulse to the target device. The analog signal is a signal indicating the operation of the target device. The control means includes frequency correction means for correcting the frequency of the reference signal so that the difference between the phase of the analog signal calculated by the amplitude-phase calculation means and the phase of the excitation pulse becomes small, and frequency division means for determining each of the frequencies of the excitation pulse, the AD conversion clock, and the FFT processing clock by dividing the frequency of the reference signal corrected by the frequency correction means. The output means outputs each of the excitation pulse, the AD conversion clock, and the FFT processing clock to each of the target device, the AD conversion means, and the FFT means.
[0021] In the lock-in amplifier, preferably, the ratio of the frequency of the excitation pulse to each of the frequencies of the AD conversion clock and the FFT processing clock is M:L×2 N (where each of M, L, and N is a natural number).
[0022] A detection sensor according to still another aspect of the present invention includes the lock-in amplifier and a target device. The target device includes a vibrator that performs a vibration operation when an excitation pulse is input. The detection sensor further includes a detection unit for detecting the mass of an attachment attached to the vibrator based on the frequency of the excitation pulse when the difference between the phase of the analog signal calculated by the amplitude-phase calculation means and the phase of the excitation pulse is minimized.
Advantages of the Invention
[0023] According to the present invention, it is possible to provide an analog signal processing device, a lock-in amplifier, and a detection sensor that can reduce the hardware configuration required to acquire the I component and Q component from an analog signal whose output value fluctuates over time. [Brief explanation of the drawing]
[0024] [Figure 1] This is a block diagram showing the configuration of the detection sensor 1 in one embodiment of the present invention. [Figure 2] This diagram shows the configuration of the resonance sensor 4. [Figure 3] This diagram illustrates the operation of the resonance sensor 4. [Figure 4] This figure shows the frequency characteristics of the amplitude and phase difference of the resonant sensor 4. [Figure 5] This is a timing diagram for the excitation pulse, AD conversion clock, and FFT processing clock. [Figure 6] This is a block diagram showing the configuration of DCO24. [Modes for carrying out the invention]
[0025] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.
[0026] (Overall configuration of the detection sensor)
[0027] Figure 1 is a block diagram showing the configuration of the detection sensor 1 in one embodiment of the present invention.
[0028] Referring to Figure 1, the detection sensor 1 (an example of a detection sensor) of this embodiment comprises a resonance sensor 4 (an example of a target device), an amplifier 21, an AD converter 22 (an example of an AD conversion means), an FFT device 23 (an example of an FFT means and an amplitude phase calculation means), a DCO (Digitally Controlled Oscillator) 24 (an example of a control means), and a detection unit 25 (an example of a detection unit). The amplifier 21, the AD converter 22, and the FFT device 23 constitute an analog signal processing device 2 (an example of an analog signal processing device). The analog signal processing device 2 and the DCO 24 constitute a lock-in amplifier 3 (an example of a lock-in amplifier). The analog signal processing device 2 is a device that acquires the I component and the Q component S9 from a vibration signal S2, which is an analog signal whose output value changes over time.
[0029] DCO24 controls the operation of the resonant sensor 4 by outputting an excitation pulse S1 to the resonant sensor 4. The resonant sensor 4 includes an oscillator. When an excitation pulse is input to the oscillator, it is excited by the excitation pulse and performs an oscillatory operation. The resonant sensor 4 outputs an analog oscillator signal S2, which is an indicator signal of the operation (in this case, oscillatory) of the resonant sensor 4, to the amplifier 21. The amplifier 21 amplifies the oscillator signal S2 and outputs the amplified oscillator signal S3 to the AD converter 22. The amplifier 21 includes an LPF, and it is preferable to output the oscillator signal S3 after cutting low-frequency components using the LPF to the AD converter 22. The AD converter 22 converts the amplified oscillator signal S3 into a digital signal S4 and outputs it to the FFT device 23. Specifically, the AD converter 22 acquires multiple input values from the oscillator signal S2 and converts each of the multiple input values into each of the multiple digital input values. These multiple digital input values correspond to the digital signal S4. The FFT device 23 extracts the I component and Q component S9 from the digital signal S4 by performing a single-component FFT operation (FFT calculation) on the digital signal S4. In this way, the analog signal processing device 2 acquires and outputs the I component and Q component S9 from the vibration signal S2 of the resonant sensor 4.
[0030] Subsequently, the FFT device 23 may calculate the amplitude and phase S5 using the extracted I and Q components. In this way, the analog signal processing device 2 may output the amplitude and phase S5 from the vibration signal S2 of the resonant sensor 4. The FFT device 23 outputs the amplitude and phase S5 to the DCO 24.
[0031] The difference between the phase of the vibration of the resonant sensor 4 and the phase of the excitation pulse S1 (hereinafter sometimes referred to as the phase difference) changes rapidly around the resonant frequency of the resonant sensor 4, and becomes minimum (theoretically zero) at the resonant frequency of the resonant sensor 4. Therefore, DCO24 modifies the frequency of the excitation pulse S1 so that the difference between the phase input from the FFT device 23 and the phase of the excitation pulse S1 becomes small. Through this control (loop control) performed by DCO24, the frequency of the excitation pulse S1 output by DCO24 converges to the same frequency as the resonant frequency of the resonant sensor 4. When the difference between the phase input from the FFT device 23 and the phase of the excitation pulse S1 is minimum, the frequency of DCO24 corresponds to the resonant frequency of the resonant sensor 4. In this way, the lock-in amplifier 3 calculates the resonant frequency S7 of the resonant sensor 4.
[0032] Incidentally, the resonant frequency of the resonant sensor 4 changes depending on the mass of the deposits attached to the oscillator of the resonant sensor 4. Therefore, the detection unit 25 detects the mass S8 of the attached deposits based on the resonant frequency S7 output from the DCO 24 and a reference frequency held by the detection unit 25. The reference frequency corresponds to the resonant frequency of the resonant sensor 4 (natural frequency of the oscillator) when there are no deposits. In this way, the detection sensor 1 detects the mass S8 of the deposits attached to the oscillator of the resonant sensor 4. The detection sensor 1 may also detect physical quantities other than the mass of the deposits, such as temperature, pressure, or mass, based on the change in the resonant frequency of the resonant sensor 4.
[0033] Next, I will explain the configuration of the resonant sensor.
[0034] A resonant sensor is a physical structure that takes vibrational energy such as electricity, light, or electrostatic force as an excitation source as input, and outputs energy such as electricity or light as a reaction, or changes in its physical properties. In this embodiment, a resonant sensor using a graphene film as an oscillator (sensor film) will be described.
[0035] (Configuration of the resonant sensor)
[0036] Figure 2 shows the configuration of the resonant sensor 4. Figure 2(a) is a plan view, and Figure 2(b) is a cross-sectional view along the line IIB-IIB in Figure 2(a).
[0037] Referring to Figure 2, the resonant sensor 4 in this embodiment is composed of an oscillator 41 (an example of an oscillator) made of a graphene film or the like attached to a circular support 43. The resonant sensor 4 includes the oscillator 41, a plurality of terminals 42, a support 43, an optical filter 44, a pulse application unit 45, and a vibration detection unit 46 (the pulse application unit 45 and vibration detection unit 46 are shown only in Figure 2(b) and are indicated by functional blocks). The oscillator 41 vibrates when an excitation pulse is input. The oscillator 41 has, for example, a rectangular shape when viewed from above. Each of the plurality of terminals 42 is provided at any location on the oscillator 41. The support 43 supports the oscillator 41 from below. The support 43 has, for example, a circular shape when viewed from above. The optical filter 44 blocks unwanted components of light that pass through the optical filter 44. The pulse application unit 45 applies an excitation pulse to the oscillator 41. The vibration detection unit 46 detects the operation (in this case, vibration) of the vibrator 41 and outputs an analog vibration signal S2, which is a signal that indicates the operation of the vibrator 41.
[0038] Figure 3 is a diagram illustrating the operation of the resonant sensor 4. Figure 3(a) is a diagram illustrating a method for exciting the vibration of the oscillator 41. Figure 3(b) is a diagram illustrating a method for detecting the vibration of the oscillator 41. Figure 3(a) shows multiple methods for exciting the vibration of the oscillator 41, and Figure 3(b) shows multiple methods for detecting the vibration of the oscillator 41.
[0039] Referring to Figure 3(a), excitation sources such as light, electrical pulses, or electrostatic force from a nearby electrode are used to excite the oscillation of the oscillator 41.
[0040] When light is used to excite the vibration of the oscillator 41, the pulse application unit 45 irradiates the oscillator 41 with a light pulse corresponding to the excitation pulse S1. When electricity is used to excite the vibration of the oscillator 41, the pulse application unit 45 flows an electrical pulse corresponding to the excitation pulse S1 between a plurality of terminals 42 provided on the oscillator 41. When electrostatic force is used to excite the vibration of the oscillator 41, the pulse application unit 45 applies a voltage pulse corresponding to the excitation pulse S1 to a proximity electrode 451, which is an electrode provided in close proximity to the oscillator 41, thereby generating an electrostatic force on the proximity electrode 451.
[0041] Referring to Figure 3(b), the vibration of the oscillator 41 is detected by modulation of the light intensity of the reference light or by a change in the impedance of the oscillator 41. When the oscillator 41 is vibrating, the static reference light irradiated onto the oscillator 41 is modulated in intensity as it passes through or reflects the oscillator 41, and the impedance of the oscillator 41 changes in accordance with the vibration of the oscillator 41.
[0042] When modulation of the light intensity of a reference light is used to detect the vibration of the oscillator 41, the vibration detection unit 46 includes an illumination unit 461 and a photodiode 463. When modulation of the light intensity of a reference light is used to detect the vibration of the oscillator 41, either transmitted light of a static reference light or reflected light of a static reference light may be used. When transmitted light is used, the illumination unit 461 irradiates the oscillator 41 with reference light, and the photodiode 463 receives modulated light, which is the reference light whose intensity has been modulated as it passes through the vibrating oscillator 41. The photodiode 463 converts the received modulated light into an electrical signal and outputs it. On the other hand, when reflected light is used, the illumination unit 461 irradiates the oscillator 41 with reference light, and the photodiode 463 receives modulated light, which is the reference light whose intensity has been modulated as it is reflected from the oscillator 41.
[0043] In both cases, whether using transmitted light or reflected light, the photodiode 463 converts the received modulated light into an electrical signal (corresponding to the vibration signal S2 in Figure 1) and outputs it. Preferably, the modulated light received by the photodiode 463 is the one that has passed through the optical filter 44. The frequency (modulation frequency) of the electrical signal output by the photodiode 463 is the same as the frequency of the excitation pulse S1, and the amplitude (electrical amplitude) of the electrical signal output by the photodiode 463 is proportional to the amplitude of the oscillator 41.
[0044] When detecting vibrations of the oscillator 41 using the impedance change of the oscillator 41, the vibration detection unit 46 includes an impedance meter 462. The impedance meter 462 is electrically connected to each of the multiple terminals 42 provided on the oscillator 41. The impedance meter 462 measures the change in impedance of the oscillator 41 caused by the vibration of the oscillator 41. The impedance meter 462 outputs an electrical signal corresponding to the impedance (corresponding to the vibration signal S2 in Figure 1). The frequency (modulation frequency) of the electrical signal output by the impedance meter 462 is the same as the frequency of the excitation pulse S1, and the amplitude (electrical amplitude) of the electrical signal output by the impedance meter 462 is proportional to the amplitude of the oscillator 41.
[0045] In this embodiment, an example was described in which the resonant sensor 4, which is the target device of the detection sensor 1, has an oscillator 41 made of a graphene film. However, the resonant sensor 4, which is the target device of the detection sensor 1, can be any type, and may be a MEMS string, a silicon MEMS structure, or a resonant sensor having a quartz crystal oscillator.
[0046] (Frequency characteristics of vibrations of a resonant sensor)
[0047] Figure 4 shows the frequency characteristics of the amplitude and phase difference of the resonant sensor 4. The left vertical axis in the graph of Figure 4 represents the amplitude. The right vertical axis in the graph of Figure 4 represents the phase difference. This phase difference represents the difference between the phase of the electrical signal output by the resonant sensor 4 (corresponding to the vibration signal S2 in Figure 1) and the phase of the excitation pulse, and corresponds to the phase shift of the electrical signal with respect to the phase of the excitation pulse.
[0048] Referring to Figures 3 and 4, the frequency of the excitation pulse at which the amplitude of the electrical signal output by the resonant sensor 4 is maximum becomes the resonant frequency of the resonant sensor 4. The resonant frequency of the resonant sensor 4 depends on the area density, Young's modulus, tension strength of the oscillator 41, the radius of the support 43, etc. The amplitude of the electrical signal output by the resonant sensor 4 decreases as the frequency of the excitation pulse moves away from the resonant frequency of the resonant sensor 4. On the other hand, the phase of the electrical signal output by the resonant sensor 4 changes significantly around the resonant frequency of the resonant sensor 4. Therefore, the lock-in amplifier 3 uses this change in phase difference to detect the resonant frequency of the resonant sensor 4.
[0049] In addition, the lock-in amplifier 3 may use the frequency of the excitation pulse that maximizes the amplitude of the electrical signal output by the resonant sensor 4 as the resonant frequency of the resonant sensor 4.
[0050] If a small amount of deposit adheres to the oscillator 41, but not enough to stop its vibration, the resonant frequency of the resonant sensor 4 decreases. Therefore, if the resonant frequency of the oscillator 41 decreases, it can be inferred that some deposit has adhered to the oscillator 41, unless the resonant sensor 4 is damaged or deteriorated. The amount of decrease in the resonant frequency of the resonant sensor 4 is proportional to the mass of the deposit. Therefore, by utilizing the property that the resonant frequency of the oscillator 41 decreases due to the adhesion of a deposit, the detection sensor 1 can quickly detect deposits of minute mass.
[0051] (Specific operation of the analog signal processing unit)
[0052] Figure 5 shows the timing diagram for the excitation pulse, AD conversion clock, and FFT processing clock.
[0053] Referring to Figures 1 and 5, the vibration signal S2, which is an electrical signal output by the resonant sensor 4, is usually not suitable for input to the AD converter 22 as is. Therefore, the vibration signal S2 is amplified in the amplifier 21, and the low-frequency components are cut using an LFP to adjust the average level, resulting in the vibration signal S3. The vibration signal S3 output from the amplifier 21 is converted into a digital signal S4 in the AD converter 22 and output to the FFT device 23. The FFT device 23 extracts the I component and Q component S9 by performing a single-component FFT process on the digital signal S4.
[0054] The DCO24 outputs an AD conversion clock and an FFT processing clock S6 to the AD converter 22 and the FFT device 23, respectively. The AD conversion clock and the FFT processing clock each have the same frequency.
[0055] As will be described later, there is a predetermined relationship between the frequency of the excitation pulse and the frequencies of the AD conversion clock and the FFT processing clock. Using this relationship, the AD converter 22 uses the AD conversion clock to determine one period T of the vibration signal S3 (in other words, one period T of the excitation pulse). Based on the timing determined by the AD conversion clock, the AD converter 22 acquires multiple input values (values indicated by circles in Figure 5) from the vibration signal S3 for one period T. The multiple input values to be acquired are 1 / 2 N 2 having equal time intervals N There are (N is a natural number) input values, and in this case there are 8 (N=3) input values with a time interval of 1 / 8 of one period T. The AD converter 22 converts each of the acquired input values into each of the multiple digital input values (digital signals S4).
[0056] The FFT device 23 uses an FFT processing clock to convert each of the multiple digital input values (digital signals S4) into time-series input values D0, D1, D2, D3, D4, D5, D6, and D7. By performing FFT processing on input values D0 to D7, the FFT device 23 obtains the I and Q components of the vibration signal S2 from the resonant sensor 4. The FFT device 23 can perform accurate processing as long as the number of periods of the vibration components included in the input values are only integers. In the lock-in amplifier 3, the frequency for quadrature demodulation processing is fixed, so it is sufficient to perform FFT processing on only a single frequency component.
[0057] In the FFT processing performed by the FFT device 23, the complex spectrum intensity S is calculated by inputting the input values D0 to D7 into the following equation (1).
[0058]
number
[0059] ...(1)
[0060] In the complex spectrum intensity S calculated using equation (1), the real component I is calculated using equation (2) below, and the orthogonal component Q is calculated using equation (3) below. The calculated I and Q components correspond to the I and Q components of the vibration signal S2 of the resonant sensor 4, respectively.
[0061]
number
[0062] ...(2)
[0063]
number
[0064] ...(3)
[0065] The FFT device 23 uses the calculated I and Q components to calculate the amplitude and phase S5 of the vibration signal S2 from the resonant sensor 4. The amplitude and phase are calculated using the following equations (4) and (5), respectively.
[0066]
number
[0067] ...(4)
[0068]
number
[0069] ...(5)
[0070] FFT processing of only a single frequency component (single-component FFT processing) also functions as a Band-Pass Filter (BPF) to extract signals in a specific frequency band. Furthermore, since the digital signal S4 that is the target of FFT processing is digital data, there is no data degradation due to time integration, and the Signal-to-Noise Ratio (SNR) improves in proportion to the square root of the number of processing cycles.
[0071] (Control performed by a digitally controlled oscillator)
[0072] Figure 6 is a block diagram showing the configuration of DCO24.
[0073] Referring to Figure 6, the DCO24 includes a correction circuit 30 (an example of frequency correction means), a DA converter 31, and a VCO (Voltage-Controlled Oscillator) 32 (an example of frequency division means and output means). The correction circuit 30 receives amplitude and phase S5 from the FFT device 23. The correction circuit 30 calculates the phase difference based on the phase input from the FFT device 23. The correction circuit 30 determines (updates) the frequency code based on the phase difference and outputs the determined frequency code S11, along with the amplitude input from the FFT device 23, to the DA converter 31.
[0074] A frequency code is a digital voltage signal used to correct the frequency of a VCO oscillation signal (an example of a reference signal). When the phase difference is negative (when the excitation pulse frequency is higher than the resonant frequency), the correction circuit 30 determines a frequency code S11 to correct the frequency of the VCO oscillation signal so that the frequency of the VCO oscillation signal becomes lower than its current frequency. When the phase difference is positive (when the excitation pulse frequency is lower than the resonant frequency), the correction circuit 30 determines a frequency code S11 to correct the frequency of the VCO oscillation signal so that the frequency of the VCO oscillation signal becomes higher than its current frequency. In this way, the frequency of the VCO oscillation signal is corrected so that the phase difference becomes small (preferably zero).
[0075] The DA converter 31 converts the input frequency code S11 into an analog frequency code S12. The DA converter 31 outputs the converted frequency code S12, along with the amplitude input from the FFT device 23, to the VCO 32.
[0076] The VCO 32 determines the frequency of the VCO oscillation signal in response to the electrical signal S12 input from the DA converter 31. Based on the determined VCO oscillation signal, the VCO 32 determines the excitation pulse S1, as well as the AD conversion clock and the FFT processing clock. The VCO 32 determines the frequency of the excitation pulse, the frequency of the AD conversion clock, and the frequency of the FFT processing clock by dividing the frequency of the VCO oscillation signal. Therefore, the frequency of the excitation pulse, the frequency of the AD conversion clock, and the frequency of the FFT processing clock are linked to the frequency of the VCO oscillation signal. The VCO 32 outputs the determined excitation pulse S1 to the resonant sensor 4, the determined AD conversion clock S6 to the AD converter 22, and the determined FFT processing clock S6 to the FFT device 23.
[0077] As an example of frequency division, if the frequency of the determined VCO oscillation signal is f (Hz), the excitation pulse frequency is determined to be M × f (Hz), and the frequencies of the AD conversion clock and FFT processing clock are L × 2 N The frequency is determined to be ×f(Hz) (where M, L, and N are predetermined natural numbers). In this case, the ratio of the excitation pulse frequency to the AD conversion clock frequency and the FFT processing clock frequency is M:L×2 N This is the result.
[0078] When the phase difference is minimal (preferably zero), the VCO32 outputs the frequency of the excitation pulse at that point as the resonant frequency S7 of the resonant sensor 4.
[0079] When the frequency of the VCO oscillation signal is controlled as described above, the frequency of the excitation pulse follows the resonant frequency of the resonant sensor 4. With the DCO24 configuration described above, the master clock for the entire sensing sensor 1 is generated by a single DCO24, thus minimizing interference between clocks. As a result, the design of the LSI (Large Scale Integration) including the sensing sensor 1 becomes easier.
[0080] (Effects of the embodiment)
[0081] In the above embodiment, the I component, Q component, and resonant frequency can be obtained using only addition, subtraction, and constant multiplication. Constant multiplication can be achieved with practical accuracy using only a combination of shift operations and addition / subtraction. The two detection functions, consisting of the I component and Q component, are also performed using digital arithmetic processing, eliminating the DC offset problem and the need for matching between the two systems. A PLL for comparing phase components obtained by quadrature demodulation processing, a DDS and DA converter for driving the resonant sensor, and an LPF for the quadrature demodulator are unnecessary. Since the FFT device processes the two quadrature systems simultaneously and also acts as a BPF, a multiplier detector and LPF are unnecessary. Since the two quadrature systems are extracted using the same AD conversion and signal processing, inter-system matching is unnecessary. As a result, the hardware configuration for obtaining the I component and Q component from an analog signal whose output value fluctuates over time can be reduced.
[0082] Since the FFT device also functions as a BPF (Band-Pass Filter), a pre-demodulation BPF and a post-demodulation LPF (Low-Pass Filter) are unnecessary. Because the demodulation process is digital, data degradation does not occur even if the integration time is extended. Therefore, it is easy to improve noise immunity.
[0083] The required speed and accuracy for the AD converter can be kept low. Since the operating clock for each block is supplied from the DCO, single-chip integration is easy. Miniaturization, cost reduction, and low power consumption are possible while maintaining system performance. Because digital processing also handles detection, DC offset problems do not occur. Furthermore, high-speed decoding is possible because an LPF is not required.
[0084] The entire demodulation system, consisting of AD conversion and FFT processing, changes frequency in conjunction with a single DCO. Each component is controlled using only integer frequency division components, simplifying the design.
[0085] Since the DCO output is proportional to the resonant frequency, the optimal fixed-multiple sampling rate for the input waveform is maintained, resulting in fast and easy processing.
[0086] The ratio of the excitation pulse frequency to the AD conversion clock frequency and the FFT processing clock frequency is M:L × 2 N (M, L, and N are all natural numbers). By using this sampling ratio, calculation errors due to FFT processing are eliminated, making preprocessing such as window functions unnecessary, and enabling faster and smaller hardware.
[0087] (others)
[0088] The embodiments described above should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the foregoing description, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of symbols]
[0089] 1. Detection Sensor (Example of a detection sensor) 2. Analog signal processing equipment (an example of analog signal processing equipment) 3. Lock-in amplifier (an example of a lock-in amplifier) 4. Resonance Sensor (Example of Target Device) 21 Amplifier 22. Analog-to-Digital (AD) Converter (An example of an AD conversion means) 23. FFT (Fast Fourier Transform) apparatus (an example of FFT means and amplitude phase calculation means) 24. Digital Controlled Oscillator (DCO) (Example of Control Means) 25 Detection unit (an example of a detection unit) 30 Correction Circuit (An Example of Frequency Correction Method) 31. DA (Digital-to-Analog) Converter 32 Voltage-controlled oscillator (VCO) (Example of frequency divider and output means) 41. Oscillator (An example of an oscillator) 42 terminals 43 Support 44 Light Filters 45 Pulse application section 46 Vibration detection unit 451 Proximity electrode 461 Irradiation area 462 Impedance meter 463 Photodiode S1 Excitation pulse (an example of an excitation pulse) S2 Analog vibration signal (an example of an analog signal whose output value changes over time) S3 Amplified vibration signal S4 Digital Signal S5 Amplitude and Phase S6 AD (Analog-to-Digital) conversion clock and FFT (Fast Fourier Transform) processing clock S7 Resonant frequency of resonance sensor 4 S8 Film thickness of deposits S9 Component I and Component Q S11 frequency code S12 Analog frequency code
Claims
1. An analog signal processing device that acquires I (In-Phase) and Q (Quadrature) components from an analog signal whose output value changes over time, An analog-to-digital (AD) conversion means that acquires multiple input values from the analog signal and converts each of the multiple input values into each of the multiple digital input values, An analog signal processing device comprising: an FFT (Fast Fourier Transform) means for obtaining the I component and Q component from the plurality of digital input values converted by the AD conversion means.
2. The analog signal processing apparatus according to claim 1, further comprising amplitude-phase calculation means for calculating the amplitude and phase of the analog signal using the I component and Q component.
3. The AD conversion means identifies one period of the analog signal using an AD conversion clock, and acquires the multiple input values from the analog signal for one period at a timing based on the AD conversion clock. The FFT means performs FFT processing on the plurality of digital input values converted by the AD conversion means using an FFT processing clock having the same frequency as the AD conversion clock. The analog signal processing apparatus according to claim 2, wherein the AD conversion clock and the FFT processing clock are linked to a reference signal.
4. The analog signal processing device according to claim 3, The system includes control means for controlling the operation of a target device by outputting an excitation pulse to the target device, The aforementioned analog signal is a signal that indicates the operation of the target device, The control means is A frequency correction means for correcting the frequency of the reference signal so that the difference between the phase of the analog signal calculated by the amplitude-phase calculation means and the phase of the excitation pulse becomes small, A frequency divider means that determines the frequency of the excitation pulse, the frequency of the AD conversion clock, and the frequency of the FFT processing clock by dividing the frequency of the reference signal corrected by the frequency correction means, A lock-in amplifier including output means for outputting the excitation pulse, the AD conversion clock, and the FFT processing clock, respectively, to the target device, the AD conversion means, and the FFT means.
5. The ratio of the frequency of the excitation pulse to the frequency of the AD conversion clock and the frequency of the FFT processing clock is M:L × 2 N The lock-in amplifier according to claim 4, wherein each of M, L, and N is a natural number.
6. The lock-in amplifier according to claim 4, The aforementioned target device is provided, The aforementioned device includes an oscillator that performs vibration when the excitation pulse is input, A detection sensor further comprising a detection unit that detects the mass of an object attached to the oscillator based on the frequency of the excitation pulse when the difference between the phase of the analog signal calculated by the amplitude-phase calculation means and the phase of the excitation pulse is minimized.