Superconducting wiring substrates and superconducting quantum devices

Abstract

The objective is to suppress the indentation of the cover portion that seals the cavity inside the through-electrode in a superconducting wiring substrate. [Solution] The superconducting wiring substrate comprises a substrate in which through holes are formed, through electrodes of superconducting material formed on the inner wall surface of the through holes so as to form a cavity inside the through holes, a lid portion that closes the cavity opening to the surface of the substrate, and legs that support the lid portion from inside the through holes, wherein the thickness of the legs increases radially inward from the inside of the through holes toward the surface of the substrate.

Description

Technical Field

[0001] The present disclosure relates to a superconducting wiring board and a superconducting quantum device.

Background Art

[0002] It is known that superconducting quantum devices are used in quantum computers and the like. For example, in Patent Document 1, a substrate, a through-hole provided in the substrate, and an electrode provided in the through-hole, having a first portion and a second portion provided between the first portion and the inner wall surface of the through-hole, wherein the second portion is formed of a material containing a first metal that exhibits superconductivity at a temperature below a predetermined temperature, a through-electrode, and an electrode electrically connected to the through-electrode, at least a part of which is provided outside the through-hole and is formed of a material containing a second metal that exhibits superconductivity at a temperature below a predetermined temperature, a superconducting quantum device is disclosed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the superconducting quantum device disclosed in Patent Document 1, the inner part of the through-electrode is filled with a metal material. However, in this configuration, as the temperature changes, the metal material in the inner part undergoes volume fluctuations, and the superconducting quantum device is affected. Therefore, it has been devised to make the inner part of the through-electrode a cavity (see paragraph

[0050] of Patent Document 1). By the way, when the inner part of the through-electrode is made a cavity, it is necessary to close the opening of the cavity with a lid portion (for example, the above-mentioned bonding electrode, etc.) so that foreign substances and the like do not enter the cavity. However, since the mechanical strength decreases due to the presence of the cavity, there is a concern that the lid portion may sink into the cavity.

[0005] The purpose of this disclosure is to provide a superconducting wiring substrate and a superconducting quantum device that solve the above-mentioned problems. [Means for solving the problem]

[0006] To address the above issues, this disclosure proposes the following measures. The superconducting wiring substrate according to this disclosure comprises a substrate having through holes formed therein, through electrodes of a superconducting material formed on the inner wall surface of the through holes so as to form a cavity inside the through holes, a lid portion that closes the cavity opening to the surface of the substrate, and legs that support the lid portion from inside the through holes, wherein the thickness of the legs increases radially inward from the inside of the through holes toward the surface of the substrate.

[0007] Furthermore, the superconducting quantum device according to this disclosure comprises the superconducting wiring substrate and a quantum chip electrically connected to the superconducting wiring substrate. [Effects of the Invention]

[0008] According to the above disclosure, it is possible to suppress the collapse of the lid into the cavity. [Brief explanation of the drawing]

[0009] [Figure 1] This is an enlarged cross-sectional view of a key part of a superconducting wiring substrate according to a minimal configuration example of this disclosure. [Figure 2] This is a cross-sectional view of a superconducting wiring substrate according to a first embodiment of the present disclosure. [Figure 3] This is a cross-sectional view of a superconducting quantum device according to a first embodiment of the present disclosure. [Figure 4] This is a cross-sectional view showing an example of a method for manufacturing a superconducting wiring substrate according to the first embodiment of this disclosure. [Figure 5] This is a cross-sectional view showing an example of a method for manufacturing a superconducting wiring substrate according to the first embodiment of this disclosure. [Figure 6]This is a cross-sectional view showing an example of a method for manufacturing a superconducting wiring substrate according to the first embodiment of this disclosure. [Figure 7] This is a cross-sectional view of a superconducting wiring substrate according to a second embodiment of the present disclosure. [Figure 8] This is a cross-sectional view of a superconducting quantum device according to a third embodiment of the present disclosure. [Modes for carrying out the invention]

[0010] A minimum configuration example of this disclosure will be described with reference to Figure 1. Figure 1 is an enlarged cross-sectional view of a key part of a superconducting wiring substrate 1 according to a minimal configuration example of the present disclosure. The superconducting wiring substrate 1 comprises a substrate 10, through electrodes 20, and a first wiring layer 30. The substrate 10 is formed from an insulating material. The through electrodes 20 and the first wiring layer 30 are formed from a superconducting material.

[0011] A through-hole 11 is formed in the substrate 10. Hereinafter, the direction along the central axis O1 of the through-hole 11 will be referred to as the axial direction. Also, when viewed from the axial direction, the direction intersecting the central axis O1 will be referred to as the radial direction, and the direction revolving around the central axis O1 will be referred to as the circumferential direction. Furthermore, for the sake of explanation, the side of the substrate 10 facing the first main surface 10A in the axial direction will be referred to as the upper side, and the side opposite to the first main surface 10A (the side facing the second main surface 10B shown in Figure 2) will be referred to as the lower side. Note that the axial direction does not necessarily have to coincide with the direction of gravity.

[0012] The through electrode 20 is formed on the inner wall surface of the through hole 11. A cavity S1 is formed radially inside the through electrode 20. In other words, the through electrode 20 is formed in a cylindrical shape along the inner wall surface of the through hole 11. The first wiring layer 30 is formed on the first main surface 10A of the substrate 10. The first wiring layer 30 is electrically connected to the through electrode 20. In the example shown in Figure 1, the first wiring layer 30 and the through electrode 20 are formed from the same superconducting material, but they may be formed from different superconducting materials.

[0013] The first wiring layer 30 includes a lid portion 31 that closes a cavity S1 opening to the first main surface 10A of the substrate 10, and a leg portion 32 that supports the lid portion 31 from inside the through-hole 11. The lid portion 31 is disposed directly above the through-hole 11. The leg portion 32 has an increasing thickness toward the inner side in the radial direction of the through-hole 11 as it extends from inside the through-hole 11 toward the first main surface 10A of the substrate 10. That is, in the cross-sectional view shown in FIG. 1, when the lid portion 31 is assumed to be a bridge girder, the lid portion 31 is supported by the leg portion 32 of an arch-shaped pier that protrudes upward. It is preferable that the thickness of the leg portion 32 continuously increases as it goes upward. Note that the leg portion 32 is preferably formed in a triangular shape in cross-sectional view, with its hypotenuse facing the inner side in the radial direction of the through-hole 11, and the hypotenuse may have a curved shape concave toward the outer side in the radial direction.

[0014] According to the superconducting wiring substrate 1 described above, since the inner portion of the through electrode 20 can be formed as the cavity S1, it becomes difficult to be affected by volume fluctuations accompanying temperature changes. Further, by closing the opening of the cavity S1 with the lid portion 31, it is possible to prevent foreign matter and the like from entering the cavity S1. Further, by supporting the lid portion 31 with the leg portion 32 from inside the through-hole 11, it is possible to suppress the lid portion 31 from sinking into the cavity S1. Since the leg portion 32 has an increasing thickness toward the inner side in the radial direction of the through-hole 11 as it extends from inside the through-hole 11 toward the first main surface 10A of the substrate 10, it has high strength. Further, according to the superconducting quantum device including the superconducting wiring substrate 1, since it becomes difficult to be affected by volume fluctuations accompanying temperature changes, it is possible to suppress characteristic deviations from the design.

[0015] Next, in addition to FIG. 1, a first embodiment of the present disclosure will be described with reference to FIGS. 2 to 6. In FIGS. 2 to 6, the same reference numerals are given to the configurations common to FIG. 1 to simplify the description.

[0016] (First Embodiment) FIG. 2 is a cross-sectional view of the superconducting wiring substrate 1 according to the first embodiment of the present disclosure. As shown in FIG. 2, the superconducting wiring substrate 1 includes a substrate 10, a through electrode 20, a first wiring layer 30, an insulating layer 40, and a second wiring layer 50. The first wiring layer 30, the insulating layer 40, and the second wiring layer 50 are laminated in this order on each of the first main surface 10A side and the second main surface 10B side of the substrate 10.

[0017] As the substrate material of the substrate 10, an insulator material such as glass or a semiconductor material such as silicon is used. The thickness of the substrate 10 is, for example, 20 to 725 μm (micrometer).

[0018] The substrate 10 includes a first main surface 10A, a second main surface 10B facing the opposite side of the first main surface 10A, and a through hole 11 penetrating from the first main surface 10A to the second main surface 10B. The surfaces of the substrate 10 including the first main surface 10A, the second main surface 10B, and the through hole 11 are covered with an insulating film 10a such as silicon dioxide (SiO2). The thickness of the insulating film 10a is, for example, 0.05 to 1 μm (micrometer).

[0019] The through electrode 20 is formed on the insulating film 10a on the inner wall surface of the through hole 11. The through electrode 20 is formed to penetrate the substrate 10. One end of the through electrode 20 is electrically connected to the first wiring layer 30 provided on the first main surface 10A side of the substrate 10. The other end of the through electrode 20 is electrically connected to the first wiring layer 30 provided on the second main surface 10B side of the substrate 10.

[0020] A cavity S1 is formed inside the through electrode 20 in the radial direction. The through electrode 20 is formed in a cylindrical shape extending in the axial direction. The through electrode 20 is formed of a superconducting material different from that of the first wiring layer 30. Examples of the superconducting material of the through electrode 20 include titanium (Ti) and titanium nitride (TiN). The thickness of the through electrode 20 is, for example, 0.01 to 0.5 μm (micrometer).

[0021] The first wiring layer 30 is provided on the first main surface 10A and the second main surface 10B of the substrate 10 and is connected to the through-electrode 20. The first wiring layer 30 is formed of a superconducting material. Examples of the superconducting material for the first wiring layer 30 include aluminum (Al) and niobium (Nb). The thickness T1 of the first wiring layer 30 is, for example, 0.1 to 3 μm (micrometers). The first wiring layer 30 includes a lid portion 31 that closes a cavity S1 opening in the surface of the substrate 10 (first main surface 10A, second main surface 10B), and leg portions 32 that support the lid portion 31 from inside the through-hole 11.

[0022] The leg portion 32 is formed on the inner wall surface of the through electrode 20. The thickness of the leg portion 32 increases radially inward from the inside of the through hole 11 towards the surface of the substrate 10. The leg portion 32 is at its maximum thickness on the surface of the substrate 10 and is connected to the lower surface of the lid portion 31. Such a leg portion 32 has high strength and can suppress the sinking of the lid portion 31 into the cavity S1. In addition, this leg portion 32 has the effect of preventing disconnection at the opening edge (corner) of the cavity S1 of the first wiring layer 30.

[0023] The leg portion 32 is not formed in the axial intermediate portion M1 to which the central axis O1 of the through hole 11 extends. This configuration reduces the amount of material required to form the leg portion 32 and also widens the cavity S1. In the absence of the intermediate portion M1, the leg portion 32 on the first main surface 10A side and the leg portion 32 on the second main surface 10B side are connected within the through hole 11. In this case, since the leg portion 32 also serves as the through electrode 20, it is not necessary to provide a through electrode 20 made of a different superconducting material than the first wiring layer 30 (leg portion 32).

[0024] The lid portion 31 closes the cavity S1 that opens into the surface of the substrate 10 (first main surface 10A, second main surface 10B). The lid portion 31 and the leg portion 32 are formed integrally with the first wiring layer 30. The thickness T2 of the lid portion 31 is thinner than the thickness T1 of the first wiring layer 30. The difference between the thickness T2 of the lid portion 31 and the thickness T1 of the first wiring layer 30 is related to the volume of the leg portion 32. In other words, the thickness T2 of the lid portion 31 is thinner than the thickness T1 of the first wiring layer 30 by the volume of the leg portion 32 formed in the through hole 11.

[0025] The insulating layer 40 is laminated on the first wiring layer 30. The insulating layer 40 is made of an insulating material such as silicon dioxide (SiO2) or silicon nitride (SiN). The insulating layer 40 compensates for the thickness difference between the lid 31 and the first wiring layer 30. In other words, the surface of the insulating layer 40 facing away from the substrate 10 is flat. The thickness of the insulating layer 40 is, for example, 0.5 to 20 μm (micrometers), which is sufficiently thicker than the thickness T1 of the first wiring layer 30. Therefore, even if a part of the insulating layer 40 fits into a recess on the lid 31, the surface of the insulating layer 40 remains flat. Also, from the same viewpoint, the thickness of the insulating layer 40 is preferably in the range of 0.05 times or more to 0.5 times or less the diameter of the through hole 11. This reduces the impact on the surface flatness of the insulating layer 40 formed on top of the through hole 11, even when the diameter of the through hole 11 is large, while preventing the insulating layer 40 from becoming thicker than necessary.

[0026] The second wiring layer 50 is laminated on the insulating layer 40. Like the first wiring layer 30, the second wiring layer 50 is made of a superconducting material such as aluminum (Al) or niobium (Nb). The thickness of the second wiring layer 50 is, for example, 0.1 to 3 μm (micrometers). The insulating layer 40 has a second through-hole 41 that penetrates axially. The second wiring layer 50 is electrically connected to the first wiring layer 30 by a second through-electrode 51 formed on the inner wall surface of the second through-hole 41 in the insulating layer 40.

[0027] Figure 3 is a cross-sectional view of a superconducting quantum device 100 according to a first embodiment of the present disclosure. As shown in Figure 3, the superconducting quantum device 100 comprises the superconducting wiring substrate 1 described above and a quantum chip 101 electrically connected to the superconducting wiring substrate 1. A connecting electrode 60 for electrically connecting the quantum chip 101 is formed on the second wiring layer 50 on the first main surface 10A side (upper surface side).

[0028] The quantum chip 101 is equipped with a qubit circuit including a qubit device. The superconducting wiring substrate 1 functions as an interposer that transmits signals from the qubit device output from the quantum chip 101 from the first main surface 10A side of the substrate 10 to the second main surface 10B side. The quantum chip 101 is cooled, for example, via the interposer and maintained at a predetermined temperature (cryogenic temperature).

[0029] Next, the manufacturing method of the superconducting wiring substrate 1 will be described with reference to Figures 4 to 6. Figures 4 to 6 are cross-sectional views showing an example of a method for manufacturing a superconducting wiring substrate 1 according to the first embodiment of this disclosure. First, as shown in Figure 4(a), a silicon wafer to be used as the substrate 10 is supplied. Next, as shown in Figure 4(b), the surface of the substrate 10 is polished to form the first main surface 10A and the second main surface 10B.

[0030] Next, as shown in Figure 4(c), through holes 11 are formed in the substrate 10, penetrating from the first main surface 10A to the second main surface 10B. The through holes 11 can be formed, for example, by reactive ion etching (RIE). Next, as shown in Figure 4(d), an insulating film 10a is formed on the surface of the substrate 10. The insulating film 10a can be formed, for example, by thermal oxidation or chemical vapor deposition (CVD) of the substrate 10.

[0031] Next, as shown in Figure 5(a), a through electrode 20 is formed on the inner wall surface of the through hole 11. The through electrode 20 can be formed, for example, by sputtering. Next, as shown in Figure 5(b), a first wiring layer 30 is formed on the surface of the substrate 10 (first main surface 10A and second main surface 10B). The first wiring layer 30 can be formed, for example, by sputtering or laser deposition.

[0032] The portion of the first wiring layer 30 that closes the opening of the through hole 11 becomes the cover portion 31. The portion of the first wiring layer 30 that extends into the through hole 11 becomes the leg portion 32. As a result, a closed cavity S1 is formed inside the through hole 11. Next, as shown in Figure 5(c), an insulating layer 40 is laminated onto the first wiring layer 30. The insulating layer 40 can be formed, for example, by chemical vapor deposition (CVD).

[0033] Next, as shown in Figure 6(a), a second wiring layer 50 is laminated onto the insulating layer 40. The second wiring layer 50 can be formed, for example, by sputtering or laser deposition. Finally, as shown in Figure 6(b), a connecting electrode 60 is formed on the second wiring layer 50. The connecting electrode 60 can be formed, for example, by plating, sputtering or laser deposition. As described above, the superconducting wiring substrate 1 can be manufactured. Furthermore, since the insulating layer 40 is filled into the recess of the lid portion 31 of the first wiring layer 30, the surfaces of the insulating layer 40 and the second wiring layer 50 can be made flat, and the connecting electrodes 60 can be placed on the same plane, thus enabling good connection with the quantum chip 101. Specifically, as shown in Figures 3 and 6, even if the connecting electrodes 60 are near or directly above the lid portion 31, problems such as poor connection are less likely to occur. In addition, even if force is applied from the connecting electrodes 60 to the first wiring layer 30 or insulating layer 40 above the through hole 11 during mounting of the quantum chip 101, indentation of this portion is suppressed by the presence of the legs 32.

[0034] As described above, the superconducting wiring substrate 1 of this embodiment comprises a substrate 10 in which a through hole 11 is formed, a through electrode 20 made of superconducting material formed on the inner wall surface of the through hole 11 so as to form a cavity S1 inside the through hole 11, a lid portion 31 that closes the cavity S1 opening to the surface of the substrate 10 (first main surface 10A, second main surface 10B), and a leg portion 32 that supports the lid portion 31 from inside the through hole 11. The thickness of the leg portion 32 increases radially inward from the through hole 11 as it moves from inside the through hole 11 toward the surface of the substrate 10. With this configuration, the inner portion of the through electrode 20 can be made into a cavity S1, so the superconducting wiring substrate 1 is less susceptible to volume fluctuations due to temperature changes. In addition, by closing the opening of the cavity S1 with the lid portion 31, foreign matter can be prevented from entering the cavity S1. Furthermore, by supporting the lid portion 31 with the leg portion 32 from inside the through hole 11, the sinking of the lid portion 31 into the cavity S1 can be suppressed. The leg portion 32 has high strength because its thickness increases radially inward from the through hole 11 as it moves from inside the through hole 11 toward the first main surface 10A of the substrate 10.

[0035] Furthermore, in this embodiment, the substrate 10 is provided with a first wiring layer 30 (wiring layer) of superconducting material formed on its surface and electrically connected to the through-electrode 20, and the lid portion 31 and leg portion 32 are integrally formed with the first wiring layer 30. With this configuration, the connection area between the first wiring layer 30 and the through-electrode 20 is increased, and the risk of wire breakage can be kept low.

[0036] Furthermore, in this embodiment, the through-electrode 20 is formed from a different superconducting material than the leg portion 32. With this configuration, the through-electrode 20 can be formed in a separate process from the first wiring layer 30, and the transmission path from the first main surface 10A to the second main surface 10B of the substrate 10 can be reliably formed.

[0037] Furthermore, in this embodiment, the leg portion 32 is not formed in the axial intermediate portion M1 to which the central axis O1 of the through hole 11 extends. This configuration reduces the amount of material required to form the leg portion 32 and also widens the cavity S1.

[0038] Furthermore, in this embodiment, the thickness of the lid portion 31 is thinner than the thickness of the first wiring layer 30. With this configuration, as shown in Figure 5(b), the lid portion 31 and the leg portion 32 can be formed simultaneously with the formation of the first wiring layer 30 on the surface of the substrate 10. In addition, the lighter weight of the lid portion 31 prevents it from sinking into the cavity S1.

[0039] Furthermore, in this embodiment, an insulating layer 40 is laminated on the lid portion 31 and the first wiring layer 30 to compensate for the thickness difference between the lid portion 31 and the first wiring layer 30. With this configuration, the surface of the insulating layer 40 can be made flat, and the connecting electrodes 60 can be arranged on the same plane, making it easier to mount the quantum chip 101.

[0040] Furthermore, the superconducting quantum device 100 of this embodiment comprises a superconducting wiring substrate 1 and a quantum chip 101 electrically connected to the superconducting wiring substrate 1. With this configuration, the superconducting wiring substrate 1 is less susceptible to volume fluctuations due to temperature changes, thereby suppressing deviations from the design characteristics.

[0041] (Second Embodiment) Next, a second embodiment of the present disclosure will be described. In the following description, components identical or equivalent to those in the embodiments described above will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0042] Figure 7 is a cross-sectional view of a superconducting wiring substrate 1 according to a second embodiment of the present disclosure. As shown in Figure 7, the second embodiment differs from the above embodiment in that the insulating layer 40 comprises a lid portion 42 that closes the cavity S1 and leg portions 43 that support the lid portion 42 from inside the through hole 11.

[0043] In the second embodiment, the first wiring layer 30 has an opening 33 directly above the through hole 11. The insulating layer 40 includes a cover portion 42 that closes the opening 33 and a leg portion 43 that extends through the opening 33 toward the interior of the through hole 11. The leg portion 32 is formed on the inner wall surface of the through electrode 20 or on a portion of the first wiring layer 30 formed on the inner wall surface of the through electrode 20. The thickness of the leg portion 43 increases radially inward from the interior of the through hole 11 toward the surface of the substrate 10.

[0044] The cover portion 42 closes the opening 33 of the first wiring layer 30, thereby closing the cavity S1 that communicates with the opening 33. The cover portion 31 and the leg portion 32 are formed integrally with the insulating layer 40. The thickness of the cover portion 42 is the same as the thickness of the insulating layer 40. That is, because the insulating layer 40 has sufficient thickness, even if a part of it (the leg portion 43) enters the opening 33, the upper surface of the cover portion 42 will not be concave.

[0045] As described above, the second embodiment includes a first wiring layer 30 made of superconducting material formed on the surface of the substrate 10 and electrically connected to the through electrode 20, and an insulating layer 40 laminated on the first wiring layer 30. The first wiring layer 30 has an opening 33 directly above the through hole 11, and the insulating layer 40 has a lid portion 42 that closes the opening 33 and a leg portion 43 that passes through the opening 33 and extends toward the interior of the through hole 11. With this configuration, even if the diameter of the through hole 11 is large and the first wiring layer 30 cannot close the cavity S1, the through hole 11 can be closed by the insulating layer 40 which has sufficient thickness.

[0046] Furthermore, in this embodiment, the leg portion 43 is not formed in the axial intermediate portion M1 to which the central axis O1 of the through hole 11 extends. This configuration reduces the amount of material required to form the leg portion 43 and also widens the cavity S1.

[0047] (Third embodiment) Next, a third embodiment of the present disclosure will be described. In the following description, components identical or equivalent to those in the embodiments described above will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0048] Figure 8 is a cross-sectional view of a superconducting quantum device 100 according to a third embodiment of the present disclosure. As shown in Figure 8, the superconducting quantum device 100 comprises multiple superconducting wiring substrates 1. The multiple superconducting wiring substrates 1 are stacked. This configuration facilitates cooling of the quantum chip 101 via the superconducting wiring substrates 1 and connection to sockets (not shown), etc.

[0049] Although embodiments of this disclosure have been described in detail above with reference to the drawings, the specific configurations are not limited to these embodiments and include design modifications and the like that do not depart from the gist of this disclosure. Furthermore, each embodiment can be combined with other embodiments as appropriate.

[0050] Furthermore, some or all of the above embodiments may also be described as follows, but are not limited to the following.

[0051] (Note 1) A substrate with through holes formed therein, A through electrode made of superconducting material is formed on the inner wall surface of the through hole so as to form a cavity inside the through hole, A lid portion that closes the cavity opening on the surface of the substrate, The system includes legs that support the lid from inside the through hole, The thickness of the leg portion increases radially inward from the inside of the through hole toward the surface of the substrate. Superconducting wiring substrate.

[0052] (Note 2) The aforementioned leg portion is formed from the same superconducting material as the through electrode. The superconducting wiring substrate described in Appendix 1.

[0053] (Note 3) The leg portion is formed from a superconducting material different from the through electrode. The superconducting wiring substrate described in Appendix 1.

[0054] (Note 4) The aforementioned leg portion is not formed in the intermediate axial portion where the central axis of the through hole extends. A superconducting wiring substrate as described in any one of the appendices 1 to 3.

[0055] (Note 5) The substrate has a wiring layer made of superconducting material formed on its surface and electrically connected to the through-electrode, The lid and the legs are formed integrally with the wiring layer. A superconducting wiring substrate as described in any one of the appendices 1 to 4.

[0056] (Note 6) The thickness of the lid is thinner than the thickness of the wiring layer. The superconducting wiring substrate described in Appendix 5.

[0057] (Note 7) The lid and the wiring layer are laminated with an insulating layer that compensates for the difference in thickness between the lid and the wiring layer, The superconducting wiring substrate described in Appendix 6.

[0058] (Note 8) A wiring layer of superconducting material formed on the surface of the substrate and electrically connected to the through electrode, The wiring layer comprises an insulating layer laminated on the aforementioned wiring layer, The wiring layer has an opening directly above the through hole, The aforementioned insulating layer is The lid portion that closes the opening, The leg portion extends through the opening toward the interior of the through hole, A superconducting wiring substrate as described in any one of the appendices 1 through 7.

[0059] (Note 9) The aforementioned leg portion is not formed in the intermediate axial portion where the central axis of the through hole extends. The superconducting wiring substrate described in Appendix 8.

[0060] (Note 10) A superconducting wiring substrate described in any one of the appendices 1 to 9, The superconducting wiring substrate and the quantum chip electrically connected thereto Superconducting quantum devices. [Explanation of Symbols]

[0061] 1. Superconducting wiring substrate 10 circuit boards 10a insulating film 10A First main surface (front surface) 10B 2nd principal surface (front) 11 Through hole 20 Through electrode 30 1st wiring layer (wiring layer) 31 Lid 32 Legs 33 Opening 40 Insulating layer 41 Second through hole 42 Lid 43 Legs 50 2nd wiring layer 51 2nd through electrode 60 connecting electrodes 100 Superconducting Quantum Devices 101 Quantum Chips M1 Intermediate Section O1 center axis S1 cavity

Claims

1. A substrate with through holes formed therein, A through electrode made of superconducting material is formed on the inner wall surface of the through hole so as to form a cavity inside the through hole, A lid portion that closes the cavity opening on the surface of the substrate, The system includes legs that support the lid from inside the through hole, The thickness of the leg portion increases radially inward from the inside of the through hole toward the surface of the substrate. Superconducting wiring substrate.

2. The aforementioned leg portion is formed from the same superconducting material as the through electrode. The superconducting wiring substrate according to claim 1.

3. The leg portion is formed from a superconducting material different from the through electrode. The superconducting wiring substrate according to claim 1.

4. The aforementioned leg portion is not formed in the intermediate axial portion where the central axis of the through hole extends. The superconducting wiring substrate according to claim 3.

5. The substrate has a wiring layer made of superconducting material formed on its surface and electrically connected to the through-electrode, The lid and the legs are formed integrally with the wiring layer. A superconducting wiring substrate according to any one of claims 1 to 4.

6. The thickness of the lid is thinner than the thickness of the wiring layer. The superconducting wiring substrate according to claim 5.

7. The lid and the wiring layer are laminated with an insulating layer that compensates for the difference in thickness between the lid and the wiring layer, The superconducting wiring substrate according to claim 6.

8. A wiring layer of superconducting material formed on the surface of the substrate and electrically connected to the through electrode, The wiring layer comprises an insulating layer laminated on the aforementioned wiring layer, The wiring layer has an opening directly above the through hole, The aforementioned insulating layer is The lid portion that closes the opening, The leg portion extends through the opening toward the interior of the through hole, The superconducting wiring substrate according to claim 1.

9. The aforementioned leg portion is not formed in the intermediate axial portion where the central axis of the through hole extends. The superconducting wiring substrate according to claim 8.

10. A superconducting wiring substrate according to any one of claims 1 to 4, 8, or 9, The superconducting wiring substrate and the quantum chip electrically connected thereto Superconducting quantum devices.

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