Electronic equipment and anomaly detection method

Abstract

To provide an electronic device capable of detecting abnormalities in electronic devices. [Solution] The electronic device 1 comprises an analog-to-digital converter ADC, a digital-to-analog converter DAC, a reference signal generation unit Vref, and a control unit that controls the analog-to-digital converter ADC and the digital-to-analog converter DAC. The control unit performs a first determination process, a second determination process, and an abnormality determination process. The first determination process determines whether the first output value VO1 indicated by the first digital output signal VDO1 is within a predetermined range with respect to a reference value VR. The second determination process determines whether the second output value VO2 is within a predetermined range with respect to a second input value VI2. The abnormality determination process determines whether there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination process and the determination result in the second determination process.

Description

Technical Field

[0001] The present invention relates to an electronic device and an abnormality determination method.

Background Art

[0002] Conventionally, an electronic device may include an AD converter or a DA converter (for example, Patent Document 1). The analog input unit of Patent Document 1 includes an AD converter. The AD converter calculates the voltage value of the current supplied from the input terminal based on a reference voltage. Also, for a DA converter, it is often performed to convert an input digital signal into an analog signal (for example, an analog voltage or an analog current) based on a reference voltage.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, a reference voltage circuit that generates a reference voltage may deteriorate or fail over time. Also, when a reference voltage generation circuit that generates a reference voltage deteriorates (aging deterioration) or fails over time, an error occurs in the reference voltage of the AD converter and the DA converter, and there is a possibility that the AD converter and the DA converter do not output normal output values. Also, the AD converter and the DA converter themselves may deteriorate or fail over time. Such aging deterioration and failures of the reference voltage generation circuit, the AD converter, and the DA converter are difficult for the user to notice unless there are major aging deteriorations and failures such as not operating at all or having a large deviation in the output value, and the abnormality can only be confirmed at the opportunity of calibration or inspection.

[0005] The present invention aims to determine abnormalities in electronic devices. [Means for solving the problem]

[0006] The electronic device according to the present invention comprises an analog-to-digital converter that converts an analog signal to a digital signal, a digital-to-analog converter that converts a digital signal to an analog signal, a reference signal generation unit that generates a reference signal indicating a reference value, and a control unit that controls the analog-to-digital converter and the digital-to-analog converter, wherein the control unit performs a first determination process, a second determination process and an abnormality determination process, the first determination process is a process of inputting the reference signal to the analog-to-digital converter and controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range with respect to the reference value, and the second determination process The fixed process involves inputting a second digital input signal indicating a second input value to the digital-to-analog converter and controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter and controlling it to output a second digital output signal, and determining whether the second output value indicated by the second digital output signal is within a predetermined range with respect to the second input value. The abnormality determination process involves determining whether there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination process and the determination result in the second determination process.

[0007] An abnormality determination method according to the present invention is an abnormality determination method for an electronic device comprising an analog-to-digital converter that converts an analog signal to a digital signal, a digital-to-analog converter that converts a digital signal to an analog signal, and a reference signal generation unit that generates a reference signal indicating a reference value, comprising: a first determination step of inputting the reference signal to the analog-to-digital converter, controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range with respect to the reference value; a second determination step of inputting a second digital input signal indicating a second input value to the digital-to-analog converter, controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter, controlling it to output a second output value, and determining whether the second output value is within a predetermined range with respect to the second input value; and an abnormality determination step of determining whether there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit based on the determination result in the first determination step and the determination result in the second determination step. [Effects of the Invention]

[0008] According to the present invention, it is possible to determine abnormalities in electronic devices. [Brief explanation of the drawing]

[0009] [Figure 1] This is a block diagram of an electronic device according to Embodiment 1 of the present invention. [Figure 2] This is a block diagram of an electronic device according to Embodiment 1 of the present invention. [Figure 3] This is a block diagram of an electronic device according to Embodiment 1 of the present invention. [Figure 4] This table shows the results of the first and second decision processes. [Figure 5] This flowchart shows an example of a method for determining abnormalities in electronic equipment according to the embodiment. [Figure 6] This is a flowchart of the first determination process. [Figure 7]It is a flowchart showing the second determination step. [Figure 8] It is a flowchart showing an abnormality determination step. [Figure 9] It is a flowchart showing an abnormality determination step. [Figure 10] It is a table showing the results of the first determination process and the second determination process. [Figure 11] It is a block diagram of an electronic device according to Embodiment 3 of the present invention. [Figure 12] It is a block diagram of an electronic device according to Embodiment 3 of the present invention. [Figure 13] It is a block diagram of an electronic device according to Embodiment 3 of the present invention. [Figure 14] It is a table showing the results of the first determination process, the second determination process, the third determination process, and the fourth determination process. [Figure 15] It is a flowchart showing an example of an abnormality determination method for an electronic device according to the present embodiment. [Figure 16] It is a flowchart showing the third determination step. [Figure 17] It is a flowchart showing the fourth determination step. [Figure 18] It is a flowchart showing an abnormality determination step. [Figure 19] It is a flowchart showing an abnormality determination step. [Figure 20] It is a block diagram of an abnormality determination system according to Embodiment 4 of the present invention.

Embodiments for Carrying Out the Invention

[0010] Hereinafter, the electronic device according to the embodiment of the present invention will be described. In the following embodiments, the components and processing steps denoted by the same reference numerals are the same or corresponding ones, and the description thereof will not be repeated if not necessary.

[0011] [Embodiment 1] Referring to FIG. 1, the electronic device 1 according to Embodiment 1 of the present invention will be described. FIG. 1 is a block diagram of the electronic device 1 according to Embodiment 1 of the present invention.

[0012] As shown in FIG. 1, the electronic device 1 includes an AD converter ADC, a DA converter DAC, a reference voltage generation unit Vref, a microcontroller 10, an input unit 20, an input switching unit 25, an output unit 30, an output switching unit 35, and a communication unit 40. The AD converter ADC corresponds to an example of an "analog-to-digital converter". The DA converter DAC corresponds to an example of a "digital-to-analog converter". The microcontroller 10 corresponds to an example of a "control unit".

[0013] The electronic device 1 is, for example, a digital multimeter, an oscilloscope, a signal generator, a smartphone, a television, an audio device, and a digital camera.

[0014] The reference voltage generation unit Vref generates a reference voltage VR1. The reference voltage VR1 indicates a reference voltage value VR. In the present embodiment, the reference voltage value VR is, for example, 5V. That is, the reference voltage generation unit Vref generates a 5V voltage as the reference voltage VR1. The reference voltage generation unit Vref corresponds to an example of a "reference signal generation unit". The reference voltage value VR corresponds to an example of a "reference value". The reference voltage VR1 corresponds to an example of a "reference signal". The reference voltage generation unit Vref outputs a constant voltage. The reference voltage generation unit Vref includes, for example, a Zener diode. The reference voltage VR1 is input to the AD converter ADC and the DA converter DAC. The reference voltage VR1 is used as a reference voltage for conversion in the AD converter ADC and the DA converter DAC.

[0015] The AD converter ADC converts an analog signal into a digital signal. For example, the AD converter ADC converts an analog voltage into a digital voltage value.

[0016] A DA converter (DAC) converts digital signals into analog signals. For example, a DA converter converts a digital voltage value into an analog voltage.

[0017] The microcontroller 10 controls the AD converter (ADC) and the DA converter (DAC). The microcontroller 10 includes, for example, a processor such as a CPU (Central Processing Unit), and memory such as ROM (Read Only Memory) and RAM (Random Access Memory). The microcontroller 10 is connected to the AD converter (ADC) and the DA converter (DAC) in a way that enables communication. Specifically, the microcontroller 10 is connected to the AD converter (ADC) and the DA converter (DAC) in a way that enables communication, in accordance with standards such as UART (Unversal Asynchronous Receiver Transmitter).

[0018] The input unit 20 can accept input signals from external devices. The input unit 20 is, for example, an input port. The input signal can be, for example, an analog signal or a digital signal.

[0019] The input switching unit 25 switches the input source of the AD converter ADC. The input switching unit 25 is, for example, a switch. More specifically, the input switching unit 25 switches the input source of the AD converter ADC by being controlled by the microcontroller 10.

[0020] The output unit 30 can output an output signal to an external device. The output unit 30 is, for example, an output port. The output signal is, for example, an analog signal or a digital signal.

[0021] The output switching unit 35 switches the output destination of the DA converter DAC. The output switching unit 35 is, for example, a switch. More specifically, the output switching unit 35 switches the output destination of the DA converter DAC by being controlled by the microcontroller 10.

[0022] The communication unit 40 can communicate with external devices. The communication unit 40 transmits abnormality detection result information to the external devices. The abnormality detection result information indicates the result determined in the abnormality detection process. The abnormality detection process will be described later with reference to Figure 4.

[0023] The electronic device 1 is capable of determining whether there is a malfunction in at least one of the AD converter (ADC), the DA converter (DAC), and the reference voltage generation unit (Vref). More specifically, the malfunction determination method for the electronic device 1 includes a first determination step, a second determination step, and a malfunction determination step. When determining whether there is a malfunction in the electronic device 1, the microcontroller 10 performs the first determination process, the second determination process, and the malfunction determination process.

[0024] The microcontroller 10 is capable of switching operating modes. The operating modes include a normal mode and an abnormality detection mode. In normal mode, it operates normally. In this embodiment, in abnormality detection mode, it is determined whether there is an abnormality in at least one of the AD converter ADC, the DA converter DAC, and the reference voltage generation unit Vref. The microcontroller 10 switches the operating mode to abnormality detection mode, for example, by accepting user input. For example, when abnormality detection is completed in abnormality detection mode, the microcontroller 10 switches the operating mode back to normal mode. The microcontroller 10 may also periodically perform abnormality detection by periodically switching the operating mode from normal mode to abnormality detection mode.

[0025] As shown in Figure 1, when the operating mode is normal mode, the microcontroller 10 controls the output switching unit 35 so that the output destination of the DA converter DAC is the output unit 30. As a result, the output signal of the DA converter DAC is output from the output unit 30.

[0026] Furthermore, when the operating mode is normal mode, the microcontroller 10 controls the input switching unit 25 so that the input source for the AD converter ADC becomes the input unit 20. As a result, the input signal from the input unit 20 is input to the AD converter ADC.

[0027] The first determination process will be explained with reference to Figure 2. Figure 2 is a block diagram of an electronic device 1 according to Embodiment 1 of the present invention. Figure 2 shows the connection state of the input source of the AD converter ADC in the first determination process. In the first determination process, the determination process is performed by inputting the reference voltage VR1 to the AD converter ADC and performing a conversion.

[0028] As shown in Figure 2, when the operating mode is abnormal detection mode, the microcontroller 10 controls the first determination process to input the reference voltage VR1 to the AD converter ADC and output the first digital output signal VDO1. Specifically, when the operating mode is abnormal detection mode, the microcontroller 10 controls the input switching unit 25 in the first determination process so that the input source to the AD converter ADC becomes the reference voltage generation unit Vref. As a result, the reference voltage VR1 is input to the AD converter ADC, converted to a digital voltage value, and output.

[0029] Next, the microcontroller 10 determines whether the first output value VO1 is within a predetermined range relative to the reference voltage value VR. The first output value VO1 is the value indicated by the first digital output signal VDO1. In this embodiment, it is the digital voltage value converted by the AD converter ADC. For example, when the reference voltage value VR is 5V, if the first output value VO1 is between 4.7V and 5.3V, the microcontroller 10 determines that the result of the first determination process is "OK". On the other hand, if the first output value VO1 is outside the range of 4.7V and 5.3V, the microcontroller 10 determines that the result of the first determination process is "NG".

[0030] The second determination process will be explained with reference to Figure 3. Figure 3 is a block diagram of the electronic device 1 according to Embodiment 1 of the present invention. Figure 3 shows the connection state of the input source of the AD converter ADC in the second determination process. In the second determination process, the determination process is performed by inputting the output of the DA converter DAC to the AD converter ADC and converting it.

[0031] As shown in Figure 3, when the operating mode is abnormal detection mode, the microcontroller 10 controls the DA converter DAC to input a second digital input signal VDI2 indicating the second input value VI2 in the second detection process, and to output a second analog output signal VAO2. As a result, the digital voltage value is converted to an analog voltage and output. For example, the microcontroller 10 outputs a digital signal indicating a voltage value of 5V (second input value VI2) to the DA converter DAC. As a result, the 5V voltage value is converted to the DA converter DAC and a 5V analog voltage is output.

[0032] Next, the microcontroller 10 controls the AD converter ADC to input the second analog output signal VAO2 and output the second digital output signal VDO2. Specifically, when the operating mode is abnormal detection mode, the input switching unit 25 is controlled in the second detection process so that the input source of the AD converter ADC becomes the DA converter DAC. Similarly, when the operating mode is abnormal detection mode, the output switching unit 35 is controlled in the second detection process so that the output destination of the DA converter DAC becomes the AD converter ADC. As a result, the output of the DA converter DAC (second analog output signal VAO2) is input to the AD converter ADC, converted to a digital voltage value, and output.

[0033] Next, the microcontroller 10 determines whether the second output value VO2 is within a predetermined range relative to the second input value VI2. The second output value VO2 is the value indicated by the second digital output signal VDO2. In this embodiment, it is the digital voltage value converted by the AD converter ADC. For example, if the second input value VI2 is 5V, the microcontroller 10 determines that the result of the second determination process is "OK" if the second output value VO2 is between 4.7V and 5.3V. On the other hand, if the second output value VO2 is outside the range of 4.7V to 5.3V, the microcontroller 10 determines that the result of the second determination process is "NG".

[0034] In the abnormality detection process, the microcontroller 10 determines whether or not there is an abnormality in at least one of the AD converter ADC, DA converter DAC, and reference voltage generation unit Vref, based on the determination result in the first determination process and the determination result in the second determination process.

[0035] The abnormality detection process will be explained with reference to Figure 4. Figure 4 is a table showing the results of the first and second detection processes. In Figure 4, column R1 shows whether or not there is an abnormality in "Vref", "ADC", and "DAC". In column R1, "○" indicates no abnormality. In column R1, "×" indicates an abnormality. In other words, it indicates that there is a possibility that the component is faulty. Column R2 shows the detection results of the "first detection process" and the "second detection process".

[0036] As shown in Figure 4, in case No. 8, since "Vref", "ADC", and "DAC" are all functioning normally, the results of both the first and second judgment processes are "OK". Only in case No. 8 are the results of both the first and second judgment processes "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that "Vref", "ADC", and "DAC" are all functioning normally if the results of both the first and second judgment processes are "OK".

[0037] In case No. 4, only "Vref" is abnormal, so the result of the first judgment process is "NG" and the result of the second judgment process is "OK". Only in case No. 4 is the result of the first judgment process "NG" and the result of the second judgment process "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that only "Vref" is abnormal when the result of the first judgment process is "NG" and the result of the second judgment process is "OK".

[0038] In case No. 7, only the "DAC" is abnormal, so the result of the first judgment process is "OK" and the result of the second judgment process is "NG". Only in case No. 7 is the result of the first judgment process "OK" and the result of the second judgment process "NG". Therefore, in the abnormality detection process, the microcontroller 10 determines that only the "DAC" is abnormal if the result of the first judgment process is "OK" and the result of the second judgment process is "NG".

[0039] In cases No. 1 to No. 3 and No. 5 to No. 6, both the result of the first judgment process and the result of the second judgment process are "NG". In this case, the microcontroller 10 determines in the abnormality detection process that there is an abnormality in at least one of "Vref", "ADC", and "DAC".

[0040] As explained above with reference to Figure 4, in the abnormality detection process, the microcontroller 10 determines whether or not there is an abnormality in at least one of the AD converter ADC, DA converter DAC, and reference voltage generation unit Vref, based on the determination result in the first determination process and the determination result in the second determination process.

[0041] The abnormality detection method for the electronic device 1 according to this embodiment will be described with reference to Figures 5 to 9. Figure 5 is a flowchart of an example of the abnormality detection method for the electronic device 1 according to this embodiment. Figure 6 is a flowchart of the first detection step. Figure 7 is a flowchart of the second detection step. Figures 8 and 9 are flowcharts of the abnormality detection steps. An abnormality is detected by executing the processes from step S100 to step S500.

[0042] As shown in Figure 5, the abnormality detection method includes a first determination step (step S100), a second determination step (step S200), and an abnormality detection step (step S500).

[0043] Referring to Figure 6, the first determination step (step S100) will be explained.

[0044] In step S110, the microcontroller 10 inputs a reference signal (reference voltage VR1) to an analog-to-digital converter (AD converter ADC) and controls it to output a first digital output signal (VDO1). The process then proceeds to step S120.

[0045] In step S120, it is determined whether the first output value VO1 is within a predetermined range relative to the reference value VR. The first output value VO1 is the value indicated by the first digital output signal VDO1. The process ends.

[0046] Referring to Figure 7, the second determination process (step S200) will be explained.

[0047] In step S210, the microcontroller 10 controls the analog-to-digital converter (AD converter ADC) to input the second digital input signal VDI2 and output the second analog output signal VAO2. The second digital input signal (VDI2) represents the second input value (VI2), and the process proceeds to step S220.

[0048] In step S220, the microcontroller 10 controls the digital-to-analog converter (DA converter DAC) to input the second digital input signal VDI2 and output the second analog output signal VAO2. The second digital input signal VDI2 represents the second input value VI2, and the process proceeds to step S230.

[0049] In step S230, the microcontroller 10 determines whether the second output value VO2 is within a predetermined range relative to the second input value VI2. The second digital output signal VDO2 indicates the second output value VO2. The process ends.

[0050] The abnormality determination process (step S500) will be described with reference to Figures 8 and 9. In the abnormality determination process (step S500), the microcontroller 10 determines whether or not there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference voltage generation unit Vref, based on the determination result in the first determination process (step S100) and the determination result in the second determination process (step S200).

[0051] In step S510, the microcontroller 10 determines the results of the first and second judgment processes. If the microcontroller 10 determines that the result of both the first and second judgment processes is "OK", the process proceeds to step S520. If the microcontroller 10 determines that the result of both the first and second judgment processes is "NG", the process proceeds to step S530. If the microcontroller 10 determines that the result of both the first and second judgment processes is "OK", the process proceeds to step S540. If the microcontroller 10 determines that the result of both the first and second judgment processes is "NG", the process proceeds to step S550.

[0052] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "OK" and the result of the second judgment process is "OK", then in step S520, the microcontroller 10 determines that there are no abnormalities in the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference voltage generation unit Vref. The process then terminates.

[0053] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "NG" and the result of the second judgment process is "OK", then in step S530, the microcontroller 10 determines that there is an abnormality only in the reference voltage generation unit Vref. The process then ends.

[0054] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "OK" and the result of the second judgment process is "NG", then in step S540, the microcontroller 10 determines that there is a malfunction only in the digital-to-analog converter (DA converter DAC). The process then terminates.

[0055] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "NG" and the result of the second judgment process is "NG", then in step S550, the microcontroller 10 determines that there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference voltage generation unit Vref. The process then terminates.

[0056] As explained above with reference to Figures 1 to 9, in the electronic device 1, the control unit (microcontroller 10) performs a first determination process (step S100), a second determination process (step S200), and an abnormality determination process (step S500). The first determination process involves inputting a reference signal (reference voltage VR1) to an analog-to-digital converter (AD converter ADC), controlling it to output a first digital output signal VDO1, and determining whether the first output value VO1 indicated by the first digital output signal VDO1 is within a predetermined range relative to the reference value (reference voltage VR1). The second determination process involves inputting a second digital input signal VDI2, which indicates a second input value VI2, to a digital-to-analog converter (DA converter DAC) and controlling it to output a second analog output signal VAO2. The second analog output signal VAO2 is then input to an analog-to-digital converter (AD converter ADC) and controlled to output a second digital output signal VDO2. The process then determines whether the second output value VO2, indicated by the second digital output signal VDO2, is within a predetermined range relative to the second input value VI2. The abnormality determination process determines whether there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference signal generation unit Vref, based on the determination result in the first determination process and the determination result in the second determination process. Therefore, in the electronic device 1, in the abnormality determination process, the reference signal (reference voltage VR1) generated by the reference signal generation unit Vref and two voltage sources, the digital-to-analog converter DAC and the second analog output signal VAO2, are used as inputs to the analog-to-digital converter (AD converter ADC). As a result, an abnormality in the electronic device 1 can be determined. In detail, the system determines whether there is a malfunction in at least one of the analog-to-digital converter (AD converter ADC), digital-to-analog converter (DA converter DAC), and reference signal generation unit Vref of the electronic device 1. Furthermore, the location of the malfunction can be identified based on the result of the first and second determination processes. For example, if the result of the first determination process is "NG" and the result of the second determination process is "OK", it can be determined that there is a malfunction only in "Vref".Furthermore, for example, in an anomaly detection process, if the result of the first detection process is "OK" and the result of the second detection process is "NG", it can be determined that the anomaly is only in "DAC".

[0057] Furthermore, the control unit (microcontroller 10) is connected to the analog-to-digital converter (AD converter ADC) and the digital-to-analog converter (DA converter DAC) in a communicative manner. Therefore, it becomes easy to send and receive input and output signals of the control unit (microcontroller 10) to and from the analog-to-digital converter (AD converter ADC) and the digital-to-analog converter (DA converter DAC).

[0058] Furthermore, the electronic device 1 includes a communication unit 40. The communication unit 40 transmits abnormality determination result information to an external device. The abnormality determination result information indicates the result determined in the abnormality determination process. Therefore, a user can check whether or not there is an abnormality in the electronic device 1 via an external device.

[0059] Furthermore, the electronic device 1 includes an input unit 20 and an input switching unit 25. The input unit 20 can receive input signals from external devices. The input switching unit 25 switches the input source of the analog-to-digital converter (AD converter ADC). Therefore, the input source of the analog-to-digital converter (AD converter ADC) can be switched according to the operating mode. As a result, an input signal corresponding to the operating mode can be input to the analog-to-digital converter (AD converter ADC). Consequently, during normal operation, the electronic device 1 can be operated by inputting an input signal from the input unit 20, and during abnormality detection, an abnormality in the electronic device 1 can be detected.

[0060] Furthermore, the electronic device 1 includes an output unit 30 and an output switching unit 35. The output unit 30 can output an output signal to an external device. The output switching unit 35 switches the output destination of the digital-to-analog converter (DA converter DAC). Therefore, the output destination of the digital-to-analog converter (DA converter DAC) can be switched according to the operating mode. During normal operation, an output signal can be output from the output unit 30, and in the event of an abnormality detection, an abnormality in the electronic device 1 can be detected.

[0061] Furthermore, the abnormality detection method includes a first detection step (step S100), a second detection step (step S200), and an abnormality detection step (step S500). In the first detection step (step S100), a reference signal (reference voltage VR1) is input to an analog-to-digital converter (AD converter ADC), and it is controlled to output a first digital output signal VDO1. It is then determined whether the first output value VO1 indicated by the first digital output signal VDO1 is within a predetermined range relative to the reference value (reference voltage value VR1). In the second detection step, a second digital input signal VDI2 indicating a second input value VI2 is input to a digital-to-analog converter (DA converter DAC), and it is controlled to output a second analog output signal VAO2. The second analog output signal VAO2 is input to an analog-to-digital converter (AD converter ADC), and it is controlled to output a second output value VO2. It is then determined whether the second output value VO2 is within a predetermined range relative to the second input value VI2. In the abnormality detection process, it is determined whether there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), digital-to-analog converter (DA converter DAC), and reference signal generation unit Vref, based on the determination result in the first determination process and the determination result in the second determination process. As a result, an abnormality in the electronic device 1 can be determined. Specifically, it is determined whether there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), digital-to-analog converter (DA converter DAC), and reference signal generation unit Vref provided by the electronic device 1. Furthermore, the location of the abnormality can be identified based on the determination result in the first determination process and the determination result in the second determination process. For example, if the determination result in the first determination process is "NG" and the determination result in the second determination process is "OK", it can be determined that there is an abnormality only in "Vref". Also, for example, in the abnormality detection process, if the determination result in the first determination process is "OK" and the determination result in the second determination process is "NG", it can be determined that there is an abnormality only in "DAC".

[0062] [Embodiment 2] Referring to Figure 10, the electronic device 1 according to Embodiment 2 of the present invention will be described. Figure 10 is a table showing the results of the first and second determination processes. The electronic device 1 according to Embodiment 2 has the same configuration as the electronic device 1 according to Embodiment 1, except that in the second determination process, the microcontroller 10 determines whether the ratio of the multiple output values ​​is within a predetermined range, as the AD converter ADC outputs multiple signals. Therefore, the explanation of the overlapping parts will be omitted.

[0063] As in Embodiment 1, when the second determination process is based on the output result of a single voltage value (second output value VO2) output from the AD converter ADC, there is a possibility that the determined point may coincidentally result in an OK determination. Also, generally, the output results of the DA converter DA and the AD converter ADC exhibit linearity. Therefore, in this embodiment, the microcontroller 10 makes a determination in the second determination process based on the output results of multiple voltage values ​​(second output value VO2). Specifically, in this embodiment, the microcontroller 10 determines the linearity of the output results in the second determination process.

[0064] First, in the second determination process, the microcontroller 10 inputs multiple second digital input signals VDI2 to the DA converter DAC and controls it to output a second analog output signal VAO2 for each of the multiple second digital input signals VDI2. Each of the multiple second digital input signals VDI2 represents a second input value VI2. For example, the microcontroller 10 outputs digital signals to the DA converter DAC that represent voltage values ​​of 2.5V, 5V, and 10V (second input value VI2). As a result, the voltage values ​​of 2.5V, 5V, and 10V are converted to the DA converter DAC and output as analog voltages of 2.5V, 5V, and 10V.

[0065] Next, the microcontroller 10 controls the input of multiple second analog output signals VAO2 to the AD converter ADC, and outputs multiple second digital output signals VDO2. For example, the microcontroller 10 controls the input of multiple second analog output signals VAO2 to the AD converter ADC. As a result, the analog voltage is converted by the AD converter ADC and digital voltage values ​​of 2.5V, 5V, and 10V are output.

[0066] Next, the microcontroller 10 determines whether the ratio of the multiple second output values ​​VO2 is within a predetermined range with respect to the ratio of the multiple second input values ​​VI2. The multiple second output values ​​VO2 are the values ​​indicated by each of the multiple second digital output signals. For example, if there is no abnormality in the AD converter ADC and DA converter DAC, when 2.5V, 5V, and 10V are input as input voltage values, the output voltage values ​​will be 2.5V:5V:10V, that is, in a ratio of 1:2:4. Therefore, for example, if the multiple second input values ​​VI2 are "2.5V", "5V", and "10V", and the multiple second voltage values ​​(multiple second output values ​​VO2) are named VO21, VO22, and VO23 in ascending order, the microcontroller 10 determines whether the second voltage values ​​VO2 are within the range of 1:(1.8≦VO22≦2.2):(3.8≦VO23≦4.2). In other words, in this embodiment, the microcontroller 10 determines the linearity of the output result in the second determination process.

[0067] As explained above with reference to Figure 10, in the electronic device 1, the control unit (microcontroller 10) determines in the second determination process whether the ratio of the multiple second output values ​​(VO2) indicated by each of the multiple second digital signals is within a predetermined range with respect to the ratio of the multiple second input values ​​(VI2). In other words, the microcontroller 10 determines the linearity of the output result in the second determination process. Therefore, even if the determination result is by chance OK at a point determined by a single voltage value output from the AD converter (ADC) in the second determination process, it is possible to determine that there is an abnormality in the electronic device 1. As a result, abnormalities in the electronic device 1 can be determined with greater accuracy.

[0068] [Embodiment 3] Referring to Figure 11, the electronic device 1 according to Embodiment 3 of the present invention will be described. Figure 11 is a block diagram of the electronic device 1 according to Embodiment 3 of the present invention. The electronic device 1 according to Embodiment 3 has the same configuration as the electronic device 1 according to Embodiment 1 and Embodiment 2, except that the microcontroller 10 performs the third and fourth determination processes, so the explanation of the overlapping parts will be omitted.

[0069] As shown in Figure 11, the electronic device 1 includes an AD converter ADC, a DA converter DAC, a reference voltage generation unit Vref, a microcontroller 10, an input unit 20, an input switching unit 25, an output unit 30, an output switching unit 35, and a communication unit 40, in addition to an additional AD converter ADC2 and an additional output switching unit 60. The additional AD converter ADC2 corresponds to an example of an "additional analog-to-digital converter".

[0070] The additional AD converter ADC2 converts analog signals into digital signals. For example, the additional AD converter ADC2 converts an analog voltage into a digital voltage value. In this embodiment, the additional AD converter ADC2 is built into the microcontroller 10. However, the additional AD converter ADC2 does not necessarily have to be built into the microcontroller 10. The additional AD converter ADC2 may have the same number of digital bits as the AD converter ADC, or it may have a different number of bits.

[0071] The additional output switching unit 60 switches the output destinations of the input unit 20, output unit 30, DA converter DAC, and reference voltage generation unit Vref. The additional output switching unit 60 is, for example, a switch. More specifically, the output switching unit 35 is controlled by the microcontroller 10 to switch the output destinations of the input unit 20, output unit 30, DA converter DAC, and reference voltage generation unit Vref.

[0072] In this embodiment, the microcontroller 10 further executes a third determination process and a fourth determination process, in addition to the first determination process, the second determination process, and the abnormality determination process.

[0073] The third determination process will be explained with reference to Figure 12. Figure 12 is a block diagram of the electronic device 1 according to Embodiment 3 of the present invention. Figure 12 shows the connection state of the input source of the additional AD converter ADC2 in the third determination process. In the third determination process, the determination process is performed by inputting the reference voltage VR1 to the additional AD converter ADC2 and performing a conversion.

[0074] As shown in Figure 12, when the operating mode is abnormal detection mode, the microcontroller 10 controls the additional AD converter ADC2 in the third determination process to input the reference voltage VR1 and output the third digital output signal VDO3. Specifically, when the operating mode is abnormal detection mode, the microcontroller 10 controls the input switching unit 25 and the additional output switching unit 60 in the third determination process so that the input source of the additional AD converter ADC2 becomes the reference voltage generation unit Vref. As a result, the reference voltage VR1 is input to the additional AD converter ADC2, converted to a digital voltage value, and output.

[0075] Next, the microcontroller 10 determines whether the third output value VO3 is within a predetermined range relative to the reference voltage value VR. The third output value VO3 is the value indicated by the third digital output signal VDO3. In this embodiment, it is the digital voltage value converted by the additional AD converter ADC2. For example, if the reference voltage value VR1 is 5V, the microcontroller 10 determines that the result of the third determination process is "OK" if the third output value VO3 is between 4.7V and 5.3V. On the other hand, if the third output value VO3 is outside the range of 4.7V to 5.3V, the microcontroller 10 determines that the result of the third determination process is "NG".

[0076] The fourth determination process will be explained with reference to Figure 13. Figure 13 is a block diagram of the electronic device 1 according to Embodiment 3 of the present invention. Figure 13 shows the connection state of the input source of the additional AD converter ADC2 in the fourth determination process. In the fourth determination process, the determination process is performed by inputting the output of the DA converter DAC to the additional AD converter ADC2 and converting it.

[0077] As shown in Figure 13, when the operating mode is abnormal detection mode, the microcontroller 10 controls the DA converter DAC to input a fourth digital input signal VDI4 indicating the fourth input value VI4 in the fourth determination process, and to output a fourth analog output signal VAO4. As a result, the digital voltage value is converted to an analog voltage and output. For example, the microcontroller 10 outputs a digital signal to the DA converter DAC indicating a voltage value of 5V (fourth input value VI4). As a result, the 5V voltage value is converted to the DA converter DAC and a 5V analog voltage is output.

[0078] Next, the microcontroller 10 inputs the fourth analog output signal VAO4 to the additional AD converter ADC2 and controls it to output the fourth digital output signal VDO4. Specifically, when the operating mode is abnormality detection mode, in the fourth detection process, the output switching unit 35 and the additional output switching unit 60 are controlled so that the input source of the additional AD converter ADC2 becomes the DA converter DAC. As a result, the output of the DA converter DAC (fourth analog output signal VAO4) is input to the additional AD converter ADC2, converted to a digital voltage value, and output.

[0079] Next, the microcontroller 10 determines whether the fourth output value VO4 is within a predetermined range relative to the fourth input value VI4. The fourth output value VO4 is the value indicated by the fourth digital output signal VDO4. In this embodiment, it is the digital voltage value converted by the additional AD converter ADC2. For example, if the fourth input value VI4 is 5V, the microcontroller 10 determines that the result of the fourth determination process is "OK" if the fourth output value VO4 is between 4.7V and 5.3V. On the other hand, if the fourth output value VO4 is outside the range of 4.7V to 5.3V, the microcontroller 10 determines that the result of the fourth determination process is "NG".

[0080] In the abnormality detection process, the microcontroller 10 determines whether or not there is an abnormality in at least one of the AD converter ADC, DA converter DAC, and reference voltage generation unit Vref, based on the determination result in the first determination process, the determination result in the second determination process, the determination result in the third determination process, and the determination result in the fourth determination process.

[0081] The abnormality detection process will be explained with reference to Figure 14. Figure 14 is a table showing the results of the first, second, third, and fourth detection processes. In Figure 14, column R1 shows whether or not there is an abnormality in "Vref", "ADC", and "DAC". In column R1, "○" indicates no abnormality. In column R1, "×" indicates an abnormality. In other words, it indicates that there is a possibility that the component is faulty. Column R2 shows the results of the first, second, third, and fourth detection processes.

[0082] As shown in Figure 4, in case No. 8, since "Vref", "ADC", and "DAC" are all functioning normally, the judgment results of the first, second, third, and fourth judgment processes are all "OK". Only in case No. 8 are the judgment results of the first, second, third, and fourth judgment processes all "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that "Vref", "ADC", and "DAC" are all functioning normally if the judgment results of the first, second, third, and fourth judgment processes are all "OK".

[0083] In case No. 4, only "Vref" is abnormal, so the results of the first and third judgment processes are "NG", and the results of the second and fourth judgment processes are "OK". Only in case No. 4 are the results of the first and third judgment processes "NG", and the results of the second and fourth judgment processes "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that only "Vref" is abnormal if the results of the first and third judgment processes are "NG" and the results of the second and fourth judgment processes are "OK".

[0084] In case No. 7, only the "DAC" is abnormal, so the results of the first and third judgment processes are "OK", and the results of the second and fourth judgment processes are "NG". Only in case No. 7 are the results of the first and third judgment processes "OK", and the results of the second and fourth judgment processes "NG". Therefore, in the abnormality detection process, the microcontroller 10 determines that only the "DAC" is abnormal if the results of the first and third judgment processes are "OK", and the results of the second and fourth judgment processes are "NG".

[0085] In case No. 2, since "Vref" and "ADC" are abnormal, the results of the first, second, and third judgment processes are "NG", and only the result of the fourth judgment process is "OK". Only in case No. 2 are the results of the first, second, and third judgment processes "NG", and only the result of the fourth judgment process "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that there is an abnormality in "Vref" and "ADC" if the results of the first, second, and third judgment processes are "NG" and the result of the fourth judgment process is "OK".

[0086] In case No. 5, since the "ADC" and "DAC" are abnormal, the results of the first, second, and fourth judgment processes are "NG", and only the result of the third judgment process is "OK". Only in case No. 5 are the results of the first, second, and fourth judgment processes "NG", and only the result of the third judgment process "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that there is an abnormality in the "ADC" and "DAC" if the results of the first, second, and fourth judgment processes are "NG" and the result of the fourth judgment process is "OK".

[0087] In case No. 6, only the "ADC" is abnormal, so the results of the first and second judgment processes are "NG", and the results of the third and fourth judgment processes are "OK". Only in case No. 6 are the results of the first and second judgment processes "NG", and the results of the third and fourth judgment processes "OK". Therefore, in the abnormality detection process, the microcontroller 10 determines that only the "ADC" is abnormal if the results of the first and second judgment processes are "NG" and the results of the third and fourth judgment processes are "OK".

[0088] In case No. 1, since "Vref", "ADC", and "DAC" are all abnormal, the results of the first, second, third, and fourth judgment processes are all "NG". Similarly, in case No. 3, since "Vref" and "DAC" are both abnormal, the results of the first, second, third, and fourth judgment processes are all "NG". Only in cases No. 1 and No. 8 are the results of the first, second, third, and fourth judgment processes all "NG". Therefore, if the results of the first, second, third, and fourth judgment processes are all "NG", the microcontroller 10 determines that either "Vref", "ADC", and "DAC" are all abnormal, or that "Vref" and "DAC" are abnormal.

[0089] As explained above with reference to Figure 14, in the abnormality detection process, the microcontroller 10 determines whether or not there is an abnormality in at least one of the AD converter ADC, DA converter DAC, and reference voltage generation unit Vref, based on the determination result in the first determination process, the determination result in the second determination process, the determination result in the third determination process, and the determination result in the fourth determination process.

[0090] The abnormality determination method for the electronic device 1 according to this embodiment will be described with reference to Figures 15 to 19. Figure 15 is a flowchart showing an example of the abnormality determination method for the electronic device 1 according to this embodiment. Figure 16 is a flowchart of the third determination step. Figure 17 is a flowchart of the fourth determination step. Figures 18 and 19 are flowcharts of the abnormality determination steps. An abnormality determination is performed by executing the processes from step S100 to step S500a. The abnormality determination method for the electronic device 1 according to Embodiment 3 is the same as the abnormality determination method for the electronic device 1 according to Embodiment 1, except that it further includes a third determination step (step S300) and a fourth determination step (step S400), and in the abnormality determination step (step S500a), it is determined that there is an abnormality in at least one of the analog-to-digital converter (ADC), digital-to-analog converter (DAC), and reference signal generation unit (Vref) based on the determination result in the first determination process, the determination result in the second determination process, the determination result in the third determination process, and the determination result in the fourth determination process. Therefore, the explanation of the overlapping parts will be omitted.

[0091] As shown in Figure 15, the abnormality detection method includes a first determination step (step S100), a second determination step (step S200), a third determination step (step S300), a fourth determination step (step S400), and an abnormality detection step (step S500a). The first determination step (step S100) and the second determination step (step S200) are the same as the first determination step (step S100) and the second determination step (step S200) described in Embodiment 1 with reference to Figures 6 and 7.

[0092] Referring to Figure 16, the third determination step (step S300) will be explained.

[0093] In step S310, the microcontroller 10 inputs the reference signal (reference voltage VR1) to an additional analog-to-digital converter (additional AD converter ADC2) and controls it to output a third digital output signal (VDO3). The process then proceeds to step S320.

[0094] In step S320, it is determined whether the third output value VO3 is within a predetermined range relative to the reference value VR. The third output value VO3 is the value indicated by the third digital output signal VDO3. The process ends.

[0095] Referring to Figure 17, the fourth determination step (step S400) will be explained.

[0096] In step S410, the microcontroller 10 controls the digital-to-analog converter (DA converter DAC) to input the fourth digital input signal VDI4 and output the fourth analog output signal VAO4. The fourth digital input signal (VDI4) represents the fourth input value (VI4). The process then proceeds to step S420.

[0097] In step S420, the microcontroller 10 inputs the fourth analog output signal VAO4 to an additional analog-to-digital converter (additional AD converter ADC2) and controls it to output the fourth digital output signal VDO4. The process then proceeds to step S430.

[0098] In step S430, the microcontroller 10 determines whether the fourth output value VO4 is within a predetermined range relative to the fourth input value VI4. The fourth digital output signal VDO4 indicates the fourth output value VO4. The process ends.

[0099] The abnormality determination process (step S500a) will be described with reference to Figures 18 and 19. In the abnormality determination process (step S500a), the microcontroller 10 determines whether there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference voltage generation unit Vref, based on the determination result in the first determination process (step S100), the determination result in the second determination process (step S200), the determination result in the third determination process (step S300), and the determination result in the fourth determination process (step S400). The abnormality determination process (step S500a) according to Embodiment 2 is the same as the abnormality determination process (step S500) according to Embodiment 1, except that if the result of the first determination process is "NG" and the result of the second determination process is "NG", a determination is further made based on the result of the third determination process and the result of the fourth determination process, so the explanation of the overlapping parts will be omitted.

[0100] In step S510, the microcontroller 10 determines the results of the first and second judgment processes. If the microcontroller 10 determines that the result of both the first and second judgment processes is "OK", the process proceeds to step S520. If the microcontroller 10 determines that the result of both the first and second judgment processes is "NG", the process proceeds to step S530. If the microcontroller 10 determines that the result of both the first and second judgment processes is "OK", the process proceeds to step S540. If the microcontroller 10 determines that the result of both the first and second judgment processes is "NG", the process proceeds to step S560 as shown in Figure 19.

[0101] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "OK" and the result of the second judgment process is "OK", then in step S520, the microcontroller 10 determines that there are no abnormalities in the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference voltage generation unit Vref. The process then terminates.

[0102] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "NG" and the result of the second judgment process is "OK", then in step S530, the microcontroller 10 determines that there is an abnormality only in the reference voltage generation unit Vref. The process then ends.

[0103] In step S510, if the microcontroller 10 determines that the result of the first judgment process is "OK" and the result of the second judgment process is "NG", then in step S540, the microcontroller 10 determines that there is a malfunction only in the digital-to-analog converter (DA converter DAC). The process then terminates.

[0104] If, in step S510, the microcontroller 10 determines that the result of the first judgment process is "NG" and the result of the second judgment process is "NG", then in step S560 shown in Figure 19, the microcontroller 10 determines what the results of the third judgment process and the fourth judgment process are. If the microcontroller 10 determines that the result of the third judgment process is "OK" and the result of the fourth judgment process is "OK", the process proceeds to step S570. If the microcontroller 10 determines that the result of the third judgment process is "NG" and the result of the fourth judgment process is "OK", the process proceeds to step S580. If the microcontroller 10 determines that the result of the third judgment process is "OK" and the result of the fourth judgment process is "NG", the process proceeds to step S590. If the microcontroller 10 determines that the result of the third judgment process is "NG" and the result of the fourth judgment process is "NG", the process proceeds to step S595.

[0105] In step S560, if the microcontroller 10 determines that the result of the third judgment process is "OK" and the result of the fourth judgment process is "OK", then in step S570, the microcontroller 10 determines that there is a malfunction only in the analog-to-digital converter (AD converter ADC). The process then terminates.

[0106] In step S560, if the microcontroller 10 determines that the result of the third judgment process is "NG" and the result of the fourth judgment process is "OK", then in step S580, the microcontroller 10 determines that there is an abnormality in the reference voltage generation unit Vref and the analog-to-digital converter (AD converter ADC). The process ends.

[0107] In step S560, if the microcontroller 10 determines that the result of the third judgment process is "OK" and the result of the fourth judgment process is "NG", then in step S590, the microcontroller 10 determines that there is an abnormality in the analog-to-digital converter (AD converter ADC) and the digital-to-analog converter (DA converter DAC). The process then terminates.

[0108] In step S560, if the microcontroller 10 determines that the result of the third judgment process is "NG" and the result of the fourth judgment process is "NG", then in step S595, the microcontroller 10 determines that (a) there is a malfunction in all of the analog-to-digital converter (AD converter ADC), digital-to-analog converter (DA converter DAC), and reference voltage generation unit Vref, or (b) there is a malfunction in the reference voltage generation unit Vref and the digital-to-analog converter (DA converter DAC). The process ends.

[0109] As described above with reference to Figures 11 to 19, the electronic device 1 includes an additional analog-to-digital converter (additional AD converter ADC2). The control unit (microcontroller 10) further executes a third determination process (step S300) and a fourth determination process (step S400). The third determination process involves inputting a reference signal (reference voltage VR1) to the additional analog-to-digital converter (additional AD converter ADC2), controlling it to output a third digital output signal VDO3, and determining whether the third output value VO3 indicated by the third digital output signal VDO3 is within a predetermined range relative to the reference value (reference voltage value VR1). The fourth determination process involves inputting a fourth digital input signal VDI4, which represents the fourth input value VI4, to the digital-to-analog converter (DA converter DAC) and controlling it to output a fourth analog output signal VAO4. This signal is then input to an additional analog-to-digital converter ADC2 and controlled to output a fourth digital output signal VDO4. The process then determines whether the fourth output value VO4, represented by the fourth digital output signal VDO4, is within a predetermined range relative to the fourth input value VI4. In the abnormality determination process, the control unit (microcontroller 10) further determines, based on the determination result in the third determination process and the determination result in the fourth determination process, that there is an abnormality in at least one of the analog-to-digital converter (AD converter ADC), the digital-to-analog converter (DA converter DAC), and the reference signal generation unit Vref. Therefore, compared to the case where the abnormality determination process is performed based only on the first and second determination processes, the abnormality location of the electronic device 1 can be identified in a greater number of cases.

[0110] [Embodiment 4] Referring to Figure 20, the abnormality detection system 200 according to Embodiment 4 of the present invention will be described. Figure 20 is a block diagram of the abnormality detection system 200 according to Embodiment 4 of the present invention.

[0111] As shown in Figure 20, the anomaly detection system 200 comprises an electronic device 1 and a server 2. The electronic device 1 can communicate with the server 2 via a network N.

[0112] Electronic device 1 transmits, for example, abnormality detection result information to server 2. The abnormality detection result information indicates the result determined in the abnormality detection process. The abnormality detection result information includes, for example, information indicating whether or not there is an abnormality in the AD converter (ADC), DA converter (DAC), and reference voltage generation unit (Vref).

[0113] In embodiments 1 to 3, the abnormality detection process was performed by the microcontroller 10 of the electronic device 1, but the present invention is not limited thereto. For example, a server 2 may receive measurement results such as voltage values ​​from the electronic device 1, and the server 2 may perform abnormality detection processing based on the measurement results received from the electronic device 1. The server 2 may also be a cloud server located on the cloud. Alternatively, the measurement results such as voltage values ​​from the electronic device 1 may be stored on a storage medium such as an SD card, and a device different from the electronic device 1 (for example, a personal computer) may perform abnormality detection processing based on the measurement results stored on the storage medium.

[0114] In this embodiment as well, abnormalities in the electronic device 1 can be determined, similar to embodiments 1 to 3.

[0115] The embodiments of the present invention have been described above. The present invention is not limited to the embodiments described above, and various modifications, variations, and combinations are possible.

[0116] In embodiments 1 to 4, the reference value was the reference voltage value VR1, but the present invention is not limited thereto. For example, the reference value may be the current value.

[0117] In Embodiment 3, the third and fourth judgments were performed regardless of the results of the first and second judgments, but the present invention is not limited thereto. For example, if the first judgment is "NG" and the second judgment is "NG", the third and fourth judgments may be performed. In other words, if the first judgment is anything other than "NG" and the second judgment is anything other than "NG", the abnormality detection process may be terminated without performing the third and fourth judgments. This is because, in cases where the first judgment is anything other than "NG" and the second judgment is anything other than "NG", the abnormal location can be identified using only the results of the first and second judgments. By configuring it in this way, the processing time for the abnormality detection process can be shortened.

[0118] In embodiments 1 to 4, the electronic device 1 was equipped with an input unit 20 and an output unit 30, but the present invention is not limited thereto. The electronic device 1 may not have an output unit 30 and may only have an input unit 20.

[0119] In embodiments 1 to 4, the electronic device 1 was equipped with an input unit 20 and an output unit 30, but the present invention is not limited thereto. The electronic device 1 may not have an input unit 20 and may only have an output unit 30.

[0120] The following additional information is disclosed regarding the above embodiment.

[0121] (Note 1) An analog-to-digital converter that converts analog signals to digital signals, A digital-to-analog converter that converts digital signals to analog signals, A reference signal generation unit that generates a reference signal indicating a reference value, The analog-to-digital converter and the control unit that controls the digital-to-analog converter, Equipped with, The control unit performs a first determination process, a second determination process, and an abnormality determination process. The first determination process involves inputting the reference signal to the analog-to-digital converter, controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range relative to the reference value. The second determination process involves inputting a second digital input signal indicating a second input value to the digital-to-analog converter and controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter and controlling it to output a second digital output signal, and determining whether the second output value indicated by the second digital output signal is within a predetermined range with respect to the second input value. The abnormality determination process is a process that determines whether or not there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination process and the determination result in the second determination process, in an electronic device.

[0122] (Note 2) The electronic device as described in Appendix 1, wherein in the second determination process, the control unit inputs a plurality of second digital input signals, each indicating a second input value, to the digital-to-analog converter and controls it to output a second analog output signal for each of the plurality of second digital input signals, inputs the plurality of second analog output signals to the analog-to-digital converter and controls it to output a plurality of second digital output signals, and determines whether the ratio of a plurality of second output values ​​indicated by each of the plurality of second digital output signals is within a predetermined range with respect to the ratio of a plurality of second input values.

[0123] (Note 3) It also includes an additional analog-to-digital converter that converts analog signals to digital signals, The control unit further executes the third determination process and the fourth determination process, The third determination process involves inputting the reference signal to the additional analog-to-digital converter, controlling it to output a third digital output signal, and determining whether the third output value indicated by the third digital output signal is within a predetermined range relative to the reference value. The fourth determination process involves inputting a fourth digital input signal indicating a fourth input value to the digital-to-analog converter and controlling it to output a fourth analog output signal, inputting the fourth analog output signal to the additional analog-to-digital converter and controlling it to output a fourth digital output signal, and determining whether the fourth output value indicated by the fourth digital output signal is within a predetermined range with respect to the fourth input value. The electronic device according to Appendix 1 or Appendix 2, wherein in the abnormality determination process, the control unit further determines, based on the determination result in the third determination process and the determination result in the fourth determination process, that there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit.

[0124] (Note 4) The control unit comprises the analog-to-digital converter and an electronic device according to any one of the appendices 1 to 3, which is communicably connected to the digital-to-analog converter.

[0125] (Note 5) The electronic device according to any one of the appendices 1 to 4, further comprising a communication unit that transmits abnormality determination result information indicating the result determined in the abnormality determination process to an external device.

[0126] (Note 6) An input section that can accept input signals from external devices, The input switching unit for switching the input source of the analog-to-digital converter Furthermore, The control unit is capable of switching operating modes. The aforementioned operating mode is There is a normal mode for normal operation, and Anomaly detection mode for determining anomalies and Includes, The control unit, When the operating mode is the normal mode, the input switching unit is controlled so that the input source of the analog-to-digital converter becomes the input unit. If the operating mode is the abnormality determination mode, in the first determination process, the input switching unit is controlled so that the input source of the analog-to-digital converter becomes the reference signal generation unit. The electronic device according to any one of the appendices 1 to 5, wherein, when the operating mode is the abnormality determination mode, the input switching unit is controlled in the second determination process so that the input source of the analog-to-digital converter becomes the digital-to-analog converter.

[0127] (Note 7) An output section capable of outputting an output signal to an external device, The output switching unit switches the output destination of the digital-to-analog converter. Furthermore, The control unit is capable of switching operating modes. The aforementioned operating mode is There is a normal mode for normal operation, and Anomaly detection mode for determining anomalies and Includes, The control unit, When the operating mode is the normal mode, the output switching unit is controlled so that the output destination of the digital-to-analog converter (DAC) becomes the output unit. The electronic device according to any one of the appendices 1 to 6, wherein when the operating mode is the abnormality determination mode, the output switching unit is controlled so that the output destination of the digital-to-analog converter (DAC) becomes the analog-to-digital converter (ADC) when the second determination process is executed.

[0128] (Note 8) An abnormality detection method for electronic equipment comprising an analog-to-digital converter that converts an analog signal to a digital signal, a digital-to-analog converter that converts a digital signal to an analog signal, and a reference signal generation unit that generates a reference signal indicating a reference value, A first determination step involves inputting the reference signal to the analog-to-digital converter, controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range with respect to the reference value. A second determination step involves inputting a second digital input signal indicating a second input value to the digital-to-analog converter and controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter and controlling it to output a second output value, and determining whether the second output value is within a predetermined range with respect to the second input value. An abnormality determination step that determines whether or not there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination step and the determination result in the second determination step. An anomaly detection method that includes this. [Explanation of Symbols]

[0129] 1 Electronic equipment 10 Microcontroller (Control Unit) 20 Input section 25 Input switching section 30 Output section 35 Output switching section 40 Communications Department ADC (Analog-to-Digital Converter) ADC2 Additional AD Converter (Additional Analog-to-Digital Converter) DAC (Digital-to-Analog Converter) VAO2 Second Analog Output Signal VAO4 4th Analog Output Signal VDI2 2nd Digital Input Signal VDI4 4th Digital Input Signal VDO1 First Digital Output Signal VDO2 Second Digital Output Signal VDO3 Third Digital Output Signal VDO4 4th Digital Output Signal VI2 Second input value VI4 Fourth Input Value VO1 First output value VO2 Second Output Value VO3 3rd output value VO4 4th output value VR Reference Voltage Value (Reference Value) VR1 Reference voltage (reference signal) Vref reference signal generator

Claims

1. An analog-to-digital converter that converts analog signals to digital signals, A digital-to-analog converter that converts digital signals to analog signals, A reference signal generation unit that generates a reference signal indicating a reference value, The analog-to-digital converter and the control unit that controls the digital-to-analog converter, Equipped with, The control unit performs a first determination process, a second determination process, and an abnormality determination process. The first determination process involves inputting the reference signal to the analog-to-digital converter, controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range with respect to the reference value. The second determination process involves inputting a second digital input signal indicating a second input value to the digital-to-analog converter and controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter and controlling it to output a second digital output signal, and determining whether the second output value indicated by the second digital output signal is within a predetermined range with respect to the second input value. The abnormality determination process is a process that determines whether or not there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination process and the determination result in the second determination process, in an electronic device.

2. In the second determination process, the control unit inputs a plurality of second digital input signals, each indicating the second input value, to the digital-to-analog converter and controls it to output a second analog output signal for each of the plurality of second digital input signals, inputs the plurality of second analog output signals to the analog-to-digital converter and controls it to output a plurality of second digital output signals, and determines whether the ratio of the plurality of second output values ​​indicated by each of the plurality of second digital output signals is within a predetermined range with respect to the ratio of the plurality of second input values, as described in claim 1.

3. It also includes an additional analog-to-digital converter that converts analog signals to digital signals, The control unit further executes the third determination process and the fourth determination process, The third determination process involves inputting the reference signal to the additional analog-to-digital converter, controlling it to output a third digital output signal, and determining whether the third output value indicated by the third digital output signal is within a predetermined range with respect to the reference value. The fourth determination process involves inputting a fourth digital input signal indicating a fourth input value to the digital-to-analog converter and controlling it to output a fourth analog output signal, inputting the fourth analog output signal to the additional analog-to-digital converter and controlling it to output a fourth digital output signal, and determining whether the fourth output value indicated by the fourth digital output signal is within a predetermined range with respect to the fourth input value. The electronic device according to claim 1 or 2, wherein in the abnormality determination process, the control unit further determines, based on the determination result in the third determination process and the determination result in the fourth determination process, that there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit.

4. The electronic device according to claim 1 or 2, wherein the control unit is connected to the analog-to-digital converter and is communicatively connected to the digital-to-analog converter.

5. The electronic device according to claim 1 or 2, further comprising a communication unit that transmits abnormality determination result information indicating the result determined in the abnormality determination process to an external device.

6. An input section that can accept input signals from external devices, The input switching unit for switching the input source of the analog-to-digital converter Furthermore, The control unit is capable of switching operating modes. The aforementioned operating mode is There is a normal mode for normal operation, and Anomaly detection mode for determining anomalies and Includes, The control unit, When the operating mode is the normal mode, the input switching unit is controlled so that the input source of the analog-to-digital converter becomes the input unit. If the operating mode is the abnormality determination mode, in the first determination process, the input switching unit is controlled so that the input source of the analog-to-digital converter becomes the reference signal generation unit. The electronic device according to claim 1 or 2, wherein, in the second determination process, the input switching unit is controlled so that the input source of the analog-to-digital converter becomes the digital-to-analog converter when the operating mode is the abnormality determination mode.

7. An output section capable of outputting an output signal to an external device, The output switching unit switches the output destination of the digital-to-analog converter. Furthermore, The control unit is capable of switching operating modes. The aforementioned operating mode is There is a normal mode for normal operation, and Anomaly detection mode for determining anomalies and Includes, The control unit, When the operating mode is the normal mode, the output switching unit is controlled so that the output destination of the digital-to-analog converter becomes the output unit. The electronic device according to claim 1 or 2, wherein when the operating mode is the abnormality determination mode, the output switching unit is controlled so that the output destination of the digital-to-analog converter becomes the analog-to-digital converter when the second determination process is executed.

8. An abnormality detection method for electronic equipment comprising an analog-to-digital converter that converts an analog signal to a digital signal, a digital-to-analog converter that converts a digital signal to an analog signal, and a reference signal generation unit that generates a reference signal indicating a reference value, A first determination step involves inputting the reference signal to the analog-to-digital converter, controlling it to output a first digital output signal, and determining whether the first output value indicated by the first digital output signal is within a predetermined range with respect to the reference value. A second determination step involves inputting a second digital input signal indicating a second input value to the digital-to-analog converter and controlling it to output a second analog output signal, inputting the second analog output signal to the analog-to-digital converter and controlling it to output a second output value, and determining whether the second output value is within a predetermined range with respect to the second input value. An abnormality determination step, which determines whether or not there is an abnormality in at least one of the analog-to-digital converter, the digital-to-analog converter, and the reference signal generation unit, based on the determination result in the first determination step and the determination result in the second determination step, An anomaly detection method that includes this.

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