Manufacturing method of printed circuit boards

Abstract

To provide a method for manufacturing printed circuit boards that strengthens the adhesive strength between the conductor circuit and the resin insulating layer, enabling the formation of fine wiring and minute via conductor diameters. [Solution] A method for manufacturing a wiring board, comprising: forming a second resin insulating layer on a first resin insulating layer and a first conductor circuit formed on its upper surface; forming via conductor openings in the second resin insulating layer that reach the first conductor circuit by first irradiation with a CO2 laser; forming a seed layer on the via conductor openings and the second resin insulating layer by second irradiation of the interior thereof with a UV laser; forming a plurality of plating resists on the seed layer to form a recess for forming a second conductor circuit and a recess for forming a via conductor; forming a second conductor circuit in the recess for forming the second conductor circuit; forming via conductors in the recess for forming the via conductor to connect the first conductor circuit and the second conductor circuit; removing the plating resist from the seed layer to expose the second conductor circuit and the via conductor; and removing the seed layer from the second resin insulating layer.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a printed wiring board. More specifically, the present invention relates to a method for manufacturing a printed wiring board capable of improving the adhesive force between a conductor circuit and a resin insulating layer by reducing the water repellency of the upper surface of the resin insulating layer constituting the printed wiring board, and enabling formation of fine wiring.

Background Art

[0002] With the demand for higher wiring density, a wiring board with a small diameter via conductor is desired. As the diameter of the via conductor decreases, the defect rate of the substrate increases. One of the causes of the increase in the defect rate of the substrate is considered to be resin residues in the opening for the via conductor. The smaller the diameter of the opening for the via conductor, the more difficult it is to remove the resin residues at the bottom of the opening by wet desmear treatment with a potassium permanganate solution, when the treatment liquid does not enter the opening for the via conductor or when bubbles are formed in the opening. Resin residues at the bottom of the opening for the via conductor cause conduction failure. On the other hand, due to the reduction of the CTE of the interlayer insulating layer, the content of inorganic fillers in the interlayer insulating layer is increasing. For this reason, opening formation by laser is inhibited, and the amount of resin residues containing inorganic particles such as silica particles at the bottom of the opening for the via conductor increases. Resin residues containing inorganic particles such as silica particles at the bottom of the opening for the via conductor cause conduction failure.

[0003] From such a technical perspective, a method for manufacturing a printed wiring board has been proposed that can remove resin residues in the opening for conduction through a small-diameter via conductor and form a via conductor with high connection reliability. This method for manufacturing a printed wiring board includes forming an interlayer insulating layer on a conductor circuit, forming an opening for a via conductor by laser on the conductor circuit and within the interlayer insulating layer, plasma-treating the inside of the opening with a process gas containing a fluorovinyl ether-based gas, forming a conductor upper-layer circuit on the conductor on the interlayer insulating layer, and forming a via conductor in the opening (Patent Document 1).

[0004] Figure 3 is a block diagram showing the configuration of a plasma irradiation apparatus used in the manufacturing method of such printed circuit boards. As shown in Figure 3, the plasma irradiation apparatus 10 includes a gas introduction section 12, a gas diffusion section 16, and a discharge section 16 having electrodes 20A and 20K supported by a cooler 22. A process gas containing reactive gas and argon gas is sent below the discharge section 16 to generate plasma 26. The individual edge 300 is placed on an XY table 28, and the inside of the opening is cleaned by plasma desmearing for a certain period of time.

[0005] Here, the reactive gases included in the process gas are fluorovinyl ether-based gases having a double bond between two carbon atoms and a fluoroalkyl ether group. Examples of reactive gases include C3F6O (trifluoromethyltrifluorovinyl ether) and C5F 10 Examples include O (perfluoropropyl vinyl ether). Thus, the technology disclosed in Patent Document 1 includes forming an opening for a via conductor in an interlayer insulating layer formed on a conductive circuit using a laser, plasma treating the inside of the opening with a process gas containing a fluorine-containing gas, a fluorovinyl ether-based gas, forming a conductive circuit in the upper layer on the interlayer insulating layer, and forming a via conductor in the opening. In other words, the technology disclosed in Patent Document 1 uses a fluorine-containing gas as the desmear gas used for plasma treatment of the opening for the via conductor and the upper surface of the resin insulating layer. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2013-58698 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] However, the technology disclosed in Patent Document 1 uses a fluorine-containing gas as the desmear gas for plasma treatment of the via conductor openings and the upper surface of the resin insulating layer. Fluorine-containing gas has excellent water-repellent properties. Therefore, when a fluorine-containing gas is used to plasma treat the via conductor openings and the upper surface of the resin insulating layer, there is a problem in that the adhesive strength between the conductor circuit constituting the printed circuit board and the resin insulating layer decreases. Furthermore, the technology disclosed in Patent Document 1 has the drawback that the adhesive strength between the conductor circuit constituting the printed circuit board and the resin insulating layer is reduced, making it impossible to create a conductor circuit composed of fine wiring.

[0008] In other words, the technology disclosed in Patent Document 1 uses a process gas containing fluorine when desmearing the upper surface of the insulating resin layer to form openings for via conductors. As a result, the water-repellent properties of fluorine lead to a decrease in the adhesive strength between the conductor circuits constituting the printed circuit board and the resin insulating layer. Consequently, even if a printed circuit board is manufactured using the technology disclosed in Patent Document 1, it is not possible to manufacture a printed circuit board equipped with conductor circuits having miniaturized via conductors and finely detailed wiring. Furthermore, desmearing the upper surface of the insulating resin layer to form an opening for a via conductor results in a problem where the diameter of the opening for forming the via conductor becomes larger.

[0009] From this technical standpoint, the present invention aims to provide a method for manufacturing a printed wiring board that can strengthen the adhesive strength between the conductor circuit and the resin insulating layer by lowering the water repellency of the upper surface of the resin insulating layer constituting the printed wiring board, and that enables the formation of fine wiring. [Means for solving the problem]

[0010] A method for manufacturing a printed circuit board according to the present invention includes: preparing a first resin insulating layer; forming a first conductor circuit on the first resin insulating layer; forming a second resin insulating layer on the first resin insulating layer and on the first conductor circuit; forming via conductor openings in the second resin insulating layer that reach the first conductor circuit by first irradiation of the second resin insulating layer with a CO2 laser; second irradiation of the inside of the via conductor openings with a UV laser; forming a seed layer on the via conductor openings and the second resin insulating layer; forming a second conductor circuit formation recess and a via conductor formation recess by forming a plurality of plating resists on the via conductor openings and the second resin insulating layer on which the seed layer is formed; forming a second conductor circuit in the second conductor circuit formation recess and forming a via conductor in the via conductor formation recess for connecting the first conductor circuit and the second conductor circuit; exposing the second conductor circuit and the via conductor by removing the plating resist from the seed layer; and removing the seed layer from the second resin insulating layer. [Brief explanation of the drawing]

[0011] [Figure 1] This is a top view illustrating one embodiment of a printed circuit board manufactured according to the method for manufacturing a printed circuit board according to the present invention. [Figure 2A] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2B] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2C] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2D] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2E] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2F]It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2G] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2H] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2I] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2J] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2K] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2L] It is a cross-sectional view for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 3] It is a cross-sectional view for explaining a manufacturing process included in a method for manufacturing a conventional multilayer wiring board.

Mode for Carrying Out the Invention

[0012] <Regarding the Printed Wiring Board> An embodiment of a method for manufacturing a printed wiring board according to the present invention will be described with reference to the drawings. In the examples shown in FIGS. 1 to 2, the dimensions of each member, particularly the dimensions in the height direction, are described with dimensions different from the actual dimensions in order to better understand the features of the present invention.

[0013] FIG. 1 is a schematic diagram for explaining an embodiment of a printed wiring board manufactured by a method for manufacturing a printed wiring board according to the present invention. As shown in FIG. 1, a printed wiring board 100 manufactured by the method for manufacturing a printed wiring board according to the present invention includes a conductor circuit 102 and a resin insulating layer 101. The conductor circuit 102 included in the printed wiring board 100 is formed on the insulating layer surface 111 of the resin insulating layer 101. Note that, in addition to the conductor circuit 102, a ground layer (not shown) may be formed on the insulating layer surface 111 of the resin insulating layer 101. The ground layer may be formed along the conductor circuit 102 and is formed so as not to be electrically connected to the conductor circuit 102.

[0014] The printed wiring board 100 may be a printed wiring board with a core, in which the conductor circuit 102 and the resin insulating layer 101 are alternately laminated on one side or both sides of a core substrate (not shown). When forming the conductor circuits 102 on both sides of the core substrate, the opposing conductor circuits 102 may be connected via a through-hole conductor (not shown) through the core substrate. Also, the printed wiring board 100 may be a coreless printed wiring board formed by alternately laminating the conductor circuit 102 and the resin insulating layer 101 on a support plate (not shown) and then removing the support plate.

[0015] In the printed wiring board 100, a plurality of other conductor circuits 102 and resin insulating layers 101 may be alternately provided on the upper layer of the resin insulating layer 101. That is, the printed wiring board 100 may be a multilayer printed wiring board. Specifically, the printed wiring board 100 may be a multilayer printed wiring board including a first conductor circuit 102A formed on the insulating layer surface 111A of the first resin insulating layer 101A which is the resin insulating layer 101, and a second conductor circuit 102B formed on the insulating layer surface 111B of the second resin insulating layer 101B covering the first resin insulating layer 101A and the first conductor circuit 102A.

[0016] In such a printed wiring board 100, the first conductor circuit 102A and the second conductor circuit 102B, which are two conductor circuits 102 formed sandwiching the second resin insulating layer 101B, are electrically connected via a via conductor 103. The via conductor 103 is formed in a via conductor opening 104 having an opening wall surface 141 with reduced water repellency of the second resin insulating layer 101B formed on the upper surface of the first conductor circuit 102A.

[0017] Furthermore, a solder resist layer (not shown) may be formed on the outermost layer of the printed circuit board 100. Solder resist openings (not shown) are formed in the solder resist layer that reach the upper surface of the second conductor circuit 102B located on the outermost layer, and solder bumps (not shown) may be formed on the upper surface of the second conductor circuit 102B that is exposed at the bottom of the solder resist openings and located on the outermost layer.

[0018] The first resin insulating layer 101A and the second resin insulating layer 101B can be made of, for example, a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin. The first conductor circuit 102A formed on the upper surface of the first resin insulating layer 101A, the second conductor circuit 102B formed on the upper surface of the second resin insulating layer 101B, and the via conductor 103 may be made of an electrolytic copper plating layer formed by, for example, a well-known semi-additive method.

[0019] The printed circuit board 100 manufactured by the method for manufacturing printed circuit boards according to the present invention has technical features in that the adhesive force between the resin insulating layer 101 and the conductor circuit 102 and via conductor 103 is strengthened, the conductor circuit 102 is formed from fine wiring, and the via conductor 103 is formed from via conductors 103 with a minute diameter.

[0020] The printed circuit board 100 comprises a resin insulating layer 101 having an upper surface with reduced water repellency, and via conductor openings 104 formed in the resin insulating layer 101 with reduced water repellency. By providing the printed circuit board 100 with a resin insulating layer 101 having an upper surface with reduced water repellency, the adhesive force between the resin insulating layer 101 and the conductor circuit 102 formed on the upper surface of the resin insulating layer 101 can be strengthened. Furthermore, by providing via conductor openings 104 in the resin insulating layer 101 with reduced water repellency, the adhesion between the via conductor 103 formed in the via conductor openings 104 of the resin insulating layer 101 and the printed wiring board 100 can be strengthened.

[0021] As described later, the resin insulating layer 101 having an insulating layer surface 111 with reduced water repellency, and the via conductor opening 104 having an opening wall surface with reduced water repellency formed in the resin insulating layer 101, are formed by a two-stage process consisting of a first irradiation with a CO2 laser and a second irradiation with a UV laser, without using a fluorine-containing gas.

[0022] Thus, the printed circuit board 100 has enhanced adhesion between the conductor circuit 102 and the resin insulating layer 101 by reducing the water repellency of the upper surface of the resin insulating layer 101, and includes a conductor circuit 102 composed of fine wiring, and includes via conductors 103 having a minute via conductor diameter by reducing the water repellency of the opening wall surface 141 of the via conductor opening 104 of the resin insulating layer 101.

[0023] <Regarding the manufacturing method of printed circuit boards according to the present invention> Figures 2A to 2L are diagrams illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. Hereinafter, one embodiment of the method for manufacturing a printed circuit board according to the present invention will be described in order using Figures 2A to 2L.

[0024] Next, as shown in Figure 2A, a first resin insulating layer 101A is prepared, and a first conductor circuit 102A is formed on the first resin insulating layer 101A. In this way, a first resin insulating layer 101A with the first conductor circuit 102A formed on it is prepared. As mentioned above, the first resin insulating layer 101A may be a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin, and more specifically, it may be an electrical insulating material in which glass cloth is impregnated with an epoxy resin, a thermosetting resin such as bismaleimide triazine resin. The first conductor circuit 102A may be composed of an electrolytic copper plating layer formed by, for example, a well-known semi-additive method.

[0025] Next, as shown in Figure 2B, a second resin insulating layer 101B is formed on the first resin insulating layer 101A and the first conductor circuit 102A. That is, the second resin insulating layer 101B is prepared. The second resin insulating layer 101B is formed on the insulating layer surface 111A of the first resin insulating layer 101A and the conductor circuit surface of the first conductor circuit 102A, so as to cover the insulating layer surface 111A of the first resin insulating layer 101A and the first conductor circuit 102A. The second resin insulating layer 101B may be a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin, similar to the first resin insulating layer 101A.

[0026] Next, as shown in Figure 2C, a first irradiation of the second resin insulating layer 101B with a CO2 laser 142 forms a via conductor opening 104 that reaches the first conductor circuit 102A in the second resin insulating layer 101B. The via conductor opening 104 is formed by performing a first irradiation of the cured second resin insulating layer 101B with a CO2 laser 142. The first irradiation with the CO2 laser 142 is a process to form an opening wall surface 141 that will become the outer wall of the via conductor opening 104 formed in the second resin insulating layer 101B.

[0027] The wavelength of the CO2 laser 142 is 9.2 to 10.8 μm, centered around two wavelengths: 10.6 μm and 9.6 μm. The spot diameter of the first irradiation by the CO2 laser 142 is preferably 10 to 100 μm, as a smaller spot diameter allows for finer processing. In other words, the smaller the spot diameter of the first irradiation by the CO2 laser 142, the higher the power density of the CO2 laser 142 can be, and thus the more efficiently the via conductor opening 104 can be formed.

[0028] Furthermore, it is preferable that the spot diameter of the first irradiation by the CO2 laser 142 is larger than the spot diameter of the second irradiation by the UV laser performed after the processing with the CO2 laser 142. The output power of the CO2 laser 142 can be determined in relation to the spot diameter of the first irradiation by the CO2 laser 142, but it is preferably between 1.0 mW and 1000 mW. The composition of the carbon dioxide gas used as the medium for the CO2 laser 142 is not particularly limited, but for example, it may consist of 10-20 vol% carbon dioxide, 10-20 vol% nitrogen, 2-5 vol% hydrogen or xenon, and helium as the remaining component.

[0029] Next, as shown in Figure 2D, the opening wall surface 141 of the via conductor opening 104 formed in the second resin insulating layer 101B by the first irradiation with the CO2 laser 142 is subjected to a second irradiation with the UV laser 143. The second irradiation with the UV laser 143 is a treatment to form an interface necessary to strengthen the adhesion force with the seed layer formed in a later manufacturing process on the opening wall surface 141 of the via conductor opening 104 formed in the second resin insulating layer 101B. The wavelength of the UV laser 143 used for the second irradiation is 330 to 360 nm.

[0030] The spot diameter of the second irradiation by the UV laser 143 is preferably 1 to 20 μm. That is, the smaller the spot diameter of the second irradiation by the UV laser 143, the greater the power density of the UV laser 143 can be, so that the interface of the opening wall surface 141 of the via conductor opening 104 can be efficiently micro-machined. The spot diameter of the second irradiation by the UV laser 143 is set considering the spot diameter of the first irradiation by the CO2 laser 142, such that the spot diameter of the first irradiation by the CO2 laser 142 is smaller than the spot diameter of the second irradiation by the UV laser 143. The output power of the UV laser 143 can be determined in relation to the spot diameter of the second irradiation by the UV laser 143, but it is preferably between 0.1mW and 100mW.

[0031] As shown in Figure 2E, a second irradiation with the UV laser 143 may be performed regularly on the opening wall surface 141 of the via conductor opening 104. Specifically, it is preferable that the second irradiation with the UV laser 143 is performed by irradiating the center of the via conductor opening 104 and then irradiating along the opening wall surface 141 of the via conductor opening 104. That is, as a regular procedure for irradiating the opening wall surface 141 of the via conductor opening 104, for example, the second irradiation with the UV laser 143 may be performed as follows.

[0032] First, the second irradiation with UV laser 143 involves (I) irradiating the center of the via conductor opening 104 with UV laser 143a. Next, (II) irradiating the upper left wall surface of the opening wall surface 141 of the via conductor opening 104 with UV laser 143b. Furthermore, (III) a UV laser 143c is irradiated to process the upper right wall surface of the opening wall surface 141 of the via conductor opening 104. Finally, (IV) a UV laser 143z is irradiated to process the lower left wall surface of the opening wall surface 141 of the via conductor opening 104. By repeating the second irradiation with the UV laser 143 consisting of (I) to (IV) multiple times, the second irradiation with the UV laser 143 can be performed, and the opening wall surface 141 of the via conductor opening 104 can be processed.

[0033] Thus, the method for manufacturing a printed circuit board according to the present invention does not involve desmearing using a fluorine-containing gas to form via conductor openings 104 in the resin insulating layer 101. In other words, the method for manufacturing a printed circuit board according to the present invention does not use a fluorine-containing gas with excellent water repellency when forming the via conductor openings 104. As a result, the method for manufacturing a printed circuit board according to the present invention does not reduce the adhesive strength between the second conductor circuit 102B and the second resin insulating layer 101B, nor does it reduce the adhesive strength between the via conductor openings 104 formed in the second resin insulating layer 101B and the via conductor 103.

[0034] Furthermore, in the method for manufacturing a printed circuit board according to the present invention, when forming the via conductor openings 104, the spot diameter of the first irradiation by the CO2 laser 142 is set to be larger than the spot diameter of the second irradiation by the UV laser. Therefore, according to the method for manufacturing a printed circuit board according to the present invention, the size of the via conductor openings 104 does not expand in a plan view. As a result, the method for manufacturing a printed circuit board according to the present invention can manufacture a printed circuit board 100 having via conductors 103 with extremely small diameters.

[0035] Next, as shown in Figure 2F, an electroless copper plating layer is formed as a seed layer 105 on the opening wall surface 141 of the second resin insulating layer 101B in which the via conductor opening 104 is formed, and on the exposed surface of the second resin insulating layer 101B. The thickness of the electroless copper plating layer formed on the surface of the second resin insulating layer 101B is preferably 0.1 to 0.5 μm.

[0036] Next, as shown in Figure 2G, a photoresist layer 106 is formed on the via conductor opening 104 on which the seed layer 105 is formed and on the second resin insulating layer 101B. The photoresist layer 106 may be, for example, a positive-type photoresist layer. The positive-type photoresist layer is composed of a polymer, a photosensitive agent, a crosslinking agent, a solvent, etc. The polymer may be a polyhydrostyrene-based novolac resin, a polyacrylic-based novolac resin, or a polyhydrostyrene-polyacrylic-based novolac resin.

[0037] Next, as shown in Figure 2H, a photomask 107 is placed between the exposure source (not shown) and the photoresist layer 106, and exposure is performed from the exposure source onto the positive-type photoresist layer 106. The photomask 107 may be composed of a glass mask, emulsion mask, film mask, etc. The substrate used for the photomask 107 may be composed of soda lime (SL), quartz (Qz), or polyethylene terephthalate (PET).

[0038] Next, as shown in Figure 2I, by developing the photoresist layer 106, a plurality of plating resists 161, 162, 163, and 164 are formed on the surface of the seed layer 105 of the second resin insulating layer 101B. Adjacent plating resists 162 and 163 form via hole formation recesses 181, which are conductor layer formation recesses 108. Adjacent plating resists 161 and 162 form second conductor circuit formation recesses 182, which are conductor layer formation recesses 108. Adjacent plating resists 163 and 164 form second conductor circuit formation recesses 183, which are conductor layer formation recesses 108.

[0039] Next, as shown in Figure 2J, an electrolytic copper plating layer 109 is formed in the via hole forming recess 181, the second conductor circuit forming recess 182, and the second conductor circuit forming recess 183, which constitute the conductor layer forming recess 108. The thickness of the electrolytic copper plating layer 109 formed in these conductor layer forming recesses 108 is preferably 5 to 50 μm. Here, a direct current is used to deposit the electrolytic copper plating layer 109 that constitutes the second conductor circuit 102B and the via conductor 103. The current density of the direct current applied to form the electrolytic copper plating layer 109 is 1.0 to 10.0 A / dm². 2 It is preferable that this is the case. The time for applying the DC current used to deposit the electrolytic copper plating layer 109 is sufficient to form the predetermined thickness of the second conductor circuit 102B and the via conductor 103, and can be appropriately set depending on the required form of the electrolytic copper plating layer 109.

[0040] Next, as shown in Figure 2K, plating resists 161 to 164 are removed from the surface of the seed layer 105, for example, using a subtractive method. By removing the plating resists 161 to 164 from the surface of the seed layer 105, the seed layer surface 151 of the seed layer 105, which was located at the bottom of these plating resists, is exposed, and the electrolytic copper plating layer 109 that constitutes the second conductor circuit 102B and via conductor 103 is exposed from the seed layer surface 151 of the seed layer 105. Furthermore, the removal of plating resists 161 to 164 can be carried out, for example, using an alkaline aqueous solution.

[0041] Finally, as shown in Figure 2L, the seed layer 105 located at the bottom of the plating resists 161 to 164 is removed to form the second conductor circuit 102B and via conductor 103 on the insulating layer surface 111B of the second resin insulating layer 101B. The seed layer 105 can be removed by etching using an etching solution. Alternatively, the substrate on which the second conductor circuit 102B and via conductor 103 are formed on the second resin insulating layer 101B may be immersed in a dilute sulfuric acid aqueous solution for 10 seconds, rinsed with water, and then dried by air cutting.

[0042] In this way, a printed circuit board 100 is manufactured in which a first conductor circuit 101A is formed on a first resin insulating layer 101A, a second conductor circuit 102B is formed on a second resin insulating layer 101B that covers the first resin insulating layer 101A, and via conductors 103 for connecting the first conductor circuit 102A and the second conductor circuit 102B are formed. Furthermore, a solder resist layer (not shown) may be formed to cover the second resin insulating layer 101B, the second conductor circuit 102B, and the via conductor 103.

[0043] The solder resist layer may be formed by applying a commercially available solder resist composition to the upper surface of the second resin insulating layer 101B located in the uppermost layer, the second conductor circuit 102B, and the via conductor 103 to a predetermined thickness, and then drying the solder resist composition. Furthermore, solder resist openings may be formed in the solder resist layer, and then solder bumps may be formed in the solder resist openings to complete the printed circuit board 100.

[0044] Thus, according to the method for manufacturing printed circuit boards of the present invention, by performing a first irradiation with a CO2 laser and a second irradiation with a UV laser on the second resin insulating layer without using a fluorine-containing gas, the water repellency of the upper surface of the resin insulating layer constituting the printed circuit board can be reduced, thereby improving the adhesion between the conductor circuit and the resin insulating layer. As a result, the method for manufacturing printed circuit boards according to the present invention can improve the adhesive strength between the conductor circuit and the resin insulating layer, and can manufacture printed circuit boards that enable the formation of fine wiring. [Explanation of Symbols]

[0045] 100 Printed Wiring Boards 101 Resin insulating layer 101A First resin insulating layer 101B Second resin insulating layer 111A Insulating layer surface 111B Insulating layer surface 102 Conductor Circuit 102A First Conductor Circuit 102B Second Conductor Circuit 103 Via conductor 104 Via conductor opening 141 Opening wall surface 142 CO2 laser 143 UV laser 143a UV laser 143b UV laser 143c UV laser 143z UV laser 105 Seed Layer 151 Seed layer surface 106 Photoresist layer 161 Plating Resist 162 Plating Resist 163 Plating Resist 164 Plating Resist 107 Photomasks 108 Recess for forming conductor layer 181 Recess for forming via holes 182 Recess for forming the second conductor circuit (left side) 183 Recess for forming the second conductor circuit (right side) 109 Electrolytic copper plating layer

Claims

1. To prepare the first resin insulating layer, Forming a first conductor circuit on the first resin insulating layer, A second resin insulating layer is formed on the first resin insulating layer and on the first conductor circuit, CO ２ The first irradiation with a laser forms via conductor openings in the second resin insulating layer that reach the first conductor circuit, The interior of the via conductor opening is irradiated a second time with a UV laser, Forming a seed layer on the via conductor opening and the second resin insulating layer, The seed layer is formed on the via conductor opening and the second resin insulating layer, thereby forming a second conductor circuit recess and a via conductor recess. A second conductor circuit is formed in the recess for forming the second conductor circuit, and a via conductor is formed in the recess for forming the via conductor to connect the first conductor circuit and the second conductor circuit. By removing the plating resist from the seed layer, the second conductor circuit and the via conductor are exposed. A method for manufacturing a wiring board, comprising removing the seed layer from the second resin insulating layer.

2. The aforementioned CO ２ The method for manufacturing a printed circuit board according to claim 1, wherein the spot diameter of the first irradiation by the laser is larger than the spot diameter of the second irradiation by the UV laser.

3. The method for manufacturing a printed circuit board according to claim 1, wherein the second irradiation with the UV laser is performed by irradiating the center of the via conductor opening and then irradiating along the wall surface of the via conductor opening.

Images