Silicon parts for plasma etching equipment

Abstract

To provide a silicon component with a smooth surface that can more reliably suppress particle generation. [Solution] Made of polycrystalline silicon, having a first surface oriented towards the plasma region, at least the first surface has a difference of 60 nm or less between the maximum and minimum surface height measured within a 50 μm length range crossing the grain boundaries, the maximum value of the surface slope obtained from the maximum and minimum heights measured for each of the 50 μm length range divided into multiple sections is 2 nm / μm or less, and the arithmetic mean surface roughness Sm on the first surface is 30 nm or less.

Description

【Technical Field】 【0001】 The present invention relates to silicon components such as electrode plates, shower plates, and rings made of silicon used in plasma etching apparatuses. 【Background Art】 【0002】 In silicon electrode plates and the like used in plasma etching apparatuses, generation of particles in the plasma is suppressed by reducing the surface roughness. For example, Patent Document 1 discloses a plasma etching electrode plate made of silicon having a surface smoothness of Rmax 10 μm or less in a portion consumed by plasma. It is also described that the silicon used may be either single crystal or polycrystal. 【0003】 Further, Patent Document 2 also discloses a plasma etching electrode in which at least a portion consumed by plasma of a parallel plate type plasma etching electrode is formed of glassy carbon or metal silicon, and the surface roughness is Ra 0.001 to 0.015 μm and Rmax 0.01 to 0.15 μm. In this case, it is described that the metal silicon may be either single crystal or polycrystal. 【Prior Art Documents】 【Patent Documents】 【0004】 【Patent Document 1】 Japanese Patent Laid-Open No. 7-273094 【Patent Document 2】 Japanese Patent Laid-Open No. 2008-264952 【Summary of the Invention】 【Problems to be Solved by the Invention】 【0005】 However, merely controlling the surface roughness of silicon components as in these patent documents is still insufficient to suppress the generation of particles. In particular, when using polycrystalline silicon as a silicon component, grain boundaries exist in polycrystalline silicon, resulting in localized steps and slopes on the surface at these grain boundaries. Therefore, in terms of surface smoothness, it has not yet reached the point where it can replace single-crystal silicon. However, while single-crystal silicon is limited to circular shapes due to its manufacturing process, polycrystalline silicon can be manufactured in square shapes as well, offering an advantage in terms of product yield. For this reason, the use of polycrystalline silicon in silicon components is expected. On the other hand, with the increasing power output of plasma etching equipment, the environment is becoming more prone to particle generation, and the use of polycrystalline silicon requires even greater surface smoothness. 【0006】 This invention has been made in view of these circumstances, and aims to provide a silicon component made of polycrystalline silicon that has a smooth surface and can more reliably suppress the generation of particles. [Means for solving the problem] 【0007】 The silicon component for the plasma etching apparatus of the present invention is made of polycrystalline silicon and has a first surface facing the plasma region, and at least the first surface has a difference of 60 nm or less between the maximum and minimum height of the surface measured within a length of 50 μm crossing the grain boundaries, and the maximum value of the surface slope obtained from the maximum and minimum heights measured for each section when the length of 50 μm is divided into multiple sections is 2 nm / μm or less. 【0008】 By satisfying both conditions—that the difference between the maximum and minimum surface heights within a 50 μm length range caused by grain boundaries is 60 nm or less, and that the maximum surface gradient is 2 nm / μm or less—the surface of silicon components for plasma etching equipment becomes smooth, and particle generation during plasma etching can be suppressed. By setting a length of 50 μm across grain boundaries, grain boundaries are always included within that range. Therefore, the difference between the maximum and minimum heights between them, in other words, the step difference between crystal grains at the grain boundaries, was identified and controlled to be 60 nm or less. 【0009】 On the other hand, even if the difference (step) between the maximum and minimum heights within this 50 μm length is 60 nm or less, if there is a locally steep slope within that 50 μm length, there is a risk of particle generation in that steeply sloped area. Therefore, the 50 μm length was divided into multiple sections, and the maximum value of the slope measured was controlled to be 2 nm / μm or less. If the difference (step) between the maximum and minimum heights exceeds 60 nm, or if the maximum value of the slope exceeds 2 nm / μm, there is a risk of particle generation in either case. In this way, the silicon component for plasma etching apparatus of the present invention can achieve high smoothness at least on its first surface, and can suppress the generation of particles from the first surface that are directed towards the plasma region when used in a plasma etching apparatus. 【0010】 In the silicon component for the plasma etching apparatus of the present invention, it is preferable that the arithmetic mean surface roughness Sa on the first surface is 30 nm or less. 【0011】 Sa is the arithmetic mean roughness measured in the plane direction. In addition to the difference between the maximum and minimum heights and the maximum slope at the grain boundaries mentioned above, setting Sa to 30 nm or less can further reduce particle generation. 【0012】 The present invention relates to a method for manufacturing silicon components for a plasma etching apparatus, comprising a polishing step of supplying a slurry, which is a mixture of polishing liquid and abrasive grains, onto a rotating polishing pad, while pressing a plate-shaped member made of polycrystalline silicon against the polishing pad and polishing it, wherein the polishing liquid has a pH greater than 7 and less than or equal to 11 by adjusting the acid and alkali, and the average particle size of the abrasive grains is between 60 nm and 200 nm. 【0013】 In the case of single-crystal silicon, an alkaline aqueous solution is generally used as a polishing solution to polish the surface. Because it is a single crystal, it is etched uniformly in the plane direction. However, when the same alkaline aqueous solution is applied to polycrystalline silicon, each crystal is etched at a different etching rate, resulting in larger steps and slopes at the grain boundaries. 【0014】 The polishing solution used in this invention has its pH set to above 7 and below 11 by adjusting the acid and alkali, and polishes a plate-shaped member made of polycrystalline silicon with relatively large abrasive grains to reduce steps and slopes at the grain boundaries. If the pH of the polishing solution exceeds 11 and becomes strongly alkaline, steps and slopes in the plate-shaped member become larger due to anisotropic etching (which shows different etching rates depending on the crystal orientation). If the pH of the polishing solution is below 7, the etching effect is reduced, making it difficult to finish the plate-shaped member smoothly, and there is also a risk that scratches caused by mechanical polishing by the abrasive grains will remain on the plate-shaped member due to the reduced chemical polishing effect. On the other hand, abrasive grains with an average particle size of less than 60 nm have little effect in reducing steps and slopes at grain boundaries, and if they exceed 200 nm, polishing scratches are likely to occur on the plate-like material. [Effects of the Invention] 【0015】 According to the present invention, even though it is polycrystalline silicon, the step difference of the grain boundaries on the first surface facing the plasma region when used in a plasma etching apparatus is small, and the maximum value of the slope is also small. Therefore, the generation of particles from the first surface can be suppressed, and the quality of the plasma etching process can be improved. [Brief explanation of the drawing] 【0016】 [Figure 1] This is a schematic cross-sectional view showing an example of a plasma etching apparatus to which an embodiment of the silicon component of the present invention is applied. [Figure 2] This is a cross-sectional view showing an electrode plate as a silicon component in the embodiment. [Figure 3] Figure 2 is a schematic diagram illustrating the grain boundaries of the silicon component, where the black lines represent grain boundaries and the areas enclosed by the black lines represent crystal grains. [Figure 4] This flowchart shows an example of a manufacturing method for silicon components. [Figure 5] This is a schematic perspective view showing part of the polishing process. [Figure 6]It is a height profile diagram measured crossing the grain boundaries on the surface of a polycrystalline silicon substrate. 【Embodiments for Carrying Out the Invention】 【0017】 Hereinafter, embodiments of the present invention will be described with reference to the drawings. 【0018】 First, a plasma etching apparatus to which the present invention is applied will be described. As shown in FIG. 1, in the plasma etching apparatus 1, an electrode plate (upper electrode) 3 is provided above in a vacuum chamber 2, and a mount (lower electrode) 4 that can move up and down is provided below in parallel with the electrode plate 3 with an interval therebetween. In this case, the upper electrode plate 3 is fixed via an insulator 5 and is supported in an insulated state with respect to the wall of the vacuum chamber 2. 【0019】 Also, on the mount 4 which is the lower electrode, an electrostatic chuck 7 and a focus ring 8 surrounding the same are provided, and the wafer 9 is placed on the electrostatic chuck 7 in a state where the peripheral portion is supported by the focus ring 8. 【0020】 Also, an etching gas supply pipe 10 is provided above the vacuum chamber 2, and the etching gas sent from the etching gas supply pipe 10 flows toward the wafer 9 through the vent hole 12 provided in the electrode plate 3 after passing through the diffusion member 11, and is discharged to the outside from the discharge port 13 on the side of the vacuum chamber 2. On the other hand, a high-frequency voltage is applied between the electrode plate 3 and the mount 4 by a high-frequency power source 14. 【0021】 Furthermore, a cooling plate 15 made of aluminum or the like having excellent thermal conductivity is fixed to the back surface of the electrode plate 3. Through holes are formed in the cooling plate 15 at the same pitch as the vent holes 12 so as to communicate with the vent holes 12 of the electrode plate 3. Furthermore, in order to perform uniform etching of the wafer 9, the plasma generation region 17 is usually partially surrounded by the shield link 18 in order to concentrate the generated plasma in the center of the wafer 9 and suppress its diffusion to the outer periphery, thereby generating a uniform plasma between the electrode plate 3 and the wafer 9. 【0022】 In this embodiment of the plasma etching apparatus, the silicon components of the present invention include the electrode plate (also called a shower plate) 3, the focus ring 8, and the shield ring 18. Therefore, an embodiment of the present invention will be described using electrode plate 3 as an example. 【0023】 This electrode plate 3 is made of polycrystalline silicon, and as shown in Figure 2, a first surface 3a and a second surface 3b opposite to the first surface 3a are formed parallel to each other, and the outer peripheral surface 3c connecting the edges of the first surface 3a and the second surface 3b is formed in a cylindrical or rectangular shape (in other words, the first surface 3a and the second surface 3b are formed in a circular or rectangular shape, and the electrode plate 3 as a whole is a disc-shaped or rectangular plate-shaped substrate). 【0024】 The dimensions of this electrode plate 3 are not necessarily limited, but for example, it is formed with a thickness of 0.3 mm or more and 1.2 mm or less, and in the case of a disc shape, with a diameter of 200 mm or more and 430 mm or less, preferably 300 mm or more and 430 mm or less. 【0025】 In this electrode plate 3 made of polycrystalline silicon, if the first surface 3a is the surface facing the plasma region (the region where plasma discharge occurs) 17 (including the surface exposed to the plasma), then on this first surface 3a, the difference between the maximum and minimum heights of the surface (first surface) measured within a range of 50 μm in length (see the dashed line of length L1 in the schematic diagram of Figure 3) that crosses the grain boundaries of the polycrystalline silicon (hereinafter sometimes referred to as grain boundary step or simply step) is 60 nm or less, and the maximum value of the surface slope (hereinafter sometimes referred to as grain boundary slope or simply slope) obtained from the maximum and minimum heights measured for each section when the surface is divided into multiple sections within that 50 μm range is 2 nm / μm or less. 【0026】 In this case, the difference between the maximum and minimum surface heights and the maximum slope at the grain boundary can be measured, for example, using a laser microscope equipped with a white light interferometer (VK-X3000) manufactured by Keyence Corporation. The grain boundary of polycrystalline silicon is confirmed at 10x magnification using the laser microscope, and the surface height is measured in white light interferometry in the direction intersecting the grain boundary. In this case, a length of 50 μm is set within the field of view to ensure that the grain boundary is reliably included within the measurement range, and the surface in the 50 μm range intersecting the grain boundary is measured in white light interferometry. 【0027】 From the surface height profile obtained in a 50 μm length range, the maximum and minimum heights are measured, and the difference between them is calculated. Furthermore, the 50 μm range is divided into multiple sections, for example, 0 μm to 10 μm, 10 μm to 20 μm, and so on, into five sections of 10 μm length each. The maximum and minimum heights are measured for each section, and by dividing these measured values ​​by the length of the section (10 μm in this case), the slope of each section is calculated, and the maximum value of this is taken as the maximum surface slope. The length of the sections to be divided is not limited to 10 μm; it is sufficient if the 50 μm range can be divided into two or more sections, preferably three or more. For example, if the 50 μm range is divided into five sections, the maximum grain boundary slope in those five sections is 2 nm / μm or less. 【0028】 For example, Figure 6 is a profile diagram of the surface height measured with a laser microscope equipped with a white light interferometer. In all cases, the horizontal axis represents the length along the surface, with L1 indicating 50 μm and L2 indicating the length dividing the surface into five sections. The vertical axis represents the surface height, with H1 being the difference between the maximum and minimum heights within a 50 μm length range, H2 being the difference between the maximum and minimum heights of the section showing the maximum grain boundary slope, and H2 / L2 being the grain boundary slope. In the case shown in Figure (a), both the grain boundary step and the slope are smaller compared to the case shown in Figure (b). 【0029】 High smoothness of the first surface can be obtained and particle generation during plasma etching can be suppressed by satisfying both conditions: the difference H1 between the maximum and minimum surface heights within a 50 μm length range caused by grain boundaries is 60 nm or less, and the maximum value of the surface gradient H2 / L2 is 2 nm / μm or less. The difference between the maximum and minimum surface heights within a 50 μm length range represents the step difference between crystal grains at the grain boundaries, since the grain boundaries are included within that length range. If this difference (step difference) between the maximum and minimum heights within a 50 μm length range exceeds 60 nm, there is a risk of particle generation due to the large step difference. Preferably, the grain boundary step difference within a 50 μm length range is 20 nm or less, and more preferably 10 nm or less. 【0030】 On the other hand, even if the difference between the maximum and minimum heights of a surface within a 50 μm length is 60 nm or less, if there is a locally steep slope within that range, there is a risk of particle generation in the steeply sloped area. Therefore, the maximum value of the surface slope was controlled to be 2 nm / μm or less. If the difference between the maximum and minimum heights (step) exceeds 60 nm, or if the maximum value of the slope exceeds 2 nm / μm, there is a risk of particle generation in either case. The maximum value of this grain boundary gradient is preferably 1 nm / μm or less, and more preferably 0.2 nm / μm or less. 【0031】 Furthermore, it is preferable that the first surface 3a of the electrode plate 3 has an arithmetic mean surface roughness Sa in the planar direction of 30 nm or less. Unlike Ra, this arithmetic mean surface roughness Sa is the arithmetic mean roughness measured in the plane direction, and it increases as the volume ratio of areas with different heights relative to the reference plane (Z=0 plane) increases. In addition to the difference between the maximum and minimum heights and the slope at the grain boundaries mentioned above, a surface roughness Sa of 30 nm or less can further reduce particle generation. This arithmetic mean surface roughness Sa is preferably 15 nm or less, and more preferably 2 nm or less. 【0032】 In the above embodiment, the grain boundary step and grain boundary inclination, as well as the arithmetic mean surface roughness Sa, were specified for the first surface 3a of the electrode plate 3. However, the second surface 3b may also be formed with the same configuration as the first surface 3a. 【0033】 Next, we will explain how to manufacture this electrode plate (silicon component) 1. As shown in Figure 4, this electrode plate 3 is manufactured through an ingot manufacturing process in which a polycrystalline silicon ingot is produced by casting, a machining process in which the outer shape of the ingot is shaped and sliced ​​to form a plate-like member, a polishing process in which the surface of the plate-like member is polished, and a cleaning process in which the plate-like member is cleaned after polishing. The following describes the process in order. 【0034】 (Ingot manufacturing process) Polycrystalline silicon ingots can be produced by heating and melting silicon raw material in a crucible made of quartz or the like coated with a release agent, and then cooling and solidifying the silicon melt directly in the crucible, or by pouring the silicon melt from the crucible into a mold made of graphite or the like and cooling and solidifying it there. For example, chunks of high-purity silicon obtained by crushing are used as the silicon raw material, and dopants such as boron (B) are added as needed. Since it solidifies in a crucible or mold, the ingot can be formed not only in a cylindrical shape but also in other shapes such as a prismatic shape. 【0035】 (machining process) The ends of the ingot are cut off to shape the outer form, and the shaped ingot is then sliced ​​to a predetermined thickness using a wire saw or the like to form a plate-like member. This machining process produces a plate-like member with a thickness of, for example, 0.3 mm to 1.2 mm. Furthermore, if chipping or other damage occurs on the edges of the plate-shaped member after machining, etching with an alkaline aqueous solution may be used to remove the chipping or damage. 【0036】 (polishing process) In the polishing process, the surface of the sliced ​​plate-like material is roughly polished, followed by finish polishing. In rough polishing, a predetermined surface of a plate-shaped member (e.g., the surface corresponding to the first surface 3a of electrode plate 3) is polished by micro-grinding using polishing fluid and abrasive grains on a lapping machine. The abrasive grains used here are coarse, for example, with a particle size of several hundred μm. Dry rough polishing may also be performed by fixing the abrasive grains to the lapping machine without using polishing fluid. 【0037】 For the final polishing, a so-called CMP (Chemical Mechanical Polishing) apparatus is used. As shown in Figure 5, this CMP apparatus 20 has a head 22 that holds a plate-shaped member 21 made of polycrystalline silicon, and a polishing pad 23 that rotates horizontally. The plate-shaped member 21 is mounted horizontally on the head 22, the polishing pad 23 is rotated as indicated by arrow A, and a slurry of polishing liquid and abrasive grains is supplied onto the polishing pad 23 as indicated by arrow B, while the plate-shaped member 21 is pressed against the upper surface of the polishing pad 23 to perform polishing. The surface of the plate-shaped member 21 is polished by a chemical polishing action by dissolving with the polishing liquid and a mechanical polishing action by grinding with the abrasive grains. 【0038】 The polishing pad 23 used here is made of nonwoven fabric, polyurethane pad, etc., and abrasive grains made of, for example, SiO2 can be preferably used, but grains with an average particle size of 60 nm to 200 nm, which are larger than those used in ordinary CMP polishing (for example, with a particle size of 50 nm or less), are used. 【0039】 Polishing solutions are prepared by adjusting the acid and alkali to set the pH to be between 7 and 11. They are alkaline, and are prepared by adjusting the acid and alkali. Specifically, for example, they are prepared by adding weakly acidic citric acid to an aqueous solution of strongly alkaline potassium hydroxide (KOH), so that the potassium hydroxide (KOH) solution has a pH of approximately 9-11 (e.g., 9.5-10.5). If necessary, citric acid is added to adjust the pH to be between 7 and 11. 【0040】 By supplying a slurry, which is a mixture of these abrasive grains and polishing fluid, onto the polishing pad 23, and pressing the pre-rough-polished polycrystalline silicon plate-shaped member 22 against the rotating polishing pad 23, the mechanical action during polishing is improved mainly by the action of the larger particle size abrasive grains, thereby mitigating the steep slopes that occur at grain boundaries. On the other hand, the chemical action of the polishing fluid suppresses the progress of anisotropic etching between crystal grains, making it less likely for steps to occur at grain boundaries. 【0041】 Furthermore, by setting the average particle size of the abrasive grains to a relatively coarse size of 60 nm to 200 nm, the mechanical polishing action of the abrasive grains is enhanced, allowing for the removal of grain boundary steps and a smooth finish. If the average particle size of the abrasive grains is less than 60 nm, the effect of reducing steps and inclinations at the grain boundaries is poor, and if it exceeds 200 nm, polishing scratches are more likely to occur due to the reduced chemical polishing action of the polishing solution. The average particle size of these abrasive grains is preferably between 80 nm and 200 nm. 【0042】 By controlling these polishing fluids and abrasive grains, it is possible to obtain an electrode plate 3 in which the difference between the maximum and minimum surface heights measured within a 50 μm length range across the grain boundaries is 60 nm or less, and the maximum gradient within that 50 μm length range is 2 nm / μm or less. Furthermore, the arithmetic mean surface roughness Sa of the first surface 3a in the planar direction can be set to 30 nm or less. 【0043】 (Washing process) Finally, the polished plate-like material is washed with pure water to complete the desired electrode plate. 【0044】 The first surface 3a of the electrode plate 3 manufactured in this manner has a difference of 60 nm or less between the maximum and minimum surface heights measured within a 50 μm length range across the grain boundaries, and a maximum grain boundary slope of 2 nm / μm or less. Therefore, steps and slopes at the grain boundaries are small, and the generation of particles during plasma etching can be suppressed. In this case, particle generation can be further reduced if the arithmetic mean surface roughness Sa on the first surface 3a is 30 nm or less. 【0045】 In one embodiment, the present invention was shown applied to an electrode plate used in a plasma etching apparatus. However, it can also be applied to focus rings, shield rings, and various other silicon components used in plasma etching apparatuses. When applied to focus rings, shield rings, and various silicon components, the plate-like member in this embodiment can be shaped to match the applicable component. For example, when applied to a focus ring, a ring-shaped plate-like member can be used. 【0046】 As shown in Figure 1, a gap is formed between the shield ring 18 and the focus ring 8, and the plasma generated in the plasma generation region 17 is emitted from the gap. Therefore, it is desirable to apply the present invention to the outer surfaces of the shield ring 18 and the focus ring 8 that are exposed inside the chamber 2. In the present invention, the plasma region includes not only the plasma generation region 17 but also the region communicating with the plasma generation region 17. In the case of the shield ring 18 and the focus ring 8 shown in Figure 1, since they are formed in a stepped shape or have corners, the first surface facing the plasma region consists of multiple surfaces (for example, in Figure 1, as shown by extracting the shield ring 18 and the focus ring 8 into a circular dashed frame, all or part of the surfaces in the area indicated by the dashed line become the first surface). In either case, it is preferable to control the maximum values ​​of the grain boundary step and slope of at least the surface facing the plasma region (first surface), and the arithmetic mean surface roughness Sa, as described above. Furthermore, in addition to disc-shaped and annular silicon components, rectangular plate-shaped (square plate-shaped, polygonal plate-shaped) silicon components may also be rectangular frame-shaped. [Examples] 【0047】 For polycrystalline silicon plate-shaped members, multiple types of plate-shaped silicon parts were manufactured by changing the conditions of the finish polishing step (abrasive particle size, polishing solution pH) in the polishing process of the above manufacturing method. 【0048】 One side (first surface) of the silicon component was polished as follows. Two types of polishing solutions were used: one consisting of a potassium hydroxide aqueous solution adjusted to a pH of 9.5-10.5 by adding potassium hydroxide (KOH) to water, and another consisting of the same potassium hydroxide aqueous solution adjusted to a pH of 7.5-7.9 by adding citric acid. 【0049】 The abrasive grains used were made of SiO2 and had the average particle size shown in Table 1. These abrasive grains were mixed with the polishing solution at a concentration of 15% by mass to form a slurry. The polishing pad was made of nonwoven fabric and rotated at a rotational speed of 40 rpm to 60 rpm. While supplying slurry onto the pad, a plate-shaped polycrystalline silicon component was pressed against the polishing pad at a pressure of 2 MPa to 4 MPa to perform polishing. 【0050】 (Measurement of grain boundary step and grain boundary slope) The height of the polished surface of these silicon substrates was measured using a laser microscope equipped with a white light interferometer (VK-X3000) manufactured by Keyence Corporation, with the grain boundaries within the field of view, and the maximum values ​​of the grain boundary step and grain boundary slope were determined. The grain boundary step was defined by setting a 50 μm range that includes the grain boundary at any given grain boundary, intersecting the boundary, and measuring the difference between the highest measured value (maximum height) and the lowest measured value (minimum height). The maximum value of the slope at the grain boundary was also defined by setting a 50 μm range that includes the grain boundary at any given grain boundary, intersecting the boundary, measuring the maximum and minimum heights for each 9.7 μm interval, and calculating the slope for each interval by dividing the five obtained measured values ​​by 9.7 μm. The maximum value among these five values ​​was defined as the maximum surface slope. 【0051】 (Measurement of arithmetic mean roughness Ra) The surface roughness of the annular surface was measured using a contact-type surface roughness meter (SV-3200) manufactured by Mitutoyo Corporation. The arithmetic mean roughness Ra (JIS B0601:2013) was measured at six locations on the annular surface using the contact-type surface roughness meter, and the average of these measurements was calculated. Similarly, the arithmetic mean roughness Ra was measured at six locations on the second surface using the contact-type surface roughness meter, just as it was for the annular surface. For each sample, five measurements were taken at different locations to determine the grain boundary step, grain boundary slope, and arithmetic mean roughness Ra. The maximum values ​​are shown in the table. 【0052】 (Evaluation of particle count) Under the following conditions, etching gas was introduced from the upstream gas channel of the cooling plate through the gas channel of the electrode plate into the plasma generation region. Plasma was generated by applying a voltage, and wafer etching was performed continuously for 100 and 200 hours. The number of particles generated during this process was then confirmed. 【0053】 The conditions for plasma etching are as follows: Chamber pressure: 10 -1 Torr Etching gas composition: 90 sccm / CHF3 + 4 sccm / O2 + 150 sccm / He High-frequency power: 2kW Vacuum frequency: 20kCycle SCCM stands for standard cc / min, and refers to the flow rate (cc) per minute normalized at 3 atm (atmospheric pressure 1013 Pa) and a constant temperature such as 0°C or 25°C. 【0054】 The number of particles was counted using a microscope for particles with a diameter of 0.1 μm or larger that were attached to the silicon wafer. Samples with fewer than 50 particles during plasma etching were classified as A, those with 50 to less than 100 particles as B, and those with 100 or more particles as C. A rating of B or higher was considered a pass, and a rating of C was considered a fail. The results are shown in Table 1. 【0055】 [Table 1] 【0056】 In all of Examples 1 to 6, the step height at the grain boundaries on the surface was 60 nm or less, and the maximum grain boundary slope was 2 nm / μm or less. In both the 100-hour and 200-hour plasma etching treatments, the generation of particles was minimal. Furthermore, in all of these examples, Examples 3 to 6 had an arithmetic mean surface roughness Sa of 30 nm or less, indicating a smooth surface condition, resulting in even less particle generation and an "A" rating. In particular, Example 6, in which the pH of the polishing solution was 7.5 to 7.9 and the average particle size of the abrasive grains was 200 nm, showed small grain boundary steps, grain boundary inclination, and surface roughness Ra, resulting in an extremely smooth surface condition. 【0057】 In contrast, Comparative Examples 1-3 were polished using an alkaline polishing solution, but the average particle size of the abrasive grains was less than 60 nm in all cases. As a result, the grain boundary steps and inclinations were large, and a large amount of particles were generated. [Explanation of Symbols] 【0058】 1. Plasma etching apparatus 2. Vacuum Chamber 3. Electrode plate (upper electrode: silicon component) 3a Front page 3b Second side 4. Stand (lower electrode) 5. Insulator 6. Electrostatic Chuck 8 Focus Ring 9 wafers 10 Etching gas supply tube 11 Diffusion member 12 ventilation holes 13 Outlet 14 High frequency power supply 15 Cooling plate 16 Shield Rings

Claims

[Claim 1] A silicon component for a plasma etching apparatus, comprising polycrystalline silicon and having a first surface oriented toward the plasma region, wherein at least the first surface has a difference of 60 nm or less between the maximum and minimum surface heights measured within a 50 μm length range crossing grain boundaries, and the maximum value of the surface slope obtained from the maximum and minimum heights measured for each of the 50 μm length range divided into multiple sections is 2 nm / μm or less. [Claim 2] The silicon component for a plasma etching apparatus according to claim 1, characterized in that the arithmetic mean surface roughness Sa on the first surface is 30 nm or less. [Claim 3] A method for manufacturing silicon components for a plasma etching apparatus, comprising a polishing step of supplying a slurry, which is a mixture of polishing liquid and abrasive grains, onto a rotating polishing pad, while pressing a plate-shaped member made of polycrystalline silicon against the polishing pad to polish it, wherein the polishing liquid has a pH greater than 7 and less than or equal to 11, obtained by adjusting the acid and alkali, and the average particle size of the abrasive grains is 60 nm or more and less than or equal to 200 nm.

Images