Multilayer substrate

Abstract

To provide a multilayer substrate that can reduce the occurrence of mounting defects in electronic components. [Solution] The multilayer substrate 100 of the present invention includes first, second, third, and fourth conductive layers laminated with an insulating layer in between. The topmost first conductive layer has a plurality of lands 130R, 130G, 130B, and 130C formed thereon for soldering the R, G, B, and C (common) electrodes of the micro LED 80. The lands 130R, 130G, 130B, and 130C have the same planar shape. The lands 130G, 130G, 130B, and 130C are electrically connected to wiring patterns formed in the second to fourth conductive layers via conductive through-holes 140.

Description

Technical Field

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[0001] The present invention relates to a multilayer substrate for surface-mounting electronic components, and particularly to a multilayer substrate for surface-mounting micro LEDs.

Background Art

[0002] Micro LEDs that can directly display images from light-emitting diodes have been developed, and mounting micro LEDs on film-type substrates has been studied. For example, Patent Document 1 discloses a multilayer substrate for soldering electronic components based on mounting positioning marks formed on the surface.

[0003] In addition, when performing a solder reflow process on the surface of a substrate for an electronic component, a so-called Manhattan phenomenon is known, in which one electrode of the electronic component is soldered to a land, the other electrode floats up from the land, and the electrode of the lifted electronic component fails to be joined to the land. It is presumed that this phenomenon is caused by the melting of the solder occurring on one land side earlier than on the other land side, and the solidification of the solder occurring on one land side earlier than on the other land side, and at that time, a tensile force (moment) is applied to the electronic component due to the surface tension accompanying the solidification of the solder (Patent Document 2).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] Reflow soldering is a common method for soldering electronic components onto a circuit board. In reflow soldering, even if the electrodes 12 of the two terminals of an electronic component 10 (the electrodes are formed to extend from the bottom surface through the sides to the top surface) are mounted misaligned from the original component mounting position (land) 20, as shown in Figure 1(A), the surface tension of the solder guides them to the correct position, resulting in a self-alignment effect, as shown in Figure 1(B).

[0006] However, if the design of the component mounting land (footprint), the connection design of the wiring pattern, the type and amount of solder applied, the reflow temperature profile, and the condition of the component land (solder wettability, modification treatment) are inappropriate, even if the electronic component 10 is mounted in the correct position on the land 20, mounting defects such as misalignment or rotation of the electronic component 10 as shown in Figure 2(B), or rising edge of the electronic component 10 (Manhattan phenomenon) as shown in Figure 2(C), may occur during or after reflow, as shown in Figure 2(A).

[0007] To explain the challenges of reflow soldering in more detail and clarity, we will refer to two-terminal electronic components (e.g., resistors and capacitors). If the shape of the component mounting pads or the board design is inappropriate, mounting defects are likely to occur. For example, as shown in Figure 3(A), if the pad 22A to which one electrode 12A of electronic component 10 is joined is formed separately from the wiring pattern 24A, and the pad to which the other electrode 12B is joined is formed with a solid wiring pattern 24B covering the entire surface for power supply, GND, or to improve heat dissipation, the solder will not melt during the reflow process, resulting in mounting defects such as non-conductivity where the electrodes of the electronic component and the mounting pads on the board are not joined, rotation of the electronic component 10, and rising edges of the electronic component, as shown in Figures 2(B) and (C) above.

[0008] As a countermeasure, as shown in Figure 3(B), it is recommended to connect both electrodes 12A and 12B of the electronic component 10 to lands 22A and 22B, which have the same pattern width and a symmetrical structure.

[0009] Even when forming lands with the same pattern width, the direction in which the wiring patterns are connected to the lands must also be considered. If the wiring pattern design is inappropriate, the small size of the electronic components and electrodes makes them prone to misalignment and rotational mounting defects. In the wiring example shown in Figure 4(A), the left and right electrodes of the electronic component are joined to symmetrical lands 40A and 40B, and the left and right wiring patterns 50A and 50B connected to lands 40A and 40B extend in one direction. In such a wiring pattern, the rate at which the solder melts or solidifies differs in the vertical direction of the land, making it easy for the electronic component to be misaligned due to the resulting tension and other forces.

[0010] Figure 4(B) shows that wiring pattern 50A connected to land 40A extends downward, and wiring pattern 50B connected to land 40B extends upward. Even with such wiring patterns, the melting or solidification rates of the solder on the left and right lands 40A and 40B differ, and the resulting rotational moment makes it easier for the electronic component to rotate.

[0011] As a countermeasure, as shown in Figure 4(C), wiring patterns 50A and 50B are arranged symmetrically on both sides so that they extend horizontally from lands 40A and 40B to the left and right. This cancels out the tension and rotational moments caused by the melting or solidification of the solder on both sides, thereby suppressing displacement and rotation of electronic components.

[0012] Furthermore, to eliminate mounting defects of electronic components, the structure (layer configuration) of the circuit board must also be considered. As shown in Figure 5(A), lands 62 are formed on the surface of the substrate or base material 60, and the electrodes 12 of the electronic component 10 are joined to the lands 62 via solder 70. In addition, if there is a silk screen printing layer 64 (thickness of approximately 20-100 μm) indicating the shape and polarity of the component, a resist layer 66 (thickness of 10 μm to several tens of μm) for rust prevention / protection / insulation of the conductor wiring, and a passivation layer (thickness of several nanometers to several μm) for insulation from the conductor layer in the case of a photolithography process, the electronic component 10 may ride up on the resist layer 66 or silk screen printing layer 64, causing the electronic component 10 to tilt or rotate easily. Therefore, when the solder thickness is approximately 100 μm or more, the layer configuration becomes important. As a countermeasure, a structure is recommended in which the silkscreen layer 64, resist layer 66, and passivation layer are not provided beneath the electronic component 10, as shown in Figure 5(B).

[0013] Figure 6(A) is a top view of a 4-terminal package microLED, Figure 6(B) is a bottom view thereof, and Figure 6(C) is a diagram showing the common cathode electrical connections. The microLED 80 houses three LEDs, R, G, and B, and as shown in Figure 6(A), the top surface 82 includes the light-emitting parts R, G, and B, and as shown in Figure 6(B), the bottom surface 84 has electrodes R, G, B, and C (common). Electrode R is connected to the anode of LED R, electrode G is connected to the anode of LED G, electrode B is connected to the anode of LED B, and electrode C is connected in common to the cathodes of LEDs R, G, and B.

[0014] Even when surface-mounting microLEDs as electronic components onto a circuit board, electrodes R, G, B, and C are connected to the pads by solder reflow. However, if the microLEDs are misaligned or rotated, the following problems may occur. - The micro-LEDs may not light up at all. Or, the red LED may light up, but the green and blue LEDs may not, resulting in a situation where only certain colors light up. • The light may not illuminate in the correct color. For example, if there is a mounting defect in electrode B, it will light up yellow even if you intend to make it white. If micro-LEDs are mounted at an angle, the optical axis will be tilted, resulting in reduced brightness and changes in color.

[0015] The present invention aims to solve these conventional problems and provide a multilayer substrate that can reduce the occurrence of mounting defects in electronic components. [Means for solving the problem]

[0016] The multilayer substrate according to the present invention includes at least a first conductor layer and a second conductor layer laminated with an insulating layer in between, wherein the first conductor layer includes a plurality of lands for soldering electrodes of surface-mount electronic components, and the second conductor layer includes wiring patterns electrically connected to the lands through conductive through-holes formed in the insulating layer, and each of the plurality of lands has the same planar shape. [Effects of the Invention]

[0017] According to the present invention, since lands of the same shape are formed on the first conductor layer and wiring patterns are formed on the second conductor layer, the melting or solidification of the solder on each land is made uniform, and the self-alignment effect due to the surface tension of the solder is maximized. As a result, misalignment, rotation, tilting, and rising of electronic components are suppressed, and the occurrence of mounting defects of electronic components is reduced. [Brief explanation of the drawing]

[0018] [Figure 1] This diagram illustrates the self-alignment effect achieved through reflow soldering. [Figure 2] This diagram illustrates the conventional challenges associated with reflow soldering. [Figure 3] Figure 3(A) shows a land structure prone to mounting defects of electronic components, and Figure 3(B) shows a land structure with countermeasures in place. [Figure 4] Figures 4(A) and (B) show examples of wiring prone to mounting defects of electronic components, while Figure 4(C) shows an example of wiring with countermeasures in place. [Figure 5]FIG. 5(A) is a cross-sectional view explaining the mounting defect of an electronic component due to the substrate structure, and FIG. 5(B) is a cross-sectional view showing the substrate structure after countermeasures. [Figure 6] FIG. 6(A) is a top view of a micro LED of a 4-terminal package, FIG. 4(B) is a bottom view of the micro, and FIG. 4(C) is a diagram showing the electrical connection of the R, G, and B light-emitting elements with a common cathode. [Figure 7] It is a schematic plan view of a multilayer substrate according to the first embodiment of the present invention. [Figure 8] It is a schematic cross-sectional view of a multilayer substrate according to the first embodiment of the present invention. [Figure 9] It is a schematic plan view of a multilayer substrate according to the second embodiment of the present invention. [Figure 10] It is a diagram showing the first conductor layer of an actual multilayer substrate according to the second embodiment. [Figure 11] It is a diagram showing a micro LED surface-mounted on an actual multilayer substrate according to the second embodiment.

Mode for Carrying Out the Invention

[0019] The present invention relates to a multilayer substrate in which a plurality of wiring layers are laminated via an insulating layer. Electronic components are mounted on the multilayer substrate by solder reflow. The electronic components are not particularly limited, but for example, are package-type micro LEDs incorporating R, G, and B light-emitting elements. It should be noted that the drawings referred to in the following description include enlarged displays for easy understanding of the invention, and do not represent the actual shape and scale of the product as it is.

Examples

[0020] Next, a first embodiment of the present invention will be described. FIG. 7(A) is a plan view of a multilayer substrate according to the first embodiment of the present invention, and FIG. 7(B) is a plan view showing a land pattern formed on the topmost conductor layer of the multilayer substrate.

[0021] The multilayer substrate 100 of this embodiment has a multilayer printed wiring structure in which multiple conductor layers are stacked with an insulating layer in between. The insulating layer is not particularly limited, but is composed of a material such as polyimide resin or PET, and provides insulation between the conductor layers in the substrate. Conductive layers consisting of a single layer or stack of materials such as Cu, Au, Ag, Mg, Al, or ITO are formed on the surface of the insulating layer. The conductor layers are etched into circuit patterns or wiring patterns, for example, by a photolithography process. Through-holes are also formed in the insulating layer to electrically connect the upper and lower conductor layers. The through-holes are filled with a conductive material, such as Cu.

[0022] The multilayer substrate 100 of this embodiment is a multilayer printed circuit board in which, in order to improve the mounting accuracy of electronic components, the first conductor layer (top layer) on which electronic components are mounted is composed only of lands for component mounting, the shape of the lands is made identical so that the self-alignment effect is maximized when mounting electronic components, and circuit patterns that connect to electronic circuits are electrically connected from the second conductor layer onwards through through holes provided in the lands.

[0023] In this embodiment, a micro-LED 80 in a 4-terminal package, as shown in Figure 6, is used as an example of a surface-mounted electronic component. The number of layers in the multilayer substrate 100 is arbitrary, but a multilayer substrate with four conductive layers is used as an example, depending on the number of electrodes of the micro-LED 80. The four conductive layers are referred to as the first conductive layer, second conductive layer, third conductive layer, and fourth conductive layer from top to bottom, and the insulating layers that insulate the layers from top to bottom are referred to as the first insulating layer, second insulating layer, third insulating layer, and fourth insulating layer.

[0024] As shown in Figure 7(A), the multilayer substrate 100 has a mounting area 110 for mounting micro LEDs 80 and a connector portion 120 for connecting the multilayer substrate 100 to a socket or the like. Multiple micro LEDs 80 arranged in a matrix are soldered to each land in the mounting area 110. The outer shape of the micro LED 80 package is, for example, rectangular with Lx = 0.43 mm and Ly = 0.43 mm in width. The length of one side of the roughly rectangular R electrode, G electrode, B electrode, and C electrode formed on the bottom surface of the package is approximately 0.11 mm, and the space S between electrodes is approximately 0.1 mm.

[0025] The topmost layer of the multilayer substrate 100, the first conductive layer, has multiple lands 130R, 130G, 130B, and 130C (collectively referred to as lands 130) formed in the matrix direction for soldering the R, G, B, and C electrodes of the micro-LED 80. One set of lands 130R, 130G, 130B, and 130C for one micro-LED 80 is formed at the positions corresponding to the R, G, B, and C electrodes, respectively. The lands 130R, 130G, 130B, and 130C have a roughly rectangular shape in plan view, and each has the same shape. Multiple such sets of lands 130 are arranged regularly in the matrix direction at a constant pitch.

[0026] A through-hole 140 is located directly below the approximate center of the land 130. The through-hole 140 is a through-hole formed in the insulating layer, and the inside of the through-hole 140 is filled with a conductive material. The through-hole 140 enables electrical connection between the conductive layers above and below the insulating layer. Thus, the land 130 formed in the first conductive layer is electrically connected to the wiring pattern formed in the second conductive layer via the through-hole 140. The through-hole 140 may also be formed across multiple insulating layers. For example, if the through-hole 140 is formed at the same location in the first and second insulating layers, the land 130 in the first conductive layer can be electrically connected to the wiring pattern formed in the third conductive layer via the through-hole 140. Alternatively, if the through-hole 140 is formed at the same location in the first, second, and third insulating layers, the land 130 in the first conductive layer can be electrically connected to the wiring pattern formed in the fourth conductive layer via the through-hole 140.

[0027] By forming only lands 130 of the same shape on the first conductor layer and forming the wiring pattern on a conductor layer below the first conductor layer, the thermal behavior of the solder melting and solidifying when the micro-LED 80 is soldered to the lands 130 is substantially dependent on the lands. By making each land the same shape, heat dissipation when the molten solder solidifies becomes uniform between the lands, and the self-alignment effect due to the surface tension of the solder is maximized. This makes it possible to solder the micro-LED 80 onto the lands with high precision, suppressing misalignment, rotation, tilting, and uprighting of the micro-LED 80, and reducing the occurrence of mounting defects of the micro-LED 80. Furthermore, if a pair of lands are arranged symmetrically or rotationally, the micro-LED 80 can be soldered onto the lands with even higher precision.

[0028] Figure 8 shows the cross-sectional structure of a multilayer substrate. The multilayer substrate 100 includes a first insulating layer 210, a second insulating layer 220, a third insulating layer 230, and a fourth insulating layer 240. Lands 130R, 130G, 130B, and 130C are processed on the first conductive layer formed on the upper surface of the first insulating layer 210. For the sake of clarity, the R electrode, G electrode, B electrode, and C electrode of the micro LED 80 are shown in a row, and similarly, the lands 130R, 130G, 130B, and 130C are shown in a row.

[0029] Land 130R is electrically connected to the wiring pattern 250R formed in the second conductor layer via a through-hole 140R formed in the first insulating layer 210; Land 130G is electrically connected to the wiring pattern 250G formed in the second conductor layer via a through-hole 140G formed in the first insulating layer 210; Land 130B is electrically connected to the wiring pattern 250B formed in the third conductor layer via a through-hole 140B formed in the first insulating layer 210 and the second insulating layer 220; and Land 130C is electrically connected to the wiring pattern 250C formed in the fourth conductor layer via a through-hole 140C formed in the first insulating layer 210, the second insulating layer 220, and the third insulating layer 230. Through-holes 140R, 140G, 140B, and 140C are through-holes that penetrate the insulating layer. For example, the through-holes can be filled with a metallic material by copper plating, thereby enabling electrical connection between the upper and lower conductor layers.

[0030] The wiring patterns 250R, 250G, 250B, and 250C of the multilayer substrate 100 are connected to the drive circuit (not shown) via the connector section 120.

[0031] Since current from R, G, and B flows in common through the wiring pattern 250C connected to the C electrode, the wiring pattern 250C generates a large amount of heat. Therefore, the wiring pattern 250C is formed on a fourth conductor layer, and the area of ​​the wiring pattern 250C is expanded to improve heat dissipation so that heat can easily escape to the outside. Here, wiring patterns 250R and 250G connected to the R and G electrodes are formed on the second conductor layer, but this is just an example, and only the wiring pattern 250R connected to the R electrode may be formed on the second conductor layer, or only the wiring pattern 250B connected to the B electrode may be formed. Alternatively, another conductor layer may be added to the multilayer substrate, and wiring patterns 250R, 250G, 250B, and 250C may be formed on each of these conductor layers. Furthermore, if there is sufficient space in the conductor layer, it is also possible to form three wiring patterns on a single conductor layer.

[0032] Next, a second embodiment of the present invention will be described. Figure 9 is a plan view of a multilayer substrate according to the second embodiment. In the second embodiment, the first conductive layer of the multilayer substrate 100A has alignment marks 260 used when positioning and mounting microLEDs on the lands, in addition to the lands 130. For example, the alignment marks 260 are patterned at the same time as the lands 130 are patterned. The alignment marks 260 are placed in the space that defines the pitch between each pair of lands 130. By providing alignment marks 260, the microLEDs 80 can be positioned more accurately on the lands 130, and the self-alignment effect is further enhanced. Therefore, mounting defects of microLEDs in solder reflow can be reduced. Note that the shape, number, and position of the alignment marks shown in Figure 9 are examples and are not necessarily limited thereto.

[0033] Figure 10 is a plan view of an actual multilayer substrate according to the second embodiment. In the figure, the area indicated by A shows a set of lands, and the area indicated by B shows alignment marks. Figure 11 shows a micro-LED surface-mounted on the multilayer substrate of the second embodiment, with the area indicated by C showing the micro-LED. As is clear from the figure, the micro-LED is soldered well onto the lands without any misalignment, rotation, or rise issues.

[0034] The first and second embodiments of the present invention have the following effects. 1. The self-alignment effect during reflow soldering is maximized, allowing electronic components to be reliably mounted in the desired position. 2. By making the pads for mounting electronic components the same shape, the frequency of mounting defects such as misalignment, rotation, tilting, and vertical alignment of electronic components is reduced. 3. If the electronic component to be implemented is an LED, all colors can be controlled / lit correctly. 4. When the electronic component to be mounted is an LED, the LED is mounted horizontally to the pad, so the optical axis does not tilt, allowing for the desired brightness and chromaticity to be achieved.

[0035] The above embodiment shows an example of surface mounting a microLED in a 4-terminal package, but this is just one example, and the present invention is not limited thereto. For example, the microLED may be in a 6-terminal package with independent anode and cathode electrodes for the R, G, and B light-emitting elements, or it may be a mounting of individual R, G, and B chips that are not packaged. Furthermore, the surface-mounted electronic components can also be applied to surface mounting of electronic components other than microLEDs.

[0036] In the above embodiment, a rectangular land was illustrated, but this is just one example, and the planar shape of the land may be other shapes (for example, circular, elliptical, rectangular with a different aspect ratio, polygonal). In other words, the planar shape of the land can be appropriately changed according to the shape, size, number, and pitch of the electrodes of the mounted electronic components. Furthermore, in the above embodiment, a case with four layers of multilayer substrate was illustrated, but the present invention is not limited to this, and can be appropriately selected according to the number of surface-mounted electronic components, the number and size of wiring patterns, etc., and can be applied to multilayer substrates containing at least two or more conductive layers.

[0037] Although preferred embodiments of the present invention have been described in detail above, the present invention is not limited to any particular embodiment, and various modifications and changes are possible within the scope of the gist of the invention as described in the claims. [Explanation of symbols]

[0038] 80: Micro LED 100: Multilayer substrate 110: Mounting area 120: Connector section 130: Land 140: Through hole 210, 220, 230, 240: Insulating layer 250: Wiring Pattern 260: Alignment Mark

Claims

1. A multilayer substrate comprising at least a first conductive layer and a second conductive layer laminated with an insulating layer in between, The first conductor layer includes a plurality of lands for soldering electrodes of surface-mount electronic components. The second conductor layer includes a wiring pattern electrically connected to the land through conductive through-holes formed in the insulating layer. A multilayer substrate in which each of the aforementioned multiple lands has the same planar shape.

2. The multilayer substrate according to claim 1, wherein the first conductive layer includes alignment marks used when positioning electronic components on a land.

3. The multilayer substrate according to claim 1, wherein the electronic component is a package containing R, G, and B light-emitting elements and having at least an R electrode, a G electrode, a B electrode, and a C (common) electrode formed on its bottom surface.

4. The multilayer substrate according to claim 3, wherein a set of lands connecting the R electrode, G electrode, B electrode, and C electrode are arranged in a rotationally symmetric or lineally symmetric manner.

5. The multilayer substrate further includes third and fourth conductive layers. The second conductor layer includes a wiring pattern electrically connected to at least one of the R electrode, G electrode, or B electrode. The third conductor layer includes a wiring pattern electrically connected to at least one of the R electrode, G electrode, or B electrode. The multilayer substrate according to claim 3, wherein the fourth conductor layer includes a wiring pattern electrically connected to the C electrode.

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