Power amplifier

Abstract

This invention aims to improve the output characteristics of a power amplifier circuit with cascode-connected transistors using a simple circuit configuration. [Solution] A power amplifier 10 having a bias switching circuit 200 and a power amplifier circuit 100 including a first amplifier transistor Tr10 and a second amplifier transistor Tr14, wherein the first amplifier transistor is a field-effect transistor whose bias terminal (gate) is electrically connected to the supply terminal N20 through a first resistor R10, whose output terminal (drain) is electrically connected to the power supply Vdd, and whose connection terminal (source) is connected to the amplification terminal of transistor Tr11, and the second amplifier transistor is a field-effect transistor to which an input signal is input, whose amplification terminal (drain) is connected in series with the connection terminal of the first amplifier transistor, and whose ground terminal (source) is electrically connected to ground, and the amplified signal obtained by amplifying the input signal of the second amplifier transistor is output from the output terminal of the first amplifier transistor.

Description

Technical Field

[0001] The present disclosure relates to a power amplifier device.

Background Art

[0002] A power amplifier circuit having a plurality of transistors connected in cascode and an impedance switching unit for adjusting the bias voltage of each of the plurality of transistors is known (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The power amplifier circuit described in Patent Document 1 includes a power amplifier to which a bias is supplied from a variable power source. The power amplifier includes a plurality of transistors connected in cascode. An impedance conversion unit is provided for a predetermined transistor among the plurality of transistors. The impedance conversion unit switches the impedance seen from the gate of the predetermined transistor between a standby mode in which the power amplifier does not output a signal and an active mode in which the power amplifier outputs a signal. As a result, the power amplifier circuit can supply a desired bias voltage to the gate of the predetermined transistor and avoid deterioration of the output characteristics of the predetermined transistor.

[0005] However, in order to obtain a desired bias voltage for each of the plurality of transistors connected in cascode, it is necessary to provide an impedance conversion unit for each of the plurality of transistors. Therefore, there is a problem that the circuit scale of the power amplifier circuit increases and the control for each of the impedance conversion units becomes complicated.

[0006] Therefore, the present disclosure aims to improve the output characteristics of a power amplifier circuit having cascode-connected transistors with a simple circuit configuration. [Means for solving the problem]

[0007] A power amplifier according to one aspect of the present invention is a power amplifier circuit comprising: a bias switching circuit that switches between a first connection state in which a first power terminal electrically connected to a constant power supply that supplies a constant first voltage and a supply terminal electrically connected, and a second connection state in which a second power terminal electrically connected to a variable power supply that supplies a fluctuating second voltage and the power supply terminal electrically connected, based on a control signal; a first amplification transistor; and a second amplification transistor, wherein the first amplification transistor is a field-effect transistor having a bias terminal, an output terminal, and a connection terminal, the bias terminal being electrically connected to the supply terminal through a first resistive element, and the output terminal being electrically connected to a power supply; the second amplification transistor is a field-effect transistor having an input terminal, an amplification terminal, and a ground terminal, the amplification terminal being connected in series with the connection terminal of the first amplification transistor, and the ground terminal being electrically connected to ground; and the power amplifier circuit outputs an amplified signal obtained by amplifying an input signal input to the input terminal of the second amplification transistor from the output terminal of the first amplification transistor. [Effects of the Invention]

[0008] According to this disclosure, the output characteristics of a power amplifier circuit having cascode-connected transistors can be improved with a simple circuit configuration. [Brief explanation of the drawing]

[0009] [Figure 1] This figure shows examples of various circuit configurations for a power amplifier, which is one embodiment of the present invention. [Figure 2] This table shows an example of the operating state of the elements in each operating mode of the power amplifier. [Figure 3] This figure shows an example of the operating state of each element in low-power mode. [Figure 4] This figure shows an example of the operating state of each element in high-power mode. [Modes for carrying out the invention]

[0010] The embodiments of this disclosure will be described below with reference to the figures. Here, circuit elements with the same reference numerals indicate the same circuit element, and redundant explanations will be omitted.

[0011] ===Configuration of Power Amplifier 10=== Referring to Figure 1, an overview of the configuration of the power amplifier 10 will be described. Figure 1 is a diagram showing examples of the configurations of various circuits related to the power amplifier 10, which is one embodiment of the present invention.

[0012] The power amplifier 10 is used, for example, to amplify the power of radio frequency (RF) signals transmitted to a base station, and is installed in a mobile communication device such as a mobile phone. The power amplifier 10 amplifies the power of signals from communication standards such as 2G (second-generation mobile communication system), 3G (third-generation mobile communication system), 4G (fourth-generation mobile communication system), 5G (fifth-generation mobile communication system), LTE (Long Term Evolution)-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex), LTE-Advanced, LTE-Advanced Pro, and 6G (sixth-generation mobile communication system). The frequency of the RF signal is, for example, in the range of several hundred MHz to several tens of GHz. Note that the communication standards of signals amplified by the power amplifier 10 are not limited to these.

[0013] As shown in Figure 1, the power amplifier 10 includes, for example, a power amplifier circuit 100, a bias switching circuit 200, a current switching circuit 300, a control circuit 400, and a voltage withstand circuit 500.

[0014] The power amplifier circuit 100 is a circuit that amplifies the input signal RFin and outputs the amplified signal RFout. The power amplifier circuit 100 is electrically connected to a variable power supply Vdd that supplies a variable voltage. The power amplifier circuit 100 is supplied with a bias according to one of several different output modes through a bias switching circuit 200. Specifically, the power amplifier circuit 100 is electrically connected through the bias switching circuit 200 to either a constant power supply Vreg that supplies a constant voltage or a variable power supply Vdd that supplies a variable voltage. The variable power supply Vdd may be an envelope tracking (ET) type power supply or an average power tracking (APT) type power supply.

[0015] Hereinafter, in the power amplifier circuit 100, the state when the output is at a predetermined level will be referred to as "low power mode," and the state when the output is higher than that of the low power mode will be referred to as "high power mode." The power amplifier circuit 100 is supplied with bias according to the low power mode and high power mode, respectively, through the bias switching circuit 200.

[0016] The bias switching circuit 200 is a circuit that switches the connection state between the constant voltage constant power supply Vreg and the variable power supply Vdd and the power amplifier circuit 100 according to the low power mode and high power mode based on the control signal, and supplies bias to the power amplifier circuit 100. The bias switching circuit 200 comprises a first power supply terminal electrically connected to the constant power supply Vreg, a second power supply terminal electrically connected to the variable power supply Vdd, and a supply terminal for supplying the constant voltage of the constant power supply Vreg and the variable voltage of the variable power supply Vdd to the power amplifier circuit 100.

[0017] Hereinafter, the state in which the first power supply terminal and the supply terminal are electrically connected is referred to as the "first connection state". That is, the first connection state is the connection state in the low power mode, and refers to a connection state capable of supplying the constant voltage of the constant power supply Vreg as a bias to the power amplifier circuit 100. Further, the state in which the second power supply terminal and the supply terminal are electrically connected is referred to as the "second connection state". That is, the second connection state is the connection state in the high power mode, and refers to a connection state capable of supplying the variable voltage of the variable power supply Vdd as a bias to the power amplifier circuit 100.

[0018] The current switching circuit 300 is a circuit for enabling the power amplifier circuit 100 to supply an appropriate bias voltage in the low power mode. The current switching circuit 300 turns on and off according to each of the low power mode and the high power mode. For example, the current switching circuit 300 turns off in the low power mode and turns on in the high power mode.

[0019] The control circuit 400 is a circuit for preventing the bias switching circuit 200 from causing a reverse current from the constant power supply Vreg to the variable power supply Vdd in the low power mode (the first connection state). The control circuit 400 electrically separates the path between the constant power supply Vreg and the variable power supply Vdd in the low power mode.

[0020] The withstand voltage circuit 500 is a circuit for ensuring the withstand voltage of the bias switching circuit 200 with respect to the variable voltage of the variable power supply Vdd when the bias switching circuit 200 is in the high power mode (the second connection state).

[0021] <<Power Amplifier Circuit 100>> As shown in FIG. 1, the power amplifier circuit 100 includes a cascode circuit 110 and a voltage dividing circuit 120.

[0022] The cascode circuit 110 is a circuit in which multiple transistors are connected in a cascode configuration. In Figure 1, as an example, multiple transistors are shown as a field-effect transistor, consisting of five stages of transistors Tr10 to Tr14. Hereafter, transistor Tr10 will be referred to as the "first amplifier transistor" and transistor Tr14 as the "second amplifier transistor".

[0023] The voltage divider circuit 120 is a circuit in which multiple resistive elements are connected in series. Each node connecting each of the multiple resistive elements is electrically connected to the gates of transistors Tr10 to Tr13. Hereafter, the multiple resistive elements will be referred to as "resistive elements R10 to R14," and the nodes will be referred to as "nodes N10 to N13."

[0024] Specifically, transistor Tr10 (first amplification transistor) is a field-effect transistor having a bias terminal, an output terminal, and a connection terminal. The bias terminal is electrically connected to node N10 through resistor R20, for example, the gate. That is, the bias terminal is electrically connected to the supply terminal of the bias switching circuit 200 through node N10 and resistor R10. The output terminal is electrically connected to the variable power supply Vdd through inductor L10, for example, the drain. The connection terminal is electrically connected to the amplification terminal of transistor Tr11, for example, the source.

[0025] In the following explanation, the bias terminal of transistor Tr10 will be referred to as the "gate," the output terminal as the "drain," and the connection terminal as the "source."

[0026] Transistors Tr11 to Tr13 are field-effect transistors cascode-connected to transistor Tr10. Each gate of transistors Tr11 to Tr13 is electrically connected to nodes N11 to N13, respectively, through resistors R21 to R23.

[0027] Transistor Tr14 (the second amplification transistor) is a field-effect transistor cascode-connected with transistors Tr10 to Tr13. Transistor Tr14 has an input terminal, an amplification terminal, and a ground terminal. The input terminal is, for example, the gate to which the input signal RFin is input. A bias voltage Vg1 is supplied to the input terminal from the bias circuit 600 through a resistor R40. The amplification terminal is, for example, the drain, which is electrically connected to the source of transistor Tr13. The ground terminal is, for example, the source, which is electrically connected to ground.

[0028] In the following explanation, the input terminal of transistor Tr14 will be referred to as the "gate," the amplification terminal as the "drain," and the ground terminal as the "source."

[0029] As described above, in the power amplifier circuit 100, the gates of transistors Tr10 to Tr13 are electrically connected to the supply terminal of the bias switching circuit 200 through resistors R10 to R13. That is, each gate of transistors Tr10 to Tr13 is supplied with a bias after a constant voltage supplied from the constant power supply Vreg or a variable voltage supplied from the variable power supply Vdd is divided by resistors R11 to R14. Hereafter, the "constant voltage supplied from the constant power supply Vreg" may be referred to as the "first voltage," and the "variable voltage supplied from the variable power supply Vdd" may be referred to as the "second voltage."

[0030] In the above description, the power amplifier circuit 100 was explained as being composed of five stages of transistors Tr10 to Tr14, but it is not limited to this. The power amplifier circuit 100 may also be composed of at least two stages of transistors connected in a cascode configuration, for example, a configuration in which two transistors, Tr10 and Tr14, are connected in a cascode configuration.

[0031] Furthermore, the power amplifier circuit 100 may also include capacitors C10 to C13 in parallel between each of the gates of transistors Tr10 to Tr13 and each of the nodes N10 to N13, respectively, to reduce the influence of harmonics on the gate voltage.

[0032] <<Bias switching circuit 200>> As shown in Figure 1, the bias switching circuit 200 includes a first switch element SW1, a first reverse current prevention element SW2, a second switch element SW3, and a second reverse current prevention element SW4. The first switch element SW1, the first reverse current prevention element SW2, the second switch element SW3, and the second reverse current prevention element SW4 are, for example, field-effect transistors.

[0033] In Figure 1, as an example, the first power supply terminal is the "source of the first switch element SW1," the second power supply terminal is the "source of the second switch element SW3," and the supply terminal is shown as "node N20," to which the source of the first reverse current prevention element SW2 and the source of the second reverse current prevention element SW4 are electrically connected. In the following, the first power supply terminal of the bias switching circuit 200 may be described as the "source of the first switch element Sw1," the second power supply terminal as the "source of the second switch element SW3," and the supply terminal as "node N20."

[0034] The first switching element SW1 is, for example, a field-effect transistor that turns on based on the first control signal en_Vreg. The first control signal en_Vreg is a signal output from, for example, an external controller (not shown) (such as a MIPI (Mobile Industry Processor Interface) compatible interface), and is a signal indicating that it is in low-power mode.

[0035] Specifically, the first switch element SW1 comprises a first power supply terminal, a first reverse current element terminal, and a first output control terminal. The first power supply terminal (here, the first power supply terminal of the bias switching circuit 200) is electrically connected to the constant power supply Vreg, for example, the source. The first reverse current element terminal is electrically connected to the drain of the first reverse current prevention element Sw2, for example, the drain. The first output control terminal is input to the first control signal en_Vreg, for example, the gate. That is, the drain and source of the first switch element SW1 become conductive when the first control signal en_Vreg, which indicates low power mode, is input to the gate, and the drain and source become non-conductive when the first control signal en_Vreg is not input to the gate.

[0036] In the following explanation, the first switching element SW1 will be described with the first power supply terminal as the "source," the first reverse current element terminal as the "drain," and the first output control terminal as the "gate."

[0037] The first reverse current prevention element SW2 is a switch that electrically isolates the first switch element SW1 from node N20 (the supply terminal). In other words, the first reverse current prevention element SW2 is a switch that prevents the current passing through the second switch element SW3 (described later) from flowing back into the constant power supply Vreg.

[0038] Specifically, the first reverse current prevention element SW2 includes a first switch terminal, a first voltage supply terminal, and a first reverse current control terminal. The first switch terminal is electrically connected to the drain of the first switch element SW1, for example, the drain. The first voltage supply terminal is electrically connected to the resistor R10 through the supply terminal, for example, the source. The first reverse current control terminal is input to the first control signal en_Vreg, for example, the gate. That is, the drain and source of the first reverse current prevention element SW2 become conductive when the first control signal en_Vreg, which indicates low power mode, is input to the gate, and the drain and source become non-conductive when the first control signal en_Vreg is not input to the gate. In other words, the first reverse current prevention element SW2 is controlled to operate in the same way as the on / off operation of the first switch element SW1.

[0039] In the following description of the first reverse current prevention element SW2, the first switch terminal will be referred to as the "drain," the first voltage supply terminal as the "source," and the first reverse current control terminal as the "gate."

[0040] The second switching element SW3 is, for example, a field-effect transistor that turns on based on the second control signal en_Vdd. The second control signal en_Vdd is, for example, a signal output from an external controller (not shown) and indicates that it is in high-power mode.

[0041] Specifically, the second switch element SW3 includes a second power supply terminal, a second reverse current element terminal, and a second output control terminal. The second power supply terminal (here referred to as the second power supply terminal of the bias switching circuit 200 described above) is electrically connected to the variable power supply Vdd, for example, as the source. The second reverse current element terminal is electrically connected to the drain of the second reverse current prevention element Sw4, for example, as the drain. The second output control terminal is input to the second control signal en_Vdd, for example, as the gate. In other words, the drain and source of the second switch element SW3 become conductive when the second control signal en_Vdd, which indicates high power mode, is input to the gate, and the drain and source become non-conductive when the second control signal en_Vdd is not input to the gate.

[0042] In the following explanation, the second power supply terminal of the second switch element SW3 will be referred to as the "source," the second reverse current element terminal as the "drain," and the second output control terminal as the "gate."

[0043] The second reverse current prevention element SW4 is a switch that electrically isolates the second switch element SW3 from node N20 (supply terminal). In other words, the second reverse current prevention element SW4 is a switch that prevents the current passing through the first switch element SW1 from flowing back into the variable power supply Vdd. The second reverse current prevention element SW4 operates based on the voltage supplied from the control circuit 400 when the first control switch SW6 is turned on.

[0044] Specifically, the second reverse current prevention element SW4 includes a second switch terminal, a second voltage supply terminal, and a second reverse current control terminal. The second switch terminal is a drain electrically connected to the drain of the second switch element SW3. The second voltage supply terminal is a source electrically connected to the resistor R10 through the supply terminal. In low power mode (first connection state), the second reverse current control terminal receives a voltage from the control circuit 400 that cancels out the constant voltage (first voltage) of the constant power supply Vreg applied to the second voltage supply terminal (source). As a result, the second reverse current prevention element SW4 is turned off in low power mode. In other words, the second reverse current prevention element SW4 is controlled to operate in the same way as the on / off operation of the second switch element SW3. Thus, in high power mode, the drain and source of the second reverse current prevention element SW4 are conductive, and in low power mode, the drain and source are non-conductive.

[0045] In the following explanation, the second switch terminal of the second reverse current prevention element SW4 will be referred to as the "drain," the second voltage supply terminal as the "source," and the second reverse current control terminal as the "gate."

[0046] Conventionally, in power amplifiers that do not have a bias switching circuit 200, a low voltage was supplied to the power amplifier circuit 100 as a bias from the variable power supply Vdd in low power mode. In this case, a problem arises in which the output characteristics of the power amplifier circuit 100 deteriorate because a bias that does not allow the power amplifier circuit 100 to operate properly is supplied to the power amplifier circuit 100.

[0047] The power amplifier 10, by including a bias switching circuit 200, can supply an appropriate voltage bias to the power amplifier circuit 100 in low-power mode. As a result, the power amplifier 10 can improve its output characteristics in low-power mode.

[0048] Furthermore, the second reverse current prevention element SW4 is not limited to operating based on the voltage input from the control circuit 400. The second reverse current prevention element SW4 may also operate based on the second control signal en_Vdd output from the controller. In this case, the power amplifier 10 does not need to include the control circuit 400.

[0049] <<Current switching circuit 300>> As shown in Figure 1, the current switching circuit 300 includes a current switching switch SW5. The current switching switch SW5 is, for example, a field-effect transistor and has a first current terminal, a second current terminal, and a current control terminal. The first current terminal is, for example, the drain, which is connected in series with the supply terminal (node ​​N20) of the bias switching circuit 200 through resistors R10 to R14. The second current terminal is, for example, the source, which is electrically connected to ground. The current control terminal is, for example, the gate, to which a second control signal en_Vdd is input.

[0050] In the following explanation, the first current terminal of the current selector switch SW5 will be referred to as the "drain," the second current terminal as the "source," and the current control terminal as the "gate."

[0051] The current selector switch SW5 makes the drain (first current terminal) and source (second current terminal) non-conductive in low-power mode (first connection state) and conducts between the drain and source in high-power mode (second connection state). In other words, for example, when the second control signal en_Vdd, which indicates high-power mode, is input to the gate of the current selector switch SW5, the drain and source become conductive, and when the second control signal en_Vdd is not input to the gate, the drain and source become non-conductive.

[0052] The power amplifier 10, by incorporating a current switching circuit 300, makes it possible to create a non-conductive state between the supply terminal of the bias switching circuit 200 and the ground electrically connected to the source of the current switching switch SW5 in low-power mode. Therefore, in low-power mode, the power amplifier 10 can apply a constant voltage supplied from the constant power supply Vreg as a bias to the gates of transistors Tr10 to Tr14 of the power amplifier circuit 100 without voltage drop, without current flowing between the supply terminal and ground. As a result, the power amplifier 10 can supply a bias of an appropriate size from a constant voltage constant power supply Vreg, thereby improving output characteristics while improving power efficiency.

[0053] <<Control circuit 400>> As shown in Figure 1, the control circuit 400 includes a first control switch SW6. The first control switch SW6 is, for example, a field-effect transistor and comprises a first voltage terminal, a voltage output terminal, and a voltage control terminal. The first voltage terminal is, for example, a source to which a constant voltage of a constant power supply Vreg is supplied. The voltage output terminal is, for example, a drain, which is electrically connected to the gate of the second reverse current prevention element SW4 so that a constant voltage of the constant power supply Vreg can be applied to the gate of the second reverse current prevention element SW4 (second reverse current control terminal). The voltage control terminal is, for example, a gate to which a first control signal en_Vreg is input.

[0054] In the following explanation, the first voltage terminal of the first control switch SW6 will be referred to as the "source," the voltage output terminal as the "drain," and the voltage control terminal as the "gate."

[0055] The first control switch SW6 conducts between the source (first voltage terminal) and the drain (voltage output terminal) in low-power mode (first connection state) and does not conduct between the source and the drain in high-power mode (second connection state). That is, for example, when the first control signal en_Vreg, which indicates that it is in low-power mode, is input, the source and drain of the first control switch SW6 conduct, and when the first control signal en_Vreg is not input, the source and drain become non-conductive.

[0056] The power amplifier 10, by including the control circuit 400, can activate the second reverse current prevention element SW4 in low-power mode, regardless of the control signal output from the controller. Furthermore, the power amplifier 10, by including the control circuit 400, can properly activate the second reverse current prevention element SW4 even when the voltage-resistant circuit 500 described later is provided. As a result, the power amplifier 10 can prevent reverse current flow to the variable power supply Vdd with a simple control procedure, thereby stably improving the output characteristics.

[0057] <<Voltage-resistant circuit 500>> The withstand voltage circuit 500 is a circuit that ensures the withstand voltage of the second switch element SW3 and the second reverse current prevention element SW4 in the second connection state, for example. The withstand voltage circuit 500 includes, for example, a diode circuit 510 and a second control switch SW7.

[0058] The diode circuit 510 is a circuit in which at least one diode is connected in series, with the anode electrically connected to the source (second power supply terminal) of the second switch element SW3 and the cathode electrically connected to the gate (second reverse current control terminal) of the second reverse current prevention element SW4. The cathode is electrically connected, for example, to node N30 between the drain of the second control switch SW7 and the gate of the second reverse current prevention element SW4.

[0059] Furthermore, it is preferable that the diode circuit 510 is designed such that the voltage drop Vdio across the diode is less than the voltage rating of the second control switch SW7. This is to ensure that a voltage exceeding the voltage rating of the second control switch SW7 is not applied.

[0060] The second control switch SW7 is a switch that operates based on a second control signal en_Vdd indicating high power mode, and is, for example, a field-effect transistor. The second control switch SW7 is provided in series between the cathode and ground so that the cathode of the diode circuit 510 can be electrically connected to ground.

[0061] Specifically, the second control switch SW7 comprises a diode terminal, a control ground terminal, and a diode control terminal. The diode terminal is connected in series with the cathode of the diode circuit 510 through a resistor R30, for example, the drain. The control ground terminal is electrically connected to ground, for example, the source. The diode control terminal is input to the second control signal en_Vdd, for example, the gate.

[0062] In the following explanation, the diode terminal of the second control switch SW7 will be referred to as the "drain," the control ground terminal as the "source," and the diode control terminal as the "gate."

[0063] The power amplifier circuit 100, by incorporating a voltage-resistant circuit 500, can control the current flowing through the diode circuit 510 in high-power mode, thereby ensuring the voltage withstand capability of the second switch element SW3 and the second reverse current prevention element SW4. As a result, the power amplifier circuit 100 can supply the variable power supply Vdd as the bias to the power amplifier circuit 100 while ensuring the voltage withstand capability of the bias switching circuit 200.

[0064] <<Variation>> In the above description, the power amplifier 10 is assumed to receive a first control signal en_Vreg and a second control signal en_Vdd from a controller (not shown), but it is not limited to this. For example, the power amplifier 10 may be equipped with a comparator circuit (not shown) capable of comparing the variable voltage (second voltage) of a variable power supply Vdd with a predetermined voltage level. For example, the comparator circuit outputs the first control signal en_Vreg to the gate of the first switch element SW1, the gate of the first reverse current prevention element SW2, and the gate of the first control switch SW6 when the variable voltage of the variable power supply Vdd is below a predetermined voltage level. Alternatively, for example, the comparator circuit outputs the second control signal en_Vdd to the second switch element SW3 and the current switching switch SW5 when the variable voltage of the variable power supply Vdd exceeds a predetermined voltage level. This enables the power amplifier 10 to operate quickly through circuit configuration rather than control by a controller.

[0065] ===Operation of Power Amplifier 10=== The operation of the power amplifier 10 will be explained with reference to Figures 2, 3, and 4. Figure 2 is a table showing an example of the operating state of the elements in each operating mode of the power amplifier 10. Figure 3 is a diagram showing an example of the operating state of each element in low-power mode. Figure 4 is a diagram showing an example of the operating state of each element in high-power mode. For convenience, in Figures 3 and 4, the "ON" switch and its circuit are shown with solid lines, and the "OFF" switch and its circuit are shown with dashed lines.

[0066] Based on the control signals (first control signal en_Vreg and second control signal en_Vdd) output from the controller (not shown), the power amplifier 10 switches to a first connection state, which is low power mode, when the variable voltage of the variable power supply Vdd is below a predetermined voltage level, and switches to a second connection state, which is high power mode, when the variable voltage of the variable power supply Vdd exceeds a predetermined voltage level.

[0067] <<Low Power Mode>> First, with reference to Figures 2 and 3, the operation of the power amplifier 10 in the first connection state during low-power mode will be explained.

[0068] As shown in Figure 2, in the first connection state, the first control signal en_Vreg is input to the gate of the first switch element SW1, the gate of the first reverse current prevention element SW2, and the gate of the first control switch SW6. As a result, the first switch element SW1, the first reverse current prevention element SW2, and the first control switch SW6 become "ON" with conduction between the drain and source.

[0069] In this case, the second reverse current prevention element SW4 is in a non-conducting state ("OFF") between its drain and source. Specifically, as shown in Figure 3, a constant voltage from the constant power supply Vreg is applied to the source of the second reverse current prevention element SW4. In addition, a constant voltage from the constant power supply Vreg is applied to the gate of the second reverse current prevention element SW4 through the first control switch SW6. As a result, the source voltage and gate voltage of the second reverse current prevention element SW4 become equal. That is, the gate-source voltage Vgs becomes "0", so the second reverse current prevention element SW4 becomes "OFF". This allows the bias switching circuit 200 to prevent current from flowing back from the constant power supply Vreg to the variable power supply Vdd in the first connection state.

[0070] Furthermore, in this case, the current selector switch SW5 is in the "OFF" state, meaning there is no conduction between the drain and source. In this case, no current flows between node N20 (power supply terminal) of the bias selector circuit 200 and the drain of the current selector switch SW5. As a result, no voltage drop occurs across the resistors R10 to R14, and a constant voltage bias from the constant power supply Vreg is applied to the gates of transistors Tr10 to Tr14 of the power amplifier circuit 100. This allows the power amplifier circuit 100 to amplify the input signal RFin and output the amplified signal RFout without degrading the output characteristics, even in low-power mode.

[0071] In other words, the power amplifier 10 prevents current from flowing back into the variable power supply Vdd in low-power mode, and enables the output of the amplified signal RFout without degrading the output characteristics.

[0072] <<High Power Mode>> Next, with reference to Figures 2 and 4, the operation of the power amplifier 10 in the second connection state during high-power mode will be described.

[0073] As shown in Figure 2, in the second connection state, the second control signal en_Vdd is input to the gate of the second switch element SW3, the gate of the current selector switch SW5, and the gate of the second control switch SW7. As a result, the second switch element SW3, the current selector switch SW5, and the second control switch SW7 become "ON" with conduction between the drain and source.

[0074] As a result, the first control switch SW6 is "OFF" and the second control switch SW7 is "ON," allowing current to flow through the diode circuit 510. A voltage drop Vdio occurs across the diode circuit 510. The diode circuit 510 is designed so that the voltage drop Vdio is smaller than the voltage rating of the second reverse current prevention element SW4.

[0075] If the variable voltage of the variable power supply Vdd is less than the breakdown voltage of the second reverse current protection element SW4, the gate voltage of the second reverse current protection element SW4 can be considered to be "0". Therefore, the drain-gate voltage Vdg of the second reverse current protection element SW4 can be considered to be equal to the variable voltage of the variable power supply Vdd. In other words, a drain-gate voltage Vdg less than its breakdown voltage is applied to the second reverse current protection element SW4. Thus, the second reverse current protection element SW4 is protected when the variable voltage of the variable power supply Vdd is less than the breakdown voltage of the second reverse current protection element SW4.

[0076] Furthermore, if the variable voltage of the variable power supply Vdd is greater than the breakdown voltage of the second reverse current prevention element SW4, the gate voltage of the second reverse current prevention element SW4 can be considered to be the voltage obtained by subtracting the voltage drop Vdio across the diode circuit 510 from the variable voltage of the variable power supply Vdd. Therefore, the drain-gate voltage Vdg of the second reverse current prevention element SW4 can be considered to be equal to the voltage drop Vdio across the diode circuit 510. Thus, since the voltage drop Vdio across the diode circuit 510 is less than the breakdown voltage of the second reverse current prevention element SW4, the second reverse current prevention element SW4 is protected.

[0077] Thus, in the power amplifier 10, the voltage withstand circuit 500 makes it possible to prevent a large voltage from being applied to the second reverse current prevention element SW4 in high power mode, thereby preventing damage to the circuit.

[0078] In the second connection state, the first reverse current prevention element Sw2 is "OFF," thus preventing reverse current flow from the variable power supply Vdd to the constant power supply Vreg. Also, in the second connection state, the current selector switch SW5 is "ON," with conduction between the drain and source. In this case, current flows between node N20 (power supply terminal) of the bias switching circuit 200 and the drain of the current selector switch SW5. That is, the variable voltage of the variable power supply Vdd is divided by the resistors R10 to R14 and distributed to the gates of transistors Tr10 to Tr14.

[0079] Therefore, in the high-power mode, the power amplifier 10 prevents current from flowing back to the constant power supply Vreg and enables the output of the amplified signal RFout without degrading the output characteristics.

[0080] ===Summary=== <1> The power amplifier 10 is a power amplifier circuit 100 which includes a bias switching circuit 200 that switches between a first connection state in which a first power supply terminal (e.g., the source of a first switch element SW1) electrically connected to a constant power supply Vreg that supplies a constant voltage (first voltage) and a supply terminal (e.g., node N20), and a second connection state in which a second power supply terminal (e.g., the source of a second switch element SW3) electrically connected to a variable power supply Vdd that supplies a fluctuating variable voltage (second voltage) and a supply terminal (e.g., node N20), based on a control signal (e.g., a first control signal en_Vreg and a second control signal en_Vdd), a first amplification transistor, and a second amplification transistor, wherein the first amplification transistor (e.g., transistor Tr10) has a bias terminal (e.g., The power amplifier 100 comprises a field-effect transistor having a gate, an output terminal (e.g., drain), and a connection terminal (e.g., source), the bias terminal being electrically connected to the supply terminal through a first resistive element (e.g., resistive element R10), and the output terminal being electrically connected to the power supply. The second amplifier transistor (e.g., transistor Tr14) is a field-effect transistor having an input terminal (e.g., gate), an amplification terminal (e.g., drain), and a ground terminal (e.g., source), the amplification terminal being connected in series with the connection terminal of the first amplifier transistor, and the ground terminal being electrically connected to ground. The power amplifier circuit 100 outputs an amplified signal RFout, obtained by amplifying the input signal RFin input to the input terminal of the second amplifier transistor, from the output terminal of the first amplifier transistor. This makes it possible for the power amplifier device 10 to improve the output characteristics of a power amplifier circuit having cascode-connected transistors with a simple circuit configuration. Specifically, the power amplifier 10 can supply an appropriate voltage bias to the power amplifier circuit 100 in low-power mode, thereby improving the output characteristics.

[0081] <2> Furthermore, the power amplifier 10 further comprises a current changeover switch SW5 having a first current terminal (e.g., the drain of the current changeover switch SW5), a second current terminal (e.g., the source of the current changeover switch SW5), and a current control terminal (e.g., the date of the current changeover switch SW5), wherein the first current terminal is connected in series with the supply terminal (e.g., node N20) through a first resistive element (e.g., resistive element R10), the second current terminal is electrically connected to ground, and the current control terminal receives a control signal (e.g., a second control signal en_Vdd), and the current changeover switch SW5, based on the control signal (e.g., a second control signal en_Vdd), makes the space between the first current terminal and the second current terminal non-conductive in the first connection state, and makes the space between the first current terminal and the second current terminal conductive in the second connection state. <1> The power switching device described above. This allows the power amplifier 10 to be supplied with bias from a low constant voltage constant power supply Vreg, thereby improving power efficiency and output characteristics.

[0082] <3> Furthermore, in the power amplifier 10, the bias switching circuit 200 includes a first switch element SW1 that electrically connects the first power supply terminal (e.g., the source of the first switch element SW1) and the supply terminal, which conducts based on a first control signal en_Vreg, which is a control signal for supplying a constant voltage (first voltage) from the supply terminal (e.g., node N20); a first reverse current prevention element SW2 that is provided in series between the first switch element SW1 and the supply terminal so as to be electrically isolated from the first switch element SW1 and the supply terminal; and a control for supplying a variable voltage (second voltage) from the supply terminal. The system includes a second switch element SW3 that conducts based on a second control signal en_Vdd and electrically connects a second power supply terminal (e.g., the source of the second switch element SW3) to the supply terminal, and a second reverse current prevention element SW4 that is provided in series between the second switch element SW3 and the supply terminal so as to electrically isolate the second switch element SW3 from the supply terminal, wherein the first reverse current prevention element SW2 is controlled to operate in the same way as the first switch element SW1, and the second reverse current prevention element SW4 is controlled to operate in the same way as the second switch element SW3. <1> or <2> The power switching device described above. This makes it possible for the power amplifier 10 to improve the output characteristics of a power amplifier circuit having cascode-connected transistors with a simple circuit configuration.

[0083] <4> Furthermore, in the power amplifier 10, the first reverse current prevention element SW2 includes a first switch terminal (e.g., drain), a first voltage supply terminal (e.g., source), and a first reverse current control terminal (e.g., gate), the first switch terminal being electrically connected to the first switch element SW1, the first voltage supply terminal being electrically connected to the first resistive element (e.g., resistive element R10) through the supply terminal, and the first reverse current control terminal conducting the first switch terminal and the first voltage supply terminal based on the first control signal en_Vreg. The second reverse current prevention element SW4 includes a second switch terminal (e.g., drain), a second voltage supply terminal (e.g., source), and a second reverse current control terminal (e.g., gate), the second switch terminal being electrically connected to the second switch element SW3, and the second voltage supply terminal conducting through the supply terminal. The power amplifier 10 further includes the first control switch SW6, which is a field-effect transistor comprising a first voltage terminal (e.g., source), a voltage output terminal (e.g., drain), and a voltage control terminal (e.g., gate), wherein the first voltage terminal is supplied with a constant voltage (first voltage), the voltage output terminal is electrically connected to the second reverse current control terminal so that a constant voltage (first voltage) can be applied to the second reverse current control terminal, and the voltage control terminal conducts between the first voltage terminal and the voltage output terminal based on a first control signal en_Vreg. <3> The power switching device described above. This allows the power amplifier 10 to prevent current from flowing back to the variable power supply Vdd with a simple control procedure, thereby enabling stable improvement of the output characteristics.

[0084] <5> Furthermore, in the power amplifier 10, the second switch element SW3 is a field-effect transistor comprising a second power supply terminal (e.g., the source of the second switch element SW3), a second reverse current element terminal (e.g., the drain), and a second output control terminal (e.g., the gate). The second reverse current element terminal (e.g., the gate) is electrically connected to the second switch terminal, and the second output control terminal (e.g., the output control terminal) conducts the second power supply terminal and the second reverse current element terminal (e.g., the gate) based on the second control signal en_Vdd, thereby controlling power The amplifier 10 further comprises a voltage-resistant circuit 500, which includes a diode circuit 510 and a second control switch SW7, wherein the diode circuit 510 has its anode electrically connected to the second power terminal of the second switch element SW3 and its cathode electrically connected to the second reverse current control terminal of the second reverse current prevention element SW4, and the second control switch SW7 is provided in series between the cathode and ground so as to turn on based on the second control signal en_Vdd and electrically connect the cathode to ground. <3> or <4> The power switching device described above. This allows the power amplifier 10 to supply the variable power supply Vdd as the bias to the power amplifier circuit 100 while ensuring the voltage withstand capability of the bias switching circuit 200.

[0085] The embodiments described above are provided to facilitate understanding of this disclosure and are not intended to limit its interpretation. This disclosure may be modified or improved without departing from its spirit, and equivalents thereof are also included. That is, embodiments modified by those skilled in the art are also included within the scope of this disclosure, as long as they retain the features of this disclosure. The elements and their arrangements in the embodiments are not limited to those exemplified and can be modified as appropriate. [Explanation of Symbols]

[0086] 10...Power amplifier, 100...Power amplifier circuit, 110...Cascode circuit, 120...Voltage divider circuit, 200...Bias switching circuit, SW1...First switching element, SW2...First reverse current prevention element, SW3...Second switching element, SW4...Second reverse current prevention element, 300...Current switching circuit, SW5...Current switching switch, 400...Control circuit, SW6...First control switch, 500...Withstand voltage circuit, 510...Diode circuit, SW7...Second control switch.

Claims

1. A first connection state in which a constant power supply that supplies a constant first voltage, a first power supply terminal electrically connected to a constant power supply, and a supply terminal are electrically connected, A variable power supply that supplies a fluctuating second voltage, a second power supply terminal electrically connected to the supply terminal, and a second connection state that electrically connects them, A bias switching circuit that switches based on a control signal, A power amplifier circuit comprising a first amplification transistor and a second amplification transistor, The aforementioned first amplification transistor is a field-effect transistor having a bias terminal, an output terminal, and a connection terminal. The bias terminal is electrically connected to the supply terminal through the first resistive element. The output terminal is electrically connected to the power supply. The aforementioned second amplification transistor is a field-effect transistor having an input terminal, an amplification terminal, and a ground terminal. The amplification terminal is connected in series with the connection terminal of the first amplification transistor. The aforementioned ground terminal is electrically connected to the ground. The power amplifier circuit amplifies the input signal input to the input terminal of the second amplifier transistor and outputs the amplified signal from the output terminal of the first amplifier transistor. Power amplifier circuit, A power amplifier equipped with the following features.

2. The current selector switch further comprises a first current terminal, a second current terminal, and a current control terminal. The first current terminal is connected in series with the supply terminal through the first resistive element. The second current terminal is electrically connected to ground. The current control terminal receives a control signal. The current selector switch, based on a control signal, makes the connection between the first current terminal and the second current terminal non-conductive in the first connection state, and makes the connection between the first current terminal and the second current terminal conductive in the second connection state. The power amplifier according to claim 1.

3. The aforementioned bias switching circuit is A first switch element electrically connects the first power supply terminal and the supply terminal, and conducts based on a first control signal, which is the control signal for supplying the first voltage from the supply terminal. A first reverse current prevention element is provided in series between the first switch element and the supply terminal so as to be electrically separable from the first switch element and the supply terminal, A second switch element electrically connects the second power supply terminal and the supply terminal, and conducts based on the second control signal, which is the control signal for supplying the second voltage from the supply terminal. A second reverse current prevention element is provided in series between the second switch element and the supply terminal so as to be electrically isolated from the second switch element and the supply terminal, Includes, The first reverse current prevention element is controlled to operate in the same manner as the first switch element. The second reverse current prevention element is controlled to operate in the same manner as the second switch element. The power amplifier according to claim 1 or claim 2.

4. The first reverse current prevention element includes a first switch terminal, a first voltage supply terminal, and a first reverse current control terminal. The first switch terminal is electrically connected to the first switch element, The first voltage supply terminal is electrically connected to the first resistive element through the supply terminal. The first reverse current control terminal conducts the first switch terminal and the first voltage supply terminal based on the first control signal. The second reverse current prevention element includes a second switch terminal, a second voltage supply terminal, and a second reverse current control terminal. The second switch terminal is electrically connected to the second switch element, The second voltage supply terminal is electrically connected to the first resistive element through the supply terminal. The second reverse current control terminal conducts the second switch terminal and the second voltage supply terminal based on the input voltage. The power amplifier further includes a first control switch, The first control switch is a field-effect transistor having a first voltage terminal, a voltage output terminal, and a voltage control terminal. The first voltage terminal is supplied with the first voltage. The voltage output terminal is electrically connected to the second reverse current control terminal so that the first voltage can be applied to the second reverse current control terminal. The voltage control terminal conducts the first voltage terminal and the voltage output terminal based on the first control signal. The power amplifier according to claim 3.

5. The second switching element is a field-effect transistor comprising the second power supply terminal, a reverse current element terminal, and an output control terminal. The reverse current element terminal is electrically connected to the second switch terminal. The output control terminal conducts the second power supply terminal and the reverse current element terminal based on the second control signal. The power amplifier further comprises a voltage-resistant circuit, The voltage-resistant circuit includes a diode circuit and a second control switch. The diode circuit has an anode electrically connected to the second power supply terminal of the second switching element, and a cathode electrically connected to the second reverse current control terminal of the second reverse current prevention element. The second control switch is provided in series between the cathode and the ground so as to turn on based on the second control signal and electrically connect the cathode to the ground. The power amplifier according to claim 4.

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