Semiconductor equipment

Abstract

To provide a semiconductor device with good electrical characteristics and high reliability. [Solution] A first insulator, a first conductor on the first insulator, and a second conductor, An oxide is placed between a first conductor and a second conductor, and the second conductor is placed on the first conductor. It comprises a second insulator on an electromaterial and an oxide, and a third conductor on the second insulator, The side surface of the first conductor has a region in contact with one side surface of the oxide, and the side surface of the second conductor is , having a region in contact with the other side surface of the oxide, the height of the upper surface of the first conductor, the second conductor The height of the top surface and the height of the top surface of the oxide are approximately equal, and the conductivity of the first conductor The conductivity is higher than that of the oxide, and the conductivity of the second conductor is higher than that of the oxide.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. One aspect of the invention relates to semiconductor wafers, modules, and electronic devices.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. A device is one form of a semiconductor device. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection Devices, lighting devices, electro-optical devices, energy storage devices, memory devices, semiconductor circuits, imaging devices and electronics Some devices can be said to possess semiconductor equipment.

[0003] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the present invention relates to a product, method, or method of manufacture. This refers to a process, machine, manufacture, or composition. This concerns (the tar). [Background technology]

[0004] Development of integrated circuits (ICs) using semiconductor devices This is being promoted. The development and manufacturing of CPUs and memory will require the use of ICs with higher integration density. LSI and ultra-large-scale integrated circuit (ULSI) technologies are used. Such ICs are mounted on a circuit board, for example, a plastic board. It is mounted on a lint circuit board and is used to make up computers, information terminals, display devices, automobiles, etc. It is used as a component in various electronic devices. Furthermore, these are used in artificial intelligence (AI) systems. Research into its use in applications such as [unclear / modified] is also underway.

[0005] As computer and information terminals, desktop computers, laptop computers, tablet computers, smartphones, mobile phones, etc. are known.

[0006] Silicon-based semiconductor materials are widely known as semiconductor materials used for semiconductor elements, but oxide semiconductors are attracting attention as other materials.

[0007] In addition, a transistor using an oxide semiconductor is known to have an extremely small leakage current in the non-conducting state. For example, a low-power consumption CPU that applies the characteristic of low leakage current of a transistor using an oxide semiconductor is disclosed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0008]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0009] One aspect of the present invention is to provide a semiconductor device having good electrical characteristics and a method for manufacturing the same. Another aspect of the present invention is to provide a highly reliable semiconductor device and a method for manufacturing the same. Another aspect of the present invention is to provide a semiconductor device capable of miniaturization or high integration and a method for manufacturing the same. Another aspect of the present invention is to provide a highly productive semiconductor device and a method for manufacturing the same.

[0010] In a semiconductor device using a transistor having an oxide semiconductor, it is one of the problems to suppress changes in electrical characteristics and improve reliability. Also, one of the problems is to provide a transistor having an oxide semiconductor with a large on-current. Also, one of the problems is to provide a transistor having an oxide semiconductor with a small off-current. Also, one of the problems is to provide a semiconductor device with reduced power consumption. Also, one of the problems is to provide a semiconductor device with an improved operating frequency. Also, one of the problems is to provide a novel semiconductor device. Also, one of the problems is to provide a module having the semiconductor device. Also, one of the problems is to provide an electronic device having the semiconductor device or the module. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other problems from the description in the specification, drawings, claims, etc. [Means for Solving the Problems] One aspect of the present invention includes a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials.

[0011] Also, one aspect of the present invention includes a semiconductor device having a structure in which a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials. Also, one aspect of the present invention includes an electronic device having a semiconductor device or a module having the semiconductor device, and the semiconductor device has a structure in which a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor

[0012] has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other problems from the description in the specification, drawings, claims, etc. [Means for Solving the Problems] One aspect of the present invention includes a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials.

[0013] One aspect of the present invention includes a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials. Also, one aspect of the present invention includes a semiconductor device having a structure in which a first insulator, a first conductor on the first insulator, and a second conductor, an oxide disposed between the first conductor and the second conductor, a second insulator on the first conductor, on the second conductor, and on the oxide, and a third conductor on the second insulator, and the side surface of the first conductor has a region in contact with one side surface of the oxide, and the second conductor has a region in contact with the other side surface of the oxide, and the semiconductor device has a structure in which the oxide is disposed between the first conductor and the second conductor, and the oxide has a first region and a second region, and the first region and the second region are separated from each other by a predetermined distance, and the first region and the second region are formed of different materials. The side surface has a region in contact with the other side surface of the oxide, and the height of the upper surface of the first conductor, the second The height of the top surface of the conductor and the height of the top surface of the oxide are approximately equal, and the first conductive The conductivity of the first material is higher than that of the oxide, and the conductivity of the second conductor is higher than that of the oxide; semiconductor. That is the case.

[0014] Furthermore, the first conductor and the second conductor are In, Sn, W, Ti, and It is preferable that it contains one or more of the Si components.

[0015] Furthermore, the first and second conductors are Zn, Ti, Ga, or Nb, respectively. It may include one or more of the following:

[0016] Furthermore, oxides are formed from In, element M (where M is Al, Ga, Y, or Sn), and Zn. It is preferable to include it.

[0017] Furthermore, the carrier densities of the first and second conductors are less than the carrier density of the oxide. It is preferable that the price is also high.

[0018] Furthermore, in one aspect of the present invention, a first insulator is formed on a substrate, and an oxide film is formed on the first insulator. A film is formed, and a mask is created on the oxide film by lithography, and an acid that does not overlap with the mask is used. By removing the oxide film, an oxide is formed, and a mask is used to cover the oxide and deposit a conductive film. By isotropically etching a portion of the film, the sides of the mask are exposed, allowing the mask to be removed. This is a method for fabricating semiconductor devices that lifts off the conductive film on the mask.

[0019] Furthermore, it is preferable to deposit the conductive film by sputtering.

[0020] Furthermore, a film deposition method is used in which the deposition rate of the conductive film is lower in the horizontal direction than in the vertical direction. This is preferable. [Effects of the Invention]

[0021] According to one aspect of the present invention, a semiconductor device having good electrical characteristics and a method for manufacturing the same are provided. It is possible to make a highly reliable semiconductor device and its operation possible according to one aspect of the present invention. A manufacturing method can be provided. Furthermore, according to one aspect of the present invention, miniaturization or high integration can be achieved. The present invention can provide a possible semiconductor device and a method for manufacturing the same. Furthermore, in one aspect of the present invention... This makes it possible to provide more productive semiconductor devices and methods for manufacturing them.

[0022] Furthermore, in a semiconductor device using a transistor having an oxide semiconductor, changes in electrical characteristics This can suppress movement and improve reliability. Furthermore, oxides with high on-currents... It is possible to provide a transistor having a semiconductor. In addition, an oxide semiconductor with a low off-current can be provided. A transistor having a conductor can be provided. Also, a semiconductor with reduced power consumption can be provided. We can provide the device. Furthermore, we can provide a semiconductor device with improved operating frequency. can.

[0023] Alternatively, a novel semiconductor device can be provided. Or, a device having the semiconductor device can be provided. A joule can be provided. Or, a semiconductor device or module having the same. We can provide electronic devices.

[0024] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]

[0025] [Figure 1] Figure 1A is a top view showing a semiconductor device. Figures 1B and 1C are cross-sectional views showing a semiconductor device. [Figure 2] Figure 2A is a top view showing a semiconductor device. Figures 2B and 2C are cross-sectional views showing a semiconductor device. [Figure 3] Figure 3A is a top view showing a semiconductor device. Figures 3B and 3C are cross-sectional views showing a semiconductor device. [Figure 4] Figure 4A is a top view showing the method for manufacturing a semiconductor device. Figures 4B and 4C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 5] Figure 5A is a top view showing the method for manufacturing a semiconductor device. Figures 5B and 5C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 6] Figure 6A is a top view showing the method for manufacturing a semiconductor device. Figures 6B and 6C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 7] Figure 7A is a top view showing the method for fabricating a semiconductor device. Figures 7B and 7C are cross-sectional views showing the method for fabricating a semiconductor device. [Figure 8] Figure 8A is a top view showing the method for manufacturing a semiconductor device. Figures 8B and 8C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 9] Figure 9A is a top view showing the method for manufacturing a semiconductor device. Figures 9B and 9C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 10] Figure 10A is a top view showing the method for manufacturing a semiconductor device. Figures 10B and 10C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 11] Figure 11A is a top view showing the method for manufacturing a semiconductor device. Figures 11B and 11C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 12] Figure 12A is a top view showing the method for manufacturing a semiconductor device. Figures 12B and 12C are cross-sectional views showing the method for manufacturing a semiconductor device. [Figure 13] Figure 13 is a diagram illustrating the energy band structure of an oxide semiconductor. [Figure 14] Figure 14 is a cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 15] Figure 15A is a block diagram showing an example of a storage device configuration. Figure 15B is a schematic diagram showing an example of a storage device configuration. [Figure 16] Figures 16A to 16H are circuit diagrams showing example configurations of memory devices. [Figure 17] Figure 17A is a block diagram of a semiconductor device. Figure 17B is a schematic diagram of a semiconductor device. [Figure 18] Figures 18A to 18E are schematic diagrams of a storage device. [Figure 19] Figures 19A to 19F are diagrams showing electronic devices. [Figure 20] Figure 20 is a graph showing the dependence of the sheet resistance of indium tin oxide on the heat treatment time. [Modes for carrying out the invention]

[0026] The embodiments will be described below with reference to the drawings. However, many of the embodiments differ. It is possible to implement it in such a manner, without deviating from its purpose and scope. It will be easily understood by those skilled in the art that the form and details can be changed in various ways. The Specification shall not be interpreted as being limited to the contents of the following embodiments.

[0027] Furthermore, in the drawings, the size, layer thickness, or area is exaggerated for clarity. There are cases where this is not the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal example. This is a schematic representation and is not limited to the shapes or values ​​shown in the drawings. For example, actual During the manufacturing process, processes such as etching may unintentionally cause layers or resist masks to become visible. While there may be some decrease, this may not be reflected in the diagram for the sake of ease of understanding. In this context, the same reference numeral is used for identical parts or parts having similar functions across different drawings. It is used in this way, and the explanation of its repetition may be omitted. Also, when referring to a similar function, They may share the same hatch pattern and not be specifically assigned a symbol.

[0028] Furthermore, especially in top views (also called "plan views") and perspective views, the invention is made easily understandable. Therefore, the description of some components may be omitted. Also, some hidden lines and other elements may be omitted. It may be omitted.

[0029] Furthermore, in this specification and elsewhere, ordinal numbers such as "1st," "2nd," etc., are used for convenience only. This does not indicate the order of processes or stacking order. Therefore, for example, "the first" is not "the second" This can be explained by appropriately replacing it with "of" or "the third of," etc. The ordinal numbers listed do not correspond to the ordinal numbers used to specify one aspect of the present invention. There are cases where this is the case.

[0030] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the drawings. The relationship changes as appropriate depending on the direction in which each component is described. Therefore, as explained in the specification... It is not limited to the same words or phrases, and can be appropriately rephrased depending on the situation.

[0031] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The cases in which X and Y are directly connected are disclosed in this specification, etc. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in a diagram or text. Furthermore, connections other than those shown in the diagram or text are also disclosed in the diagram or text. Let's assume that.

[0032] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, etc.) Let's assume it is a layer, etc.

[0033] An example of a case where X and Y are directly connected is an electrical connection between X and Y. Elements that perform this function (for example, switches, transistors, capacitive elements, inductors, resistive elements, etc.) If an ion, display element, light-emitting element, load, etc. is not connected between X and Y Yes, elements that enable electrical connection between X and Y (e.g., switches, transistors, capacitors) Without using (quantitative elements, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc.) This is the case when X and Y are connected.

[0034] One example of a case where X and Y are electrically connected is when the electrical connection between X and Y is possible. Elements that perform this function (for example, switches, transistors, capacitive elements, inductors, resistive elements, etc.) One or more elements (such as ions, display elements, light-emitting elements, and loads) are connected between X and Y. This is possible. Furthermore, the switch has a function that allows it to be controlled to be on or off. In other words, A switch can be either conductive (on) or non-conductive (off), allowing current to flow. It has a function to control whether or not current flows. Alternatively, the switch selects the path through which the current flows. It has a function to switch between them. Note that if X and Y are electrically connected, X This includes cases where and Y are directly connected.

[0035] One example of a functional connection between X and Y is a functional connection between X and Y. Circuits that can perform this function (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signals) Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc. ), voltage source, current source, switching circuit, amplification circuit (can increase signal amplitude or current amount, etc.) (Signal generators, operational amplifiers, differential amplifiers, source follower circuits, buffer circuits, etc.), signal generation It is possible to connect one or more (such as a circuit, memory circuit, control circuit, etc.) between X and Y. Yes. For example, even if another circuit is placed between X and Y, the signal output from X When a signal is transmitted to Y, it is assumed that X and Y are functionally connected. When Y is functionally connected, the situation is different from when X and Y are directly connected. This includes the case where Y is electrically connected.

[0036] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel-forming region, and through the channel-forming region, between the source and the drain It is possible to pass an electric current through it. In this specification, the channel forming region and This refers to the region where electric current primarily flows.

[0037] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0038] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate overlap each other. This refers to the distance between the source and the drain in a region or channel where a region or channel is formed. Note that the channel length in a single transistor is not necessarily the same across all regions. No. In other words, the channel length of a single transistor may not be fixed to a single value. Therefore, in this specification, the channel length is any one of the regions in which the channel is formed. This value is the maximum, minimum, or average value.

[0039] Channel width refers to, for example, the width of a semiconductor (or transistor) when it is in the ON state. The region where the part through which current flows and the gate overlap, or the region where a channel is formed. This refers to the length of the section where the source and drain face each other. In a transistor, the channel width is not necessarily the same across all regions. That is, one The channel width of the transistor may not be fixed to a single value. Therefore, this specification So, the channel width is any one value, maximum value, or maximum value in the region where the channel is formed. Use the minimum value or the average value.

[0040] Furthermore, depending on the transistor structure, the channel may actually be formed in the region where the channel is formed. Channel width (hereinafter also referred to as "effective channel width") and shown in the top view of the transistor. The channel width (hereinafter also referred to as the "apparent channel width") may differ from the actual channel width. For example, if the gate covers the side of the semiconductor, the effective channel width is the apparent channel width. The width can become larger than the frame width, and its effects may become undeniable. For example, minute and gait In a transistor where the t covers the side surface of the semiconductor, a channel formation region is formed on the side surface of the semiconductor. The proportion of this can become large. In such cases, the effective channel width is more important than the apparent channel width. The channel width will be larger.

[0041] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. A certain assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.

[0042] Therefore, in this specification, the apparent channel width is referred to as the "enclosed channel width (SCW:S)". It is sometimes called "circular channel width". Also, this detail In the document, when simply referred to as channel width, it means enclosed channel width or apparent channel width. It may refer to the channel width. Or, in this specification, when it is simply referred to as channel width, It can refer to the effective channel width. Note that channel length, channel width, and effective channel Channel width, apparent channel width, enclosed channel width, etc., are determined by analyzing cross-sectional TEM images, etc. The value can be determined by these factors.

[0043] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, lead to... High Density of States (DOS) of semiconductors and low crystallinity In some cases, such as the following may occur. If the semiconductor is an oxide semiconductor, the properties of the semiconductor may change. Examples of impurities that can be altered include Group 1 elements, Group 2 elements, Group 13 elements, and Group 14 elements. These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, for example, Examples include hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. In the case of semiconductors, water can also function as an impurity. Also, in the case of oxide semiconductors, for example... In some cases, the presence of impurities can lead to the formation of oxygen vacancies. Also, if the semiconductor is silicon... In this case, impurities that alter the properties of semiconductors include, for example, Group 1 elements other than oxygen and hydrogen. These include Group 2 elements, Group 13 elements, Group 15 elements, and so on.

[0044] In this specification, a silicon oxidizride film is defined as having a composition that is more acidic than nitrogen. It has a high content of elements. For example, preferably, oxygen is present in an amount of 55 atomic% or more and 65 atomic% or less. Nitrogen is 1 atom% to 20 atom%, silicon is 25 atom% to 35 atom%, hydrogen This refers to substances containing 0.1 atomic% to 10 atomic% in a concentration range. A nitrogen membrane is a membrane whose composition contains more nitrogen than oxygen. For example, The composition is 55 to 65 atomic percent nitrogen, 1 to 20 atomic percent oxygen, and Concentration of lycon: 25 atomic% to 35 atomic% and hydrogen: 0.1 atomic% to 10 atomic% It refers to things that are included within a range.

[0045] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term. For example, the term "conductive layer" can be changed to the term "conductive film." It may be possible to change it. Or, for example, change the term "insulating film" to "insulating layer". In some cases, it may be possible to change the terminology to this.

[0046] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0047] Furthermore, transistors described herein, unless otherwise explicitly stated, are field-effect transistors. Let it be called a transistor. Also, unless otherwise explicitly stated, the transistors shown in this specification etc. are n Assume it is a channel-type transistor. Therefore, its threshold voltage (also called "Vth") is Unless otherwise specified, the voltage should be greater than 0V.

[0048] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10° or more and 10° or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5° and 5°. Furthermore, "approximately parallel" refers to a state where two straight lines are positioned at an angle of -30° or more and 30° or less. This refers to a situation where two lines are positioned at an angle of 80° to 100°. This refers to a state where something is perpendicular. Therefore, it also includes cases where the angle is between 85° and 95°. "A straight line" refers to a state in which two straight lines are positioned at an angle between 60° and 120°.

[0049] Furthermore, in this specification, if a crystal is trigonal or rhombohedral, it is included in the hexagonal crystal system. It is assumed that this is the case.

[0050] In this specification, a barrier film is defined as a film that suppresses the permeation of impurities such as hydrogen and oxygen. This refers to a film that has the function of, and if the barrier film is conductive, then the conductive barrier film and Sometimes I call them.

[0051] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as the following. For example, when a metal oxide is used in the active layer of a transistor, the metal Oxides are sometimes referred to as oxide semiconductors. Therefore, when referring to an OS FET, Therefore, it can be rephrased as a transistor having an oxide or oxide semiconductor.

[0052] (Embodiment 1) <Example 1 of semiconductor device configuration> Figures 1A, 1B, and 1C show a transistor 200 according to one aspect of the present invention, and These are top and cross-sectional views of the area around transistor 200.

[0053] Figure 1A is a top view of a semiconductor device having transistor 200. Also, Figure 1B, Figure 1C is a cross-sectional view of the semiconductor device. Here, Figure 1B is a cross-sectional view of Figure 1A along line A1-A2 This is a cross-sectional view of the area indicated by the dashed line, and is a cross-sectional view of transistor 200 in the channel length direction. There is also Figure 1C, which is a cross-sectional view of the area shown by the dashed line A3-A4 in Figure 1A. This is also a cross-sectional view of the Rangista 200 in the channel width direction. Note that in the top view of Figure 1A, the figure Some elements have been omitted for clarity.

[0054] A semiconductor device according to one aspect of the present invention comprises an insulator 214 on a substrate (not shown) and an insulator 214 The transistor 200 above, the insulator 280 on the transistor 200, and the insulator 280 It has an insulator 281, and the insulators 214, 280, and 281 are interlayer films. It functions as such. It also electrically connects to transistor 200 and functions as a plug. It has an electrical body 240 (conductor 240a and conductor 240b). Insulator 241 (insulator 241a, and insulator 24) is in contact with the side surface of the functional conductor 240. 1b) is provided. Also, on the insulator 281 and on the conductor 240, the conductor 240 Conductors 246 (conductors 246a and 2) are electrically connected to each other and function as wiring. 46b) is provided.

[0055] Furthermore, the insulators 272, 280, and 281 are in contact with the inner walls of the openings of the insulators. A 241a is provided, and a first conductive element of the conductive element 240a is provided in contact with its side surface, and A second conductor, conductor 240a, is provided on the inside. Also, insulator 272, insulator Insulator 241b is provided in contact with the inner wall of the opening of insulator 280 and insulator 281, and its side A first conductive element of the conductive element 240b is provided in contact with the first conductive element, and a second conductive element of the conductive element 240b is provided further inside. A conductor is provided. Here, the height of the upper surface of the conductor 240 and the upper surface of the insulator 281 The height can be made to be about the same. Note that in transistor 200, the first conductor of conductor 240 The present invention also shows a configuration in which a second conductor of the conductor 240 is laminated, but this invention It is not limited to this. For example, the conductor 240 may be a single layer or a laminated structure of three or more layers. The structure may be configured to be provided in this way. If the structure has a layered structure, an ordinal number may be assigned in the order of formation, and the section They may be treated differently.

[0056] [Transistor 200] As shown in Figure 1, the transistor 200 has an insulator 216 on an insulator 214 and an insulator A conductor 205 is positioned to be embedded in 216, on the insulator 216, and the conductor Insulator 222 on 205, insulator 224 on insulator 222, and conductor on insulator 224 242a and conductor 242b, and disposed between conductor 242a and conductor 242b Oxide 230, conductor 242a, conductor 242b, and insulator 25 on oxide 230 0 and the conductor 260 (conductor 260a and conductor 260b) on the insulator 250, It has. Furthermore, the side surface of the conductor 242a has a region that is in contact with one side surface of the oxide 230. Furthermore, the side surface of the conductor 242b has a region that is in contact with the other side surface of the oxide 230. The height of the upper surface of the electrolytic body 242a, the height of the upper surface of the conductor 242b, and the upper surface of the oxide 230 Their heights are roughly equal.

[0057] Furthermore, insulators 222, 272, and 281 contain hydrogen (for example, hydrogen atoms). It is preferable that it has the function of suppressing the diffusion of at least one of the following: hydrogen molecules. Insulators 222, 272, and 281 contain oxygen (e.g., oxygen atoms, oxygen components). It is preferable that the material has a function to suppress the diffusion of at least one of the following: for example, an insulator. Insulators 222, 272, and 281 each contain more oxygen and than insulator 224. It is preferable that the permeability of one or both hydrogens is low. Insulator 222, Insulator 272, The insulator 281 is more permeable to oxygen and hydrogen, or to one or both, than the insulator 250. Low transient properties are preferable. Insulators 222, 272, and 281 are... It is preferable that each material has lower permeability to oxygen and / or hydrogen than insulator 280. .

[0058] As shown in Figures 1B and 1C, the insulator 272 is located on the top and side surfaces of the conductor 260, and the insulator The sides of 250, the top and sides of conductor 242a, the top and sides of conductor 242b, and the insulation It is preferable that the insulator 280 is in contact with the upper surface of the edge 224. This separates the insulator 224 and oxide 230. Also, by the insulator 272 This suppresses the permeation of either or both oxygen and hydrogen from the insulator 280 to the conductor 260. This suppresses the oxidation of the conductor 260.

[0059] Furthermore, in transistor 200, in the channel formation region and its vicinity, oxide 23 Although the present invention describes a single-layer structure of 0, it is not limited to this. For example, 2 A layered structure or a stacked structure of three or more layers may be provided. Also, transistor 20 In example 0, the conductor 260 is shown as a two-layer structure, but the present invention is not limited to this. No. For example, the conductor 260 may have a single-layer structure or a multilayer structure of three or more layers. That's fine.

[0060] Here, conductor 260 functions as the gate of transistor 200, and conductor 242a And conductor 242b functions as a source or drain, respectively. Zista 200 functions as an oxide semiconductor in oxide 230, which includes a channel-forming region. It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor).

[0061] In the non-conductive state, the transistor 200, which uses an oxide semiconductor in the channel formation region, Because the leakage current (off-current) is extremely low, it is possible to provide semiconductor devices with low power consumption. Furthermore, oxide semiconductors can be deposited using methods such as sputtering, making them suitable for highly integrated semiconductors. It can be used in the transistor 200 that makes up the device.

[0062] For example, as oxide 230, In-M-Zn oxide (where element M is aluminum, galvanic acid) Umium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium One or more types selected from luminous, tantalum, tungsten, or magnesium. It is preferable to use metal oxides such as ) . In particular, element M can be aluminum, gallium, yttrium It is good to use um or tin. Also, as oxide 230, In-Ga oxide, In- Zn oxide may also be used.

[0063] Furthermore, in transistors using oxide semiconductors, channels are formed within the oxide semiconductor. The presence of impurities and oxygen deficiencies in the region makes the electrical properties more prone to fluctuation and reduces reliability. In some cases, oxygen vacancies are present in the region where channels are formed in the oxide semiconductor. Therefore, the transistor tends to exhibit normally-on characteristics. Consequently, a channel is formed. It is preferable that oxygen deficiency in the region is reduced as much as possible. This will improve the electrical characteristics. Transistors that suppress fluctuations in performance, have stable electrical characteristics, and have improved reliability. We can provide the service.

[0064] Furthermore, it is provided so as to be in contact with both sides of the oxide 230, and serves as a source or drain. The conductive material 242 (conductor 242a and conductor 242b) is a conductive oxide. It is preferable to use [a specific type of carrier]. In particular, it is preferable that the generation of carriers does not depend solely on oxygen deficiency and that substitution type [a specific type of carrier] is used. It is preferable that the conductive oxide generates carriers using a pure donor. Even if oxygen vacancies in the conductive material 242 are repaired by excess oxygen, the carrier density in the conductive material 242 remains The decrease in degree can be suppressed. Therefore, conductive oxides can be used even in conditions with little oxygen deficiency. Since carriers are expected to be generated, it is possible to create a transistor with high on-characteristics. The conductor 242 may be any one of tin, tungsten, titanium, or silicon. It is preferable to include indium, or a plurality of other materials. For example, indium tin oxide, oxide Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, Titanium oxide containing indium oxide, titanium oxide containing indium tin oxide, indium Indium tin oxide with added zinc oxide or silicon may also be used.

[0065] Alternatively, zinc oxide with added gallium or titanium oxide with added niobium may be used.

[0066] Furthermore, it is preferable that the conductivity of the conductor 242 is higher than that of the oxide 230. Furthermore, it is preferable that the carrier density of the conductor 242 be higher than that of the oxide 230. This configuration allows the oxide 230 to function as a channel-forming region, and The electrical element 242 can function as either a source or a drain.

[0067] A transistor 200 in one aspect of the present invention has a channel formation region as shown in Figure 1B. Both sides of the oxide 230, which functions as a source, are conductors 24 that function as a source or drain. In step 2, the structure is sandwiched. Also, the height of the upper surface of the conductor 242 and the oxide 230 The height of the top surface is approximately equal. This configuration facilitates channel formation of oxide 230. The shortest distance between the top surface of the region and the conductor 260 which functions as a gate is between the conductor 242 and the conductive Since it is approximately equal to the shortest distance to body 260, it provides a transistor with low parasitic capacitance. This is possible. Also, there is a step between the channel-forming region of the oxide 230 and the conductor 260. Because they are not formed or are only slightly formed, on the channel-forming region of oxide 230, The insulator 250 on the conductor 242 can be installed with almost no step difference, so This is preferable because it improves the coverage of the edge body 250 and enhances the dielectric strength of the insulator 250.

[0068] Furthermore, as shown in Figure 1C, the conductor 260, which functions as a gate, is located in the channel formation region. The oxide 230 has a configuration in which the sides and top surface are covered with an insulator 250, and the conductor This makes it easier to apply the 260 electric field to the entire oxide 230 in the channel formation region. The on-current of the Rangitor 200 can be increased, improving its frequency characteristics.

[0069] Based on the above, it is possible to provide a semiconductor device having a transistor with a large on-current. Alternatively, it is possible to provide a semiconductor device having a transistor with high frequency characteristics. It can do so. Alternatively, it can suppress fluctuations in electrical characteristics, have stable electrical characteristics, and improve reliability. We can provide an improved semiconductor device, or a transistor with a low off-current. A semiconductor device having the following characteristics can be provided.

[0070] The following describes the detailed configuration of a semiconductor device having a transistor 200 according to one aspect of the present invention. I will explain this.

[0071] The conductor 205 is arranged to overlap with the oxide 230 and the conductor 260. Preferably, the conductor 205 is embedded in the insulator 216.

[0072] Here, when the conductor 260 functions as the first gate (also called the top gate) Furthermore, conductor 205 functions as a second gate (also called a bottom gate). There are cases where this is the case. In that case, the potential applied to the conductor 205 is the same as the potential applied to the conductor 260. By changing it independently without linking it, the Vth of transistor 200 can be controlled. This can be done. In particular, by applying a negative potential to the conductor 205, the transistor 200 By making Vth greater than 0V, it becomes possible to reduce the off-current. Therefore, conductor Applying a negative potential to 205 results in a higher rate of electricity being applied to the conductor 260 compared to not applying a negative potential. The drain current can be reduced when the voltage is 0V.

[0073] Furthermore, as shown in Figure 1A, the conductor 205 is set to be larger than the oxide 230. It is good to do so. In particular, as shown in Figure 1C, the conductor 205 is the channel width of the oxide 230. It is preferable that the region extends even in the area outside the end where it intersects with the direction. On the outer side of the side surface of the material 230 in the channel width direction, there is a conductor 205 and a conductor 26 0 is preferably superimposed via an insulator. Alternatively, the conductor 205 can be made larger. By doing so, in the plasma-based processing of the manufacturing process after the formation of the conductor 205, In some cases, it may be possible to mitigate localized charging (called charge-up). However, One aspect of the invention is not limited thereto. Conductor 205 comprises at least conductor 242a and It is sufficient to superimpose it with the oxide 230 located between it and the electrolytic body 242b.

[0074] With the above configuration, the electric field of the conductor 260 which functions as the first gate, The electric field of the conductor 205, which functions as a second gate, electrifies the channel formation region. It can be surrounded by air. In this specification, the first gate and the second gate The structure of the transistor, in which the channel formation region is electrically surrounded by an electric field, is called a surro This is called an underdated channel (S-channel) structure.

[0075] The conductor 205 is in contact with the inner wall of the opening of the insulator 216, and a lower layer film of the conductor 205 is formed. The upper layer of the conductor 205 is formed inside the lower layer of the conductor 205. Here, the conductive The height of the top surface of body 205 and the height of the top surface of insulator 216 can be made to be approximately the same.

[0076] Here, the underlying film of the conductor 205 consists of hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, and nitrogen molecules. A device that suppresses the diffusion of impurities such as nitrogen oxide molecules (N2O, NO, NO2, etc.) and copper atoms. It is preferable to use a conductive material that has the ability to (preferably prevent the above-mentioned impurities from penetrating) or, It has the function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable to use a conductive material (that is impermeable to the above-mentioned oxygen). The function of suppressing the diffusion of impurities or oxygen is to suppress the diffusion of the above-mentioned impurities or oxygen. The function is to suppress any one or all of the diffusion. In this specification, a device having such a function is used. A conductive material is sometimes called a conductive barrier film.

[0077] The underlying film of the conductor 205 has the function of suppressing oxygen diffusion, thus the conductor 205 This prevents the upper layer from oxidizing and reducing its conductivity. It also has the function of suppressing oxygen diffusion. Examples of conductive materials having this property include titanium, titanium nitride, tantalum, tantalum nitride, It is preferable to use ruthenium or ruthenium oxide. Therefore, the conductor 205 The underlying layer can be made of the above conductive material in a single layer or in multiple layers. This allows for the formation of hydrogen and water This suppresses the diffusion of impurities such as these into the transistor 200 side through the conductor 205. This is possible. In this embodiment, as the conductor 205a, tantalum nitride and titan nitride Use n.

[0078] Furthermore, the upper layer of the conductor 205 is mainly composed of tungsten, copper, or aluminum. It is preferable to use a conductive material. In this embodiment, as the upper layer film of the conductor 205 Tungsten is used.

[0079] Here, an oxide semiconductor, an insulator or conductor located beneath the oxide semiconductor, and an acid A different film is used to separate an insulator or conductor located on the upper layer of a semiconductor without opening it to the atmosphere. By continuously depositing seeds into a film, the concentration of impurities (especially hydrogen and water) is reduced, resulting in a substantially high-purity product. This is preferable because it allows for the formation of highly intrinsic oxide semiconductor films.

[0080] For example, using a film deposition apparatus having multiple processing chambers, an insulator 216 and a conductive The insulator 222, the insulator 224, and the oxide 230 are arranged on the body 205. The films can be deposited sequentially in a continuous process.

[0081] Insulators 214, 272, and 281 contain impurities such as water or hydrogen. A barrier insulating film that prevents contamination of transistor 200 from the substrate side or from above. It is preferable that it functions as such. Therefore, insulator 214, insulator 272, and insulating Body 281 consists of a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, and a nitrogen oxide molecule (N2O It has the function of suppressing the diffusion of impurities such as copper atoms (NO, NO2, etc.) It is preferable to use an insulating material that is impermeable to oxygen (for example, oxygen atoms). Alternatively, oxygen (for example, oxygen atoms) , has the function of suppressing the diffusion of at least one of the above oxygen molecules (making it difficult for the above oxygen to permeate) i) It is preferable to use an insulating material.

[0082] For example, silicon nitride is preferred as the insulator 214 and the insulator 281. This is because impurities such as water or hydrogen can penetrate from the substrate side beyond the insulator 214. This can suppress diffusion towards the Zistor 200 side. Alternatively, it can be contained in the insulator 224, etc. This suppresses the diffusion of oxygen from the insulator 214 towards the substrate side.

[0083] Furthermore, for example, aluminum oxide can be used as the insulator 272. As a result, impurities such as water or hydrogen are located above the insulator 272. To suppress diffusion from 80, or / and conductor 246, etc., towards transistor 200. It is possible.

[0084] Furthermore, the insulators 214 and 281 may have a laminated structure. For example, oxidation A laminated structure of an aluminum film and a silicon nitride film is used for insulators 214 and 281. It is preferable to use it. The aluminum oxide film supplies oxygen to the area below the insulator 214. This is possible. Furthermore, the silicon nitride film expands from the substrate side to the transistor 200 side. It can suppress the diffusion of impurities such as hydrogen and water. Also, below the insulator 281 It can supply oxygen to transistor 2 from the outside through the silicon nitride film. This can suppress the diffusion of impurities such as hydrogen and water that would otherwise diffuse towards the 00 side.

[0085] Furthermore, insulators 216 and 280 have a lower dielectric constant than insulator 214. This is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings is reduced. For example, silicon oxide, oxide, silicon oxide can be used as insulator 216 and insulator 280. Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon Silicon oxide with added carbon and nitrogen, or silicon oxide with added carbon and nitrogen, or having vacancies Silicon oxide or similar materials can be used as appropriate.

[0086] Insulators 222 and 224 function as gate insulators.

[0087] Here, the insulator 224 in contact with the oxide 230 is preferably such that oxygen is removed by heating. In this specification, oxygen released by heating may be referred to as excess oxygen. For example, The edge body 224 may be made of silicon oxide or silicon oxide nitride, etc., as appropriate. By providing an insulating material in contact with the oxide 230, oxygen deficiency in the oxide 230 is reduced. This can improve the reliability of transistor 200.

[0088] Specifically, as the insulator 224, an oxide material is used from which some oxygen is desorbed by heating. It is preferable to do so. Oxides that desorb oxygen upon heating are TDS (Thermal D In the esorption spectroscopy analysis, the amount of oxygen molecules removed was 1.0 ×10 18 molecular / cm² 3 Preferably 1.0 × 10 19 Mouth vacuum les / cm 3 More preferably 2.0 × 10 19 molecular / cm² 3 Below Top, or 3.0 × 10 20 molecular / cm² 3 The above describes the oxide film. The surface temperature of the film during the above TDS analysis is between 100°C and 700°C, or A temperature range of 100°C to 400°C is preferred.

[0089] Insulator 222 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. It is preferable that it functions as a barrier insulating film that suppresses this. For example, insulator 222 is It is preferable that the hydrogen permeability is lower than that of insulator 224. Insulator 222 and insulator 27 By surrounding the insulator 224 and oxide 230, etc., water or This can prevent impurities such as hydrogen from entering transistor 200.

[0090] Furthermore, the insulator 222 contains oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable that the material has a function to suppress diffusion (i.e., the oxygen does not easily permeate it). For example, insulation It is preferable that body 222 has lower oxygen permeability than insulator 224. By having the function of suppressing the diffusion of impurities, the oxygen contained in oxide 230 becomes insulator 2 This is preferable because it reduces diffusion below 22. Also, the conductor 205 is an insulator. This can suppress the reaction of body 224 with oxygen present in oxide 230.

[0091] The insulator 222 is made of either or both aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Aluminum and / or hafnium. Insulators containing oxides include aluminum oxide, hafnium oxide, aluminum and ha It is preferable to use an oxide containing hafnium (such as hafnium aluminate). When an insulator 222 is formed using the same material, the insulator 222 is acid from the oxide 230. The emission of elemental particles and the introduction of impurities such as hydrogen from the peripheral area of ​​transistor 200 into oxide 230. It functions as an inhibitory layer.

[0092] Alternatively, these insulators may be, for example, aluminum oxide, bismuth oxide, germanium oxide. Umium, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Zirconium oxide may be added. Alternatively, these insulators may be subjected to nitriding treatment. Silicon oxide, silicon oxide nitride, or silicon nitride may be laminated as the insulator. .

[0093] Furthermore, the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT) Includes so-called high-k materials such as iO3 or (Ba,Sr)TiO3 (BST). The insulating material may be used in a single layer or multilayer configuration. As transistors become smaller and more highly integrated... However, thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as an insulator, the physical film thickness can be maintained. This makes it possible to reduce the gate potential during transistor operation.

[0094] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. good.

[0095] For oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Example For example, use one with an energy gap of 2 eV or more, preferably 2.5 eV or more. This is preferable. By using a metal oxide with a large energy gap in this way, The off-current of the transistor can be reduced. By using such a transistor, We can provide low-power semiconductor devices.

[0096] The electron affinity or energy level Ec at the lower end of the conduction band is, as shown in Figure 13, the vacuum level. The ionization potential Ip is the difference between Evac and the energy Ev at the top of the valence band, and It can be determined from the energy gap Eg. The ionization potential Ip is, for example, Ultraviolet Photoelectron Spectroscopy (UPS) It can be measured using a spectroscopy device. Energy gap Eg can be measured, for example, using a spectroscopic ellipsometer.

[0097] Insulator 250 functions as a gate insulator. Insulator 250 is on top of oxide 230c It is preferable to arrange them in contact with the surface. The insulator 250 is silicon oxide, silicon oxide and nitride. silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, carbon-added acid Using silicon oxide, silicon oxide with added carbon and nitrogen, and silicon oxide with voids This is possible. In particular, silicon oxide and silicon oxide-nitride are stable to heat. It is preferable.

[0098] Similar to insulator 224, insulator 250 uses an insulator that releases oxygen upon heating. It is preferable to form an insulator that releases oxygen upon heating, as insulator 250. By providing it in contact with the upper surface of oxide 230c, the channel formation region of oxide 230b It can effectively supply oxygen. Also, similar to insulator 224, insulator 250 It is preferable that the concentration of impurities such as water or hydrogen is reduced. The film thickness of the insulator 250 is It is preferable that the wavelength be between 1 nm and 20 nm.

[0099] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. It is preferable to suppress oxygen diffusion from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 is suppressed. This is suppressed. In other words, the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Furthermore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0100] Furthermore, the metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxide nitride is used for the insulator 250, the metal acid For the oxide, it is preferable to use a metal oxide, which is a high-k material with a high dielectric constant. The insulator is made of a laminated structure of insulator 250 and the metal oxide, making it safe against heat. A laminated structure with constant dielectric constant and high relative permittivity can be achieved. Therefore, the physical properties of the gate insulator This makes it possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. Furthermore, it becomes possible to reduce the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator. .

[0101] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, t Magnesium, titanium, tantalum, nickel, germanium, or magnesium, etc. A metal oxide containing one or more selected types can be used. In particular, A An insulator containing an oxide of either luminium or hafnium, or both. Aluminum, hafnium oxide, aluminum and hafnium oxides (hafnium oxide) It is preferable to use materials such as luminescent coatings.

[0102] Alternatively, the metal oxide may function as part of the gate. It is preferable to provide an oxygen-containing conductive material on the channel-forming region side. By providing this on the channel-forming region side, oxygen released from the conductive material can form channels. It will become easier to supply the region.

[0103] In particular, it is contained in the metal oxide in which the channel is formed, as a conductor that functions as a gate. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing elements and nitrogen may be used. In addition, indium tin oxide and tung oxide may be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, and tungsten oxide. Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide with added silicon may also be used. Um gallium zinc oxide may also be used. By using such a material, the channel shape In some cases, hydrogen contained in the metal oxide that is formed can be captured. Alternatively, the outside In some cases, it is possible to capture hydrogen that has been introduced from insulators and other materials.

[0104] Conductor 260a contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules. Conductive material (such as N2O, NO, NO2, etc.) has the function of suppressing the diffusion of impurities such as copper atoms. It is preferable to use a material with low oxygen content. Alternatively, a small amount of oxygen (for example, oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material that has the function of suppressing the diffusion of at least (1).

[0105] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, or similar materials.

[0106] Furthermore, the conductor 260b is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use a conductive material. Also, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material. For example, tungsten, copper, or aluminum. A conductive material mainly composed of um can be used. In addition, the conductor 260b has a laminated structure. This may also be the case, for example, a laminated structure of titanium, titanium nitride and the above-mentioned conductive material. .

[0107] Insulator 280 may be, for example, silicon oxide, silicon oxide nitride, or nitrogen. Silicon oxide, fluorine-added silicon oxide, carbon-added silicon oxide, carbon The material may include silicon oxide with added nitrogen, or silicon oxide with voids. Preferred. In particular, silicon oxide and silicon oxide nitride are preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxide-nitride, and silicon oxide with vacancies are This is preferable because it allows for the easy formation of regions containing oxygen that is released by heating.

[0108] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. Furthermore, the upper surface of the insulator 280 may be flattened.

[0109] The insulator 281 prevents impurities such as water or hydrogen from mixing into the insulator 280 from above. It is preferable that it functions as a suppressive barrier insulating film. Examples of insulators 281 include: An insulator such as aluminum oxide, silicon nitride, or silicon nitride oxide can be used. .

[0110] Conductors 240a and 240b are primarily composed of tungsten, copper, or aluminum. It is preferable to use a conductive material as a component. Also, the conductor 240a and the conductor 24 0b may have a laminated structure.

[0111] Also, when the conductor 240 has a laminated structure, the insulator 281, the insulator 280, and the insula tor in contact with the conductor 272 preferably use a conductive material having a function of suppressing the permeation of impurities such as water or hydrogen. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Also, water or a conductive material having a function of suppressing the permeation of impurities such as hydrogen may be used in a single layer or a laminate. By using the conductive material, oxygen added to the insulator 280 can be prevented from being absorbed by the conductor 240 a and the conductor 240b. Also, impurities such as water or hydrogen from the upper layer of the insulator 281 can be suppressed from mixing into the oxide 230 through the conductor 240a and the conductor 240b. a and the conductor 240b. Also, impurities such as water or hydrogen from the upper layer of the insulator 281 can be suppressed from mixing into the oxide 230 through the conductor 240a and the conductor 240b.

[0112] As the insulator 241a and the insulator 241b, for example, insulators such as aluminum oxide, silicon nitride, or silicon oxynitride may be used Since the insulator 241a and the insulator 241b are provided in contact with the insulator 272, impurities such as water or hydrogen from the insulator 280 or the like can be suppressed from mixing into the oxide 230 through the conductor 240a and the conductor 240b. Also, oxygen contained in the insulator 280 can be prevented from being absorbed by the conductor 240a and the conductor 240b.

[0113] Also, it functions as wiring in contact with the upper surface of the conductor 240a and the upper surface of the conductor 240b The conductor 246 (conductor 246a and conductor 246b) may be arranged. Conductor 2 46 preferably uses a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride and the above-mentioned conductive material. Note that the conductor may be formed so as to be embedded in an opening provided in an insulator.

[0114] <Configuration Example 2 of Semiconductor Device> Here, an example of a semiconductor device having a transistor 201 with a configuration different from that of the transistor 200 will be described. FIGS. 2A, 2B, and 2C are top views and cross-sectional views of the transistor 201 according to one aspect of the present invention and the periphery of the transistor 201.

[0115] FIG. 2A is a top view of a semiconductor device having a transistor 201. FIGS. 2B and 2C are cross-sectional views of the semiconductor device. Here, FIG. 2B is a cross-sectional view of the portion indicated by the dashed line A!-A2 in FIG. 2A, and is also a cross-sectional view in the channel length direction of the transistor 201. FIG. 2C is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 2A, and is also a cross-sectional view in the channel width direction of the transistor 201. In the top view of FIG. 2A, some elements are omitted for clarity of the drawing.

[0116] [Transistor 201] As shown in FIG. 2, the transistor 201 includes an insulator 216 on an insulator 214, a conductor 205 arranged to be embedded in the insulator 216, an insulator 222 on the insulator 216 and on the conductor 2 05, an insulator 224 on the insulator 222, and a conductor 2 on the insulator 224 05, and an insulator 224 on the insulator 222, and a conductor 2 on the insulator 224 42a and conductor 242b, and acid placed between conductor 242a and conductor 242b The oxide 230a and the conductor 242a and conductor 242b located on the oxide 230a are arranged The oxide 230b is placed on the conductor 242a, the conductor 242b, and on the oxide 230b. The oxide 230c, the insulator 250 on the oxide 230c, and the conductor 26 on the insulator 250 It has 0 (conductor 260a and conductor 260b), and also the side of conductor 242a The surface has a region that is in contact with one side surface of oxide 230a and oxide 230b, and the conductor 2 The side surface of 42b has a region that is in contact with the other side surface of oxide 230a and oxide 230b. Furthermore, the height of the upper surface of conductor 242a, the height of the upper surface of conductor 242b, and oxide 2 The heights of the top surfaces of 30b are all approximately equal.

[0117] For example, as oxide 230a, oxide 230b, and oxide 230c, In-M- Zn oxide (element M is aluminum, gallium, yttrium, tin, copper, vanadium, Beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum Lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable to use metal oxides such as one or more selected from elements like cilium. Element M can be aluminum, gallium, yttrium, or tin. In-Ga oxide and In-Zn oxide may be used as material 230.

[0118] Furthermore, in transistors using oxide semiconductors, channels are formed within the oxide semiconductor. The presence of impurities and oxygen deficiencies in the region makes the electrical properties more prone to fluctuation and reduces reliability. There may be cases. Also, if the region where the channel is formed in the oxide semiconductor contains oxygen deficiency , the transistor tends to have normally-on characteristics. Therefore, it is preferable that the oxygen deficiency in the region where the channel is formed is reduced as much as possible. This can suppress fluctuations in electrical characteristics, provide a transistor with stable electrical characteristics and improved reliability. Moreover, as the conductor 242 (conductor 242a and conductor 242b) that is provided so as to contact both side surfaces of the oxide 230a and the oxide 230b and functions as a source or a drain, it is preferable to use a conductive oxide. In particular, it is preferable that the generation of carriers does not depend only on oxygen deficiency, but is a conductive oxide that generates carriers by substitutional impurity donors. That is, even if the oxygen deficiency in the conductor 242 is restored by excess oxygen, a decrease in the carrier density in the conductor 242 can be suppressed. Therefore, since carriers are considered to be generated even in a state where the conductive oxide has little oxygen deficiency, a transistor with high on characteristics can be obtained. As the conductor 242, it is preferable to include any one or more of tin, tungsten, titanium, or silicon, and indium. For example, indium stannate, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium stannate containing titanium oxide, indium zinc oxide, indium stannate added with silicon may be used. Or, zinc oxide added with gallium or titanium oxide added with niobium may be used.

[0119] Also, it is provided so as to contact both side surfaces of the oxide 230a and the oxide 230b, and as the conductor 242 (conductor 242a and conductor 242b) that functions as a source or a drain , it is preferable to use a conductive oxide. In particular, it is preferable that the generation of carriers does not depend only on oxygen deficiency, but is a conductive oxide that generates carriers by substitutional impurity donors. That is, even if the oxygen deficiency in the conductor 242 is restored by excess oxygen, a decrease in the carrier density in the conductor 242 can be suppressed. Therefore, since carriers are considered to be generated even in a state where the conductive oxide has little oxygen deficiency, a transistor with high on characteristics can be obtained. As the conductor 242, it is preferable to include any one or more of tin, tungsten, titanium, or silicon, and indium. For example, indium stannate, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium stannate containing titanium oxide, indium zinc oxide, indium stannate added with silicon may be used. Or, zinc oxide added with gallium or titanium oxide added with niobium may be used. , it is preferable to include any one or more of tin, tungsten, titanium, or silicon, and indium. For example, indium stannate, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium stannate containing titanium oxide, indium zinc oxide, indium stannate added with silicon may be used. Or, zinc oxide added with gallium or titanium oxide added with niobium may be used.

[0120] Or, zinc oxide added with gallium or titanium oxide added with niobium may be used. ​​​​

[0121] Furthermore, the conductivity of conductor 242 is greater than that of oxide 230a and oxide 230b. It is also preferable that the carrier density of the conductor 242 is high. It is preferable that the carrier density is higher than that of compound 230b. By adopting such a configuration, Oxide 230a and oxide 230b function as channel-forming regions, and conductor 242 It can function as either a source or a drain.

[0122] Transistor 201, according to one aspect of the present invention, has a channel formation region as shown in Figure 2B. The oxide 230b functions as a source or drain on both sides of the conductor 2 42 is a sandwiched configuration. Also, the height of the upper surface of the conductor 242 and the oxide 230 The height of the top surface of b is approximately equal. With this configuration, the channel of oxide 230b The shortest distance between the upper surface of the gate-forming region and the conductor 260 which functions as a gate is between the conductor 242 and Since this is approximately equal to the shortest distance to the conductor 260, a transistor with small parasitic capacitance is proposed. It can be provided. Also, between the channel-forming region of oxide 230b and the conductor 260 Because no or only slight steps are formed, the channel-forming region of oxide 230b is formed. The insulator 250 on top and on the conductor 242 can be installed with almost no step difference. This improves the coverage of the insulator 250, and thus improves the dielectric strength of the insulator 250, which is desirable. It seems so.

[0123] Furthermore, as shown in Figure 2C, the oxide 230a and In the region where the oxide 230b and the conductor 260 do not overlap, the height of the bottom surface of the conductor 260 It is preferable that the element is positioned lower than the height of the bottom surface of oxide 230b. , the bottom surface of the conductor 260 in the region where the oxide 230b and the conductor 260 do not overlap. The difference between the height and the height of the bottom surface of oxide 230b is preferably 0 nm or more and 100 nm or less. The wavelength is 3 nm to 50 nm, more preferably 5 nm to 20 nm.

[0124] Furthermore, as shown in Figure 2C, the conductor 260, which functions as a gate, is located in the channel formation region. The sides of oxide 230a and oxide 230b and the top surface of oxide 230b are insulated by insulator 25 The configuration is such that it covers through 0, and the electric field of the conductor 260 is connected to the oxide 23 in the channel-forming region. This makes it easier to apply to both 0a and oxide 230b. Therefore, the O This can increase the current and improve the frequency characteristics.

[0125] Based on the above, it is possible to provide a semiconductor device having a transistor with a large on-current. Alternatively, it is possible to provide a semiconductor device having a transistor with high frequency characteristics. It can do so. Alternatively, it can suppress fluctuations in electrical characteristics, have stable electrical characteristics, and improve reliability. We can provide an improved semiconductor device, or a transistor with a low off-current. A semiconductor device having the following characteristics can be provided.

[0126] Oxide 230 consists of oxide 230a, oxide 230b on oxide 230a, and oxide 2 It has oxide 230c on 30b, and oxide 230a below oxide 230b. Therefore, impurities are transferred from the structure formed below oxide 230a to oxide 230b. Diffusion can be suppressed. Also, by having oxide 230c on oxide 230b , diffusion of impurities from structures formed above oxide 230c to oxide 230b It can be suppressed.

[0127] Furthermore, oxide 230 has a layered structure due to oxides with different atomic ratios of each metal atom. It is preferable that the metal oxide used in oxide 230a contains constituent elements The atomic ratio of element M in the oxide is the element of the constituent elements in the metal oxide used in oxide 230b. It is preferable that the ratio is greater than the atomic ratio of element M. Also, the metal oxide used in oxide 230a In this case, the atomic ratio of element M to In is in the metal oxide used in oxide 230b. Furthermore, it is preferable that the atomic ratio of element M to In is greater than that of In. Also, in oxide 230b In the metal oxide used, the atomic ratio of In to element M is used in oxide 230a. It is preferable that the atomic ratio of In to element M in the metal oxide is greater than that of In. Oxide 230c is a metal oxide that can be used in place of oxide 230a or oxide 230b. The object can be used.

[0128] Furthermore, it is preferable that the oxide 230b is crystalline. For example, CAAC, which will be described later. -OS(c-axis aligned crystalline oxide sem It is preferable to use an iconductor. Oxides have few impurities or defects (such as oxygen vacancies), are highly crystalline, and have a dense structure. Therefore, the extraction of oxygen from oxide 230b by the source or drain is suppressed. This can be controlled. As a result, even when heat treatment is performed, oxygen is extracted from oxide 230b. Because it can reduce the risk of burning, transistor 201 is designed to withstand high temperatures during the manufacturing process (so It is stable against thermal budgets.

[0129] Furthermore, the energy at the lower end of the conduction band of oxide 230a and oxide 230c is that of oxide 23 It is preferable that the energy is higher than the energy at the lower end of the conduction band at 0b. In other words, oxidation The electron affinity of material 230a and oxide 230c is smaller than the electron affinity of oxide 230b. It is preferable.

[0130] Here, at the junction of oxide 230a, oxide 230b, and oxide 230c, The energy levels at the lower end of the conduction band change smoothly. In other words, oxide 230a, oxidation The energy levels at the lower end of the conduction band at the junction of material 230b and oxide 230c are This can also be described as a continuous change or continuous bonding. To achieve this, oxides are used. At the interface between 230a and oxide 230b, and at the interface between oxide 230b and oxide 230c It is desirable to lower the defect level density of the mixed layer formed therein.

[0131] Specifically, for oxide 230a, In:Ga:Zn = 1:3:4 [atomic ratio], Alternatively, a metal oxide in an atomic ratio of 1:1:0.5 may be used. Also, oxide 230b and Then, gold in an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2. A group oxide can be used. Also, for oxide 230c, In:Ga:Zn = 1:3:4 [Atomic ratio], In:Ga:Zn=4:2:3 [Atomic ratio], Ga:Zn=2:1 [Atom A metal oxide with a specific ratio, or Ga:Zn=2:5 [atomic ratio], can be used. A specific example of a layered structure for 230c is In:Ga:Zn=4:2:3[ [atomic ratio] and a layered structure of Ga:Zn=2:1 [atomic ratio], In:Ga:Zn=4: Layered structures of 2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], In:Ga:Z Examples include a layered structure with gallium oxide and a ratio of n=4:2:3 [number of atoms].

[0132] In this case, the main carrier pathway is oxide 230b. Oxide 230a, oxide 2 By configuring 30c as described above, the interface between oxide 230a and oxide 230b, and the acid The defect level density at the interface between the ion 230b and the oxide 230c can be reduced. Therefore, the influence of interfacial scattering on carrier conduction is reduced, and transistor 201 is high This allows for obtaining ion current and high frequency characteristics. When constructed, the defect level density at the interface between the aforementioned oxide 230b and oxide 230c In addition to the effect of lowering the noise level, the constituent elements of oxide 230c diffuse towards the insulator 250. It is expected that this will be suppressed. More specifically, the oxide 230c is made into a layered structure, and the layered In order to position an In-free oxide above the structure, In can diffuse towards the insulator 250 side. This can be suppressed. The insulator 250 functions as a gate insulator, so In expands. If dispersed, it will result in transistor characteristics defects. Therefore, oxide 230c is used in a layered structure. This makes it possible to provide highly reliable semiconductor devices. For the configuration and effects of transistor 201, please refer to transistor 200. It is possible.

[0133] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.

[0134] <Circuit board> For example, an insulating substrate can be used to form transistors 200 and 201. A substrate, semiconductor substrate, or conductive substrate may be used. Examples of insulating substrates include: Glass substrate, quartz substrate, sapphire substrate, stabilized zirconia substrate (yttria-stabilized zirconia) Examples include conia substrates and resin substrates. Also, semiconductor substrates include, for example, silicon. , a semiconductor substrate made of germanium, or silicon carbide, silicon germanium, A compound semiconductor substrate consisting of gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. There are also semiconductor substrates having insulating regions within the aforementioned semiconductor substrate, for example, Examples include SOI (Silicon On Insulator) substrates. These include graphite substrates, metal substrates, alloy substrates, conductive resin substrates, etc. Alternatively, metal nitriding. These include substrates containing materials, substrates containing metal oxides, and others. Furthermore, conductive materials can be added to insulating substrates. or a substrate on which a semiconductor is provided, a substrate on which a conductor or insulator is provided on a semiconductor substrate, There are substrates on which semiconductors or insulators are provided. Or, these substrates have elements A substrate with a child component may also be used. The elements provided on the substrate include capacitive elements and resistive elements. Examples include sub-elements, switch elements, light-emitting elements, and memory elements.

[0135] <insulator> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.

[0136] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.

[0137] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum, and hafnium, aluminum and hafnium Oxidized nitrides, silicon and hafnium oxides, silicon and hafnium Examples include oxide nitrides containing um, or nitrides containing silicon and hafnium.

[0138] Furthermore, examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, and silicon nitride oxide. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Silicon oxide with added carbon and nitrogen, porous silicon oxide, or resins, etc. be.

[0139] Furthermore, transistors using oxide semiconductors suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has a controlling function, the electrical characteristics of the transistor are stabilized. This is possible. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, or Insulators containing tan, neodymium, hafnium, or tantalum are used in single-layer or multi-layer configurations. It would be good to have one. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As a supporting material, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or metal oxides such as tantalum oxide, aluminum nitride, titanium aluminum nitride, nitrile Metal nitrides such as titanium dioxide, silicon nitride, or silicon nitride can be used. .

[0140] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.

[0141] <Conductive material> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten nitride, nitrides containing titanium and aluminum, tantalum and aluminum Luminium-containing nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum, oxides containing lanthanum and nickel, etc. Tantalum nitride, titanium nitride, nitrides containing titanium nitride and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or acid It is preferable because it is a material that maintains conductivity even after absorbing elements such as phosphorus. Highly electrically conductive semiconductors, such as polycrystalline silicon containing nickel, You may also use silicides such as D.

[0142] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.

[0143] Furthermore, when using oxide in the channel formation region of a transistor, as the gate A functional conductor combines a material containing the aforementioned metal element with a conductive material containing oxygen. It is preferable to use a combined laminated structure. In this case, an oxygen-containing conductive material is channeled It is preferable to place it on the channel formation region side. The oxygen-containing conductive material should be placed on the channel formation region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel-forming region.

[0144] In particular, it is contained in the metal oxide in which the channel is formed, as a conductor that functions as a gate. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing elements and nitrogen may be used. For example, titanium nitride, tantalum nitride, etc. A conductive material containing nitrogen may also be used. In addition, indium tin oxide and tungsten oxide may be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, Indium tin oxide with added silicon may also be used. Zinc oxide may be used. By using such a material, channels can be formed. In some cases, hydrogen contained in the metal oxide can be captured. Alternatively, the outer insulator In some cases, hydrogen introduced from sources such as these can be captured.

[0145] <Metal oxides> It is preferable to use a metal oxide that functions as an oxide semiconductor as oxide 230. The following describes metal oxides applicable to the oxide 230 according to the present invention.

[0146] The metal oxide preferably contains at least indium or zinc. In particular, indium Preferably, it contains aluminum and zinc. In addition, aluminum and gallium It is preferable that it contains yttrium or tin, as well as boron, titanium, and iron. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , one of the following selected from hafnium, tantalum, tungsten, or magnesium, It may include multiple species.

[0147] Here, the metal oxide is In-M-Zn oxide, which has indium, element M, and zinc. Let's consider the case where it is a substance. Note that element M is aluminum, gallium, yttrium, and This is tin, etc. Other elements that can be applied to element M include boron, titanium, iron, and nitrile. Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Ha Examples include fluorium, tantalum, tungsten, and magnesium. However, as element M, In some cases, it is acceptable to combine multiple of the aforementioned elements.

[0148] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.

[0149] [Structure of metal oxides] Oxide semiconductors (metal oxides) include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It can be divided into conductors and conductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS, multi-phase Amorphous oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor (a-like OS: amor (Phosphorus-like oxide semiconductor), and amorphous oxide Examples include semiconductors.

[0150] CAAC-OS has c-axis orientation and multiple nanocrystals are linked in the ab-plane direction. It has a crystalline structure that is linked and distorted. Note that distortion refers to the linkage between multiple nanocrystals. Within a region, between a region with a aligned grid arrangement and another region with a aligned grid arrangement, the grid arrangement This refers to the point where the orientation has changed.

[0151] Nanocrystals are based on a hexagonal shape, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also cases where the distortion has a grid arrangement such as pentagons and heptagons. Furthermore, in CAAC-OS, even near strain, clear grain boundaries (grain bows) are present. It is difficult to confirm (also called unduli). In other words, due to the distortion of the lattice arrangement, the crystal It can be seen that grain boundary formation is suppressed. This is because CAAC-OS is in the ab-plane direction. In this case, the arrangement of oxygen atoms is not dense, and the substitution of metal elements reduces the interatomic bond distance. This is because the distortion can be tolerated due to changes in other factors.

[0152] Furthermore, CAAC-OS consists of a layer containing indium and oxygen (hereinafter referred to as the In layer), and A layered crystal in which layers containing element M, zinc, and oxygen (hereinafter referred to as (M,Zn) layers) are stacked. It tends to have a structure (also called a layered structure). Note that indium and element M are relative to each other. It is interchangeable, and if element M in the (M,Zn) layer is replaced with indium, then (In,M,Zn It can also be represented as a layer. Furthermore, if the indium in the In layer is replaced by element M, (In, It can also be represented as layer M.

[0153] CAAC-OS is a highly crystalline metal oxide. On the other hand, CAAC-OS has a clear bond. Because it is difficult to confirm grain boundaries, a decrease in electron mobility caused by grain boundaries is less likely to occur. It can be said that... Also, the crystallinity of metal oxides decreases due to the inclusion of impurities and the formation of defects. Because this can occur, CAAC-OS may contain impurities or defects (oxygen deficiencies (VO: oxygen v It can also be said that it is a metal oxide with low acancy (also called acancy). Therefore, CAAC- Metal oxides containing OS have stable physical properties. Therefore, CAAC-OS is Metal oxides are heat-resistant and highly reliable.

[0154] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. Also, nc-OS has different na No regularity is observed in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analytical method, nc-OS may be a-like OS or amorphous oxide semiconductor. It can sometimes be indistinguishable from the body.

[0155] Furthermore, indium is a type of metal oxide containing indium, gallium, and zinc. Um-gallium-zinc oxide (hereinafter referred to as IGZO) is stable when formed into the nanocrystals described above. It may take on a structure. In particular, IGZO tends to have difficulty growing crystals in the atmosphere. Smaller crystals (for example) are preferable to larger crystals (here, crystals of a few millimeters or a few centimeters). In some cases, using the aforementioned nanocrystal structure may result in greater structural stability.

[0156] a-like OS is a metallic acid having a structure between nc-OS and amorphous oxide semiconductors. It is a monster. a-like OS has porous or low-density regions. That is, a-li ke OS has lower crystallinity compared to nc-OS and CAAC-OS.

[0157] Oxide semiconductors (metal oxides) can take on diverse structures, each possessing different properties. An oxide semiconductor according to one aspect of the present invention is an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, and a-li It may have two or more of the following: ke OS, nc-OS, and CAAC-OS.

[0158] [impurities] Here, we will explain the effects of various impurities in metal oxides.

[0159] In addition, when an alkali metal or an alkaline earth metal is contained in a metal oxide, defect levels may be formed and carriers may be generated. Therefore, a transistor using a metal oxide containing an alkali metal or an alkaline earth metal in the channel formation region tends to have normally-on characteristics. For this reason, it is preferable to reduce the concentration of the alkali metal or the alkaline earth metal in the metal oxide. Specifically, the concentration of the alkali metal or the alkaline earth metal in the metal oxide obtained by SIMS (concentration obtained by secondary ion mass spectrometry (SIMS)) is 1×10 atoms / cm or less, preferably 2×10 atoms / cm or less. (Concentration obtained by secondary ion mass spectrometry (SIMS)). [[ID=1ST]] ×10 18 atoms / cm 3 以下、好ましくは2×10 16 atoms / cm 3 以下に する。

[0160] In addition, hydrogen contained in the metal oxide may react with oxygen bonded to the metal atom to form water, thereby forming oxygen vacancies. When hydrogen enters the oxygen vacancies, carriers such as electrons may be generated. In addition, a part of hydrogen may bond with oxygen bonded to the metal atom to generate carriers such as electrons. Therefore, a transistor using a metal oxide containing hydrogen tends to have normally-on characteristics. 、酸素欠損を形成する場合がある。当該酸素欠損に水素が入ることで、キャリアである電 子が生成される場合がある。また、水素の一部が金属原子と結合する酸素と結合して、キ ャリアである電子を生成することがある。従って、水素が含まれている金属酸化物を用い たトランジスタは、ノーマリーオン特性となりやすい。

[0161] For this reason, it is preferable that hydrogen in the metal oxide is reduced as much as possible. Specifically, in the metal oxide, the hydrogen concentration obtained by SIMS is less than 1×10 atoms 20 / cm / cm 3 未満、好ましくは1×10 19 atoms / cm 3 未満、より好ましくは5×1 0 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 less than Therefore, metal oxides with sufficiently reduced impurities are used in the channel formation region of the transistor. This allows for the provision of stable electrical characteristics.

[0162] For the metal oxide used in the semiconductor of a transistor, it is preferable to use a thin film with high crystalline properties. It seems that using this thin film can improve the stability or reliability of transistors. Yes, it is possible. Examples of such thin films include thin films of single-crystal metal oxides or thin films of polycrystalline metal oxides. These include thin films of single-crystal metal oxides or thin films of polycrystalline metal oxides. Forming on a substrate requires a high-temperature or laser heating process. Therefore, the manufacturing process This would increase costs and also decrease throughput.

[0163] <Method for fabricating semiconductor devices> Next, regarding the semiconductor device having the transistor 201 according to the present invention, as shown in Figure 2, The manufacturing method will be explained using Figures 4 to 12. Also, in Figures 4 to 12, (A (A) shows a top view. Also, (B) in each figure is the section shown by the dashed line A1-A2 in (A). This is a cross-sectional view corresponding to the position, and is also a cross-sectional view of transistor 201 in the channel length direction. Furthermore, (C) in each figure is a cross-sectional view corresponding to the area shown by the dashed line A3-A4 in (A). This is also a cross-sectional view of transistor 201 in the channel width direction. Note that (A) in each figure is a top view. Therefore, some elements have been omitted to clarify the diagram.

[0164] First, a substrate (not shown) is prepared, and an insulator 214 is deposited on the substrate. 14. Film deposition methods include sputtering and chemical vapor deposition (CVD). Deposition method, Molecular beam epitaxy (MBE) EAM Epitaxy, Pulsed Laser Deposition (PLD) Deposition method, or ALD (Atomic Layer Deposit) This can be done using methods such as the ion method.

[0165] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.

[0166] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD, on the other hand, is a method that can produce high-quality films at low temperatures. A film deposition method that does not use Zuma, thus minimizing plasma damage to the workpiece. For example, wiring, electrodes, and elements (transistors, capacitive elements, etc.) included in semiconductor devices. ) and others can be charged up by receiving an electric charge from the plasma. In cases where the accumulated charge destroys the wiring, electrodes, and elements contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. Therefore, the yield of semiconductor devices can be increased. Also, in the thermal CVD method, Because plasma damage does not occur within the film, a film with fewer defects can be obtained.

[0167] Furthermore, the ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer. This allows for the deposition of extremely thin films, enabling film deposition on structures with high aspect ratios, and pinholes. It enables film formation with fewer defects such as blemishes, allows for film formation with excellent coverage, and enables film formation at low temperatures. It has effects such as [mention specific effects]. In addition, the ALD method is a film deposition method that utilizes plasma, called PEA This also includes the LD (Plasma Enhanced ALD) method, which utilizes plasma. This allows for film deposition at lower temperatures, which is preferable in some cases. Casa contains impurities such as carbon. Therefore, a membrane is created by the ALD method. Compared to films formed by other film deposition methods, these films may contain more impurities such as carbon. Furthermore, the quantitative determination of impurities is performed using X-ray photoelectron spectroscopy (XPS). This can be done using tron ​​spectroscopy.

[0168] CVD and ALD are film deposition methods in which particles emitted from a target or other source are deposited. Unlike other methods, this is a film-forming method in which a film is formed by a reaction on the surface of the object being treated. This film-forming method is less affected by the shape of the workpiece and has good step-level coverage. Furthermore, the ALD method has excellent step coverage and excellent thickness uniformity, thus aspect ratio This method is suitable for coating the surface of high-aperture openings, etc. However, the ALD method is relatively suitable for film formation. Because of its slow rate, it should be used in combination with other film deposition methods that have a faster deposition rate, such as CVD. In some cases, this may be preferable.

[0169] The CVD and ALD methods control the composition of the resulting film by adjusting the flow rate ratio of the source gases. This is possible. For example, in the CVD method and ALD method, the flow rate ratio of the raw material gas can be adjusted as needed. A film with the following composition can be formed. Furthermore, for example, in the CVD method and ALD method, film formation can be performed. By changing the flow rate ratio of the raw material gas while simultaneously depositing a film with a continuously changing composition. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to the method of film deposition using a conveyor belt, it eliminates the time required for transport and pressure adjustment, thus reducing the time required for film deposition. The interval can be shortened. Therefore, the productivity of semiconductor devices can be increased. There is.

[0170] In this embodiment, silicon nitride is deposited as the insulator 214 by CVD. Thus, as the insulator 214, an insulator that is impermeable to copper, such as silicon nitride, is used. As a result, a diffusive metal such as copper is used in the conductive layer (not shown) below the insulator 214. Even if present, the diffusion of the metal to the upper layer via the insulator 214 can be suppressed. Furthermore, by using an insulator that is resistant to the permeability of impurities such as water or hydrogen, such as silicon nitride... This suppresses the diffusion of impurities such as water or hydrogen from the layer below the insulator 214. can.

[0171] Furthermore, the insulator 214 may have a two-layer structure. For example, aluminum oxide on silicon nitride. A film of um may be deposited.

[0172] Next, an insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. This can be performed using methods such as the blotting method, CVD method, MBE method, PLD method, or ALD method.

[0173] Next, an opening is formed in the insulator 216 that reaches the insulator 214. An opening is, for example, a groove or This also includes slits, etc. Furthermore, the term "opening" can sometimes refer to the area where an opening has been formed. The opening can be formed using wet etching, but dry etching is preferable. This is preferable for microfabrication. In addition, the insulator 214 forms grooves by etching the insulator 216. It is preferable to select an insulator that functions as an etching stopper film during the etching process. When a silicon oxide film is used for the insulator 216 that forms the groove, the insulator 214 is silicon nitride Cone film, aluminum oxide film, and hafnium oxide film are suitable options.

[0174] After the opening is formed, a conductive film that will become the conductor 205 is deposited. This conductive film suppresses oxygen permeation. It is desirable to include a conductor that has a controlling function. For example, tantalum nitride, tungsten nitride Stainless steel, titanium nitride, etc. can be used. Alternatively, tantalum, tungsten, titanium, etc. This can be a laminated film of molybdenum, aluminum, copper, and molybdenum-tungsten alloy. Yes, it is possible. The conductive film that will become conductor 205 can be deposited using sputtering, CVD, MBE, This can be done using methods such as the PLD method or the ALD method.

[0175] In this embodiment, the conductive film that becomes the conductor 205 has a multilayer structure. First, sputtering A tantalum nitride film is formed by a tangent molding process, and titanium nitride is then laminated on top of the tantalum nitride film. By using such metal nitrides as the underlying layer of the conductive film that becomes the conductor 205, as will be described later. Even if a diffusive metal such as copper is used as the conductive film on top of the conductive film that becomes the conductor 205, This prevents the metal from diffusing out of the conductor 205.

[0176] Next, a conductive film is formed on top of the conductive film that will become the conductor 205. The formation of this conductive film is carried out by... This can be done using methods such as the kerosene method, sputtering method, CVD method, MBE method, PLD method, or ALD method. This is possible. In this embodiment, the conductive film on top of the conductive film that becomes the conductor 205 is, A low-resistance conductive material such as copper is deposited as a thin film.

[0177] Next, CMP treatment (Chemical Mechanical Polishing) By doing so, the upper layer of the conductive film that becomes the conductor 205, and the conductive film that becomes the conductor 205 A portion of the lower layer is removed to expose the insulator 216. As a result, the conductor 205 is only visible at the opening. A conductive film remains. This allows for the formation of a conductor 205 with a flat top surface. (See Figure 4). Note that if a portion of the insulator 216 is removed by the CMP treatment... There is.

[0178] From here, a different method for forming the conductor 205 will be described below.

[0179] A conductive film that will become a conductor 205 is formed on the insulator 214. The film deposition is carried out using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done. Furthermore, the conductive film that becomes the conductor 205 can be a multilayer film. In this embodiment, tungsten is deposited as a conductive film that will become the conductor 205.

[0180] Next, a conductive film to become the conductor 205 is processed using lithography. It forms.

[0181] In lithography, the resist is first exposed through a mask. Next, exposure... The selected area is removed or left intact using a developer to form a resist mask. Next, By etching through the resist mask, conductors, semiconductors, or insulators, etc. It can be processed into the desired shape. For example, KrF excimer laser light, ArF excimer Using malea light, EUV (Extreme Ultraviolet) light, etc., A resist mask can be formed by exposing the resist. Also, between the substrate and the projection lens Alternatively, an immersion technique may be used, in which a liquid (e.g., water) is filled into the container and exposed to light. Alternatively, electron beams or ion beams may be used. If used, a mask is not required. Note that to remove the resist mask, an ashing process is necessary. Which dry etching process, which wet etching process, dry etching process After processing, wet etching is performed, or dry etching is performed after wet etching. It can perform a processing step.

[0182] Alternatively, a hard mask made of an insulator or conductor may be used instead of a resist mask. When using a hard mask, an insulating film that will become the conductor 205 will be placed on top of the conductive film that will become the hard mask material. A border film or conductive film is formed, a resist mask is formed on top of it, and the hard mask material is etched. By doing this, a hard mask of the desired shape can be formed. The etching of the film can be performed after removing the resist mask, or the resist mask can be removed. You can leave it as is. In the latter case, the resist mask may disappear during etching. Yes. After etching the conductive film that will become conductor 205, the hard mask is removed by etching. It is permissible to do so. On the other hand, if the hard mask material does not affect subsequent processes, or can be used in subsequent processes In such cases, it is not always necessary to remove the hard mask.

[0183] As a dry etching apparatus, a capacitively coupled plasma (CCP) system with parallel plate electrodes is used. (Capacitively Coupled Plasma) Etching apparatus is used. Capacitively coupled plasma etching apparatus having parallel plate electrodes can be used. Alternatively, a high-frequency power supply may be applied to one electrode of the type electrode. Or, one of the parallel plate type electrodes. Alternatively, a configuration in which multiple different high-frequency power supplies are applied to the electrodes may be used. Or a parallel plate type electrode Alternatively, a configuration in which a high-frequency power supply of the same frequency is applied to each of them may be used. Alternatively, a configuration in which high-frequency power supplies of different frequencies are applied may be used. Or, a high-density plasma source may be used. A dry etching apparatus can be used. Dry etching with a high-density plasma source. The device is, for example, an inductively coupled plasma (ICP) device. Etching equipment such as an ed Plasma etching device can be used.

[0184] Next, an insulating film, which will become an insulator 216, is formed on the insulator 214 and the conductor 205. The insulating film that will become body 216 can be deposited by sputtering, CVD, MBE, PLD, or This can be done using methods such as ALD. In this embodiment, the insulating material that becomes the insulator 216 is Silicon oxide is deposited as a film using the CVD method.

[0185] Here, it is preferable that the thickness of the insulating film that becomes the insulator 216 be greater than or equal to the thickness of the conductor 205. For example, if the thickness of the conductive material 205 is 1, then the thickness of the insulating film that becomes the insulator 216 is , shall be between 1 and 3. In this embodiment, the film thickness of the conductor 205 is 150 nm, and insulation The thickness of the insulating film that will become body 216 will be 350 nm.

[0186] Next, by performing CMP treatment on the insulating film that will become the insulator 216, the insulating film that will become the insulator 216 is formed A portion of the film is removed, exposing the surface of the conductor 205. This results in a conductive material with a flat top surface. A body 205 and an insulator 216 can be formed. The above describes the different forms of the conductor 205. It is a method.

[0187] Next, an insulator 222 is formed on the insulator 216 and the conductor 205. As such, an insulating film containing an oxide of aluminum and / or hafnium is formed. It is desirable to do so. Furthermore, an insulator containing an oxide of either aluminum or hafnium or both. Examples include aluminum oxide, hafnium oxide, and aluminum and hafnium oxides. It is preferable to use materials such as aluminum and hafnium aluminate. Insulators containing oxides of one or both of the elements provide a barrier against oxygen, hydrogen, and water. It has. The insulator 222 has barrier properties against hydrogen and water, so the transient Hydrogen and water contained in the structure surrounding T201 are transmitted through the insulator 222. Diffusion into the inside of lampistor 201 is suppressed, and oxide 230a, oxide 230b, Furthermore, it can suppress the formation of oxygen vacancies in oxide 230c.

[0188] The insulator 222 is deposited by sputtering, CVD, MBE, PLD, or A This can be done using methods such as the LD method.

[0189] Next, an insulator 224 is deposited on the insulator 222. The insulator 224 is deposited by sputtering. This can be done using methods such as the kerning method, CVD method, MBE method, PLD method, or ALD method. .

[0190] Next, it is preferable to perform a heat treatment. The heat treatment should be performed at a temperature of 250°C to 650°C. The process is carried out at a temperature of 300°C to 500°C, more preferably 320°C to 450°C. That's fine. Note that the heat treatment should be performed in a nitrogen or inert gas atmosphere, or with an oxidizing gas at 10 pp. The process should be carried out in an atmosphere containing m or more, 1% or more, or 10% or more. Furthermore, the heat treatment should be performed under reduced pressure. It may be done. Alternatively, the heat treatment may be performed after heat treatment in a nitrogen or inert gas atmosphere. To compensate for the removed oxygen, it contains an oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more. Heat treatment may be performed in a suitable atmosphere.

[0191] In this embodiment, after processing at a temperature of 400°C for 1 hour in a nitrogen atmosphere, The material is then treated in an oxygen atmosphere at a temperature of 400°C for 1 hour. This heat treatment improves insulation. It can remove impurities such as water and hydrogen contained in body 224.

[0192] Furthermore, the heat treatment may be performed after the film formation of the insulator 222. This heat treatment is as described above. Heat treatment conditions can be used.

[0193] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. Plasma treatment may be performed. Oxygen-containing plasma treatment can be performed, for example, using high-density microwaves. It is preferable to use a device that has a power supply for generating rasma. Alternatively, RF( It may have a power supply that applies radio frequency. By doing so, high-density oxygen radicals can be generated, and RF can be applied to the substrate side. This efficiently guides the oxygen radicals generated by the high-density plasma into the insulator 224. This is possible. Alternatively, after performing plasma treatment with an inert gas using this device, Plasma treatment containing oxygen may be performed to replenish the desorbed oxygen. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. It can be removed. In that case, heat treatment is not necessary.

[0194] Here, aluminum oxide is applied to the insulator 224, for example, by sputtering. The film may be formed, and CMP may be performed until the aluminum oxide reaches the insulator 224. By performing CMP, the surface of the insulator 224 is planarized and smoothed. This can be achieved. By placing the aluminum oxide on the insulator 224 and performing CMP, C The end point detection of the MP becomes easier. Also, a portion of the insulator 224 is polished by the CMP. The film thickness of the insulator 224 may become thin, but the film thickness can be adjusted during the deposition of the insulator 224. This is sufficient. Planarizing and smoothing the surface of the insulator 224 will improve the adhesion of the oxide film to be formed later. In some cases, it is possible to prevent a deterioration in coverage and thus prevent a decrease in the yield of semiconductor devices. Also, By depositing aluminum oxide on the insulator 224 using the sputtering method, This is preferable because oxygen can be added to the insulator 224.

[0195] Next, oxide films 230A1 and 230B1 are deposited sequentially on the insulator 224 (Figure 4). (See reference). It is preferable to continuously deposit the above oxide film without exposing it to the atmospheric environment. By forming the film without opening to the atmosphere, the atmosphere is not exposed to the air on oxide film 230A1 and oxide film 230B1. It can prevent impurities or moisture from adhering from the boundary, and oxide film 230A1 and oxide film The area near the interface with 230B1 can be kept clean.

[0196] The deposition of oxide films 230A1 and 230B1 was carried out by sputtering, CVD, and M This can be done using methods such as the BE method, PLD method, or ALD method.

[0197] For example, oxide films 230A1 and 230B1 are deposited by sputtering. In this case, use oxygen or a mixture of oxygen and a noble gas as the sputtering gas. By increasing the proportion of oxygen in the sputtering gas, excess oxygen in the deposited oxide film can be reduced. The amount of oxygen can be increased. Also, when the above oxide film is deposited by sputtering, In this case, the above-mentioned In-M-Zn oxide target can be used.

[0198] In particular, during the deposition of oxide film 230A1, some of the oxygen contained in the sputtering gas becomes an insulator. It may be supplied to body 224. Therefore, the sputtering gas of oxide film 230A1 The oxygen content is 70% or more, preferably 80% or more, more preferably 100%. That's all you need to do.

[0199] Furthermore, when forming oxide film 230B1 by sputtering, the sputtering gas contains The film is formed with an oxygen content of 1% to 30%, preferably 5% to 20%. Then, an oxygen-deficient oxide semiconductor is formed. Channel formation in the oxygen-deficient oxide semiconductor. The transistor used in the region can achieve relatively high field-effect mobility. Alternatively, sputtering The proportion of oxygen in the ring gas is 70% or more, preferably 80% or more, more It may be used to form a film at 100%. In this case, some of the oxygen contained in the sputtering gas It is preferable that it is supplied to the oxide film 230A1.

[0200] In this embodiment, the oxide film 230A1 is formed by sputtering using the In:Ga Zn = 1:1:0.5 [atomic ratio] (2:2:1 [atomic ratio]), or 1:3:4 The film is deposited using a target with [atomic ratio]. In addition, as oxide film 230B1, sputtering is performed. The ring method yields In:Ga:Zn = 4:2:4.1 [atomic ratio], or 1:1: The film is deposited using a target with an atomic ratio of 1. Note that oxide film 230A1 and oxide film 230B1 can be produced by appropriately selecting the film deposition conditions and atomic ratio, thereby producing oxide 230a and It is best to form the oxide 230b according to the desired properties.

[0201] Next, heat treatment may be performed. The heat treatment can be carried out using the heat treatment conditions described above. Heat treatment removes water, hydrogen, etc. from oxide film 230A1 and oxide film 230B1. Impurities can be removed. In this embodiment, at a temperature of 400°C in a nitrogen atmosphere After a 1-hour treatment, the sample is continuously treated in an oxygen atmosphere at 400°C for another 1 hour. cormorant.

[0202] Next, a film to be used as hard mask 244 is deposited. This is done using methods such as sputtering, CVD, MBE, PLD, or ALD. This is possible. The film that will become the hard mask 244 is the oxide film 23 in the subsequent process. When processing 0A1 and oxide film 230B1, the hard mask 244 is etched. A sieve film is preferred. For example, silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide nitride Silicon, aluminum oxide, hafnium oxide, tungsten, molybdenum, aluminum Materials such as titanium, titanium nitride, tantalum, and tantalum nitride can be used.

[0203] Next, the film that will become the hard mask 244 is processed using lithography, and the hard mask Form a hard mask 244. Next, use the hard mask 244 as an etching mask to form an oxide film 23 OA1 and oxide film 230B1 are processed to produce oxide 230A2 and oxide 230B2. Form. Note that in this process, regions that do not overlap with the oxide film 230A2 of the insulator 224 The film thickness may become thinner (see Figure 5).

[0204] Next, a conductive film 242A is formed to cover the insulator 224 and the hard mask 244. (See Figure 6). The conductive film 242A was deposited by sputtering, CVD, MBE, and PL. This can be done using the D method or the ALD method. The deposition of the conductive film 242A is performed vertically. It is preferable that the deposition rate in the horizontal direction is smaller than the deposition rate in the vertical direction. If the degree is set to 1, the film deposition rate in the horizontal direction is preferably 0.5 or less. The deposition of conductive film 242A is For example, bias sputtering, a method in which a film is deposited on a substrate while applying an electric potential, and the substrate and target A shield plate with holes (collimator) is inserted between the layers to control the direction of film deposition. Sputtering method, or long-throw sputtering where the distance between the substrate and the target is long. Methods such as the ping method can be used.

[0205] Furthermore, the conductive film 242A may be tin, tungsten, titanium, or silicon. Preferably, it contains one or more of these and indium. For example, indium tin oxide. , indium oxide containing tungsten oxide, indium zinc acid containing tungsten oxide Indium oxides containing titanium oxide, indium tin oxide containing titanium oxide, Indium tin oxide with added zinc oxide or silicon may also be used. Zinc oxide with added zinc oxide or titanium oxide with added niobium may also be used. Let's use indium tin oxide.

[0206] Next, a portion of the conductive film 242A is etched isotropically (isotropic etching). The ching occurs when the upper surface of the conductor 242B and the upper surface of the oxide 232B2 are at approximately the same height. The conductive film 242A on the side of the hard mask 244 is removed. This is done so that the insulating film is removed. A conductor 242B is formed on the edge body 224, and a conductor 242C is formed on the hard mask 244. This is done (see Figure 7). For this etching process, dry etching or wet etching is used. The ching method can be used.

[0207] Next, the hard mask 244 is etched from the side. This etching is hard Compared to the etching rate of mask 244, the conductor 242B is hardly etched at all. It is preferable that the etching rate of the conductor 242B is as low as possible. Figure 8 shows hard This shows the etching process of mask 244. Next, the entire hard mask 244 is etched. As a result, the conductor 242C on the hard mask is lifted off. Also, oxide 230B2 The height of the top surface of the conductor 242B is approximately equal to the height of the top surface of the conductor 242B (see Figure 9).

[0208] Next, lithography was used to separate oxide 230A2, oxide 230B2, and conductive Body 242B is processed to obtain oxide 230a, oxide 230c, conductor 242a, and conductor Forms 242b. Here, oxide 230a, oxide 230b, conductor 242a, and The conductor 242b is formed such that at least a portion of it overlaps with the conductor 205. In this process, the film thickness of the region of the insulator 224 that does not overlap with the oxide 230a becomes thinner. There are also oxides 230a of insulator 224, conductor 242a, and conductor 242 The film thickness in regions that do not overlap with b may be thinner (see Figure 10).

[0209] Next, a first heat treatment may be performed. The first heat treatment is carried out in an oxygen-containing atmosphere. This is preferable. Alternatively, the first heat treatment may be carried out under reduced pressure and without exposure to the atmosphere. A subsequent oxide film, which becomes oxide 230c, may be formed. Then, moisture and hydrogen adsorbed on the surface of oxide 230b are removed, and further oxide 2 The water and hydrogen concentrations in 30a and oxide 230b can be reduced. The heat treatment temperature for 1 is preferably 100°C to 400°C, and more preferably 150°C. The temperature is between ℃ and 350℃. In this embodiment, the temperature of the first heat treatment is set to 200℃. It will be done under reduced pressure.

[0210] Next, an oxide film that will become oxide 230c is formed (see Figure 11). Oxide film deposition can be performed using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done using [a specific method]. As the oxide film that becomes oxide 230c, the raw material of Ga relative to In It is preferable that the atom ratio is greater than the atomic ratio of Ga to In in oxide 230b. In this embodiment, the oxide film that becomes oxide 230c is obtained by sputtering, In The film is deposited using a target with an atomic ratio of Ga:Zn = 1:3:4.

[0211] The oxide film that becomes oxide 230c may be layered. For example, by sputtering. Therefore, a film was deposited using a target with an atomic ratio of In:Ga:Zn=4:2:4.1. Then, a film is deposited continuously using a target with an atomic ratio of In:Ga:Zn=1:3:4. That's good too.

[0212] In particular, when forming an oxide film that becomes oxide 230c, the oxygen contained in the sputtering gas A portion may be supplied to oxides 230a and 230b. Therefore, oxidation The oxygen content in the sputtering gas for the oxide film that becomes material 230c is preferably 70% or more. It should be 80% or more, more preferably 100%.

[0213] Next, a second heat treatment may be performed. The second heat treatment is carried out under reduced pressure and exposed to air. Without doing so, an insulating film that continuously forms an insulator 250 may be formed. By doing so, the moisture and water adsorbed on the surface of the oxide film that becomes oxide 230c are removed. The element is removed, and the oxide film further becomes oxide 230a, oxide 230b, and oxide 230c. The moisture and hydrogen concentrations inside can be reduced. The temperature of the second heat treatment is 10 A temperature of 0°C to 400°C is preferred. In this embodiment, the temperature of the second heat treatment is 200°C. Let's assume that.

[0214] Next, an insulating film that will become the insulator 250 is deposited (see Figure 11). The film is produced using methods such as sputtering, CVD, MBE, PLD, or ALD. A film can be formed. As an insulating film that becomes the insulator 250, by CVD, oxidative nitride sulfate It is preferable to form a film of Recon. The temperature is preferably between 250°C and 450°C, and particularly around 350°C. Insulator 2 By depositing an insulating film with a value of 50 at 350°C, an insulator with fewer impurities can be formed. It is possible.

[0215] Next, conductive films that will become conductor 260a and conductor 260b are formed. Conductive 260a The deposition of the conductive film that will become the conductor 260b is carried out by sputtering, CVD, MBE, This can be done using methods such as the PLD method or the ALD method. For example, the CVD method can be used. This is preferable. In this embodiment, a conductive film that will become the conductor 260a is formed using the ALD method. Then, a conductive film that will become conductor 260b is deposited using the CVD method (see Figure 11).

[0216] Next, using lithography, an oxide film that becomes oxide 230c and an insulating film that becomes insulator 250 are obtained. The edge film, the conductive film that will become conductor 260a, and the conductive film that will become conductor 260b are processed and oxidized. Material 230c, insulator 250, conductor 260 (conductor 260a and conductor 260b) This is achieved. Here, the conductor 260 is formed such that at least a portion of it overlaps with the conductor 205. (See Figure 11).

[0217] Next, a third heat treatment may be performed. The third heat treatment may be performed in a nitrogen atmosphere or an oxygen atmosphere. This can be carried out in the atmosphere in which it is contained. Preferably, as a third heat treatment, nitrogen and oxygen and It is preferable to carry out the process in an atmosphere containing [the specified element]. When carrying out the process in an atmosphere containing nitrogen and oxygen, The proportion of oxygen is preferably 5% to 20% of the total amount of nitrogen and oxygen. The temperature for the heat treatment in step 3 is preferably 300°C to 450°C, more preferably 30°C. The temperature range is between 0°C and 400°C. Typically, a temperature of 350°C or near that is preferred. Furthermore, the heat treatment time is 100 hours or less, preferably 1 hour or more and 48 hours or less. Typically, a processing time of 24 hours or close to that is preferred. This allows the water concentration and hydrogen concentration in oxide 230, insulator 250, and insulator 280 to be controlled. This can reduce the carrier density in the channel formation region of oxide 230. In this embodiment, the material is heated in a nitrogen atmosphere at a temperature of 350°C for 24 hours. It is preferable that the third heat treatment be carried out under conditions that prevent oxidation of the conductor 260.

[0218] Next, insulator 224, oxide 230a, oxide 230b, conductor 242a, conductor 242 The insulator 272 is formed over b and the conductor 260 (see Figure 11).

[0219] The insulator 272 is deposited by sputtering, CVD, MBE, PLD, or AL. This can be done using methods such as Method D. The insulator 272 has the function of suppressing oxygen permeation. It is preferable to use an insulating film. For example, by sputtering or ALD, Aluminum oxide, silicon nitride, silicon oxide, or gallium oxide may be deposited as a thin film. The insulator 272 may have a two-layer structure. For example, by sputtering, A luminium film may be deposited first, and then an aluminum oxide film may be deposited by the ALD method. By using such a configuration, pinholes are formed in the aluminum oxide film deposited by the sputtering method. Even if defects such as voids or other defects occur, the film is formed by the ALD method, which has excellent coverage. The aluminum oxide is preferable because it can seal the defects.

[0220] Next, an insulating film that will become an insulator 280 is formed on the insulator 272. Insulating film deposition methods include sputtering, CVD, MBE, PLD, or ALD. This can be done using the following: Next, the insulating film that will become the insulator 280 is subjected to CMP treatment, and the upper surface This forms a flat insulator 280 (see Figure 12).

[0221] Next, a fourth heat treatment may be performed. The fourth heat treatment is carried out under reduced pressure and exposed to air. It is preferable to form an insulating film that will become an insulating film 281 on the insulating film 280 without doing so. By performing such a process, moisture and hydrogen adsorbed on the surface of the insulator 280 can be removed. This is preferable because it can remove [unclear]. The deposition of the insulating film that will become the insulator 281 is done by sputtering. This can be done using methods such as the kerning method, CVD method, MBE method, PLD method, or ALD method. As an insulating film that becomes the insulator 281, for example, aluminum oxide can be produced by sputtering. It is preferable to deposit a nium film. Furthermore, the insulator 281 may have a two-layer structure. For example, First, aluminum oxide is deposited by sputtering, and then by sputtering Alternatively, silicon nitride can be deposited as a film. By arranging the insulator 281 in this way... Impurities such as water or hydrogen may diffuse from the outside through the insulator 281 to the transistor 201. This can suppress the action. (See Figure 12).

[0222] Next, a fifth heat treatment may be performed. In this embodiment, the mixture is heated in a nitrogen atmosphere at 400°C. The process is carried out at a certain temperature for one hour. This heat treatment adds the insulating material 281 by forming a film. The oxygen can be injected into the insulator 280. Furthermore, the oxygen is injected via the oxide 230c. This allows for injection into oxide 230a and oxide 230b.

[0223] Next, the conductor 242a and the conductor are placed in the insulators 272, 280, and 281. An opening is formed that reaches the electric body 242b (see Figure 2). The formation of this opening is done by lithography. It should be done using the law.

[0224] Next, an insulating film to become an insulator 241 is formed, and the insulating film is anisotropically etched to form an insulator. Form 241 (see Figure 2). The conductive film is deposited by sputtering, CVD, M This can be done using methods such as the BE method, PLD method, or ALD method. The result will be insulator 241. As the insulating film, it is preferable to use an insulating film that has the function of suppressing oxygen permeation. Example For example, it is preferable to deposit aluminum oxide or silicon nitride using the ALD method. Furthermore, anisotropic etching can be performed, for example, by dry etching. By constructing the wall in this manner, the permeation of oxygen from the outside is suppressed, and the subsequent formation of conductivity This can prevent oxidation of body 240a and conductor 240b. Also, conductor 240a Furthermore, it is possible to prevent impurities such as water and hydrogen from diffusing to the outside from the conductor 240b. Cut.

[0225] Next, conductive films that will become conductor 240a and conductor 240b are formed. Conductive 240a The conductive film that forms the conductor 240b has the function of suppressing the permeation of impurities such as water and hydrogen. It is desirable to have a laminated structure that includes a conductive material. For example, tantalum nitride, titanium nitride, etc. It can be made into a laminate of materials such as tungsten, molybdenum, and copper. Conductor 24 The deposition of conductive films with a conductivity of 0 can be done by sputtering, CVD, MBE, PLD, or AL. This can be done using methods such as the D method.

[0226] Next, by performing CMP treatment, the conductive films that become conductor 240a and conductor 240b are formed. A portion is removed to expose the insulator 281. As a result, the conductive film remains only in the aforementioned opening. This makes it possible to form conductors 240a and 240b with flat upper surfaces. (See Figure 2). Note that this CMP treatment may remove a portion of the insulator 281. .

[0227] Next, a conductive film that will become conductor 246 is formed. The formation of the conductive film that will become conductor 246 is performed by This can be done using methods such as puttering, CVD, MBE, PLD, or ALD. can.

[0228] Next, a conductive film to become conductor 246 is processed by lithography, resulting in conductor 240a. The conductor 246a that is in contact with the upper surface and the conductor 246b that is in contact with the upper surface of the conductor 240b form To accomplish (see Figure 2).

[0229] Based on the above, a semiconductor device having the transistor 201 shown in Figure 2 can be fabricated. ru.

[0230] <Modified examples of semiconductor devices> In the following section, using Figure 3, we will explain a configuration that differs from the one shown in the previous <Example of Semiconductor Device Configuration 1>. An example of a semiconductor device having a transistor 200 according to one aspect of the invention will be described.

[0231] Figure 3A is a top view of a semiconductor device having transistor 200. Also, Figure 3B, Figure 3C is a cross-sectional view of the semiconductor device. Here, Figure 3B is a cross-sectional view of Figure 3A, specifically the section A1-A2 This is a cross-sectional view of the area indicated by the dashed line, and is a cross-sectional view of transistor 200 in the channel length direction. There is also Figure 3C, which is a cross-sectional view of the area shown by the dashed line A3-A4 in Figure 3A. This is also a cross-sectional view of the Rangista 200 in the channel width direction. Note that in the top view of Figure 3A, the figure Some elements have been omitted for clarity.

[0232] Furthermore, in the semiconductor device shown in Figure 3, the semiconductor device shown in <Semiconductor Device Configuration Example 1> is also shown. Structures having the same function as those that make up (see Figure 1) are denoted by the same reference numerals.

[0233] The configuration of transistor 200 will be explained below using Figure 3. Regarding the items, the constituent materials of transistor 200 are as follows: <Example of semiconductor device configuration 1> You can use the materials described in detail.

[0234] [Transistor 200] As shown in Figure 3, the transistor 200 has an insulator 216 on the insulator 214 and an insulator Conductor 205, positioned to be embedded in 216, on insulator 216, and conductor 2 Insulator 222 on 05, insulator 224 on insulator 222, and oxide 2 on insulator 224 30, and conductors 242a and 242b on the oxide 230, and conductor 242a, conductor The electrode 242b, and the insulator 250 on the oxide 230, and the conductor 260 on the insulator 250 (Conductors 260a and 260b) are included. Also, the side of conductor 242a , and the bottom surface of the conductor 242a has a region in contact with the oxide 230, and the conductor 242b The sides and the bottom surface of the conductor 242b have regions that are in contact with the oxide 230. The height of the upper surface of body 242a, the height of the upper surface of conductor 242b, and the height of the upper surface of oxide 230 The values ​​are roughly equal.

[0235] The semiconductor device shown in Figure 3 is the same as the semiconductor device shown in <Semiconductor Device Configuration Example 1> (see Figure 1). The shape of oxide 230 is different. The oxide film that becomes oxide 230 is obtained by lithography. In the process of forming it, the oxide film that becomes oxide 230 is not completely removed during half-etching. By doing this, oxide 230 of this shape can be formed. In this way, the source Alternatively, the bottom surface of the conductor 242, which functions as a drain, is in contact with the oxide 230. Therefore, it is preferable as it can suppress the short-channel effect of transistor 200. For other configurations and effects, refer to the semiconductor device shown in Figure 1.

[0236] The configurations, structures, methods, etc., described above in this embodiment are not applicable to other embodiments and other examples. It can be used in appropriate combination with the configurations, structures, methods, etc. shown.

[0237] (Embodiment 2) In this embodiment, one form of a semiconductor device will be described with reference to Figure 14.

[0238] [Storage device] Figure 14 shows an example of a semiconductor device (memory device) according to one aspect of the present invention. The semiconductor device comprises transistor 200, transistor 300, and capacitive element 100. Furthermore, transistor 200 is located above transistor 300, and the capacitive element 100 is located above transistor 300. It is located above transistor 300 and transistor 200. As transistor 200, the transistor 200 and transistor 2 described in the previous embodiment are used. 01 can be used.

[0239] Transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. It is a transistor. Transistor 200 is used in memory devices because it has a low off-current. This makes it possible to retain memory content for a long period of time. In other words, refresh Because it does not require any operation, or because the refresh operation is performed very infrequently, the memory Power consumption can be significantly reduced.

[0240] In the semiconductor device shown in Figure 14, wiring 1001 is connected to the source and electrical source of transistor 300. The wiring 1002 is electrically connected to the drain of transistor 300. Furthermore, wiring 1003 is electrically connected to either the source or the drain of transistor 200. The wiring 1004 is then electrically connected to the first gate of transistor 200, and the wiring 1 006 is electrically connected to the second gate of transistor 200. And, The gate of transistor 300, and the other of the source and drain of transistor 200, The wiring 1005 is electrically connected to one of the electrodes of the capacitance element 100, and the wiring 1005 is connected to the electrode of the capacitance element 100. It is electrically connected to the other side.

[0241] Furthermore, the memory device shown in Figure 14, when arranged in a matrix, allows the memory cell array to function as a matrix. It can be configured.

[0242] <Transistor 300> The transistor 300 is provided on the substrate 311 and has a conductor 316 that functions as a gate. The semiconductor region consists of an insulator 315 that functions as a gate insulator and a part of the substrate 311. 313 and low-resistance regions 314a and 3 that function as source or drain. It has 14b and, the transistor 300 is a p-channel type or an n-channel type A slight misalignment is acceptable.

[0243] Here, the transistor 300 shown in Figure 14 is in the semiconductor region 313 where the channel is formed. A portion of the substrate 311 has a convex shape. In addition, the side and top surfaces of the semiconductor region 313 are made of an insulating material. The conductive material 316 is provided so as to cover the edge 315. Materials that adjust the work function may be used. Such a transistor 300 is on a semiconductor substrate. It is also called a FIN-type transistor because it utilizes a protruding part. Furthermore, it may have an insulator that functions as a mask for forming the protrusion. This example shows a case where a protrusion is formed by processing a part of a semiconductor substrate, but when processing an SOI substrate... A semiconductor film having a convex shape may be formed.

[0244] Note that the transistor 300 shown in Figure 14 is just one example, and its structure is not limited to that example. A suitable transistor should be used depending on the configuration and driving method.

[0245] <Capacitive element 100> The capacitive element 100 is located above the transistor 200. The capacitive element 100 is the first A conductor 110 that functions as an electrode, a conductor 120 that functions as a second electrode, and It has an insulator 130 that functions as a dielectric.

[0246] Furthermore, for example, the conductor 112 and the conductor 110 provided on the conductor 246 are formed simultaneously. This is possible. Furthermore, the conductor 112 is connected to the capacitive element 100, the transistor 200, and It functions as a plug or wire that electrically connects to transistor 300.

[0247] In Figure 14, the conductors 112 and 110 are shown as single-layer structures, but this configuration is not limited to this. It is not specified, and may be a laminated structure of two or more layers. For example, a conductor with barrier properties and a highly conductive material A conductor with barrier properties and a conductor with high conductivity are bonded to each other. A highly conductive material may be formed.

[0248] Furthermore, the insulator 130 may be, for example, silicon oxide, silicon oxide nitride, or silicon oxide nitride. Silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrile Aluminum oxide, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride It can be made using materials such as nium, and can be constructed in layers or as a single layer.

[0249] For example, the insulator 130 may contain a material with high dielectric strength, such as silicon oxynitride, and a high dielectric strength material. It is preferable to use a laminated structure with a high-k material. With this configuration, the capacity element Child 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By having an insulator with high dielectric strength, the dielectric strength is improved, and the electrostatic discharge of the capacitive element 100 is reduced. It can suppress damage.

[0250] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Having gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, aluminum and hafnium-containing oxides and nitrides, silicon and hafnium Oxides having silicon and hafnium, or silicon and ha Examples include nitrides containing humium.

[0251] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and nitrogen oxide. Silicon oxide, silicon nitride, silicon nitride, silicon oxide with added fluorine, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with voids It may be made of concrete or resin.

[0252] <Wiring layer> Between each structure, there is a wiring layer containing interlayer membranes, wiring, and plugs. This is also possible. Furthermore, multiple wiring layers can be provided depending on the design. Here, the plug In the case of a conductor that functions as wiring, where multiple structures are grouped together and assigned the same code, There is a possibility of this occurring. Furthermore, in this specification, etc., the wiring and the plug that electrically connects to the wiring are integrated. It may also be an object. That is, when a part of the conductor functions as wiring, and the conductor Some parts may function as plugs.

[0253] For example, on transistor 300, there are insulators 320, 322, and an insulator as interlayer films. The edge body 324 and the insulator 326 are arranged in order in stacked layers. Also, the insulator 320, Insulators 322, 324, and 326 contain capacitive elements 100 or transients Conductors 328 and 330, etc., which are electrically connected to the sta 200, are embedded within. Furthermore, conductors 328 and 330 function as plugs or wiring.

[0254] Furthermore, the insulator, which functions as an interlayer film, acts as a planarizing film that covers the uneven shape beneath it. It may function. For example, the upper surface of the insulator 322 may be chemically and mechanically polished to improve flatness. The surface may be flattened by a flattening treatment such as the CMP method.

[0255] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, as shown in Figure 14. Insulators 350, 352, and 354 are arranged in a stacked manner. Furthermore, a conductor 356 is formed on insulators 350, 352, and 354. Conductor 356 functions as a plug or wiring.

[0256] Similarly, insulators 210, 212, 214, and 216 are conductive Body 218 and the conductor (conductor 205) that constitutes the transistor 200 are embedded. It is present. Furthermore, the conductor 218 is electrically connected to the capacitive element 100 or the transistor 300. It functions as a connecting plug or wiring. Furthermore, the conductor 120 and the insulator An insulator 150 is provided above 130.

[0257] Insulators that can be used as interlayer films include insulating oxides, nitrides, and acids. Examples include nitrides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.

[0258] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, wiring The parasitic capacitance that occurs between them can be reduced. Therefore, depending on the function of the insulator, the material You should choose this option.

[0259] For example, insulators 150, 212, 352, and 354 have a ratio It is preferable to have an insulator with a low dielectric constant. For example, the insulator may be silicon oxide, acid Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon silicon oxide with added elements, silicon oxide with added carbon and nitrogen, porous silicon oxide It is preferable that the insulator has silicon or resin. Alternatively, the insulator may be silicon oxide. Silicon oxide nitride, silicon nitride, silicon nitride, fluorine-added silicon oxide , silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or having vacancies It is preferable to have a laminated structure of silicon oxide and resin. Because silicon oxide-nitride is thermally stable, when combined with resin, it becomes thermally stable. A laminated structure with a low dielectric constant can be formed. Examples of resins include polyester. Polyolefins, polyamides (nylon, aramid, etc.), polyimides, polycarbonates Materials include acrylic or similar.

[0260] Furthermore, transistors using oxide semiconductors suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has a controlling function, the electrical characteristics of the transistor are stabilized. Therefore, the insulator 210 and the insulator 350, etc., are free of impurities such as hydrogen. An insulator that has the function of suppressing oxygen permeation should be used.

[0261] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include, Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Element, argon, gallium, germanium, yttrium, zirconium, lanthanum, neo An insulator containing zym, hafnium, or tantalum may be used in a single layer or in a multilayer configuration. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide Umium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tan oxide Metal oxides such as tar, silicon nitride, or silicon nitride can be used. .

[0262] Conductors that can be used in wiring and plugs include aluminum, chromium, copper, and silver. Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanilla Dium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metallic elements selected from thenium and others can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like nitrates, Silicides such as nickel silicide may also be used.

[0263] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., are metal materials, alloy materials, metal nitride materials, or formed from the above materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. Heat resistance and It is preferable to use high-melting-point materials such as tungsten or molybdenum that can achieve both conductivity and electrical conductivity. Tungsten is preferable. Alternatively, a low-resistance conductive material such as aluminum or copper may be used. It is preferable to form it with a material. By using a low-resistance conductive material, the wiring resistance can be reduced. It is possible.

[0264] <Wiring or plugs in layers containing oxide semiconductors> Furthermore, when an oxide semiconductor is used for transistor 200, excess near the oxide semiconductor An insulator having an oxygen region may be provided. In that case, the insulator having the excess oxygen region A barrier-type insulator is provided between the insulator having the excess oxygen region and the conductor. It is preferable to provide one.

[0265] For example, in Figure 14, an insulating layer is placed between the insulator 224, which has excess oxygen, and the conductor 245. It is preferable to provide body 276. The insulator 276, insulator 222, and insulator 272 are in contact. By being provided in this manner, the insulator 224 and the transistor 200 have barrier properties. The edge material allows for a sealing structure. Furthermore, the insulator 276 is insulator 280 It is preferable that it also be in contact with a part of it. The insulator 276 extends to the insulator 280. This allows for the suppression of the diffusion of oxygen and impurities.

[0266] In other words, by providing the insulator 276, the excess oxygen in the insulator 224 is absorbed by the conductor 24 Absorption by 5 can be suppressed. Also, by having an insulator 276, impurities can be suppressed. This suppresses the diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 245. It is possible.

[0267] Furthermore, the insulator 276 is designed to suppress the diffusion of impurities such as water or hydrogen, and oxygen. It is preferable to use an insulating material that has the function of [insulating]. For example, aluminum oxide or hafni oxide. It is preferable to use materials such as um. In addition, other materials such as magnesium oxide and gallium oxide can also be used. Um, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, nexite oxide Metal oxides such as odium or tantalum oxide, silicon nitride or silicon nitride, etc. You can use it.

[0268] The above is a description of the example configuration. By using this configuration, a tortoise having an oxide semiconductor can be constructed. In semiconductor devices using transistors, the aim is to suppress fluctuations in electrical characteristics and improve reliability. It can be increased. Alternatively, a transistor having an oxide semiconductor with a large on-current can be used. It can be provided. Or, a transistor having an oxide semiconductor with a low off-current. We can provide it. Or, we can provide a semiconductor device with reduced power consumption. ru.

[0269] This embodiment can be appropriately combined with the configurations described in other embodiments and examples. It is possible to implement it.

[0270] (Embodiment 3) In this embodiment, using Figures 15 and 16, we will illustrate one aspect of the present invention in which an oxide is used to half The transistor used as the conductor (which may be referred to as an OS transistor below), and the capacitance element This section explains the storage device to which the child is applied (hereinafter sometimes referred to as the OS memory device). The OS memory device includes at least a capacitive element and an OS transistor that controls the charging and discharging of the capacitive element. This is a memory device that has a zistor. The off-current of the OS transistor is extremely small, so the OS Memory devices possess excellent retention characteristics and can function as non-volatile memory.

[0271] <Example of storage device configuration> Figure 15A shows an example of the configuration of the OS memory device. The storage device 1400 is connected to peripheral circuit 141 1, and a memory cell array 1470. Peripheral circuit 1411 is a row circuit 1420, It has a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.

[0272] The column circuit 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, and a writing It has a power supply circuit, etc. The precharge circuit has the function of precharging the wiring. The amplification amplifier has the function of amplifying the data signal read from the memory cell. The above wiring is connected to the memory cells of the memory cell array 1470. More details will be provided later. The amplified data signal is output via the output circuit 1440. It is output to the outside of the storage device 1400 as RDATA. Also, the row circuit 1420 is, for example It has a row decoder, a word line driver circuit, etc., and can select the row to access. ru.

[0273] The storage device 1400 receives a low power supply voltage (VSS) from an external source as the power supply voltage, and peripheral circuits 14 The high power supply voltage (VDD) for 11 and the high power supply voltage (VIL) for the memory cell array 1470 are It is supplied. In addition, the storage device 1400 contains control signals (CE, WE, RE) and address signals. The address signal ADDR and the data signal WDATA are input from an external source. The address signal ADDR is the line The WDATA signal is input to the decoder and column decoder, and then input to the writing circuit.

[0274] The control logic circuit 1460 processes external input signals (CE, WE, RE). It then generates control signals for the row decoder and column decoder. CE is the chip enable signal. WE is the write enable signal, and RE is the read enable signal. The signals processed by the control logic circuit 1460 are not limited to these. If necessary, you can input other control signals.

[0275] The memory cell array 1470 consists of multiple memory cells MC arranged in a matrix, and multiple It has the wiring. Note that the wiring connecting the memory cell array 1470 and the row circuit 1420 The number of lines is determined by the configuration of the memory cell MC, the number of memory cell MCs in a single row, and other factors. Also, the number of wires connecting the memory cell array 1470 and the column circuit 1430 is noted. This is determined by factors such as the configuration of the recell MC and the number of memory cell MCs in each row.

[0276] In Figure 15A, the peripheral circuit 1411 and the memory cell array 1470 are on the same plane. Although examples of how to form it have been shown, this embodiment is not limited to this. For example, As shown in Figure 15B, the memory cell array 1470 is superimposed on a portion of the peripheral circuit 1411. It may be provided in such a way. For example, so as to overlap below the memory cell array 1470, A configuration that includes a sense amplifier is also possible.

[0277] Figure 16 illustrates an example of a memory cell configuration that can be applied to the above-mentioned memory cell MC.

[0278] [DOSRAM] Figures 16A to 16C show examples of circuit configurations for DRAM memory cells. And, DRAM using a 1OS transistor 1 capacitance element type memory cell is called DOSRAM. (Dynamic Oxide Semiconductor Random Acce It is sometimes called ss Memory. As shown in Figure 16A, memory cell 1471 is a tra It has a transistor M1 and a capacitive element CA. Note that the transistor M1 has a gate (flow It has a front gate (sometimes called a back gate) and a back gate.

[0279] The first terminal of transistor M1 is connected to the first terminal of capacitive element CA, and transistor M The second terminal of 1 is connected to wiring BIL, and the gate of transistor M1 is connected to wiring WOL. Next, the back gate of transistor M1 is connected to wiring BGL. Capacitive element C The second terminal of A is connected to wiring CAL.

[0280] Wiring BIL functions as a bit line, and wiring WOL functions as a word line. CAL functions as wiring for applying a predetermined potential to the second terminal of the capacitive element CA. During data writing and reading, a low-level potential is applied to the wiring CAL. It is preferable to do so. Wiring BGL is used to apply potential to the back gate of transistor M1. It functions as wiring. By applying an arbitrary potential to wiring BGL, the transistor The threshold voltage of M1 can be increased or decreased.

[0281] Furthermore, the memory cell MC is not limited to memory cell 1471, and the circuit configuration can be changed. This is possible. For example, a memory cell MC can be a memory cell 1472 as shown in Figure 16B. The back gate of transistor M1 is connected to the WOL wiring instead of the BGL wiring. It is also possible to do so. For example, the memory cell MC is a memory cell 1473 as shown in Figure 16C. Uni, a single-gate transistor, that is, a transistor without a back gate. It may also be a memory cell composed of M1.

[0282] When the semiconductor device shown in the above embodiment is used as a memory cell 1471, etc., a transistor Transistor 200 is used as M1, and capacitive element 100 is used as capacitive element CA. This can be done. By using an OS transistor as transistor M1, the transistor The leakage current of the M1 can be made very low. In other words, the written data can be transmitted Because it can be retained for a long time by ZISTA M1, the frequency of memory cell refresh is reduced. This can reduce the amount of memory required. Furthermore, it eliminates the need for memory cell refresh operations. It can be done. Also, because the leakage current is very low, memory cell 1471, memory cell 1472, The memory cell 1473 can hold multi-level data or analog data.

[0283] Furthermore, in DOSRAM, as described above, overlaps below the memory cell array 1470 As shown, by using a configuration that includes a sense amplifier, the bit line can be shortened. This reduces the bit line capacitance and thus the memory cell retention capacity.

[0284] [NOSRAM] Figures 16D to 16H show the rotation of a gain cell type memory cell with two transistors and one capacitance element. An example of a circuit configuration is shown. As shown in Figure 16D, the memory cell 1474 is connected to transistor M2 and It has a transistor M3 and a capacitive element CB. Transistor M2 is the front gate It has a gate (sometimes simply called a gate) and a back gate. In this specification, etc., A memory device having a gain cell type memory cell using an OS transistor in the transistor M2. , NOSRAM(Nonvolatile Oxide Semiconductor It is sometimes referred to as RAM.

[0285] The first terminal of transistor M2 is connected to the first terminal of the capacitive element CB, and transistor M The second terminal of 2 is connected to the wiring WBL, and the gate of transistor M2 is connected to the wiring WOL. Next, the back gate of transistor M2 is connected to wiring BGL. Capacitive element C The second terminal of B is connected to wiring CAL. The first terminal of transistor M3 is connected to wiring R. The second terminal of transistor M3 is connected to BL, and the wiring SL is connected to transistor M The gate of 3 is connected to the first terminal of the capacitive element CB.

[0286] Wiring WBL functions as the write bit line, and wiring RBL functions as the read bit line. The wiring WOL functions as a word line. The wiring CAL is the second of the capacitive element CB. It functions as wiring to apply a predetermined potential to the terminal. When writing data, data retention During the process, when reading data, a low-level potential is applied to the wiring CAL. Preferred. Wiring BGL is wiring for applying potential to the back gate of transistor M2. It functions as follows: By applying an arbitrary potential to the wiring BGL, the transistor M2 The threshold voltage can be increased or decreased.

[0287] Furthermore, the memory cell MC is not limited to memory cell 1474, and the circuit configuration can be changed as appropriate. This is possible. For example, the memory cell MC is like the memory cell 1475 shown in Figure 16E. In this configuration, the back gate of transistor M2 is connected to the WOL wiring instead of the BGL wiring. It may also be made into a memory cell MC, as shown in Figure 16F, memory cell 1476 As shown above, a single-gate transistor, that is, a transistor without a back gate A memory cell composed of sta M2 may also be used. For example, the memory cell MC is shown in Figure 1. As shown in memory cell 1477 in 6G, the wiring WBL and wiring RBL are combined into a single wiring BIL. It would also be acceptable to use a structure that summarizes the information in this way.

[0288] When the semiconductor device shown in the above embodiment is used as a memory cell 1474, etc., a transistor Transistor 200 is used as M2, and transistor 300 is used as transistor M3. Capacitive element 100 can be used as the capacitive element CB. Transistor M2 By using an OS transistor, the leakage current of transistor M2 can be made very low. This allows the written data to be retained for a long time by transistor M2. This allows for a reduction in the frequency of memory cell refreshes. Furthermore, it eliminates the need for memory cell refresh operations. Also, the leakage current is very low. Because the temperature is low, the memory cell 1474 can store multi-level data or analog data. The same applies to memory cells 1475 to 1477.

[0289] Note that transistor M3 is a transistor having silicon in the channel formation region (hereinafter (Sometimes called Si transistors) The conductivity type of Si transistor is It may be an n-channel type or a p-channel type. Si transistors are OS transistors In some cases, the field-effect mobility is higher than that of a transistor. Therefore, readout transistor A Si transistor may be used as transistor M3, which functions as a transistor. By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since a converter M2 can be provided, the occupied area of ​​the memory cell is reduced, and the storage device is high It is possible to integrate the resources.

[0290] Also, transistor M3 may be an OS transistor. Transistors M2, M3 When OS transistors are used, the memory cell array 1470 uses only n-type transistors. It can be used to construct a circuit.

[0291] Figure 16H also shows an example of a gain cell type memory cell with 3 transistors and 1 capacitance element. The memory cell 1478 shown in Figure 16H consists of transistors M4 to M6 and a capacitive element C. It has C. Capacitive elements CC are provided as appropriate. Memory cell 1478 has wiring BIL, RW Electrically connected to L, WWL, BGL, and GNDL. Wiring GNDL is low level. This is a wiring that provides a potential. Note that memory cell 1478 is replaced with wiring R instead of wiring BIL. BL and WBL may be electrically connected.

[0292] Transistor M4 is an OS transistor with a back gate, and the back gate is It is electrically connected to wiring BGL. Note that the back gate and gate of transistor M4 They may be electrically connected to each other. Alternatively, transistor M4 may have a back gate. It's not necessary.

[0293] Note that transistors M5 and M6 are either n-channel Si transistors or p-channel Si transistors, respectively. A channel-type Si transistor is also acceptable. Alternatively, transistors M4 to M6 can be OS transistors. It can also be a stapler; in this case, the memory cell array 1470 is rotated using only n-type transistors. A path can be constructed.

[0294] When the semiconductor device shown in the above embodiment is used as the memory cell 1478, transistor M Transistor 200 is used as transistor 4, and transistors M5 and M6 are transistor 300. Using this, the capacitive element 100 can be used as the capacitive element CC. Transistor M4 and By using an OS transistor, the leakage current of transistor M4 is reduced to a very low level. It can be done.

[0295] Note that the peripheral circuit 1411 and memory cell array 1470 shown in this embodiment, etc. The configuration is not limited to those described above. These circuits, and the connections to them The arrangement or function of lines, circuit elements, etc., may be changed, deleted, or added as needed. stomach.

[0296] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and examples. They can be used together.

[0297] (Embodiment 4) In this embodiment, Figure 17 shows a chip 1200 on which the semiconductor device of the present invention is mounted. Here is an example. Chip 1200 has multiple circuits (systems) mounted on it. Uni, the technology of integrating multiple circuits (systems) onto a single chip is called system-on-chip ( It is sometimes referred to as a System on Chip (SoC).

[0298] As shown in Figure 17A, the chip 1200 is a CPU (Central Processor). ing Unit) 1211, GPU (Graphics Processing Un) it)1212, one or more analog arithmetic units 1213, one or more memory controllers Roller 1214, one or more interfaces 1215, one or more networks It has circuits 1216, etc.

[0299] The chip 1200 is provided with bumps (not shown), and as shown in Figure 17B, pre The first side of the Printed Circuit Board (PCB) 1201 It connects to this. In addition, multiple bumps 1202 are provided on the back surface of the first face of PCB1201. It is configured to connect to the motherboard 1203.

[0300] Motherboard 1203 includes memory devices such as DRAM 1221 and flash memory 1222. A place may be provided. For example, the DOSR shown in the previous embodiment may be placed in the DRAM1221. AM can be used. Also, for example, in the flash memory 1222, the above embodiment The NOSRAM shown can be used.

[0301] CPU1211 preferably has multiple CPU cores. Also, GPU1212 It is preferable that it has multiple GPU cores. Also, CPU1211 and GPU1 Each of 212 may have memory to temporarily store data. Or, CP The memory common to both U1211 and GPU1212 is provided on chip 1200. Alternatively, the aforementioned NOSRAM or DOSRAM can be used for this memory. Furthermore, the GPU1212 is suitable for parallel computation of large amounts of data, and is ideal for image processing and multiply-accumulate operations. It can be used. The GPU1212 can be used with an image processing circuit using the oxide semiconductor of the present invention. By providing a multiply-accumulate circuit, image processing and multiply-accumulate operations can be performed with low power consumption. This will become possible.

[0302] Furthermore, because the CPU1211 and GPU1212 are located on the same chip, The wiring between CPU1211 and GPU1212 can be shortened, and CPU1211 or Data transfer to GPU1212, and notes held by CPU1211 and GPU1212. Data transfer between the two systems, and after calculations on GPU1212, data transfer from GPU1212 to CPU12 The transfer of calculation results to 11 can be done at high speed.

[0303] The analog processing unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital / digital) conversion circuit. It has one or both of the digital / analog conversion circuits. Also, analog arithmetic unit 1213 The above-mentioned sum-of-accumulate circuit may be provided.

[0304] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. It also has a circuit that functions as an interface for the flash memory 1222.

[0305] Interface 1215 is for display devices, speakers, microphones, cameras, and controllers. It has an interface circuit for connecting to external devices such as a torpedo. A controller is a motor This includes mice, keyboards, game controllers, etc. USB (Universal Serial Bus), HDMI (registered trademark) (H (using igh-Definition Multimedia Interface, etc.) It is possible to be there.

[0306] The network circuit 1216 is a LAN (Local Area Network), etc. It has a network circuit. It may also have a circuit for network security. stomach.

[0307] The above circuit (system) can be formed on chip 1200 using the same manufacturing process. It is possible. Therefore, even if the number of circuits required for chip 1200 increases, the manufacturing process does not need to be increased. This eliminates the need for additional processing, allowing for the low-cost manufacturing of the Chip 1200.

[0308] PCB1201 equipped with chip 1200 having GPU1212, DRAM122 1, and the motherboard 1203 equipped with flash memory 1222, GPU module It can be called Lure 1204.

[0309] The GPU module 1204 has a chip 1200 that uses SoC technology, Its size can be reduced. Also, because it excels at image processing, smart Phones, tablet devices, laptop PCs, portable (take-out) game consoles, etc. It is suitable for use in portable electronic devices. Also, a multiply-accumulate circuit using the GPU1212. This leads to the development of deep neural networks (DNNs) and convolutional neural networks. (CNN), Recurrent Neural Network (RNN), Autoencoder, Deep Boltzmann It can perform calculations such as those for machine learning (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is the AI ​​chip, or the GPU module 1204 is the AI ​​system module. It can be used as a joule.

[0310] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and examples. They can be used together.

[0311] (Embodiment 5) In this embodiment, regarding the application example of a memory device using the semiconductor device shown in the previous embodiment, Let me explain. The semiconductor device shown in the above embodiment is, for example, used in various electronic devices (for example, information Terminals, computers, smartphones, e-readers, digital cameras (including video cameras) This can be applied to storage devices (including recording and playback devices, navigation systems, etc.). Secondly, computers include tablet computers, notebook computers, and This includes not only desktop computers but also large computers such as server systems. Alternatively, the semiconductor device shown in the previous embodiment may be a memory card (for example, S Various types of removable media such as D cards, USB memory sticks, and SSDs (Solid State Drives) This applies to bubble storage devices. Figure 18 schematically shows several configuration examples of removable storage devices. As shown above, for example, the semiconductor device shown in the above embodiment is a packaged memory chip It is processed into plastic and used in various storage devices and removable memory.

[0312] Figure 18A is a schematic diagram of a USB memory device. The USB memory device 1100 consists of a casing 1101 and a key It has a cap 1102, a USB connector 1103 and a circuit board 1104. The circuit board 1104 is , housed in the casing 1101. For example, the circuit board 1104 has a memory chip 1105, Controller chip 1106 is installed. Memory chip 110 on board 1104 The semiconductor device shown in the above embodiment can be incorporated into 5, etc.

[0313] Figure 18B is a schematic diagram of the external appearance of an SD card, and Figure 18C is a schematic diagram of the internal structure of an SD card. This is a diagram of the equation. The SD card 1110 consists of a housing 1111, a connector 1112, and a circuit board 111. It has 3. The circuit board 1113 is housed in the housing 1111. For example, the circuit board 1113 has A memory chip 1114 and a controller chip 1115 are mounted on the circuit board 11. By also providing a memory chip 1114 on the back side of 13, the capacity of the SD card 1110 can be increased. It is possible to do so. Furthermore, a wireless chip with wireless communication functionality may be provided on the circuit board 1113. Yes. This allows the memory chip to be controlled wirelessly between the host device and the SD card 1110. Data can be read and written to p1114. Memory chip 1 on board 1113 The semiconductor device shown in the above embodiment can be incorporated into 114, etc.

[0314] Figure 18D is a schematic diagram of the external appearance of the SSD, and Figure 18E is a schematic diagram of the internal structure of the SSD. The SSD1150 has a housing 1151, a connector 1152, and a circuit board 1153. The circuit board 1153 is housed in the casing 1151. For example, the circuit board 1153 has memory chips. The chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is the work memory of the controller chip 1156, for example D An OSRAM chip can be used. A memory chip 1154 is also provided on the back side of the circuit board 1153. By doing so, the capacity of the SSD1150 can be increased. (Memory chip on board 1153) The semiconductor device shown in the above embodiment can be incorporated into 1154, etc.

[0315] This embodiment can be appropriately combined with the configurations described in other embodiments and examples. It is possible to implement it.

[0316] (Embodiment 6) A semiconductor device according to one aspect of the present invention includes a processor such as a CPU or GPU, or a chip. It can be used for this purpose. Figure 19 shows a processor such as a CPU or GPU according to one aspect of the present invention. The following are specific examples of electronic devices equipped with a chip.

[0317] <Electronic Equipment and Systems> A GPU or chip according to one aspect of the present invention can be mounted in various electronic devices. Examples of electronic devices include, for instance, television equipment, desktop or notebook computers. Personal computers, computer monitors, digital signage (Digi Digital signage (electronic billboards), large game machines such as pachinko machines, and other relatively large devices. In addition to electronic devices with screens, digital cameras, digital video cameras, and digital photo Examples include frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices. Furthermore, by providing an integrated circuit or chip according to one aspect of the present invention in an electronic device, Artificial intelligence can be installed in the sub-devices.

[0318] An electronic device according to one aspect of the present invention may have an antenna. The antenna receives a signal. This allows the display unit to show images, information, etc. Also, the electronic device acts as an antenna. Furthermore, if a secondary battery is present, the antenna may be used for contactless power transmission.

[0319] An electronic device according to one aspect of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation). Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power (including functions for measuring radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation) It is acceptable to have it.

[0320] An electronic device according to one aspect of the present invention can have various functions. For example, various information Functions to display (still images, videos, text images, etc.) on the display unit, touch panel function, calendar Functions to display the date or time, and to run various software (programs). Functions include: wireless communication, and reading programs or data recorded on a recording medium. It can have functions, etc. Figure 19 shows an example of an electronic device.

[0321] [mobile phone] Figure 19A illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511, and an input interface - As a face, a touch panel is provided on the display unit 5511, and buttons are located on the housing 5510. It is provided.

[0322] The information terminal 5500 utilizes artificial intelligence by applying a chip according to one embodiment of the present invention. The application can be run. As an application utilizing artificial intelligence. For example, an application that recognizes a conversation and displays the content of that conversation on the display unit 5511. The display unit 5511 recognizes characters, shapes, etc., entered by the user on the touch panel. The application to be displayed on the display unit 5511, and the biometric authentication such as fingerprints and voiceprints are performed. Applications are one example.

[0323] [Information Terminal 1] Figure 19B shows a desktop information terminal 5300. The information terminal 5300 consists of the main unit 5301 of the information terminal, the display 5302, and the keyboard 5 It has 303 and

[0324] The desktop information terminal 5300, like the information terminal 5500 described above, is based on the first part of the present invention. By applying a chip of this type, it is possible to run applications that utilize artificial intelligence. Yes, it is possible. Examples of applications that utilize artificial intelligence include design support software. Examples include document editing software and automated menu generation software. By using the 5300 top-type information terminal, it is possible to develop new artificial intelligence.

[0325] In the above, smartphones and desktop information terminals were used as examples of electronic devices. As shown in Figures 19A and 19B, respectively, for smartphones and desktops It can be applied to information terminals other than information terminals. Smartphones and desktops. Other types of information terminals include, for example, PDAs (Personal Digital Adapters). Examples include assistants, notebook computers, and workstations.

[0326] [electric appliances] Figure 19C shows an example of an electrical appliance, the electric refrigerator-freezer 5800. The storage unit 5800 includes a casing 5801, a door for the refrigerator compartment 5802, a door for the freezer compartment 5803, and the like.

[0327] By applying a chip according to one aspect of the present invention to an electric refrigerator 5800, artificial intelligence An electric refrigerator-freezer 5800 with the following features can be realized. By utilizing artificial intelligence... The electric refrigerator-freezer 5800 is used to store food items, and the food It has a function that automatically generates menus based on the expiration dates of ingredients, and the menus are stored in the 5800 electric refrigerator / freezer. It can have features such as automatically adjusting the temperature to suit the ingredients being used.

[0328] In this example, we have described electric refrigerators and freezers as electrical appliances, but other electrical appliances and For example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, induction cooktops , water dispensers, heating and cooling appliances including air conditioners, washing machines, dryers, etc. Examples include audiovisual equipment.

[0329] [Game console] Figure 19D shows a portable game console, model 5200, which is an example of a game console. It includes a housing 5201, a display unit 5202, buttons 5203, etc.

[0330] By applying a GPU or chip according to one aspect of the present invention to a portable game console 5200, This makes it possible to create a low-power portable game console, the 5200. Furthermore, due to its low power consumption, Because it can reduce heat generation from the circuit, the heat generated by the circuit itself, the surrounding circuits, and This can minimize the impact on the module.

[0331] Furthermore, by applying a GPU or chip according to one aspect of the present invention to the portable game console 5200... This makes it possible to realize the 5200, a portable game console equipped with artificial intelligence.

[0332] Originally, the progression of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game, etc. The expression is determined by the program of the game, but the handheld game console 520 By applying artificial intelligence to 0, it becomes possible to create expressions that are not limited to game programs. For example, the questions the player asks, the game's progress, the time, and the characters that appear in the game. This allows for expressions that describe a change in a person's words and actions.

[0333] Furthermore, when playing games that require multiple players on the 5200 handheld game console, artificial intelligence is used. This allows for the creation of anthropomorphic game players, thus enabling the opponent to be represented by artificial intelligence. By making it a night game, it's possible to play the game even by yourself.

[0334] Figure 19D shows a portable game console as an example of a game console, but this is one aspect of the present invention. Game consoles to which the GPU or chip is applied are not limited thereto. GPU of one aspect of the present invention Alternatively, game machines to which the chip can be applied include, for example, home console game machines and entertainment facilities. Arcade game machines installed in facilities (game centers, amusement parks, etc.), and sports facilities. Examples include pitching machines for batting practice.

[0335] [Mobile] A GPU or chip according to one aspect of the present invention is used in a mobile vehicle and the area around the driver's seat of the vehicle. It can be applied to this.

[0336] Figure 19E1 shows an example of a mobile vehicle, automobile 5700, and Figure 19E2 shows the interior of the automobile. This is a diagram showing the area around the windshield. In Figure 19E2, it is mounted on the dashboard. In addition to the display panels 5701, 5702, and 5703 that were cut off, the pillar The installed display panel 5704 is illustrated.

[0337] Display panels 5701 to 5703 display the speedometer, tachometer, and By displaying information such as distance traveled, fuel gauge, gear status, and air conditioning settings, it provides a variety of information. This is possible. Furthermore, the display items and layout shown on the display panel can be customized to the user's preferences. It can be modified as needed to enhance the design. (Display panel) Panels 5701 through 5703 can also be used as lighting devices.

[0338] The display panel 5704 shows the information from an imaging device (not shown) installed in the automobile 5700. By projecting images, it is possible to compensate for the blind spots (visibility obstructed by pillars). In other words, by displaying images from an imaging device installed on the outside of the automobile 5700 This can compensate for blind spots and enhance safety. It also displays images that fill in the gaps in what is not visible. This allows for a more natural and seamless safety check. (Display panel 570) Item 4 can also be used as a lighting device.

[0339] A GPU or chip according to one aspect of the present invention can be applied as a component of artificial intelligence, for example If so, the chip can be used in the autonomous driving system of the automobile 5700. The chip can be used in systems for road guidance, hazard prediction, and other purposes. (Display panel 57) Panels 01 through 5704 are configured to display information such as road guidance and hazard predictions. That's good too.

[0340] In the above, an automobile was described as an example of a moving object, but the moving object is an automobile. It is not limited to these. For example, examples of moving objects include trains, monorails, ships, and aircraft (helicopters). Other examples include unmanned aerial vehicles (drones), airplanes, and rockets, and these can be moved Applying a chip according to one aspect of the present invention to a moving object to provide it with a system utilizing artificial intelligence. It is possible.

[0341] [Broadcasting System] A GPU or chip according to one aspect of the present invention can be applied to a broadcasting system.

[0342] Figure 19F schematically illustrates data transmission in a broadcasting system. Specifically, Figure 19F is the radio wave (broadcast signal) transmitted from broadcasting station 5680 to each household's television receiver. This shows the path to the signal reaching the TV 5600. The TV 5600 is equipped with a receiving device. (Not shown in the diagram) The broadcast signal received by antenna 5650 is transmitted via the receiving device, It is transmitted to TV5600.

[0343] In Figure 19F, antenna 5650 is UHF (Ultra High Frequency) The diagram shows an antenna, but the antenna 5650 is a BS / 110°CS antenna. It can also be used for antennas such as CS antennas.

[0344] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 is The received radio wave 5675A is amplified and used to transmit radio wave 5675B. In each household, the antenna By receiving radio wave 5675B with the NA5650, you can watch terrestrial TV broadcasts with the TV5600. It is possible. Furthermore, the broadcasting system is not limited to terrestrial broadcasting as shown in Figure 19F, but also includes artificial satellite broadcasting. This could also include satellite broadcasting using stars, or data broadcasting via fiber optic lines.

[0345] The broadcasting system described above applies a chip according to one aspect of the present invention and utilizes artificial intelligence for broadcasting. It can also be used as a transmission system. Broadcast data is transmitted from broadcast station 5680 to TVs 5600 in each home. At that time, the encoder compresses the broadcast data, and the antenna 5650 receives the broadcast When data is received, the decoder of the receiving device included in the TV5600 processes the broadcast data Data recovery is performed. By using artificial intelligence, for example, the compression method of the encoder is restored. Recognizing display patterns contained in the displayed image using motion compensation prediction, which is one of the legal methods. It can do this. It can also perform in-frame predictions using artificial intelligence. Also, for example... For example, receiving low-resolution broadcast data and using the high-resolution TV5600 to view the same broadcast data When displaying the data, the decoder performs upconversion and other processes during the restoration of the broadcast data. It can perform image interpolation.

[0346] The broadcasting system using artificial intelligence described above is designed to handle the increasing volume of broadcast data in ultra-high-definition television. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0347] Furthermore, as an application of artificial intelligence on the TV5600 side, for example, the TV5600 can be equipped with artificial intelligence A recording device having the capability may be provided. By having such a configuration, the recording device By having its artificial intelligence learn the user's preferences, it automatically selects programs that match the user's taste. It can record directly.

[0348] The electronic device described in this embodiment, its functions, examples of artificial intelligence applications, and their effects. These can be combined as appropriate with descriptions of other electronic devices.

[0349] This embodiment can be appropriately combined with the configurations described in other embodiments and examples. It is possible to implement it. [Examples]

[0350] In this embodiment, samples A to C having a conductor 242 are prepared, and the conductivity is improved by heat treatment. The variation in sheet resistance of body 242 was evaluated.

[0351] The following describes the method for preparing the sample. First, using a silicon wafer, A layer of silicon oxide with a thickness of 100 nm was formed on the surface by thermal oxidation.

[0352] Next, silicon oxide nitride is coated onto the silicon oxide using the CVD method to a thickness of 300 nm. A film was formed using this method. Next, oxygen was implanted into the silicon oxidoxide using an ion implanter. The oxygen ion implantation conditions were: acceleration energy 60 keV, ion implantation rate 2.0 × 10⁻⁶. 16 / cm 2 That's what I decided.

[0353] Next, using the sputtering method, indium tin oxide was deposited as the conductive material 242. Indium tin oxide was used as a target with a weight ratio of In2O3:SnO2=9:1. For film formation, 40 sccm of Ar gas and 5 sccm of oxygen gas were used, at a pressure of 0.4 P. a. The film was deposited using a DC power of 0.2 kW and a substrate temperature of 200°C. Here, the film thickness of sample A was 5 nm. The film thickness of sample B was set to 10 nm, and the film thickness of sample C was set to 20 nm.

[0354] Next, samples A, B, and C were subjected to heat treatment. The heat treatment was carried out using nitrogen. The heating temperature was set to 400°C under ambient conditions, and the heating time was set to none (0 hours), 1 hour, and 4 hours. It was time.

[0355] Next, for sample A, sample B, and sample C, the respective heat treatment times (0 hours, 1 hour, and The sheet resistance values ​​of indium tin oxide were measured after 4 hours. Figure 20 shows sample A and sample B. The graph shows the dependence of the sheet resistance value of indium tin oxide of sample C on the heat treatment time. .

[0356] The sheet resistance value of the sample that has not undergone heat treatment (heat treatment time 0 hours) is indium tin The results differed depending on the oxide film thickness (5 nm, 10 nm, and 20 nm). After a heat treatment time of 1 hour, the samples of all film thicknesses (5nm, 10nm, and 20nm) were... In both cases, the sheet resistance value is 1.0 × 10 3 (Ω / sq.) to 2.0 × 10 3 (Ω / sq. ) was achieved. Also, after a heat treatment time of 4 hours, all samples of film thickness (5nm, 10nm) were found to be of a certain size. The sheet resistance value is 2.0 × 10⁻⁶ for both 10m and 20nm. 3 (Ω / sq.) to 4.0 ×10 3 It became approximately (Ω / sq.).

[0357] Many conductors oxidize due to the effects of oxygen, and an increase in the sheet resistance of the conductor is observed. The indium tin oxide used in this example was subjected to heat treatment, resulting in the under-indium tin oxide being... The effect of oxygen diffused from silicon oxidnitride containing excess oxygen, which is positioned in contact with the surface, is suppressed. It was found that this maintained a low sheet resistance value.

[0358] As described above, the indium tin oxide used in this embodiment is a transistor according to one aspect of the present invention. We confirmed that it can function as both a source and a drain.

[0359] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh. [Explanation of symbols]

[0360] 100: Capacitive element, 110: Conductor, 112: Conductor, 120: Conductor, 130: Insulator , 150: insulator, 200: transistor, 201: transistor, 205: conductor, 2 05a: Conductor, 205b: Conductor, 210: Insulator, 212: Insulator, 214: Insulator 216: insulator, 218: conductor, 222: insulator, 224: insulator, 230: oxide , 230a: oxide, 230A1: oxide film, 230A2: oxide, 230b: oxide, 2 30B1: Oxide film, 230B2: Oxide, 230c: Oxide, 232B2: Oxide, 24 0: Conductor, 240a: Conductor, 240b: Conductor, 241: Insulator, 241a: Insulator , 241b: insulator, 242: conductor, 242a: conductor, 242A: conductive film, 242b : Conductor, 242B: Conductor, 242C: Conductor, 244: Hard mask, 245: Conductive Body, 246: Conductor, 246a: Conductor, 246b: Conductor, 250: Insulator, 260: Conductor, 260a: Conductor, 260b: Conductor, 272: Insulator, 276: Insulator, 28 0: Insulator, 281: Insulator, 300: Transistor, 311: Substrate, 313: Semiconductor region Region, 314a: Low resistance region, 314b: Low resistance region, 315: Insulator, 316: Conductor, 320: Insulator, 322: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor 1001: Wiring, 1002: Wiring, 1003: Wiring, 1004: Wiring, 1005: Wiring, 1006: Wiring

Claims

[Claim 1] A first insulator and The first conductor and the second conductor on the first insulator, An oxide disposed between the first conductor and the second conductor, A second insulator on the first conductor, on the second conductor, and on the oxide, The present invention comprises a third conductor on the second insulator, The side surface of the first conductor has a region in contact with one side surface of the oxide, The side surface of the second conductor has a region in contact with the other side surface of the oxide, The height of the upper surface of the first conductor, the height of the upper surface of the second conductor, and the height of the upper surface of the oxide are, each, approximately equal. The conductivity of the first conductor is higher than that of the oxide. The conductivity of the second conductor is higher than that of the oxide. The first conductor and the second conductor each comprise In and one or more of Sn, W, Ti, or Si. The first conductor and the second conductor each include one or more of Zn, Ti, Ga, or Nb. The oxide comprises In, element M (where M is Al, Ga, Y, or Sn), and Zn. A semiconductor device wherein the carrier densities of the first conductor and the second conductor are higher than the carrier density of the oxide.

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